Phelma 2A - SEOC Real-Time Systems: Constraints and Implementation Wh. (At - y - en - O)

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Wh.

(at|y|en|o)
Phelma 2A - SEOC
Real-Time Systems: What: Correct-by-construction implementations of (hard) real-time systems.
When: Sem 4: after the course on operating systems and concurrent programming;
Constraints and Implementation in parallel with the course on real-time operating systems; before the use of those
techniques in 3A courses.
Florence Maraninchi Why: because getting correct real-time programs is hopeless without dedicated
www-verimag.imag.fr/˜maraninx methods.
Who: F. Maraninchi, has worked on the design and validation of embedded critical
Verimag/Grenoble INP - Ensimag systems and the HW/SW interface (with applications in consumer electronics,
avionic and automotive systems, medical systems, ...).
2023-2024 – 7th Edition

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A Note on Verimag and This Course Lustre is the ancestor of SCADE

Verimag was created in 1993, by merging two activities:


The Synchronous Language Lustre
Now the core of the de facto standard tool SCADE1
A verification method called model-checking
Now implemented in commercial tools, and Turing award 2007 to J. Sifakis2

The scientific background for these two activities includes: formal models for time and
concurrency. This course focuses on high level formalisms and programming languages
for real-time systems.

1
https://www.ansys.com/fr-fr/products/embedded-software/ansys-scade-suite
2
http://fr.wikipedia.org/wiki/Joseph Sifakis
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Je parle d’avionique mais...

Je ne prends plus l’avion du tout pour raisons d’impact environnemental. Part I


Ma position actuelle sur le numérique est décrite là :
https://www-verimag.imag.fr/~maraninx/research/cacm-vp22/
General Introduction
et là :
https://www.ins2i.cnrs.fr/fr/cnrsinfo/
quelle-recherche-en-informatique-pour-un-
numerique-inscrit-dans-les-limites-planetaires

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“Real-Time” and the 3 Categories of Computer Systems

Outline
1 “Real-Time” and the 3 Categories of Computer Systems
1 “Real-Time” and the 3 Categories of Computer Systems
2 Reactive Systems and the Connection to inputs/outputs
2 Reactive Systems and the Connection to inputs/outputs
3 Logical vs Physical Time
3 Logical vs Physical Time
4 Logical Concurrency vs Implementation Parallelism
4 Logical Concurrency vs Implementation Parallelism

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“Real-Time” and the 3 Categories of Computer Systems “Real-Time” and the 3 Categories of Computer Systems

3 Categories of Computer Systems Transformational Systems


Towards a definition of real-time systems Typical example : a compiler

Transformational Systems (Typical example : a compiler)


Interactive Systems (Typical example: a man-machine interface)
Reactive Systems (Typical example: a heater controller)
Inputs at the beginning, then some finite-time computation, outputs at the end.
Of course, no complete system is purely of one kind only.
A transformational system has to terminate.
If it does not, it’s a bug.
The time it takes to complete is a matter of performance (only).

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“Real-Time” and the 3 Categories of Computer Systems “Real-Time” and the 3 Categories of Computer Systems

Interactive Systems Reactive Systems


Typical example: a man-machine interface Typical example: a heater controller.

The environment
AIR
Heater

Reactive ON, OFF


System
Temperature

loop-based behavior (does not necessarily terminate), where inputs come all the time
(human actions on buttons, mouse, keyboard) and outputs are produced all the time The same as interactive systems, but the speed of the interaction is driven by the
also (changes of the interface, effects on the underlying computer system). (physical) environment. The computer system should be sufficiently fast in order not to
miss relevant evolutions of the environment.

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“Real-Time” and the 3 Categories of Computer Systems “Real-Time” and the 3 Categories of Computer Systems

Reactivity to an Environment, Real-Time Reactivity of a heater controller, Timing Constraint


A typical real-time program:
The environment
AIR
initializations Heater
while (true) { The time it takes to execute the
--- point (1) code between points (1) and (2) is
get inputs the time between two samples of Reactive ON, OFF
System
(read sensors) the inputs. This is real time. Temperature
compute outputs
and update memory The outputs to the environment — If the system outputs ’ON’ at some point in time, the temperature should start increasing,
write outputs may have some influence on future which influences its future inputs.
on the actuators inputs. This is reactivity. — Knowing the dynamics of temperature in the room, one can choose a reasonable sampling
--- point (2)
frequency for the temperature; the system reaction should be fast enough in order not to miss
}
important evolutions.
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“Real-Time” and the 3 Categories of Computer Systems “Real-Time” and the 3 Categories of Computer Systems

Implementation of Real-Time Systems: Problems Time is not a performance criterion


in Real-Time Systems
The time at which you produce an output is as important as the value of that output
Write code that is sufficiently fast (you’re not always allowed to answer: “try a
(ex: producing a signal).
bigger machine” because the HW may be imposed by other concerns)
Be able to tell how fast your program is, in advance (Worst-Case-Execution-Time Value
static evaluation) Same value y,
It’s not always possible to write single-loop code “by hand”, because of the y = f(t) – computed sufficiently fast,
intrinsic concurrency of a reactive system. output at the right time;
e.g., between two independent sensor-computing-actuator lines (see more details – output too late
y
later)

t Time

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“Real-Time” and the 3 Categories of Computer Systems I/O

Quizz 1
1 “Real-Time” and the 3 Categories of Computer Systems

2 Reactive Systems and the Connection to inputs/outputs


Sampling Regularity in the single-loop code
1 Is the ABS system of your car a transformational, interactive, or reactive sytem?
I/O Timing and Protocol/Scheduling Problems
2 Consider a reactive system with 2 inputs (temperature and wind speed), Fault-Tolerance, Multiple Sensors
implemented as a single-loop code. If getting a significant value for the wind speed Summary of I/O Aspects and General On-Board Organizations
takes 2 seconds, what is the max feasible frequency for sampling temperature?
Every 1/2, 1, 2 or 4 seconds? 3 Logical vs Physical Time

4 Logical Concurrency vs Implementation Parallelism

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I/O I/O

About Sampling Regularity

What’s the timing diagram of the following program?


2 Reactive Systems and the Connection to inputs/outputs
Sampling Regularity in the single-loop code Even if read i and write o have
I/O Timing and Protocol/Scheduling Problems almost constant execution times,
Fault-Tolerance, Multiple Sensors
Summary of I/O Aspects and General On-Board Organizations init m; this is not the case for the
while (1) { computation phase (the execution
read i; time of which depends on the
compute o and update m; inputs and the memory).
write o;
} Neither reads nor writes are
performed at regular instants.

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I/O I/O

Imposing Regular Timing in the Single-Loop Code Imposing Regular Timing in the Single-Loop Code:
FreeRTOS Solution (for inputs)
(Used for static scheduling examples, see slide 61)
init m; TickType_t tLast;
while (true) { — period 1p tLast = xTaskGetTickCount(); // current absolute time
T = what_time_is_it(); — ET(write) exact while (1) {
// one reaction, and then wait
read (i); execution time of write read (i); compute o and update m; write (o);
compute o and update m; assumed to be constant. vTaskDelayUntil( &tLast, FUNCTION_PERIOD );
}
T’ = what_time_is_it(); — what time is it also
wait (1p - (T’-T) executes in constant
FUNCTION_PERIOD
- ET(write)) ; (negligible?) time.
write (o); time
}
tLast wait tLast wait tLast

Actual Execution Time


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I/O I/O

Arduino example

2 Reactive Systems and the Connection to inputs/outputs


Sampling Regularity in the single-loop code
I/O Timing and Protocol/Scheduling Problems
Fault-Tolerance, Multiple Sensors
Summary of I/O Aspects and General On-Board Organizations

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I/O I/O

Example Program - arduino.cc/en/Tutorial/Button Example Program - arduino.cc/en/Tutorial/Button


const int buttonPin = 2; void loop(){
// the number of the pushbutton pin // read the state of the pushbutton value:
const int ledPin = 13; buttonState = digitalRead(buttonPin);
// the number of the LED pin // check if the pushbutton is pressed.
// if it is, the buttonState is HIGH:
int buttonState = 0; if (buttonState == HIGH) {
// variable for reading the pushbutton status // turn LED on:
digitalWrite(ledPin, HIGH);
void setup() { } else {
pinMode(ledPin, OUTPUT); // turn LED off:
pinMode(buttonPin, INPUT); digitalWrite(ledPin, LOW);
} }
}
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I/O I/O

The DS18B20 Temperature Sensor and the OneWire Protocol Example: Typical Use of the DS18B20 Temperature Sensor
http://playground.arduino.cc/Learning/OneWire
#include <OneWire.h> // One Wire protocol
OneWire ds(DS18B20_pin);

“On a 1-Wire network, a single // Start the temperature measurement


”master” device communicates with one ds.reset();ds.skip();ds.write(0x44, 1);
or more 1-Wire ”slave” devices over a
single data line, which can also be used // Wait until the measure is available
to provide power to the slave devices”. delay(750); // 750 ms

// Retrieve the value


ds.reset();ds.skip();ds.write(0xBE);
temperature = (ds.read() + (ds.read() << 8)) * 0.0625;

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I/O I/O

Dealing with a Temperature Input (1) Dealing with a Temperature Input (2)

Where read temperature is:


start the measurement; wait long start measurement and get value
init m;
init m; enough; get the value. should not be executed in the
while (1) {
while (1) { same pass in the loop.
if (...) start measurement
read temperature; There’s a hidden (significant) 750 if (...) get value
read something else; ms delay in the read temperature read something else; Make sure (e.g., with a counter)
compute o and update m; operation. It means the compute o and update m; that they are separated by at least
write o; “something else” cannot be write o; 750ms (i.e., a sufficient number of
} sampled more often than each } passes in the loop).
750ms.

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I/O I/O

Redundancy of Sensors: 4 Gyroscopes for one 3-value Input

2 Reactive Systems and the Connection to inputs/outputs


Sampling Regularity in the single-loop code
I/O Timing and Protocol/Scheduling Problems
Fault-Tolerance, Multiple Sensors Roll
Fault−
Summary of I/O Aspects and General On-Board Organizations tolerant
Pitch system
(hard or soft) 3 "secure"
Yaw values

4 x 3 Faulty
physical connections
4 identical physical devices
each of them made of 2 wires
(4 x 3 values, deg/s) −−> 4 x 3 x 2 inputs

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I/O I/O

Internal Structure of the Voter (roll value) Several Sensors for One Combined Input
Implements f (xa1 , xb1 , xa2 , xb2 , xa3 , xb3 , xa4 , xb4 ),
depending on the number of faults. Airbus Helicopters Example
Accelerometers
First, each “channel computes: if xak = xbk then xak else ERROR Phase sensor
if three failures happened (together) “recently” then main
take a safe value rotor rm , rt :
rotation speed w.r.t.
else if the 4 channels are ok then main or tail rotor
take the olympic average of the 4 values
tail rotor
else if 3 channels only are ok then
take the median value of the three relevant values rm = 2 rt = 4
else if 2 channels only are ok then
and
take the average of the two relevant values sampling freq.

(Ask for more details if interested)


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I/O I/O

Several Sensors for One Combined Input

Sample the main rotor phase sensor and the accelerometers at the same frequency 2 Reactive Systems and the Connection to inputs/outputs
Sampling Regularity in the single-loop code
Gather samples from the accelerometer on an object that rotates rm times faster I/O Timing and Protocol/Scheduling Problems
than the main rotor Fault-Tolerance, Multiple Sensors
Compute various indicators on the set of samples that corresponds to one Summary of I/O Aspects and General On-Board Organizations
revolution of the monitored object.

+ the acquisition card fills a buffer of tuples (phase, accel), which is then sent to the
computer in packets of sufficient size for the bus.

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I/O I/O

Summary of I/O Aspects Decoupling I/O Management and Computation via Buffers
used in quizz slide 49.
Ensuring sampling regularity if done in the “functional” code: ok for simple Inputs Outputs
programs on a microcontroller directly connected to the I/O; otherwise need to from sensors to actuators
reactive real-time system
decouple. i0
i1 o0
Some inputs come from equipments for which a “protocol” has to be respected
ADC

DAC

i2 o1
(e.g., the temperature sensor on the Arduino); imposes scheduling problems in the
i3 o2
functional code.
In complex systems, several sensors need to be sampled synchronously (Airbus H SW
SW
example), and there is an acquisition card that fills a buffer HW
Fault tolerance implies the use of several sensors, the voting principle being done
before providing a clean input to the functional code The input acquisition card ensures sampling regularity; buffers increase the end-2-end latency;
constraint for the computer: compute fast enough.

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Logical vs Physical Time Logical vs Physical Time

Synchronous Circuits
Difference between the discrete-time idea represented by timing diagrams, and the actual
1 “Real-Time” and the 3 Categories of Computer Systems
physical time involved by propagation in electronic circuits (from inputs to outputs).

2 Reactive Systems and the Connection to inputs/outputs

3 Logical vs Physical Time

4 Logical Concurrency vs Implementation Parallelism

By Inductiveload - Own work, Public Domain, https://commons.wikimedia.org/w/index.php?curid=5742275

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Logical vs Physical Time Logical vs Physical Time

Synchronous Languages: Exact Same Idea The Family of Synchronous Languages

— One execution of the loop body


corresponds to the propagation
time from inputs to outputs in a Principes, idées et styles pour la
init m; circuit (WCET of the code, programmation réactive. Gérard Berry,
while (1) { physical time); Collège de France, février 2018
read i; — The succession of passes in the
compute o and update m;
loop corresponds to the timing
write o;
diagrams and allows to reason on
}
the sequential behavior of the
program/circuit (logical time). https://www.college-de-france.fr/fr/personne/gerard-berry
https://www.college-de-france.fr/fr/agenda/seminaire/

penser-modeliser-et-maitriser-le-calcul-informatique/parallelisme-flot-de-donnees-le-langage-synchrone-lustre

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Logical Concurrency vs Implementation Parallelism Logical Concurrency vs Implementation Parallelism

Logical Concurrency vs Implementation Parallelism


1 “Real-Time” and the 3 Categories of Computer Systems
Logical Concurrency
2 Reactive Systems and the Connection to inputs/outputs "independent" sub−problems

3 Logical vs Physical Time A compilation process

4 Logical Concurrency vs Implementation Parallelism Implementation Parallelism


Threads, processes, OS, RTOS

Circuits, multi−core, networks, ...

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Logical Concurrency vs Implementation Parallelism Logical Concurrency vs Implementation Parallelism

Examples of Logical Concurrency: Logical Concurrency vs Implementation Parallelism


A Mathematical Function

There’s no reason why one element of the design (logical concurrency) should be
In the computation of the formula: mapped onto exactly one element of the implementation.
i.e., exactly one subproblem per computer/core/thread.
(x 2 + (a + 2b + c 4 ))
x3 + z3
Think in terms of Logical Concurrency, rely on compilers and other automatic tools to
what are the “independent” parts? (things that can be done by two persons, get one or several parallel implementations.
independently, before their results are merged)?

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Logical Concurrency vs Implementation Parallelism Logical Concurrency vs Implementation Parallelism

From Logical Concurrency to Implementation Parallelism From Logical Concurrency to Implementation Parallelism

Logical Concurrency

one-to-one: usually because we think in terms of the available parallelism, and


reflect it in the structure of the solution to our problem.
one-to-many: (automatic) parallelisation
many-to-one: static scheduling

Implementation Parallelism

one-to-one, or one-to-many, or many-to-one.


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Logical Concurrency vs Implementation Parallelism Logical Concurrency vs Implementation Parallelism

Quizz 2 Contents of the Course


Logical Time = reasoning in terms of sequences indexed by N
Explicit automata (Mealy or Moore), products
1 If a system is implemented as shown on Slide 38, can you have an impact of an Dataflow programs (Lustre/SCADE, Simulink, ...)
input sample on the output samples in 1 second if the ADC and DAC each take Mathematical Reference Semantics
1/3 second per conversion? Physical Time
2 Consider a machine with 2 buttons Ai, Bi and two lamps Ao, Bo. It switches lamp The Worst-Case-Execution-Time (WCET) evaluation problem
Ao when Ai is pressed; same for Bo, Bi. Are the these two behaviors logically Real-time scheduling and mapping to periodic tasks
concurrent? Introduction to Real-Time OSes (ISETR, S. Mancini): real-time notions, scheduling
3 Same Question as above, but Bi switches Bo only when Ao is on. policies, a new look at operating systems, examples
Reconciling logical and physical times
Actual execution times vs WCET
Ensuring that the execution guarantees the reference semantics

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Outline

Part II 5 2 Independent Tasks, Same Frequencies

A Very Simple Hard Real-Time System 6 2 Independent Tasks, Frequencies: 1, 2

and Its Scheduling Possibilities 7 Data Dependencies between Tasks - Same Frequencies

8 Data Dependencies between Tasks - Frequencies 1 and 2

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2 Independent Tasks, Same Frequencies 2 Independent Tasks, Same Frequencies

Specification
5 2 Independent Tasks, Same Frequencies

6 2 Independent Tasks, Frequencies: 1, 2 ai ao


A
Sampling frequency for ai, bi = 1 second;
7 Data Dependencies between Tasks - Same Frequencies refreshment frequency for ao, bo = 1 second.
Let’s focus on inputs.
bi bo
8 Data Dependencies between Tasks - Frequencies 1 and 2 B

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2 Independent Tasks, Same Frequencies 2 Independent Tasks, Same Frequencies

Single-loop codes for A alone, or B alone Single-loop code for A (similar for B)
(See FreeRTOS solution for regular input sampling, slide 22).
Timing Diagrams
#define A_PERIOD ... #define B_PERIOD ... ai0 ai1 ai2 ai3
TickType_t tLast; TickType_t tLast;
initA(); initB();
time
tLast = xTaskGetTickCount(); tLast = xTaskGetTickCount(); A A A A
while (1) { while (1) {
read (ai); read (bi); ao0 ao1 ao2 ao3
ao = A (ai); bo = B (bi);
write (ao); write (bo); A PERIOD
vTaskDelayUntil vTaskDelayUntil
(&tLast, A_PERIOD); (&tLast, B_PERIOD);
} }
Constraint (if A alone on a single-core): WCET(A)+δ R+δ W < A PERIOD = 1s
— How to choose A PERIOD, B PERIOD? where δ R (resp. δ W ) is the (assumed constant) execution time of the Read (resp.
— Constraint on WCET(A), WCET(B) (if A, B executed alone)? Write).

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2 Independent Tasks, Same Frequencies 2 Independent Tasks, Same Frequencies

Scheduling A and B on the same core Scheduling A and B on the same core - Timing
ai0,bi0 ai1,bi1 ai2,bi2
#define A_PERIOD ...
time
#define B_PERIOD A_PERIOD A B A B A B
TickType_t tLast;
initA(); initB(); ao0,bo0 ao1,bo1 ao2,bo2
tLast = xTaskGetTickCount();
while (1) { A PERIOD
read (ai); read (bi);
ao = A(ai); bo = B (bi); B PERIOD
write(ao); write (bo);
vTaskDelayUntil
(&tLast, B_PERIOD); WCET(A)+WCET(B)+2 × δ R + 2 × δ W < A PERIOD = B PERIOD
}

Sometimes you know by studying the functionality that A and B don’t produce their
worst-case in the same pass in the loop... can help relax the constraint

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2 Independent Tasks, Frequencies: 1, 2 2 Independent Tasks, Frequencies: 1, 2

Specification
5 2 Independent Tasks, Same Frequencies

6 2 Independent Tasks, Frequencies: 1, 2 ai ao


A
Sampling and refresh rate frequency
7 Data Dependencies between Tasks - Same Frequencies for ai, ao = 1 second;
for bi, bo = 2 seconds.
bi bo
8 Data Dependencies between Tasks - Frequencies 1 and 2 B

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2 Independent Tasks, Frequencies: 1, 2 2 Independent Tasks, Frequencies: 1, 2

Single-loop codes for A alone or B alone Scheduling A and B on the same core - Solution (a)
#define A_PERIOD 1s
TickType_t tLast;
(See FreeRTOS solution for regular sampling, slide 22). initA(); initB();
half = 1;
#define A_PERIOD 1s #define B_PERIOD 2s tLast = xTaskGetTickCount();
TickType_t tLast; TickType_t tLast; while (1) {
initA(); initB(); read (ai); if (half) read (bi);
tLast = xTaskGetTickCount(); tLast = xTaskGetTickCount(); ao = A(ai); if (half) bo = B (bi);
while (1) { while (1) { write(ao); if (half) write (bo);
read (ai); read (bi); half = !half;
ao = A (ai); bo = B (bi); vTaskDelayUntil
write (ao); write (bo); (&tLast, A_PERIOD);
vTaskDelayUntil vTaskDelayUntil }
(&tLast, A_PERIOD); (&tLast, B_PERIOD);
} }
WCET(A)+WCET(B)+2 × δ R + 2 × δ W < A PERIOD
In each A period, we execute A alone, or A and B.

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2 Independent Tasks, Frequencies: 1, 2 2 Independent Tasks, Frequencies: 1, 2

Scheduling A and B on the same core - Solution (b) Scheduling A and B on the same core - Solution (c)
Requires that the B function be split into two “equal timing” parts B first, B second.
#define A_PERIOD 1s
TickType_t tLast; Use dynamic scheduling to ensure proper splitting of B.
initA(); initB();
int half = 1;
tLast = xTaskGetTickCount(); See course on real-time operating systems for general methods.
while (1) { And later in this course, specific methods.
read (ai); if (half) read (bi);
ao = A(ai); if (half) B_first (bi); else bo=B_second();
write(ao); if (!half) write (bo);
half = !half;
vTaskDelayUntil But keep in mind that these manual splitting methods are still in use, in order to avoid
(&tLast, A_PERIOD);
} uncertainties due to the use of a dynamic scheduler.

WCET(A) +1/2× WCET(B)+2 × δ R + 2 × δ W < A PERIOD


In each A period, we execute A and “half” of B.
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Data Dependencies between Tasks - Same Frequencies Data Dependencies between Tasks - Same Frequencies

The Simple Avionics Example (but forget about frequencies)

5 2 Independent Tasks, Same Frequencies

6 2 Independent Tasks, Frequencies: 1, 2

7 Data Dependencies between Tasks - Same Frequencies

8 Data Dependencies between Tasks - Frequencies 1 and 2

Each “box” = while (1) { read i;compute o; write o;}


From a case-study published by ONERA, and Claire Pagetti HDR manuscript.

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Data Dependencies between Tasks - Same Frequencies Data Dependencies between Tasks - Frequencies 1 and 2

Dataflow Diagram and Scheduling


Scheduling all the “boxes” means finding a way to execute each of them repeatedly so that:
5 2 Independent Tasks, Same Frequencies
the inputs are consumed sufficiently fast, and the outputs are produced sufficiently fast
(respecting end-2-end delays)
6 2 Independent Tasks, Frequencies: 1, 2
the data dependencies are respected: e.g., the boxes AC, FP, LP, LA are executed in this
order for one acceleration input sample.
7 Data Dependencies between Tasks - Same Frequencies
From a high-level dataflow view of the problem (previous slide):
8 Data Dependencies between Tasks - Frequencies 1 and 2
“Manual” splitting and scheduling is still used sometimes

Implementation with tasks on top of a real-time operating system

High-level programming languages allow to reason on the functionality and logical timing
of the problem independently of the actual execution time on a particular architecture.

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Data Dependencies between Tasks - Frequencies 1 and 2

What does it mean to exchange information between 2 tasks,


when one is twice as fast as the other?

— First case: A produces twice as many


samples than B is able to consume
— Second case: A produces half of the
samples B needs

Communication-by-sampling means:
— In the first case, drop one sample out of two
— In the second case, use the same sample twice

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