Assignment - 2

Digital Systems (EE 208)

17th April 2023
Submission Deadline: 24th April 2023 (11:00 AM)

1. Design an odd sequence counter that produces the count sequence 1,7,3,5,2,6....

2. Design a synchronous counter that produces the count sequence 0,2,4,3,6,7,0.......

a) Prepare state diagram
b) Prepare state table
c) K-map equation
d) Circuit diagram

3. What down you mean by down counter?

a) Design a mod-7 down counter
b) Design a mod-13 down counter

4. Using a 4-bit shift register, construct a 4-bit register that can rotate its content one position to the left or
right.

5. Design a 4-bit ring counter using J-K flip-flops. Explain its operation along with possible states.

6. Draw a 3-bit Johnson counter circuit using J-K flip-flops. The input to the circuit is a pulse train of square
wave shape. Clearly show the circuit connections and the output waveforms