IQAC-CP-V2

MALLA REDDY ENGINEERING COLLEGE

DEPARTMENT OF COMPUTER SCIENCE AND ENGINEERING(EMERGING)-
INTERNET OF THINGS

COURSEPLAN

(This document is to be presented to the students within one week of commencement of classes and a soft copy
should be provided to every student of the class by the Class In charge)

1. GENERAL COURSE INFORMATION

a. Programme /Branch(or : B.Tech, CSE-Emerging-IOT
Specialization)
b. Class : II Year, I Semester
c. Academic Year : 2023-24
d. Course Title (Code) : Computer Organization and Architecture – C0508
e. Course Type &category : Theory, Professional Core Course
f. Credits&Contact Hours : 3 Credits, 45 Hrs. (Up to 3 Hrs. per Week)
g. Regulation : MR22
h. Course Staff : Mrs.N.Nitheesha, Assitant Professor ,
e-mail: nnitheesha@mrec.ac.in
Department of CSE-IOT,
i. Pre-requisites and Assumed : The pre-requisite of this course is to understand “Digital
Knowledge Electronics”.

2. COURSE OVERVIEW
This course primarily deals with the principals of computer organization and the basic concepts of computer
architecture. It is important to understand the basic organization of a digital computer along with it’s design
and programming. It is also important to understand the data transfer and how various computer operations
are performed on the binary information.

3. COURSE OBJECTIVE
The purpose of the course is to introduce principles of computer organization and the basic
architectural concepts.
● It begins with basic organization, design, and programming of a simple digital computer and
introduces simple register transfer language to specify various computer operations.
● Topics include computer arithmetic, instruction set design, micro programmed control unit,
pipelining and vector processing, memory organization and I/O systems, and multiprocessors

4. COURSE OUTCOMES
At the end of the course, students will be able to:

CO1 Understand the basics of instruction sets and their impact on Understand K2
processor design.
CO2 Demonstrate an understanding of the design of the Evaluate K5
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functional units of a digital computer system.

CO3 Evaluate cost performance and design trade-offs in Apply K5
designing and constructing a computer processor including
memory.
CO4 Design a pipeline for consistent execution of instructions Analyze K4
with minimum hazards.
CO5 Recognize and manipulate representations of numbers Understand K4
stored in digital computers
5. CO-PO MAPPING
(3/2/1 indicates strength of correlation)
3-Strong, 2-Medium, 1-Weak

Program Outcomes (Pos) PSOs

COs 1 2 3 4 5 6 7 8 9 10 11 12 1 2 3

1
3 - - - 1 1 2 - - - - 1 3 1 -
2
3 1 - - 1 1 2 - - - - 1 3 1 -
3
3 2 - - 2 1 2 - - - - 1 3 1 -
4
3 3 - - 1 1 - - - - - - 3 1 -
5
3 2 - 1 - - - - - - - 3 1 -

6.LEARNING RESOURCES
a. Recommended Resources (Books)
T1- Computer System Architecture- M.Morris Mano, Third Edition, Pearson/PHI
R1- Computer Organization-Carl Hamacher, Zvonks Vranesic, SafeaZaky, Fifth Edition
R2- Structured Computer Organization- Andrew S.Tanenbaum, Fourth Edition, PHI/Pearson.

b. On-line Resources

SN MREC YouTube Link / Other Web Links Content/ Topics

a) https://www.youtube.com/watch?v=kTdvOlA2ko0  Register Transfer

https://www.youtube.com/watch?v=VdqlNp69FrE Language,
Microoperations
https://www.youtube.com/watch?v=PUyCDZTK5V4
 Bus and Memory transfer
https://www.youtube.com/watch?v=qx2vDKnVzQk
 Tri-state buffer
https://www.youtube.com/watch?v=Rfa0QHhzfRw
Instruction codes
b) https://www.youtube.com/watch?v=eC6pWLNPSQ4  Control memory
https://www.youtube.com/watch?v=nxNytEYQLKI  Address Sequencing
https://www.youtube.com/watch?v=3UWhMaZcJfY  Micro program example
https://www.youtube.com/watch?v=icFfxkg1p4o  Instruction formats
https://www.youtube.com/watch?v=pQuRoq6xAK8  Adressing modes
c) https://www.youtube.com/watch?v=ppjq09OvNnc  Fixed point
https://www.youtube.com/watch?v=uf8-kq-Cle8 representation
 Floating point
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representation

d) https://www.youtube.com/watch?v=b9frb09L2kU  Input-output interface

https://www.youtube.com/watch?v=P6Q5QZAZ8yc  Asynchronous data
https://www.youtube.com/watch?v=bBu0UXp3X9k transfer
 Auxiliary memory
e) https://www.youtube.com/watch?v=fYH0shWAUog  CISC ,RISC
https://www.youtube.com/watch?v=zF23S5PcUT8  Pipelining
https://www.youtube.com/watch?v=X6bPGjDJ5is  Vector processing

7. TEACHING LEARNING STRATEGIES AND DELIVERY METHODS

TLP Teaching Delivery Methods

No. Learning Definition / What students do (DM)
Process (TLP)
PARTICIPATIVE LEARNING
1 Lecture Instructor presents the material and students answer  Chalk &
questions that arise in. Talk(C&T)
Activities:Demonstration, modeling, presentation,  Presentation
slideshow, note-taking
2 Interactive Instructor shall make the lecture into parts by
Lecture incorporating 5–10-minute break for student activities
at every 15 minutes
Activities:MCQs, Problem solving and compare and
contrast discussion, elicit the information from the
students
3 Tutorial / ACT The tutorial questions are given to the students by the
Hr. teacher in advance. The students can use the class
notes and books as reference for solving the given
questions either as an individual or in group.
4 Guest Lecture An expert from industry or academia shall be invited to
(Optional) give a guest lecture on advance topics.
5 Seminar Seminar presentations are given from any prerequisite
course or fundamental/simple topics by the students.
(Restricted to 2 seminars per semester)
6 Group After the completion of a complex topic, few students
Discussion will be called for a brain storming session
7 Quiz After the completion of 2 and 1/2 modules, a Quiz
shall be conducted by making the students into group
of four.
EXPERIENTIAL LEARNING
8  Laboratory Students are exposed to the application of their
Session learning process through observation, reflection and
hands on experience.
 Industrial
Visits
 Centre of
Excellence
COLLABORATIVE LEARNING
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9 Project/Mini Students will be assigned to a feasible project to test

Project based their application of course knowledge to produce a
learning visible product and make it available on record. It may
often be paired with cooperative learning
10 Fieldwork / Students learn how to conduct research and develop a
Internships vision on professional arena in the respective industry

8. ASSESSMENT OF THEORY COURSE

Scaled
Assessment Method Marks Distribution Total
to
Mid Exam-I
Objective 20
30 The final CIE
Subjective 25 50 Marks will be
Continuous Internal Assignment 05 Average of Mid-
Evaluation(CIE) Mid Exam- II I and Mid-II
Objective 20
30
Subjective 25 50
30
Assignment 05
Subjective
Semester End
questions 70 - 70
Examination(SEE)
5 x 14
Total Mark 100

9. DETAILED COURSE PLAN

TLP : Teaching Learning Process , DM : Delivery Method

Date of
Relevant Highest
Description of Portion to TL Learning completion
Hour CO Cognitive DM
be Covered P Resources Proposed Actual
Nos Level (Ki) date Date
MODULE-I Digital Computers,
Introduction to subject:
Digital computers, Block
1 CO1 K2 1 C&T T1, CN*
diagram of Digital
Computer
Definition of Computer T1,CN*
2
Organization, Computer CO1 K2 C&T
1
Design and Computer
Architecture
Register Transfer C&T T1
Language and Micro
3
operations: CO1 K2 1
Register Transfer
language, Register
Transfer
Bus and memory C&T T1
4 CO1 K2 1
transfers
Arithmetic Micro C&T T1
5 CO1 K2 1
operations
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logic micro operations, C&T T1

6 CO1 K2 1
shift micro operations
Arithmetic logic shift C&T T1
7 CO1 K2 1
unit
Basic Computer T1
Organization and
Design: Instruction
8 CO1 K2 6 C&T
codes, Computer
Registers Computer
instructions,
Timing and Control, T1
9 C&T
Instruction cycle
Memory Reference T1
Instructions, Input –
10 C&T
Output and Interrupt.

MODULE-II Micro Programmed Control

11 Control memory CO2 K2 1 C&T T1, T2
12 Address sequencing CO2 K2 1 C&T T1, T2
micro program example,
13 CO2 K2 2,3 C&T T1, T2
design of control unit
Central Processing Unit:
14 General Register CO2 K5 2,3 C&T T1, T2
Organization
15 Instruction Formats, CO2 K5 2 C&T T1, T2
16 Addressing modes CO2 K5 1 C&T T1, T2
Data Transfer and C&T
17 CO2 K3 1 T1, T2
Manipulation
18 Program Control. CO2 K3 1 C&T T1, T2
MODULE – III Data Representation
Data types, C&T
19 CO3 K2 1 T2, R3
Complements
Fixed Point C&T
20 CO3 K2 1 T2, R3
Representation
Floating Point
21 CO3 K2 1 C&T T2, R3
Representation
Computer Arithmetic:
22 CO3 K2 1 C&T T2, R3
Addition and subtraction
multiplication C&T
23 Algorithms ,Division CO3 K2 6 T2, R3
Algorithms
Floating – point C&T
24 CO3 K5 8 T2, R3
Arithmetic operations
25 Decimal Arithmetic unit CO3 K5 1 C&T T2, R3
26 Decimal Arithmetic CO3 K3 5 C&T T2, R3
operations.
MODULE – IV Input-Output Organization
27 Input-Output Interface, CO4 K2 1 C&T T2, R3
28 Asynchronous data CO4 K5 1 C&T T2, R3
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transfer
29 Modes of Transfer CO4 K5 1 C&T T2, R3
Priority Interrupt Direct
30 CO4 K5 2 C&T T2, R3
memory Access
Memory Organization:
31 CO4 K5 2 C&T T2, R3
Memory Hierarchy,
32 Main Memory CO4 K5 2 C&T T2, R3
33 Auxiliary memory CO4 2,3 C&T -
34 Associate Memory CO4 K2 1 C&T T2, R3
35 Cache Memory CO4 K2 2 C&T T2, R3
MODULE – V Reduced Instruction Set Computer
36 CISC Characteristics CO5 K2 1 C&T T2, CN*
37 RISC Characteristics CO5 K2 1 C&T T2, CN*
Pipeline and Vector CO5 K3 C&T T2, CN*
38 Processing: Parallel 1
Processing
39 Pipelining CO5 K3 1 C&T T2, CN*
40 Arithmetic Pipeline CO5 K2 1 C&T T2, CN*
41 Instruction Pipeline CO5 K4 8 C&T T2, CN*
42 RISC Pipeline CO5 K2 1 C&T T2, CN*
43 Vector Processing CO5 K3 1 C&T T2, CN*
44 Array Processor CO5 K2 1 C&T T2, CN*
Multi Processors: C&T
45 Characteristics of
Multiprocessors,
Interconnection C&T
46
Structures,
Interprocessor C&T
47
arbitration
Interprocessor C&T
48 communication and
synchronization
49 Cache Coherence C&T
* CN- Class Notes
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10. ASSIGNMENTS

Assignment No. 1

Bloom’s
Q.No Question Taxonomy CO
Level
1. List out Micro operations and Explain any two micro operations with Understand 1
example.
2. Explain common bus system with 4X1 Multiplexers Analyze 1

3. Explain the design of control unit Analyze 2

4. Explain instruction codes and addressing modes Evaluate 2
5. Briefly explain fixed point representation and floating point Understand 3
representation

Assignment No. 2

Bloom’s
Q.No Question Taxonomy CO
Level
Explain Decimal Arithmetic unit and Decimal Arithmetic
1. Analyze 3
operations.

2. Explain how Asynchronous data transfer is been performed. Evaluate 4

3. List out different memories and explain briefly the memory Evaluate 4
organization
4. Differentiate between CISC and RISC Understand 5

5. Explain briefly about Interprocessor communication and Understand 5

synchronization

FACULTY COURSE PLAN HOD

COORDINATOR
IQAC-CP-V2