COA F (1) - Merged

List of Experiments:
S.
Experiment Name Batch A
No.
1. Case study of Desktop Computers (co1) 01/08/23
2. Study of Multiplexer and Demultiplexer (co1) 11/08/23
3. Study of Half Adder and Subtractor. (CO2) 18/08/23
4. Study of Full Adder and Subtractor .(co2) 18/08/23
5. Write Program to demonstrate Flags in microprocessor 8085. 08/09/23

(co1)
6. Write a program to add the contents of memory locations 4000H 22/09/23
and 4001H and place the result in memory location 4002H.
(co3))
7. Write a program to multiply two 8-bit numbers stored in 22/09/23

memory locations 2200H and 2201H by repetitive addition and
store the result in memory locations 2300H and 2301H. (co3)
8. Program for simulate memory allocation strategies(First fit, Best 06/10/23

fit, Worst fit) (CO-4)
9. Programs for page replacement algorithms (CO-4) 06/10/23
10. Case study of RISC And CISC. (co5) 13/10/23
Experiments Beyond Lab Manual:
S. No. Experiment Name Batch A
1. Program for Cyclic Redundancy Check 13/10/23
2. Program for error checking method using Vertical 13/10/23

Redundancy Check
s
Experiment No. 5
Write Program to demonstrate Flags in microprocessor 8085.
The Flag register is a Special Purpose Register and is completely different from the other registers in a
microprocessor. It consists of 8 bits and only 5 of them are useful in 8085. The other 3 are left vacant and are in
the future Intel versions. Therefore, 8085 has five flags - Sign flag, Zero flag, Auxillary carry flag, Parity flag
and the Carry flag.
D7 D6 D5 D4 D3 D2 D1 D0
S Z AC P CY
1. The carry flag(CF):-
This flag is set whenever there has been a carry out of, or a borrow into, the higher order bit of the result. 1-carry
out from MSB bit on addition or borrow into MSB bit on subtraction
0- no carry out or borrow into MSB bit Example:-
MVI A, 0AAH MVI B, 70H ADD B
AA i.e. 170
Binary representation of 170 in 8 bits = 1010 1010
Binary representation of 70 H in 8 bits = 0111 0000
Addition = 1 0001 1010
Here carry is generated so flag carry is set to 1.
0001 1010 = 1A in hexadecimal, so accumulator contains value 1A after addition
2. The auxiliary carry flag(AF):-
This flag is set whenever there has been a carry out of the lower nibble into the higher nibble or a borrow from
higher nibble into the lower nibble of an 8 bit quantity, else AF is reset. This flag is used by decimal arithmetic
instructions. Carry out from bit 3 on addition or borrow into bit 3 on subtraction 0 otherwise
Example-
MVI A, 0AH MVI B, 09H ADD B
Binary value of 0A = 0000 1010 Binary value of 09 = 0000 1001

By addition = 0001 0011
Carry is generated from third to forth bit , so auxiliary carry flag is set to 1.
0001 0011 is equal to 19 and in hexadecimal 19 is represented by 13 so 13 is stored in accumulator after
addition.
3. The zero flag(ZF):-
This flag is set, when the result of operation is zero, else it is reset. 1-zero result
0- non-zero result Example:-
MVI A, 04H MVI B, 04H SUB B
Obviously , result is zero, so the zero flag is set and result 0 is stored in accumulator after subtraction.
4. The parity flag(PF):-
This flag is set whenever the result has even parity, an even number of 1 bits. If parity is odd, PF is cleared.
1- low byte has even number of 1 bits 0-low byte has odd parity.
Example:- MVI A, 04HMVI B, 05H ADD B
The result of addition is 09 whci is 0000 1001
The number of one in result is even so the parity bit is set to 1.
5. The sign flag(SF):-
This flag is set, when MSB (Most Significant Bit) of the result is 1. Since negative binary numbers are
represented in the 8085 CPU in standard two’s complement notation, SF indicates sign of the result.
1-MSB is 1 (negative) 0-MSB is 0 (positive) Example:-
MVI A,05H MVI B,07H SUB B
Here the result is 07-05= -2.

For subtraction we have to determine the 2’s complement of 07. 05= 00000101
07=00000111
2’s complement of 07 = 11111001
Then we have to add 00000101 and 11111001
Result of addition = 11111110 and no carry is generated.
• The rules for interpretation of result:-
• 2’s complement of subtrahend is found and is added to minuend for finding the subtraction
• If carryover of the sum is 1,it is dropped and answer is positive.
• If there is no carryover the 2’s complement of the sum will be the result and it is negative.
Here, no carryover occurs, so the result is negative and it is in the 2’s complement.
So the sign bit is set to 1.

And answer 11111110 is stored in register A.
The hexadecimal of 11111110 is EF, so it is stored in register A.
IPS ACADEMY, INSTITUTE OF ENGINEERING AND SCIENCE- INDORE
Viva Questions:-
Q1. How many flag bits does microprocessor 8085 use? (BT-1/CO-2)
Ans. Microprocessor 8085 consists of 8 bits of flag but only 5 of them are useful in 8085. Therefore, 8085 has
five flags-Sign flag, Zero flag, Auxiliary carry flag, Parity flag and the Carry flag.
Q2. What do you mean by parity flag? (BT-1/CO-2)
Ans. Parity flag is set whenever the result has even parity, an even number of 1 bits. If parity is odd, PF is
cleared.
--3rd SEM COMPUTER ORGANIZATION & ARCHITECTURE 2023-24

Experiment No. 6
Write a program to add the contents of memory locations 4000H and 4001H and place the
result in memory location 4002H
Program:
LXI H, 4000H ; Load HL with 4000H
MOV A, M ; Copy the operand from memory (H-L pair) into accumulator
INX H ; Increment memory address by 1 (HL points 4001H)
ADD M ; Add accumulator with second operand, result stored in accumulator
INX H ; Increment memory address by 1 (HL points 4002H)
MOV M, A ; Store result at 4002H
HLT ; Terminate program execution
Sample Example:
(4000H) = 23H
(4001H) = 69H
Result = 23H + 69H = 8CH

Viva Questions:-
Q1. Give the name of some instruction which are used to access memory in 8085?(BT1/CO-4)
Ans. LDA, STA, INR etc.
Q2. How many memory locations are provided by GNUSIM 8085 for the user?(BT1/CO-4)
Ans. 0 to 65535 (0h to FFFFh).

Experiment No. 7
Write a program to multiply two 8-bit numbers stored in memory locations 2200H and
2201H by repetitive addition and store the result in memory locations 2300H and 2301H.
Sample problem:
(2200H) = 03H
(2201H) = B2H
Result = B2H + B2H + B2H = 216H
(2300H) = 6H (2301H) = 02H
Source program
LDA 2200H
MOV E, A
MVI D, 00 : Get the first number in DE register pair
LDA 2201H
MOV C, A : Initialize counter
LX I H, 0000 H : Result = 0
BACK: DAD D : Result = result + first number
DCR C : Decrement count
JNZ BACK : If count 0 repeat
SHLD 2300H : Store result
HLT : Terminate program execution

Viva Questions:-
Q1. Give the name of some instruction which are used to access memory in 8085? (BT1/CO-4)
Ans. LDA, STA, INR etc.
Q2. How many memory locations are provided by GNUSIM 8085 for the user? (BT1/CO-4)
Ans. 0 to 65535 (0h to FFFFh).

Experiment No. 8
Program for simulate memory allocation strategies(First fit, Best fit, Worst fit)
#include<iostream.h>
#include<conio.h>
void first();
void best();
void worst();
void main()
{
int choice;
clrscr();
do
{
clrscr();
cout<<"\nThis is the program for performing different menory allocation strategies:"<<endl;
cout<<"1. First fit \n2. Best fit\n3. Worst fit"<<endl;
cout<<"Press 0 to exit:-)"<<endl;
cout<<"Please enter your choice:"<<endl;
cin>>choice;
switch(choice)
{
case 1:
first();
break;
case 2:
best();
break;
case 3:
worst();
break;
default:
cout<<"Invalid input: Please try again"<<endl;
}
}
while(choice!=0);
}
void first()
{
clrscr();
int bsize[10], psize[10], bno, pno, flags[10], allocation[10], i, j;
for(i = 0; i < 10; i++)
{
flags[i] = 0;
allocation[i] = -1;
}
cout<<"Enter no. of blocks: ";
cin>>bno;
cout<<"\nEnter size of each block: ";
for(i = 0; i < bno; i++)
cin>>bsize[i];
cout<<"\nEnter no. of processes: ";
cin>>pno;
cout<<"\nEnter size of each process: ";
for(i = 0; i < pno; i++)
cin>>psize[i];
for(i = 0; i < pno; i++) //allocation as per first fit
for(j = 0; j < bno; j++)
if(flags[j] == 0 && bsize[j] >= psize[i])
{ allocation[j] = i;
flags[j] = 1;
break; }
//display allocation details
cout<<"\nBlock no.\tsize\t\tprocess no.\t\tsize";
for(i = 0; i < bno; i++)
{
cout<<"\n"<< i+1<<"\t\t"<<bsize[i]<<"\t\t";
if(flags[i] == 1)
cout<<allocation[i]+1<<"\t\t\t"<<psize[allocation[i]];
else
cout<<"Not allocated";
}
getch();
}
void best()
{
clrscr():
int fragment[20],b[20],p[20],i,j,nb,np,temp,lowest=9999;
static int barray[20],parray[20];
cout<<"\n\t\t\tMemory Management Scheme - Best Fit";
cout<<"\nEnter the number of blocks:";
cin>>nb;
cout<<"Enter the number of processes:";
cin>>np;
cout<<"\nEnter the size of the blocks:-\n";
for(i=1;i<=nb;i++)
{
cout<<"Block no."<<i<<":";
cin>>b[i];
}
cout<<"\nEnter the size of the processes :-\n";
for(i=1;i<=np;i++)
{
cout<<"Process no. "<<i<<":";
cin>>p[i];
}
for(i=1;i<=np;i++)
{
for(j=1;j<=nb;j++)
{
if(barray[j]!=1)
{
temp=b[j]-p[i];
if(temp>=0)
if(lowest>temp)
{
parray[i]=j;
lowest=temp;
}
}
}
fragment[i]=lowest;
barray[parray[i]]=1;
lowest=10000;
}
cout<<"\nProcess_no\tProcess_size\tBlock_no\tBlock_size\tFragment";
for(i=1;i<=np && parray[i]!=0;i++)
cout<<"\n"<<i<<"\t\t"<<p[i]<<"\t\t"<<parray[i]<<"\t\t"<<b[parray[i]]<<"\t\t"<<fragment[i];
getch();
}
void worst()
{
clrscr();
int nBlocks,nProcess,blockSize[20],processSize[20];
cout<<" Enter the number of blocks: "; cin>>nBlocks;
cout<<" Enter the number of processes: "; cin>>nProcess;
cout<<" Enter the size of "<<nBlocks<<" blocks: ";
for(int i=0;i<nBlocks;i++)
cin>>blockSize[i];
cout<<" Enter the size of "<<nProcess<<" processes: ";
for(i=0;i<nProcess;i++)
cin>>processSize[i];
for(i=0;i<nProcess;i++)
{ int max = blockSize[0];
int pos = 0;
for(int j=0;j<nBlocks;j++)
if(max < blockSize[j])
{
max = blockSize[j]; pos = j;
}
if(max >= processSize[i])
{
cout<<"\nProcess "<<i+1<<" is allocated to block "<<pos+1;
blockSize[pos] = blockSize[pos]-processSize[i];
}
else
{
cout<<"\nProcess "<<i+1<<" can't be allocated";
}
}
getch();
}

Output:
First fit

Best fit
Worst fit

Viva questions:-
Q1. How would you list the advantage and disadvantage of First Fit strategy? (BT-3/CO-4)
Ans. Advantage:-
1. Fastest algorithm because it searches as little as possible.
2. Disadvantage
3. The remaining unused memory areas left after allocation become waste if it is too smaller. Thus
request for larger memory requirement cannot be accomplished.
Q2. How would you list the advantage and disadvantage of Best Fit strategy? (BT-3/CO-4)
Ans. Advantage:-
1. Memory utilization is much better than first fit as it searches the smallest free partition first
available.
2. Disadvantage
3. It is slower and may even tend to fill up memory with tiny useless holes.
Q 3. How would you list the advantage and disadvantage of Worst Fit strategy? (BT-3/CO-4)
Ans. Advantage:-
1. Reduces the rate of production of small gaps.
2. Disadvantage
3. If a process requiring larger memory arrives at a later stage then it cannot be accommodated as
the largest hole is already split and occupied.
Q4. How would you explain fragmentation? (BT-3/CO-4)
Ans. Fragmentation occurs in a dynamic memory allocation system when many of the free blocks are too
small to satisfy any request.
External Fragmentation: External Fragmentation happens when a dynamic memory allocation algorithm
allocates some memory and a small piece is left over that cannot be effectively used. If too much external
fragmentation occurs, the amount of usable memory is drastically reduced. Total memory space exists to satisfy
a request, but it is not contiguous.
Internal Fragmentation: Internal fragmentation is the space wasted inside of allocated memory blocks because
of restriction on the allowed sizes of allocated blocks. Allocated memory may be slightly larger than requested
memory; this size difference is memory internal to a partition, but not being used

Experiment No. 9
Program for page replacement algorithms
#include<iostream.h>
#include<conio.h>
void fcfs();
void optimal();
void lru();
int n,page[20],f,fr[20],i;
void main()
{
int choice;
clrscr();
do
{
clrscr();
cout<<"\nThis is the program for performing different page replacement algorithms:"<<endl;
cout<<"1. FCFS \n2. Optimal page replacement\n3. LRU"<<endl;
cout<<"Press 0 to exit:-)"<<endl;
cout<<"Please enter your choice:"<<endl;
cin>>choice;
switch(choice)
{
case 1:
fcfs();
break;
case 2:
optimal();
break;
case 3:
lru();
break;
default:
cout<<"Invalid input: Please try again"<<endl;
}
}
while(choice!=0);
}
int getReplaceposition(int counter[],int n)

{
int max = counter[0];
int pos=0;
for(int i=0;i<n;i++)
{
if(counter[i]>max)
{
pos=i;
max = counter[i];
}
}
return pos;
}
void fcfs()
{
clrscr();
int pages[20],i,frames[10],counter[10];
int nPages,nFrames,pageFault=0;
clrscr();
cout<<"Enter the number of pages(MAX 20): "; cin>>nPages;
cout<<"Enter the number of frames(MAX 10): "; cin>>nFrames;
cout<<"Enter the Page reference string: ";
for(i=0;i<nPages;i++)
{
cin>>pages[i];
}
for(i=0;i<nFrames;i++)
{
frames[i] = 0;
counter[i] = 0; //here 0 referes an empty space in frame
}
for(i=0;i<nPages;i++)
{
int flag =0;
for(int j=0;j<nFrames;j++)
{
if(frames[j] == pages[i])
{
flag=1; //if page is present in frame (flag=1)
break;
}
}
//if page is not present in frame (flag=0)
if(flag == 0)
{
pageFault++;
{
if(frames[j] == 0)
{
frames[j] = pages[i];
flag=1;
counter[j]++;
break;
}
}
}
//if there is no empty frame
if(flag == 0)
{
int pos = getReplaceposition(counter,nFrames);
frames[pos] = pages[i];
counter[pos] = 1;
for(int k=0;k<nFrames;k++)
{
if(k!=pos)
counter[k]++;
}
}
cout<<endl;
for(j=0;j<nFrames;j++)
{
cout<<frames[j]<<" ";
}
}
cout<<"\nPage Fault: "<<pageFault;
getch();
void display()
{
for(i=0;i<f;i++)
{
cout<<fr[i];
}
cout<<"\n";
}
void request()
{
cout<<"enter no.of pages:";
cin>>n;
cout<<"enter no.of frames:";
cin>>f;
cout<<"enter no.of page no.";
for(i=0;i<n;i++)
{
cin>>page[i];
}
for(i=0;i<n;i++)
{
fr[i]=-1;
}
}
void replace()
{
int j,flag=0,pf=0;
int max,lp[10],index,m;
for(j=0;j<f;j++)
{
fr[j]=page[j];
flag=1;
pf++;
display();
}
for(j=f;j<n;j++)
{
flag=0;
for(i=0;i<f;i++)
{
if(fr[i]==page[j])
{
flag=1;
break;
}
}
if(flag==0)
{
for(i=0;i<f;i++)
lp[i]=0;
for(i=0;i<f;i++)
{
for(m=j+1;m<n;m++)
{
if(fr[i]==page[m])
{
lp[i]=m-j;
break;
}
}
}
max=lp[0];
index=0;
for(i=0;i<f;i++)
{
if(lp[i]==0)
{
index=i;
break;
}
else
{
if(max<lp[i])
{
max=lp[i];
index=i;
}
}}
fr[index]=page[j];
pf++;
display();
}
}
cout<<"page faults:"<<pf;
}
void optimal()
{
clrscr();
request();
replace();
getch();
int min(int counter[],int nFrames)

{
int minimum = counter[0];
int pos;
for(int i=0;i<nFrames;i++) { if(minimum > counter[i])
pos = i;
}
return pos;
}
void lru()
{
clrscr();
int pageString[50],n,frames[10],counter[10],recent = 0;
int pageFault = 0,nFrames;
clrscr();
cout<<"Enter the number of pages: "; cin>>n;
cout<<"Enter the page reference string: ";
for(int i=0;i<n;i++) cin>>pageString[i];
cout<<"\nEnter the number of frames: "; cin>>nFrames;
for(i=0;i<nFrames;i++)
{
frames[i] = 0;
counter[i] = 0;//here 0 referes an empty space in frame
}
for(i=0;i<n;i++)
{int flag =0;
{
if(frames[j] == pageString[i])
{flag=1;
counter[j] = recent++;
break;
}
}
if(flag == 0)
{
{if(frames[j] == 0)
{ frames[j] = pageString[i];
counter[j] = recent++;
flag=1;
pageFault++;
break;
}
}
}
if(flag == 0){
int PositionToreplace = min(counter,nFrames);
frames[PositionToreplace] = pageString[i];
counter[PositionToreplace] = recent++;
pageFault++;
}
//print frames
cout<<endl;
for(j=0;j<nFrames;j++)
{
cout<<frames[j]<<" ";
}
}
cout<<"\nPage Fault: "<<pageFault;
getch();

Outputs:
FCFS

Optimal
LRU:

Viva questions:-
Q1. What is page fault? (BT-1/CO-4)
Ans. Page fault occurs when a requested page is mapped in virtual address space but not present in memory.
Q2. What is be-lady's anomaly. (BT-1/CO-4)
Ans. In FCFS page replacement algorithm if we increase the number of frames we expect tat the page fault
would decrease but it is not the case always. As we increase number of frames page fault also increases this
unexpected result is called be-lady's anomaly.
Q3. What is global and local page replacement? (BT-1/CO-4)
Ans. If a process replaces only its own page than it is known as local page replacement and if a process replaces
the pages of itself as well as other processes than it is known as global page replacement

Experiment No. 10
Case study of RISC And CISC
RISC
The Reduced Instruction Set Computer(RISC)
Architecture was discovered by John Cocke in 1974.The new architecture design enabled computers to run much
faster than previously. For his efforts, Cocke received the US National Medal of Technology in1991.
RISC, or Reduced Instruction Set Computer. is a type of micro-processor architecture that utilizes a small,
highly-optimized set of instructions, rather than a more specialized set of instructions which are often found in
other types of architectures
At that time, the complex instruction set computer (CISC) architecture was the norm. The goal of the CISC
design was to complete a task in as few lines of assembly code as possible. Architects would build complex
instructions directly into the hardware
a microprocessor would come with a specific instruction set in which each single instruction executed a series of
operations. In this design, the compiler had to do very little work to translate a high-level language statement
into assembly language.
It was later found that many small, short instructions could compute complex instructions more efficiently. This
led to a design called Reduced Instruction Set Computing (RISC).
Cocke and his team reduced the size of the instruction set, eliminating certain instructions that were rarely used.
"He said that we wanted a computer with a simple architecture and a set of simple instructions that could be
executed in a single machine cycle
making the resulting machine significantly more efficient than possible with other, more complex computer
designs.
With the new design, the CPU was only able to execute a limited set of instructions, but it could execute them
much faster because the instructions were so simple. Each task, such as fetching an instruction, accessing
memory or writing data, could be completed within a single machine cycle, or electronic pulse; with CISC, tasks
often required multiple machine cycles, taking at least twice as long to execute a task.
• RISC architectures represent an important innovation in the area of computer organization.
• The RISC architecture is an attempt to produce more CPU power by simplifying the instruction set of the CPU.
• One of the main concerns of RISC designers was to maximize the efficiency of pipe-lining.
Characteristics Of RISC Architecture

1.The CPU takes less silicon area to implement, and also runs faster.
2. Simple Addressing Modes.
3. Simple Instruction formats.
4. Complex Operations are executed as sequence of simple instructions.
Advantages Of RISC Architecture

1.Less Design Complexity
2.Reducing Design Cost
3.Reducing the time between Designing And Marketing.

Disadvantages Of RISC
1. It usually leads to longer programs,which needs larger memoryspace to store
2. Time Consuming
3. More Memory Access may be needed
CISC
Stands for "Complex Instruction Set Computing."
This is a type of microprocessor design. The CISC architecture contains a large set of computer instructions that
range from very simple to very complex and specialized. CISC are chips that are easy to program and which
make efficient use of memory.
The first PC microprocessors developed were CISC chips, because all the instructions the processor could execute were
built into the chip.
CISC was developed to make compiler development simpler. It shifts most of the burden of generating machine
instructions to then processor. For example, instead of having to make a compiler write long machine
instructions to calculate a square-root, a CISC processor would have a built-in ability to do this.
The three decisions that led to the CISC philosophy are:
Use Microcode
: simple logic to control the data paths between the various elements of the processor. In a micro programmed
system, the main processor has some built-in memory (typically ROM) that contains groups of microcode
instructions which correspond with each machine-language instruction.
Since the microcode memory can be much faster than main memory, an instruction set can be implemented in microcode
without losing much speed over a purely hard-wired implementation.
Build rich instruction sets:
By using a micro programmed design, designers could build more functionality into each instruction.
This design cut down on the total number of instructions required to implement a program, so it made more efficient
use of a slow main memory.
Made the job for assembly-language programmer simpler
Build high-level instruction sets:
After the programmer-friendly instruction sets were built, designers started to build instruction sets which map
directly from high-level languages.
Because micro-program instruction sets can be written to match the constructs of high-level languages, the
compiler does not have to be as complicated.
Allows compilers to emit fewer instructions per line of source
CISC tries to reduce the number of instructions for a program

Advantages of CISC
As each instruction became more capable, fewer instructions could be used to implement a given task. This
made more efficient use of the relatively slow main memory.
Because micro-program instruction sets can be written to match the constructs of high-level languages, the
compiler does not have to be as complicated.
Memory was expensive in the early days of PCs, and CISC chips saved memory because their programming could be fed
directly into the processor.
Micro-programming is as easy as assembly language to implement, and much less expensive than hard wiring a
control unit.
Disadvantages Of CISC
As many instructions as possible could be stored in memory with the least possible wasted space, individual
instructions could be of almost any length this means that different instructions will take different amounts of
clock time to execute, slowing down the overall performance of the machine.
Many specialized instructions aren't used frequently enough to justify their existence --- approximately 20% of
the available instructions are used in atypical program.

Viva Questions:-
Q1. What is main properties of RISC(BT1/CO5)
Ans. 1.The CPU takes less silicon area to implement, and also runs faster.
2. Simple Addressing Modes.
3. Simple Instruction formats.
4. Complex Operations are executed as sequence of simple instructions.
Q2. What is main properties of CISC(BT1/CO5)
Ans. 1.CISC tries to reduce the number of instructions for a program

2.Micro-programming is as easy as assembly language to implement
3.Allows compilers to emit fewer instructions per line of source
4.As each instruction became more capable, fewer instructions could be used to implement a given
task.

Experiment No. 11
Program for Cyclic Redundancy Check
#include<stdio.h> #include<string.h> #define N strlen(g)
char t[28],cs[28],g[]="10001000000100001";
int a,e,c;
void xor(){
for(c = 1;c < N; c++)
cs[c] = (( cs[c] == g[c])?'0':'1');
}
void crc(){ for(e=0;e<N;e++)

cs[e]=t[e]; do{
if(cs[0]=='1')
xor(); for(c=0;c<N-1;c++)
cs[c]=cs[c+1];
cs[c]=t[e++];
}while(e<=a+N-1);
}
int main()
{
printf("\nEnter data : "); scanf("%s",t);
printf("\n "); printf("\nGeneratng polynomial : %s",g); a=strlen(t);
for(e=a;e<a+N-1;e++) t[e]='0';
printf("\n "); printf("\nModified data is : %s",t);
printf("\n "); crc();
printf("\nChecksum is : %s",cs); for(e=a;e<a+N-1;e++)
t[e]=cs[e-a];
printf("\n "); printf("\nFinal codeword is : %s",t); printf("\n ");
printf("\nTest error detection 0(yes) 1(no)? : "); scanf("%d",&e);
if(e==0)
{
do{
printf("\nEnter the position where error is to be inserted : "); scanf("%d",&e);
}while(e==0 || e>a+N-1); t[e-1]=(t[e-1]=='0')?'1':'0';
printf("\n "); printf("\nErroneous data : %s\n",t);
}
crc();
for(e=0;(e<N-1) && (cs[e]!='1');e++); if(e<N-1)
printf("\nError detected\n\n"); else
printf("\nNo error detected\n\n");
printf("\n \n"); return 0
}

OUTPUT:-

Viva Questions:-
Q1. What is CRC?
Ans. CRC, is the most powerful of the redundancy checking techniques, is based on binary division.
Q2. What is Redundancy?
Ans. The concept of including extra information in the transmission solely for the purpose of comparison. This
technique is called redundancy.

Experiment No. 12
Program for error checking method using Vertical Redundancy Check
#include<stdio.h> #include<conio.h> int binary(int); void parity(int[]);
int arr[9],arr1[9]; char chr;

int temp,temp1,i;
void main()
{ char chr1; clrscr();
printf("Enter Data :"); scanf("%c %c",&chr,&chr1);
temp=chr; binary(temp);
printf("\nAscii value is : %d\n",temp); printf("\nBinary Form : ");
for(i=0;i<8;i++)
{
arr1[i]=arr[i]; printf("%d ",arr[i]);
}
printf(“\n”);
parity(arr);
templ=chrl;
binary(temp1);
printf("\n\nAscii value is : %d\n",temp1); printf("\nBinary Form : "); for(i=0;i<8;i++)

{
printf("%d ",arr[i]);
}
parity(arr); getch();
}
void parity(int a[])

{
int count; count=0; for(i=0;i<8;i++)
{
if(a[i]==1)
count++;
}
if(count%2==0)
a[8]=0;
else
a[8]=1;
count=0;
printf("Receiver Side :\n"); printf("\n\nVRC : \n"); for(i=0;i<9;i++)
{
if(i==8)
printf(" | "); printf("%d ",a[i]);
}
}
int binary(int x)
{
int rem;
int ctr=0,i=1;
do
{
rem=x%2;
arr[i]=rem;
if(rem=1){
ctr++;
}
x=x/2;
i++
}
while(x!=0){
if(ctr%2==0)
arr[0]=0;
}
else
{
arr[0]=1;
}
return 0;
}

OUTPUT:-

Viva Questions:-
Q1. What is Error Detection? What are its methods?
Ans. Data can be corrupted during transmission. For reliable communication errors must be deducted and
Corrected. Error Detection uses the concept of redundancy, which means adding extra bits for detecting errors at
the destination. The common Error Detection methods are
a. Vertical Redundancy Check (VRC)

b. Longitudinal Redundancy Check (VRC)
c. Cyclic Redundancy Check (VRC)
d. Checksum
Q2. What is VRC?
Ans. It is the most common and least expensive mechanism for Error Detection. In VRC, a parity bit is added to
every data unit so that the total number of 1s becomes even for even parity. It can detect all single-bit errors. It
can detect burst errors only if the total number of error

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List of Experiments:

2. Study of Multiplexer and Demultiplexer (co1) 11/08/23

3. Study of Half Adder and Subtractor. (CO2) 18/08/23

4. Study of Full Adder and Subtractor .(co2) 18/08/23

5. Write Program to demonstrate Flags in microprocessor 8085. 08/09/23

7. Write a program to multiply two 8-bit numbers stored in 22/09/23

8. Program for simulate memory allocation strategies(First fit, Best 06/10/23

10. Case study of RISC And CISC. (co5) 13/10/23

Experiments Beyond Lab Manual:

S. No. Experiment Name Batch A

1. Program for Cyclic Redundancy Check 13/10/23

2. Program for error checking method using Vertical 13/10/23

Write Program to demonstrate Flags in microprocessor 8085.

1. The carry flag(CF):-

2. The auxiliary carry flag(AF):-

MVI A, 0AH MVI B, 09H ADD B

Binary value of 0A = 0000 1010 Binary value of 09 = 0000 1001

3. The zero flag(ZF):-

4. The parity flag(PF):-

5. The sign flag(SF):-

Here the result is 07-05= -2.

So the sign bit is set to 1.

Q2. What do you mean by parity flag? (BT-1/CO-2)

--3rd SEM COMPUTER ORGANIZATION & ARCHITECTURE 2023-24

LXI H, 4000H ; Load HL with 4000H

INX H ; Increment memory address by 1 (HL points 4001H)

ADD M ; Add accumulator with second operand, result stored in accumulator

INX H ; Increment memory address by 1 (HL points 4002H)

MOV M, A ; Store result at 4002H

HLT ; Terminate program execution

Result = 23H + 69H = 8CH

--3rd SEM COMPUTER ORGANIZATION & ARCHITECTURE 2023-24

Ans. LDA, STA, INR etc.

Ans. 0 to 65535 (0h to FFFFh).

--3rd SEM COMPUTER ORGANIZATION & ARCHITECTURE 2023-24

Result = B2H + B2H + B2H = 216H

(2300H) = 6H (2301H) = 02H

MVI D, 00 : Get the first number in DE register pair

MOV C, A : Initialize counter

BACK: DAD D : Result = result + first number

DCR C : Decrement count

JNZ BACK : If count 0 repeat

SHLD 2300H : Store result

HLT : Terminate program execution

--3rd SEM COMPUTER ORGANIZATION & ARCHITECTURE 2023-24

Ans. LDA, STA, INR etc.

Ans. 0 to 65535 (0h to FFFFh).

--3rd SEM COMPUTER ORGANIZATION & ARCHITECTURE 2023-24

--3rd SEM COMPUTER ORGANIZATION & ARCHITECTURE 2023-24

--3rd SEM COMPUTER ORGANIZATION & ARCHITECTURE 2023-24

--3rd SEM COMPUTER ORGANIZATION & ARCHITECTURE 2023-24

Q4. How would you explain fragmentation? (BT-3/CO-4)

--3rd SEM COMPUTER ORGANIZATION & ARCHITECTURE 2023-24

int getReplaceposition(int counter[],int n)

int min(int counter[],int nFrames)

cout<<"\nEnter the number of frames: "; cin>>nFrames;

--3rd SEM COMPUTER ORGANIZATION & ARCHITECTURE 2023-24

--3rd SEM COMPUTER ORGANIZATION & ARCHITECTURE 2023-24

--3rd SEM COMPUTER ORGANIZATION & ARCHITECTURE 2023-24

Q1. What is page fault? (BT-1/CO-4)

Q2. What is be-lady's anomaly. (BT-1/CO-4)

Q3. What is global and local page replacement? (BT-1/CO-4)

--3rd SEM COMPUTER ORGANIZATION & ARCHITECTURE 2023-24