The 8051 microcontroller has two timers/counters, referred to as Timer 0 and Timer 1.

These
timers can operate in various modes and are controlled by special function registers (SFRs).
Here’s an explanation of the operating modes and the SFRs associated with the timers/counters:
Timer/Counter Operating Modes
The 8051 timers can operate in four modes
Mode 0 (13-bit Timer Mode)
- **Timer 0**: In Mode 0, Timer 0 is configured as a 13-bit timer. The lower 5 bits of the TH0
(Timer High) register are ignored, and the 13-bit count is held in the combination of TL0 (Timer
Low) and the upper 3 bits of TH0.
- **Timer 1**: Similarly, for Timer 1 in Mode 0, it operates as a 13-bit timer with TL1 (Timer
Low) and the upper 3 bits of TH1 (Timer High) used for counting.
Mode 1 (16-bit Timer Mode)
- **Timer 0**: In Mode 1, Timer 0 operates as a 16-bit timer, utilizing both TL0 and TH0
registers for the full 16-bit count.
- **Timer 1**: In Mode 1, Timer 1 functions similarly, using TL1 and TH1 for a 16-bit count.
Mode 2 (8-bit Auto-Reload Mode)
- **Timer 0**: In Mode 2, Timer 0 is configured as an 8-bit timer with auto-reload. The timer
counts from 0 to 255, and when it overflows, it reloads the value from the TH0 register into TL0.
- **Timer 1**: In Mode 2, Timer 1 operates similarly, counting from 0 to 255 and reloading
from TH1 upon overflow.
Mode 3 (Split Timer Mode)
- **Timer 0**: In Mode 3, Timer 0 is split into two 8-bit timers, TL0 and TH0, which can be
used independently.
- **Timer 1**: In Mode 3, Timer 1 stops functioning as a timer, as Timer 0 uses the entire Timer
1 for its split operation.

Special Function Registers (SFRs) Associated with Timer/Counter

1. **TCON (Timer Control Register)**: This register controls the start/stop of the timers and
monitors overflow flags.
- **TF1 (Timer 1 Overflow Flag)**: Set when Timer 1 overflows.
- **TR1 (Timer 1 Run Control Bit)**: Set to start Timer 1.
- **TF0 (Timer 0 Overflow Flag)**: Set when Timer 0 overflows.
- **TR0 (Timer 0 Run Control Bit)**: Set to start Timer 0.
- **IE1, IT1, IE0, IT0**: Interrupt-related flags for external interrupts.

2. **TMOD (Timer Mode Register)**: This register selects the mode of operation for the timers.
- **Gate (GATE)**: Controls whether the timer is enabled by hardware or software.
- **C/T (Counter/Timer Select)**: Selects between counter or timer operation.
- **M1, M0 (Mode Bits)**: Determine the mode of the timer (Mode 0, Mode 1, Mode 2, or
Mode 3).

3. **TH0, TL0 (Timer 0 High and Low Register)**: Holds the high and low bytes of the 16-bit
count for Timer 0.

4. **TH1, TL1 (Timer 1 High and Low Register)**: Holds the high and low bytes of the 16-bit
count for Timer 1.

5. **IE (Interrupt Enable Register)**: Enables or disables interrupts for timers and other sources.
- **ET1 (Enable Timer 1 Interrupt)**: Enable interrupt for Timer 1 overflow.
- **ET0 (Enable Timer 0 Interrupt)**: Enable interrupt for Timer 0 overflow.

Bit Addressable:
EA – ET2 ES ET1 EX1 ET0 EX0

6. **IP (Interrupt Priority Register)**: Sets the priority level of the interrupts.
 - **PT1 (Priority Timer 1)**: Sets the priority of Timer 1 interrupt.
- **PT0 (Priority Timer 0)**: Sets the priority of Timer 0 interrupt.

These modes and registers provide the necessary functionality to implement various timing and
counting operations in an 8051-based system.