8086 Ins

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6/19/24, 7:44 AM 8086 instructions 6/19/24, 7:44 AM 8086 instructions

Some instructions allow several operand combinations. For example:


Complete 8086 instruction set
memory, immediate
REG, immediate
Quick reference:
memory, REG
CMPSB MOV REG, SREG
AAA CMPSW JAE JNBE JPO MOVSB RCR SCASB
AAD CWD JB JNC JS MOVSW REP SCASW Some examples contain macros, so it is advisable to use Shift + F8 hot key to
AAM DAA JBE JNE JZ MUL REPE SHL Step Over (to make macro code execute at maximum speed set step delay to
AAS DAS JC JNG LAHF NEG REPNE SHR zero), otherwise emulator will step through each instruction of a macro. Here is
ADC DEC JCXZ JNGE LDS NOP REPNZ STC an example that uses PRINTN macro:
ADD DIV JE JNL LEA NOT REPZ STD
AND HLT JG JNLE LES OR RET STI
CALL IDIV JGE JNO LODSB OUT RETF STOSB #make_COM#
CBW IMUL JL JNP LODSW POP ROL STOSW include 'emu8086.inc'
CLC IN JLE JNS LOOP POPA ROR SUB ORG 100h
CLD INC JMP JNZ LOOPE POPF SAHF TEST MOV AL, 1
CLI INT JNA JO LOOPNE PUSH SAL XCHG MOV BL, 2
CMC INTO JNAE JP LOOPNZ PUSHA SAR XLATB PRINTN 'Hello World!' ; macro.
CMP IRET JNB JPE LOOPZ PUSHF SBB XOR MOV CL, 3
JA RCL PRINTN 'Welcome!' ; macro.
RET

Operand types:

REG: AX, BX, CX, DX, AH, AL, BL, BH, CH, CL, DH, DL, DI, SI, BP, SP. These marks are used to show the state of the flags:

SREG: DS, ES, SS, and only as second operand: CS. 1 - instruction sets this flag to 1.
0 - instruction sets this flag to 0.
memory: [BX], [BX+SI+7], variable, etc...(see Memory Access). r - flag value depends on result of the instruction.
? - flag value is undefined (maybe 1 or 0).
immediate: 5, -24, 3Fh, 10001101b, etc...

Notes:
Some instructions generate exactly the same machine code, so disassembler
may have a problem decoding to your original code. This is especially
When two operands are required for an instruction they are separated by comma. important for Conditional Jump instructions (see "Program Flow Control" in
For example: Tutorials for more information).

REG, memory

When there are two operands, both operands must have the same size (except
shift and rotate instructions). For example:
Instructions in alphabetical order:
AL, DL
DX, AX
Instruction Operands Description
m1 DB ?
AL, m1
m2 DW ? AAA No operands ASCII Adjust after Addition.
AX, m2 Corrects result in AH and AL after addition when
working with BCD values.

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It works according to the following Algorithm:


Example:
if low nibble of AL > 9 or AF = 1 then:
MOV AL, 15 ; AL = 0Fh
AL = AL + 6 AAM ; AH = 01, AL = 05
AH = AH + 1 RET
AF = 1
CF = 1 CZSOPA
? r r ? r ?
else

AF = 0
CF = 0
ASCII Adjust after Subtraction.
in both cases: Corrects result in AH and AL after subtraction
clear the high nibble of AL. when working with BCD values.

Example: Algorithm:

MOV AX, 15 ; AH = 00, AL = 0Fh if low nibble of AL > 9 or AF = 1 then:


AAA ; AH = 01, AL = 05
RET AL = AL - 6
AH = AH - 1
CZSOPA AF = 1
CF = 1
r ? ? ? ? r
else
AAS No operands AF = 0
ASCII Adjust before Division.
CF = 0
Prepares two BCD values for division.
in both cases:
Algorithm: clear the high nibble of AL.

Example:
AL = (AH * 10) + AL
AH = 0 MOV AX, 02FFh ; AH = 02, AL = 0FFh
AAS ; AH = 01, AL = 09
AAD No operands RET
Example:
CZSOPA
MOV AX, 0105h ; AH = 01, AL = 05
AAD ; AH = 00, AL = 0Fh (15) r ? ? ? ? r
RET

CZSOPA
ADC REG, memory Add with Carry.
? r r ? r ? memory, REG
REG, REG
memory, immediate Algorithm:
REG, immediate
AAM No operands ASCII Adjust after Multiplication.
Corrects the result of multiplication of two BCD operand1 = operand1 + operand2 + CF
values.
Example:
Algorithm: STC ; set CF = 1
MOV AL, 5 ; AL = 5
ADC AL, 1 ; AL = 7
AH = AL / 10 RET
AL = remainder
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CZSOPA CALL p1
r r r r r r ADD AX, 1

RET ; return to OS.


Add.
p1 PROC ; procedure declaration.
MOV AX, 1234h
RET ; return to caller.
Algorithm:
p1 ENDP
operand1 = operand1 + operand2 CZSOPA
REG, memory
memory, REG unchanged
ADD REG, REG Example:
memory, immediate MOV AL, 5 ; AL = 5
REG, immediate ADD AL, -3 ; AL = 2
RET Convert byte into word.

CZSOPA Algorithm:
r r r r r r
if high bit of AL = 1 then:

AH = 255 (0FFh)
Logical AND between all bits of two operands.
Result is stored in operand1.
else
These rules apply: AH = 0
CBW No operands
1 AND 1 = 1
1 AND 0 = 0 Example:
0 AND 1 = 0
REG, memory 0 AND 0 = 0 MOV AX, 0 ; AH = 0, AL = 0
memory, REG MOV AL, -5 ; AX = 000FBh (251)
AND REG, REG CBW ; AX = 0FFFBh (-5)
memory, immediate RET
REG, immediate Example:
MOV AL, 'a' ; AL = 01100001b CZSOPA
AND AL, 11011111b ; AL = 01000001b ('A') unchanged
RET

CZSOP
0 r r 0 r Clear Carry flag.

Algorithm:
CALL procedure name Transfers control to procedure, return address is CF = 0
label (IP) is pushed to stack. 4-byte address may be
CLC No operands
4-byte address entered in this form: 1234h:5678h, first value is a C
segment second value is an offset (this is a far
call, so CS is also pushed to stack). 0

Example: CLD No operands Clear Direction flag. SI and DI will be incremented


#make_COM# by chain instructions: CMPSB, CMPSW, LODSB,
ORG 100h ; for COM file. LODSW, MOVSB, MOVSW, STOSB, STOSW.

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Algorithm:
Compare bytes: ES:[DI] from DS:[SI].
DF = 0
Algorithm:
D
0 DS:[SI] - ES:[DI]
set flags according to result:
OF, SF, ZF, AF, PF, CF
if DF = 0 then
Clear Interrupt enable flag. This disables hardware SI = SI + 1
interrupts. DI = DI + 1
CMPSB No operands
else
Algorithm: SI = SI - 1
DI = DI - 1
CLI No operands IF = 0
Example:
I see cmpsb.asm in Samples.
0
CZSOPA
r r r r r r
Complement Carry flag. Inverts value of CF.

Algorithm: Compare words: ES:[DI] from DS:[SI].

if CF = 1 then CF = 0 Algorithm:
if CF = 0 then CF = 1
CMC No operands
DS:[SI] - ES:[DI]
set flags according to result:
C
OF, SF, ZF, AF, PF, CF
r if DF = 0 then
SI = SI + 2
DI = DI + 2
CMPSW No operands else
Compare. SI = SI - 2
DI = DI - 2
Algorithm:
Example:
operand1 - operand2 see cmpsw.asm in Samples.
result is not stored anywhere, flags are set (OF, SF, ZF, AF, PF,
CF) according to result. CZSOPA
REG, memory
memory, REG r r r r r r
CMP REG, REG Example:
memory, immediate
REG, immediate MOV AL, 5
MOV BL, 5 CWD No operands Convert Word to Double word.
CMP AL, BL ; AL = 5, ZF = 1 (so equal!)
RET Algorithm:

CZSOPA if high bit of AX = 1 then:


r r r r r r
DX = 65535 (0FFFFh)

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else if AL > 9Fh or CF = 1 then:

DX = 0 AL = AL - 60h
CF = 1

Example:
Example:
MOV DX, 0 ; DX = 0
MOV AX, 0 ; AX = 0 MOV AL, 0FFh ; AL = 0FFh (-1)
MOV AX, -5 ; DX AX = 00000h:0FFFBh DAS ; AL = 99h, CF = 1
CWD ; DX AX = 0FFFFh:0FFFBh RET
RET
CZSOPA
CZSOPA r r r r r r
unchanged

Decrement.
Decimal adjust After Addition.
Corrects the result of addition of two packed BCD Algorithm:
values.
operand = operand - 1
Algorithm:

if low nibble of AL > 9 or AF = 1 then: REG Example:


DEC
memory
AL = AL + 6 MOV AL, 255 ; AL = 0FFh (255 or -1)
AF = 1 DEC AL ; AL = 0FEh (254 or -2)
RET
if AL > 9Fh or CF = 1 then:
ZSOPA
DAA No operands AL = AL + 60h r r r r r
CF = 1
CF - unchanged!

Example: DIV REG Unsigned divide.


memory
MOV AL, 0Fh ; AL = 0Fh (15)
DAA ; AL = 15h Algorithm:
RET

CZSOPA when operand is a byte:


AL = AX / operand
r r r r r r AH = remainder (modulus)

when operand is a word:


AX = (DX AX) / operand
DAS No operands Decimal adjust After Subtraction. DX = remainder (modulus)
Corrects the result of subtraction of two packed
BCD values. Example:

Algorithm: MOV AX, 203 ; AX = 00CBh


MOV BL, 4
if low nibble of AL > 9 or AF = 1 then: DIV BL ; AL = 50 (32h), AH = 3
RET
AL = AL - 6
AF = 1

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CZSOPA IMUL BL ; AX = 8
RET
? ? ? ? ? ?
CZSOPA
r ? ? r ? ?
Halt the System. CF=OF=0 when result fits into operand of IMUL.
Example:
Input from port into AL or AX.
MOV AX, 5 Second operand is a port number. If required to
HLT No operands HLT access port number over 255 - DX register should
be used.
CZSOPA AL, im.byte Example:
unchanged AL, DX
IN IN AX, 4 ; get status of traffic lights.
AX, im.byte
AX, DX IN AL, 7 ; get status of stepper-motor.

Signed divide. CZSOPA


unchanged
Algorithm:

when operand is a byte: Increment.


AL = AX / operand
AH = remainder (modulus) Algorithm:

when operand is a word: operand = operand + 1


AX = (DX AX) / operand
REG
IDIV
memory
DX = remainder (modulus) Example:
REG
INC
Example: memory MOV AL, 4
INC AL ; AL = 5
MOV AX, -203 ; AX = 0FF35h RET
MOV BL, 4
IDIV BL ; AL = -50 (0CEh), AH = -3 (0FDh) ZSOPA
RET
r r r r r
CZSOPA CF - unchanged!
? ? ? ? ? ?
INT immediate byte Interrupt numbered by immediate byte (0..255).

Algorithm:
IMUL REG Signed multiply.
memory
Algorithm: Push to stack:
flags register
CS
when operand is a byte: IP
AX = AL * operand. IF = 0
Transfer control to interrupt procedure
when operand is a word:
(DX AX) = AX * operand.
Example:
Example:
MOV AH, 0Eh ; teletype.
MOV AL, -2 MOV AL, 'A'
MOV BL, -4 INT 10h ; BIOS interrupt.
RET
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CZSOPAI PRINT 'AL is above 5'


exit:
unchanged 0 RET

CZSOPA
unchanged
Interrupt 4 if Overflow flag is 1.

Algorithm:
Short Jump if first operand is Above or Equal to
if OF = 1 then INT 4 second operand (as set by CMP instruction).
Unsigned.
Example:
Algorithm:
INTO No operands ; -5 - 127 = -132 (not in -128..127)
; the result of SUB is wrong (124),
; so OF = 1 is set: if CF = 0 then jump
MOV AL, -5
SUB AL, 127 ; AL = 7Ch (124) Example:
INTO ; process error.
RET include 'emu8086.inc'
#make_COM#
JAE label ORG 100h
MOV AL, 5
Interrupt Return. CMP AL, 5
JAE label1
Algorithm: PRINT 'AL is not above or equal to 5'
JMP exit
label1:
Pop from stack: PRINT 'AL is above or equal to 5'
IP exit:
IRET No operands RET
CS
flags register
CZSOPA
CZSOPA unchanged
popped

JB label Short Jump if first operand is Below second


JA label Short Jump if first operand is Above second operand (as set by CMP instruction). Unsigned.
operand (as set by CMP instruction). Unsigned.
Algorithm:
Algorithm:
if CF = 1 then jump
if (CF = 0) and (ZF = 0) then jump
Example:
Example: include 'emu8086.inc'
include 'emu8086.inc' #make_COM#
#make_COM# ORG 100h
ORG 100h MOV AL, 1
MOV AL, 250 CMP AL, 5
CMP AL, 5 JB label1
JA label1 PRINT 'AL is not below 5'
PRINT 'AL is not above 5' JMP exit
JMP exit label1:
label1: PRINT 'AL is below 5'
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exit: CZSOPA
RET
unchanged
CZSOPA
unchanged
Short Jump if CX register is 0.

Short Jump if first operand is Below or Equal to Algorithm:


second operand (as set by CMP instruction).
Unsigned. if CX = 0 then jump
Algorithm: Example:
include 'emu8086.inc'
if CF = 1 or ZF = 1 then jump #make_COM#
ORG 100h
Example: JCXZ label MOV CX, 0
JCXZ label1
include 'emu8086.inc' PRINT 'CX is not zero.'
#make_COM# JMP exit
JBE label ORG 100h label1:
MOV AL, 5 PRINT 'CX is zero.'
CMP AL, 5 exit:
JBE label1 RET
PRINT 'AL is not below or equal to 5'
JMP exit CZSOPA
label1:
PRINT 'AL is below or equal to 5' unchanged
exit:
RET
JE label Short Jump if first operand is Equal to second
CZSOPA
operand (as set by CMP instruction).
unchanged Signed/Unsigned.

Algorithm:
JC label Short Jump if Carry flag is set to 1.
if ZF = 1 then jump
Algorithm:
Example:
if CF = 1 then jump include 'emu8086.inc'
#make_COM#
Example: ORG 100h
MOV AL, 5
include 'emu8086.inc'
CMP AL, 5
#make_COM#
JE label1
ORG 100h
PRINT 'AL is not equal to 5.'
MOV AL, 255
JMP exit
ADD AL, 1
label1:
JC label1
PRINT 'AL is equal to 5.'
PRINT 'no carry.'
exit:
JMP exit
RET
label1:
PRINT 'has carry.'
CZSOPA
exit:
RET unchanged

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CZSOPA
unchanged
Short Jump if first operand is Greater then second
operand (as set by CMP instruction). Signed.

Algorithm: Short Jump if first operand is Less then second


operand (as set by CMP instruction). Signed.

if (ZF = 0) and (SF = OF) then jump Algorithm:

Example:
if SF <> OF then jump
include 'emu8086.inc'
#make_COM# Example:
ORG 100h
JG label MOV AL, 5 include 'emu8086.inc'
CMP AL, -5 #make_COM#
JG label1 ORG 100h
PRINT 'AL is not greater -5.' JL label MOV AL, -2
JMP exit CMP AL, 5
label1: JL label1
PRINT 'AL is greater -5.' PRINT 'AL >= 5.'
exit: JMP exit
RET label1:
PRINT 'AL < 5.'
CZSOPA exit:
RET
unchanged
CZSOPA
unchanged
JGE label Short Jump if first operand is Greater or Equal to
second operand (as set by CMP instruction).
Signed.
JLE label Short Jump if first operand is Less or Equal to
Algorithm: second operand (as set by CMP instruction).
Signed.

if SF = OF then jump Algorithm:

Example:
if SF <> OF or ZF = 1 then jump
include 'emu8086.inc'
#make_COM# Example:
ORG 100h
MOV AL, 2 include 'emu8086.inc'
CMP AL, -5 #make_COM#
JGE label1 ORG 100h
PRINT 'AL < -5' MOV AL, -2
JMP exit CMP AL, 5
label1: JLE label1
PRINT 'AL >= -5' PRINT 'AL > 5.'
exit: JMP exit
RET label1:
PRINT 'AL <= 5.'
exit:
RET

CZSOPA
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unchanged

Short Jump if first operand is Not Above and Not


Unconditional Jump. Transfers control to another Equal to second operand (as set by CMP
part of the program. 4-byte address may be instruction). Unsigned.
entered in this form: 1234h:5678h, first value is a
segment second value is an offset. Algorithm:

if CF = 1 then jump
Algorithm:
Example:
always jump include 'emu8086.inc'
#make_COM#
Example: ORG 100h
JNAE label
label MOV AL, 2
JMP include 'emu8086.inc'
4-byte address CMP AL, 5
#make_COM#
JNAE label1
ORG 100h
PRINT 'AL >= 5.'
MOV AL, 5
JMP exit
JMP label1 ; jump over 2 lines!
label1:
PRINT 'Not Jumped!'
PRINT 'AL < 5.'
MOV AL, 0
exit:
label1:
RET
PRINT 'Got Here!'
RET
CZSOPA
CZSOPA unchanged
unchanged

JNB label Short Jump if first operand is Not Below second


JNA label Short Jump if first operand is Not Above second operand (as set by CMP instruction). Unsigned.
operand (as set by CMP instruction). Unsigned.
Algorithm:
Algorithm:
if CF = 0 then jump
if CF = 1 or ZF = 1 then jump
Example:
Example: include 'emu8086.inc'
#make_COM#
include 'emu8086.inc'
ORG 100h
#make_COM#
MOV AL, 7
ORG 100h
CMP AL, 5
MOV AL, 2
JNB label1
CMP AL, 5
PRINT 'AL < 5.'
JNA label1
JMP exit
PRINT 'AL is above 5.'
label1:
JMP exit
PRINT 'AL >= 5.'
label1:
exit:
PRINT 'AL is not above 5.'
RET
exit:
RET

CZSOPA
unchanged
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CZSOPA unchanged
unchanged

Short Jump if first operand is Not Equal to second


operand (as set by CMP instruction).
Short Jump if first operand is Not Below and Not
Signed/Unsigned.
Equal to second operand (as set by CMP
instruction). Unsigned.
Algorithm:
Algorithm:
if ZF = 0 then jump
if (CF = 0) and (ZF = 0) then jump
Example:
Example: include 'emu8086.inc'
#make_COM#
include 'emu8086.inc'
JNE label ORG 100h
#make_COM#
MOV AL, 2
JNBE label ORG 100h
CMP AL, 3
MOV AL, 7
JNE label1
CMP AL, 5
PRINT 'AL = 3.'
JNBE label1
JMP exit
PRINT 'AL <= 5.'
label1:
JMP exit
PRINT 'Al <> 3.'
label1:
exit:
PRINT 'AL > 5.'
RET
exit:
RET
CZSOPA
CZSOPA unchanged
unchanged

JNG label Short Jump if first operand is Not Greater then


second operand (as set by CMP instruction).
JNC label Short Jump if Carry flag is set to 0.
Signed.
Algorithm:
Algorithm:

if CF = 0 then jump
if (ZF = 1) and (SF <> OF) then jump
Example:
Example:
include 'emu8086.inc'
#make_COM# include 'emu8086.inc'
ORG 100h #make_COM#
MOV AL, 2 ORG 100h
ADD AL, 3 MOV AL, 2
JNC label1 CMP AL, 3
PRINT 'has carry.' JNG label1
JMP exit PRINT 'AL > 3.'
label1: JMP exit
PRINT 'no carry.' label1:
exit: PRINT 'Al <= 3.'
RET exit:
RET
CZSOPA
CZSOPA

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unchanged unchanged

Short Jump if first operand is Not Greater and Not Short Jump if first operand is Not Less and Not
Equal to second operand (as set by CMP Equal to second operand (as set by CMP
instruction). Signed. instruction). Signed.

Algorithm: Algorithm:

if SF <> OF then jump if (SF = OF) and (ZF = 0) then jump

Example: Example:
include 'emu8086.inc' include 'emu8086.inc'
#make_COM# #make_COM#
JNGE label ORG 100h JNLE label ORG 100h
MOV AL, 2 MOV AL, 2
CMP AL, 3 CMP AL, -3
JNGE label1 JNLE label1
PRINT 'AL >= 3.' PRINT 'AL <= -3.'
JMP exit JMP exit
label1: label1:
PRINT 'Al < 3.' PRINT 'Al > -3.'
exit: exit:
RET RET

CZSOPA CZSOPA
unchanged unchanged

JNL label Short Jump if first operand is Not Less then JNO label Short Jump if Not Overflow.
second operand (as set by CMP instruction).
Signed. Algorithm:

Algorithm:
if OF = 0 then jump

if SF = OF then jump Example:


; -5 - 2 = -7 (inside -128..127)
Example:
; the result of SUB is correct,
include 'emu8086.inc' ; so OF = 0:
#make_COM#
ORG 100h include 'emu8086.inc'
MOV AL, 2 #make_COM#
CMP AL, -3 ORG 100h
JNL label1 MOV AL, -5
PRINT 'AL < -3.' SUB AL, 2 ; AL = 0F9h (-7)
JMP exit JNO label1
label1: PRINT 'overflow!'
PRINT 'Al >= -3.' JMP exit
exit: label1:
RET PRINT 'no overflow.'
exit:
CZSOPA RET

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CZSOPA unchanged
unchanged

Short Jump if Not Zero (not equal). Set by CMP,


Short Jump if No Parity (odd). Only 8 low bits of SUB, ADD, TEST, AND, OR, XOR instructions.
result are checked. Set by CMP, SUB, ADD, TEST,
AND, OR, XOR instructions. Algorithm:

Algorithm: if ZF = 0 then jump

Example:
if PF = 0 then jump
include 'emu8086.inc'
Example: #make_COM#
ORG 100h
include 'emu8086.inc' JNZ label MOV AL, 00000111b ; AL = 7
#make_COM#
OR AL, 0 ; just set flags.
JNP label ORG 100h
JNZ label1
MOV AL, 00000111b ; AL = 7
PRINT 'zero.'
OR AL, 0 ; just set flags.
JMP exit
JNP label1
label1:
PRINT 'parity even.'
PRINT 'not zero.'
JMP exit
exit:
label1:
RET
PRINT 'parity odd.'
exit:
CZSOPA
RET
unchanged
CZSOPA
unchanged
JO label Short Jump if Overflow.

JNS label Short Jump if Not Signed (if positive). Set by CMP, Algorithm:
SUB, ADD, TEST, AND, OR, XOR instructions.
if OF = 1 then jump
Algorithm:
Example:
if SF = 0 then jump ; -5 - 127 = -132 (not in -128..127)
; the result of SUB is wrong (124),
Example: ; so OF = 1 is set:
include 'emu8086.inc' include 'emu8086.inc'
#make_COM# #make_COM#
ORG 100h org 100h
MOV AL, 00000111b ; AL = 7 MOV AL, -5
OR AL, 0 ; just set flags. SUB AL, 127 ; AL = 7Ch (124)
JNS label1 JO label1
PRINT 'signed.' PRINT 'no overflow.'
JMP exit JMP exit
label1: label1:
PRINT 'not signed.' PRINT 'overflow!'
exit: exit:
RET RET
CZSOPA
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CZSOPA CZSOPA
unchanged unchanged

Short Jump if Parity (even). Only 8 low bits of Short Jump if Parity Odd. Only 8 low bits of result
result are checked. Set by CMP, SUB, ADD, TEST, are checked. Set by CMP, SUB, ADD, TEST, AND,
AND, OR, XOR instructions. OR, XOR instructions.

Algorithm: Algorithm:

if PF = 1 then jump if PF = 0 then jump

Example: Example:
include 'emu8086.inc' include 'emu8086.inc'
#make_COM# #make_COM#
JP label ORG 100h JPO label ORG 100h
MOV AL, 00000101b ; AL = 5 MOV AL, 00000111b ; AL = 7
OR AL, 0 ; just set flags. OR AL, 0 ; just set flags.
JP label1 JPO label1
PRINT 'parity odd.' PRINT 'parity even.'
JMP exit JMP exit
label1: label1:
PRINT 'parity even.' PRINT 'parity odd.'
exit: exit:
RET RET

CZSOPA CZSOPA
unchanged unchanged

JPE label Short Jump if Parity Even. Only 8 low bits of result JS label Short Jump if Signed (if negative). Set by CMP,
are checked. Set by CMP, SUB, ADD, TEST, AND, SUB, ADD, TEST, AND, OR, XOR instructions.
OR, XOR instructions.
Algorithm:
Algorithm:

if SF = 1 then jump
if PF = 1 then jump
Example:
Example:
include 'emu8086.inc'
include 'emu8086.inc' #make_COM#
#make_COM# ORG 100h
ORG 100h MOV AL, 10000000b ; AL = -128
MOV AL, 00000101b ; AL = 5 OR AL, 0 ; just set flags.
OR AL, 0 ; just set flags. JS label1
JPE label1 PRINT 'not signed.'
PRINT 'parity odd.' JMP exit
JMP exit label1:
label1: PRINT 'signed.'
PRINT 'parity even.' exit:
exit: RET
RET
CZSOPA
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unchanged
Example:

Short Jump if Zero (equal). Set by CMP, SUB, #make_COM#


ADD, TEST, AND, OR, XOR instructions. ORG 100h

Algorithm: LDS AX, m

RET
if ZF = 1 then jump
m DW 1234h
Example: DW 5678h

include 'emu8086.inc' END


#make_COM#
ORG 100h
JZ label MOV AL, 5 AX is set to 1234h, DS is set to 5678h.
CMP AL, 5
JZ label1 CZSOPA
PRINT 'AL is not equal to 5.'
unchanged
JMP exit
label1:
PRINT 'AL is equal to 5.'
exit:
RET LEA REG, memory Load Effective Address.

CZSOPA Algorithm:
unchanged
REG = address of memory (offset)

Load AH from 8 low bits of Flags register.


Generally this instruction is replaced by MOV when
Algorithm: assembling when possible.

Example:
AH = flags register
#make_COM#
LAHF No operands AH bit: 7 6 5 4 3 2 1 0 ORG 100h
[SF] [ZF] [0] [AF] [0] [PF] [1] [CF]
LEA AX, m
bits 1, 3, 5 are reserved.
RET
CZSOPA
m DW 1234h
unchanged
END

LDS REG, memory Load memory double word into word register and AX is set to: 0104h.
DS. LEA instruction takes 3 bytes, RET takes 1 byte,
we start at 100h, so the address of 'm' is 104h.
Algorithm:

REG = first word


DS = second word
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CZSOPA m: LODSB
INT 10h
unchanged LOOP m

RET
Load memory double word into word register and
a1 DB 'H', 'e', 'l', 'l', 'o'
ES.
CZSOPA
Algorithm:
unchanged

REG = first word


ES = second word
Load word at DS:[SI] into AX. Update SI.

Example: Algorithm:

#make_COM# AX = DS:[SI]
ORG 100h if DF = 0 then
SI = SI + 2
LES REG, memory
LES AX, m else
SI = SI - 2
RET
Example:
m DW 1234h
DW 5678h #make_COM#
LODSW No operands ORG 100h
END
LEA SI, a1
MOV CX, 5
AX is set to 1234h, ES is set to 5678h.
REP LODSW ; finally there will be 555h in AX.
CZSOPA
RET
unchanged
a1 dw 111h, 222h, 333h, 444h, 555h

CZSOPA
LODSB No operands Load byte at DS:[SI] into AL. Update SI.
unchanged
Algorithm:

AL = DS:[SI]
LOOP label Decrease CX, jump to label if CX not zero.
if DF = 0 then
SI = SI + 1 Algorithm:
else
SI = SI - 1
CX = CX - 1
Example: if CX <> 0 then
jump
#make_COM# else
ORG 100h no jump, continue

LEA SI, a1 Example:


MOV CX, 5
MOV AH, 0Eh include 'emu8086.inc'
#make_COM#

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ORG 100h no jump, continue


MOV CX, 5 Example:
label1:
PRINTN 'loop!' ; Loop until '7' is found,
LOOP label1 ; or 5 times.
RET
include 'emu8086.inc'
CZSOPA #make_COM#
ORG 100h
unchanged
MOV SI, 0
MOV CX, 5
label1:
Decrease CX, jump to label if CX not zero and PUTC '*'
Equal (ZF = 1). MOV AL, v1[SI]
INC SI ; next byte (SI=SI+1).
CMP AL, 7
Algorithm:
LOOPNE label1
RET
CX = CX - 1 v1 db 9, 8, 7, 6, 5
if (CX <> 0) and (ZF = 1) then
jump CZSOPA
else unchanged
no jump, continue

Example:
; Loop until result fits into AL alone, LOOPNZ label Decrease CX, jump to label if CX not zero and ZF
; or 5 times. The result will be over 255 = 0.
; on third loop (100+100+100),
LOOPE label ; so loop will exit. Algorithm:

include 'emu8086.inc'
#make_COM# CX = CX - 1
ORG 100h if (CX <> 0) and (ZF = 0) then
MOV AX, 0 jump
MOV CX, 5 else
label1: no jump, continue
PUTC '*'
ADD AX, 100 Example:
CMP AH, 0
; Loop until '7' is found,
LOOPE label1
; or 5 times.
RET
include 'emu8086.inc'
CZSOPA
#make_COM#
unchanged ORG 100h
MOV SI, 0
MOV CX, 5
label1:
LOOPNE label Decrease CX, jump to label if CX not zero and Not PUTC '*'
Equal (ZF = 0). MOV AL, v1[SI]
INC SI ; next byte (SI=SI+1).
Algorithm: CMP AL, 7
LOOPNZ label1
RET
CX = CX - 1 v1 db 9, 8, 7, 6, 5
if (CX <> 0) and (ZF = 0) then
jump CZSOPA
else
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unchanged #make_COM#
ORG 100h
MOV AX, 0B800h ; set AX = B800h (VGA memory).
MOV DS, AX ; copy value of AX to DS.
Decrease CX, jump to label if CX not zero and ZF MOV CL, 'A' ; CL = 41h (ASCII code).
= 1. MOV CH, 01011111b ; CL = color attribute.
MOV BX, 15Eh ; BX = position on screen.
Algorithm: MOV [BX], CX ; w.[0B800h:015Eh] = CX.
RET ; returns to operating system.

CX = CX - 1 CZSOPA
if (CX <> 0) and (ZF = 1) then unchanged
jump
else
no jump, continue
Copy byte at DS:[SI] to ES:[DI]. Update SI and
Example:
DI.
; Loop until result fits into AL alone,
; or 5 times. The result will be over 255 Algorithm:
; on third loop (100+100+100),
LOOPZ label ; so loop will exit.
ES:[DI] = DS:[SI]
include 'emu8086.inc' if DF = 0 then
#make_COM# SI = SI + 1
ORG 100h DI = DI + 1
MOV AX, 0 else
MOV CX, 5 SI = SI - 1
label1: DI = DI - 1
PUTC '*'
ADD AX, 100 Example:
CMP AH, 0
LOOPZ label1
MOVSB No operands #make_COM#
RET ORG 100h

CZSOPA LEA SI, a1


LEA DI, a2
unchanged MOV CX, 5
REP MOVSB

RET
MOV REG, memory Copy operand2 to operand1.
memory, REG
a1 DB 1,2,3,4,5
REG, REG The MOV instruction cannot: a2 DB 5 DUP(0)
memory, immediate
REG, immediate set the value of the CS and IP registers.
CZSOPA
copy value of one segment register to
SREG, memory another segment register (should copy to unchanged
memory, SREG general register first).
REG, SREG copy immediate value to segment register
SREG, REG
(should copy to general register first). MOVSW No operands Copy byte at DS:[SI] to ES:[DI]. Update SI and
DI.
Algorithm: Algorithm:

operand1 = operand2
ES:[DI] = DS:[SI]
if DF = 0 then
Example:
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SI = SI + 2 MOV AL, 5 ; AL = 05h


DI = DI + 2 NEG AL ; AL = 0FBh (-5)
else NEG AL ; AL = 05h (5)
SI = SI - 2 RET
DI = DI - 2
Example: CZSOPA
r r r r r r
#make_COM#
ORG 100h

LEA SI, a1
LEA DI, a2 No Operation.
MOV CX, 5
REP MOVSW Algorithm:

RET
Do nothing
a1 DW 1,2,3,4,5
a2 DW 5 DUP(0) Example:
NOP No operands ; do nothing, 3 times:
CZSOPA
NOP
unchanged NOP
NOP
RET
Unsigned multiply. CZSOPA
unchanged
Algorithm:

when operand is a byte: Invert each bit of the operand.


AX = AL * operand.
Algorithm:
when operand is a word:
(DX AX) = AX * operand.
REG
MUL if bit is 1 turn it to 0.
memory
Example: if bit is 0 turn it to 1.
MOV AL, 200 ; AL = 0C8h REG
NOT Example:
MOV BL, 4 memory
MUL BL ; AX = 0320h (800) MOV AL, 00011011b
RET NOT AL ; AL = 11100100b
RET
CZSOPA
r ? ? r ? ? CZSOPA
CF=OF=0 when high section of the result is zero. unchanged

NEG REG Negate. Makes operand negative (two's


memory complement). OR REG, memory Logical OR between all bits of two operands.
memory, REG Result is stored in first operand.
Algorithm: REG, REG
memory, immediate These rules apply:
REG, immediate
Invert all bits of the operand 1 OR 1 = 1
Add 1 to inverted operand 1 OR 0 = 1
0 OR 1 = 1
Example:
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0 OR 0 = 0 Note: this instruction works only on 80186 CPU


and later!

Example: Algorithm:
MOV AL, 'A' ; AL = 01000001b
OR AL, 00100000b ; AL = 01100001b ('a') POP DI
RET POP SI
POP BP
CZSOPA POP xx (SP value ignored)
0 r r 0 r ? POP BX
POP DX
POP CX
POP AX
Output from AL or AX to port.
First operand is a port number. If required to CZSOPA
access port number over 255 - DX register should
unchanged
be used.

Example:
im.byte, AL Get flags register from the stack.
im.byte, AX MOV AX, 0FFFh ; Turn on all
OUT OUT 4, AX ; traffic lights.
DX, AL Algorithm:
DX, AX
MOV AL, 100b ; Turn on the third
OUT 7, AL ; magnet of the stepper-motor.
flags = SS:[SP] (top of the stack)
POPF No operands
SP = SP + 2
CZSOPA
unchanged CZSOPA
popped

Get 16 bit value from the stack.

Algorithm: Store 16 bit value in the stack.

Note: PUSH immediate works only on 80186


operand = SS:[SP] (top of the stack) CPU and later!
SP = SP + 2
Algorithm:
REG
POP SREG Example:
memory SP = SP - 2
MOV AX, 1234h REG SS:[SP] (top of the stack) = operand
PUSH AX SREG
POP DX ; DX = 1234h PUSH
memory
RET immediate Example:

CZSOPA MOV AX, 1234h


PUSH AX
unchanged
POP DX ; DX = 1234h
RET

POPA No operands Pop all general purpose registers DI, SI, BP, SP, CZSOPA
BX, DX, CX, AX from the stack. unchanged
SP value is ignored, it is Popped but not set to SP
register).

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STC ; set carry (CF=1).


Push all general purpose registers AX, CX, DX, BX, MOV AL, 1Ch ; AL = 00011100b
SP, BP, SI, DI in the stack. RCL AL, 1 ; AL = 00111001b, CF=0.
Original value of SP register (before PUSHA) is RET
used.
CO
Note: this instruction works only on 80186 CPU r r
and later!
OF=0 if first operand keeps original sign.
Algorithm:
Rotate operand1 right through Carry Flag. The
number of rotates is set by operand2.
PUSHA No operands PUSH AX
PUSH CX Algorithm:
PUSH DX
PUSH BX
PUSH SP shift all bits right, the bit that goes off is set to CF and
PUSH BP previous value of CF is inserted to the left-most position.
PUSH SI memory, immediate
PUSH DI REG, immediate
RCR Example:
CZSOPA memory, CL
REG, CL STC ; set carry (CF=1).
unchanged MOV AL, 1Ch ; AL = 00011100b
RCR AL, 1 ; AL = 10001110b, CF=0.
RET
Store flags register in the stack.
CO
Algorithm: r r
OF=0 if first operand keeps original sign.
SP = SP - 2
PUSHF No operands Repeat following MOVSB, MOVSW, LODSB,
SS:[SP] (top of the stack) = flags
LODSW, STOSB, STOSW instructions CX times.
CZSOPA
Algorithm:
unchanged
check_cx:

RCL memory, immediate Rotate operand1 left through Carry Flag. The if CX <> 0 then
REG, immediate number of rotates is set by operand2.
do following chain instruction
When immediate is greater then 1, assembler REP chain instruction
memory, CL CX = CX - 1
generates several RCL xx, 1 instructions because go back to check_cx
REG, CL 8086 has machine code only for this instruction
(the same principle works for all other shift/rotate else
instructions).
exit from REP cycle
Algorithm:
Z
r
shift all bits left, the bit that goes off is set to CF and
previous value of CF is inserted to the right-most
position.
REPE chain instruction Repeat following CMPSB, CMPSW, SCASB, SCASW
instructions while ZF = 1 (result is Equal),
Example: maximum CX times.

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Algorithm: check_cx:

check_cx: if CX <> 0 then

if CX <> 0 then do following chain instruction


CX = CX - 1
do following chain instruction if ZF = 0 then:
CX = CX - 1 go back to check_cx
if ZF = 1 then: else
go back to check_cx exit from REPNZ cycle
else
exit from REPE cycle else

else exit from REPNZ cycle

exit from REPE cycle Z


r
Example:
see cmpsb.asm in Samples.

Z Repeat following CMPSB, CMPSW, SCASB, SCASW


r instructions while ZF = 1 (result is Zero),
maximum CX times.

Algorithm:
Repeat following CMPSB, CMPSW, SCASB, SCASW
instructions while ZF = 0 (result is Not Equal), check_cx:
maximum CX times.
if CX <> 0 then
Algorithm:
do following chain instruction
check_cx: CX = CX - 1
REPZ chain instruction if ZF = 1 then:
if CX <> 0 then go back to check_cx
else
do following chain instruction exit from REPZ cycle
CX = CX - 1
REPNE chain instruction if ZF = 0 then: else
go back to check_cx
exit from REPZ cycle
else
exit from REPNE cycle
Z
else r
exit from REPNE cycle

Z RET No operands Return from near procedure.


or even
r
immediate Algorithm:

REPNZ chain instruction Repeat following CMPSB, CMPSW, SCASB, SCASW Pop from stack:
instructions while ZF = 0 (result is Not Zero), IP
maximum CX times. if immediate operand is present: SP = SP + operand

Example:
Algorithm:
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#make_COM# memory, CL Algorithm:


ORG 100h ; for COM file. REG, CL

CALL p1 shift all bits right, the bit that goes off is set to CF and the
same bit is inserted to the left-most position.
ADD AX, 1
Example:
RET ; return to OS.
MOV AL, 1Ch ; AL = 00011100b
p1 PROC ; procedure declaration. ROR AL, 1 ; AL = 00001110b, CF=0.
MOV AX, 1234h RET
RET ; return to caller.
p1 ENDP CO
r r
CZSOPA OF=0 if first operand keeps original sign.
unchanged
Store AH register into low 8 bits of Flags register.

Return from Far procedure. Algorithm:

Algorithm:
flags register = AH

No operands Pop from stack:


IP
SAHF No operands AH bit: 7 6 5 4 3 2 1 0
RETF or even [SF] [ZF] [0] [AF] [0] [PF] [1] [CF]
CS
immediate
if immediate operand is present: SP = SP + operand bits 1, 3, 5 are reserved.

CZSOPA
CZSOPA
unchanged
r r r r r r

Rotate operand1 left. The number of rotates is set


Shift Arithmetic operand1 Left. The number of
by operand2.
shifts is set by operand2.
Algorithm:
Algorithm:

shift all bits left, the bit that goes off is set to CF and the
memory, immediate Shift all bits left, the bit that goes off is set to CF.
same bit is inserted to the right-most position. memory, immediate
REG, immediate Zero bit is inserted to the right-most position.
REG, immediate
ROL Example: SAL Example:
memory, CL
memory, CL
REG, CL MOV AL, 1Ch ; AL = 00011100b
REG, CL MOV AL, 0E0h ; AL = 11100000b
ROL AL, 1 ; AL = 00111000b, CF=0.
SAL AL, 1 ; AL = 11000000b, CF=1.
RET
RET
CO
CO
r r
r r
OF=0 if first operand keeps original sign.
OF=0 if first operand keeps original sign.

ROR memory, immediate Rotate operand1 right. The number of rotates is SAR memory, immediate Shift Arithmetic operand1 Right. The number of
REG, immediate set by operand2. REG, immediate shifts is set by operand2.

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memory, CL Algorithm: CZSOPA


REG, CL
r r r r r r
Shift all bits right, the bit that goes off is set to CF.
The sign bit that is inserted to the left-most position has
the same value as before shift. Compare words: AX from ES:[DI].
Example:
Algorithm:
MOV AL, 0E0h ; AL = 11100000b
SAR AL, 1 ; AL = 11110000b, CF=0.
ES:[DI] - AX
MOV BL, 4Ch ; BL = 01001100b set flags according to result:
SAR BL, 1 ; BL = 00100110b, CF=0. OF, SF, ZF, AF, PF, CF
SCASW No operands if DF = 0 then
RET DI = DI + 2
else
CO DI = DI - 2
r r
CZSOPA
OF=0 if first operand keeps original sign.
r r r r r r

Subtract with Borrow.

Algorithm: Shift operand1 Left. The number of shifts is set by


operand2.
operand1 = operand1 - operand2 - CF
Algorithm:
REG, memory Example:
memory, REG
SBB REG, REG STC Shift all bits left, the bit that goes off is set to CF.
memory, immediate MOV AL, 5 memory, immediate Zero bit is inserted to the right-most position.
REG, immediate SBB AL, 3 ; AL = 5 - 3 - 1 = 1 REG, immediate
SHL Example:
RET memory, CL
MOV AL, 11100000b
REG, CL
CZSOPA SHL AL, 1 ; AL = 11000000b, CF=1.
r r r r r r RET

CO
SCASB No operands Compare bytes: AL from ES:[DI]. r r
OF=0 if first operand keeps original sign.
Algorithm:
SHR memory, immediate Shift operand1 Right. The number of shifts is set
ES:[DI] - AL
REG, immediate by operand2.
set flags according to result:
memory, CL Algorithm:
OF, SF, ZF, AF, PF, CF
REG, CL
if DF = 0 then
DI = DI + 1
else Shift all bits right, the bit that goes off is set to CF.
DI = DI - 1 Zero bit is inserted to the left-most position.

Example:
MOV AL, 00000111b
SHR AL, 1 ; AL = 00000011b, CF=1.

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#make_COM#
RET ORG 100h

CO LEA DI, a1
r r MOV AL, 12h
MOV CX, 5
OF=0 if first operand keeps original sign.
REP STOSB
Set Carry flag.
RET
Algorithm:
a1 DB 5 dup(0)
CF = 1
STC No operands CZSOPA
C unchanged
1

Store word in AX into ES:[DI]. Update SI.


Set Direction flag. SI and DI will be decremented
by chain instructions: CMPSB, CMPSW, LODSB, Algorithm:
LODSW, MOVSB, MOVSW, STOSB, STOSW.

Algorithm: ES:[DI] = AX
if DF = 0 then
STD No operands DI = DI + 2
DF = 1
else
DI = DI - 2
D
1 Example:
#make_COM#
ORG 100h
STOSW No operands
Set Interrupt enable flag. This enables hardware
interrupts. LEA DI, a1
MOV AX, 1234h
Algorithm: MOV CX, 5

STI No operands IF = 1 REP STOSW

RET
I
1 a1 DW 5 dup(0)

CZSOPA
unchanged
STOSB No operands Store byte in AL into ES:[DI]. Update SI.

Algorithm:
SUB REG, memory Subtract.
memory, REG
ES:[DI] = AL REG, REG Algorithm:
if DF = 0 then memory, immediate
DI = DI + 1 REG, immediate operand1 = operand1 - operand2
else
DI = DI - 1
Example:
Example:
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6/19/24, 7:44 AM 8086 instructions 6/19/24, 7:44 AM 8086 instructions

MOV AL, 5 Algorithm:


SUB AL, 1 ; AL = 4
AL = DS:[BX + unsigned AL]
RET
Example:
CZSOPA
r r r r r r #make_COM#
ORG 100h
LEA BX, dat
MOV AL, 2
Logical AND between all bits of two operands for XLATB ; AL = 33h
flags only. These flags are effected: ZF, SF, PF.
Result is not stored anywhere. RET

These rules apply: dat DB 11h, 22h, 33h, 44h, 55h

1 AND 1 = 1 CZSOPA
1 AND 0 = 0 unchanged
0 AND 1 = 0
REG, memory 0 AND 0 = 0
memory, REG
TEST REG, REG Logical XOR (Exclusive OR) between all bits of two
memory, immediate operands. Result is stored in first operand.
REG, immediate Example:
MOV AL, 00000101b These rules apply:
TEST AL, 1 ; ZF = 0.
TEST AL, 10b ; ZF = 1. 1 XOR 1 = 0
RET 1 XOR 0 = 1
REG, memory 0 XOR 1 = 1
CZSOP memory, REG 0 XOR 0 = 0
0 r r 0 r XOR REG, REG
memory, immediate
REG, immediate Example:

Exchange values of two operands. MOV AL, 00000111b


XOR AL, 00000010b ; AL = 00000101b
Algorithm: RET

operand1 < - > operand2 CZSOPA


0 r r 0 r ?
Example:
REG, memory
XCHG memory, REG MOV AL, 5
REG, REG MOV AH, 2
XCHG AL, AH ; AL = 2, AH = 5
XCHG AL, AH ; AL = 5, AH = 2
RET
Copyright © 2002 emu8086, Inc.
CZSOPA All rights reserved.
unchanged http://www.emu8086.com

XLATB No operands Translate byte from table.


Copy value of memory byte at
DS:[BX + unsigned AL] to AL register.

https://faculty.kfupm.edu.sa/COE/shazli/coe205/Help/8086_instruction_set.html#JG 51/52 https://faculty.kfupm.edu.sa/COE/shazli/coe205/Help/8086_instruction_set.html#JG 52/52

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