Logic Design Workshop

(EET 1200)

Lab Assignment Set – 06

Design and Implementation of

Multiplexers and De-multiplexers

Submission Date: 2nd Week of May 2024

Branch: ECE Section: 23414 A2

Name Registration No. Signature
MANISH KUMAR JENA 2341010080

Department of Electronics & Communication Engineering

Institute of Technical Education and Research (Faculty of Engineering)

Siksha ‘O’ Anusandhan

(Deemed to be University)
Bhubaneswar
 6.1 AIM:

In this lab you will learn to implement encoders, decoders and some combinational circuits using
the same.

Objectives

I. Implementation of 2x1, 4x1 and 8x1 multiplexers as blocks.

II. Implementation of an 8x1 multiplexer using 4x1 and 2x1 multiplexers.
III. Implementation of a 16x1 multiplexer using 4x1 and 2x1 multiplexers.
IV. Implementation of a full adder with carry using multiplexer.
V. Implementation of a 1x4 de-multiplexer.

6.2 Equipment and Software Required

1. PC installed with Windows 10

2. QUCS Software
3. Vivado Software

6.3 Theory / Pre-lab

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 6.4 Lab Assignment

6.4.1 Objective I : 2x1, 4x1 and 8x1 Multiplexer Blocks

Outputs

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 6.4.2 Objective II : 8x1 MUX using 4x1 MUX and 2x1 MUX

Outputs

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 6.4.3 Objective III : 16x1 MUX using 4x1 MUX and 2x1 MUX

Outputs

6.4.4 Objective IV : Full Adder with Carry using MUX

Outputs

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 6.4.5 Objective V : 1x4 De-Multiplexer

Outputs

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 6.5 Conclusion

(Signature of the Student) Signature of the Faculty

Date:_____/______/_____

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