16 WEEK PLAN

DIGITAL LOGIC DESIGN LAB (EE-272)

FALL 2023
Week No. Experiment
INTRODUCTION TO DLD LAB
AIM:
1 This lab aims to introduce students with importance of the course lab, to introduce with
hardware available in lab for experiments, impart grading and lab policies.
Introduction to LogicSIM
2 Experiment #1: BASIC LOGIC FUNCTIONS:
AIM of Experiment:
Verification of Basic Logic Operations and introduction to Binary, Octal, Decimal and
Hexadecimal Number system and their interconversion.
Experiment # 2: VERIFICATION OF BASIC BINARY OPERATIONS
AIM of Experiment:
This Experiment aims to introduce 74XX Logic family and verify operations learnt in experiment
no. 1 through these logic gates.
3 Experiment # 3: UNIVERSALITY OF NAND & NOR GATES
AIM of Experiment:
Observe the universality of NAND & NOR gate as All logic circuits learnt in Experiment # 2 are
designed with NAND and NOR gates only.

COMBINATIONAL CIRCUITS
4 Experiment # 4a: HALF ADDER
AIM of Experiment:
Implementation and verification of Half Adder
Experiment # 4b: HALF Subtractor
AIM of Experiment:
Implementation and verification of Half Subtractor
5 Experiment # 5: FULL Adder
AIM of Experiment:
Implementation and verification of Full Adder
6 Experiment # 6: FULL SUBTRACTOR
AIM of Experiment:
Implementation and verification of Full Sutractor
7 Experiment # 7: KARANAUGH MAP
AIM of Experiment:
This laboratory experiment aims to simplify complex logic circuits to simple circuits, Designing
of given logical problem employing K-Map simplification.
8 Experiment # 8: CODE CONVERTERS
AIM of Experiment:
Implement and verify BCD to Excess-3 Code Conversion.
9 Experiment # 9: CODE CONVERTERS
AIM of Experiment:
Implementation and verification of BCD to Grey Code converter and verification of BCD t 7-Seg
decoder
10 Experiment # 10: Introduction to HDL
This lab aims to introduce software tool for HDL to design and simulate logic circuits before
hardware implementation.
 16 WEEK PLAN
DIGITAL LOGIC DESIGN LAB (EE-272)
FALL 2023
11 Experiment # 11a: MULTIPLEXER & DEMULTIPLEXERS
AIM of Experiment:
Implementation and verification of Multiplexer (MUX)
Experiment # 11b: MULTIPLEXER & DEMULTIPLEXERS
AIM of Experiment:
Implementation and verification of De-Multiplexer (DEMUX)
12 Experiment # 12: MAGNITUDE COMPARATOR
AIM of Experiment:
Implementation and verification of 1bit magnitude comparator

SEQUENTIAL CIRCUITS
13 Experiment # 13: LATCHES
AIM of Experiment:
Implementation and verification of SR and D Latches
14 Experiment # 14: FLIP FLOPS
AIM of Experiment:
Implementation and verification of JK flip flop.
Experiment # 15: SYNCHRONOUS COUNTERS
AIM of Experiment:
15
Implementation and verification of synchronous counters
Experiment # 16: SYNCHRONOUS COUNTERS
AIM of Experiment:
Implementation and verification of asynchronous counters

Lab Instructor: Engr. Muhammad Javaid Aslam

Lab Technician: Wajahat Abdullat