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interrupt in 8086

Interrupts in the 8086 microprocessor are mechanisms by which a program's normal execution flow is
temporarily halted to allow the processor to handle a specific event or condition. There are several
types of interrupts in the 8086 microprocessor:

1. Hardware Interrupts: These are triggered by external hardware devices. They are further
divided into:
Maskable Interrupts (INTR): These can be enabled or disabled using the Interrupt Flag
(IF). An example is the INTR pin.
Non-Maskable Interrupts (NMI): These cannot be disabled and have a higher priority. The
NMI pin is used for such interrupts.
2. Software Interrupts: These are triggered by executing the INT instruction in the program. They
are used to call operating system services or other routines. They have the following types:
INT n: The INT instruction followed by a type number (n) ranging from 0 to 255.
3. Internal Interrupts: These are also known as exceptions. They are generated by the CPU in
response to error conditions. Common examples include:
Divide-by-zero error: When a division by zero occurs, the CPU generates an interrupt.
Overflow: When an arithmetic overflow occurs.

Interrupt Vector Table

When an interrupt occurs, the 8086 looks up a predefined location in memory called the Interrupt
Vector Table (IVT) to determine the address of the interrupt service routine (ISR). The IVT is located at
the beginning of memory (0000h to 03FFh) and contains 256 vectors, each consisting of a 4-byte
address (segment
) of the ISR.

Interrupt Handling Sequence

1. The current instruction is completed.

2. The CPU fetches the interrupt vector from the IVT.
3. The CPU saves the current state by pushing the flags, the code segment (CS), and the instruction
pointer (IP) onto the stack.
4. The CPU loads the CS
with the address of the ISR.
5. The ISR executes.
6. The ISR ends with an IRET (interrupt return) instruction, which restores the previous state by
popping the flags, CS, and IP from the stack.

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 Common Interrupt Types and Their Vectors

Type 0 (Divide Error): Occurs when there is a division by zero.

Type 1 (Single Step): Used for debugging; triggers after each instruction if the Trap Flag (TF) is
set.
Type 2 (NMI): Non-maskable interrupt; typically used for critical hardware errors.
Type 3 (Breakpoint): Used by debuggers to implement breakpoints (INT 3).
Type 4 (Overflow): Triggered by the INTO instruction when the Overflow Flag (OF) is set.

Example of Software Interrupt (INT Instruction)

assembly

mov ah, 09h ; Function code for printing a string

mov dx, offset msg ; Load the offset address of the string into DX
int 21h ; Call DOS interrupt to print the string

msg db 'Hello, World!$' ; Define the string to print, terminated by '$'

In this example, `int 21h` calls a DOS service to print a string. The service number (09h) is loaded into
the AH register, and the address of the string is loaded into the DX register.

Masking and Unmasking Interrupts

The 8086 microprocessor can enable or disable maskable interrupts using the following instructions:

CLI (Clear Interrupt Flag): Disables maskable interrupts.

STI (Set Interrupt Flag): Enables maskable interrupts.

These instructions modify the Interrupt Flag (IF) in the flags register.
Understanding interrupts in the 8086 microprocessor is crucial for effective low-level programming,
especially in systems where real-time processing and hardware interfacing are

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