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CHAPTER 7

COUNTERS
CHAPTER OUTLINE
INTRODUCTION
RIPPLE COUNTER
MOD-10 RIPPLE COUNTERS
SYNCHRONOUS COUNTERS
DOWN COUNTERS
SELF-STOPPING COUNTERS
TTL AND CMOS IC COUNTERS
INTRODUCTION
Almost all complex digital system contains several
counters.
Counters job is the obvious one is of counting
events or periods of time or putting events into
sequence.
Also do some not obvious jobs: dividing frequency,
addressing, and serving as memory unit.
We will discuss several types of counters and their
uses.
Use flip-flops that wired together to form a counter.
Both TTL and CMOS are available as a counter.
RIPPLE COUNTER
Has four binary places, D,C,B,A and can count from
0000(0) to 1111(15).
The D place is MSB, and A is LSB.
This counter has 16 different output states.
This counter also called a modulo (mod)-16 counter.
The modulus of a counter is the number of different
states the counter must go through to complete its
counting cycle.
Use four J-K FF with toggle position (J and K = 1).
The output/counting sequence only depends on
clock (CLK) input.
RIPPLE COUNTER
OPERATION OF RIPPLE COUNTER
The clock (CLK) shows the J-K FF is negative-edge
triggered.
The output of 1st JK FF will go to input CLK for 2nd FF
and also will go to A binary output.
The count from 0000 to 0001 will start when the 1st CLK
pulse that given to FF 1 at negative-edge.
This change the output, Q of FF 1 from 0 to 1 and
display the binary output 0001.
When the 2nd CLK pulse to FF 1 at negative-edge, it
change FF 1 output from 1 to 0.
This generate 1st pulse from FF 1 output to FF 2. this
pulse acts as a input CLK for FF 2.
The negative-edge of FF 1 output, it will toggle the
output FF 2 from 0 to 1. This will produce the binary
output 0010. The FF 1 output already at 0 position.
OPERATION OF RIPPLE COUNTER
The processes are continuously occur to count from
0000 to 1111 and then go back to 0000.
The output of FF 1 will experience most changing
state (toggle) follow by FF 2 then FF 3 and FF 4.
The word ripple came from changing state reaction
that ripples through the counter.
For this reason, the counter called ripple counter.
Other names are, mod-16 counter, a 4-bit counter,
or an asynchronous counter.
Why called ripple and asynchronous counter
because all FF do not triggered at one time.
PROBLEM……………
MOD-10 RIPPLE COUNTERS
To count from 0000 to 1001 (decimal 0 – 9).
The Mod-10 ripple counter has four FF with CLR
input and additional of one NAND gate.
The binary outputs also have four places(D,C,B,A)
The NAND gate acts to clear all the FF back to zero
immediately after the 1001 (9) count.
At count 10 (1010) two HIGH (1) signal given to
NAND gate, this will produce the output of NAND
gate change from HIGH to LOW.
The LOW signal will activate the CLR function: to
force FF outputs to LOW (0) 🡪 clears FFs to 0000.
Then the counter starts again to count from 0000 to
1001.
HOW THE NAND GATE CLEAR ALL THE FF?
Look to the NAND gate connection, the output of
NAND gate is connected to all CLR input of the FF,
the INPUTs are connected to FF 2 (B) and FF 4 (D)
output.
So when the output of FF 2 and FF 4 goes to high
(1), all the CLR input of all FF will receive LOW (0)
signal and force the FF output change from
whatever state to LOW (0).
This means, we uses the NAND gate to reset the
counter to 0000.
This type of counter also called a decade (meaning
10) counter.
PROBLEM……………
SYNCHRONOUS COUNTERS
Previous ripple counters are asynchronous counters.
For some high-frequency operations it is necessary
to have all stages of the counter trigger together.
This counter called a synchronous counter.
For this type of counter, all inputs clock are given a
continuous pulse during counting sequence.
This called CLK inputs are connected in parallel.
A 3-BIT (MOD-8) SYNCHRONOUS COUNTER
OPERATION OF A 3-BIT SYNCHRONOUS COUNTER
Pulse 1:
⚫ Circuit action:
Each FF is pulsed by the clock.
Only FF 1 can toggle because it is the one with HIGH (1) signals
are given to both J and K inputs.
FF 1 goes from 0 to 1
⚫ Output result: 001 (decimal 1)
Pulse 2:
⚫ Circuit action:
Each FF is pulsed by the clock.
Two FFs (FF1 and FF 2) toggle because they have HIGH (1) signals
are given to both J and K inputs.
FF 1 goes from 1 to 0
FF 2 goes from 0 to 1
⚫ Output result: 010 (decimal 2)
OPERATION OF A 3-BIT SYNCHRONOUS COUNTER
Pulse 3:
⚫ Circuit action:
Each FF is pulsed by the clock.
Only one (FF 1) can be toggle.
JK Inputs for FF 2 are 0 (hold)
FF 1 goes from 0 to 1
FF 2 remains at HIGH (1) due to the HOLD (JK inputs are 0)
⚫ Output result: 011 (decimal 3)
Pulse 4:
⚫ Circuit action:
Each FF is pulsed by the clock.
All FFs toggle to opposite state (all JK input for FFs are HIGH (1)).
FF 1 goes from 1 to 0
FF 2 goes from 1 to 0
FF 3 goes from 0 to 1
⚫ Output result: 100 (decimal 4)
OPERATION OF A 3-BIT SYNCHRONOUS COUNTER
Pulse 5:
⚫ Circuit action:
Each FF is pulsed by the clock.
Only one (FF 1)can be toggle.
JK Inputs for FF 3 and FF 2 are 0 (hold)
FF 1 goes from 0 to 1
FF3 and FF 2 remains at 1 and 0 due to the HOLD (JK inputs are 0)
⚫ Output result: 101 (decimal 5)
Pulse 6:
⚫ Circuit action:
Each FF is pulsed by the clock.
Two FFs (FF1 and FF 2) toggle to opposite state
FF 1 goes from 1 to 0
FF 2 goes from 0 to 1
FF 3 hold – remain at high
⚫ Output result: 110 (decimal 6)
OPERATION OF A 3-BIT SYNCHRONOUS COUNTER
Pulse 7:
⚫ Circuit action:
Each FF is pulsed by the clock.
Only one (FF 1)can be toggle.
JK Inputs for FF 3 and FF 2 are 0 (hold)
FF 1 goes from 0 to 1
FF3 and FF 2 remains at HIGH due to the HOLD (JK inputs are 0)
⚫ Output result: 111 (decimal 7)
Pulse 8:
⚫ Circuit action:
Each FF is pulsed by the clock.
All FFs toggle to opposite state
All FFs toggle to opposite state ( 1 to 0)
⚫ Output result: 000 (decimal 0)
DOWN COUNTERS
The counter count downward (9,8,7,6,…,0).
Counter that count from higher to lower
numbers called down counter.
Operate as an asynchronous counter.
Almost similar to ripple counter, the different
only:
⚫ The FF 2 and FF 3 CLK input receive signal from Q
output.
⚫ The PS (preset) inputs for each FF are connected to
each other and uses to control the counter preset
to 111 (decimal 7).
DOWN COUNTERS 3-BIT RIPPLE DOWN COUNTER
PROBLEM……………..
SELF-STOPPING COUNTERS
Sometime user does not want the counter that count
continuously (recirculates).
Some user want a counter that will stop when a
sequence is finished.
How to have this such of counter?
(for a 3-bit down counter)
⚫ Add three input OR gate at the output.
⚫ Each of FF outputs are connected to the input OR gate.
⚫ The output of OR gate is connected to J and K input of FF
1.
⚫ So each time the input of all FFs goes 000, the output of
LOW (0) will be given to the J and K input of FF 1 and it
will HOLD the counting process for all circuit.
⚫ The counter can count again if LOW signals are given to
PS input.
A 3-BIT DOWN COUNTER WITH SELF-STOPPING
TTL IC COUNTERS 7493
A lot of TTL ICs counter available in the market.
Only two will be discussed in this sub-topic.\
The 7493 TTL 4-bit binary counter.
⚫ Has four FFs in the IC.
⚫ Can perform as 3-bit counter and 4-bit counter.
⚫ For 3-bit counter, the clock input is given to INPUT B (FF 2)
⚫ For 4-bit counter, the output of FF 1 (QA) is connected to
INPUT B externally as a clock input and the FF 1 INPUT A is
connected to clock signal.
⚫ The NAND gate is used to produce a mod-10 counter.
OPERATION OF 7493 TTL IC
The NAND gate use to change the mod-16 to mod-10
counter.
The input of NAND gate also use to reset for all FFs by
sending LOW (0) signal to CLR input.
This reset function when both NAND gate inputs are
HIGH (1).
The biquinary counter can be obtained if output QA is
connected to QD . so the QA will become MSB in the
counter.
This type of counter is used in the hand-manipulated
abacus and soroban.
The 7493 TTL IC has 14-pin.
TTL IC COUNTERS 74192
This type of TTL IC, 74192 up/down decade counter
is a synchronous counter and has many features.
Has two types 16-pin dual in-line and 20-pin surface
mount package.
PROBLEM…………..
CMOS TTL COUNTER 74HC393
Many types, only discuss two types in this sub-topic.
The 74HC393 dual 4-bit binary ripple counter.
⚫ Has 2 4-bit ripple counter.
⚫ The clock inputs are labeled by CP, instead of CLK.
⚫ The MR input is an asynchronous master reset pin.
⚫ The a 4-bit counter in 74HC393 IC consists of four T FFs.
⚫ A T flip-flops is any FF that is in the toggle mode.
CMOS TTL COUNTER 74HC193
The 74HC193 presettable synchronous 4-bit binary
up/down counter.

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