AmosLeeChiunShian 17207305 Thesis V2

AN ULTRA-LOW-POWER VOLTAGE-CONTROLLED-
OSCILLATOR (VCO) FOR BLUETOOTH-LOW-ENERGY

INTERNET-OF-THINGS (IOT) APPLICATIONS
AMOS LEE CHIUN SHIAN
FACULTY OF ENGINEERING
UNIVERSITY OF MALAYA
KUALA LUMPUR
2023
AN ULTRA-LOW-POWER VOLTAGE-CONTROLLED-
OSCILLATOR (VCO) FOR BLUETOOTH-LOW-
ENERGY INTERNET-OF-THINGS (IOT)
APPLICATIONS
AMOS LEE CHIUN SHIAN
RESEARCH PROJECT SUBMITTED TO THE

DEPARTMENT OF ELECTRICAL ENGINEERING
UNIVERSITI MALAYA IN PARTIAL FULFILMENT OF
THE REQUIREMENTS FOR THE DEGREE OF
BACHELOR OF ELECTRICAL ENGINEERING
FACULTY OF ENGINEERING
KUALA LUMPUR
2023
ORIGINAL LITERARY WORK DECLARATION
Name of Candidate: Amos Lee Chiun Shian (I.C/Passport No: 000601-04-0359)

Matric No: 17207305/1
Name of Degree: Bachelor of Electrical Engineering
Title of Thesis : An Ultra-Low-Power Voltage-Controlled Oscillator (VCO) for
Bluetooth-Low-Energy (BLE) Internet-of-Things (IoT) Application
Field of Study:
I do solemnly and sincerely declare that:

(1) I am the sole author/writer of this Work;
(2) This Work is original;
(3) Any use of any work in which copyright exists was done by way of fair dealing
and for permitted purposes and any excerpt or extract from, or reference to or
reproduction of any copyright work has been disclosed expressly and
sufficiently and the title of the Work and its authorship have been
acknowledged in this Work;
(4) I do not have any actual knowledge nor do I ought reasonably to know that the
making of this work constitutes an infringement of any copyright work;
(5) I hereby assign all and every rights in the copyright to this Work to the
University of Malaya (“UM”), who henceforth shall be owner of the copyright
in this Work and that any reproduction or use in any form or by any means
whatsoever is prohibited without the written consent of UM having been first
had and obtained;
(6) I am fully aware that if in the course of making this Work I have infringed any
copyright whether intentionally or otherwise, I may be subject to legal action
or any other action as may be determined by UM.
Candidate’s Signature Date: 15/6/2023
Subscribed and solemnly declared before,
Witness’s Signature Date:
Name:
Designation:
ii
AN ULTRA-LOW-POWER VOLTAGE-CONTROLLED-OSCILLATOR (VCO)
FOR BLUETOOTH-LOW-ENERGY(BLE) INTERNET-OF-THINGS (IOT)
APPLICATIONS
ABSTRACT
This work presents an innovative Ultra-Low-Power Voltage-Controlled Oscillator
(VCO) designed for Bluetooth-Low-Energy (BLE) Internet-of-Things (IoT) applications.
The VCO utilizes a Complementary Class-C oscillator topology with dual second
harmonic LC filtering tanks to improve performance. It employs a head and tail LC filter
that operates at twice the VCO frequency, mitigating flicker noise conversion. A 4-bits
SCA (Switched-Capacitor Array) is used for both the main LC tanks and head/tail filters
to ensure consistent phase noise performance across the tunable frequency range.
Simulations in 65nm CMOS technology show a tuning range of 25.54% (2.4-to-3.1 GHz)
with excellent phase noise performance of 128.1 dBc/Hz (@1MHz) and a power
consumption of 1.273mW at 2.4 GHz. The VCO's ultra-low-power design makes it
suitable for battery-operated IoT devices, enhancing the reliability of IoT communication
systems. In summary, this paper introduces a highly efficient VCO solution tailored for
BLE IoT applications. The Complementary Class-C topology and dual second harmonic
LC filtering tanks contribute to improved signal quality and reduced interference. The
incorporation of the 4-bits SCA ensures consistent performance across different
frequency settings, making it suitable for a wide range of applications. The simulations
validate the feasibility and effectiveness of the proposed VCO design, highlighting its
potential for practical implementation in BLE IoT systems. Overall, this work addresses
critical challenges in low-power wireless communication systems, presenting a novel
approach to achieve optimal performance in BLE IoT devices.
Keywords: Voltage-Controlled Oscillator (VCO), Bluetooth-Low Energy, Internet-of-
Things (IoT), Complementary Class-C Oscillator, LC Filter
iii
VOLTAN TERKAWAL-OLEH-VOLTAN (VCO) ULTRA-RENDAH-KUASA
UNTUK APLIKASI BLUETOOTH-LOW-ENERGY (BLE) INTERNET-OF-
THINGS (IOT)
ABSTRAK
Kerja ini mempersembahkan satu inovasi Osilator Voltan Terkawal oleh Voltan
(VCO) Ultra-Rendah-Kuasa yang direka khusus untuk aplikasi Bluetooth-Low-Energy
(BLE) Internet-of-Things (IoT). VCO ini menggunakan topologi osilator Kelas-C
Komplementer dengan tangki penapisan LC harmonik kedua untuk meningkatkan
prestasi. Ia mengaplikasikan penapis LC kepala dan hujung yang beroperasi pada dua kali
ganda frekuensi VCO, meredakan pengkalan kebisingan berkelipan. SCA 4-bit (Susunan
Kapasitor Bertukar) digunakan pada tangki LC utama dan penapis kepala/hujung untuk
menjamin prestasi kebisingan fasa yang konsisten dalam julat frekuensi yang boleh ditala.
Simulasi dalam teknologi CMOS 65nm menunjukkan julat penalaan sebanyak 25.54%
(2.4-3.1 GHz) dengan prestasi kebisingan fasa yang cemerlang iaitu 128.1 dBc/Hz
(@1MHz) dan penggunaan kuasa serendah 1.273mW pada 2.4 GHz. Reka bentuk VCO
ini sesuai untuk peranti IoT bateri. Kesimpulannya, kertas ini memperkenalkan satu
penyelesaian VCO yang sangat cekap khusus untuk aplikasi BLE IoT. Topologi Kelas-C
Komplementer dan tangki penapisan LC harmonik kedua ganda menyumbang kepada
peningkatan kualiti isyarat dan pengurangan gangguan. Penggunaan SCA 4-bit menjamin
prestasi yang konsisten dalam pelbagai tetapan frekuensi, menjadikannya sesuai untuk
pelbagai aplikasi. Simulasi menyahkan keberkesanan reka bentuk VCO yang
dicadangkan, menunjukkan potensinya untuk pelaksanaan praktikal dalam sistem BLE
IoT. Keseluruhannya, penyelidikan mempersembahkan pendekatan baru untuk mencapai
prestasi optimal dalam peranti BLE IoT.
Kata Kunci: Oskilator Dikawal Tegangan (VCO), Bluetooth Rendah Tenaga, Internet
Perkara (IoT), Oskilator Kelas-C Komplementari, Penapis LC
iv
ACKNOWLEDGEMENT
I would like to extend my sincere appreciation to Professor Ir. Dr. Harikrishnan
A/L Ramiah, the supervisor of my final year project, for his uninterrupted guidance,
outstanding assistance, and motivation throughout the entire research process. Moreover,
he has consistently served as an excellent lecturer, providing me with a comprehensive
understanding of the field of analog design. His scholarly recommendations, precise
directions, and scientific approach have greatly propelled me in achieving this task.
I also owe a debt of gratitude to Professor Hari's Postgraduate student, Mikki Loo
How-Wen, who has been assisting me since the initiation of this project. From conducting
the literature review to formulating circuit designs, Mikki has consistently been prepared
to offer valuable advice and guidance.
Furthermore, I would like to express my special thanks to my fellow
undergraduates, Alvin Kean Jun Xiang, Tan Hong Jian, and Ng Zhe Yau, for their
invaluable support throughout this endeavour. From the very beginning of this project,
we have exchanged feedback and recommendations, despite working on different topics.
Lastly, I feel immensely grateful to my family members, particularly my parents,
for their love, prayers, and care during the duration of this research. Without their
continual encouragement and support, none of this would have been achievable.
v
TABLE OF CONTENTS
Abstract ........................................................................................................................... iii
Abstrak ............................................................................................................................. iv
Acknowledgement ............................................................................................................. v
Table of Contents ............................................................................................................. vi
List of Figures ................................................................................................................... x
List of Tables ................................................................................................................. xiii
List of Symbols and Abbreviations ................................................................................ xiv
CHAPTER 1 : INTRODUCTION ................................................................................. 1
1.1 Background.............................................................................................................. 1
1.1.1 Voltage-Controlled Oscillator (VCO)............................................................... 5
1.1.2 Internet-of-Things (IoT).................................................................................... 7
1.1.3 Wireless Sensor Network (WSN) ..................................................................... 8
1.1.4 Ultra Low Power (ULP) Design ....................................................................... 9
1.1.5 Bluetooth Low Energy (BLE) ......................................................................... 10
1.1.6 CMOS Technology ......................................................................................... 13
1.2 Problem Statement................................................................................................. 14
1.3 Motivation ............................................................................................................. 16
1.4 Objectives .............................................................................................................. 18
vi
CHAPTER 2 : LITERATURE REVIEW ................................................................... 19
2.1 Performance Indicator of Voltage Controlled Oscillator (VCO) .......................... 19
2.1.1 Phase Noise ..................................................................................................... 19
2.1.2 Power Consumption ........................................................................................ 19
2.1.3 Figure-of-Merit (FoM) .................................................................................... 20
2.1.4 Oscillation Frequency of LC VCO ................................................................. 20
2.2 Classes of Voltage-Controlled Oscillator (VCO) .................................................. 21
2.2.1 Class-B VCO .................................................................................................. 21
2.2.2 Class-C VCO .................................................................................................. 23
2.3 LC VCO Design Optimization Approach ............................................................. 25
2.3.1 Inductance Optimization Strategy................................................................... 26
2.3.2 Varactor Optimization Strategy ...................................................................... 27
2.3.3 Active Circuit Optimization Strategy ............................................................. 27
2.4 Techniques on Improving Performance of VCO................................................... 28
2.4.1 LC VCO Topologies ....................................................................................... 28
2.4.2 Filtering Technique ......................................................................................... 33
2.4.3 Switched Capacitor Array (SCA) ................................................................... 45
2.5 State-of-the-Arts VCO........................................................................................... 47
CHAPTER 3 : METHODOLOGY .............................................................................. 48
3.1 Flow Chart of Design Flow ................................................................................... 48
3.2 Phase 1: Literature Review .................................................................................... 49
vii
3.3 Phase 2: CMOS Technology Selection ................................................................. 49
3.4 Phase 3: Schematic Level Design .......................................................................... 49
3.4.1 Design of VCO Circuit ................................................................................... 50
3.4.2 Implementation of Filter Technique ............................................................... 54
3.5 Phase 4: Physical Layout Design........................................................................... 55
3.6 Phase 5: Parasitic Extraction & Post-Layout Design ............................................ 55
CHAPTER 4 : RESULTS AND DISCUSSION......................................................... 56
4.1 VCO Architecture Simulation ............................................................................... 56
4.1.1 Class-B VCO Architecture Simulation ........................................................... 56
4.1.2 Class-C VCO Architecture Simulation ........................................................... 59
4.1.3 Comparison of Class-B and Class-C VCO ..................................................... 61
4.2 LC Filter Technique .............................................................................................. 63
4.2.1 Class-B NMOS Cross-Coupling VCO ........................................................... 63
4.2.2 Class-B CMOS Cross-Coupling VCO ............................................................ 64
4.2.3 Class-C NMOS Cross-Coupling VCO ........................................................... 65
4.2.4 Class-C CMOS Cross-Coupling VCO ............................................................ 66
4.2.5 Comparison of VCO with and without LC Filter ........................................... 67
4.3 Proposed Complementary Class-C VCO with Dual Second Harmonic LC Filtering
Tanks ........................................................................................................................... 69
4.4 Simulated Phase Noise and Figure-of-Merit (FoM) .............................................. 71
4.5 Physical Layout ..................................................................................................... 74
4.6 Comparison with Current State-of-The-Arts VCO ............................................... 75

viii
CHAPTER 5 : CONCLUSION AND FUTURE WORK........................................... 77
5.1 Conclusion ............................................................................................................. 77
5.2 Future Work........................................................................................................... 78
5.3 Impact of Work to Environment and Study .......................................................... 80
CHAPTER 6 : REFERENCES .................................................................................... 82
ix
LIST OF FIGURES
Figure 1.1 Cellular IoT connections by Segment and Technology ................................... 1
Figure 1.2 Mobile subscriptions by technology (billion) .................................................. 2
Figure 1.3 Trends for worst case electricity usage until 2030 .......................................... 3
Figure 1.4 Building block of Phase-Locked Loop (PLL) ................................................. 6
Figure 1.5 IoT Applications sectors .................................................................................. 7
Figure 1.6 Wireless Sensor Network (WSN) System ....................................................... 8
Figure 1.7 Trade-off between power consumption and battery's lifespan ...................... 12
Figure 1.8 Cross-section of CMOS ................................................................................. 13
Figure 1.9 RF Design Trade-off Parameter ..................................................................... 14
Figure 2.1 Class-B VCO ................................................................................................. 21
Figure 2.2 Comparison of Ideal and Simulated Phase Noise and FoM of Class-B ........ 22
Figure 2.3 (a) Class-B VCO; (b) Class-C VCO .............................................................. 23
Figure 2.4 Performance Deviation of Phase Noise due to PVT variation....................... 24
Figure 2.5 Design Methodology for ULP LC VCO ........................................................ 25
Figure 2.6 VCO with NMOS Cross-Coupling ................................................................ 29
Figure 2.7 VCO with PMOS Cross-Coupling................................................................. 30
Figure 2.8 VCO with NMOS PMOS Cross-Coupling .................................................... 31
Figure 2.9 VCO with Inductive Degeneration Technique .............................................. 33
Figure 2.10 Phase Noise with and without Inductive Degeneration Source ................... 34
Figure 2.11 VCO with and without Dual Inductive Degeneration Source ..................... 35
Figure 2.12 Phase Noise with and without Dual Inductive Degeneration Source .......... 35
Figure 2.13 VCO with LC Tail Filter.............................................................................. 36
Figure 2.14 Instantaneous Frequency of LC VCO with and without LC filter respectively
......................................................................................................................................... 37
Figure 2.15 VCO with NMOS tail current and PMOS tail current respectively ............ 38
x
Figure 2.16 Impulse Sensitivity Function (ISF) Schema of VCO .................................. 38
Figure 2.17 VCO with Dual Current-Shaping Technique............................................... 39
Figure 2.18 Circuit current consumption as compared to output voltage ....................... 40
Figure 2.19 VCO with feedback injection mechanism ................................................... 40
Figure 2.20 Phase Noise comparison between conventional and proposed VCO .......... 41
Figure 2.21 Tailless VCO................................................................................................ 42
Figure 2.22 Transconductance comparison on conventional VCO and proposed VCO. 42
Figure 2.23 Top-biased VCO .......................................................................................... 43
Figure 2.24 VCO using top-biased current source .......................................................... 44
Figure 2.25 Switched Capacitor Array ............................................................................ 45
Figure 3.1 Flow chart on the design of VCO .................................................................. 48
Figure 3.2 Complementary Class-C VCO....................................................................... 51
Figure 3.3 Graph of Q factor as a factor of Frequency due to Number of Turns............ 53
Figure 3.4 Graph of Q factor as a factor of Frequency due to Inner Radius ................... 53
Figure 3.5 Graph of Q factor as a factor of Frequency due to Inductor Width ............... 54
Figure 3.6 LC Filter......................................................................................................... 55
Figure 4.1 Schematic of Class-B NMOS Cross-Coupled VCO ...................................... 57
Figure 4.2 Schematic of Class-B CMOS Cross-Coupled VCO ...................................... 58
Figure 4.3 Schematic of Class-C NMOS Cross-Coupled VCO ...................................... 59
Figure 4.4 Schematic of Class-C CMOS Cross-Coupled VCO ...................................... 60
Figure 4.5 Comparison of VCO topology in terms of Power Consumption plotted against
Frequency ........................................................................................................................ 62
Figure 4.6 Comparison of VCO topology in terms of Phase Noise plotted against
Frequency ........................................................................................................................ 62
Figure 4.7 Class-B NMOS Cross-Coupled VCO with LC Filter .................................... 63
Figure 4.8 Class-B CMOS Cross-Coupled VCO with LC Filter .................................... 64
xi
Figure 4.9 Class-C NMOS Cross-Coupled VCO with LC Filter .................................... 65
Figure 4.10 Class-C CMOS Cross-Coupled VCO with LC Filter .................................. 66
Frequency with presence of LC Filter ............................................................................. 67
Figure 4.12 Comparison of VCO topology in terms of Power Consumption plotted against
Frequency with presence of LC Filter ............................................................................. 68
Figure 4.13 Proposed Complementary Class-C VCO with Dual Second Harmonic LC
Filtering Tanks ................................................................................................................ 69
Figure 4.14 Implemented 4-Bits Switched Capacitor Array ........................................... 71
Figure 4.15 Simulated Phase Noise vs Offset Frequency ............................................... 71
Figure 4.16 Simulated Figure-of-Merit vs Offset Frequency ......................................... 72
Figure 4.17 Simulated Phase Noise vs Oscillating Frequency........................................ 72
Figure 4.18 Simulated Figure-of-Merit vs Oscillating Frequency .................................. 73
Figure 4.19 Physical Layout of Proposed VCO .............................................................. 74
xii
LIST OF TABLES
Table 1.1 Various Wireless Technology Characteristics ............................................... 11
Table 2.1 Phase Noise Performance Result ................................................................... 31
Table 2.2 State-of-the-art VCO ....................................................................................... 47
Table 4.1 Results of Class-B NMOS Cross-Coupled VCO ............................................ 57
Table 4.2 Results of Class-B CMOS Cross-Coupled VCO ............................................ 58
Table 4.3 Results of Class-C NMOS Cross-Coupled VCO ............................................ 60
Table 4.4 Results of Class-C CMOS Cross-Coupled VCO ............................................ 61
Table 4.5 Results of Class-B NMOS Cross-Coupled VCO with LC Filter .................... 64
Table 4.6 Results of Class-B CMOS Cross-Coupled VCO with LC Filter .................... 65
Table 4.7 Results of Class-C NMOS Cross-Coupled VCO with LC Filter .................... 65
Table 4.8 Results of Class-C CMOS Cross-Coupled VCO with LC Filter .................... 66
Table 4.9 Comparisons of Proposed Design’s Phase Noise Performance, Power
Consumption and Figure-of-Merit (FoM) with Current State-of-The-Arts VCOs ......... 76
xiii
LIST OF SYMBOLS AND ABBREVIATIONS
VCO : Voltage-Controlled Oscillator
IoT : Internet-of-Things
GACR : Compound Annual Growth Rate
WCDMA : Wideband Code Division Multiple Access
HSPA : High Speed Packet Access
GSM : Global System for Mobiles
PED : Portable Electronic Devices
BLE : Bluetooth Low Energy
RF : Radio Frequency
ULP : Ultra-Low Power
LNA : Low Noise Amplifiers
PA : Power Amplifiers
PLL : Phase-Locked Loops
PD : Phase Frequency Detector
LP : Loop Filter
CP : Charge Pump
LC : Inductance Capacitance
IP : Internet Protocol
AI : Artificial Intelligence
ML : Machine Learning
WSN : Wireless Sensor Network
FHSS : Frequency-Hopping Spread Spectrum
CMOS : Complementary Metal Oxide Semiconductor
FoM : Figure-of-Merits
xiv
CHAPTER 1 : INTRODUCTION
1.1 Background
Throughout the past two decades, the field of science and technology have been
progressing rapidly, in conjunction with the initialization of 5G wireless communication.
These rapid developments lead to the generalization of devices and innovations associated
to 5G concept, or Internet-of-Things applications. (Pang et al., 2022) In fact, more devices
would be integrated to a part of the global network, implying for a better standard of
living and assurance of connectivity across the globe from anywhere at any time.
Figure 1.1 Cellular IoT connections by Segment and Technology (Ericsson, 2022)
As depicted in Figure 1.1, which projects the expected growth of cellular IoT
connections up to year 2028, it encompasses the network availability across a myriad of
technology segments. The figure further illustrates the hitherto booming of technology
sector where the demand and usage for cellular has drastically increased. Moreover, the
IoT market has observed an annual growth rate of 20% GACR (Compound Annual
Growth Rate). (Al-Sarawi et al., 2020) The rise or spike in growth rate is attributed to
enablement of cellular IoT connectivity that opened the way for ubiquitous intelligence,
which sees the Internet-of-Things (IOT) as the basis of building block in this era.
(Shafique et al., 2020)
1
Figure 1.2 Mobile subscriptions by technology (billion) (Ericsson, 2022)
Figure 1.2 forecasts the annual growth rate of mobile subscriptions up to year
2028 which further portrays on the declination of WCDMA/HSPA (3G) and
GSM/EDGE-only (2G) subscriptions throughout the years. Subscriptions for LTE (4G)
continue to rise, increasing by 41 million to nearly 5 billion in Q3 2022. Subscriptions for
4G are expected to peak at 5.2 billion by the end of 2022, then fall to roughly 3.6 billion
by the end of 2028 as consumers shift to the use of 5G. In a simpler context, 5G is
expected to be the dominant market player across the globe by the end of 2028. (Ericsson,
2022)
In response to those concepts of multiple integration and back-to-back
communication between IoT devices, power consumption becomes a crucial aspect that
must be emphasized. Figure 1.3 which showcases on the dramatic rise in electricity use
case, further highlights the need for a more efficient power consumption.
2
Figure 1.3 Trends for worst case electricity usage until 2030 (Andrae & Edler,
2015)
With the enablement of 5G network and Internet-of-Things (IoT) concept
revolving around, the demand for electronic applications that has better capability, low
latency and high throughout skyrocketed. Hence, power consumption becomes more
extensive as wireless communication technology processes at higher data rate which
depletes the overall lifespan of the devices. (Shafique et al., 2020) Moreover, as Internet-
of-Things application flourishes, Portable Electronic Devices (PED) that is powered by
battery can be seen spiking in the global market. However, ever since the introduction of
Li-Ion batteries to the market, there is no significant alternative for Li-Ion batteries that
has better battery capacity. (Wu et al., 2022) Although there is improvisation, new
innovation that can replace Li-Ion battery has yet to appear. That is to say, the
minimization of power consumption for electronic devices must take place within the
circuit.
3
In light of low power consumption being the main goal for every Internet-of-
Things application, Bluetooth Low Energy (BLE) technology, which operates in the range
of 2.4G Hz spectrum became a fundamental standard in consumer devices with its ability
to facilitates interaction between users and surrounding devices upon implemented with
BLE. (Darroudi et al., 2020) A Bluetooth Low Energy (BLE) in Radio Frequency (RF)
applications will consume an average power of 4-5mW which is not suitable for large
scale implementation in devices requiring extended lifespan or self-power operation.
(Chen et al., 2019)
As a mean to configure a low power consumption topology within a RF circuit,
the demand on Ultra-Low Power (ULP) design became more apparent. As compared to
the other building blocks within a Radio Frequency (RF) application, the development of
ULP RF oscillator becomes more demanding as oscillator is the most power-hungry
circuits in a BLE RF application. (Zhang et al., 2019) Depending on the different
application, RF oscillators is often required to operate across certain frequency range. A
Voltage-Controlled Oscillator (VCO) is essential in RF wireless transceivers because IoT
devices require oscillators to be flexible enough to be cover a broad frequency range.
(Kumar et al., 2019)
4
1.1.1 Voltage-Controlled Oscillator (VCO)
With the recent progressive advancement, high-speed wireless and
communication technology that enables IoT applications has been the main research focus,
while low cost and low power transceivers with small form factor and excellent
performance is still highly sought in both industrial and academic area. (Macaitis &
Navickas, 2015) The fundamental component of a wireless system is called a "trans-
ceiver," which is a mix of the words "transmitter" and "receiver." Transceiver can be both
the sending and receiving end of a data transfer, acting as both a transmitter and a receiver.
Data converters, Low Noise Amplifiers (LNA), Power Amplifiers (PA), and
Phase-Locked Loops (PLL) are all core components of a transceiver, while PLL that
perform as a frequency synthesiser stands crucial. (Díaz-Rizo et al., 2022) The PLL is
actually a signal control mechanism that ensures the output signal's phase matches the
input signal. The system is made up of a few unit blocks, mainly, Phase Frequency
Detector (PD), Loop Filter (LF), Charge Pump (CP) and Voltage-Controlled Oscillator
(VCO). (Askari & Saneei, 2019) Among them, VCO is the critical unit block that
generates the output signal of PLL by producing oscillating frequency for control voltage.
(Rajalingam et al., 2021)
5
Figure 1.4 Building block of Phase-Locked Loop (PLL) (Gira et al., 2021)
As the name suggests, a voltage-controlled oscillator (VCO) is an electrical
oscillator in which the oscillator's oscillation frequency is regulated by the voltage input.
(Tsuruoka et al., 2020) Apart for being used in PLL, VCO is generally used in frequency
modulation, phase modulation, and synthesizers. Generally, there are two types of VCO,
namely, ring-VCO and LC VCO. LC VCO is preferred over Ring VCO in the design of
IoT applications as it has lower phase noise, which generally improves the quality of
output signal. (Rajalingam et al., 2021)
6
1.1.2 Internet-of-Things (IoT)
The Internet-of-Things (IoT), enables the system and devices’ integration and
connectivity via Internet. In short, IoT can be said defined as a network of physical
devices that is capable of interacting with both internal and external surroundings. In fact,
each object belongs to the IoT, has an identifier or IP address associated with them for
internet connectivity and addressing. By enabling such connectivity, system that
compromises of computing devices, digital systems, sensors, etc, permits the inter-
exchange of data over the network without human’s supervision. (Vyas et al., 2015)
Figure 1.5 IoT Applications sectors (Pang et al., 2022)
Nowadays, the global market has been dominated by IoT innovations, whereby it
is forecasted that by 2025, more than 100 billion devices will be connected across the
Internet and contributing to the global market at the value of 11$ trillion per year. (Rad
& Ahmada, 2017) Aligned with the IoT trend, business also experiences evolution and
transformation that transcend beyond the imaginary of humanity where automation and
intelligence – Artificial Intelligence (AI) and Machine Learning (ML), attempts to mimic
the natural intelligence of human. (Esenogho et al., 2022) Figure 1.5 further depicts the
applications of IoT in various field such as healthcare, industry, automation, agriculture
and etc.
7
1.1.3 Wireless Sensor Network (WSN)
Wireless Sensor Network (WSN) is a core unit of IoT, which can be branched into
various fields for real-time manner applications. WSN is applicable in a myriad of control
systems under the implementation of IoT concept for monitoring purposes, automation
and etc. In fact, WSN is composed of tiny collections of sensors that is usually powered
by batteries and routing nodes (Majid et al., 2022).
Upon the gradual progression in such technology, where more sensors are
connected towards a centralized system, power consumptions issue tend to arise.
Moreover, as WSN tend to be deployed in region where there is limited access to human
intervention, the efficiency and durability of the sensors became an emphasis. In actual
fact, durability of IoT applications couple towards the power uptake by the sensors.
(Gulati et al., 2022) Hence, focus on developing an Ultra-Low Power devices became
the pivot for IoT breakthrough. Figure 1.6 portrays the WSN system which routes the
pathways towards monitoring and controlling a phenomenon.
Figure 1.6 Wireless Sensor Network (WSN) System (Jeong et al., 2019)
8
1.1.4 Ultra Low Power (ULP) Design
Recent years, Ultra-Low Power (ULP) concept has been adopted and integrated
as part of the key-enabler towards the development of Internet-of-Things applications.
Upon stumbling across the rapid development of IoT and WSN, energy-efficient sensor
applications became popular with operating power within the sub-mW while being
inexpensive. (Tamura et al., 2020) ULP radios is widely applied in autonomous Wireless
Sensor Network (WSN) and in healthcare devices via Wireless Body Area Network
(WBAN). (Elhayatmy et al., 2018)
To ensure long lifespan for IoT devices, especially on Portable Electronic Devices
(PDE), it is crucial to minimize the power consumption of the power-hungry transceiver
block while maintaining adequate sensitivity level. (Wentzloff et al., 2020) Moreover,
innovations at system architecture level and circuits implementations are deemed
essential for a ULP transceiver. Towards the direction of ULP circuit design, Bluetooth
Low Energy (BLE) or Bluetooth Smart is adapted towards wireless communication
topology thanks to the low power consumption provided by BLE. (Bulić et al., 2019)
9
1.1.5 Bluetooth Low Energy (BLE)
When Bluetooth is operating in the 2.4 GHz radio frequency (RF) band, it delivers
packets over several 1 MHz channels of bandwidth to link Portable Electronic Devices
(PDE). As opposed to Bluetooth Classic, Bluetooth Low Energy (BLE) is an upgraded
version of Bluetooth Classic that focuses on ultra-low power applications, particularly on
battery powered IoT devices. (Darroudi et al., 2020) Frequency-Hopping Spread
Spectrum, or FHSS, is used by BLE to broadcast data over 40 channels at data rates
requiring 1 to 100 mW of power. (Qadir et al., 2018)
Table 1.1 further depicts the comparison in terms of power consumption for BLE
with existing wireless technology. And it is noticeable that BLE consumes little power in
mW while achieving satisfactory overall characteristics.
10
Table 1.1 Various Wireless Technology Characteristics (Rahman & Chakraborty,
2018)
Besides, BLE devices can seamlessly enable internal and external data exchange
without the requirements for extra access points. As aforementioned, batteries typically
power the majority of Internet of Things (IoT) devices, and when implemented in
accordance with the BLE protocol, BLE sensors' battery lives still fall within the range of
one year. (Abdelatty et al., 2021) To prevent the recycling of batteries at a large scale, it
is important to adopt techniques to reduce power consumption jointly with BLE for
notable power consumption, preserving the lifespan of devices and reducing carbon-
footprint.
11
Figure 1.7 Trade-off between power consumption and battery's lifespan (Abdelatty et
al., 2021)
12
1.1.6 CMOS Technology
Complementary Metal Oxide Semiconductor (CMOS) is a dominant building
block in production of Integrated Circuit (IC). CMOS is made up of Metal Oxide
Semiconductor Field-Effect Transistors (MOSFET) where each MOS transistor
compromises three terminals; Source (S), Drain (D) and Gate (G). The term
“complimentary” in CMOS is regards to the combination of both P-type and N-type
semiconductors. (Chen & Touba, 2009) PMOS is built on N-doped substrate with its
Source and Drain region doped with P-type material while NMOS is built on P-doped
substrate with its Source and Drain region doped with N-type material.
Figure 1.8 Cross-section of CMOS (Devnath et al., 2021)
As CMOS technology employs both N-type and P-type transistors in the
development of logic functions, a signal that turns on one transistor type is utilised to turn
off the other and vice-versa. Hence, replacing the need for pull-up resistors. The key
advantage of CMOS is the reduced power dissipation since they require no electrical
current except when they are changing from one state to another during circuit switching.
This results in a substantial improvement of circuit performance since it permits the
integration of more CMOS gates on an integrated circuit.
13
1.2 Problem Statement
IoT devices often have limited power sources, such as small batteries or energy
harvesting capabilities, and need to operate for long periods of time without being
recharged or replaced. Ultra-low power consumption allows these devices to conserve
energy and extend their operational life. Additionally, reducing power consumption can
also help to reduce the overall cost of the device, as well as make it more environmentally
friendly. With that said, the wireless transceiver is an important part of IoT systems,
where it converts the digital data from the IoT device into an RF (radio frequency) signal
for transmission and receives RF signals from other devices, converting them back into
digital data for processing.
A Voltage-Controlled Oscillator (VCO) is used in a transceiver, which is a device
that can both transmit and receive signals, to generate the local oscillator (LO) signal. As
VCO is one of the main contributors to the overall power consumption of the transceiver.
An Ultra-Low Power VCO can help to reduce the overall power consumption of the
device. This is particularly important for IoT devices, which often have limited power
sources and need to operate for long periods of time without being recharged or replaced.
Figure 1.9 RF Design Trade-off Parameter (Enz et al., 2017)
Designing a VCO involves a trade-off between power consumption and
performance. Reducing power consumption typically results in lower performance and

14
vice versa. This trade-off must be carefully considered in order to achieve the desired
balance between power consumption and performance. (Razavi, 2021) This is also one
of the reasons why ULP VCO circuit design is difficult.
In IoT (Internet of Things) applications, VCOs are used in a variety of ways, such
as in wireless communication, sensor networks, and control systems. The ability to tune
the VCO across a frequency range is important in these applications due to spectrum
efficiency, frequency hopping, dynamic channel and low power consumption. A tuneable
VCO allows for the device to adjust its operating frequency to avoid interference with
other signals and to improve spectrum efficiency while optimizing communication using
lowest power consumption in dynamic channel allocation with fast-paced switching.
Bluetooth Low Energy (BLE) is a wireless communication technology that is
designed for low power consumption and low cost. It is a variation of the classic Bluetooth
technology and is optimized for use in IoT (Internet of Things) and other low-power
devices. It operates in the 2.4 GHz ISM band, has a data rate of 1 Mbps, a typical range
of 30-50 meters and low power consumption. It also provides security features and
defined profiles for communication and supports advertising and point-to-point and point-
to-multipoint connections.
The problem as described above justify the need to design an Ultra-Low Power
Voltage-Controlled Oscillator that supports the application of IoT Applications.
Furthermore, the trade-off between power consumption and performance of VCO must
be taken into account during the circuit design of a VCO within BLE band that consume
minimal power while still providing a stable, accurate output signal. This is particularly
important for IoT devices, which often have limited power sources and need to operate
for long periods of time without being recharged or replaced.
15
1.3 Motivation
Presently, transceiver is implemented in almost all the Internet-of-Things
applications or RF applications, minimal power consumption by such devices is necessary
to further promote the innovation in this field. Moreover, as IoT devices begin to envelop
the life of humanity, reducing the power consumption of the devices would
unconditionally reduce the carbon footprint across the globe. From the extensive research
done, Voltage-Controlled Oscillator (VCO) is deemed to be the most power-hungry unit
block in a transceiver.
Voltage-Controlled Oscillator which composes of pure local oscillator is a critical
building blocks in wireless or wireline transceiver, operates at frequency which decides
the out-of-band phase of Phase-Locked-Loop (PLL). As a result, academic and corporate
researchers have spent the last decade focusing on phase noise reduction and decreasing
VCO power consumption. However, there is a trade-off connection between phase noise
and power usage. While phase noise reduction is necessary for high precision signal
production applications, it is not appropriate for IoT devices due to their restricted power
budget. Once these limitations are leveraged, IoT devices can be manufactured at low
cost with low power consumption and high precision signal output.
The motivation behind selecting the Class-C VCO topology for Bluetooth Low
Energy (BLE) applications stems from its exceptional suitability and advantages in
meeting the specific requirements of BLE technology. Class-C VCOs offer a perfect
balance between power efficiency and phase noise performance, making them an ideal
choice for energy-constrained IoT devices. BLE is designed for low-power applications,
necessitating VCOs that can operate within a limited power budget while maintaining
reliable communication.
16
Class-C VCOs exhibit high efficiency, consuming minimal power during
operation, thus extending the operational life of battery-powered BLE devices.
Additionally, their inherent characteristics enable them to achieve acceptable phase noise
levels, ensuring stable and accurate signal generation for wireless communication. By
incorporating LC head and tail filters, the proposed design further enhances the phase
noise performance of the Class-C VCO, enabling it to meet the stringent requirements of
BLE. Therefore, selecting the Class-C VCO topology is motivated by its ability to provide
the necessary power efficiency, wide frequency range coverage, and excellent phase noise
performance essential for successful BLE applications.
In this project, an Ultra-Low-Power Voltage-Controlled Oscillator (VCO) for
Bluetooth-Low-Energy (BLE) Internet-of-Things (IoT) Application is proposed using
65nm CMOS technology.
17
1.4 Objectives
With the aim of designing an Ultra-Low Power Voltage-Controlled Oscillator (VCO)
for Bluetooth-Low-Energy (BLE) Internet-of-Things (IoT) Application using 65nm
CMOS Technology, the objectives aligned towards the aim are as follow:
1. To design an oscillator that operates on low voltage supply (within 1V) while
consuming minimal power to extend the operational life of the IoT device.
2. To design a Voltage-Controlled Oscillator (VCO) that generates stable, accurate
output signal with wide range of frequencies within the BLE band (2.4 GHz –
2.48 GHz) to accommodate different BLE communication standards and ensures
flexibility in frequency selection and tuning.
3. To develop a testbench in validating performance of the developed Ultra-Low
Power Voltage-Controlled Oscillator (VCO) through state-of-the-arts technique.
18
CHAPTER 2 : LITERATURE REVIEW
2.1 Performance Indicator of Voltage Controlled Oscillator (VCO)
The performance indicators to measure the performance of VCO includes Phase
Noise, Power Consumption, Figure-of-Merit (FoM) and Oscillation Frequency.
2.1.1 Phase Noise
With regards to the advancement in CMOS technology, especially with transistors
sizing gradually decreasing to cope with the rapid development of IoT devices, flicker
noise (1/f) in oscillator worsen. (Hu et al., 2020) In fact, phase noise in oscillators is
largely impacted by flicker noise up-conversion. More or so with the resulting 1/f3 phase
noise exceeding 1 MHz in IoT devices not being alleviated. (Pepe et al., 2013) Hence, the
implementation of a low phase-noise VCO is pivotal to ensure the quality of the output
signal. (Kim et al., 2006)
The phase noise model of an oscillator is as proposed in Leeson’s proportionality:
𝟏𝟏 𝒌𝒌𝒌𝒌 𝝎𝝎 𝟐𝟐 𝟏𝟏
𝑳𝑳{∆𝝎𝝎} ∝ 𝑽𝑽𝟐𝟐𝒐𝒐
∙ 𝑪𝑪
∙ � 𝑸𝑸𝒐𝒐� ∙ 𝝎𝝎𝟐𝟐 (2.1)
𝒎𝒎
2.1.2 Power Consumption
Since majority of IoT devices are powered by battery, stringent demand to extend
device operation lifetime is associated to maximise the battery lifetime while taking into
consideration a low cost and small-size feature of device. (Thabet et al., 2012) If power
consumption of the device is too high, it depletes the limited usage cycles and will lead
to frequent replacement of battery, causing excessive disposal of battery packs and
eventually contributing to the global carbon footprint. (Cordella et al., 2021)
Power consumption within a circuit could be further calculated by using the
formula below where VDD is the supply voltage while IDS is the total current of the circuit.
𝑷𝑷 = 𝑽𝑽𝑫𝑫𝑫𝑫 ∙ 𝑰𝑰𝑫𝑫𝑫𝑫 (2.2)

19
2.1.3 Figure-of-Merit (FoM)
Figure-of-Merit or FoM is a normalized standard in evaluating the performance
of an oscillator by taking into considerations the phase noise ( 𝐿𝐿(∆𝑓𝑓) ), oscillation
frequency ( 𝑓𝑓𝑜𝑜𝑜𝑜𝑜𝑜 ), offset frequency ( ∆𝑓𝑓 ) and power consumption ( 𝑃𝑃𝐷𝐷𝐷𝐷 ). (Bhat &
Krishnapura, 2018) FoM is calculated in terms of dB/Hz.
The formula for FoM is as shown below:
𝒇𝒇 (𝑷𝑷𝑫𝑫𝑫𝑫 )
𝒐𝒐𝒐𝒐𝒐𝒐
𝑭𝑭𝑭𝑭𝑭𝑭 = 𝑳𝑳(∆𝒇𝒇) − 𝟐𝟐𝟐𝟐 𝐥𝐥𝐥𝐥𝐥𝐥 � ∆𝒇𝒇 � + 𝟏𝟏𝟏𝟏 𝐥𝐥𝐥𝐥𝐥𝐥 (2.3)
𝒎𝒎𝒎𝒎
In fact, a lower value of FoM indicates a superior design of VCO where the lower
the value the better, as FoM is normally in the negative value. (Kumar et al., 2019)
Equation (2.3) portrays the widely accepted definition for FoM. Though, a great value of
FoM does not fully indicate the suitability of VCO for cellular standards as at times it
may be insufficient due to its phase noise performance. (Fanori et al., 2012) Thus,
considering the desired application while taking into account the phase noise, power
consumption and FoM proves to be a significant key player in designing a low cost and
low power VCO.
2.1.4 Oscillation Frequency of LC VCO
It is of utmost importance to match the oscillation frequency towards the working
range (frequencies) of devices so that when input is supplied with the desired power, the
oscillator can produce an oscillating signal in proportion to the input supply. By knowing
the frequency operating range, it eases the design of LC-VCO by using the formula below:
𝟏𝟏
𝒇𝒇𝒐𝒐𝒐𝒐𝒐𝒐 = 𝟐𝟐𝟐𝟐 √𝑳𝑳𝑳𝑳
(2.4)
From Equation (2.4), L indicates the inductance of inductor whereas C is the total
capacitance of capacitors seen from the inductor. (Sharma et al., 2019)
20
2.2 Classes of Voltage-Controlled Oscillator (VCO)
The following sections discussed on the classes of LC VCO which differs in terms
of circuit configuration or topology and their performance.
2.2.1 Class-B VCO
Figure 2.1 Class-B VCO (Wang & Yan, 2014)
Class-B VCO is a simple yet robust topology in VCO circuit which is as depicted
in Figure 2.1. However, it is lacking in terms of phase noise performance. As discussed
in (Fanori & Andreani, 2013b), the actual performance differs from the expected outcome
where noise is exhibited at current source which further decline the phase noise by several
dB. Figure 2.2 further depicts the nonideality of Class-B.

21
Figure 2.2 Comparison of Ideal and Simulated Phase Noise and FoM of Class-B
(Fanori & Andreani, 2013b)
For implementation in ULP mode for BLE IoT applications, the power
consumption performance in Class-B topology is less efficient when compared to Class-
C topology which tends to be more power efficient. (Jang & Lin, 2017) In actuality, Class-
B expresses the trade-off between maximum amplitude of voltage swing and phase noise.
Furthermore, as indicated in (Liu et al., 2021), Class-B’s increasing tail current
which is proportional to the output voltage swing, cancel out the optimization of phase
noise from the increased in oscillation amplitude. In fact, the gradual increase in Drain
Current, ID leveraging the optimization effect of phase noise and leading to increase of
noise coming from ID, worsening the phase noise performance.
22
2.2.2 Class-C VCO
Figure 2.3 (a) Class-B VCO; (b) Class-C VCO (Fanori & Andreani, 2013b)
Figure 2.3 showcases the architectures for both Class-B VCO and Class-C
respectively. While in operation, the cross-coupled transistors in Class-B and Class-C
VCO each conducts for half an oscillation period. Though the current efficiency differs
whereby Class-C was proven to achieve nearly 57% in terms of efficiency. (Zhang et al.,
2017) Furthermore as current contribute greatly towards the power consumption, the FoM
can be further improved as accordance to the Equation (2.3).
Besides, as discussed in (Narayanan et al., 2014), Class-C LC VCO provides a
lower conduction angle and better current efficiency as compared to Class-B. Apart from
23
that, (Fanori & Andreani, 2013b) also proves that Class-C LC VCO achieves power
consumption 36% lower than that of Class-B. In a simpler context, assumed both Class-
B and Class-C VCO were showing the same phase noise performance, Class-C VCO
would exhibits a substantially lower power consumption.
However, Class-C VCO do experiences issues such as start-up failure and
amplitude instability. According to Liao & Liu, 2020, Class-C tends to encounter start-
up failure as the usage of low bias voltage for optimal performance of VCO which in turn
leads to small transconductance value of cross-coupled transistor. (Liao & Liu, 2020)
Low transconductance value impair the capability of start-up in VCO. The reasoning
behind the low bias voltage is to ensure the cross-coupled pair to operate between the cut-
off and saturation mode to prevent degradation in current amplitude. (Narayanan et al.,
2014) Thus, bias voltage is set at a value lower than the threshold voltage of the cross-
coupled pair, whereby headroom for tank signal is optimized, introducing undesired start-
up scenario. (Zhang et al., 2017)
On the other hand, Class-C VCO is also vulnerable towards Process, Supply
voltage and Temperature (PVT) variations. From analysis done by (Jung et al., 2022),
performance deviation in phase noise is significant when PVT variations are opted for
simulation. Figure 2.4 portrays the effects of PVT towards the phase noise.
Figure 2.4 Performance Deviation of Phase Noise due to PVT variation (Jung et al.,
2022)
24
2.3 LC VCO Design Optimization Approach
Figure 2.5 below depicts the generic design approach towards the optimization of
a LC-VCO for Ultra-Low Power (ULP) operation. Due to the spike in IoT applications
nowadays, ULP operation became a notable criterion. The focus towards optimized
design approach of an ULP LC VCO lies within the relationship between its component
(inductor and capacitor) and its active circuit.
Each of the said relations exhibit different impact towards the VCO’s performance
in terms of the trade-off network between power consumption, phase noise, tuning range
and space occupied. (Ghorbel et al., 2021) The steps towards LC VCO design
optimization starts from optimizing the inductance, followed by capacitance and then its
active circuit.
Figure 2.5 Design Methodology for ULP LC VCO (Ghorbel et al., 2021)
25
2.3.1 Inductance Optimization Strategy
According to Haddad et al., 2019, the very first step in optimizing the inductance
is by selecting the type of inductor in respond to the selected constraint, which normally
revolves around quality factor, resistive loss, space occupied and self-resonant frequency.
(Haddad et al., 2019)
Then, determine the inductance value in accordance to the operating frequency.
(Haddad et al., 2019) Ghorbel et al., 2021 emphasized the need to choose value of
inductance greater than oscillation frequency. Furthermore, the inductance must be high
while keeping the series resistance minimum but the quality factor at maximum for a
lower power consumption.
At last, following the inductance optimization strategy in Figure 2.5, the last step
involves alternating the geometrical parameters which directs towards the width of
inductor’s track (W) and number of turns (N). Number of turns is proportional to the
inductance value but inversely proportional to resistive loss.
Though, width of track exhibits a slightly different relationship whereby
increasing width results in reduction of resistive loss but better-quality factor. Despite the
advantages, increasing width will lead to decrement in self-resonant frequency, where in
a LC VCO, the self-resonant frequency should always be higher than the operating
frequency. Hence, the use of minimum width should be practiced. (Ghorbel et al., 2021)
26
2.3.2 Varactor Optimization Strategy
The steps involved in optimizing a varactor are first selecting the type of varactor
in accordance with the targeted constraints, then minimizing the capacitance value and
lastly alternating the physical parameters. (Ghorbel et al., 2019) In fact, when choosing
the type of varactor, MOS varactor suits constraints in the effect of tuning range while
varactor diode in effect of power consumption and phase noise. Though, in this step, it is
crucial to consider the trade-off between tuning range and quality factor.
2.3.3 Active Circuit Optimization Strategy
Active circuit optimization imparts on the relations regarding laying out negative
resistance to overcome tank loss. Though, with the existence of negative resistance,
parasitic elements relapse, whereby it degrades the performance of VCO in terms of phase
noise. (Haddad et al., 2019) As such, using a low-leakage transistors with minimum
channel length would levitate the issues on high power consumption and low switching
speed. At last, the maximum number of fingers and minimum transconductance will be
determined, for a better phase noise and power consumption of VCO. (Ghorbel et al.,
2019)
27
2.4 Techniques on Improving Performance of VCO
The following section will discuss on the various techniques and topologies
implemented to improve the performance of Voltage-Controlled Oscillator in terms of
Phase Noise, Power Consumption and Figure-of-Merits.
2.4.1 LC VCO Topologies
The core topologies being implemented within LC Oscillators revolved around
cross-coupling concept where it is widely used across RF applications that involves
transceiver. Cross-coupling VCO involves the practical implementation of differential
signal to compensate for LC tank loss by producing differential negative resistance. For
a differential signal to be valid, both sides of the circuit must be in symmetrical especially
the LC Tank. (Sachan et al., 2018)
In fact, MOS transistors have been the main units sustaining the development of
VCO instead of Bipolar Junction Transistor (BJT) as it provides lower phase noise and
reduction in start-up delay. (Azam et al., 2019) This gives rise to different LC VCO
topologies depending on the type of MOSFET used; NMOS, PMOS or Complementary
of PMOS and NMOS.
Recently, there are three architectures which plays the role as the centre of VCO
design:
1. Voltage-Controlled Oscillator with NMOS Cross-Coupling
2. Voltage-Controlled Oscillator with PMOS Cross-Coupling
3. Voltage-Controlled Oscillator with Complementary Cross-Coupling
28
2.4.1.1 VCO with NMOS Cross-Coupling
Figure 2.6 VCO with NMOS Cross-Coupling (Sachan et al., 2018)
Figure 2.6 showcases an LC VCO constructed through NMOS transistors. In
accordance with the figure shown, an LC Tank is formed from the inductors (L1 & L2)
and capacitors (C1 & C2). The transconductance of the cross linked NMOS transistors
determines the oscillator's negative resistance where it provides compensation towards
the LC Tank losses, sustaining the oscillation operation of VCO. The transconductance
of the NMOS VCO is given in (Sachan et al., 2018)
−𝒈𝒈𝒎𝒎
𝒈𝒈𝒎𝒎(𝒆𝒆𝒆𝒆𝒆𝒆𝒆𝒆𝒆𝒆𝒆𝒆𝒆𝒆𝒆𝒆𝒆𝒆) ≈ (2.5)
𝟐𝟐
This topology tends to be more sensitive towards perturbation of supply as a result
of the direct connection between inductor and supply source. Though, it levitates issues
pertaining to lower harmonic distortion and at the same time offers LC tank an effective
rejection against ground. (Haase et al., 2010) Moreover, this topology offers broad tuning
range despite under low voltage operation mode.

29
2.4.1.2 VCO with PMOS Cross-Coupling
Figure 2.7 VCO with PMOS Cross-Coupling (Sachan et al., 2018)
To match the transconductance and negative resistance as NMOS VCO, PMOS
transistors used in PMOS VCO is upsized by three factors for a diminished hole mobility.
In comparison between PMOS VCO and NMOS VCO, PMOS VCO offers lower current
density, providing lower phase noise. (Haase et al., 2010)
Park & Yang, 2002 compares the phase noise performance between NMOS VCO
and PMOS VCO at 50 kHz offset frequency. (Park & Yang, 2002) The research manages
to validate the aforementioned phase noise performance between NMOS VCO and PMOS
VCO. The phase noise of NMOS VCO attained is -73.1 dB which is lower than PMOS
VCO, -87.5 dB with a difference of 6 dB.

30
Then, according to the research done in Jerng & Sodini, 2005, which compares
the phase noise performance of NMOS VCO and PMOS VCO with varying device sizing
in terms of width to length ratio, it is observable that at same sizing, PMOS VCO offers
a better phase noise performance as compared to NMOS VCO. The results are tabulated
in the Table 2.1. (Jerng & Sodini, 2005)
Table 2.1 Phase Noise Performance Result (Jerng & Sodini, 2005)
2.4.1.3 VCO with Complementary Cross-Coupling
Figure 2.8 VCO with NMOS PMOS Cross-Coupling (Sachan et al., 2018)
31
A Complementary VCO is a combination of both PMOS and NMOS transistors
to achieve a push-pull network configuration. A complementary VCO provides twice the
transconductance value as compared to NMOS or PMOS-only VCO. (Sachan et al., 2018)
The formula for transconductance of complementary VCO is as below.
−𝒈𝒈𝒎𝒎
𝒈𝒈𝒎𝒎(𝒆𝒆𝒆𝒆𝒆𝒆𝒆𝒆𝒆𝒆𝒆𝒆𝒆𝒆𝒆𝒆𝒆𝒆) ≈ 𝟐𝟐 × ≈ −𝒈𝒈𝒎𝒎 (2.6)
𝟐𝟐
For a higher transconductance value, it provides a higher switching time, resulting
in lower phase noise. As such, a complementary VCO provides twice the oscillation
amplitude as indicated by the selected tank and supply current. Doubling the oscillation
amplitude, improves the performance of phase noise by 6 dB. Furthermore, according to
Veni et al., 2020, the VCO start-up operation will be further improved due to the higher
gain achieved in complementary VCO as compared to single-pair VCO. (Veni et al., 2020)
At last, attributed to the circuit voltage never exceeding the supply voltage, the reliability
of transistors is further assured.
The performance of complementary VCO is analyzed by comparing conventional
Class-C NMOS Cross-Coupled VCO by (Mazzanti & Andreani, 2008) with
Complementary Class-C VCO by (Fanori & Andreani, 2013a) . It was discovered that the
later has lower FoM at 191.5 dBc/Hz @ 3.8 GHz with power consumption at 2.2 mW
while the former at 196 dBc/Hz @ 5 GHz with power consumption at 1.4 mW. Also,
NMOS Class-C VCO in (Tohidian et al., 2011) measured a FoM of 192.3 dBc/Hz @ 5.1
GHz with power consumption at 0.86 mW.
32
2.4.2 Filtering Technique
Following, techniques used to reduce phase noise and power consumption of VCO
are further analyzed and discussed.
2.4.2.1 Inductive Degeneration
Tail noise which offers the largest contribution in terms of phase noise, has been
one of the greatest concerns among VCO designer in order to improve the phase noise
performance. The reasoning lies within the imposition of high-frequency or low-
frequency current noise into phase noise. (Andreani & Sjoland, 2002) As such, inductive
degeneration filtering technique is introduced to sweep out the tail noise of the VCO.
An inductive source degeneration is connected across the source terminal of MOS
transistors and the ground where for a differential operation ground is replaced by virtual
ground node which helps promoting the transconductance and phase noise performance
of VCO. (Siddique et al., 2020)
Figure 2.9 VCO with Inductive Degeneration Technique (Siddique et al., 2020)
33
The newly introduced degenerative inductor will degenerates the tail transistors
whereby the power is generated by the current noise is degraded by a factor of
|1 + 𝑗𝑗𝑔𝑔𝑚𝑚 𝜔𝜔𝜔𝜔|2 where 𝑔𝑔𝑚𝑚 is the transconductance of tail transistor. (Andreani & Sjoland,
2001) The Figure 2.9 showcases the VCO with inductive degeneration filtering technique.
The technique as proposed in (Siddique et al., 2020) which introduces inductive
degeneration source, achieves a FoM of 194.3 at 24.5 GHz operating frequency with
power consumption at 1.35 mW. The technique has seen an improvement in phase noise
performance and bridle over the transconductance performance. Figure 2.10 further
showcase the improvement in phase noise of approximately 4 dBc/Hz when comparing
between the presence and absence of an inductive degeneration source.
Figure 2.10 Phase Noise with and without Inductive Degeneration Source
(Siddique et al., 2020)
34
Figure 2.11 VCO with and without Dual Inductive Degeneration Source (Chang &
Liang, 2022)
Subsequent introduction of dual inductive degeneration at the head and tail
transistors as shown in Figure 2.11, highlights an overall improvement in phase noise of
approximately 20 dBc/Hz which is further depicted in Figure 2.12 below. And overall, it
achieves a FoM of 183.94 @ 2.94 GHz with power consumption of 2.38 mW. (Chang &
Liang, 2022)
Figure 2.12 Phase Noise with and without Dual Inductive Degeneration Source
(Chang & Liang, 2022)
35
2.4.2.2 Inductive and Capacitive Filtering
Connecting a capacitor parallel to the said inductor as in inductive degeneration
technique, LC filtering will be realised. Figure 2.13 portrays the VCO with LC filtering.
Figure 2.13 VCO with LC Tail Filter (Ding et al., 2019)
Prior to the introduction of LC filter at tail or top, cross-coupled transistor in VCO
that is operating in deep triode region will exhibit a resistive path towards the ground due
to low impedance. The resistive path will introduce a resistance that degrades the Q factor
as a result of declination in tank parallel resistance. (Ding et al., 2019) From Figure 2.13,
the tail inductor works in a way by resonating the tail capacitor, preventing low
impedance at common-mode path.
In fact, a high impedance is required at second harmonic to avoid the cross-
coupled pair transistors from loading the resonator, where thermal noise further add to
the phase noise. (Hegazi et al., 2001) The tuning of LC tail filter is done in a way by
keeping the resonance frequency at twice the value of operating frequency. (Plagaki et al.,
2021) As such the phase noise could be improved.
According to research done by Zhang et al., 2020, adding a LC filter to the VCO
helps to levitate issues on single event effects of a Phase-Locked Loop. (Zhang et al.,
36
2020) It also further depicts the improvement in overall phase noise by approximately 3
dB. Apart from that, Ding et al., 2019 which applies LC filtering in its VCO design,
achieves a FoM of 185.7 @ 28.3 GHz with power consumption at 4.1 mW. (Ding et al.,
2019)
Figure 2.14 Instantaneous Frequency of LC VCO with and without LC filter

respectively (Zhang et al., 2020)
37
2.4.2.3 Tail Biasing
Often, MOSFET introduced at the tail of VCO for tail current balancing, has
substantial effect on the phase noise performance. Figure 2.15 depicts the tail current
source for a conventional LC VCO.
Figure 2.15 VCO with NMOS tail current and PMOS tail current respectively
(Fard et al., 2019)
The problem behind the conventional tail biasing of VCO is that this kind of
topology is prone to up-conversion of flicker noise as a result of maximum current
consumption by the cross-coupled transistors whereby Figure 2.16 additionally depicts
the maximum consumption of current at zero-crossing of output signal. (Fard et al., 2019)
Thus, results in extensive increment of phase noise.
Figure 2.16 Impulse Sensitivity Function (ISF) Schema of VCO (Fard et al., 2019)
38
As a matter of fact, techniques to overcome the tail biasing has gain popularity
throughout the past few years. The techniques to overcome such limitation are tail
current-shaping, tail-feedback mechanism and tailless class VCO.
Figure 2.17 VCO with Dual Current-Shaping Technique (Nejadhasan et al., 2020)
The dual current-shaping technique which was proposed by Nejadhasan et al.,
2020, as depicted in Figure 2.17 uncovers circuit’s current consumption at its lowest
which is as shown in Figure 2.18 below. The current which fluctuates between 0.18 mA
to 0.67 mA discloses the fact that is has lower current consumption than conventional
topology. The end result of the technique proposed obtained a FoM at 189.6 dBc/Hz @
2.44 GHz while consuming an overall power of 0.37 mW.

39
Figure 2.18 Circuit current consumption as compared to output voltage
(Nejadhasan et al., 2020)
Del Pino Suárez & Khemchandani, 2021 proposed a technique for current
injection feedback mechanism. (del Pino Suárez & Khemchandani, 2021) The proposed
technique can be viewed through the schematic shown in Figure 2.19 below. The
advantages behind this technique revolves around the centre of keeping the cross-coupled
transistors operating in saturation region through current feedback. (del Pino Suárez &
Khemchandani, 2021)
Figure 2.19 VCO with feedback injection mechanism (del Pino Suárez &
Khemchandani, 2021)
40
Comparing the conventional LC VCO with the proposed LC VCO implementing
the feedback injection mechanism uncovers a better phase noise performance in the later
topology. Figure 2.20 depicts the phase noise comparison of conventional VCO and
proposed VCO. Overall, it achieves a FoM of 171 dBc/Hz @ 1.77 GHz while consuming
3.96 mW of power.
Figure 2.20 Phase Noise comparison between conventional and proposed VCO (del
Pino Suárez & Khemchandani, 2021)
Shasidharan et al., 2022 discloses a technique to overcome the limitation of tail
source by proposing a tailless class VCO, removing the tail source entirely. (Shasidharan
et al., 2022) This proposed technique aims to reduce the parasitic capacitances that
contributed to the phase noise, while at the same time enhancing the performance of
output swing.
41
Figure 2.21 Tailless VCO (Shasidharan et al., 2022)
The tailless VCO as depicted in Figure 2.21, encourages the reduction of parasitic
capacitance which at the same time improves the transconductance parameter which
elevates the start-up issues of VCO operating at low power. Figure 2.22 discloses the
transconductance value comparison between conventional VCO and the proposed VCO
whereby the transconductance of proposed topology achieves higher transconductance.
In fact, the overall proposed design achieves a FoM of 190.36@ 2.59 GHz while
consuming as less as 0.98 mW power.
Figure 2.22 Transconductance comparison on conventional VCO and proposed

VCO (Shasidharan et al., 2022)
42
2.4.2.4 Top Biasing
A top biasing is the opposite of tail biasing whereby the current source is inserted
across the supply voltage and centre tap inductor. As compared with tail biasing, top
biasing topology offers a lower phase noise as it transforms less flicker noise into phase
noise. (Thakore et al., 2022)
Figure 2.23 Top-biased VCO (ZhU et al., 2020)
43
ZhU et al., 2020 which make use of the top-biasing topology achieves a relatively
low phase noise at -108 dBc/Hz with an overall FoM of 193.4 dBc/Hz and consuming 4.5
mW of power. (ZhU et al., 2020) Then, CHEN et al., 2017 which consists of a top-biased
current source achieves a phase noise of -131.3 dBc/Hz with an extensively high FoM of
216.2 dBc/Hz and power consumption at 3.8 mW. (CHEN et al., 2017)
Figure 2.24 VCO using top-biased current source (CHEN et al., 2017)
44
2.4.3 Switched Capacitor Array (SCA)
The utilization of a switching capacitor array (SCA) in Figure 2.25 is presented to
incorporate a capacitor into the LC tank. This array comprises three main components:
Switched Capacitor, Fixed Capacitor, and Varactor, each with its own distinct function.
It is important to note that the oscillating frequency exhibits an inverse relationship with
capacitance; larger capacitance values result in lower oscillating frequencies. The fixed
capacitor (Cf) primarily serves to establish the highest oscillating frequency achievable
for the oscillator. Typically, the individual capacitance value of Cf is relatively higher
compared to the other capacitors within the SCA. Additionally, the fixed capacitor plays
a crucial role in compensating for the parasitic elements of other devices by adjusting its
own capacitance value. This adjustment is critical in maintaining the Figure-of-Merit
(FoM) performance.
Figure 2.25 Switched Capacitor Array
45
Moving on to the second stage, the switched capacitor is responsible for
segmenting the tuning range and determining the overall range. Typically, the switched
capacitor is composed of stacked binary bits. In Figure 2.25, the switched capacitor is
structured with 3 bits, resulting in a total of 7 stages ranging from 000 to 111. The state
of each bit is determined by the biasing voltage (VX1, VX2, VX3), and the capacitance
is loaded into the LC tank only during the ON state (Xian et al., 2010). Unit capacitors
(Cu) determine the capacitance value for each bit and are stacked in order from the least
significant bit (LSB) to the highest bit. The sizing of resistors and transistors follows a
similar pattern. Increasing the value of Cu leads to greater differences in oscillating
frequency (Δf) across each stage. It is possible to generate more stages by stacking
additional switched capacitors; however, this approach introduces a trade-off in terms of
phase noise. This stage serves as coarse tuning.
Finally, the last stage involves the varactor, which provides fine frequency tuning
within each stage. The capacitance of the varactor can be adjusted by applying various
voltage values (VTUNE) ranging from 0 to VDD. The sizing of the varactor determines
the range of fine frequency tuning. It is crucial to ensure that this fine-tuning range is
larger than Δf to avoid any blind zones.
46
2.5 State-of-the-Arts VCO
The table below provides an overview of different VCOs’ performance with
varying techniques applied while comparing the phase noise, power consumption and
Figure-of-Merits of the said VCOs.
Table 2.2 State-of-the-art VCO

Operating Supply Phase Power
Technology FoM
Source Frequency Voltage Noise Consumption
Node (nm) (dBc/Hz)
(GHz) (V) (dBc/Hz) (mW)
(del Pino
Suárez &
1.77 90 1.2 -112 3.96 -171
Khemchandani,
2021)
(Sachan et al.,
2.4 180 1.8 -124 2.86 -187.25
2018)
(Nejadhasan et
2.44 65 0.8 -117.5 0.37 -189.6
al., 2020)
(Shasidharan
2.59 180 0.7 -122 0.98 -190.36
et al., 2022)
(Chang &
3.0 180 1.1 -138 2.38 -183.94
Liang, 2022)
(Fanori &
Andreani, 3.8 90 1.2 -130 2.2 -191.5
2013a)
(Tohidian et
5.1 90 0.6 -127 0.86 -192.3
al., 2011)
(Veni et al.,
17.0 130 3.3 -116 45.21 -184.0
2020)
(ZhU et al.,
18 40 1.0 -108 4.5 -193.4
2020)
(Siddique et
24.5 65 0.7 -117 16.8 -194.3
al., 2020)
(Ding et al.,
26 65 1.0 -102.8 4.1 -185.7
2019)
47
CHAPTER 3 : METHODOLOGY
3.1 Flow Chart of Design Flow
The flow chart below indicates the methodology of this project in detailed starting
from the research up to design and verification.
Figure 3.1 Flow chart on the design of VCO
48
3.2 Phase 1: Literature Review
Research papers published by researchers in the field of VCO are examined at this
stage to look into various VCO designs. To study and analyse the design, the circuit
topologies suggested in those studies are simulated in Cadence Virtuoso Schematic Editor.
Whereas in order to highlight problems, achievements, and research gaps regarding
modern VCO design, discussions and comments are made based on the study.
3.3 Phase 2: CMOS Technology Selection
The 65 nm CMOS technology from TSMC has been selected to be the technology
utilised in the circuit designing at this time. For RF applications, 65nm CMOS technology
will be the most suitable as it balances considerations on performance and cost. As the
technology scales down, the cost will get more expensive. Although the cost for 0.18μm
to 90nm is cheaper compare with 65nm, the power consumption for these technologies
would be too large for ultra-low power applications due to large power supply
requirement, hence degrade performance.
3.4 Phase 3: Schematic Level Design
To understand the fundamentals of the primary simulation tool, namely Cadence
Virtuoso Schematic Editor, a remote training has been performed. In reality, the tool must
be used to design and simulate each and every circuit topology that was proposed.
Cadence The Virtuoso Schematic Editor is a design and constraint composition
environment that sets the design intent of the industry-standard Virtuoso custom design
platform, which serves as a full solution for front-to-back custom-analog, digital, RF, and
mixed-signal design. The first step in designing the VCO at the transistor level is to create
49
a schematic. At this level, the circuit must achieve low phase noise and low power
consumption in order to achieve a high FoM.
3.4.1 Design of VCO Circuit
The design of VCO starts with the selection of VCO topology, which was
introduced in the previous section, where currently the two widely use topology for low
power devices are Class-B VCO and Class-C VCO. Class-B provides better performance
in terms of tuning range whereas Class-C offers excellent power efficiency which is
critical for ULP VCO design. In this study, Class-C will be opted as the base topology
for design.
Before trying to select and optimize the transistor and LC tank of Class-C VCO,
the type of coupling is decided to further improve the phase noise and power consumption
aspect of the design. As previously discussed, differential design of a Class-C VCO can
be reorganized into three types, by using either NMOS Cross-Coupling, PMOS Cross-
Coupling or Complimentary Cross-Coupling between PMOS and NMOS. With that said,
Complementary Cross-Coupling is chosen for Class-C VCO due to its high
transconductance value which is approximately twice the value of the former two cross-
coupling topology, hence, offering greater phase noise performance.
50
Figure 3.2 Complementary Class-C VCO (Mazzanti & Andreani, 2012)
3.4.1.1 Selection of Transistor Type
When choosing the appropriate transistor for use in a VCO circuit, consideration
is given to a variety of transistor types, including lvt and hvt transistors, which have low
and high threshold voltages, respectively, and rf transistors, which are typically
appropriate for front-end RF architecture. The VCO circuit has tested and used each of
the aforementioned transistors. It was found that for the design of an ULP VCO, lvt
transistors provide lower current consumption which signifies lower power consumption
and is deemed more suitable for this case. Hence, lvt transistors are employed in the
circuit design of an ULP VCO.
51
3.4.1.2 Transistor Sizing
While sizing the transistor in terms of width, length and number of fingers, it is
important to consider for a low-leakage transistor which is usually attributed to the
channel length of transistor. In our study, the channel length is kept at minimum so that
the power consumption is at minimum. Whereas the width should provide a minimum
transconductance while maximizing the number of fingers used. The low
transconductance and maximum stack of fingers contribute to a low gate resistance during
operation, leading to low phase noise and power consumption.
3.4.1.3 Selection of Inductor and Capacitor
Then, selecting type of inductor and capacitor for the LC tank of VCO. To ensure
symmetric between both side in a differential topology, a centre tapped inductor is used,
“spiral_sym_ct_mu_z”, whereas the capacitor used is “crtmom”. The components used
are obtainable in the “tsmcN65” library within the Cadence Virtuoso.
When determining the value of both the inductance and capacitance, the Q factor
plays an important role in ensuring the quality of the output signal in terms of phase noise.
The operating frequency of a VCO will be tuned throughout the frequency range based
on the circumstance. However, as we modify the operating frequency, not only will the
Q factor shift, but the inductance value will not remain constant. As a result, a large
change in inductance would damage the VCO voltage swing performance and stability,
which is not what we want. As a result, we must consider not only the Q factor, but also
the change in inductance value. Figure 3.3, Figure 3.4 and Figure 3.5 depicts the varying
inductance in response to the Q factor when plotted as a factor of frequency.
52
23
20
18
15
13
Q Factor
10
8 1 Turn
2 Turn
5 3 Turn
4 Turn
3
5 Turn
0
6 Turn
-3
0.0 2.4G 5.0G 10.0G 15.0G 20.0G 25.0G 30.0G
Frequency (Hz)
Figure 3.3 Graph of Q factor as a factor of Frequency due to Number of Turns
17
15u
16 20u
25u
15 30u
35u
14 40u
13 45u
50u
12 55u
60u
11 65u
70u
10 75u
80u
9 85u
Q Factor
90u
8
7
6
5
4
3
2
1
0
-1
-2
0.0 2.4G 5.0G 10.0G 15.0G 20.0G 25.0G 30.0G
Frequency (Hz)
Figure 3.4 Graph of Q factor as a factor of Frequency due to Inner Radius
53
17
16 3u
15 6u
14 9u
13 12u
12 15u
11
18u
10
9
21u
24u
Q Factor
8
7 27u
6 30u
5
4
3
2
1
-1 2.4G
-2
0.0 2.5G 5.0G 7.5G 10.0G 12.5G
Frequency (Hz)
Figure 3.5 Graph of Q factor as a factor of Frequency due to Inductor Width

Next, the capacitance of the capacitor can be calculated through the Equation 2.4.
The capacitance calculated from the equation contributes to the total capacitance,
whereby to keep the symmetrical balance, the two capacitors along the LC tank can be
obtained by multiplying the total capacitance by a factor of two.
3.4.2 Implementation of Filter Technique
Upon closer inspection on all the filtering techniques available, phase noise is
mainly contributed by the conversion of current noise operating at second harmonic. In
reality, a large impedance at the second harmonic is necessary to prevent the cross-
coupled pair transistors from loading the resonator, where thermal noise adds to the phase
noise. Hence, a LC Filtering technique is introduced for further improvement in phase
noise whereby the LC filter tank removes the noise generated at the second harmonic.
54
Figure 3.6 LC Filter
3.5 Phase 4: Physical Layout Design
Using Cadence Virtuoso, the proposed VCO’s final schematic level design is
translated into a physical layout at this step. To make sure the design rules are followed,
the Design Rule Check (DRC) process is used to ensures that the design complies with
process technology standards. A clean result is desired as the output to ensure that there
are no faults in the physical design. Additionally, Layout versus Schematic (LVS) is used
to check if the physical layout design coincides with the schematic level design.
3.6 Phase 5: Parasitic Extraction & Post-Layout Design
Once the LVS has been verified, the parasitic effects, such as bulk resistance,
capacitance from conductors to ground, and capacitance between conductors, will be
extracted by performing Parasitic Extraction (PEX) simulation. A post-layout simulation
is done after parasitic extraction to make sure the performance degradation is being kept
minimal after considering all parasitic components. The design is then improved via
layout optimization, and the performance of the VCO is assessed using post-layout
simulation.
55
CHAPTER 4 : RESULTS AND DISCUSSION
This chapter presents the results of simulations conducted prior to the proposed
design to identify the most suitable VCO topologies. It becomes evident that Class-B and
Class-C VCO topologies exhibit excellent performance characteristics in terms of low
power consumption and acceptable phase noise levels, making them ideal for low-power
applications. Class-C VCO is specifically selected as the primary topology for
investigation in this paper due to its ability to achieve low power consumption, aligning
well with the requirements of Ultra-Low Power (ULP) VCOs for Bluetooth Low Energy
(BLE) Internet-of-Things (IoT) applications. The chapter explores various VCO classes
and transistor cross-coupling techniques, along with the employed strategies to mitigate
phase noise and power consumption. A detailed discussion of these findings and insights
derived from the simulation results is provided. The comprehensive analysis presented in
this chapter serves as the foundation for further exploration and development of the
proposed design. Its aim is to create an efficient ULP VCO solution for BLE IoT
applications, as detailed in this paper.
4.1 VCO Architecture Simulation
Under this section, simulation of conventional VCO is done and analyzed for
comparison and to allow the generation of new VCO’s design.
4.1.1 Class-B VCO Architecture Simulation
The simulation of conventional Class-B VCO by Cross-Coupling between NMOS
transistors pair and Complementary MOSFET transistors pair are simulated and analyzed.
56
4.1.1.1 NMOS Cross-Coupling
Figure 4.1 Schematic of Class-B NMOS Cross-Coupled VCO
Operating Frequency : 2.398 GHz

Voltage Supply : 1.0 V
Table 4.1 Results of Class-B NMOS Cross-Coupled VCO
Offset Frequency Phase Noise Power Consumption FoM

(Hz) (dBc/Hz) (mW) (dBc/Hz)
100k -101.00 7.5690 -179.8
1M -120.90 7.5690 -179.7
10M -140.60 7.5690 -179.4
57
4.1.1.2 CMOS Cross-Coupling
Figure 4.2 Schematic of Class-B CMOS Cross-Coupled VCO
Oscillating Frequency : 2.405 GHz

Table 4.2 Results of Class-B CMOS Cross-Coupled VCO

100k -96.78 2.0930 -181.2
1M -119.04 2.0930 -183.4
10M -139.04 2.0930 -183.4
Comparing the results obtained between a NMOS Cross-Coupled Class-B VCO
with CMOS Cross-Coupled Class-B VCO, it was found that the CMOS topology provides
58
better power consumption performance whereas its trade-off lies in slight degradation of
phase noise. Overall, CMOS topology generally offers a better VCO performance as
indicated by its Figure-of-Merits.
4.1.2 Class-C VCO Architecture Simulation
Under this section, the simulation of conventional Class-C VCO by Cross-
Coupling between NMOS transistors pair and Complementary MOSFET transistors pair
are simulated and analyzed.
4.1.2.1 NMOS Cross-Coupling
Figure 4.3 Schematic of Class-C NMOS Cross-Coupled VCO

Voltage Bias : 0.55 V
59
Table 4.3 Results of Class-C NMOS Cross-Coupled VCO

100k -101.10 6.0910 -180.9
1M -121.10 6.0910 -180.9
10M -140.80 6.0910 -180.6
4.1.2.2 CMOS Cross-Coupling
Figure 4.4 Schematic of Class-C CMOS Cross-Coupled VCO

Voltage Supply :1V
Voltage Bias : 0.55 V
60
Table 4.4 Results of Class-C CMOS Cross-Coupled VCO

100k -96.01 1.5200 -181.8
1M -118.50 1.5200 -184.3
10M -139.60 1.5200 -185.6
Comparing the results obtained between a NMOS Cross-Coupled Class-C VCO
with CMOS Cross-Coupled Class-C VCO, it was found that the CMOS topology provides
better power efficiency whereas its trade-off lies in a poorer phase noise. Overall, CMOS
topology generally offers more room for VCO performance improvement.
4.1.3 Comparison of Class-B and Class-C VCO
Taking into consideration the operating frequency of the VCO, it is notable that
Class-C CMOS Cross-Coupled VCO shows a notably low power consumption as
illustrated in Figure 4.5. As low power consumption is indeed an important factor in
designing an Ultra-Low Power VCO for Bluetooth-Low Energy Internet-of-Things
Application, such characteristics is preferred. However, it’s phase noise performance is a
huge concern and has a huge margin to improve.
Hence, to overcome this trade-off relation, techniques to enhance phase noise
performance will be implemented on the existing conventional VCO’s topology to further
validate the techniques that were proposed in the research field and their suitability
towards the VCO’s topology; Class-B NMOS Cross-Coupled VCO, Class-B CMOS
Cross-Coupled VCO, Class-C NMOS Cross-Coupled VCO and Class-C CMOS Cross-
Coupled VCO.
61
Class B NMOS without LC Filter
10 Class B CMOS without LC Filter
Class C NMOS without LC Filter
9 Class C CMOS without LC Filter
Power Consumption (mW) 7
0
10k 100k 1M 10M 100M
Frequency (Hz)
Figure 4.5 Comparison of VCO topology in terms of Power Consumption plotted

against Frequency

-90 Class B CMOS without LC Filter
-95
Class C CMOS without LC Filter
-100
-105
-110
Phase Noise (dBc/Hz)
-115
-120
-125
-130
-135
-140
-145
-150
10k 100k 1M 10M 100M
Frequency (Hz)
Frequency
62
4.2 LC Filter Technique
Among all the techniques analyzed, LC Filtering stands out to be the most
plausible solution towards promoting phase noise performance in a VCO. By identifying
topology that offers, low power consumption, phase noise needs to be levitated at the
same time in order to enable the application to work under Bluetooth-Low Energy IoT
Applications.
4.2.1 Class-B NMOS Cross-Coupling VCO
Figure 4.7 Class-B NMOS Cross-Coupled VCO with LC Filter

63
Table 4.5 Results of Class-B NMOS Cross-Coupled VCO with LC Filter

100k -112.80 8.0880 -191.1
1M -132.80 8.0880 -191.1
10M -152.50 8.0880 -191.1
4.2.2 Class-B CMOS Cross-Coupling VCO
Figure 4.8 Class-B CMOS Cross-Coupled VCO with LC Filter

64
Table 4.6 Results of Class-B CMOS Cross-Coupled VCO with LC Filter

100k -110.40 2.5730 -193.9
1M -130.70 2.5730 -194.2
10M -150.70 2.5730 -194.2
4.2.3 Class-C NMOS Cross-Coupling VCO
Figure 4.9 Class-C NMOS Cross-Coupled VCO with LC Filter
Operating Frequency: 2.406 GHz

Voltage Supply: 1.0 V
Voltage Bias: 0.55V
Table 4.7 Results of Class-C NMOS Cross-Coupled VCO with LC Filter

100k -113.00 6.5490 -192.5
1M -133.00 6.5490 -192.5
10M -152.90 6.5490 -192.4
65
4.2.4 Class-C CMOS Cross-Coupling VCO
Figure 4.10 Class-C CMOS Cross-Coupled VCO with LC Filter
Operating Frequency: 2.405 GHz

Voltage Supply: 1.0 V
Voltage Bias: 0.55V
Table 4.8 Results of Class-C CMOS Cross-Coupled VCO with LC Filter

100k -104.70 1.9840 -189.3
1M -126.70 1.9840 -193.3
10M -148.80 1.9840 -193.4
66
4.2.5 Comparison of VCO with and without LC Filter
Looking at Figure 4.11 which discloses the phase noise of VCO plotted against
frequency, it is noticeable that all the VCOs with LC Filters implemented results in better
phase noise performance when compared with their original topology, but it comes with
a slight increment on power consumption as shown in Figure 4.12. As such, further
optimization will be done to lower the power consumption while achieving satisfactory
phase noise performance.

-90 Class B CMOS without LC Filter
-95
Class C CMOS without LC Filter
-100 Class B NMOS with LC Filter
-105 Class B CMOS with LC Filter
-110
Class C NMOS with LC Filter
Class C CMOS with LC Filter
-115
-120
-125
-130
-135
-140
-145
-150
-155
-160
10k 100k 1M 10M 100M
Frequency (Hz)
Frequency with presence of LC Filter
67
Class B CMOS without LC Filter
10 Class C CMOS without LC Filter
Class B NMOS with LC Filter
Class B CMOS with LC Filter
9 Class C NMOS with LC Filter
Class C CMOS with LC Filter
8
Power Consumption (mW) 7
0
10k 100k 1M 10M 100M
Frequency (Hz)
Figure 4.12 Comparison of VCO topology in terms of Power Consumption plotted

against Frequency with presence of LC Filter
68
4.3 Proposed Complementary Class-C VCO with Dual Second Harmonic LC
Filtering Tanks
VDD
8W2/L 4W2/L 2W2/L W2/L

VX4` VX1` VX2` VX3` CF2 LHEAD
8Cu 4Cu 2Cu Cu
VN
LC Head Filter L
VN CF1 CF1
R1 VBIAS R2
Cu Cu
W/L
M1 M2
C1 C2
8R VX1 8R
2Cu VX1` 2Cu

2W/L
V+ LC Tank V- V+ 4R 4R V-
VX2
4Cu VX2` 4Cu
C3 C4 4W/L
2R VX3 2R
M3 M4
8Cu VX3` 8Cu
R3 R4 8W/L
VBIAS
VP R R
VX4
LC Tail Filter
VX4`
VP
Cu 2Cu 4Cu 8Cu
LTAIL CF2 W2/L 2W2/L 4W2/L 8W2/L

VX1 VX2 VX3 VX4
Figure 4.13 Proposed Complementary Class-C VCO with Dual Second Harmonic
LC Filtering Tanks
Figure 4.13 showcases the proposed complementary Class-C VCO with dual
second harmonic filtering tanks. Two LC filters are inserted into both the head and tail of
the VCO. The first LC filter at the head is connected in between the AC ground source,
69
VDD and the source terminal of PMOS differential pair whereas LC tail filter is in
between source terminal of NMOS and ground. The source terminals for NMOS and
PMOS may both swing over VDD and ground, respectively. As a result, voltage
efficiency is improved. While the head and tail filters are resonating at 2fLO, both the tank
impedances are purely real and hence preventing flicker noise conversion from loading
into the tank even when the -gm transistors are driven into triode region.
The motivation behind selecting the Class-C VCO topology for BLE applications
stems from its inherent advantages and suitability for low-power wireless communication.
Class-C VCOs are known for their high efficiency and low power consumption
characteristics, making them an ideal choice for battery-operated IoT devices. BLE
technology, designed for low-power applications and energy-constrained devices,
requires VCOs that can operate efficiently within a limited power budget. Additionally,
Class-C VCOs offer excellent phase noise performance, which is crucial for reliable
communication in wireless systems. By incorporating LC head and tail filters, the
proposed design further enhances the phase noise characteristics, ensuring stable and
accurate signal generation within the desired frequency range of BLE.
The Switched Capacitor Array (SCA) is a key component in the LC tank of the
oscillator. Each stage within the SCA has a specific function. The oscillating frequency
is inversely proportional to the capacitance. The fixed capacitor (CF) determines the
highest oscillating frequency and also helps tolerate the parasitic components of other
devices, maintaining the FoM performance. The switched capacitor stage separates the
tuning range into stages and determines the overall tuning range. Binary bits are used to
stack the switched capacitors, with each bit corresponding to a specific capacitance value.
The capacitance is loaded into the LC tank only during the ON state determined by the
biasing voltage.
70
Figure 4.14 Implemented 4-Bits Switched Capacitor Array
4.4 Simulated Phase Noise and Figure-of-Merit (FoM)
-60
2.4G Hz
-70 3.1G Hz
-93.39
-80
-90
-100
-110
-101.08 -121.82
-120
-130 -143.30
-140
-128.17
-150 -148.82
10k 100k 1M 10M

Offset Frequency (Hz)
Figure 4.15 Simulated Phase Noise vs Offset Frequency
71
198
194.74 195.39
195
193 191.60
190.11
187.65
Figure-of-Merit (dBc/Hz)
190
188
185
181.69
183
180
178 2.4G Hz
3.1G Hz
175
10k 100k 1M 10M
Offset Frequency (Hz)
Figure 4.16 Simulated Figure-of-Merit vs Offset Frequency
Phase Noise @ 100k

Phase Noise @ 1M
-90 Phase Noise @ 10M
-95
-100
-105
-110
-115
-120
-125
-130
-135
-140
-145
-150
2.3 2.4 2.5 2.6 2.7 2.8 2.9 3.0 3.1 3.2
Oscilating Frequency (Hz)
Figure 4.17 Simulated Phase Noise vs Oscillating Frequency

72
FoM @ 100k
196
FoM @ 1M
FoM @ 10M
195
194
193
192
Figure-of-Merits (dBc/Hz)
191
190
189
188
187
186
185
184
183
182
181
2.3 2.4 2.5 2.6 2.7 2.8 2.9 3.0 3.1 3.2
Oscilating Frequency (Hz)
Figure 4.18 Simulated Figure-of-Merit vs Oscillating Frequency
The proposed VCO is designed and simulated using 65nm CMOS technology.
The width and length (W/L) of the NMOS and PMOS -gm differential pair are sized at
8µm/60nm and 16µm/60nm respectively. A total of 3 inductors are implemented, which
are located in the main LC tank (LM = 3.0167nH ; QM =15.386 ), the head and tail LC
filters (LHEAD/TAIL = 2.0822nH ; QHEAD/TAIL = 13.034). The main LC tank consists of 4-bit
MOM switchable capacitors with a LSB of 96.312fF, together with a fixed MOM
capacitor of 195.414fF. Whereas, for the LC head and tail filter, a similar 4-bit MOM
switchable capacitor is utilized, with LSB at 290.022fF and fixed capacitor at 18.406fF.
The proposed VCO is tunable from 2.403-to-3.101 GHz, depicting a tuning range
of 25.45%. It operates at a supply voltage, VDD of 1.0V while drawing a 1.271mA DC
current at a carrier frequency fmin = 2.403 GHz and 1.423mA at fmax = 3.101 GHz. Figure
4.16 portrays the simulated FoM performance of the VCO while the corresponding phase
noise performance is simulated as shown in Figure 4.15. The FoM at thermal noise region
73
(10 MHz offset) is maintained between 191.60 and 195.39 dBc/Hz across the tuning
range. On the other hand, Figure 4.18 and Figure 4.17 reveals the simulated FoM
performance and phase noise respectively across the tuning frequencies in 100 kHz, 1
MHz and 10 MHz offset frequency. From Figure 4.17, the phase noise at 100 kHz offset
varies from -93.39 to -101.1 dBc/Hz due to flicker noise dominance at high frequency.
Then from Figure 4.18, it is noticeable that the FoM at 1 MHz and 10 MHz is consistently
maintained above 190dBc/Hz throughout the tuning frequency with less than 0.5 dB
variation.
4.5 Physical Layout
Figure 4.19 Physical Layout of Proposed VCO

74
Figure 4.19 which depicts the physical layout of the proposed VCO consumes a
space of 900µm x 460µm. There are a total of three on-chips inductors which took up half
the space which is indicated by the orthogonal shapes where one located at the top and
another two located at the bottom. The top inductor which is the largest inductor is the
main inductor used in the oscillator as its LC tank whereas the bottom two are for LC
filtering which is prominently attached to the top and bottom of the circuit as shown in
Figure 4.13. The squared boxes in the physical layout are the capacitors which are paired
with inductors to serve as LC tank. All the subsection for the VCO has been properly
connected with the same connection as the schematic design. On top of that, this VCO
layout design has fulfil the Design Rule Check (DRC), where the fabrication rule is being
determined by the founder. In this case, as we’re using CMOS 65nm technology from
TSMC, the DRC format followed in this project would be the design rules determined by
TSMC. On a further note, the layout has also successfully passed the Layout Vs
Schematic (LVS) check, where the functionality and connections of the layout is
compared to the schematics as a proof-checking. Also, Parasitic Extraction (PEX) has
been carried out to achieve accurate circuit modelling, timing analysis, signal integrity
optimization, power analysis, and ensuring reliability and yield in integrated circuit
designs.
4.6 Comparison with Current State-of-The-Arts VCO
Table 4.9 encapsulates the performance and benchmarks of the proposed VCO
with recently reported state-of-the-art oscillators. With the aid of dual second harmonic
LC filtering for both NMOS and PMOS differential pair, the proposed Class-C CMOS
LC VCO exhibits competitive power consumption and phase noise performance
comparatively, leading to a better overall performance and achieve highest FoM
performance at 194.7 dBc/Hz among all reported works.
75
Table 4.9 Comparisons of Proposed Design’s Phase Noise Performance, Power
Consumption and Figure-of-Merit (FoM) with Current State-of-The-Arts
VCOs
Phase Power
Operating Technolog Supply
Noise Consumpti FoM@1M
Source Frequency y Node Voltage
@1M on (dBc/Hz)
(G Hz) (mm) (V)
(dBc/Hz) (mW)
Proposed 2.4 65 1.0 -128.1 1.28 -194.7

Design
(del Pino
Suárez &
1.77 90 1.2 -112 3.96 -171
Khemchan
dani, 2021)
(Sachan et
2.4 180 1.8 -124 2.86 -187.25
al., 2018)
(Shasidhara
n et al., 2.59 180 0.7 -122 0.98 -190.36
2022)
(Chang &
Liang, 3.0 180 1.1 -138 2.38 -183.94
2022)
(Fanori &
Andreani, 3.8 90 1.2 -130 2.2 -191.5
2013b)
(Tohidian
5.1 90 0.6 -127 0.86 -192.3
et al., 2011)
76
CHAPTER 5 : CONCLUSION AND FUTURE WORK
5.1 Conclusion
In conclusion, this paper successfully achieved its objectives in designing an
Ultra-Low Power Voltage-Controlled Oscillator (VCO) for Bluetooth Low Energy (BLE)
Internet of Things (IoT) applications. The first objective was to design an oscillator that
operates on a low voltage supply (within 1V) while consuming minimal power to extend
the operational life of the IoT device. This was accomplished by implementing a Class-C
complementary cross-coupled topology with LC head and tail filters, effectively
addressing flicker noise conversion and reducing power consumption.
The second objective was to design a VCO that generates stable and accurate
output signals with a wide range of frequencies within the BLE band (2.4 GHz - 2.48
GHz), allowing for flexibility in frequency selection and tuning. The proposed VCO
demonstrated a remarkable tuning range of 25.45%, covering the desired frequency range
which stems from the application of Switched Capacitor Array (SCA), enabling tuning of
oscillating frequency.
The third objective involved the development of a comprehensive testbench to
validate the performance of the Ultra-Low Power VCO. Through state-of-the-art
techniques, the VCO's performance was thoroughly evaluated, and it showcased
exceptional phase noise characteristics of 128.1 dBc/Hz at 2.4 GHz and 1 MHz offset
frequency. Moreover, the power consumption was minimized to 1.273mW, leading to an
impressive Figure-of-Merit (FOM) of 194.7 dBc/Hz, surpassing existing works in this
field.
Overall, this paper successfully designed and evaluated an Ultra-Low Power VCO
for BLE IoT applications, meeting the objectives of low power operation, wide frequency
range, and accurate signal generation. The proposed design offers a promising solution
77
for energy-efficient wireless communication in IoT devices, contributing to the
advancement of BLE technology.
5.2 Future Work
In future work, it is essential to consider the fabrication and measurement of the
proposed Ultra-Low Power Voltage-Controlled Oscillators (VCOs) for Internet-of-
Things (IoT) applications. Sending the designed VCO circuits for fabrication and
conducting physical measurements will validate their performance, allowing for
adjustments and optimizations if needed. Measurements on fabricated VCOs provide
insights into real-world behaviour, process variations, and environmental effects, leading
to the refinement of design methodologies and the development of robust techniques.
Combining simulation, analysis, and physical measurements will advance the
development of efficient VCOs for IoT, contributing to the growth and innovation of low-
power wireless communication systems.
In order to propel the development of Ultra-Low Power Voltage-Controlled
Oscillators (VCOs) for Internet-of-Things (IoT) applications, there are several promising
avenues for future research that can further optimize their performance. One area of
investigation involves minimizing the area consumption by incorporating transformers in
the tail and head filters of the VCO design. Currently, the presence of two separate
inductors contributes to larger chip area requirements. By integrating a single transformer
that connects one end to the head filter and the other to the tail filter, significant reduction
in chip area can be achieved. This approach holds great potential for optimizing space
utilization, allowing for more compact and efficient IoT devices.
Furthermore, exploring higher-level classes of oscillators, such as class D and
above, which already utilize transformers, presents an intriguing opportunity for
improving the Figure-of-Merit (FoM) of VCOs. These advanced oscillator topologies

78
have demonstrated superior power efficiency and performance in other applications. By
venturing into these higher classes, researchers can investigate the feasibility of
implementing such designs in ultra-low-power VCOs for IoT applications. This
exploration may involve addressing challenges such as maintaining stability, reducing
power consumption, and mitigating potential noise interference.
Another important aspect for future research is the investigation of innovative
techniques to further minimize power consumption in VCOs. One potential approach is
the utilization of body biasing, a method that dynamically adjusts the bias voltage of
transistors to optimize power efficiency. By carefully optimizing the bias voltages,
researchers can achieve a balance between power consumption and performance, leading
to even more power efficient VCO designs. Additionally, exploring advanced low-power
design methodologies, such as subthreshold operation or voltage scaling techniques,
could also contribute to reducing power consumption in VCOs.
Moreover, the integration of advanced fabrication technologies, such as FinFET
or nanowire transistors, into the VCO design process holds promise for achieving even
lower power consumption and improved performance. These technologies offer
advantages such as reduced leakage currents and improved device characteristics, which
can directly impact the power efficiency of VCOs.
In conclusion, future research in the field of Ultra-Low Power Voltage-Controlled
Oscillators for IoT applications should focus on minimizing area consumption by
implementing transformers, exploring higher-level oscillator classes, investigating
techniques to further reduce power consumption, and integrating advanced fabrication
technologies. By addressing these areas, researchers can push the boundaries of ultra-
low-power VCO design, leading to more efficient and optimized solutions for IoT devices.
79
5.3 Impact of Work to Environment and Study
The concept of sustainable development entails meeting the present needs without
compromising the ability of future generations to meet their own needs. This definition,
which holds great political significance, was initially introduced in the Brundtland Report
by the Brundtland Commission in 1983 (Paul, 2008). It encompasses two key ideas:
addressing the essential needs of the world's poor (referred to as needs) and
acknowledging the limitations imposed by technology and social organization on the
environment's capacity to meet present and future needs. In contemporary times, it is
crucial to consider sustainable development in the development of any products or
systems. Such considerations encompass three aspects: social, economic, and
environmental. In the development of the VCO, the objective was to offer a
comprehensive solution in the field of LC-VCO that incorporates all aspects of
sustainable development.
From a social perspective, the proposed VCO benefits the Integrated Circuits (IC)
design community by fostering a healthier community. While the prevailing trend in VCO
development focuses on achieving the lowest possible power consumption, the proposed
VCO delivers commendable power consumption performance without compromising
other performance parameters. A comparison with the most recent work in Table 4.9
reveals that the proposed VCO reduces power consumption at a similar oscillating
frequency. Furthermore, with enhancement in phase noise performance, the proposed
VCO exhibits improved Figure of Merit (FoM) performance at 194.7 dBc/Hz. Therefore,
socially, the VCO contributes to a better overall performance with reduced power
consumption.
In the context of Industry 4.0, where industries emphasize machine-to-machine
connectivity through IoT (Internet of Things) via wireless communication, the VCO plays
80
a critical role and consumes significant power. By implementing the proposed VCO in
IoT devices, industries stand to benefit in the foreseeable future as it leads the trend of
ultra-low-power VCO development. Additionally, the proposed VCO is designed based
on the common BLE (Bluetooth Low Energy) application, making it applicable to a broad
community in IoT applications, further promoting social sustainability.
In terms of economic sustainability, the proposed VCO generates job
opportunities in the semiconductor industry. With the leading trend of the proposed ultra-
low-power VCO development, industries will require more experts and IC designers to
implement the VCO in various systems such as transceivers and PLLs. Moreover, the
fabrication process of the VCO and subsequent device testing will require additional
workforce, creating job opportunities. Furthermore, by developing a low-power VCO,
IoT devices can operate with less power, resulting in a longer battery life and increased
economic sustainability.
Lastly, in terms of environmental sustainability, the proposed VCO demonstrates
its contribution towards a better environment. As the VCO is a crucial and power-
consuming component in IoT device transceivers, the proposed VCO achieves
environmental sustainability by reducing power consumption. By decreasing power
consumption, the number of device charging cycles is significantly reduced, leading to
lower greenhouse gas emissions. Additionally, the achievement of ultra-low-power
applications allows for reduced battery capacity in portable IoT devices, resulting in less
resource requirements during product manufacturing and disposal. This not only reduces
the environmental impact of IoT devices but also promotes a more sustainable use of
resources.
81
CHAPTER 6 : REFERENCES
Abdelatty, O., Chen, X., Alghaihab, A., & Wentzloff, D. (2021). Bluetooth
Communication Leveraging Ultra-Low Power Radio Design. Journal of Sensor
and Actuator Networks, 10(2), 31.
Al-Sarawi, S., Anbar, M., Abdullah, R., & Al Hawari, A. B. (2020). Internet of things
market analysis forecasts, 2020–2030. 2020 Fourth World Conference on smart
trends in systems, security and sustainability (WorldS4),
Andrae, A. S., & Edler, T. (2015). On global electricity usage of communication

technology: trends to 2030. Challenges, 6(1), 117-157.
Andreani, P., & Sjoland, H. (2001). A 2.2 GHz CMOS VCO with inductive degeneration
noise suppression. Proceedings of the IEEE 2001 Custom Integrated Circuits
Conference (Cat. No. 01CH37169),
Andreani, P., & Sjoland, H. (2002). Tail current noise suppression in RF CMOS VCOs.
IEEE Journal of Solid-State Circuits, 37(3), 342-348.
Askari, S., & Saneei, M. (2019). Design and analysis of differential ring voltage
controlled oscillator for wide tuning range and low power applications.
International Journal of Circuit Theory and Applications, 47(2), 204-216.
Azam, S. K., Ibrahimy, M. I., Motakabber, S., & Hossain, A. Z. (2019). Plans for planar:
Phase-noise reduction techniques in voltage-controlled oscillators. IEEE
Microwave Magazine, 20(11), 92-108.
Bhat, A., & Krishnapura, N. (2018). Low $1/f^{3} $ phase noise quadrature LC VCOs.
IEEE Transactions on Circuits and Systems I: Regular Papers, 65(7), 2127-2138.
Bulić, P., Kojek, G., & Biasizzo, A. (2019). Data transmission efficiency in bluetooth low
energy versions. Sensors, 19(17), 3746.
Chang, Y. H., & Liang, J. F. (2022). CMOS voltage‐controlled oscillator using inductive
dual‐balance source degeneration. Electronics Letters, 58(25), 946-948.
CHEN, H., ZHONG, Y., & MENG, Z. (2017). Low Phase Noise LC-VCO with Multi-
stage Filtering.
Chen, X., Breiholz, J., Yahya, F. B., Lukas, C. J., Kim, H.-S., Calhoun, B. H., &
Wentzloff, D. D. (2019). Analysis and design of an ultra-low-power bluetooth
low-energy transmitter with ring oscillator-based ADPLL and 4$\times
$ frequency edge combiner. IEEE Journal of Solid-State Circuits, 54(5), 1339-
1350.
82
Chen, X., & Touba, N. A. (2009). Fundamentals of CMOS design. In Electronic Design
Automation (pp. 39-95). Elsevier.
Cordella, M., Alfieri, F., & Sanfelix, J. (2021). Reducing the carbon footprint of ICT
products through material efficiency strategies: A life cycle analysis of
smartphones. Journal of Industrial Ecology, 25(2), 448-464.
Darroudi, S. M., Gomez, C., & Crowcroft, J. (2020). Bluetooth low energy mesh networks:
A standards perspective. IEEE Communications Magazine, 58(4), 95-101.
del Pino Suárez, F. J., & Khemchandani, S. L. (2021). A New Current-Shaping Technique
Based on a Feedback Injection Mechanism to Reduce VCO Phase Noise. Sensors,
21(19), 6583.
Devnath, B., Hassan, M. T., Jamal, A., Paul, S., & Sikder, M. M. (2021). Study On
MOSFET (Metal Oxide Semiconductor Field Effect Transistor) And CNTFET
(Carbon Nanotube Field Effect Transistor) Also VLSI Circuit Design Using Both
MOSFET & CNTFET
Díaz-Rizo, A. R., Aboushady, H., & Stratigopoulos, H.-G. (2022). Anti-Piracy Design of
RF Transceivers. IEEE Transactions on Circuits and Systems I: Regular Papers.
Ding, T., Fan, X., & Zhao, D. (2019). Ka‐band wideband VCO with LC filtering
technique in 65‐nm CMOS. Electronics Letters, 55(10), 581-583.
Elhayatmy, G., Dey, N., & Ashour, A. S. (2018). Internet of Things based wireless body
area network in healthcare. In Internet of things and big data analytics toward
next-generation intelligence (pp. 3-20). Springer.
Enz, C., Chicco, F., & Pezzotta, A. (2017). Nanoscale MOSFET modeling: Part 2: Using
the inversion coefficient as the primary design parameter. IEEE Solid-State
Circuits Magazine, 9(4), 73-81.
Ericsson. (2022). Ericsson mobility report. Ericsson: Stockholm, Sweden.
Esenogho, E., Djouani, K., & Kurien, A. M. (2022). Integrating artificial intelligence
Internet of Things and 5G for next-generation smartgrid: A survey of trends
challenges and prospect. IEEE Access, 10, 4794-4831.
Fanori, L., & Andreani, P. (2013a). A high-swing complementary class-C VCO. 2013
Proceedings of the ESSCIRC (ESSCIRC),
83
Fanori, L., & Andreani, P. (2013b). Highly efficient class-C CMOS VCOs, including a
comparison with class-B VCOs. IEEE Journal of Solid-State Circuits, 48(7),
1730-1740.
Fanori, L., Liscidini, A., & Andreani, P. (2012). A 6.7-to-9.2 GHz 55nm CMOS hybrid
class-b/class-c cellular TX VCO. 2012 IEEE International Solid-State Circuits
Conference,
Fard, D. M., Charmin, A., & Azadbakht, M. (2019). Self-biased and tail current switching
LC-VCO in CMOS technology. 2019 5th Conference on Knowledge Based
Engineering and Innovation (KBEI),
Ghorbel, I., Haddad, F., Rahajandraibe, W., & Loulou, M. (2019). Design methodology
of ultra-Low-Power LC-VCOs for IoT applications. Journal of Circuits, Systems
and Computers, 28(07), 1950122.
Ghorbel, I., Haddad, F., Rahajandraibe, W., & Loulou, M. (2021). Ultra-low-power
wideband NMOS LC-VCO design for autonomous connected objects. Analog
Integrated Circuits and Signal Processing, 106(2), 375-383.
Gira, G., Ferraro, E., & Borgarino, M. (2021). On the VCO/Frequency Divider Interface
in Cryogenic CMOS PLL for Quantum Computing Applications. Electronics,
10(19), 2404.
Gulati, K., Boddu, R. S. K., Kapila, D., Bangare, S. L., Chandnani, N., & Saravanan, G.
(2022). A review paper on wireless sensor network techniques in Internet of
Things (IoT). Materials Today: Proceedings, 51, 161-165.
Haase, M., Subramanian, V., Zhang, T., & Hamidian, A. (2010). Comparison of CMOS
VCO topologies. 6th Conference on Ph. D. Research in Microelectronics &
Electronics,
Haddad, F., Rahajandraibe, W., & Ghorbel, I. (2019). RF CMOS Oscillators Design for
autonomous Connected Objects. E3S Web of Conferences,
Hegazi, E., Sjoland, H., & Abidi, A. A. (2001). A filtering technique to lower LC
oscillator phase noise. IEEE Journal of Solid-State Circuits, 36(12), 1921-1930.
Hu, Y., Siriburanon, T., & Staszewski, R. B. (2020). Oscillator flicker phase noise: A
tutorial. IEEE Transactions on Circuits and Systems II: Express Briefs, 68(2),
538-544.
Jang, S. L., & Lin, Y. C. (2017). Low‐power three‐path inductor class‐C VCO without
any dynamic bias circuit. Electronics Letters, 53(17), 1186-1188.
84
Jeong, S., Ko, J., & Kim, J. (2019). The effectiveness of a wireless sensor network system
for landslide monitoring. IEEE Access, 8, 8073-8086.
Jerng, A., & Sodini, C. G. (2005). The impact of device type and sizing on phase noise
mechanisms. IEEE Journal of Solid-State Circuits, 40(2), 360-369.
Jung, G., Seong, S., & Lee, M. (2022). A PVT-Insensitive Optimal Phase Noise Point
Tracking Bias Calibration in Class-C VCO. Electronics, 11(4), 629.
Kim, H., Ryu, S., Chung, Y., Choi, J., & Kim, B. (2006). A low phase-noise CMOS VCO
with harmonic tuned LC tank. IEEE Transactions on Microwave Theory and
Techniques, 54(7), 2917-2924.
Kumar, V., Mehra, R., & Islam, A. (2019). A CMOS active inductor based digital and
analog dual tuned voltage-controlled oscillator. Microsystem Technologies, 25(5),
1571-1583.
Liao, X., & Liu, L. (2020). A low-voltage robust class-C VCO with dual digital feedback
loops. IEEE Transactions on Circuits and Systems II: Express Briefs, 67(11),
2347-2351.
Liu, C., Liu, Z., & Feng, H. (2021). An Ultra-Low Phase Noise 1.6 GHz 65nm Class-B
RF-VCO with-139.44 dBc/Hz@ 1MHz Offset. 2021 IEEE 4th International
Conference on Electronics Technology (ICET),
Macaitis, V., & Navickas, R. (2015). CMOS technology based LC VCO review. 2015
Open Conference of Electrical, Electronic and Information Sciences (eStream),
Majid, M., Habib, S., Javed, A. R., Rizwan, M., Srivastava, G., Gadekallu, T. R., & Lin,
J. C.-W. (2022). Applications of wireless sensor networks and internet of things
frameworks in the industry revolution 4.0: A systematic literature review. Sensors,
22(6), 2087.
Mazzanti, A., & Andreani, P. (2008). Class-C harmonic CMOS VCOs, with a general
result on phase noise. IEEE Journal of Solid-State Circuits, 43(12), 2716-2729.
Mazzanti, A., & Andreani, P. (2012). A push–pull class-c cmos vco. IEEE Journal of
Solid-State Circuits, 48(3), 724-732.
Narayanan, A. T., Kimura, K., Deng, W., Okada, K., & Matsuzawa, A. (2014). A pulse-
driven LC-VCO with a figure-of-merit of− 192dBc/Hz. ESSCIRC 2014-40th
European Solid State Circuits Conference (ESSCIRC),
85
Nejadhasan, S., Moazenian, N., Abiri, E., & SALEHI, M. R. (2020). Low power and low
phase noise VCO with dual current shaping for IoTapplications. Turkish Journal
of Electrical Engineering and Computer Sciences, 28(5), 2493-2506.
Pang, J., Wang, S., Tang, Z., Qin, Y., Tao, X., You, X., & Zhu, J. (2022). A new 5G radio
evolution towards 5G-Advanced. Science China Information Sciences, 65(9), 1-
45.
Park, N., & Yang, D.-J. (2002). 1/f noise of NMOS and PMOS transistors and their
implications to design of voltage controlled oscillators. 2002 IEEE Radio
Frequency Integrated Circuits (RFIC) Symposium. Digest of Papers (Cat. No.
02CH37280),
Paul, B. D. (2008). A history of the concept of sustainable development: literature review.

The Annals of the University of Oradea, Economic Sciences Series, 17(2), 576-
580.
Pepe, F., Bonfanti, A., Levantino, S., Samori, C., & Lacaita, A. L. (2013). Suppression
of flicker noise up-conversion in a 65-nm CMOS VCO in the 3.0-to-3.6 GHz band.
IEEE Journal of Solid-State Circuits, 48(10), 2375-2389.
Plagaki, M.-E., Touloupas, K., & Sotiriadis, P. P. (2021). Multi-Objective Optimization

Methods for CMOS LC-VCO Design. 2021 10th International Conference on
Modern Circuits and Systems Technologies (MOCAST),
Qadir, Q. M., Rashid, T. A., Al-Salihi, N. K., Ismael, B., Kist, A. A., & Zhang, Z. (2018).
Low power wide area networks: A survey of enabling technologies, applications
and interoperability needs. IEEE Access, 6, 77454-77473.
Rad, B. B., & Ahmada, H. A. (2017). Internet of things: trends, opportunities, and
challenges. International Journal of Computer Science and Network Security,
17(7), 89-95.
Rahman, T., & Chakraborty, S. K. (2018). Provisioning technical interoperability within

zigbee and ble in iot environment. 2018 2nd International Conference on
Electronics, Materials Engineering & Nano-Technology (IEMENTech),
Rajalingam, P., Jayakumar, S., & Routray, S. (2021). Design and analysis of low power
and high frequency current starved sleep voltage controlled oscillator for phase
locked loop application. Silicon, 13(8), 2715-2726.
Razavi, B. (2021). Jitter-power trade-offs in PLLs. IEEE Transactions on Circuits and

Systems I: Regular Papers, 68(4), 1381-1387.
86
Sachan, D., Kumar, H., Goswami, M., & Misra, P. K. (2018). A 2.4 GHz low power low
phase-noise enhanced FOM VCO for RF applications using 180 nm CMOS
technology. Wireless Personal Communications, 101(1), 391-403.
Shafique, K., Khawaja, B. A., Sabir, F., Qazi, S., & Mustaqim, M. (2020). Internet of
things (IoT) for next-generation smart systems: A review of current challenges,
future trends and prospects for emerging 5G-IoT scenarios. IEEE Access, 8,
23022-23040.
Sharma, E., Saadi, A. A., Margalef-Rovira, M., Pistono, E., Barragan, M. J., de Souza, A.
A. L., Ferrari, P., & Bourdel, S. (2019). Design of a 77-GHz LC-VCO with a
slow-wave coplanar stripline-based inductor. IEEE Transactions on Circuits and
Systems I: Regular Papers, 67(2), 378-388.
Shasidharan, P., Mariappan, S., Yizhi, L., Rajendran, J., & Wong, M. (2022). A 0.49 mm2
CMOS Low-Power TVCO Achieving FoM of 190.36 dBc/Hz for 5G New Radio
Application. Elektronika ir Elektrotechnika, 28(6), 21-26.
Siddique, A., Delwar, T. S., Kurbanov, M., & Ryu, J.-Y. (2020). Low-power low-phase
noise VCO for 24 GHz applications. Microelectronics Journal, 97, 104720.
Tamura, M., Takano, H., Shinke, S., Fujita, H., Nakahara, H., Suzuki, N., Nakada, Y.,
Shinohe, Y., Etou, S., & Fujiwara, T. (2020). 30.5 A 0.5 V BLE Transceiver with
a 1.9 mW RX Achieving− 96.4 dBm Sensitivity and 4.1 dB Adjacent Channel
Rejection at 1MHz Offset in 22nm FDSOI. 2020 IEEE International Solid-State
Circuits Conference-(ISSCC),
Thabet, H., Meillère, S., Masmoudi, M., Seguin, J.-L., Barthelemy, H., & Aguir, K.
(2012). A low power consumption CMOS differential-ring VCO for a wireless
sensor. Analog Integrated Circuits and Signal Processing, 73(3), 731-740.
Thakore, K. P., Shah, D., & Devashrey, N. (2022). Recent Trends in LC Voltage
Controlled Oscillator to Achieve Low Phase Noise: A Literature Survey.
Tohidian, M., Fotowat-Ahmadi, A., Kamarei, M., & Ndagijimana, F. (2011). High-swing
class-C VCO. 2011 Proceedings of the ESSCIRC (ESSCIRC),
Tsuruoka, T., Su, J., & Terabe, K. (2020). A Voltage-Controlled Oscillator Using
Variable Capacitors with a Thin Dielectric Electrolyte Film. ACS Applied
Electronic Materials, 2(9), 2788-2797.
Veni, S., Andreani, P., Caruso, M., Tiebout, M., & Bevilacqua, A. (2020). Analysis and
design of a 17-GHz all-npn push-pull class-C VCO. IEEE Journal of Solid-State
Circuits, 55(9), 2345-2355.
87
Vyas, D. A., Bhatt, D., & Jha, D. (2015). IoT: trends, challenges and future scope. IJCSC,
7(1), 186-197.
Wang, T.-P., & Yan, Y.-M. (2014). A Low-Voltage Low-Power Wide-Tuning-Range

Hybrid Class-AB/Class-B VCO With Robust Start-Up and High-Performance
${\rm FOM} _ {T} $. IEEE Transactions on Microwave Theory and Techniques,
62(3), 521-531.
Wentzloff, D. D., Alghaihab, A., & Im, J. (2020). Ultra-low power receivers for IoT
applications: A review. 2020 IEEE Custom Integrated Circuits Conference
(CICC),
Wu, X., Ma, J., Wang, J., Zhang, X., Zhou, G., & Liang, Z. (2022). Progress, Key Issues,
and Future Prospects for Li‐Ion Battery Recycling. Global Challenges, 2200067.
Xian, L., Wenyuan, L., & Zhigong, W. (2010). A wide tuning range LC-VCO using
switched capacitor array technique. 2010 International Symposium on Signals,
Systems and Electronics,
Zhang, H., Narayanan, A. T., Herdian, H., Liu, B., Wang, Y., Shirane, A., & Okada, K.
(2019). 0.2 mW 70Fs rms-Jitter Injection-Locked PLL Using De-Sensitized
SSPD-Based Injecting-Time Self-Alignment Achieving-270dB FoM and-66dBc
Reference Spur. 2019 Symposium on VLSI Circuits,
Zhang, H., Narayanan, A. T., Liu, B., Okada, K., & Matsuzawa, A. (2017). A pulse VCO
with tail filter. 2017 IEEE Asia Pacific Microwave Conference (APMC),
Zhang, Z., Djahanshahi, H., Gu, C., Patel, M., & Chen, L. (2020). Single-event effects
characterization of LC-VCO PLLs in a 28-nm CMOS technology. IEEE
Transactions on Nuclear Science, 67(9), 2042-2050.
ZhU, M., Ding, T., Liao, X., Ye, S., Jiang, D., & Zhao, D. (2020). A Low-Noise VCO
and a Low-Power Frequency Divider in 40-nm CMOS. 2020 IEEE MTT-S
International Wireless Symposium (IWS),
88
Department of Electrical Engineering
FYP THESIS CORRECTION REPORT
NAME : AMOS LEE CHIUN SHIAN

MATRIC NO. : 17207305/1
PROGRAMME : BACHELOR DEGREE IN ELECTRICAL ENGINEERING
THESIS TITLE :
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3 53, 54 Amended on the Figure Naming
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Correction prepared by:
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Name: Amos Lee Chiun Shian

Date: 20th June 2023
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AN ULTRA-LOW-POWER VOLTAGE-CONTROLLED-

OSCILLATOR (VCO) FOR BLUETOOTH-LOW-ENERGY

AMOS LEE CHIUN SHIAN

AMOS LEE CHIUN SHIAN

RESEARCH PROJECT SUBMITTED TO THE

Name of Candidate: Amos Lee Chiun Shian (I.C/Passport No: 000601-04-0359)

I do solemnly and sincerely declare that:

Candidate’s Signature Date: 15/6/2023

Subscribed and solemnly declared before,

Witness’s Signature Date:

This work presents an innovative Ultra-Low-Power Voltage-Controlled Oscillator

(VCO) designed for Bluetooth-Low-Energy (BLE) Internet-of-Things (IoT) applications.

consumption of 1.273mW at 2.4 GHz. The VCO's ultra-low-power design makes it

incorporation of the 4-bits SCA ensures consistent performance across different

critical challenges in low-power wireless communication systems, presenting a novel

approach to achieve optimal performance in BLE IoT devices.

Keywords: Voltage-Controlled Oscillator (VCO), Bluetooth-Low Energy, Internet-of-

Things (IoT), Complementary Class-C Oscillator, LC Filter

(VCO) Ultra-Rendah-Kuasa yang direka khusus untuk aplikasi Bluetooth-Low-Energy

(BLE) Internet-of-Things (IoT). VCO ini menggunakan topologi osilator Kelas-C

Komplementer dengan tangki penapisan LC harmonik kedua untuk meningkatkan

Komplementer dan tangki penapisan LC harmonik kedua ganda menyumbang kepada

pelbagai aplikasi. Simulasi menyahkan keberkesanan reka bentuk VCO yang

dicadangkan, menunjukkan potensinya untuk pelaksanaan praktikal dalam sistem BLE

IoT. Keseluruhannya, penyelidikan mempersembahkan pendekatan baru untuk mencapai

prestasi optimal dalam peranti BLE IoT.

Perkara (IoT), Oskilator Kelas-C Komplementari, Penapis LC

I would like to extend my sincere appreciation to Professor Ir. Dr. Harikrishnan

he has consistently served as an excellent lecturer, providing me with a comprehensive

understanding of the field of analog design. His scholarly recommendations, precise

to offer valuable advice and guidance.

Furthermore, I would like to express my special thanks to my fellow

we have exchanged feedback and recommendations, despite working on different topics.

Lastly, I feel immensely grateful to my family members, particularly my parents,

Abstract ........................................................................................................................... iii

Table of Contents ............................................................................................................. vi

List of Figures ................................................................................................................... x

List of Tables ................................................................................................................. xiii

List of Symbols and Abbreviations ................................................................................ xiv

CHAPTER 1 : INTRODUCTION ................................................................................. 1

1.1.1 Voltage-Controlled Oscillator (VCO)............................................................... 5

1.1.2 Internet-of-Things (IoT).................................................................................... 7

1.1.3 Wireless Sensor Network (WSN) ..................................................................... 8

1.1.4 Ultra Low Power (ULP) Design ....................................................................... 9

1.1.5 Bluetooth Low Energy (BLE) ......................................................................... 10

1.1.6 CMOS Technology ......................................................................................... 13

1.2 Problem Statement................................................................................................. 14

1.3 Motivation ............................................................................................................. 16

1.4 Objectives .............................................................................................................. 18

2.1 Performance Indicator of Voltage Controlled Oscillator (VCO) .......................... 19

2.1.1 Phase Noise ..................................................................................................... 19

2.1.2 Power Consumption ........................................................................................ 19

2.1.3 Figure-of-Merit (FoM) .................................................................................... 20

2.1.4 Oscillation Frequency of LC VCO ................................................................. 20

2.2 Classes of Voltage-Controlled Oscillator (VCO) .................................................. 21

2.2.1 Class-B VCO .................................................................................................. 21

2.2.2 Class-C VCO .................................................................................................. 23

2.3 LC VCO Design Optimization Approach ............................................................. 25

2.3.1 Inductance Optimization Strategy................................................................... 26

2.3.2 Varactor Optimization Strategy ...................................................................... 27

2.3.3 Active Circuit Optimization Strategy ............................................................. 27

2.4 Techniques on Improving Performance of VCO................................................... 28

2.4.1 LC VCO Topologies ....................................................................................... 28

2.4.2 Filtering Technique ......................................................................................... 33