2016 IEEE Uttar Pradesh Section International Conference on Electrical, Computer and Electronics Engineering (UPCON)

Indian Institute of Technology (Banaras Hindu University) Varanasi, India, Dec 9-11, 2016

Mapping Method Based Space Vector Modulation

Technique for Diode Clamped Multilevel Inverters
N. Susheela P. Satish Kumar S. K. Sharma
Dept., of Electrical Engineering Dept., of Electrical Engineering DRDO
University College of Engineering University College of Engineering Ministry of Defence
Osmania University, Hyderabad Osmania University, Hyderabad Govt. of India
Telangana, India Telangana, India Hyderabad, Telangana, India
Email: nsusheela2007@yahoo.com Email: satish_8020@yahoo.co.in Email: sharmaskhyd@gmail.com

Abstract— This paper implements Space Vector Pulse Width
Modulation (SVPWM) technique for Five level and Seven level
Diode Clamped Inverters (5L-DCMLI and 7L-DCMLI). This
technique is based on mapping methods where initially space
vector is expressed as sum of a contender vector and an error
vector. The contender vector is the one which is nearest to the
reference space vector. An error vector is arrived by calculating
vector difference of a contender vector from reference vector.
The error vector is translated to origin of space vector diagram
by using translation methods. For an n-level inverter, there will
be (n-1) steps in space vector diagram. Since the amplitude of the
error vector will be less than one step of the space vector
diagram, two level space vector technique can be applied to it.
The switching states thus obtained can be added to contender
vector to get a vector which is very close to the reference vector
and follows it in time. Simulation is carried out using
MATLAB/Simulink and the performance results of SVPWM
method of 5L-DCMLI and 7L-DCMLI are presented. The
inverter is connected to Induction motor load and performance is
evaluated.
Keywords- Diode clamped multilevel inverter (DCMLI),
Induction motor (IM) drive, pulse width modulation(PWM), space
vector pulse width modulation (SVPWM), contender vector, error
vector, common mode voltage (CMV), Space Vector Diagram
(SVD).
switching devices to a value less than or equal to Vdc/n,where
‘n’ is the number of levels in an inverter.In the year 1992, the
flying capacitor multilevel inverter was introduced to avoid use
of multiple rating diodes used in diode clamped multilevel
inverter[7]-[12].
Multilevel inverters have many desirable features which get
further enhanced when high frequency PWM is introduced at
every switching level [13]-[18].Some of the major advantages
of multilevel inverters are waveform quality, less distortion in
output voltage and input current, reduced stress on device
(dv/dt), low conducted and emitted radiations, reduced CMV,
lower switching losses and higher efficiency [19]-[21].
Some hybrid topologies of multilevel inverters have
emerged wherein advantages of the three basic technologies are
utilized such as asymmetric hybrid multilevel cells, mixed
level hybrid multilevel cells, soft switched multilevel inverters.
II. THE MAPPING-IN AND OUT METHODS
Space Vector depiction of a four level Inverter is shown in
Fig.1. This diagram shows state vectors of the inverter marked
on edges of polygon. The three phase system realized with two
level inverter will have three state vectors at 0°, 120° and 240°
and another three state vectors just opposite

I. INTRODUCTION
Latest trend in the industrial drives is to use medium
voltages to meet the power requirements going up to hundreds
of kilowatts [1]-[2]. A single switching device cannot be
directly connected to such high voltages. This has given rise to
a new breed of inverters called as multilevel inverters.
Typically these inverters have capacitors for splitting the DC
bus voltage and power semiconductor switches connected in
series. The capacitor voltages are switched in a manner to give
stepped outputs which are closer to sinusoidal waveforms
desired in electric drive system.To achieve such waveforms,
different methods are usedin three types of conventional
multilevel inverters [3]-[6]. Cascaded H bridgeconverters came
into existence in 1975to cascade DC sources from which
multiple levels were achieved. Another approach to get
multiple levels from a single DC source was conceptualized by
splitting DC voltage through capacitors and hence Diode Figure 1. SVD for four level inverter
clamped multilevel topology was developed in 1981. Diodes
are used in these converters to clamp the voltage across

978-1-5090-5384-1/16/$31.00 ©2016 IEEE 410

to them at 180°, 300° and 60° respectively. Edges of these
vectors when joined give rise to a polygon of six edges.
Triangular structures formed by adjacent voltage vectors
are called regions. Thus six regions, each of 60° angular space
will get created. Fig. 1 can be visualized that has number of
regular hexagonal shaped polygons each centered at a state
vector location in the space.
In Fig.1 ‘inner polygon’ is centered at state vector 000 and
is called as I-polygon whereas polygons centered at external
state vector locations, say at state vector location002 as shown,
are called E-polygons.
I-polygon is state vector diagram of two level inverter and
same is the case with E-polygon. However, basic difference
lies in the voltage levels being switched by these vectors.
Voltage levels are lower in case of I-polygon and higher in case
of E-polygon.
By application of volts-sec principle, making dwell time
calculations for switching vectors of two level diagram of I-
polygon becomes straightforward but for E-polygon it remains
cumbersome.To take advantage of simplicity of dwell time
calculation associated with I-polygon, translation of axesof E-
polygon to origin is carried out[5][12][16]-[17]. This is
effected by subtracting vector state at center of the E-polygon
from vectors of its vertices. In this way E-polygon gets mapped
to origin as I–polygon. I-polygon so created can be reverse
mapped to its original location by adding the voltage space
vector at the center of E-polygon [7][12].
Let us take first region of the space vector diagram having
space vectors 000, 100,110 and 111 associated with it and
vector 220 as center of E-polygon.Adding space vector 220 to
voltage space vector yields 220, 320, 330 and 331. These
vectors are associated with first region of E-polygon. By
following this translational process, voltage space vectors of
any polygon can be created by adding the vector at the center
of polygon where it has to be translated. In this paper
translating any E-polygon to origin is considered as ‘mapping
in’ and translating any I-polygon to center of a state vector
location different from origin is considered as ‘mapping out’.
Fig.2 shows the instantaneous reference space vector OT
which lies in region-1 of E-polygon centered at space vector
220. The moving end of the vector OT lies in first region of E-
polygon. For mapping in E-polygon to get I-polygon vector
220 need to be subtracted from vertices of E-polygon to get
OT' which also lies in first region of I-polygon. First region of
I-polygon is associated with vectors 000,100 and 110. If vector
at center of E-polygon i.e. 220 is added to these vectors,
switching vectors 220, 320, 330 for reference space vector OT
is created. In this way difficult task of identifying the region in
which the moving end of the space vector lies and that is
necessary for identifying vector states to which inverter need to
be switched is accomplished.
Equipped with knowledge of translating E-polygon to
I-polygon and generating switching vector states of inverter for
getting inverter output voltage to follow reference vector OT,
task shifts to finding center of E-polygon.
411
Figure 2. Reverse mapping for finding switching vector
A new geometrical approach of least vector space distance
is implemented for finding contender vector nearest to the
reference vector. Such a vector has to be found by applying
least vector space distance principle on nearby vectors which
will contend to become center of the E-polygon and such
vectors are called contender vectors. Contender vector location
considered as center ofE-polygon will be used to translate the
reference space vector to I-polygon located at origin. Once this
is done, generation of switching vectors and the optimum
sequence of switching by application of constant volts-sec
principle of standard two level inverter follows [3][9][12][18].
The switching vectors derived for I-polygon from this process
are converted to switching states of multilevel inverter by
applying mapping out method described earlier.
III. PROCESS OF IDENTIFYING E-POLYGON
The state vector diagram of five level inverter shown in
Fig.3is made of four bands. The bands are B1, B2, B3 and B4.
B1 is the innermost band and B4 is the outermost band. The
innermost band covers I-polygon. The moving end of reference
space vector for the moment shown in Fig.3is lying in band-4.
Fig.3also shows six regionsR1, R2, R3, R4, R5 and R6 each of
which occupies 60° of state space. I-polygon which lies on the
inner edge of band-1has its center at origin. Going by this rule,
the E-polygon in which the state vector lies should be
considered as having center on the inner edge of that band. The
state vectors lying on inner edge of band-4 and belonging to
region-3 will be likely to meet requirement of synthesizing a
switching vector through inverter and accordingly is termed as
contender vectors[7][12].Task of generation of these contender
vectors is also done automatically by starting from the vectors
of I-polygon of the same region to which E-polygon belongs.
The Contender vector which is nearest in state space distance
from reference state vector is chosen as center of the E-
hexagon. It naturally follows that edges of this E-polygon will
be touching adjacent bands. Hence in this paper at each instant
of time, state vector is read and its region and band of operation
is deciphered, contender vectors for center of E-polygon are
generated and then the closest contender space vector location
is considered for center of E-polygon.

Figure 3. Four bands and six regions in SVD of5L-DCMLI
A. Determining Band of Space Vector
The least value to which space vector goes through within a
region will be at perpendicular bisector of edge of
hexagon.This will be the angle at which a hypothetical space
vector successively growing in amplitude(after each cycle) by
infinitesimal steps will first time cross a band.Logically from
this,it follows that for determining band of operation of space
vector, three new axes Ta, Tb and Tcshould be located which
are at 30° from normal 0°, 120°, 240° axes or classical a, b, c
phasor axes as shown in Fig.4. The instantaneous space vector
can be resolved into these axes using Eq. 1 to Eq. 3 where
Va,VbandVc are the instantaneous values of three reference
phase vectors.
ξ͵
Vta = (Va-Vc)
ʹ
ξ͵
Vtb = (Vb-Va)
ʹ
ξ͵
Vtc = (Vc-Vb)
ʹ
Figure 4. Ta, Tband Tc axes for band determination
Maximum amplitude obtained by resolving space vector
along Ta Tb and Tc will be along the axis in 60° of which the
space vector actually lies. Let Vtm be the maximum magnitude
out of three resolved state vector components. Minimum band
span for an‘n’ level inverter will then become
ቀ൫ξ͵Ȁʹ൯൫ܸ݀Ȁሺ݊ െ ͳሻ൯ቁ . Hence the band of operation of state
vector at any instant is shown in Eq.4.
‫ ݌‬ൌ ͳ ൅ ݅݊‫ ݐ‬ቄܸ‫݉ݐ‬ቚ
ξ͵ܸ݀
ʹሺ݊െͳሻ
ቅ (4)
Where p is band number.
B. Finding Contenders for Centre of E-polygon
As stated earlier, if instantaneous state vector lies in a
specific band p then E-polygon in which the state vector lies
should be considered as having center on the inner edge of
band-p. Fig. 5 shows a 60 degree triangular region in space
vector diagram of a five level inverter. Lines PQ, RS and TU
are respectively inner edges of second, third and fourth bands.
PQ which is inner side of B1 is actually part of I-polygon
having center as origin. All vectors of inner edge of any band
can be derived from vectors of inner side of second band or
corresponding side of I-polygon by simple method discussed.
Let the vectors on two ends of inner edge of band 4 of any
region are (x1, y1, z1) and (x2, y2, z2). Let vectors on two ends of
inner edge of band p of same region be (xp1, yp1, zp1) and (xp2,
yp2, zp2). These two vectors are related as per Eq. 5 and Eq.6.
(xp1, yp1, zp1) = (p-1) x (x1, y1, z1) (5)
(xp2, yp2, zp2) = (p-1) x (x2, y2, z2) (6)
(1)
(2)
(3)
Figure 5. Contender vectors creation for center of E-polygon
Since vectors at end of inner edge are known, vectors between
(xp1, yp1, zp1) and (xp2, yp2, zp2) can be generated by adding a
incremental vector ‘δ as shown in Eq. 7 which is difference of
end vector of inner edge of band 2.
δ = (x2, y2, z2) – (x1, y1, z1) (7)
Adding δ for (p-1) times to (xp1, yp1, zp1) will give (xp2, yp2, zp2).
This establishes a method of generation of all the contender
vectors on the inner side of any band by using vectors of I-
polygon of same region. The contender vector nearest to the
reference vector is taken for center of the E-polygon. It means
that the reference vector will lie somewhere in the
412
 regionenclosed by six vectors of E-polygon. To find the
smallest distant contender vector we find distance between
contender vector from reference vector. The distance of nth
vector ‘dn’ as shown in Eq. 10 can be evaluated from Eq. 8 and
9.
Vxyz = Vxyzmagx + 1i * Vxyzmagy (8)
Vref = |Vref|* cos(theta) + 1i * |Vref|*sin(theta) (9)
dn = abs (Vxyz - Vref) (10)
Vxyzmagx and Vxyzmagy are the magnitude of resolved components
of contender vectoralong real and imaginary axes respectively.
Theta is the angle of the reference vector with respect to real
axis. The space vector distance of ‘n’ contender vectors can be
compared and the one with leastspace vector distance from
reference vector can be identified. This contender vector can be
taken for center of E-polygon.
As an example of mapping out shown in Fig. 5, where
reference space vector T lies in fourth band which means (p=4)
and it is located in region-3. The inner edge of fourth band is
switching vectors will be generated without use of look up
tables.
V. RESULTS AND DISCUSSION
The mapping method is implemented for five level and
seven level diode clamped multilevel inverters. However, this
approach is generic and can be applied to other topologies as
well. A three phase star connected, Squirrel cage, 4 Pole, 5.4
HP, 400V, 50Hz, 1430 rpm induction motor is used. The motor
has Stator resistance: 1.405Ω, Stator Inductance:0.005839H,
Rotor resistance:1.395Ω, Rotor Inductance:0.005839H, Mutual
Inductance:0.1722H, Inertia:0.0131 Kg/m2, Friction Factor:
0.002985. Overall simulation diagram is shown in Fig.6.
A. 5L-DCMLI:
DC link voltage of 470V is used so that motor gets rated
voltage of about 400V within linear modulation range. Fig. 7
shows three phase voltages having five levels and line voltage
that has ninelevels obtained with modulation index 0.85.
Scope1
Discrete,
<Rotor speed (wm)>

Ts = 1e-006 s. <Electromagnetic torque Te (N*m)>

TUhaving end vectors 030 and 033. The vectors on inner edge powergui <Stator current is_a (A)>
Scope2
of I-polygon for this example are 010 and 011 and incremental Va
<Stator current is_b (A)>

vector as 011-010=001. If 010 and 011 are multiplied by (p-1) A A Vb

<Stator current is_c (A)>

end vectors of inner edge of band-4, vectors 030 and 033 get DC+ Vc
<Stator v oltage v s_q (V)>

<Stator v oltage v s_d (V)>

generated. Successive addition of incremental vector 001 to DC
Source
Vab
B
vector 030 for (p-1) times will give 031, 032 and 033. These B Vbc
Vca
12.5

are contender vectors lying on inner edge of fourth band. DC- Phase A
Constant Tm

A
C C Phase B m
B
IV. GENERATION OF SWITCHING STATES AND THEIR ORDER OF Phase C C
Subsystem 4 Subsystem5
APPLICATION TO INVERTER Asynchronous Machine
SI Units
Vref Vref
For an n level inverter the reference vector Vref will be given by theta theta
Eq.11. rpt seq rpt_seq inverter states states
m m
Vref = |Vref|* cos (theta) + 1i * |Vref|* sin(theta) (11) t t Subsystem3
The contender vector states can also be expressed as shown in Subsystem1 Subsystem2

Eq. 12 Figure 6. Overall simulation diagram of DCMLI

Vxyz = Vxyzmagx + 1i * Vxyzmagy (12)
Eq. 13 gives an error vector 500
Phase A voltage

Verr = Vref– Vxyz (13)

0

In no case the magnitude of this error vector can be greater -500

0 0.005 0.01 0.015 0.02 0.025 0.03 0.035 0.04
than width of a band and it is placed now at origin and its tip Phase B voltage

willlie within I-polygon. Since I-polygon represents two level 500

inverter the switching vectors of two level inverter can be 0

generated for one of the regions,R1 to R6, in which the error

vector lies.The vector states so generated will be created by -500
0 0.005 0.01 0.015 0.02 0.025 0.03 0.035 0.04

four vectors in total out of which there will be two adjacent 500
Phase C Voltage

non-zero vectors and two zero vectors. The adjacent non zero
vectors in a I-polygon are in sequence of 100, 110, 010, 011, 0

001, 101and back to 100. Two null vectors are 000 and 111. -500
Two adjacent vectors are the ones which form theregion, in 0 0.005 0.01 0.015 0.02
Line Volatge Vab
0.025 0.03 0.035 0.04

which Verrlies. Let thesefour vectors be of type (x0, y0, z0) then 500

only task left to get actual switching vectors is to add states of 0

contender vector (xc, yc, zc) to these lowest level switching
vectors of I-polygon -500
0 0.005 0.01 0.015 0.02 0.025 0.03 0.035 0.04
(xp, yp, zp) = (x0, y0, z0) + (xc, yc, zc) (13) Figure 7. Three phase voltages and line voltage of 5L-DCMLI for ma=0.85
This equation defines mapping out which translates two level
vector states to a multi-level inverter. This way the actual

413
 80
Electromagnetic Torque
B. 7L-DCMLI
60
40
20 50
Phase A current
Fig. 11 shows three phase voltages having seven steps and
0 line voltage that hasthirteen steps with full load and modulation
index 0.85. Fig. 12 shows electromagnetic torque, rotor speed
-20 0
0 0.05 0.1 0.15 0.2 0.25 0.3 0.35 0.4 0.45 0.5

1500
Rotor Speed in RPM
-50 and phase currents.
0 0.05 0.1 0.15 0.2 0.25 0.3 0.35 0.4 0.45 0.5
1000
Phase B Current Phase A voltage
500
500 50

0
0
0 0.05 0.1 0.15 0.2 0.25 0.3 0.35 0.4 0.45 0.5 0
-500
Phase C Current 0 0.005 0.01 0.015 0.02 0.025 0.03 0.035 0.04
-50 Phase B voltage
50
0 0.05 0.1 0.15 0.2 0.25 0.3 0.35 0.4 0.45 0.5 500

0 0

-50 -500
0 0.005 0.01 0.015 0.02 0.025 0.03 0.035 0.04
0 0.05 0.1 0.15 0.2 0.25 0.3 0.35 0.4 0.45 0.5
Phase C Voltage
500
Figure 8. Torque, speed and stator currents for 5L-DCMLI at ma=0.85
0

Fig. 8 shows electromagnetic torque, rotor speed and phase -500

0 0.005 0.01 0.015 0.02 0.025 0.03 0.035 0.04

currentsatfull load and modulation index 0.85. Phase currents 500

Line Volatge Vab

arenearly sinusoidal after 0.25 seconds and torque also 0

becomes nearly constant. -500

0 0.005 0.01 0.015 0.02 0.025 0.03 0.035 0.04

Fig. 9 shows three phase voltages having four levels and line Figure 11. Line and phase voltages for 7L-DCMLI for ma=0.85
voltage that has seven levels obtained with one fourth of full
load and modulation index 0.6. This corresponds to operation 100
Electromagnetic Torque

of the inverter in band 3 which means a five level inverter

operating like a four level inverter. Fig. 10 shows 50
50
Phase A current

electromagnetic torque, rotor speed and phase currents. 0

Phase A voltage
0
200
0 0.05 0.1 0.15 0.2 0.25 0.3 0.35 0.4 0.45 0.5

0 Rotor Speed in RPM

1500 -50
-200
0 0.05 0.1 0.15 0.2 0.25 0.3 0.35 0.4 0.45 0.5
-400 1000
0 0.005 0.01 0.015 0.02 0.025 0.03 0.035 0.04 Phase B Current
Phase B voltage
200 500
50
0
0
-200 0
0 0.05 0.1 0.15 0.2 0.25 0.3 0.35 0.4 0.45 0.5
-400
0 0.005 0.01 0.015 0.02 0.025 0.03 0.035 0.04 Phase C Current
Phase C Voltage 50 -50
200
0 0.05 0.1 0.15 0.2 0.25 0.3 0.35 0.4 0.45 0.5
0
0
-200

-400
0 0.005 0.01 0.015 0.02 0.025 0.03 0.035 0.04 -50
Line Volatge Vab
500
0 0.05 0.1 0.15 0.2 0.25 0.3 0.35 0.4 0.45 0.5

0 Figure 12. Torque, speed and stator currentsof 7L-DCMLI at ma=0.85

-500
0 0.005 0.01 0.015 0.02 0.025 0.03 0.035 0.04
The results of phase voltages, line voltage, torque, speed and
Figure 9. Phase voltages and line voltage of 5L-DCMLI for ma=0.6
Phase currents for 0.7 modulation index at one fourth load are
Electromagnetic Torque Phase A current
shown in Fig 13 and 14. In this case inverter operates as six
60
40
level inverter.
20
40 Phase A voltage
0 200
20
0
0 -20
-200
-20
-40
0 0.05 0.1 0.15 0.2 0.25 0.3 0.35 0.4 0 0.05 0.1 0.15 0.2 0.25 0.3 0.35 0.4 -400
0 0.005 0.01 0.015 0.02 0.025 0.03 0.035 0.04

Rotor Speed in RPM Phase B Current Phase B voltage

200
40
1500 0
20
-200
1000
0 -400
0 0.005 0.01 0.015 0.02 0.025 0.03 0.035 0.04
500
-20 Phase C Voltage
200
0
-40 0
0 0.05 0.1 0.15 0.2 0.25 0.3 0.35 0.4 0 0.05 0.1 0.15 0.2 0.25 0.3 0.35 0.4
-200
Phase C Current
40 -400
0 0.005 0.01 0.015 0.02 0.025 0.03 0.035 0.04

20 Line Volatge Vab

500

0
0
-20
-500
-40 0 0.005 0.01 0.015 0.02 0.025 0.03 0.035 0.04
0 0.05 0.1 0.15 0.2 0.25 0.3 0.35 0.4

Figure 10. Torque, speed and stator currents of 5L-DCMLI at ma=0.6 Figure 13. Phase voltages and line voltage of 7L-DCMLI for ma=0.7

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