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Mechatronics Module5
Mechatronics Module5
ddress Bus
These buses carry address of the memory location, each memory location having
its own address, including I/O devices such as monitor, printer, etc.
When a particular address is Memory storing
selected and placed on the address bus, program Address
only that location is open to the 2001
Address
communication from the CPU. Thus Path 2003
CPU is able to communicate with only 2004
AD Bus 2005
one location at a time. Address bus is 2006
Microprocessor
unidirectional. 2007
Data Bu 2008
A computer with an 8-bit data bus 2009
has typically 16-bit address bus, i.e. 16 200A
200B
wires. This size address bus enables 2 16 200C
locations to be addressed, i.e. 65536 and 200D
written as 64K. (K= 1024). More the Datapathor
instructionpath
number of lines of address bus, the
greater the number of address locations
that can be accessed. Fig 6.10 shows the
basic concept of data bus and address Fig. 6.10: Concept of data
and address bus
Table The address capaclty Of different address
No. of lines n 2n•Addressin cn aci
2 22
3
4 2 4 - 16
5 25-32
6 26 - 64
7 27 128
8 28 - 256
9 29-512
10 1024-1K
Il 211 2048 = 2 K
16 2 16= 1024 64 -64K
20 220= 1 M —I Mega
24 224= 16M
30 230= 1024 I G
32 232
ControlBus
A Control bus carries control Data bus
signals between the processor and
variousdevices connected to it, such as
to READdata from an input device or
WRITEdata to an output device. In Memory
addition to this, control bus also carries - ROM CPU I/O
system clock signals, so as to - RAM
synchronise all actions of the
microprocessorsystem. The clock is a
crystal controlled oscillator and Address Bus
produces pulses at regular intervals.
Controlbus is bidirectional. Fig. 6.11 Control Bus
shows the bus architecture in a Fig. 6.11 Bus architecture of a computer
microprocessor.
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