Department of Electronics & Communication Engineering

LINEAR AND DIGITAL IC APPLICATIONS LAB (22EC2252)

(Master Manual)

II B. Tech-ECE II-Semester

(2023-24)
VISION OF THE INSTITUTE
To emerge as a premier institution for technical education in the country through academic
excellence and to be recognized as centre for excellence in Research and Development.

MISION OF THE INSTITUTE

To establish a strong institute by consistently maintaining state of the Art infrastructure and a
cohesive, world class team by providing need based technical education.

VISION OF THE DEPARTMENT

To be a forerunner in advancement of Electronics and Communication technologies through
education and Research to meet the global challenges

MISSION OF THE DEPARTMENT

The Department mission is to

Impart quality education through effective teaching- learning process and make the
M1 learning globally competitive.

M2 Carry out research through constant interaction with research and development
organizations.

M3 Involve in creative and group activities for Career Choices& lifelong learning

M4 Develop skills to solve complex technological problems of current times and

also provide a framework for promoting collaborative and multidisciplinary
activities
 Program Outcomes

PO1 EnEngineering knowledge: Apply the knowledge of mathematics, science, engineering fundamentals,
and an engineering specialization to the solution of complex engineering problems.
PO2 Problem analysis: Identify, formulate, review research literature, and analyze complex
engineering problems reaching substantiated conclusions using first principles of mathematics,
natural sciences, and engineering sciences.
PO3 DeDesign/development of solutions: Design solutions for complex engineering problems and gnsys
Components that meets the specified needs with appropriate consideration for the public health and
Sa safety and the cultural, and environmental considerations.
PO4 Conduct investigations of complex problems: Use research-based knowledge and research
methods including design of experiments, analysis and interpretation of data, and synthesis of the
information to provide valid conclusions.

PO5 Modern tool usage: Create, select, and apply appropriate techniques, resources, and modern
engineering and IT tools including prediction and modeling to complex engineering activities
with an understanding of the limitations.

PO6 The engineer and society: Apply reasoning informed by the contextual knowledge to assess
societal, health, safety, legal and cultural issues and the consequentresponsibilities relevant to the
professional engineering practice
PO7 Environment and sustainability: Understand the impact of the professional engineering
solutions in societal and environmental contexts, and demonstrate the knowledge of, and need for
sustainable development.

PO8 Ethics: Apply ethical principles and commit to professional ethics and responsibilities and norms
in engineering practice

PO9 Individual and team work: Function effectively as an individual, and as a member or leader in
diverse teams, and in multidisciplinary settings
PO10 Communication: Communicate effectively on complex engineering activities with the
engineering community and with society at large, such as, being able to comprehend and write
effective reports and design documentation, make effective presentations, and give and receive
clear instructions
PO11 Project management and finance: Demonstrate knowledge and understanding of the
engineering and management principles and apply these to one’s own work, as a member and
leader in a team, to manage projects and in multi disciplinary environments.
PO12 Life-long learning: Recognize the need for, and have the preparation and ability to engage in
independent and life-long learning in the broadest context of technological changes.
 Program Educational Objectives

PEO1 Domain Knowledge: Synthesize mathematics, science, engineering fundamentals, and laboratory
and attain practical experience to formulate and solve engineering problems in electronics
engineering domain and use of electronic tools.

PEO2
Pr professional Employment: Succeed in entry-level engineering positions within the core

El Electronic engineering or manufacturing firms in industries and with government agencies.

PEO3 Higher Degrees: Succeed in the pursuit of advanced degrees in engineering or other fields

By applying mathematics, science, and engineering fundamentals.

PEO4 Engineering Citizenship: Communicate and work effectively on team-based engineering projects
and practice the professional ethics with a sense of social responsibility.

PEO5 Lifelong Learning: Recognize the importance and have the skills for continued independent
learning to become experts in the chosen fields and broaden the professional knowledge.

Program Specific Outcomes

PSO1 Analyze, design and implement specific engineering problems in the areas of VLSI and
Embedded systems.
PSO2 Apply the knowledge of domain specific skill set for analysis of Signal Processing and
Communications.
PSO3 Analyze and solve the complex engineering problems using state of the art hardware and software
tools.
PSO4 Develop proficiency in innovative technologies to sustain with the dynamic industry challenges
List of Experiments (any twelve Experiments are to be conducted)

Design and Implementation of

1. Inverting and non inverting amplifier using Op Amp and calculate the gain.
2. Adder and Subtractor using Op Amp.
3. Comparator using Op Amp.
4. Integrator and Differentiator circuits using Op Amp.
5. Active LPF and HPF using Op Amp.
6. Circuit using Op Amp to generate sine/square/triangular wave.
7. Monostable Multivibrator using IC 555 and draw its output waveform and also find its
duty cycle.
8. Schmitt Trigger using IC 741 and find its UTP and LTP.
9. Voltage Regulator Using IC 723, IC 7805/ 7809/ 7912 and find its load regulation factor
10. R – 2R Ladder DAC and write a truth table with respective voltages.
11. Design a Gray code converter and verify its truth table.
12. Design a 8×1 Multiplexer using digital ICs.
13. Design a 4 bit Adder/Subtractor using Digital ICs and Add/Sub the following bits
i) 1010 ii) 0101 iii) 1011
0100 0010 1001
14. Design a Decade Counter and verify its truth table and draw respective waveforms.
15. Design 8×3 encoder / 3×8 decoder and verify its truth table.

Major Equipment required for Laboratories:

1. 5 V Fixed Regulated Power Supply/ 0-5V or more Regulated Power Supply.

2. 20 MHz Oscilloscope with Dual Channel.
3. Bread board and components/ Trainer Kit.
4. Digital Trainer Kit
5. Multimeters

ICs required: IC 741, IC 555, IC 723, 7805, 7809, 7912,7486, 74151,7483,74138,

74348,7490.
 EXPERIMENT NO: 1

INVERTING AND NON INVERTING AMPLIFIER

AIM:
To measure the gain and verify the output waveforms of Inverting and non-inverting amplifier using
operational amplifier.

APPARATUS:

S.NO. EQUIPMENT/Components RANGE/TYPE QTY

1. Op Amp (IC741) 1
2. Regulated power supply 0-30V 1
3. CRO 0-30MHZ 1
4. Function Generator 0-1MHZ 1
5. Resistors 1. 1KΩ 2
2. 10KΩ 1
3. 22KΩ 1
6. Bread Board 1

THEORY:

Inverting Amplifier
An inverting amplifier (also known as an inverting operational amplifier or an inverting op-amp) is a
type of operational amplifier circuit which produces an output which is out of phase with respect to its
input by 180o.
This means that if the input pulse is positive, then the output pulse will be negative and vice versa. The
figure below shows an inverting operational amplifier built by using an op-amp and two resistors.
Here we apply the input signal to the inverting terminal of the op-amp via the resistor Ri. We connect the
non-inverting terminal to ground. Further, we provide the feedback necessary to stabilize the circuit, and
hence to control the output, through a feedback resistor Rf. The voltage gain of the inverting operational
amplifier or inverting op amp is,

This indicates that the voltage gain of the inverting amplifier is decided by the ratio of the feedback
resistor to the input resistor with the minus sign indicating the phase-reversal. Further, it is to be noted that
 the input impedance of the inverting amplifier is nothing but Ri. Inverting amplifiers exhibit excellent
linear characteristics which make them ideal as DC amplifiers.

Non inverting Amplifier

The operational amplifier can also be used to construct a non-inverting amplifier with the circuit shown
below. The input signal is applied to the positive or non-inverting input terminal of the operational
amplifier, and a portion of the output signal is fed back to the negative input terminal. Analysis of the
circuit is performed by relating the voltage at V2 to both the input voltage Vin and the output voltage Vo.

The closed-loop gain of the non-inverting amplifier is,

IC 741 PIN DIAGRAM

CIRCUIT DIAGRAM:

Inverting Amplifier
Non Inverting Amplifier

PROCEDURE:
1. The OPAMP was set up as per the circuit diagram (inverting or non-inverting as the case
may be).
2. Power supply was provided and the gain of the amplifier was measured by observing the
output voltage.
3. The gain is calculated by varying the value of feedback resistor (Rf) and keeping the input
resistance constant (Rin).

OBSERVATION TABLE:

S.NO RF Vi (V) Vo (V) Theoratical Practical Gain

Gain
1 1 KΩ 0.4
2 10 KΩ 0.4
3 22 KΩ 0.4

RESULT:
Write your observations
 EXPERIMENT NO: 2

ADDER AND SUBTRACTOR USING OP-AMP

AIM

To study the working of op amp as Adder and Subtractor.

APPARATUS

S.NO. EQUIPMENT RANGE/TYPE QTY

1 Regulated power supply 0-30V 2
2 IC 741 1
3 Resistors 1. 1KΩ - 4

THEORY:

Adder
Op-amp may be used to perform summing operation of several input signals in inverting in inverting and
non-inverting mode. The input signals to be summed up are given to inverting terminal or non-inverting
terminal through the input resistance to perform inverting and non-inverting summing operations
respectively. If the input to the inverting amplifier is increased, the resulting circuit is known as adder.
Output is a linear summation of number of input signals. Each input signal produces a component of the
output signal that is completely independent of the other input signal. When there are two inputs i.e.
Vo= - (V1+V2) this is the inverted algebraic sum of all the inputs. If we connect the inputs to non
inverting terminal then the adder is non inverting adder.

Subtractor

A difference amplifier is a circuit that gives the amplified version of the difference of the two inputs, Vo
=A(V1-V2), Where V1 and V2 are the inputs and A is the voltage gain. Here input voltage V1 is
connected to non-inverting terminal and V2 to the inverting terminal. This is also called as differential
amplifier. Output of a differential amplifier can be determined using super position theorem.
IC 741 PIN DIAGARM

CIRCUIT DIAGRAM

ADDER

10
SUBTRACTOR

PROCEDURE

1. Connect the circuit as shown in the adder circuit diagram.

2. Apply DC voltage from regulated power supply to inputs V1 and V2.

3. Increase input voltages from 0.1V to 0.5V in steps of 0.1V

4. Note down the Vo corresponding to each input (using multimeter).

5. Compare theoretical and practical values.

OBSERVATION TABLE

S.NO V1 (V) V2 (V) Theoratical V0 Practical V0

1
2
3
4
5

RESULT:
Write your observations

11
 EXPERIMENT NO: 3

COMPARATOR USING OP-AMP

AIM
To study the working of op amp as comparator and observe the waveforms.

APPARATUS
S.NO. APPARATUS/EQUIPMENT RANGE/TYPE QTY
1. Breadboard 1
2. Regulated power supply 0-30V 1
3. CRO 0-30MHZ 1
4. Function Generator 0-1MHZ 1
5. IC 741 2
6. Resistors 1KΩ 2

THEORY

Comparator is a non-linear application of in open loop configuration. A Comparator circuit

compares the input signal voltage with a reference voltage at the terminals of an open loop op
amp.

When the reference voltage is set to zero it acts as zero crossing detector. For input signal given
as sine wave output will be a square wave.

A non inverting comparator circuit shown in fig 3 with input voltage applied to noninverting
terminal and Vref to inverting input terminal. The output voltage will be ±Vsat (= Vcc).

When Vi < Vref ; Vo= -Vsat.

When Vi > Vref ; Vo= +Vsat.

12
IC 741 PIN DIAGARM

CIRCUIT DIAGRAM

13
PROCEDURE

1. Connect the circuit as shown in the figure.

2. Set the reference voltage to 1V .

3. Apply a sine wave of 5V p-p with 1 KHz frequency from the function generator.

4. Check the output on CRO.

5. Plot the waveforms on graph sheets.

WAVEFORM

RESULT

Write your observations.

14
 EXPERIMENT NO: 4

INTEGRATOR AND DIFFERENTIATOR USING OP-AMP

AIM
To study the working of op amp as differentiator and integrator.

APPARATUS

S.NO. APPARATUS/EQUIPMENT RANGE/TYPE QTY

1. Digital trainer kit 1
2. Regulated power supply 0-30V 1
3. CRO 0-30MHZ 1
4. Function Generator 0-1MHZ 1
5. IC 741 2
6. Resistors 1. 10 KΩ 2
2. 100 KΩ 1
3. 1 KΩ 1
7. capacitor 10 nF 2

THEORY

Differentiator
An Op-Amp for differentiation is shown. The circuit performs the mathematical
operation of differentiation. The non-inverting terminal is grounded. A resistor RF is
connected in feedback path and a Capacitor C1 is connected between the input signal
source and the inverting terminal of the Op-Amp.

Integrator
An OP-Amp circuit for integration is shown in Fig4. The output voltage waveform of this circuit
is the integral of input voltage. A Capacitor CF is connected in feed back path and a Resistor R1
is connected as the input element. The non- inverting input is grounded. At low frequencies
capacitor acts as open circuit and op-amp acts as open loop amplifier whose gain goes on
increasing. To limit the gain a resistor Rf equal to 10 times R1 is connected in parallel with
Capacitor Cf.

15
CIRCUIT DIAGRAM

Integrator

Differentiator

16
PROCEDURE
1. Connect the circuit as shown in the differentiator circuit diagram.

2. Apply a symmetrical square wave of 5V amplitude peak to peak and 1ms time period.

3. Connect the input and output of the circuit to channel 1and channel 2 of the CRO
respectively and observe the waveforms.

4. Draw the waveforms along with the levels on a graph.

5. Compare the practical values with theoretical values.

WAVEFORMS

Differentiator

Integrator

RESULT
Write your observations.

17
 EXPERIMENT NO: 5

ACTIVE FILTERS- FIRST ORDER LPF, HPF USING OP AMP

AIM:
To calculate the gain and cut off frequency for first order low pass and high pass filters.

APPARATUS
S.NO. APPARATUS/EQUIPMENT RANGE/TYPE QTY
1. Breadboard 1
2. Regulated power supply 0-30V 1
3. CRO 0-30MHZ 1
4. Function Generator 0-1MHZ 1
5. IC 741 2
6. Resistors 1. 10KΩ - 2
2. 3.9KΩ 1
7 capacitors 0.01uf 1

THEORY
Low Pass Filter :

A LPF allows frequencies from 0 to higher cut of frequency, fh. At fh the gain is
0.707 Amax, and after fh gain decreases at a constant rate with an increase in frequency. The
gain decreases by 20dB for 10 fold increase in frequency. Hence the rate at which the gain rolls
off after fh is 20dB/decade or 6 dB/ octave, where octave signifies a two fold increase in
frequency. The frequency f= fh is called the cut off frequency because the gain of the filter at
this frequency is 3 dB down the Maximum gain at 0 Hz. Other equivalent terms for cut-off
frequency are - 3dB frequency, break frequency, or corner frequency.

fh=1/2πRC

High Pass Filter

The frequency at which the magnitude of the gain is 0.707 times the maximum
value of gain is called “low cut off frequency”. Obviously, all frequencies higher than fl are pass
band frequencies with the highest frequency determined by the closed –loop band width of the
op-amp

fl=1/2πRC

18
CIRCUIT DIAGRAMS
FIRST ORDER LPF

Fig 1: LPF

FIRST ORDER HPF

Fig 2:HPF

19
PROCEDURE:
First Order LPF

1. Connections are made as per the circuit diagram shown.

2. Apply sinusoidal wave of constant amplitude as the input such that op-amp does not go into
saturation.

3. Vary the input frequency and note down the output amplitude at each step as shown in
Table(a).

4. Plot the frequency response as shown.

First Order HPF

1. Connections are made as per the circuit diagrams shown.

2. Apply sinusoidal wave of constant amplitude as the input such that op-amp does not go into
saturation.

3. Vary the input frequency and note down the output amplitude at each step as shown in
Table(b).

4. Plot the frequency response as shown.

WAVEFORMS:

20
OBSEVATIONS

a) LPF Vi= 1Vp-p

Frequency(Hz) Vo Vo/Vi=Av Gain in db

100

1K

6K

10K

50K

b) HPF Vi=1Vp-p

Frequency(Hz) Vo Vo/Vi=Av Gain in dB

200

1K

6K

10K

50K

RESULT

Write your observations.

21
 EXPERIMENT NO: 6

WAVEFORM GENERATORS USING OP AMP

AIM:
To study the working of sine/square/triangular waveform generators using Operational
Amplifier.

APPARATUS
S.NO. APPARATUS/EQUIPMENT RANGE/TYPE QTY
1. Breadboard 1
2. Regulated power supply 0-30V 1
3. CRO 0-30MHZ 1
4. Function Generator 0-1MHZ 1
5. IC 741 2
6. Resistors 1. 10KΩ - 2
2. 3.9KΩ 1
7 capacitors 0.01uf 1

THEORY

Sine wave Generator (RC Phase Shift Oscillator)

Conditions for oscillation 1. The phase shift around the feedback loop must be effectively zero
degrees. 2. The voltage gain, ACL around the feedback loop (loop gain) must equal to (or greater
than) one. The voltage gain around the closed feedback loop, ACL, is the product of the
amplifier gain, Av, and the attenuation, B of the feedback circuit. ACL=Av B

RC phase-shift oscillator is a linear electronic oscillator circuit that produces a sine wave output.
It consists of an inverting amplifier element such as a transistor or op-amp with its output fed
back to its input through a phase-shift network consisting of resistors and capacitors in a ladder
network. Each of the three RC networks in the feedback loop can provide a maximum phase shift
approaching 90 degrees. Oscillation occurs at the frequency where the total phase shift through
the three RC network is 180 degrees. Inversion output at the output of op-amp itself produces the
additional 180 degree to meet the requirement for oscillation of 360 degrees (or zero degree)
phase shift around the feedback loop.

Square wave Generator (Astable Multivibrator)

The Astable multivibrator is also called as a free running oscillator. The principle of this circuit
is to force an op-amp to operate in the saturation region. When the output of the circuit is in

22
positive saturation voltage also because we have put a resistor R3 as feedback, the current will
start flowing through the resistor R3, and the capacitor will start charging slowly. As you can see
in the above image, it is shown with the black dotted line. When the capacitor charges reach the
upper threshold voltage, the output will switch from positive saturation voltage to negative
saturation voltage. When that happens, the capacitor will start discharging towards the negative
saturation voltage. Now when the voltage at the non-inverting terminal is slightly more than the
inverting terminal, the output will again switch from negative saturation voltage to positive
saturation voltage. This way by the charging and discharging process, this circuit can generate
the s at the output.

Triangular wave Generator

Triangular wave is generated by alternatively charging and discharging a capacitor with a
constant current. This is achieved by connecting integrator circuit at the output of square wave
generator as shown in the circuit. Assume that V’ is high at +Vsat. This forces a constant current
(+Vsat/R3) through C (left to right) to drive Vo negative linearly. When V’ is low at -Vsat, it
forces a constant current (- Vsat /R3) through C (right to left) to drive Vo positive, linearly.

CIRCUIT DIAGRAM

RC Phase Shift Oscillator

23
Astable Multivibrator

Triangular Wave Generator

PROCEDURE:
1.Setup the circuits on the breadboard and check the connections.

2.Switch on the power supply.

24
3.Observe output and capacitor voltage on two channels of the oscilloscope simultaneously.

4.Draw the waveforms on the graph.

5.Compare the theoretical and practical values

WAVEFORMS
Sine Wave Generator

Square Wave Generator

Triangular Wave Generator

25
 OBSERVATION TABLE
Circuit Theoratical Value Practical Value

Sine Wave Generator 1/2πRC√6

Square Wave Generator 2.2 RC

Triangular Wave Generator R3/4R1R2 C

RESULT:

Write your observations.

26
 EXPERIMENT NO: 7

MONOSTABLE MULTIVIBRATOR USING IC 555

AIM:
To design a monostable multivibrator using IC 555 timer.

APPARATUS :
S.NO. APPARATUS/EQUIPMENT RANGE/TYPE QTY
1. Breadboard 1
2. Regulated power supply 0-30V 1
3. Function Generator 0-1MHZ 1
4. CRO 0-30MHZ 1
5. IC 555 2
6. Resistors 10KΩ 1
7. capacitors 100nf,10nf 1

THEORY:

27
IC 555 Timer

IC-555 Timer is a versatile Monolithic timing circuit that can produce accurate and
highly stable time delays or oscillations. It can be used as an Astable and Monostable
multivibrators. It is available as an 8- pin mini DIP-package.

Monostable multivibrator

Monostable Multivibrator has only one stable state. We can change the stable state by
applying a trigger pulse. The capacitor charges through R1.The larger the time constant R1C, the
longer it takes the capacitor voltage to reach 1/3 VCC. The time constant controls the pulse
width. After the time period given by R1 and C elements the circuit goes back to its stable state.
Even the trigger pulse is removed in between still the circuit will not come back to its stable state
until its time period is reached.The time period of stable state is given by

T=1.1RC

CIRCUIT DIAGRAM:

28
PROCEDURE:
1. Design monostable multivibrator with the pulse width of T= 1.1RC.

2. Connect the circuit as shown in the monostable multivibrator circuit diagram.

3. Observe the waveforms on CRO.

4. Compare theoretical and practical time period.

EXPECTED WAVEFORMS:

OBSERVATION TABLE:
Theoretical Time Period 1.1ms

Practical Time period

RESULT:
Write your observations.

29
 EXPERIMENT NO: 8

R – 2R LADDER TYPE DAC

AIM:
To study the operation of 4 bit R – 2R Ladder type DAC.

APPARATUS:
S.NO. APPARATUS/EQUIPMENT RANGE/TYPE QTY
1. Breadboard 1
2. Regulated power supply 0-30V 2
3. Multimeter 1
4. IC 741 1
5. Resistors 1 KΩ 4
2.2 KΩ 5

THEORY:
R-2R Digital-to-Analogue Converter, or DAC, is a data converter which use two precision
resistor to convert a digital binary number into an analogue output signal proportional to the
value of the digital number. Compared to the R-2R DAC, the binary weighted digital-to-
analogue converter has an analogue output voltage which is the weighted sum of the individual
inputs. Thus it requires a large range of precision resistors within its ladder network, making its
design both expensive and impractical for most DAC’s requiring lower levels of resolution.
As the binary weighted DAC is based on a closed-loop inverting operational amplifier using
summing amplifier topology, this type of data converter configuration may work well for a D/A
converter of a few bits of resolution. But a much simpler approach is using a R-2R resistive
ladder network to construct a R-2R Digital-to-Analogue Converter requires only two precision
resistances.
The R-2R resistive ladder network uses just two resistive values. One resistor has the base value
“R”, and the second resistor has twice the value of the first resistor, “2R”, no matter how many
bits are used to make up the ladder network.

30
CIRCUIT DIAGRAM

PROCEDURE:
1.Connect the circuit as per the circuit diagram

2. Switch on the power supply.

3. Connect the Vref voltage as +5V

4. Calculate the Theoretical Vo for all the input combinations.

5.Note down the output voltage for all the input combinations using multimeter and compare
with the theoretical values.

31
OBSERVATION TABLE:

Binary Input Theoretical Vo Practical Vo

b0 b1 b2 b3 (V) (V)

0 0 0 0

0 0 0 1

0 0 1 0

0 0 1 1

0 1 0 0

0 1 0 1

0 1 1 0

0 1 1 1

1 0 0 0

1 0 0 1

1 0 1 0

1 0 1 1

1 1 0 0

1 1 0 1

1 1 1 0

1 1 1 1

RESULT:

Write your observations.

32
 EXPERIMENT NO: 9

SCHMITT TRIGGER USING IC 741

AIM:
To construct a Schmitt trigger circuit using IC 741, verify the output waveform.

APPARATUS

S.NO. APPARATUS/EQUIPMENT RANGE/TYPE QTY

1. Breadboard 1
2. Regulated power supply 0-30V 1
3. Function Generator 0-1MHZ 1
4. CRO 0-30MHZ 1
5. IC 741 2
6. Resistors 9.1KΩ 1
1KΩ 1

THEORY

When a positive feedback is added to an ideal comparator then the circuit acts as a
Schmitt trigger. The input voltage is applied at the inverting (-ve )terminal and feedback voltage
is at non-inverting (+ ve) terminal of op-amp as shown. This positive feedback loop gain = -
ßAo2 when it is equal to unity then feedback gain Avf is infinity - ßAOL = 1; Af → ∞

Then output changes arbitrarily between extreme values of output voltage. This circuit exhibits
hysterisis or backslash. When input voltage triggers Vo every time it exceeds certain voltage
levels. These levels are called (UTP) upper trigger point and (LTP) lower trigger point.

The hysteresis width is the difference between UTP and LTP voltages i.e.,

VH = VUTP – VLTP .

Let Vo = Vsat the threshold voltage can be calculated as

VUTP = R1 / (R1+R2) . (+ VSAT)

As long as Vi < VUTP then Vo is at +Vsat. If Vi is just greater than VUTP the output switches to –
Vsat until Vi >VUTP as shown in fig.2. For Vo = - Vsat the terminal VLTP.

VLTP = R1 / (R1+R2) . (-VSAT)

33
CIRCUIT DIAGRAM

Figure: Schmitt trigger using IC741

PROCEDURE

1. Connect the circuit as shown in the Schmitt trigger using IC 741.

2. Use a 10V p-p sinewave of 1 kHz as input.

3. Rectangular wave displays on CRO and measure UTP and LTP.

4. Use x-y mode in CRO and observe hysteresis curve on CRO.

EXPECTED WAVEFORMS

34
OBSERVATIONS

For Input amplitude = 10Vp-p.

THEORETICAL PRACTICAL

VUTP R1 / (R1+R2) . (+ VSAT)

VLTP R1 / (R1+R2) . (-VSAT)

RESULT

Constructed a Schmitt trigger circuit using IC 741 and verified the output waveforms.

35
 EXPERIMENT NO: 10

VOLTAGE REGULATORS USING IC 723/ 7805/ 7809/ 7912

AIM
To Study the Operation Of IC723 Voltage Regulator, three Terminal Voltage Regulators-
7805, 7809, 7912 also to find out their line and load regulation

APPARATUS REQUIRED

S.NO. APPARATUS/EQUIPMENT RANGE/TYPE QTY

1. Regulator LM723 1
2. Regulated power supply 0-30V 1
3. Resistor 7.9KΩ 2
3.9KΩ 1
4. Variable Resistor 0-10KΩ 1
5. Capacitor 100pf 1
0.1uf 1
6. Ammeter (0-100)mA 1
7. Voltmeter 0-20V 1
9. 7805 1
10. 7809 1
11. 7912 1
12 Breadboard 1

THEORY

The three-terminal regulators have the following limitations

1. No short-circuit protection

2. Output voltage (+ve or –ve) is fixed

These limitations have been overcome in 723 general purpose regulator. This IC is
inherently low current device but can be boosted to provide 5 amps or more current by
connecting external components. The limitation of 723 is that it has no in-built thermal
protection. It also has no short-circuit current limits. The IC723 has two sections. The first
section consists of Zener Diode constant current source and a reference amplifier.

The other section of the IC consists of an error amplifier series pass transistor and a
current limit transistor. This is a 14-pin DIP package. The main Features of 723 include an input

36
voltage of 40v max, output voltage is adjustable from 2V to 37V, 150 mA output current without
external pass resistor, can be used as either a linear or a switching regulator.

A voltage regulator is a circuit that supplies constant voltage regardless of changes in

load currents. Except for the switching regulators, all other types of regulators are called linear
regulators. IC LM 723 is general purpose regulator. The input voltage of this 723 IC is 40 V
maximum. Output voltage adjustable from 2V to 30V. 150mA output current external pass
transistor. Output current in excess of 10Ampere possible by adding external transistors. It can
be used as either a linear or a switching regulator. The variation of DC output voltage as a
function of DC load current is called regulation.

Three terminal voltage regulators have three terminals which are unregulated input (Vin),
regulated output (Vo) and common or a ground terminal. These regulators do not require any
feedback connections.
IC 723 PIN DIAGRAM

Positive voltage regulators:

78xx is the series of three terminal positive voltage regulators in which xx indicate the
output voltage rating of the IC.

7805:
This is a three terminal regulator which gives a regulated output of +5V fixed. The
maximum unregulated input voltage which can be applied to 7805 is 35V.

37
7809:
This is also three terminal fixed regulator which gives regulated voltage of +9V.
Negative voltage regulators:
79xx is the series of negative voltage regulators which gives a fixed negative voltage
as output according to the value of xx.

7912:
This is a negative three terminal voltage regulator which gives a output of -12V.

Line Regulation:

It is defined as the change in the output voltage for a given change in the input voltage. It
is expressed as a percentage of output voltage or in millivolts.

%RL = ΔVo/ΔVin x 100

Load Regulation:

It is the change in output voltage over a given range of load currents that is from full load
to no load. It is usually expressed in millivolts or as a percentage of output voltage.

%R Load = [(Vnl-Vfl)/Vnl] x100

CIRCUIT DIAGRAM

Fig: Circuit diagram of IC 723

38
 Fig: Circuit diagram of voltage regulator 7805, 7809, 7912

PROCEDURE

IC 723

1. LINE REGULATION:

1. Connections are made as per the circuit diagram.

2. Power supply is connected to 12 and 7 terminals.

3. Volt meter is connected to 10 and 7 terminals.

4. By increasing the input voltage corresponding volt meter reading is noted.

2. LOAD REGULATION:

1. Connect the load to the terminals 10 and GND.

2. Keep the input voltage constant at which line regulation is obtained

3. The maximum load value is calculated from IC ratings.

39
4. Now, we decrease the load resistance and note down the corresponding value of the output in
volt meter.

5. Plot the graph for load verses load regulation.

VOLTAGE REGULATOR 7805, 7809, 7912

1 .Connect the circuit as shown in the figure.

2. Apply unregulated voltage from 7.5V to 35V and observe the output voltage.

3. Calculate the line and load regulation for the regulator.

4 .Plot the graphs from the observations.

5 .Repeat the same for the remaining regulators.

OBSERVATIONS

IC 723

LINE REGULATION

%RL = ΔVo/ΔVin x 100

Input Voltage(Vi) Output

Voltage(Vo)

LOAD REGULATION

Regulated Load Load

output(Vo) Current(mA) Resistance(Kohm)

%REGULATION== [(VNL-VFL)/VFL]*100

40
 Input Voltage(Vi) 7805(Vo) 7809(Vo) 7912(Vo)

EXPECTED GRAPH

RESULT

Write your observations.

41
 EXPERIMENT - 11
DESIGN A 4 BIT ADDER / SUBTRACTOR

AIM:
To construct the 4 Bit Adder and Subtractor

APPARATUS:
• Digital Trainer Kit
• Regulated Power Supply 5V
• Light Emitting Diode (LED)
• Digital ICs: IC 7483
IC 7486
• Connecting Wires
• Patch Cords

THEORY:
A Binary Subtractor is a decision making circuit that subtracts two binary numbers from each
other, for example, X – Y to find the resulting difference between the two numbers. Unlike the
Binary Adder which produces a SUM and a CARRY bit when two binary numbers are added
together, the binary subtractor produces a DIFFERENCE, D by using a BORROW bit, B from
the previous column. Consider the simple subtraction of the two denary (base 10) numbers
below. We cannot directly subtract 8 from 3 in the first column as 8 is greater than 3, so we have
to borrow a 10, the base number, from the next column and add it to the minuend to produce 13
minus 8. This “borrowed” 10 is then return back to the subtrahend of the next column once the
difference is found. Simple school math’s, borrow a 10 if needed, find the difference and return
the borrow. The subtraction of one binary number from another is exactly the same idea as that
for subtracting two decimal numbers but as the binary number system is a Base-2 numbering
system which uses “0” and “1” as its two independent digits, large binary numbers which are to

42
be subtracted from each other are therefore represented in terms of “0’s” and “1’s”. Binary
Subtraction can take many forms but the rules for subtraction are the same whichever process
you use. As binary notation only has two digits, subtracting a “0” from a “0” or a “1” leaves the
result unchanged as 0-0 = 0 and 1-0 = 1. Subtracting a “1” from a “1” results in a “0”, but
subtracting a “1” from a “0” requires a borrow. In other words 0 – 1requires a borrow.

PIN DIAGRAM: IC 7483

IC 7486

43
CIRCUIT DIAGRAM

VCC

A3 1 5
15 S3
A2 3
2 S2
A1 8 I
6 S1
C
A0 10
7 9
1 IC 7486/1 S0
B3 3
16 4
2
IC 7486/2 8
B2 4
6
4 3
5
9 IC 7486/3
B1 8 14 Cout
7
10
12 IC 7486/4
B0 11
11
13 13 12

Mode
GND

TRUTH TABLE
INPUTS OUTPUTS
A3 A2 A1 A0 B3 B2 B1 B0 Cin S3 S2 S1 S0 Cout
1 0 0 0 0 1 0 0 0 1 1 0 0 0
0 0 0 1 1 1 0 0 0 1 1 0 1 0
1 0 0 0 1 0 0 0 1 0 0 0 0 0
1 1 0 1 1 0 1 0 1 0 0 1 1 0
1 1 1 0 1 1 0 0 0 1 0 1 0 1

44
PROCEDURE:
• Switch ON the power supply.
• Connect the circuit as per the circuit diagram
• Apply various input combinations and observe the output for each one.
• Verify the truth table for each input/ output combination.
• Switch off the ac power supply.

RESULT:
Write your observations.

45
 EXPERIMENT - 12

GRAY CODE CONVERTER

AIM:
To Convert 4 Bit Gray to Binary and Binary to Gray.

APPARATUS:
• Digital Trainer Kit
• Regulated Power Supply 5V
• Light Emitting Diode (LED)
• Digital ICs: IC 7486
• Connecting Wires
• Patch Cords

THEORY:

Binary-to Gray Converter An interesting application for the exclusive-OR gate is a logic gate to
change a binary number to its equivalent in Gray Code. The logic circuit can be used to convert a
4-bit binary number ABCD into its Graycode equivalent, G1, G2, G3 and G4.As an example, the
binary number 0011 will be converted into its Gray-Code equivalent of 0010 by the circuit. Note:
A is the most significant bit and D is the least significant bit. The availability of a large variety of
codes for the same discrete elements of information results in the use of different codes by
different digital system.
It is sometimes necessary to use the output of one system as the input to another. A
conversion circuit must be inserted between the two systems if each uses different codes for the
same information. Thus, a code converter is a circuit that makes the two systems compatible
even though each uses a different binary code. The binary number system is a system that uses
only the digits 0 & 1 as codes.
To represent a group of 2n distinct element in a binary code requires a minimum
of n bits. This is because it is possible to arrange n bits in 2n distinct ways. Although the
minimum number of bits required to code 2n distinct quantities is n, there is no maximum
number of bits that may be used for binary code. For example, a group of four distinct quantities
can be represented by a two bit code, with each quantity assigned one of the following bit
combinations: 00, 01, 10, and 11. A group of eight elements requires a three bit code, with each
element assigned to one and only one of the following 000, 001, 010, 011, 100, 101, 110, and
111. Gray code (reflected code) .

46
PIN DIAGRAM

CIRCUIT DIAGRAM:

47
PROCEDURE:

• Switch ON the power supply.

• Connect the circuit as per the circuit diagram
• Apply various input combinations and observe the output for each one.
• Verify the truth table for each input/ output combination.
• Switch off the ac power supply.

TRUTH TABLE:

RESULT:
Write your observations.

48
 EXPERIMENT – 13

8 × 1 MULTIPLEXER

AIM:

To experimentally verify the working of IC 74151.

APPARATUS:
• Digital Trainer Kit
• Regulated Power Supply 5V
• Light Emitting Diode (LED)
• Digital ICs: IC 74151
• Connecting Wires
• Patch Cords

THEORY:
A multiplexer is a combinational circuit that selects binary information from one of many
input lines and directs it to a single output line. The selection of a particular input line is
controlled by a set of selection lines. Normally, there are 2n input lines and n-selection lines
whose bit combinations determine which input is selected.

IC 74151:

It is an 8 line to 1 line multiplexer. It has three select inputs and an active low strobe
input. The data inputs are designated as D0 through D7. Three bit binary number at the data select
inputs A, B and C select the data input to be directed to the output. For example, if ABC is 001,
D1 will be available at the output. The strobe input is used to activate or deactivate the chip.

49
PIN DIAGRAM:

I
C
7
4
1
5
1

CIRCUIT DIAGRAM:

D0 4 16 VCC

D1 3 8 GND

D2 2 I 5 X
C Outputs
D3 1 7 6 Y
Inputs 4
D4 15 1 11 A
5
D5 14 1 10 B Data Select

D6 13 9 C

D7 12 7 Strobe

50
PROCEDURE:

• Switch ON the power supply.

• Connect the circuit as per the circuit diagram
• Apply various input combinations and observe the output for each one.
• Verify the truth table for each input/ output combination.
• Switch off the ac power supply.

TRUTH TABLE:
Inputs Outputs

Data Select Strobe

X Y
C B A Input

X X X 1 0 1

0 0 0 0 D0 D0

0 0 1 0 D1 D1

0 1 0 0 D2 D2

0 1 1 0 D3 D3

1 0 0 0 D4 D4

1 0 1 0 D5 D5

1 1 0 0 D6 D6

1 1 1 0 D7 D7

RESULT:
Write your observations.

51
 EXPERIMENT – 14

8×3 ENCODER / 3×8 DECODER

AIM:
• To experimentally verify the working of IC 74138 as 3 to 8 line decoder and 74348 as 8
to 3 line encoder.

APPARATUS:
• Digital Trainer Kit
• Regulated Power Supply 5V
• Light Emitting Diode (LED)
• Digital ICs: IC 74138, 74348
• Connecting Wires
• Patch Cords

THEORY:
Discrete quantities of information are represented in digital systems by binary codes. A
binary code of n bits is capable of representing up to 2n distinct elements of coded information. A
decoder is a combinational circuit that converts the binary information from n input lines to a
maximum of 2n unique output lines. If the n-bit coded information has unused combinations, the
decoder may have less than 2n outputs. The decoder presented here are called n-to-m line
decoders, where m ≤ 2n. In the 3-to-8 IC decoder (IC 74LS138), there are three input lines and
eight output lines. The enable input E is used to enable or disable the decoding process.
Decoding is necessary in applications such as data multiplexing, 7 segment display and memory
address decoding.

A decoder provides the 2n minterms of n input variables. Since any Boolean function can
be expressed in sum-of-minterms form, a decoder that generates the minterms of the function,
together with an external OR gate that forms their logical sum provides a hardware
implementation of the function. In this way, any combinational circuit with n inputs and m
outputs can be implemented with an n-to-2n lined decoder and m OR gates.

52
IC 74LS138

The 74LS138 decodes one-of-eight lines; based upon the conditions at the three binary
select inputs and the three enable inputs. Two active-low and one active-high enable inputs
reduce the need for external gates or inverters when expanding. A 24-line decoder can be
implemented with no external inverters, and a 32-line decoder requires only one inverter. An
enable input can be used as a data input for demultiplexing applications.

IC 74348

The 74348 circuits encode eight data lines to three data lines. It is also known as octal to binary
encoder. Cascading circuitry, enable input (EI) and enable output (EO) has been provided to
allow octal expansion. Outputs A0, A1, A2 are implemented in 3 stage logic for easy expansion
upto 64 lines without the need for external circuitry. These encoders also feature priority
encoding of the inputs to ensure that only the highest order data line is encoded.

PIN DIAGRAM:

A 1 16 VCC
Select
B 2 15 O0
Inputs
I
C 3 C 14 O1
7
E1 4 4 13 O2
L
Enable E2 5 S 12 O3
Inputs
1
E3 6 3 11 O4
8
O7 7 10 O5

GND 8 9 O6

53
TRUTH TABLE:
Enable Inputs Inputs Outputs

E1 E2 E3 C B A O0 O1 O2 O3 O4 O5 O6 O7

X X 0 X X X 1 1 1 1 1 1 1 1

X 1 X X X X 1 1 1 1 1 1 1 1

1 X X X X X 1 1 1 1 1 1 1 1

0 0 1 0 0 0 0 1 1 1 1 1 1 1

0 0 1 0 0 1 1 0 1 1 1 1 1 1

0 0 1 0 1 0 1 1 0 1 1 1 1 1

0 0 1 0 1 1 1 1 1 0 1 1 1 1

0 0 1 1 0 0 1 1 1 1 0 1 1 1

0 0 1 1 0 1 1 1 1 1 1 0 1 1

0 0 1 1 1 0 1 1 1 1 1 1 0 1

0 0 1 1 1 1 1 1 1 1 1 1 1 0

IC 74348

54
TRUTH TABLE:

INPUT OUTPUT
EI 0 1 2 3 4 5 6 7 A2 A1 A0 Gs Eo
0 X X X X X X X 0 0 0 0 0 1
0 X X X X X X 0 1 0 0 1 0 1
0 X X X X X 0 1 1 0 1 0 0 1
0 X X X X 0 1 1 1 0 1 1 0 1
0 X X X 0 1 1 1 1 1 0 0 0 1
0 X X 0 1 1 1 1 1 1 0 1 0 1
0 X 0 1 1 1 1 1 1 1 1 0 0 1
0 0 1 1 1 1 1 1 1 1 1 1 0 1

PROCEDURE:

• Switch ON the power supply.

• Connect the circuit as per the circuit diagram
• Apply various input combinations and observe the output for each one.
• Verify the truth table for each input/ output combination.
• Switch off the ac power supply.

RESULT:
Write your observations.

55
 EXPERIMENT – 15

DECADE COUNTER

AIM:
To implement and verify the Decade counter.
APPARATUS:
• Digital Trainer Kit
• Regulated Power Supply 5V
• Light Emitting Diode (LED)
• Digital ICs: IC 7490
• Connecting Wires
• Patch Cords

THEORY:
It has a mode-2 counter and a mode-5 counter. The flip flop Qa forms a mode-2 counter
and flip flops Qb, Qc and Qd forms a mode-5 counter. If the clock is applied at input A and Qa is
connected to input B, we get a binary decade counter. The 4 bit decade counter can be reset to
Zero or preset to nine by applying an appropriate logic level on the R0 (1) and R0(2) inputs.

PIN DIAGRAM:

CP1 1 14 CP0

MR1 2 13 NC
I
C
MR2 3 12 Q0
7
4
NC 4 11 Q3
L
S
VCC 5 9 10 GND
0
MS1 6 9 Q1

MS2 7 8 Q2

56
STATE DIAGRAM:
0 1 2 9

TRUTH TABLE:
Clock Pulse Q3 Q2 Q1 Q0

0 0 0 0 0

1 0 0 0 1

2 0 0 1 0

3 0 0 1 1

4 0 1 0 0

5 0 1 0 1

6 0 1 1 0

7 0 1 1 1

8 1 0 0 0

9 1 0 0 1

10 0 0 0 0

57
CIRCUIT DIAGRAM:

Q0 Q1 Q2 Q3

5V 1 12 9 8 11

5
I C 7490

14
2 3 10 6 7

TIMING DIAGRAM:

S1 S2 S3 S4 S5 S6 S7 S8 S9 S10 S11

Clock

Q0

Q1

Q2

Q3

PROCEDURE:
1. Do the connections as per the circuit diagram.
2. Apply proper Vcc and Ground connections to the IC.
3. Use monopulse to feed the clock manually.
4. The output can be viewed either using the LED or displaying the waveform in the CRO.

RESULT:
Write your observations.

58