FA C UL i'I' ENG INEERING Code No, , ~ u , ~TI;.

BE m - Semtotte, (AICTl!J IM~: .,. e •cklog) EHmlnetlon. Ju ly 20 21

f lme;2 Hour•
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Ans wer enyflve _q uesl/ons. PART- A

; WhallsMulllple~or?
J
g;:,:~"~:i~.~;ryg~~:S~~~ ~~i:':.y code.
4 Drawlhecircuitofhalfadclef.
5 List me comparis-on between a PL.A and PAL
6 Write the VHDL code for an half Mder? ("'\,,

: ~~tfien~h:e~~;t:~~nh:~~~°: ~; ~i-~ltflop· "''-..)

9 EllPlainabout Mealy state machine. ('"'-
1o Whatisastatediagram? PART-B ~'l.J
An swer an y fo ur questions. (4-.1 S• 60M,rk

~;~~~;~::::e::~~o;r:~~~f~~
11 (a) What Is the basic law or B<:>°lean algebra. Ekpl ~anY"f.NO •)

(b) do ~~ ~ ~-s;~n

12-(a) Realii:e the function. f{A,B.C.D)"'I(1 ,4,6.~ d(0,8,11,15J us,ng

(i) 16:1 MUX (11) 6:1 ~ux
11
\b) Whal is lull adder? Ekplam full ~ i n g half adder circuits U$ingt,as;c Gares.

"::: .~: :~:; :h7'::.::=.•~t~, . co, "mo>eo,=,.

14 · ~~';',;i~~:~~:::;,~f~ slave flip-flop and e ..p\ain Its operation.

15 (a) Reducethen,be i;t,f statesinthefollowingstatetableandtabulate ther educedsta:e

Table.~

15· Design a circuit lo convert Excess-3 code 10 BCDcode us ng ba sic Logic gates.
17 l~] ~~n~~~;e(AO~:·OEf:/1~:n!eci::;·r~~~fo~·oc~::~g )(-map and rc.i t,w usi ng NOR
gatef,:: rr tll(0.4 ,6.7.8,12.13.14.15).