LU - Microprocessor I - Chap00 - Overview of Logic Circuit Design - FA2018

Microprocessor I
Chapter 0 – Overview of Logic Circuit Design
Dr. Mohamad Mroué
Lebanese University - Faculty of Engineering

Beirut, Lebanon
1
Digital Circuits Advantages
Better immunity to noise
Easier to implement with IC techniques
More “adaptable” to variable uses
Design is done at a more abstract level
Microprocessor I – 4th year Electrical Engineering – Chapter 0 2

Dr. Mohamad Mroué
Types of digital circuits
 Logic systems are classified into two types:
‒ Combinational Logic system: The output at any time depends only
on the current combination of its input values (memoryless
system)
‒ Sequential Logic system: The output at any time depends not only
on its current inputs but also the past sequence of inputs that
have been applied to it (system with memory)

Dr. Mohamad Mroué
Types of digital circuits - Examples
 Combinational Logic Blocks:
‒ Multiplexers, DeMultiplexers, Decoders, Encoders, Three-State
Buffers, ROM memories, Multipliers, Adders, …
 Sequential Logic Blocks:

‒ Latches and Flip-Flops, Registers, Shift Registers, Counters, FIFO
and RAM memories, Sequential Multipliers, Sequential Adders, ...
Dr. Mohamad Mroué
Combinational Logic
 A combinational logic system is one whose current outputs depend
only on its current inputs
x1 y1
… …
xn ym
 Combinational systems are memory-less. They do not contain

feedback loops.
‒ A feedback loop is a signal path that allows the output signal of a
system to propagate back to the input of the system.

Dr. Mohamad Mroué
Analysis and Design of combinational logic systems
 Goal: analysis and design of logic functions whose current

outputs depends only on their current inputs
‒ Represent each of the inputs and outputs as binary patterns
‒ Formalize the function specification of the system in the form of a

table or an algebraic expression

Dr. Mohamad Mroué
NOT, AND, OR
X Y
0 1
1 0
XY Z
00 0
01 0
10 0
11 1
XY Z
00 0
01 1
10 1
11 1

Dr. Mohamad Mroué
Minimizing logic function
 The goal of digital design is to come out with a circuit that

implements the given logic function with minimum number of logic
gates.

Dr. Mohamad Mroué
Which realization is best?
 Reduce number of inputs
‒ literal: input variable (complemented or not)
• The cost of logic gate can be approximated as 2 transistors per literal
‒ fewer literals means smaller gates
• smaller gates means less transistors
‒ fewer inputs implies faster gates
• gates are smaller and thus also faster
‒ fan-ins (# of gate inputs) are limited in some technologies
 Reduce number of gates

‒ fewer gates (and the packages they come in) means smaller circuits
• directly influences manufacturing costs

Dr. Mohamad Mroué
Which realization is best?
 Reduce number of levels of gates
‒ fewer level of gates implies reduced signal propagation delays
 How do we explore tradeoffs between increased circuit delay and

size?
‒ automated tools to generate different solutions
‒ logic minimization: reduce number of gates and complexity
‒ logic optimization: reduction while trading off against delay

Dr. Mohamad Mroué
Combinational Logic Blocks: Multiplexers
 A multiplexer (MUX for short) is a digital switch:
‒ it passes (connects) one of its data inputs to the output.
‒ the data input selected is a function of a set of control inputs called
selection inputs.
A Z I1 I0 A Z
0 I0 0 0 0 0
1 I1 0 0 1 0
0 1 0 1
0 1 1 0
1 0 0 0
1 0 1 1
Two alternative forms 1 1 0 1
for a 2:1 Mux truth table 1 1 1 1
Z = A' I0 + A I1

Dr. Mohamad Mroué
 Multiplexers
2 n 1
Z   mk I k
k 0

Dr. Mohamad Mroué
 Gate level implementation of multiplexers
– 2:1 mux
– 4:1 mux

Dr. Mohamad Mroué
 Cascading multiplexers
‒ Large multiplexers can be made by cascading smaller ones

Dr. Mohamad Mroué
 Multiplexers as general-purpose logic

Dr. Mohamad Mroué
 Multiplexer with bus inputs and outputs

Dr. Mohamad Mroué
Combinational Logic Blocks: DeMultiplexers
 Demultiplexers

Dr. Mohamad Mroué
Combinational Logic Blocks: Three-State Buffers
 Three-State Buffers

Dr. Mohamad Mroué
 Three-State Buffers
When the enable B is 1, the output C equals A.

When the enable B is 0, the output C acts like an open circuit.
In this case the output C is effectively disconnected from the
buffer output so that no current can flow.
This is often referred as Hi-Z (high-impedance) state because
the circuit offers a very high impedance to the flow of current.

Dr. Mohamad Mroué
 Tri-State Buffers application examples

Dr. Mohamad Mroué

Dr. Mohamad Mroué

Dr. Mohamad Mroué
Combinational Logic Blocks: Decoders
 Decoders

Dr. Mohamad Mroué
 Decoders
A 4-to-10 Line Decoder

Dr. Mohamad Mroué
 Decoders

Dr. Mohamad Mroué
 Gate level implementation of decoders

Dr. Mohamad Mroué
 Decoders as general-purpose logic

Dr. Mohamad Mroué
 Decoders as general-purpose logic

Dr. Mohamad Mroué
Combinational Logic Blocks: Encoders
 Encoders

Dr. Mohamad Mroué
Combinational Logic Blocks: Encoders
 8-to-3 Priority Coder
y0 y1 y2 y3 y4 y5 y6 y7 a b c d
0 0 0 0 0 0 0 0 0 0 0 0
1 0 0 0 0 0 0 0 0 0 0 1
X 1 0 0 0 0 0 0 0 0 1 1
X X 1 0 0 0 0 0 0 1 0 1
X X X 1 0 0 0 0 0 1 1 1
X X X X 1 0 0 0 1 0 0 1
X X X X X 1 0 0 1 0 1 1
X X X X X X 1 0 1 1 0 1
X X X X X X X 1 1 1 1 1
Dr. Mohamad Mroué
Combinational Logic Blocks: ROM memories
 Read-Only Memories
‒ A read-only memory (ROM) consists of an array of semiconductor devices

that are interconnected to store an array of binary data.
‒ Once binary data is stored in the ROM, it can be read out whenever desired,
but the data that is stored cannot be changed under normal operating
conditions.

Dr. Mohamad Mroué
(a) Block diagram
An 8-Word x 4-Bit ROM

Dr. Mohamad Mroué
Read-Only Memory with n Inputs

and m Outputs
Dr. Mohamad Mroué
Basic ROM Structure

Dr. Mohamad Mroué

Dr. Mohamad Mroué
Sequential Circuits
 A sequential circuit is one whose outputs depend not only on its

current inputs, but also on the past sequence of inputs.
 In other words, sequential circuits must be able to ”remember” (i.e.,

store) the past history of the inputs in order to produce the present
output.
 The information about the previous inputs history is called the state
of the system.

Dr. Mohamad Mroué
Sequential Circuits
 A circuit that uses n binary state variables to store its past history can
take up to 2n different states.
 Since n is always finite, sequential circuits are also called finite state
machines (FSM).

Dr. Mohamad Mroué
Sequential Logic Blocks: Latches and Flip-Flops
 The two most popular varieties of storage cells used to build
sequential circuits are: latches and flip-flops.
‒ Latch: level sensitive storage element
‒ Flip-Flop: edge triggered storage element
 Common examples of latches:

‒ S-R latch, D latch
 Common examples of flip-flops:

‒ D-FF, JK-FF, T-FF

Dr. Mohamad Mroué
Sequential Logic Blocks: Registers
 A collection of 2 or more D flip flops with a common clock
 Registers are often used to store a collection or related bits (e.g. a
byte of data in a computer)

Dr. Mohamad Mroué
 Registers with Tri-State Ouput

Dr. Mohamad Mroué
 Registers with clock enable

Dr. Mohamad Mroué
 Registers application: Data Transfers

Dr. Mohamad Mroué
Sequential Logic Blocks: Shift Registers
 It is a register that stores input values in sequence. At each clock tick
the values stored are shifted from one flip flop to the adjacent one.

Dr. Mohamad Mroué
 Application: Parallel-to-Serial conversion for serial transmission

Dr. Mohamad Mroué
 Application: Pattern Recognizer
‒ In this case, recognizing the pattern 1001

Dr. Mohamad Mroué
 Application: Ring Counter

Dr. Mohamad Mroué
 Application: Johnson Counter

Dr. Mohamad Mroué
Ring and Johnson counter Timings

Dr. Mohamad Mroué
Sequential Logic Blocks: Binary Counters

Dr. Mohamad Mroué
Sequential Logic Blocks: Binary Counters

Dr. Mohamad Mroué
Sequential Logic Blocks: Synchronous Binary Counters

Dr. Mohamad Mroué
Clocked synchronous FSM
 Clocked: all storage elements employ a clock input (i.e. all storage
elements are flip-flops)
 Synchronous: all of the flip flops use the same clock signal
 FSM: state machine is simply another name for sequential circuits.

Finite refers to the fact that the number of states the circuit can
assume is finite
 A synchronous clocked FSM changes state only when a triggering

edge (or tick) occurs on the clock signal

Dr. Mohamad Mroué
Clocked synchronous FSM structure

Dr. Mohamad Mroué
FSM Types

Dr. Mohamad Mroué
 Mealy machine

Dr. Mohamad Mroué
 Moore machine

Dr. Mohamad Mroué
Comparison of Mealy and Moore FSM
 Mealy machines have less states
‒ outputs are on transitions (n2) rather than states (n)
 Moore machines are safer to use

‒ outputs change at clock edge (always one cycle later)
‒ in Mealy machines, input change can cause output change as soon as logic is
done – a big problem when two machines are interconnected –
asynchronous feedback may occur if one isn’t careful
 Mealy machines react faster to inputs

‒ react in same cycle – don't need to wait for clock
‒ outputs may be considerably shorter than the clock cycle
‒ in Moore machines, more logic may be necessary to decode state into
outputs – there may be more gate delays after clock edge

Dr. Mohamad Mroué
Design of clocked sequential circuits
 Step1. Deriving state diagram
 Step2. Deriving state transition table and output table
 Step3. Determining next state and output functions
 Step4. Implementing logic functions with combinational gates and

flip-flops.

Dr. Mohamad Mroué

Dr. Mohamad Mroué

Dr. Mohamad Mroué

Dr. Mohamad Mroué

Dr. Mohamad Mroué

Dr. Mohamad Mroué

Dr. Mohamad Mroué

Dr. Mohamad Mroué

Dr. Mohamad Mroué

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Microprocessor I

Chapter 0 – Overview of Logic Circuit Design

Dr. Mohamad Mroué

Lebanese University - Faculty of Engineering

Easier to implement with IC techniques

More “adaptable” to variable uses

Design is done at a more abstract level

Microprocessor I – 4th year Electrical Engineering – Chapter 0 2

Microprocessor I – 4th year Electrical Engineering – Chapter 0 3

 Sequential Logic Blocks:

 Combinational systems are memory-less. They do not contain

Microprocessor I – 4th year Electrical Engineering – Chapter 0 5

 Goal: analysis and design of logic functions whose current

‒ Represent each of the inputs and outputs as binary patterns

‒ Formalize the function specification of the system in the form of a

Microprocessor I – 4th year Electrical Engineering – Chapter 0 6

Microprocessor I – 4th year Electrical Engineering – Chapter 0 7

 The goal of digital design is to come out with a circuit that

Microprocessor I – 4th year Electrical Engineering – Chapter 0 8

 Reduce number of gates

Microprocessor I – 4th year Electrical Engineering – Chapter 0 9

 How do we explore tradeoffs between increased circuit delay and

Microprocessor I – 4th year Electrical Engineering – Chapter 0 10

Microprocessor I – 4th year Electrical Engineering – Chapter 0 11

Microprocessor I – 4th year Electrical Engineering – Chapter 0 12

Microprocessor I – 4th year Electrical Engineering – Chapter 0 13

Microprocessor I – 4th year Electrical Engineering – Chapter 0 14

Microprocessor I – 4th year Electrical Engineering – Chapter 0 15

Microprocessor I – 4th year Electrical Engineering – Chapter 0 16

Microprocessor I – 4th year Electrical Engineering – Chapter 0 17

Microprocessor I – 4th year Electrical Engineering – Chapter 0 18

When the enable B is 1, the output C equals A.

Microprocessor I – 4th year Electrical Engineering – Chapter 0 19

Microprocessor I – 4th year Electrical Engineering – Chapter 0 20

Microprocessor I – 4th year Electrical Engineering – Chapter 0 21

Microprocessor I – 4th year Electrical Engineering – Chapter 0 22

Microprocessor I – 4th year Electrical Engineering – Chapter 0 23

A 4-to-10 Line Decoder

Microprocessor I – 4th year Electrical Engineering – Chapter 0 24

Microprocessor I – 4th year Electrical Engineering – Chapter 0 25

Microprocessor I – 4th year Electrical Engineering – Chapter 0 26

Microprocessor I – 4th year Electrical Engineering – Chapter 0 27

Microprocessor I – 4th year Electrical Engineering – Chapter 0 28

Microprocessor I – 4th year Electrical Engineering – Chapter 0 29

‒ A read-only memory (ROM) consists of an array of semiconductor devices

Microprocessor I – 4th year Electrical Engineering – Chapter 0 31

(a) Block diagram

An 8-Word x 4-Bit ROM

Microprocessor I – 4th year Electrical Engineering – Chapter 0 32

Read-Only Memory with n Inputs

Basic ROM Structure

Microprocessor I – 4th year Electrical Engineering – Chapter 0 35

 A sequential circuit is one whose outputs depend not only on its

 In other words, sequential circuits must be able to ”remember” (i.e.,

Microprocessor I – 4th year Electrical Engineering – Chapter 0 36

Microprocessor I – 4th year Electrical Engineering – Chapter 0 37

 Common examples of latches:

 Common examples of flip-flops:

Microprocessor I – 4th year Electrical Engineering – Chapter 0 38

Microprocessor I – 4th year Electrical Engineering – Chapter 0 39

Microprocessor I – 4th year Electrical Engineering – Chapter 0 40

Microprocessor I – 4th year Electrical Engineering – Chapter 0 41

Microprocessor I – 4th year Electrical Engineering – Chapter 0 42