ANIL NEERUKONDA INSTITUTE OF TECHNOLOGY & SCIENCES

(UGC AUTONOMOUS)
(Affiliated to AU, Approved by AICTE &Accredited by NBA)
Sangivalasa-531162, Bheemunipatnam Mandal, Visakhapatnam.
Phone: 08933- 225084,226395
DEPARTMENT OF ELECTRONICS AND COMMUNICATION ENGINEERING

M. TECH (VLSI AND EMBEDDED SYSTEMS)

Subject Code MTVES121 Subject Name LOW POWER VLSI

Class - Sem I-II Examination Mid-II Max. Marks 40
Date 19-10-2023 Time 12.00 – 1.30 PM A. Y 2022-2023

Unit-III
Q.No. Question Mark CO Level
s
1. a) Explain in detail about sizing an inverter chain. 8 3 L2
b) Explain in detail about Transistor and Gate Sizing for 7 3 L2
Dynamic Power Reduction.
(OR)
Q.No. Question Mark CO Level
s
2 a) Explain in detail about Network Restructuring and 8 3 L2
Reorganization.
b) Explain in detail about Special Latches and Flip-flops. 7 3 L2
Unit-IV
Q.No. Question Mark CO Level
s
3 a) Explain the signal probability using binary decision 8 4 L2
diagram.

b) Explain in detail about estimation of glitch power. 7 4 L2

(OR)

Q.No Question Marks CO Level

.
4 a) Explain Power estimation using input vector 8 4 L2
compaction, power dissipation in Domino logic.

b) Explain in detail about estimation of maximum power. 7 4 L2

Unit-V
Q.No. Question Mark CO Level
s
5 Explain various software power estimation techniques. 10 5 L2

(OR)

Q.No Question Marks CO Level

.
6 Explain various software power optimization techniques. 10 5 L2