Registers

Processor operations mostly involve processing data. This data can be stored in
memory and accessed from thereon. However, reading data from and storing data into
memory slows down the processor, as it involves complicated processes of sending
the data request across the control bus and into the memory storage unit and getting
the data through the same channel.
To speed up the processor operations, the processor includes some internal memory
storage locations, called registers.
The registers store data elements for processing without having to access the
memory. A limited number of registers are built into the processor chip.

Processor Registers
There are ten 32-bit and six 16-bit processor registers in IA-32 architecture. The
registers are grouped into three categories −

 General registers,
 Control registers, and
 Segment registers.
The general registers are further divided into the following groups −

 Data registers,
 Pointer registers, and
 Index registers.

Data Registers
Four 32-bit data registers are used for arithmetic, logical, and other operations. These
32-bit registers can be used in three ways −
 As complete 32-bit data registers: EAX, EBX, ECX, EDX.
 Lower halves of the 32-bit registers can be used as four 16-bit data registers:
AX, BX, CX and DX.
 Lower and higher halves of the above-mentioned four 16-bit registers can be
used as eight 8-bit data registers: AH, AL, BH, BL, CH, CL, DH, and DL.

Some of these data registers have specific use in arithmetical operations.

AX is the primary accumulator; it is used in input/output and most arithmetic
instructions. For example, in multiplication operation, one operand is stored in EAX or
AX or AL register according to the size of the operand.
BX is known as the base register, as it could be used in indexed addressing.
CX is known as the count register, as the ECX, CX registers store the loop count in
iterative operations.
DX is known as the data register. It is also used in input/output operations. It is also
used with AX register along with DX for multiply and divide operations involving large
values.

Pointer Registers
The pointer registers are 32-bit EIP, ESP, and EBP registers and corresponding 16-
bit right portions IP, SP, and BP. There are three categories of pointer registers −
 Instruction Pointer (IP) − The 16-bit IP register stores the offset address of the
next instruction to be executed. IP in association with the CS register (as CS:IP)
gives the complete address of the current instruction in the code segment.
 Stack Pointer (SP) − The 16-bit SP register provides the offset value within the
program stack. SP in association with the SS register (SS:SP) refers to be
current position of data or address within the program stack.
 Base Pointer (BP) − The 16-bit BP register mainly helps in referencing the
parameter variables passed to a subroutine. The address in SS register is
combined with the offset in BP to get the location of the parameter. BP can also
be combined with DI and SI as base register for special addressing.

Index Registers
The 32-bit index registers, ESI and EDI, and their 16-bit rightmost portions. SI and DI,
are used for indexed addressing and sometimes used in addition and subtraction.
There are two sets of index pointers −
 Source Index (SI) − It is used as source index for string operations.
 Destination Index (DI) − It is used as destination index for string operations.

Segment Registers
Segments are specific areas defined in a program for containing data, code and stack.
There are three main segments −
 Code Segment − It contains all the instructions to be executed. A 16-bit Code
Segment register or CS register stores the starting address of the code
segment.
 Data Segment − It contains data, constants and work areas. A 16-bit Data
Segment register or DS register stores the starting address of the data segment.
  Stack Segment − It contains data and return addresses of procedures or
subroutines. It is implemented as a 'stack' data structure. The Stack Segment
register or SS register stores the starting address of the stack.
Apart from the DS, CS and SS registers, there are other extra segment registers - ES
(extra segment), FS and GS, which provide additional segments for storing data.
In assembly programming, a program needs to access the memory locations. All
memory locations within a segment are relative to the starting address of the segment.
A segment begins in an address evenly divisible by 16 or hexadecimal 10. So, the
rightmost hex digit in all such memory addresses is 0, which is not generally stored in
the segment registers.
The segment registers stores the starting addresses of a segment. To get the exact
location of data or instruction within a segment, an offset value (or displacement) is
required. To reference any memory location in a segment, the processor combines
the segment address in the segment register with the offset value of the location.

Data Movement
Data movement in computer architecture refers to the process of transferring data
between different parts of a computer system. This can involve moving data between
the computer's memory and its processing units (such as the CPU), between
different storage devices (such as hard drives or solid-state drives), or between the
computer and external devices (such as keyboards, mice, or printers).

Data movement is an important part of computer architecture because it enables

different parts of the computer to work together efficiently. For example, when you
open a file on your computer, data is moved from the hard drive to the computer's
memory, where it can be processed by the CPU and displayed on the screen.
Data Movement instructions transfer the data between memory and processor
registers, processor registers, and I/O devices, and from one processor register to
another. There are eight commonly used data movement instructions. Each
instruction is represented by a mnemonic symbol.
The table shows the eight data movement instructions and their respective mnemonic
symbols.
Data Transfer Instructions

Name Mnemonic Symbols

Load LD

Store ST

Move MOV

Exchange XCH

Input In

Output OUT

Push PUSH

Pop POP
The instructions can be described as follows −

 Load − The load instruction is used to transfer data from the memory to a
processor register, which is usually an accumulator.
 Store − The store instruction transfers data from processor registers to
memory.
 Move − The move instruction transfers data from processor register to
memory or memory to processor register or between processor registers itself.
 Exchange − The exchange instruction swaps information either between two
registers or between a register and a memory word.
 Input − The input instruction transfers data between the processor register
and the input terminal.
 Output − The output instruction transfers data between the processor register
and the output terminal.
 Push and Pop − The push and pop instructions transfer data between a
processor register and memory stack.

The speed and efficiency of data movement can have a big impact on a computer's
overall performance. Faster data transfer rates and more efficient data handling can
help a computer run faster and more smoothly, while slow or inefficient data
movement can cause performance bottlenecks and make a computer feel sluggish.
 Linear Memory model
In computer architecture, a linear memory model refers to a type of memory
organization where all memory addresses are treated as a single, linear address
space. In other words, the memory is viewed as a large, contiguous block of
memory, where each byte or word of memory is assigned a unique address.

This is in contrast to other memory models, such as segmented memory models,

where memory is divided into multiple segments, each with its own base address
and size.

In a linear memory model, accessing memory involves specifying a single memory

address that represents the location of the desired data. The processor can then
access the data directly, without the need to perform any additional calculations or
transformations to convert between different segments or address spaces.

Linear memory models are often used in modern computer systems, as they simplify
memory access and enable efficient use of memory resources. However, they can
also pose challenges in certain situations, such as when working with large amounts
of data that exceed the available memory capacity or when working with memory-
mapped input/output devices that require specialized addressing schemes.

Segmented Memory model

In computer architecture, a segmented memory model refers to a type of memory

organization where memory is divided into multiple segments, each with its own

base address and size. Each segment is a contiguous block of memory, but the

segments themselves may not be contiguous with each other in the overall memory

address space.

When using a segmented memory model, memory is addressed using two parts: a

segment selector and an offset. The segment selector identifies the segment

containing the desired data, while the offset specifies the location of the data within

that segment.

For example, suppose a computer system has two segments: a code segment and a

data segment. The code segment contains the instructions of a program, while the

data segment contains the program's variables and data. To access a variable in the
data segment, the processor would use a memory address consisting of the data

segment selector and the offset specifying the location of the variable within the data

segment.

Segmented memory models can offer several advantages over linear memory

models, such as allowing more efficient use of memory by enabling data to be stored

in smaller, more compact segments. They can also provide better memory protection

and security by allowing different segments to have different access permissions.

However, working with segmented memory models can also be more complex than

working with linear memory models, as it requires additional calculations and

transformations to convert between segment addresses and linear addresses.

Additionally, managing memory allocation and deallocation in segmented memory

models can be more challenging, as it requires managing the allocation and

deallocation of multiple segments rather than a single linear address space.

Program Control

Program control in assembly language refers to the ability to direct the flow of
execution of a program. This is achieved through the use of various instructions that
allow the program to make decisions based on the current state of the program and
to modify the order in which instructions are executed.

Here are some common program control instructions in assembly language:

Conditional jumps: These instructions allow the program to skip instructions or

jump to a different section of code based on the results of a comparison operation.
For example, a conditional jump may be used to skip over a particular instruction if a
certain condition is not met.

Unconditional jumps: These instructions allow the program to jump to a specific

location in the code without any condition being met. For example, an unconditional
jump may be used to jump to the start of a loop or to a particular subroutine.

Subroutine calls: These instructions allow the program to call a separate section of
code and then return to the main program flow once the subroutine has finished
executing. This is useful for code reusability and to keep the main code organized.
Loop instructions: These instructions allow the program to repeat a set of
instructions a certain number of times. For example, a loop may be used to perform
the same calculation on multiple data sets.

Branch instructions: These instructions allow the program to jump to a different

part of the code based on a specific condition. For example, a branch instruction
may be used to jump to a particular error handling routine if an error is detected.

Overall, program control instructions are an important part of assembly language

programming, and understanding them is essential for writing efficient and effective
programs.

Arithmetic and logical instruction

Arithmetic instructions in assembly language are instructions that perform

mathematical operations on data stored in registers or memory. These operations
include addition, subtraction, multiplication, division, and various bitwise operations.

Here are some common arithmetic instructions in x86 assembly language:

ADD - Adds two values and stores the result in a register or memory location.

SUB - Subtracts one value from another and stores the result in a register or
memory location.

MUL - Multiplies two values and stores the result in a register or memory location.

DIV - Divides one value by another and stores the quotient and remainder in
registers.

INC - Increments a value by one.

DEC - Decrements a value by one.

The specific syntax for these instructions may vary depending on the particular
assembly language being used, but the basic functionality remains the same.

Logical instructions in assembly language are instructions that perform logical

operations on binary data. These operations include bitwise AND, OR, XOR, NOT,
and shift operations.

Here are some common logical instructions in x86 assembly language:

AND - Performs a bitwise AND operation on two values and stores the result in a
register or memory location.
OR - Performs a bitwise OR operation on two values and stores the result in a
register or memory location.

XOR - Performs a bitwise exclusive OR operation on two values and stores the
result in a register or memory location.

NOT - Performs a bitwise NOT operation on a value and stores the result in a
register or memory location.

SHL/SHR - Shifts the bits in a value to the left or right by a specified number of bits.

Logical instructions are often used in conjunction with arithmetic instructions to

perform more complex operations on binary data. For example, a program might use
an AND instruction to mask off certain bits in a value before adding it to another
value using an ADD instruction.

The specific syntax for these instructions may vary depending on the particular
assembly language being used, but the basic functionality remains the same.