Outline of what topics to study under each subtopic for every unit.

This will help

you focus on the essential areas and understand what you need to cover.

### Unit I: Power Dissipation in CMOS

#### 1. Hierarchy of Limits of Power

- **General Idea**: Understand the various levels (device, circuit, architecture,
system) where power dissipation can be controlled and minimized.

#### 2. Sources of Power Consumption

- **Topics**:
- Static power consumption (leakage currents)
- Dynamic power consumption (switching power)
- Short-circuit power

#### 3. Physics of Power Dissipation in CMOS FET Devices

- **Topics**:
- Leakage mechanisms in transistors
- Switching activity and its impact on power dissipation
- Subthreshold leakage, gate oxide leakage

#### 4. Basic Principle of Low Power Design

- **Topics**:
- Trade-offs between power, performance, and area (PPA)
- Techniques like voltage scaling, frequency scaling, and power gating

### Unit II: Power Optimization

#### 1. Logic Level Power Optimization

- **Topics**:
- Transistor reordering
- Logic restructuring
- Boolean optimization

#### 2. Circuit Level Low Power Design

- **Topics**:
- Transistor sizing
- Threshold voltage scaling
- Leakage current reduction techniques

#### 3. Gate Level Low Power Design

- **Topics**:
- Gate sizing
- Using low-power cells
- Multi-threshold CMOS (MTCMOS)

#### 4. Architecture Level Low Power Design

- **Topics**:
- Parallelism and pipelining
- Dynamic voltage and frequency scaling (DVFS)
- Clock gating

#### 5. VLSI Subsystem Design of Adders, Multipliers, PLL, Low Power Design
- **Topics**:
- Low power adder designs (e.g., carry-save adders)
- Low power multiplier designs (e.g., Wallace tree, Booth multiplier)
- Phase-Locked Loops (PLLs) and their low power implementations

### Unit III: Design of Low Power CMOS Circuits

#### 1. Computer Arithmetic Techniques for Low Power System
- **Topics**:
- Low power adders, subtractors, multipliers
- Techniques like operand isolation and precomputation

#### 2. Reducing Power Consumption in Combinational Logic, Sequential Logic,

Memories
- **Topics**:
- Combinational logic power reduction techniques
- Sequential logic power reduction techniques (e.g., low power flip-flops)
- Memory design techniques (e.g., SRAM, DRAM)

#### 3. Low Power Clock

- **Topics**:
- Clock gating
- Clock distribution network design for low power

#### 4. Advanced Techniques

- **Topics**:
- Sub-threshold design
- Voltage islands
- Body biasing

#### 5. Special Techniques, Adiabatic Techniques

- **Topics**:
- Adiabatic logic and its principles
- Reversible computing

#### 6. Physical Design, Floor Planning, Placement and Routing

- **Topics**:
- Low power floor planning
- Placement and routing techniques to minimize power

### Unit IV: Power Estimation

#### 1. Power Estimation Techniques, Circuit Level, Gate Level, Architecture Level,
Behavioral Level
- **Topics**:
- Circuit level power estimation methods
- Gate level power estimation techniques
- Architectural level power estimation
- Behavioral level power estimation

#### 2. Logic Power Estimation

- **Topics**:
- Probabilistic methods
- Simulation-based methods
- Statistical methods

#### 3. Simulation Power Analysis

- **Topics**:
- Static and dynamic power simulation
- Tools and techniques for power simulation

#### 4. Probabilistic Power Analysis

- **Topics**:
- Probabilistic power estimation methods
- Monte Carlo simulations for power estimation
### Unit V: Synthesis and Software Design for Low Power CMOS Circuits

#### 1. Synthesis for Low Power

- **Topics**:
- Power-aware synthesis techniques
- Use of low power libraries

#### 2. Behavioral Level Transform

- **Topics**:
- Transformations at the behavioral level to reduce power
- High-level synthesis for low power

#### 3. Algorithms for Low Power

- **Topics**:
- Power-efficient algorithms
- Algorithmic optimizations for power reduction

#### 4. Software Design for Low Power

- **Topics**:
- Software techniques to reduce power consumption
- Compiler optimizations for low power

### Mapping to Books

Here’s how to map these topics to the books:

- **Kaushik Roy and S.C. Prasad, “Low Power CMOS VLSI Circuit Design”**
- Comprehensive coverage of Units I to V
- Specific chapters relevant to each unit and sub-topic

- **J.B.Kulo and J.H Lou, “Low Voltage CMOS VLSI Circuits”**

- Focus on Units II and III, particularly circuit and low voltage design
techniques

- **James B.Kulo, Shih-Chia Lin, “Low Voltage SOI CMOS VLSI Devices and Circuits”**
- Useful for Units III and V, especially low voltage design and SOI technology

- **J.Rabaey, “Low Power Design Essentials (Integrated Circuits and Systems)”**

- Covers all units with practical examples and advanced techniques

- **Low-Power Digital VLSI Design: Circuits and Systems by Abdellatif Bellaouar and
Mohamed I. Elmasry**
- Good reference for power estimation techniques (Unit IV) and synthesis (Unit V)

- **Digital Integrated Circuits: A Design Perspective by Jan M. Rabaey, Anantha

Chandrakasan, and Borivoje Nikolic**
- Useful for power optimization techniques (Unit II) and low power circuit design
(Unit III)

This should provide a structured approach to studying your syllabus and preparing
effectively for your exams.