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Appendix B-1
Farmwald/Horowitz Patents No. 1. Claim Term, Phrase, or Rambuss Proposed Construction Clause access time information information that indicates a time a device must wait from receiving a transaction request to responding to a transaction request Supporting Evidence Specification(s) and all original claims; e.g., 0971 patent, 6:34-36; 7:1-6; 8:47-51; 9:15-17; 9:56-58; 10:14-15; 11:61-63; 15:64-16:11; 16:47-64; 24:57-59 Hynix I2 Evidence for access time register Definitions for access time and information in IEEE Standard Dictionary of Electrica1 and Electronics Terms, Fourth Edition, 1988 (hereinafter referred to as 1988 IEEE Dictionary), pp. 17, 473. Definitions for access time in The New IEEE Standard Dictionary of Electrical and Electronic Terms, Fifth Edition, 1993 (hereinafter referred to as 1993 IEEE Dictionary), pp. 7, 642. Expert testimony by Robert Murphy may be provided as referenced and provided herein, as set forth in the cover pleading to this exhibit, and/or as set forth in footnote 4.3

Cites to the Farmwald/Horowitz patent specifications are to U.S. Patent Nos. 6,260,097 (097 patent) and 7,209,997 (997 patent).

As used herein, Hynix I refers to Hynix Semiconductor Inc. et al. v. Rambus Inc., No. CV-00-20905 RMW (N.D. Cal.). Because

many of the terms were construed previously by the Court in Hynix I, Rambus may rely on the supporting intrinsic and extrinsic evidence offered by Rambus in that case relating to the terms in support of its proposed constructions. This Hynix I Evidence is available to at the below listed Hynix I docket numbers. As used in these tables, Hynix I Evidence relating to a particular term should be understood to include Rambus

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No. 2.

Claim Term, Phrase, or Rambuss Proposed Construction Supporting Evidence Clause delay time an amount of time that must transpire Specification(s) before commencing an action and all original claims; e.g., 097 patent, 4:23-27; 6:32-37; 6:42-50, 55-60; 6:64-7:10; 8:47-57;9:12-19; 9:56 62; 10:315; 10:35-47; 11:19-35; 11:59-60; 11:61-63; 14:60 15:63;15:64-16:11; 16:47 16:64; 20:19-23; 20:28 31; 23:13-16; 24:57-59; 997 patent, Fig. 16. Hynix I and Consolidated Actions4 Evidence for delay time.

briefings, including supporting declarations and exhibits, regarding claim construction and summary judgment of infringement in Hynix I, as well as Court orders in Hynix I regarding claim construction or summary judgment of infringement, relating to that particular term. Additionally, for terms in Hynix I that were agreed-upon rather than construed by the Court, where Rambus has proposed the agreed-upon construction, the evidence should be understood also to include the agreement of Hynix and Hynixs expert that the agreed-upon terms were correctly construed by the parties. Thus Hynix I Evidence is included in the following Hynix I Dkt. Nos.: 326, 328-329, 335-336, 350-352, 366, 372-378, 401-402, 417, 422-423, 427, 621, 678, 679, 680, 681, 682, 821, 825, 829, 899, 1018-1021, 1033-1035, 1064-1067, 1483, 1712, 1733, 1789, 1790, 2017. Rambus may rely on the expert testimony of Robert Murphy in support of its constructions or to oppose NVIDIAs proposed constructions, and to respond to expert testimony offered by NVIDIA in support of its constructions. Mr. Murphy is expected to testify that the patents-in-suit pertain to the art of memory device, memory controller, and system design and that a person of ordinary skill in the art would have had a Bachelor of Science degree in Electrical Engineering with 3-5 years of experience designing memory circuits, such as DRAM memory, memory controllers, and/or memory interfaces. Mr. Murphy is expected to provide some background testimony about the nature of the claimed inventions. Mr. Murphy may provide opinions consistent with those he provided in his declarations and reports referenced herein. He is further expected to testify that a person of ordinary skill in the art would understand, in light of the specification, the meaning of the claim terms listed in this exhibit as indicated herein. Further, Mr. Murphy may respond to any testimony from any witness appearing on behalf of NVIDIA. As used herein, Consolidated Actions refers to Rambus Inc. v. Hynix Semiconductor Inc., et al., No. C-05-00334 RMW (N.D. Cal.); Rambus Inc. v. Samsung Electronics Co. Ltd. et al., No. C-05-02298 RMW (N.D. Cal.); and Rambus Inc. v. Micron Technology, Inc. et al., No. C-06-00244 RMW (N.D. Cal.). Because many of the terms were construed previously by the Court in the Consolidated Actions, Rambus may rely on the supporting intrinsic and extrinsic evidence offered by Rambus in those cases relating to the terms in support of its proposed constructions. This Consolidated Actions Evidence is available, including at the below listed Consolidated Actions docket numbers. As used in these tables,
4 3

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No.

Claim Term, Phrase, or Rambuss Proposed Construction Clause

Supporting Evidence

3.

read delay

Definitions for time delay in 1993 IEEE Dictionary, pp. 322, 1374, 1376. Definition for delay time in McGraw-Hill Dictionary of Scientific and Technical Terms, Fourth Edition, 1989 (hereinafter referred to as 1989 McGraw-Hill Dictionary,), p. 506. Expert testimony by Robert Murphy may be provided as referenced and provided herein, as set forth in the cover pleading to this exhibit, and/or as set forth in footnote 4. an amount of time associated with a Specification(s) read and all original claims; e.g., 097 patent, 4:23-27; 6:32-37; 6:42-50, 55-60;

Consolidated Actions Evidence relating to a particular term should be understood to include Rambus briefings, including supporting declarations and exhibits, regarding claim construction and summary judgment of infringement in the Consolidated Actions, as well as Court orders in the Consolidated Actions regarding claim construction or summary judgment of infringement, relating to that particular term. Additionally, for terms in the Consolidated Actions that were agreed-upon rather than construed by the Court, where Rambus has proposed the agreed upon construction, the evidence should be understood also to include the agreement of the parties and the parties experts that the agreed-upon terms were correctly construed by the parties. Thus Consolidated Actions Evidence includes No. 5:05cv334, Dkt. Nos. 312, 313, 469, 470, 1960, 496, 503, 505, 506, 507, 509, 510, 724, 725, 726, 657, 2083, 2425 (Exs. 1 & 7), 2543, and 2575. Further, as a precaution for purposes of this preliminary disclosure, for each term and phrase herein, Rambus also identities each of the following as supporting evidence, regardless of whether these sources are deemed to be extrinsic: the Federal Circuit opinion in Rambus Inc. v. Infineon Technologies AG, 318 F.3d 1081 (2003); Rambuss briefings, including supporting declarations and exhibits, regarding claim construction and summary judgment of infringement in Hynix I and the Consolidated Actions; Rambuss briefings, including supporting declarations and exhibits, regarding claim construction in In re Rambus Inc., No. 2011-1247 (Fed. Cir.); Rambuss briefings, including supporting declarations and exhibits, regarding claim construction in In re Certain Semiconductor Chips Having Synchronous Dynamic Random Access Memory Controllers and Products Containing Same, No. 337-TA-661 (U.S.I.T.C.); the parties agreed-upon constructions in Hynix I and the Consolidated Actions; and the Courts orders in Hynix I and the Consolidated Actions regarding claim construction or summary judgment of infringement. Rambus further identifies Rambuss filings, including supporting declarations and exhibits, in the reexamination proceedings related to the patents-in-suit.

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No.

Claim Term, Phrase, or Rambuss Proposed Construction Clause

Supporting Evidence

4.

5.

6:64-7:10; 8:47-57;9:12-19; 9:56 62; 10:315; 10:35-47; 11:19-35; 11:59-60; 11:61-63; 14:60 15:63;15:64-16:11; 16:47 16:64; 20:19-23; 20:28 31; 23:13-16; 24:57-59; 997 patent, Fig. 16. Hynix I and Consolidated Actions Evidence for delay time, and read operation. See also intrinsic and extrinsic evidence cited for the term delay time. Expert testimony by Robert Murphy may be provided as referenced and provided herein, as set forth in the cover pleading to this exhibit, and/or as set forth in footnote 4. in response to as a result of Specification(s) and all original claims; e.g., 097 patent, 5:13-14; 6:8-11; 8:29-40; 15:2327; 16:3-11; 18:3-4, 12; 18:64-19:1; 16:15, 16:35-47; 21:36-38, 21:56-58; -21:53-22:3; 22:18-23, 53-59; 23:35-45; 24:23-24, 39-41; Figs. 10, 12, 13. Hynix I and Consolidated Actions Agreed constructions, and Evidence for in response to rising/falling. Expert testimony by Robert Murphy may be provided as referenced and provided herein, as set forth in the cover pleading to this exhibit, and/or as set forth in footnote 4. information that represents an information that indicates an amount Specification(s) amount of time which lapses of time which lapses and all original claims; e.g., 097 patent, 4:23-27; 6:32-37; 6:42-50, 55-60; 6:64-7:10; 8:47-57;9:12-19; 9:56 62; 10:34

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No.

Claim Term, Phrase, or Rambuss Proposed Construction Clause

Supporting Evidence

6.

latch circuitry

15; 10:35-47; 11:19-35; 11:59-60; 11:61-63; 14:60 15:63;15:64-16:11; 16:47 16:64; 20:19-23; 20:28 31; 23:13-16; 24:57-59; 997 patent, Fig. 16. Hynix I and Consolidated Actions Evidence for delay time and value that is representative of an amount of time to transpire Expert testimony by Robert Murphy may be provided as referenced and provided herein, as set forth in the cover pleading to this exhibit, and/or as set forth in footnote 4. a circuit or circuit element to capture Specification(s) and maintain a signal value and all original claims; e.g., 097 patent, 9:19-22; 10:17-26; 12:13-16; 15:23-27; 15:42-63; 18:12-13; 21:26-24:59; Figs. 10, 11. Hynix I and Consolidated Actions Evidence for output driver circuitry, output driver, input receiver circuitry, input receiver Definition for latch in IEEE Standard Dictionary of Electrical and Electronics Terms, Sixth Edition, 1996, p. 572. Definition for latch in Websters Ninth New Collegiate Dictionary, 1990, p. 675. Expert testimony by Robert Murphy may be provided as referenced and provided herein, as set forth in the cover pleading to this exhibit, and/or as set forth in footnote 4. Mr. Murphy may testify as to how one of skill in the art at the time of the inventions would interpret the 5

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No.

Claim Term, Phrase, or Rambuss Proposed Construction Clause

Supporting Evidence

7.

latch

terms latch and latch circuitry in the context of the patents-in-suit. Mr. Murphy may testify as to any differences, similarities, and relationship between latch and latch circuitry and sampling in the context of the claims of the patents-in-suit, in conjunction with why it is improper and ambiguous to incorporate a negative limitation into the term sample distinguish[ing] it from latching, and vice versa. Mr. Murphy may also testify as to why it is improper to incorporate an extraneous reset limitation into the terms latch and latch circuitry. to capture and maintain a signal Specification(s) value and all original claims; e.g., 097 patent, 9:19-22; 10:17-26; 12:13-16; 15:23-27; 15:42-63; 18:12-13; 21:26-24:59; Figs. 10, 11. Hynix I and Consolidated Actions Evidence for output driver circuitry, output driver, input receiver circuitry, input receiver Definition for latch in IEEE Standard Dictionary of Electrical and Electronics Terms, Sixth Edition, 1996, p. 572. Definition for latch in Websters Ninth New Collegiate Dictionary, 1990, p. 675. Expert testimony by Robert Murphy may be provided as referenced and provided herein, as set forth in the cover pleading to this exhibit, and/or as set forth in footnote 4. Mr. Murphy may testify as to how one of skill in the art at 6

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Claim Term, Phrase, or Rambuss Proposed Construction Clause

Supporting Evidence the time of the inventions would interpret the terms latch and latch circuitry in the context of the patents-in-suit. Mr. Murphy may testify as to any differences, similarities, and relationship between latch and latch circuitry and sampling in the context of the claims of the patents-in-suit, in conjunction with why it is improper and ambiguous to incorporate a negative limitation into the term sample distinguish[ing] it from latching, and vice versa. Mr. Murphy may also testify as to why it is improper to incorporate an extraneous reset limitation into the terms latch and latch circuitry. Specification(s) and all original claims; e.g., 097 patent, 6:12-8:14; 8:41-11:60; 14:46 16:22. Hynix I and Consolidated Actions Evidence for memory controller. See also intrinsic and extrinsic evidence for memory device. Expert testimony by Robert Murphy may be provided as referenced and provided herein, as set forth in the cover pleading to this exhibit, and/or as set forth in footnote 4. Specification(s) and all original claims; e.g., 097 patent, 1:32-61; 3:23-27; 3:32-48; 3:5254; 4:27-35; 4:60-61; 4:65 5:1; 5:8-9; 6:615; 7:17-36, 52-55; 8:28-29, 34-40; 16:3-6,

8.

memory controller / an integrated circuit device that controller device / memory includes circuitry to direct the actions controller device / integrated of one or more memory devices circuit controller device

9.

memory device

an integrated circuit device in which information can be stored and retrieved electronically, not including a memory controller

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No.

Claim Term, Phrase, or Rambuss Proposed Construction Clause

Supporting Evidence 35-36; 17:36-42; 19:16, 35-38, 42-46; 21:3436, 53-58; 22:60-23:29; 23:17-19, 35-40; 24:57-59; Figs. 1, 2, 3, 4, 8a, 10, 13, 15, and 997 patent, Fig. 16. Hynix I and Consolidated Actions Evidence for memory device. Expert testimony by Robert Murphy may be provided as referenced and provided herein, as set forth in the cover pleading to this exhibit, and/or as set forth in footnote 4. Specification(s) and all original claims; e.g., 097 patent, 9:23-42, 46-64; 10:14-56; 11:2567; 24:57-59; Fig. 4. Hynix I and Consolidated Actions Evidence for operation code. Expert testimony by Robert Murphy may be provided as referenced and provided herein, as set forth in the cover pleading to this exhibit, and/or as set forth in footnote 4. Specification(s) and all original claims; e.g., 097 patent, 10:17-20, 39-47, 52-56; 11:29-36; 24:57-59. Hynix I and Consolidated Actions Evidence for precharge information. Definition for precharge from A 4096-b One Transistor per Bit Random Access Memory with Internal Timing and Low Dissipation, L. Boonstra et al., IEEE Journal

10.

operation code

one or more bits to specify a type of action

11.

precharge information

one or more bits indicating whether the sense amplifiers and/or bit lines(or a portion of the sense amplifiers and/or bit lines) should be precharged

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No.

Claim Term, Phrase, or Rambuss Proposed Construction Clause

Supporting Evidence

12.

13.

of Solid State Circuits, Vol. SC-8, No. 5, October 1973, pp. 306-308. Definition of precharge from CMOS Devices and Technology for VLSI, John Y. Chen, 1990, pp. 106-110, 115- 116. Expert testimony by Robert Murphy may be provided as referenced and provided herein, as set forth in the cover pleading to this exhibit, and/or as set forth in footnote 4. programmable register a register whose contents can be Specification(s) modified based on information and all original claims; e.g., received from an external source 097 patent, 4:23-27; 6:27-52; 9:7-9; 9:15-17; 9:46-10:13; 14:50-65; 15:64-16:11; and 997 patent, Fig. 16. Expert testimony by Robert Murphy may be provided as referenced and provided herein, as set forth in the cover pleading to this exhibit, and/or as set forth in footnote 4. representative of a number of indicates a number of clock cycles of Specification(s) and clock cycles of the external the external clock to occur all original claims; e.g., 097 clock signal to transpire patent, 4:23-27; 6:32-37; 6:4250, 55-60; 6:64-7:10; 8:47-57; 9:12-19; 9:56 62; 10:315; 10:35-47; 11:19-35; 11:5960;11:61-63; 14:60 15:63; 15:64-16:11; 16:47 16:64; 20:19-23; 20:28 31; 23:13-16; 24:57-59; 997 patent, Fig. 16. Hynix I and Consolidated Actions Evidence for value that is representative of an amount of time to transpire and value which is representative of a delay time 9

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No.

Claim Term, Phrase, or Rambuss Proposed Construction Clause

Supporting Evidence

14.

15.

Definitions for represent and transpire in Websters New World Dictionary, Third College Edition, 1988 (herein referred to as 1988 Websters Dictionary), pp. 1139, 1422. Expert testimony by Robert Murphy may be provided as referenced and provided herein, as set forth in the cover pleading to this exhibit, and/or as set forth in footnote 4. sample / samples / sampling to obtain at a discrete point in time / Specification(s) and obtains at discrete points in time / all original claims; e.g., 097 obtaining at discrete points in time patent, 19:32-34; 21:45-23:45; Fig. 11. Consolidated Actions Evidence for samples/sampling Definitions for sampled data and sampled signal in 1988 IEEE Dictionary, p. 855. Definitions for sampled data and sampled signal in 1993 IEEE Dictionary, p. 1164. See operation code, block size information, input receiver circuitry. Expert testimony by Robert Murphy may be provided as referenced and provided herein, as set forth in the cover pleading to this exhibit, and/or as set forth in footnote 4. See also Supporting Evidence for latch / latch circuitry. value is representative of a information that indicates a delay Specification(s) and delay time to transpire time to occur all original claims; e.g., 097 patent, 4:23-27; 6:32-37; 6:4210

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No.

Claim Term, Phrase, or Rambuss Proposed Construction Clause

Supporting Evidence

16.

variable delay line

50, 55-60; 6:64-7:10; 8:47-57; 9:12-19; 9:56 62; 10:315; 10:35-47; 11:19-35; 11:5960; 11:61-63; 14:60 15:63; 15:64-16:11; 16:47 16:64; 20:19-23; 20:28 31; 23:13-16; 24:57-59; 997 patent, Fig. 16. Hynix I and Consolidated Actions Evidence for value that is representative of an amount of time to transpire and value which is representative of a delay time Definitions for represent and transpire in 1988 Websters Dictionary, pp. 1139, 1422. See delay time Expert testimony by Robert Murphy may be provided as referenced and provided herein, as set forth in the cover pleading to this exhibit, and/or as set forth in footnote 4. a circuit or circuit element to provide Specification(s) a variable amount of delay and all original claims; e.g., 097 patent, 5:17-19; 18:66; 22:60 23:29; 23:40-45; Figs. 12, 13. Hynix I and Consolidated Actions Evidence for delay locked loop. Expert testimony by Robert Murphy may be provided as referenced and provided herein, as set forth in the cover pleading to this exhibit, and/or as set forth in footnote 4.

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Barth II Patents No. 1. Claim Term, Phrase, or Clause after a second/third delay time has transpired Rambuss Preliminary Proposed Supporting Evidence Construction after a second/third amount of time Specification(s) has elapsed and all original claims; e.g., 1195 patent, Figs. 1, 9, 16, 20, 21, and 46; Abstract; 1:31-44; 2:42-45; 9:60-11:28; 10:710; 10:48-11:12; 14:34-35 See also evidence related to this term cited by Rambus in reexaminations familiar to and brought by or involving NVIDIA related to the asserted claims of the Barth II patents in which this term occurs. R20573335R20744264; R20521849-R20559808. Expert testimony by Robert Murphy may be provided as referenced and provided herein, as set forth in the cover pleading to this exhibit, and/or as set forth in footnote 4. memory device / integrated a integrated circuit device in which Specification(s) circuit memory device information can be stored and and all original claims; e.g., retrieved electronically, not including 119 patent, Abstract; 1:24-2:13; Figs. 1, 2, a memory controller 10, 16, 20. Hynix I and Consolidated Actions Extrinsic Evidence for memory device. See also evidence related to this term cited by Rambus in reexaminations familiar to and brought by or involving NVIDIA related to the asserted claims of the Barth II patents in which this term occurs. R20573335-

2.

Note: all cites to the Barth II patent specifications are to U.S. Patent No. 7,287,119 (119 patent).

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3.

4.

R20744264; R20521849-R20559808. Expert testimony by Robert Murphy may be provided as referenced and provided herein, as set forth in the cover pleading to this exhibit, and/or as set forth in footnote 4. sense command one or more bits that specify that a Specification(s) row of memory cells be activated and all original claims; e.g., 119 Patent, Figs. 3, 4, 5, 6, and 7; Abstract; 2:14-20; 2:49-62; 3:16-18; 12:18-25; 119 patent claim 23; 952 patent claim 25; 953 patent claim 26; 050 patent claim 30; see also evidence related to this term cited by Rambus in reexaminations familiar to and brought by or involving NVIDIA related to the asserted claims of the Barth II patents in which this term occurs. R20573335-R20744264; R20521849-R20559808. Expert testimony by Robert Murphy may be provided as referenced and provided herein, as set forth in the cover pleading to this exhibit, and/or as set forth in footnote 4. the memory device initiates a the writing of data is initiated after a Specification(s) and write operation after a first first delay time all original claims; e.g., 119 Patent, Figs. 1, 9, delay time transpires 16, 20, 21, and 46; Abstract; 1:31-44; 2:42-45; 9:60-11:28; 10:7-10; 10:48-11:12; 14:34-35 Definition for delay in American Heritage College Dictionary, p.377 (2d ed. 1985); see also p.366 (3d ed. 2000); see also evidence related to this term cited by Rambus in reexaminations familiar to and brought by or involving NVIDIA related to the asserted claims of the Barth II patents in which this term occurs. R20573335-R20744264; 13

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5.

the write command is presented/posted internally to/within the memory device after a first/second delay [time] has transpired from when the write command is received

the write command is held and issued internally after a first/second delay [time] has transpired from when the write command is received

6.

write command

one or more bits that specify that the memory device receive and store data

R20521849-R20559808. Expert testimony by Robert Murphy may be provided as referenced and provided herein, as set forth in the cover pleading to this exhibit, and/or as set forth in footnote 4. Specification(s) and all original claims; e.g., 119 patent, Figs. 1, 9, 16, 20, 21, and 46; Abstract; 1:31-44; 2:42-45; 9:60-11:28; 10:7-10; 10:48-11:12; 14:34-35 Definition for delay in American Heritage College Dictionary, p. 377 (2d ed. 1985); see also p.366 (3d ed. 2000); see also evidence related to this term cited by Rambus in reexaminations familiar to and brought by or involving NVIDIA related to the asserted claims of the Barth II patents in which this term occurs. R20573335-R20744264; R20521849-R20559808. Expert testimony by Robert Murphy may be provided as referenced and provided herein, as set forth in the cover pleading to this exhibit, and/or as set forth in footnote 4. Specification(s) and all original claims; e.g., 119 patent, Figs. 6 and 20; Abstract; 10:5866; 9:51-11:53; see also evidence related to this term cited by Rambus in reexaminations familiar to and brought by or involving NVIDIA related to the asserted claims of the Barth II patents in which this term occurs. R20573335-R20744264; R20521849R20559808. Expert testimony by Robert Murphy may be provided as referenced and provided herein, as

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7.

delay time

set forth in the cover pleading to this exhibit, and/or as set forth in footnote 4. an amount of time that must transpire Specification(s) and all original claims; e.g., before commencing an action 119 patent, Figs. 1, 9, 16, 20, 21, and 46; Abstract; 1:31-44; 2:42-45; 9:60-11:28; 10:710; 10:48-11:12; 14:34-35; see also evidence related to this term cited by Rambus in reexaminations familiar to and brought by or involving NVIDIA related to the asserted claims of the Barth II patents in which this term occurs. R20573335-R20744264; R20521849-R20559808. Expert testimony by Robert Murphy may be provided as referenced and provided herein, as set forth in the cover pleading to this exhibit, and/or as set forth in footnote 4.

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