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chip_design_lecture2
chip_design_lecture2
TS Tower Semiconductor
Photoresist coating
Photoresist
Etching
SiO 2
Substrate
Exposure Substrate
Mask
Substrate
Substrate
Development
Substrate
N Well
c
h P Well
f N+ Active
b
e P+ Active
a g Deep N Well
d
a – minimum width
b, e, g, h – minimum spacing
c, f – minimum enclosure
d – minimum overlap
Synopsys University Courseware
Copyright © 2018 Synopsys, Inc. All rights reserved.
Chip Design
Lecture - 2
Developed By: Vazgen Melikyan
13
Design Rules, Transistor
Layout
Transistor
Design
OPC PSM
0°
Mask
180° 0°
OPC 180°
Wafer
Wavelength: 193nm
Synopsys University Courseware
Copyright © 2018 Synopsys, Inc. All rights reserved.
Chip Design
Lecture - 2
Developed By: Vazgen Melikyan
17
Optical Proximity Correction (OPC)
Conventional (no
OPC) Silicon image without OPC
Original layout
0.18 m