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4
Solutions
Chapter 4 Solutions S-3

4.1
4.1.1 The values of the signals are as follows:
RegWrite MemRead ALUMux MemWrite ALUop RegMux Branch
0 0 1 (Imm) 1 ADD X 0

ALUMux is the control signal that controls the Mux at the ALU input, 0 (Reg)
selects the output of the register file, and 1 (Imm) selects the immediate
from the instruction word as the second input to the ALU.
RegMux is the control signal that controls the Mux at the Data input to the
register file, 0 (ALU) selects the output of the ALU, and 1 (Mem) selects the
output of memory.
A value of X is a “don’t care” (does not matter if signal is 0 or 1)
4.1.2 All except branch Add unit and write port of the Registers
4.1.3 Outputs that are not used: Branch Add, write port of Registers
No outputs: None (all units produce outputs)
4.2
4.2.1 This instruction uses instruction memory, both register read ports, the ALU
to add Rd and Rs together, data memory, and write port in Registers.
4.2.2 None. This instruction can be implemented using existing blocks.
4.2.3 None. This instruction can be implemented without adding new control
signals. It only requires changes in the Control logic.
4.3
4.3.1 Clock cycle time is determined by the critical path, which for the given
latencies happens to be to get the data value for the load instruction: I-Mem
(read instruction), Regs (takes longer than Control), Mux (select ALU
input), ALU, Data Memory, and Mux (select value from memory to be
written into Registers). The latency of this path is 400 ps  200 ps  30 ps
 120 ps  350 ps  30 ps  1130 ps. 1430 ps (1130 ps  300 ps, ALU is
on the critical path).
4.3.2 The speedup comes from changes in clock cycle time and changes to the
number of clock cycles we need for the program: We need 5% fewer cycles
for a program, but cycle time is 1430 instead of 1130, so we have a speedup
of (1/0.95)*(1130/1430)  0.83, which means we actually have a slowdown.
S-4 Chapter 4 Solutions

4.3.3 The cost is always the total cost of all components (not just those on the
critical path, so the original processor has a cost of I-Mem, Regs, Control,
ALU, D-Mem, 2 Add units and 3 Mux units, for a total cost of 1000  200
 500  100  2000  2*30  3*10  3890.
We will compute cost relative to this baseline. The performance relative
to this baseline is the speedup we previously computed, and our cost/
performance relative to the baseline is as follows:
New Cost: 3890  600  4490
Relative Cost: 4490/3890  1.15
Cost/Performance: 1.15/0.83  1.39. We are paying significantly more for
significantly worse performance; the cost/performance is a lot worse than
with the unmodified processor.

4.4
4.4.1 I-Mem takes longer than the Add unit, so the clock cycle time is equal to
the latency of the I-Mem:
200 ps
4.4.2 The critical path for this instruction is through the instruction memory,
Sign-extend and Shift-left-2 to get the offset, Add unit to compute the
new PC, and Mux to select that value instead of PC4. Note that the path
through the other Add unit is shorter, because the latency of I-Mem is
longer that the latency of the Add unit. We have:
200 ps  15 ps  10 ps  70 ps  20 ps  315 ps
4.4.3 Conditional branches have the same long-latency path that computes the
branch address as unconditional branches do. Additionally, they have a long-
latency path that goes through Registers, Mux, and ALU to compute the PCSrc
condition. The critical path is the longer of the two, and the path through PCSrc
is longer for these latencies:
200 ps  90 ps  20 ps  90 ps  20 ps  420 ps
4.4.4 PC-relative branches.
4.4.5 PC-relative unconditional branch instructions. We saw in part c that this
is not on the critical path of conditional branches, and it is only needed for
PC-relative branches. Note that MIPS does not have actual unconditional
branches (bne zero,zero,Label plays that role so there is no need for
unconditional branch opcodes) so for MIPS the answer to this question is
actually “None”.
4.4.6 Of the two instructions (BNE and ADD), BNE has a longer critical path so
it determines the clock cycle time. Note that every path for ADD is shorter
than or equal to the corresponding path for BNE, so changes in unit latency
Chapter 4 Solutions S-5

will not affect this. As a result, we focus on how the unit’s latency affects the
critical path of BNE.
This unit is not on the critical path, so the only way for this unit to become
critical is to increase its latency until the path for address computation
through sign extend, shift left, and branch add becomes longer than the
path for PCSrc through registers, Mux, and ALU. The latency of Regs, Mux,
and ALU is 200 ps and the latency of Sign-extend, Shift-left-2, and Add is
95 ps, so the latency of Shift-left-2 must be increased by 105 ps or more for
it to affect clock cycle time.
4.5
4.5.1 The data memory is used by LW and SW instructions, so the answer is:
25%  10%  35%
4.5.2 The sign-extend circuit is actually computing a result in every cycle, but its
output is ignored for ADD and NOT instructions. The input of the sign-
extend circuit is needed for ADDI (to provide the immediate ALU operand),
BEQ (to provide the PC-relative offset), and LW and SW (to provide the
offset used in addressing memory) so the answer is:
20%  25%  25%  10%  80%
4.6
4.6.1 To test for a stuck-at-0 fault on a wire, we need an instruction that puts that
wire to a value of 1 and has a different result if the value on the wire is stuck
at zero:
If this signal is stuck at zero, an instruction that writes to an odd-numbered
register will end up writing to the even-numbered register. So if we place
a value of zero in R30 and a value of 1 in R31, and then execute ADD
R31,R30,R30 the value of R31 is supposed to be zero. If bit 0 of the Write
Register input to the Registers unit is stuck at zero, the value is written to
R30 instead and R31 will be 1.
4.6.2 The test for stuck-at-zero requires an instruction that sets the signal to 1,
and the test for stuck-at-1 requires an instruction that sets the signal to 0.
Because the signal cannot be both 0 and 1 in the same cycle, we cannot test
the same signal simultaneously for stuck-at-0 and stuck-at-1 using only one
instruction. The test for stuck-at-1 is analogous to the stuck-at-0 test:
We can place a value of zero in R31 and a value of 1 in R30, then use ADD
R30,R31,R31 which is supposed to place 0 in R30. If this signal is stuck-at-1,
the write goes to R31 instead, so the value in R30 remains 1.
4.6.3 We need to rewrite the program to use only odd-numbered registers.
4.6.4 To test for this fault, we need an instruction whose MemRead is 1, so it has
to be a load. The instruction also needs to have RegDst set to 0, which is
the case for loads. Finally, the instruction needs to have a different result if
S-6 Chapter 4 Solutions

MemRead is set to 0. For a load, MemRead0 result in not reading memory,


so the value placed in the register is “random” (whatever happened to be at
the output of the memory unit). Unfortunately, this “random” value can be
the same as the one already in the register, so this test is not conclusive.
4.6.5 To test for this fault, we need an instruction whose Jump is 1, so it has to be
the jump instruction. However, for the jump instruction the RegDst signal is
“don’t care” because it does not write to any registers, so the implementation
may or may not allow us to set RegDst to 0 so we can test for this fault. As a
result, we cannot reliably test for this fault.
4.7
4.7.1
Sign-extend Jump’s shift-left-2
00000000000000000000000000010100 0001100010000000000001010000

4.7.2
ALUOp[1-0] Instruction[5-0]
00 010100

4.7.3
New PC Path
PC4 PC to Add (PC4) to branch Mux to jump Mux to PC

4.7.4
WrReg Mux ALU Mux Mem/ALU Mux Branch Mux Jump Mux
2 or 0 (RegDst is X) 20 X PC4 PC4

4.7.5
ALU Add (PC4) Add (Branch)
-3 and 20 PC and 4 PC4 and 20*4

4.7.6
Read Register 1 Read Register 2 Write Register Write Data RegWrite

4.8
4.8.1
Pipelined Single-cycle
350 ps 1250 ps

4.8.2
Pipelined Single-cycle
1750 ps 1250 ps

4.8.3
Stage to split New clock cycle time
ID 300 ps
Chapter 4 Solutions S-7

4.8.4
a. 35%

4.8.5
a. 65%

4.8.6 We already computed clock cycle times for pipelined and single cycle
organizations, and the multi-cycle organization has the same clock cycle
time as the pipelined organization. We will compute execution times
relative to the pipelined organization. In single-cycle, every instruction
takes one (long) clock cycle. In pipelined, a long-running program with
no pipeline stalls completes one instruction in every cycle. Finally, a multi-
cycle organization completes a LW in 5 cycles, a SW in 4 cycles (no WB), an
ALU instruction in 4 cycles (no MEM), and a BEQ in 4 cycles (no WB). So
we have the speedup of pipeline

Multi-cycle execution time is X


times pipelined execution time, Single-cycle execution time is X times
where X is: pipelined execution time, where X is:
a. 0.20*50.80*44.20 1250 ps/350 ps3.57

4.9
4.9.1
Instruction sequence Dependences
I1: OR R1,R2,R3 RAW on R1 from I1 to I2 and I3
I2: OR R2,R1,R4 RAW on R2 from I2 to I3
I3: OR R1,R1,R2 WAR on R2 from I1 to I2
WAR on R1 from I2 to I3
WAW on R1 from I1 to I3

4.9.2 In the basic five-stage pipeline WAR and WAW dependences do not cause
any hazards. Without forwarding, any RAW dependence between an
instruction and the next two instructions (if register read happens in the
second half of the clock cycle and the register write happens in the first
half). The code that eliminates these hazards by inserting NOP instructions
is:
Instruction sequence
OR R1,R2,R3
NOP Delay I2 to avoid RAW hazard on R1 from I1
NOP
OR R2,R1,R4
NOP Delay I3 to avoid RAW hazard on R2 from I2
NOP
OR R1,R1,R2
S-8 Chapter 4 Solutions

4.9.3 With full forwarding, an ALU instruction can forward a value to EX stage
of the next instruction without a hazard. However, a load cannot forward
to the EX stage of the next instruction (by can to the instruction after that).
The code that eliminates these hazards by inserting NOP instructions is:
Instruction sequence
OR R1,R2,R3
OR R2,R1,R4 No RAW hazard on R1 from I1 (forwarded)
OR R1,R1,R2 No RAW hazard on R2 from I2 (forwarded)

4.9.4 The total execution time is the clock cycle time times the number of cycles.
Without any stalls, a three-instruction sequence executes in 7 cycles (5 to
complete the first instruction, then one per instruction). The execution
without forwarding must add a stall for every NOP we had in 4.9.2, and
execution forwarding must add a stall cycle for every NOP we had in 4.9.3.
Overall, we get:
No forwarding With forwarding Speedup due to forwarding
(7  4)*180 ps  1980 ps 7*240 ps  1680 ps 1.18

4.9.5 With ALU-ALU-only forwarding, an ALU instruction can forward to the


next instruction, but not to the second-next instruction (because that would
be forwarding from MEM to EX). A load cannot forward at all, because it
determines the data value in MEM stage, when it is too late for ALU-ALU
forwarding. We have:

Instruction sequence
OR R1,R2,R3
OR R2,R1,R4 ALU-ALU forwarding of R1 from I1
OR R1,R1,R2 ALU-ALU forwarding of R2 from I2

4.9.6
Speedup with ALU-ALU
No forwarding With ALU-ALU forwarding only forwarding
(7  4)*180 ps  1980 ps 7*210 ps  1470 ps 1.35

4.10
4.10.1 In the pipelined execution shown below, *** represents a stall when an
instruction cannot be fetched because a load or store instruction is using
the memory in that cycle. Cycles are represented from left to right, and for
each instruction we show the pipeline stage it is in during that cycle:
Instruction Pipeline Stage Cycles
SW R16,12(R6) IF ID EX MEM WB 11
LW R16,8(R6) IF ED EX MEM WB
BEQ R5,R4,Lbl IF ID EX MEM WB
ADD R5,R1,R4 *** *** IF ID EX MEM WB
SLT R5,R15,R4 IF ID EX MEM WB
Chapter 4 Solutions S-9

We can not add NOPs to the code to eliminate this hazard – NOPs need to
be fetched just like any other instructions, so this hazard must be addressed
with a hardware hazard detection unit in the processor.
4.10.2 This change only saves one cycle in an entire execution without data
hazards (such as the one given). This cycle is saved because the last
instruction finishes one cycle earlier (one less stage to go through). If there
were data hazards from loads to other instructions, the change would help
eliminate some stall cycles.

Instructions Executed Cycles with 5 stages Cycles with 4 stages Speedup


5 459 358 9/8  1.13

4.10.3 Stall-on-branch delays the fetch of the next instruction until the branch
is executed. When branches execute in the EXE stage, each branch causes
two stall cycles. When branches execute in the ID stage, each branch only
causes one stall cycle. Without branch stalls (e.g., with perfect branch
prediction) there are no stalls, and the execution time is 4 plus the number
of executed instructions. We have:

Instructions Branches Cycles with branch Cycles with branch


Executed Executed in EXE in ID Speedup
5 1 4  5  1*2  11 4  5  1*1  10 11/10  1.10

4.10.4 The number of cycles for the (normal) 5-stage and the (combined EX/
MEM) 4-stage pipeline is already computed in 4.10.2. The clock cycle
time is equal to the latency of the longest-latency stage. Combining EX
and MEM stages affects clock time only if the combined EX/MEM stage
becomes the longest-latency stage:
Cycle time with 5 stages Cycle time with 4 stages Speedup
200 ps (IF) 210 ps (MEM  20 ps) (9*200)/(8*210)  1.07

4.10.5
New ID New cycle Old cycle
latency New EX latency time time Speedup
180 ps 140 ps 200 ps (IF) 200 ps (IF) (11*200)/(10*200)  1.10

4.10.6 The cycle time remains unchanged: a 20 ps reduction in EX latency has


no effect on clock cycle time because EX is not the longest-latency stage.
The change does affect execution time because it adds one additional stall
cycle to each branch. Because the clock cycle time does not improve but
S-10 Chapter 4 Solutions

the number of cycles increases, the speedup from this change will be below
1 (a slowdown). In 4.10.3 we already computed the number of cycles when
branch is in EX stage. We have:

Cycles with Execution time Cycles with Execution time


branch in EX (branch in EX) branch in MEM (branch in MEM) Speedup
a. 45 11*200 ps  45 12*200 ps  2400 ps 0.92
1*2  11 2200 ps 1*3  12

4.11
4.11.1
LW R1,0(R1) WB
LW R1,0(R1) EX MEM WB
BEQ R1,R0,Loop ID *** EX MEM WB
LW R1,0(R1) IF *** ID EX MEM WB
AND R1,R1,R2 IF ID *** EX MEM WB
LW R1,0(R1) IF *** ID EX MEM
LW R1,0(R1) IF ID ***
BEQ R1,R0,Loop IF ***

4.11.2 In a particular clock cycle, a pipeline stage is not doing useful work if it
is stalled or if the instruction going through that stage is not doing any
useful work there. In the pipeline execution diagram from 4.11.1, a stage
is stalled if its name is not shown for a particular cycles, and stages in
which the particular instruction is not doing useful work are marked in
blue. Note that a BEQ instruction is doing useful work in the MEM stage,
because it is determining the correct value of the next instruction’s PC in
that stage. We have:
Cycles per loop Cycles in which all stages % of cycles in which all stages
iteration do useful work do useful work
8 0 0%

4.12
4.12.1 Dependences to the 1st next instruction result in 2 stall cycles, and the stall
is also 2 cycles if the dependence is to both 1st and 2nd next instruction.
Dependences to only the 2nd next instruction result in one stall cycle. We
have:
CPI Stall Cycles
1  0.35*2  0.15*1  1.85 46% (0.85/1.85)

4.12.2 With full forwarding, the only RAW data dependences that cause stalls are
those from the MEM stage of one instruction to the 1st next instruction.
Even this dependences causes only one stall cycle, so we have:
CPI Stall Cycles
1  0.20  1.20 17% (0.20/1.20)
Chapter 4 Solutions S-11

4.12.3 With forwarding only from the EX/MEM register, EX to 1st dependences
can be satisfied without stalls but any other dependences (even when
together with EX to 1st) incur a one-cycle stall. With forwarding only from
the MEM/WB register, EX to 2nd dependences incur no stalls. MEM to 1st
dependences still incur a one-cycle stall, and EX to 1st dependences now
incur one stall cycle because we must wait for the instruction to complete
the MEM stage to be able to forward to the next instruction. We compute
stall cycles per instructions for each case as follows:
EX/MEM MEM/WB Fewer stall cycles with
0.2  0.05  0.1  0.1  0.45 0.05  0.2  0.1  0.35 MEM/WB

4.12.4 In 4.12.1 and 4.12.2 we have already computed the CPI without forwarding
and with full forwarding. Now we compute time per instruction by taking
into account the clock cycle time:
Without forwarding With forwarding Speedup
1.85*150 ps  277.5 ps 1.20*150 ps  180 ps 1.54

4.12.5 We already computed the time per instruction for full forwarding in
4.12.4. Now we compute time-per instruction with time-travel forwarding
and the speedup over full forwarding:
With full forwarding Time-travel forwarding Speedup
1.20*150 ps  180 ps 1*250 ps  250 ps 0.72

4.12.6
EX/MEM MEM/WB Shorter time per instruction with
1.45*150 ps  217.5 1.35*150 ps  202.5 ps MEM/WB

4.13
4.13.1
ADD R5,R2,R1
NOP
NOP
LW R3,4(R5)
LW R2,0(R2)
NOP
OR R3,R5,R3
NOP
NOP
SW R3,0(R5)
S-12 Chapter 4 Solutions

4.13.2 We can move up an instruction by swapping its place with another


instruction that has no dependences with it, so we can try to fill some
NOP slots with such instructions. We can also use R7 to eliminate WAW
or WAR dependences so we can have more instructions to move up.
I1: ADD R5,R2,R1
I3: LW R2,0(R2) Moved up to fill NOP slot
NOP
I2: LW R3,4(R5)
NOP Had to add another NOP here,
NOP so there is no performance gain
I4: OR R3,R5,R3
NOP
NOP
I5: SW R3,0(R5)

4.13.3 With forwarding, the hazard detection unit is still needed because it must
insert a one-cycle stall whenever the load supplies a value to the instruction
that immediately follows that load. Without the hazard detection unit, the
instruction that depends on the immediately preceding load gets the stale
value the register had before the load instruction.
Code executes correctly (for both loads, there is no RAW dependence between the load and the
next instruction).

4.13.4 The outputs of the hazard detection unit are PCWrite, IF/IDWrite, and
ID/EXZero (which controls the Mux after the output of the Control
unit). Note that IF/IDWrite is always equal to PCWrite, and ED/ExZero
is always the opposite of PCWrite. As a result, we will only show the value
of PCWrite for each cycle. The outputs of the forwarding unit is ALUin1
and ALUin2, which control Muxes that select the first and second input
of the ALU. The three possible values for ALUin1 or ALUin2 are 0 (no
forwarding), 1 (forward ALU output from previous instruction), or 2
(forward data value for second-previous instruction). We have:

First five cycles


Instruction sequence 1 2 3 4 5 Signals
ADD R5,R2,R1 IF ID EX MEM WB 1: PCWrite=1, ALUin1=X, ALUin2=X
LW R3,4(R5) IF ID EX MEM 2: PCWrite=1, ALUin1=X, ALUin2=X
LW R2,0(R2) IF ID EX 3: PCWrite=1, ALUin1=0, ALUin2=0
OR R3,R5,R3 IF ID 4: PCWrite=1, ALUin1=1, ALUin2=0
SW R3,0(R5) IF 5: PCWrite=1, ALUin1=0, ALUin2=0

4.13.5 The instruction that is currently in the ID stage needs to be stalled if it


depends on a value produced by the instruction in the EX or the instruction
in the MEM stage. So we need to check the destination register of these two
instructions. For the instruction in the EX stage, we need to check Rd for
R-type instructions and Rd for loads. For the instruction in the MEM stage,
the destination register is already selected (by the Mux in the EX stage) so we
need to check that register number (this is the bottommost output of the EX/
MEM pipeline register). The additional inputs to the hazard detection unit
Chapter 4 Solutions S-13

are register Rd from the ID/EX pipeline register and the output number of
the output register from the EX/MEM pipeline register. The Rt field from the
ID/EX register is already an input of the hazard detection unit in Figure 4.60.
No additional outputs are needed. We can stall the pipeline using the three
output signals that we already have.
4.13.6 As explained for part e, we only need to specify the value of the PCWrite
signal, because IF/IDWrite is equal to PCWrite and the ID/EXzero signal
is its opposite.We have:

First five cycles


Instruction sequence 1 2 3 4 5 Signals
ADD R5,R2,R1 IF ID EX MEM WB 1: PCWrite=1
LW R3,4(R5) IF ID *** *** 2: PCWrite=1
LW R2,0(R2) IF *** *** 3: PCWrite=1
OR R3,R5,R3 *** 4: PCWrite=0
SW R3,0(R5) 5: PCWrite=0

4.14
4.14.1
Pipeline Cycles
Executed Instructions 1 2 3 4 5 6 7 8 9 10 11 12 13 14

LW R2,0(R1) IF ID EX MEM WB
BEQ R2,R0,Label2 (NT) IF ID *** EX MEM WB
LW R3,0(R2) IF ID EX MEM WB
BEQ R3,R0,Label1 (T) IF ID *** EX MEM WB
BEQ R2,R0,Label2 (T) IF *** ID EX MEM WB
SW R1,0(R2) IF ID EX MEM WB

4.14.2
Pipeline Cycles
Executed Instructions 1 2 3 4 5 6 7 8 9 10 11 12 13 14

LW R2,0(R1) IF ID EX MEM WB
BEQ R2,R0,Label2 (NT) IF ID *** EX MEM WB
LW R3,0(R2) IF *** ID EX MEM WB
BEQ R3,R0,Label1 (T) IF ID EX MEM WB
ADD R1,R3,R1 IF ID EX MEM WB
BEQ R2,R0,Label2 (T) IF ID EX MEM WB
LW R3,0(R2) IF ID EX MEM WB
SW R1,0(R2) IF ID EX MEM WB

4.14.3
LW R2,0(R1)
Label1: BEZ R2,Label2 ; Not taken once, then taken
LW R3,0(R2)
BEZ R3,Label1 ; Taken
ADD R1,R3,R1
Label2: SW R1,0(R2)
S-14 Chapter 4 Solutions

4.14.4 The hazard detection logic must detect situations when the branch
depends on the result of the previous R-type instruction, or on the result
of two previous loads. When the branch uses the values of its register
operands in its ID stage, the R-type instruction’s result is still being
generated in the EX stage. Thus we must stall the processor and repeat
the ID stage of the branch in the next cycle. Similarly, if the branch
depends on a load that immediately precedes it, the result of the load
is only generated two cycles after the branch enters the ID stage, so we
must stall the branch for two cycles. Finally, if the branch depends on
a load that is the second-previous instruction, the load is completing
its MEM stage when the branch is in its ID stage, so we must stall the
branch for one cycle. In all three cases, the hazard is a data hazard.
Note that in all three cases we assume that the values of preceding
instructions are forwarded to the ID stage of the branch if possible.
4.14.5 For part a we have already shows the pipeline execution diagram for the
case when branches are executed in the EX stage. The following is the
pipeline diagram when branches are executed in the ID stage, including
new stalls due to data dependences described for part d:

Pipeline Cycles
Executed Instructions 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15
LW R2,0(R1) IF ID EX MEM WB
BEQ R2,R0,Label2 (NT) IF *** ***ID EX MEM WB
LW R3,0(R2) IF ID EX MEM WB
BEQ R3,R0,Label1 (T) IF *** *** ID EX MEM WB
BEQ R2,R0,Label2 (T) IF ID EX MEM WB
SW R1,0(R2) IF ID EX MEM WB

Now the speedup can be computed as:


14/15  0.93

4.14.6 Branch instructions are now executed in the ID stage. If the branch
instruction is using a register value produced by the immediately preceding
instruction, as we described for part d the branch must be stalled because
the preceding instruction is in the EX stage when the branch is already
using the stale register values in the ID stage. If the branch in the ID stage
depends on an R-type instruction that is in the MEM stage, we need
forwarding to ensure correct execution of the branch. Similarly, if the
branch in the ID stage depends on an R-type of load instruction in the
WB stage, we need forwarding to ensure correct execution of the branch.
Overall, we need another forwarding unit that takes the same inputs as the
one that forwards to the EX stage. The new forwarding unit should control
two Muxes placed right before the branch comparator. Each Mux selects
between the value read from Registers, the ALU output from the EX/
MEM pipeline register, and the data value from the MEM/WB pipeline
register. The complexity of the new forwarding unit is the same as the
complexity of the existing one.
Chapter 4 Solutions S-15

4.15
4.15.1 Each branch that is not correctly predicted by the always-taken predictor
will cause 3 stall cycles, so we have:
Extra CPI
3*(1 − 0.45)*0.25  0.41

4.15.2 Each branch that is not correctly predicted by the always-not-taken


predictor will cause 3 stall cycles, so we have:
Extra CPI
3*(1 − 0.55)*0.25  0.34

4.15.3 Each branch that is not correctly predicted by the 2-bit predictor will
cause 3 stall cycles, so we have:
Extra CPI
3*(1 − 0.85)*0.25  0.113

4.15.4 Correctly predicted branches had CPI of 1 and now they become ALU
instructions whose CPI is also 1. Incorrectly predicted instructions that
are converted also become ALU instructions with a CPI of 1, so we have:

Speedup from
CPI without conversion CPI with conversion conversion
1  3*(1-0.85)*0.25  1.113 1  3*(1-0.85)*0.25*0.5  1.056 1.113/1.056  1.054

4.15.5 Every converted branch instruction now takes an extra cycle to execute,
so we have:

CPI without Cycles per original instruction with


conversion conversion Speedup from conversion
1.113 1  (1  3*(1 − 0.85))*0.25*0.5  1.181 1.113/1.181  0.94

4.15.6 Let the total number of branch instructions executed in the program be
B. Then we have:

Correctly
predicted Correctly predicted non-loop-back Accuracy on non-loop-back branches
B*0.85 B*0.05 (B*0.05)/(B*0.20)  0.25 (25%)

4.16
4.16.1
Always Taken Always not-taken
3/5  60% 2/5  40%
S-16 Chapter 4 Solutions

4.16.2
Predictor value at Correct or
Outcomes time of prediction Incorrect Accuracy
T, NT, T, T 0,1,0,1 I,C,I,I 25%

4.16.3 The first few recurrences of this pattern do not have the same accuracy as
the later ones because the predictor is still warming up. To determine the
accuracy in the “steady state”, we must work through the branch predictions
until the predictor values start repeating (i.e., until the predictor has
the same value at the start of the current and the next recurrence of the
pattern).

Predictor value Correct or Incorrect Accuracy in


Outcomes at time of prediction (in steady state) steady state
T, NT, T, T, NT 1st occurrence: 0,1,0,1,2 C,I,C,C,I 60%
2nd occurrence: 1,2,1,2,3
3rd occurrence: 2,3,2,3,3
4th occurrence: 2,3,2,3,3

4.16.4 The predictor should be an N-bit shift register, where N is the number
of branch outcomes in the target pattern. The shift register should be
initialized with the pattern itself (0 for NT, 1 for T), and the prediction is
always the value in the leftmost bit of the shift register. The register should
be shifted after each predicted branch.
4.16.5 Since the predictor’s output is always the opposite of the actual outcome of
the branch instruction, the accuracy is zero.
4.16.6 The predictor is the same as in part d, except that it should compare its
prediction to the actual outcome and invert (logical NOT) all the bits in
the shift register if the prediction is incorrect. This predictor still always
perfectly predicts the given pattern. For the opposite pattern, the first
prediction will be incorrect, so the predictor’s state is inverted and after
that the predictions are always correct. Overall, there is no warm-up
period for the given pattern, and the warm-up period for the opposite
pattern is only one branch.

4.17
4.17.1

Instruction 1 Instruction 2
Invalid target address (EX) Invalid data address (MEM)

4.17.2 The Mux that selects the next PC must have inputs added to it. Each input
is a constant address of an exception handler. The exception detectors
Chapter 4 Solutions S-17

must be added to the appropriate pipeline stage and the outputs of these
detectors must be used to control the pre-PC Mux, and also to convert to
NOPs instructions that are already in the pipeline behind the exception-
triggering instruction.
4.17.3 Instructions are fetched normally until the exception is detected. When
the exception is detected, all instructions that are in the pipeline after
the first instruction must be converted to NOPs. As a result, the second
instruction never completes and does not affect pipeline state. In the cycle
that immediately follows the cycle in which the exception is detected, the
processor will fetch the first instruction of the exception handler.
4.17.4 This approach requires us to fetch the address of the handler from memory.
We must add the code of the exception to the address of the exception
vector table, read the handler’s address from memory, and jump to that
address. One way of doing this is to handle it like a special instruction that
computer the address in EX, loads the handler’s address in MEM, and sets
the PC in WB.
4.17.5 We need a special instruction that allows us to move a value from the
(exception) Cause register to a general-purpose register. We must first
save the general-purpose register (so we can restore it later), load the
Cause register into it, add the address of the vector table to it, use the
result as an address for a load that gets the address of the right exception
handler from memory, and finally jump to that handler.

4.18
4.18.1
ADD R5,R0,R0
Again: BEQ R5,R6,End
ADD R10,R5,R1
LW R11,0(R10)
LW R10,1(R10)
SUB R10,R11,R10
ADD R11,R5,R2
SW R10,0(R11)
ADDI R5,R5,2
BEW R0,R0,Again
End:
S-18 Chapter 4 Solutions

4.18.2

4.18.3 The only way to execute 2 instructions fully in parallel is for a load/store
to execute together with another instruction. To achieve this, around each
load/store instruction we will try to put non-load/store instructions that
have no dependences with the load/store.
ADD R5,R0,R0 Note that we are now computing ai before we check whether we
Again: ADD R10,R5,R1 should continue the loop. This is OK because we are allowed to
BEQ R5,R6,End “trash” R10. If we exit the loop one extra instruction is executed, but
LW R11,0(R10) if we stay in the loop we allow both of the memory instructions to
ADD R12,R5,R2 execute in parallel with other instructions
LW R10,1(R10)
ADDI R5,R5,2
SUB R10,R11,R10
SW R10,0(R12)
BEQ R0,R0,Again
End:
Chapter 4 Solutions S-19

4.18.4

4.18.5

CPI for 1-issue CPI for 2-issue Speedup


1.11 (10 cycles per 9 instructions). 1.06 (19 cycles per 18 instructions). Neither 1.05
There is 1 stall cycle in each of the two LW instructions can execute in
iteration due to a data hazard parallel with another instruction, and SUB
between the second LW and the stalls because it depends on the second LW.
next instruction (SUB). The SW instruction executes in parallel with
ADDI in even-numbered iterations.

4.18.6
CPI for1-
issue CPI for 2-issue Speedup
1.11 0.83 (15 cycles per 18 instructions). In all iterations, SUB is stalled 1.34
because it depends on the second LW. The only instructions that
execute in odd-numbered iterations as a pair are ADDI and BEQ.
In even-numbered iterations, only the two LW instruction cannot
execute as a pair.

4.19
4.19.1 The energy for the two designs is the same: I-Mem is read, two registers
are read, and a register is written. We have:
140 pJ  2*70 ps  60 pJ  340 pJ
S-20 Chapter 4 Solutions

4.19.2 The instruction memory is read for all instructions. Every instruction also
results in two register reads (even if only one of those values is actually
used). A load instruction results in a memory read and a register write,
a store instruction results in a memory write, and all other instructions
result in either no register write (e.g., BEQ) or a register write. Because
the sum of memory read and register write energy is larger than memory
write energy, the worst-case instruction is a load instruction. For the
energy spent by a load, we have:
140 pJ  2*70 pJ  60 pJ  140 pJ  480 pJ

4.19.3 Instruction memory must be read for every instruction. However, we


can avoid reading registers whose values are not going to be used. To do this, we
must add RegRead1 and RegRead2 control inputs to the Registers unit to enable or
disable each register read. We must generate these control signals quickly to avoid
lengthening the clock cycle time. With these new control signals, a LW instruction
results in only one register read (we still must read the register used to generate the
address), so we have:
Energy before change Energy saved by change % Savings
140 pJ  2*70 pJ  60 pJ  140 pJ  480 pJ 70 pJ 14.6%

4.19.4 Before the change, the Control unit decodes the instruction while register
reads are happening. After the change, the latencies of Control and Register Read
cannot be overlapped. This increases the latency of the ID stage and could affect
the processor’s clock cycle time if the ID stage becomes the longest-latency stage.
We have:
Clock cycle time before change Clock cycle time after change
250 ps (D-Mem in MEM stage) No change (150 ps  90 ps  250 ps)

4.19.5 If memory is read in every cycle, the value is either needed (for a load
instruction), or it does not get past the WB Mux (or a non-load instruction that
writes to a register), or it does not get written to any register (all other instructions,
including stalls). This change does not affect clock cycle time because the clock
cycle time must already allow enough time for memory to be read in the MEM
stage. It does affect energy: a memory read occurs in every cycle instead of only in
cycles when a load instruction is in the MEM stage.

I-Mem
active I-Mem Clock cycle
energy latency time Total I-Mem energy Idle energy %
140 pJ 200 ps 250 ps 140 pJ  50 ps*0.1*140 3.5 pJ/143.5 pJ  2.44%
pJ/200 ps  143.5 pJ
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OREN

Prunus americana

1. Ia. Sta. Bul. 46:285 fig. 1900. 2. Waugh Plum Cult. 174. 1901. 3.
Budd-Hansen Am. Hort. Man. 299. 1903.
Bartlett 1. Bingaman 1.

Waugh places Oren with the “Miner-like” plums but as the variety
grows here it is a typical western Americana—the characters of this
species in leaf, fruit and stone being well shown in the
accompanying plate. It is one of the best of the Americanas in both
fruit and tree. The fruits are large and of good shape, perhaps a little
dull in color and not quite as good in quality as a few other
Americanas but still averaging very well in all fruit-characters. The
flesh is very nearly free from the stone. The trees are typical of the
species, shaggy of trunk and limb, straggling and unkempt in growth
of top, but hardy, robust, healthy and reliable in bearing. It would
seem as if this variety is rather too good to be allowed to pass out of
cultivation until there are more Americanas that are better.
Oren was taken from the wild in Black Hawk County, Iowa, about
1878, by J. K. Oren. Mr. Oren grew trees of this plum on his farm
and permitted all who came to take sprouts, cions and seed until the
variety was very generally disseminated locally. Who introduced it to
the trade and when is not known.

Tree small, spreading, low, dense-topped, hardy, often unproductive;


branches roughish, slightly zigzag, thorny, dark ash-brown, with small
lenticels; branchlets slender, long, twiggy, with internodes of average
length, green changing to dark chestnut-brown, glabrous, with large,
conspicuous, raised lenticels; leaf-buds small, short, obtuse, free.
Leaves falling early, oval or obovate, two inches wide, three and three-
quarters inches long; upper surface dark green changing to golden-yellow
late in the season, smooth and shining, with a narrow, grooved midrib;
lower surface silvery-green, lightly pubescent; apex taper-pointed, base
abrupt, margin coarsely serrate, the serrations ending in sharp points,
eglandular; petiole five-eighths inch long, thick, tinged red, thinly
pubescent, glandless or with one or two prominent, greenish-brown
glands.
Blooming season late and of medium length; flowers appearing after the
leaves, one and one-eighth inches across, white; borne in clusters on
lateral spurs and buds, in pairs or in threes; pedicels five-eighths inch
long, slender, glabrous, green, tinged with red; calyx-tube red,
campanulate, enlarged at the base, glabrous; calyx-lobes narrow,
somewhat obtuse, pubescent on both surfaces and on the margin,
reflexed; petals ovate, somewhat crenate or fringed, tapering below to
long, narrow claws, sparingly hairy along the edge of the base; anthers
yellow; filaments three-eighths inch long; pistil glabrous, shorter than the
stamens.
Fruit intermediate in time and length of ripening season; one and three-
sixteenths inches in diameter, roundish, usually truncate and slightly
oblique, compressed, halves equal; cavity very shallow, flaring; suture a
line; apex roundish or flattened; color dull light or dark red over a yellow
ground, mottled, with thick bloom; dots numerous, very small, light russet,
inconspicuous; stem slender, five-eighths inch long, glabrous; skin tough,
astringent, adhering; flesh dark golden-yellow, juicy, fibrous, soft and
melting, sweet; fair to good; stone semi-free, seven-eighths inch by five-
eighths inch in size, irregularly roundish or ovate, flattened, blunt at the
base and apex, with smooth surfaces; ventral suture strongly winged;
dorsal suture acute, with a narrow and shallow groove.

ORLEANS
Prunus domestica

1. Quintinye Com. Gard. 68. 1699. 2. Langley Pomona 91, Pl. XX fig. 4.
1729. 3. Miller Gard. Dict. 3:1754. 4. Duhamel Trait. Arb. Fr. 2:78, Pl. VII.
1768. 5. Knoop Fructologie 2:52, 55, 56, 57. 1771. 6. Forsyth Treat. Fr.
Trees 19. 1803. 7. Kraft Pom. Aust. 2:32, Tab. 179 fig. 1. 1796. 8.
Brookshaw Pom. Brit. Pl. XI. 1817. 9. Lond. Hort. Soc. Cat. 145, 150.
1831. 10. Prince Pom. Man. 2:62, 67, 85. 1832. 11. Poiteau Pom. Franc.
1:1846. 12. Floy-Lindley Guide Orch. Gard. 289, 290, 383. 1846. 13.
Thomas Am. Fruit Cult. 339. 1849. 14. Elliott Fr. Book 428. 1854. 15.
Thompson Gard. Ass’t 519. 1859. 16. Downing Fr Trees Am. 935. 1869.
17. Mas Pom. Gen. 2:37, fig. 19. 1873. 18. Am. Pom. Soc. Cat. 36. 1875.
19. Oberdieck Deut. Obst. Sort. 414. 1881. 20. Mathieu Nom. Pom. 435.
1882. 21. Hogg Fruit Man. 715. 1884. 22. Guide Prat. 156, 360. 1895.
Anglaise Noire 16, 17, 20, 21, 22. Angloise Noire 5. Brignole? 1.
Brugnole? 1. Brignole Violette 17, 20, 22. Brignole Violette? 5. Common
Orleans 10, 16, 17, 20. Damas Rouge 10. Damas Rouge 5, 9. Damas
Violet? 5. De Monsieur 17, 22. Die Herrnpflaume 7. English Orleans 10,
16, 17, 20. French Orleans 8. Hernnpflaume 17. Herrnpflaume 19.
Herrnpflaume 22. Herzog von Orleans 20, 22. Italian Damask of some 14.
Large Red Orleans 10. Late Monsieur 10, 16, 17, 20. Monsieur 4, 9, 10,
12, 17, 22. Monsieur 10, 13, 14, 15, 16, 20, 21. Monsieur Ordinaire 9, 10,
14, 15, 16, 17, 20, 21, 22. Old Orleans 10, 13, 14, 15, 16, 17, 20, 22.
Orleans 17, 20, 22. Orleans Red Damask 20. Prune de Monsieur 10, 16,
20. Prune de Monsieur 11. Prune d’Orleans 16, 17, 20, 21. Prunelle? 5.
Prune Monsieur 7. Red Damask 10. Red Damask 9, 10, 12, 13, 14, 15,
16, 17, 18, 20, 21, 22. Red Orleans 10, 16, 17, 20. Red Orleans Plum 6.

In Europe Orleans is one of the most renowned of the plums


cultivated. A proof of its popularity is the great number of names, as
shown in the synonymy given above, under which it passes in
England and on the continent. This variety, however, is almost
unknown in America though described by all of the older American
pomologists and probably introduced time and again during the last
hundred years in our orchards. The French fruit books say that the
variety thrives better in southern than northern France and nearly all
of the European writers state that it does best in high, dry, light,
warm soils. It is likely that our climate, and the soils in which plums
are generally grown in America, are not suited to this sort.
Unfortunately this Station has no trees of this variety and the brief
description given is a compilation.
The Orleans has been cultivated for more than two hundred years.
Langley said of it in 1729 “The Orleans Plumb tho a common, is yet
a very valuable Plumb, as well for its fine firm juicy Pulp when well
ripened, as its being a constant and plentiful bearer.” The Red
Damask and the Brugnole mentioned by Quintinye in 1699 are
probably the Orleans; but the Prune de Monsieur of Knoop and the
Monsieur of Tournefort, which are yellow, are distinct. The variety is
evidently of French origin. Mas in his Pomologie Generale, 1873,
states that it first bore the name Brignole Violette, but later was given
the name it now bears in honor of Monsieur, Duke of Orleans,
brother of Louis XIV. Damas Rouge is an old synonym, though
Duhamel described it as a distinct variety. Herrnpflaume is the
common name of the Orleans in Germany and Austria, while in
France, it is often called the Monsieur. It has never been common in
America, yet it was entered on the American Pomological Society
catalog list in 1875.
Tree large, vigorous, hardy, productive, bearing annually; branches
grayish, pubescent; leaves large, ovate, with crenate margins; flowers
large, blooming early; petals roundish, imbricated.
Fruit early mid-season; medium in size, roundish-truncate, sides
unequal; cavity usually shallow, wide; suture distinct; apex flattened; color
dark or purplish-red, overspread with thin bloom, with a sprinkling of pale
reddish dots; stem thick, short; skin tender; flesh yellowish, juicy, usually
melting when properly matured, sweet near the skin but sprightly toward
the center, pleasant-flavored; good; stone free, small, oval, flattened, with
roughish surfaces.

OULLINS
OULLINS

Prunus domestica

1. Hogg Fruit Man. 374. 1866. 2. Downing Fr. Trees Am. 935. 1869. 3.
Pom. France 7: No. 15. 1871. 4. Mas Le Verger 6:43. 1866-73. 5. Am.
Pom. Soc. Cat. 38. 1877. 6. Cat. Cong. Pom. France 366. 1887. 7.
Mathieu Nom. Pom. 446. 1889. 8. Waugh Plum Cult. 117. 1901. 9.
Thompson Gard. Ass’t 4:158. 1901.
Massot 6, 7. Monstrueuse d’Oullins 2, 7. Ouillin’s Gage 2, 7. Oullins
Golden 1. Oullin’s Golden 2, 9. Oullin’s Golden 3, 4, 6, 7. Oullin’s Golden
Gage 2, 7. Oullins Golden Gage 5. Oullin’s Green Gage 8. Prune-Massot
3. Reine-Claude d’Oullins 1, 2, 7, 9. Reine-Claude D’Oullins 3, 4, 6.
Reine-Claude Prêcoce 1, 2, 3, 6, 7, 9. Reine-Claude von Oullins 7. Roi-
Claude 3, 7.

Oullins came to America with the best of recommendations from


European growers but it has fallen so far short of its reputation in
Europe that it was dropped from the fruit list of the American
Pomological Society and is gradually disappearing from cultivation.
The fault is in the fruit which is but indifferent in quality for a plum of
the Reine Claude group. In Europe the variety is rated as one of the
best dessert sorts; in America it is hardly second-rate in quality. This
difference may be due to differences in climate and soil; more
probably, it is due to the greater number of better Reine Claude
varieties grown in America with which it must compete. Hand,
Jefferson, Washington, McLaughlin, Yellow Gage, Spaulding and
Imperial Gage, the cream of the Reine Claude plums, are all
Americans similar to Oullins but much better in quality. Oullins is
hardly surpassed by any of its group in tree-characters and might
well be used for breeding purposes as there are so few sorts of its
kind having satisfactory trees.
This variety, probably a Reine Claude seedling, was found at
Coligny, France, on the estate of M. Filliaud; it was propagated by M.
Corsaint, gardener to the Baron de Toisy, near Cuiseaux
(Department of Saone-et-Loire) and was introduced at Oullins
(Department of Rhone) by M. Massot, nurseryman. The name is
seldom spelled correctly in American fruit books, being either written
with an apostrophe and s or with both left off, these spellings coming
from the supposition that the name comes from that of a man, a
mistake as the history shows. Oullins was placed on the American
Pomological Society catalog fruit list in 1875 but was dropped when
the catalog was revised in 1897.
Tree large, vigorous, spreading, open-topped, hardy, productive;
branches ash-gray, somewhat rough, with numerous, large, raised
lenticels; branchlets stout, the bark rough, medium to above in thickness,
short, with short internodes, greenish-red changing to brownish-red, dull,
lightly pubescent, overspread with faint bloom, with numerous, small
lenticels; leaf-buds large, long, pointed, free; leaf-scars swollen.
Leaves oval or obovate, two inches wide, four and one-quarter inches
long, thick; upper surface dark green, covered with fine hairs, the midrib
grooved; lower surface pale green, pubescent; apex acute or abruptly
pointed, base acute, margin serrate or crenate, with small black glands;
petiole three-quarters inch long, thick, pubescent, tinged red, with from
two to four globose, greenish-brown glands variable in size, usually on the
stalk.
Blooming season medium to late, of average length; flowers appearing
after the leaves, one and one-quarter inches across, white, with a faint
yellowish tinge; arranged on lateral spurs, singly or in pairs; pedicels
eleven-sixteenths inch long, pubescent, greenish; calyx-tube green,
campanulate, pubescent; calyx-lobes broad, obtuse, pubescent on both
surfaces, glandular-serrate, reflexed; petals broadly obovate, crenate,
tapering to short, broad claws; anthers yellowish; filaments three-eighths
inch long; pistil glabrous, equal to the stamens in length.
Fruit early, season short; medium to below in size, roundish, halves
equal; cavity shallow, below medium in width, abrupt; suture an indistinct
line; apex flattened or depressed; color greenish-yellow changing to dull
light yellow, overspread with thin bloom; dots numerous, small, whitish,
inconspicuous, clustered about the apex; stem of medium thickness and
length, adhering well to the fruit; skin thin, slightly astringent, separating
readily; flesh greenish-yellow or pale yellow, somewhat dry, firm, sweet,
not high in flavor; good; stone half-free or free, three-quarters inch by five-
eighths inch in size, broadly oval, flattened, roughened and pitted, blunt at
the base and apex; ventral suture rather narrow, furrowed, with a distinct
but not prominent wing; dorsal suture broadly and deeply grooved.

PACIFIC
PACIFIC

Prunus domestica

1. U. S. D. A. Rpt. 292. 1893. 2. Am. Pom. Soc. Rpt. 150. 1895. 3.


Oregon Sta. Bul. 45:31. 1897. 4. Oregon Hort. Soc. Rpt. 474. 1898. 5. Am.
Pom. Soc. Cat. 40. 1899. 6. Waugh Plum Cult. 117. 1901. 7. Oregon
Agriculturist 17: No. 24, 370. 1908.
Pacific 3. Pacific Prune 2, 3. Willamette 4, 5, 7. Willamette Prune 3.

No part of America is so well adapted to plum culture as the


Pacific Coast and especially the inter-mountain valleys in Oregon.
From the last-named State, though fruit-growing is a very recent
development, a number of meritorious plums have been added to
pomology. One of the best of these, as they grow in New York, is the
Pacific, the fruits of which are well shown in the color-plate. Few
purple plums are more beautiful than this in color and shape, few
equal it in size and very few of its color excel it in quality. The trees
are unusually robust, perfectly hardy and productive. In Oregon the
Pacific has not proved a good prune-making plum but is reported as
standing eastern shipment very well, which, if true, indicates that this
plum would succeed as a market fruit in New York. Pacific is well
worth trying in New York as a commercial variety.
This plum is hopelessly confused with the Willamette. The
following is an abridged account of the two fruits as written us by H.
M. Williamson, Secretary of the Oregon State Board of Horticulture,
and one of the leading authorities on fruit-growing on the Pacific
Coast.

“About 1875 Jesse Bullock of Oswego, Oregon, sent to Germany for


pits of the Italian or Fellenberg prune, and planted the pits received in a
nursery row. When the trees from these began to bear, Mr. C. E. Hoskins
went to Mr. Bullock’s place, examined the fruit and selected trees which
seemed promising, giving to each tree a number. From at least six of
these trees he took scions, propagated them, and named them Bullock
No. 1, Bullock No. 2, etc. He finally decided that only two of these, Bullock
No. 1 and Bullock No. 6, were of sufficient value to justify their further
propagation. Bullock No. 1 was named Champion and Bullock No. 6,
Willamette. Mr. Hoskins told me these names were given by the State
Horticultural Society, but I find no record of this action. He propagated and
sold a good many trees of both varieties, but more of the Willamette than
of the Champion.
“Mr. Hoskins was strongly of the opinion that the Pacific is identical with
the Willamette. I am as strongly of the opinion that they are distinct
varieties. I base my opinion, first, upon the history of the origin of the
Pacific given me by Henry Freeboro, Portland, Oregon, who introduced it;
and, second, upon what appear to me to be marked differences in the two
prunes. A number of years ago I went to Mr. Freeboro’s place when
prunes were ripe and obtained from him a supply of Pacific prunes grown
on trees propagated by him from scions taken from the original Pacific
tree. I took these prunes to Springbrook and compared them with the
Willamette grown on Mr. Hoskins’ place. I was thoroughly convinced that
the two were decidedly different in character, but Mr. Hoskins did not think
so. I noticed first a marked difference in the habits of growth of the trees.
The Pacific trees were of unusually vigorous growth and had a decided
upright tendency. The Willamette trees were very similar to the Italian in
vigor and had the rather spreading habit of growth of the Italian. The
Pacific prunes are larger in size than the Willamette and vary much more
in size. One of the most decided indications of difference is the far greater
tendency to brown-rot of the fruit of the Pacific than is the case with the
fruit of the Willamette. This has been observed when scions of the
Willamette and of the Pacific have been grafted on the same tree for the
purpose of comparison. I have never seen a well dried specimen of the
Pacific, but this may have been the fault of the men who dried the
specimens I have seen. The Willamette dries easily for a prune of its size
and gives a larger percentage of dried to fresh fruit than the Italian,
according to Mr. Hoskins.
“I believe the Willamette is well worthy of more attention in the
Willamette Valley, whereas the Pacific, on account of its extreme
susceptibility to the brown-rot, does not appear to be a safe variety here,
although when perfect it is a magnificent prune for eating fresh, and one of
the very largest known. I am told that in eastern Oregon where climatic
conditions keep out the brown-rot, the Pacific is proving one of the best
varieties for shipping fresh. At the present time the two varieties are much
confused. When the Pacific prune was introduced, Mr. Hoskins and other
recognized authorities, pronounced it the Willamette, and nurserymen
therefore obtained scions from Willamette trees and sold the propagated
trees as Pacifies, and in a more limited way the reverse was done. The
greater part of the trees supposed to be Pacifics are in fact Willamettes.”

At this Station we have the two plums under discussion, the


Pacific having been obtained from Fred E. Young, nurseryman,
Rochester, New York, and the Willamette, under the name Pacific,
from the Oregon Wholesale Nursery Company, Salem, Oregon. The
differences between the two plums in New York are essentially those
given by Mr. Williamson as distinguishing characters in Oregon.

Tree of medium size, upright-spreading, open-topped, hardy, productive;


branches ash-gray, smooth, with small, raised lenticels; branchlets above
medium in thickness, short, with short internodes, greenish-red changing
to brownish-red, covered with heavy bloom and sparingly pubescent, with
indistinct small lenticels; leaf-buds plump, of medium size and length,
obtuse, free.
Leaves obovate, two inches wide, four inches long, the oldest thick and
leathery; upper surface dark green, covered with fine hairs, with a widely
and deeply grooved midrib; lower surface pale green, pubescent; apex
acute or obtuse, base acute, margin crenate, with small dark glands;
petiole seven-eighths inch long, thick, pubescent, tinged red, with from two
to four large, globose, yellowish-green glands usually on the stalk.
Blooming season of medium length; flowers appearing after the leaves,
one and three-sixteenths inches across, white; borne on lateral spurs and
buds, singly or in pairs; pedicels five-sixteenths inch long, thick,
pubescent; calyx-tube green, campanulate, pubescent only at the base;
calyx-lobes broad, obtuse, lightly pubescent on both surfaces but heavily
pubescent along the serrate margin, reflexed; petals oval, dentate,
tapering to short, broad claws; stamens inclined to develop into
rudimentary petals; anthers yellow; filaments seven-sixteenths inch long;
pistil glabrous, equal to the stamens in length.
Fruit intermediate in time and length of ripening season; two inches by
one and five-eighths inches in size, ovate, halves equal; cavity shallow,
narrow, flaring; suture shallow, indistinct; apex bluntly pointed; color bluish,
overspread with thick bloom; dots small, brown, conspicuous, clustered
about the apex; stem thick, one-half inch long, pubescent, adhering well to
the fruit; skin thin, tough, separating readily; flesh pale golden-yellow,
juicy, firm, sweet, spicy; good; stone free, one inch by five-eighths inch in
size, flattened, irregularly broad-oval, obliquely contracted at the base,
blunt at the apex, with rough and pitted surfaces; ventral suture narrow,
with numerous deep furrows, usually blunt; dorsal suture widely and
deeply grooved.

PALATINE
Prunus domestica
This plum, scarcely known outside of two counties in New York, is
of distinctly good quality and if all accounts are true is fairly immune
to black-knot. In size and appearance the fruits are superior to many
other Reine Claude plums, with which it must be compared, so much
so that the variety is probably worth growing outside the region
where the following interesting history shows it has been cultivated
for nearly a century and a half.
Palatine, according to Mr. Washington Garlock of New York,
originated in 1760 when a family of Palatines by the name of Best
came from Germany to the United States and settled in Livingston
Manor (East Camps) now Columbia County, New York. They brought
with them plum pits which they planted and from them secured one
tree. In 1762 they moved to Schoharie County, New York, taking with
them the seedling tree. In their new home they propagated the
variety, which they named Palatine, and disseminated it so
industriously that it became thoroughly established throughout
Montgomery and Schoharie counties and attained great popularity
because of its apparent freedom from black-knot. That this popularity
is merited is attested by the fact that after one hundred and fifty
years it is still extensively grown in that vicinity.
Tree large, vigorous, spreading, dense-topped, productive; branches
thick; branchlets lightly pubescent; leaves flattened, slightly drooping,
obovate, one and five-eighths inches wide, three and one-quarter inches
long, thick, rugose; margin coarsely crenate, eglandular or with few, small
glands; petiole pubescent, glandless or with one or two small glands;
blooming season intermediate in time, short; flowers appearing after the
leaves, more than one inch across, white with yellow tinge at the apex of
the petals; borne singly; calyx-lobes thickly pubescent on both surfaces,
strongly reflexed.
Fruit intermediate in time and length of ripening season; about one and
one-half inches in diameter, roundish or roundish-oval, dull yellowish-
green becoming greenish-yellow at full maturity, mottled and indistinctly
blushed on the sunny side, overspread with thin bloom; skin thin, slightly
sour; flesh light golden-yellow, juicy, fibrous, firm, sweet, pleasant in flavor;
good to very good; stone dark colored, free or nearly so, seven-eighths
inch by one-half inch in size, oval, with thickly pitted surfaces; ventral
suture blunt or with a short, narrow wing; dorsal suture wide, shallow.

PAUL EARLY
Prunus domestica

1. N. Y. Exp. Sta. Rpt. 12:611. 1893. 2. W. N. Y. Hort. Soc. Rpt. 42:83.


1897.
Paul’s Earliest 1, 2.

This variety seems to be under test only at this Station where it


has fruited for a number of years. It is so similar to Early Rivers, a
variety of small account in America, as to be an almost worthless
addition to the list of plums. Paul Early originated with and was sent
out by J. M. Paul, North Adams, Massachusetts, about 1888.

Tree very large, vigorous, round-topped, dense, very productive;


branches covered with numerous fruit-spurs; branchlets twiggy, thickly
pubescent; leaf-buds strongly appressed; leaves flattened, obovate or
oval, two and three-eighths inches wide, four inches long; margin crenate,
with few, small, dark glands; petiole reddish, pubescent, glandless or with
one or two large glands; blooming season intermediate in time, short;
flowers appearing before the leaves, one inch across; borne in scattering
clusters, usually in pairs; pedicels very thick and pubescent; anthers
tinged red.
Fruit very early, season short; one and three-eighths inches by one and
one-quarter inches in size, roundish-oval, dark purplish-black, overspread
with thick bloom; skin tender, slightly sour; flesh greenish-yellow becoming
yellowish, tender, sweet near the surface but sour next the pit, mild; good;
stone clinging, seven-eighths inch by five-eighths inch in size, irregular-
oval, with roughened and thickly pitted surfaces; ventral suture prominent,
seldom winged; dorsal suture with a narrow, shallow groove.

PEACH
Prunus domestica

1. N. E. Farmer Dict. 266. 1797. 2. Prince Treat. Hort. 27. 1828. 3.


Prince Pom. Man. 2:106. 1832. 4. Downing Fr. Trees Am. 307. 1845. 5.
Horticulturist 1:113, 114 fig. 34, 147. 1846. 6. Poiteau Pom. Franc. 1:1846.
7. Thomas Am. Fruit Cult. 335, 336 fig. 262. 1849. 8. Horticulturist 6:132.
1851. 9. Elliott Fr. Book 422. 1854. 10. Downing Fr. Trees Am. 367. 1857.
11. Hooper W. Fr. Book 250. 1857. 12. Am. Pom. Soc. Cat. 86. 1862. 13.
Hogg Fruit Man. 375. 1866. 14. Mas Le Verger 6:73. Pl. XXXVII. 1866-73.
15. Pom. France 7: No. 7. 1871. 16. Gard. Chron. N. S. 17:144. 1882. 17.
Mich. Hort. Soc. Rpt. 466. 1883. 18. Wickson Cal. Fruits 353. 1891. 19.
Wash. Hort. Soc. Rpt. 136. 1893. 20. Guide Prat. 156, 361. 1895. 21. Cat.
Cong. Pom. France 462 fig. 1906.
Apricot Plum 5 incor. Caledonian 15, 20. Calvels Pfirschenpflaume 14,
20. D’Abricot (of Streets of Paris) 20. Duane’s Purple 5 incor, 6, 11.
Howells Large 15, 20, 21. Jenkin’s Imperial 15, 20. Large Peach 16. Large
Peach Plum 3. Nectarine 15, 20. Nectarine Rouge 21. Peach 15, 20.
Peach Plum 3, 5, 14, 20. Peach Plum 7, 8, 9, 10, 11, 12, 17. Pêche 14,
15, 20, 21. Pêche de Calvel 20. Prune Pêche 3, 7, 9, 10, 14, 18. Prune
Pêche 4, 5, 6, 20. Prune-Pêche De Calvel 14. Reine-Claude De Berger
13, 16. Rothe Nektarine 15, ?20.

Peach, the largest early plum, is not high in quality but is justly
esteemed where it can be grown for its earliness, large size and
handsome appearance. Unfortunately this variety is capricious
beyond most other plums as to climate and soils and refuses to
thrive unless its needs are very well supplied in the matter of
environment. In America it seems to find congenial soil and climate
only on the Pacific Coast, and even then refuses to bear well except
on strong, rich soils. In New York, even when grown upon soils
similar to those upon which it does well elsewhere, the fruits are few
and lacking in quality, though the trees are large, vigorous and about
all that could be desired in a good plum tree. It may be possible to
grow Peach in favorable locations in the East; in which case, a plum
of its appearance and quality, coming as early in the season as it
ripens, would make a most desirable addition to the list of plums.
From its behavior elsewhere the situation that would suit it best in
New York is a sunny exposure with a warm, rich, clay loam.
The origin of the Peach is unknown. Poiteau was unable to find
any reference to it in the Eighteenth Century European literature and
thought, therefore, that it must have been unknown to this period.
Samuel Deane mentions a Peach plum in New England in 1797. It is
doubtful, however, whether it is the Peach of this discussion, the
name having been applied indiscriminately to several varieties, the
Goliath, Nectarine and Apricot in particular. Prince, in 1832,
described a Large Peach Plum which he said “had been introduced
a few years since” but as his variety is oval and a clingstone, it is not
the same as the Peach of Poiteau, the one discussed here, this plum
being nearly round and a freestone. Judge James C. Duane of
Schenectady, New York, seems to have first imported the Peach
plum, with several others, from France, in 1820. The name of this
variety was lost during the shipment and as the invoice called for an
Apricot Plum, the names Apricot and Duane’s Plum became locally
applied to what afterwards turned out to be the Peach. C. H.
Tomlinson of Schenectady and A. J. Downing in 1846 made a careful
study of these imported plums and showed conclusively that this
Apricot or Duane’s Plum was the Peach of the French. In 1862, the
American Pomological Society added Peach to the fruit catalog list
and recommended it for the eastern and western sections of New
York.

Tree large, very vigorous, spreading, round or flat-topped, hardy,


medium in productiveness; branches stocky, smooth, dark ash-brown, with
lenticels of medium number and size; branchlets thick, with internodes one
inch long, light brown, covered with short, heavy pubescence; leaf-buds
large, of medium length, conical.
Leaves large, oval, of average thickness; upper surface dark green;
lower surface pale green, pubescent; apex obtuse, margin doubly crenate,
with small glands; petiole three-quarters inch long, thick, pubescent, with a
trace of red, usually with two, small, globose, greenish glands at the base
of the leaf.
Fruit early; thick-set, without a neck, one and seven-eighths inches in
diameter, roundish, slightly angular, halves equal; cavity deep, wide,
compressed; suture shallow, distinct; apex flattened or depressed; color
dark purplish-red, overspread with thin bloom; dots numerous, large,
conspicuous; stem eleven-sixteenths inch long, glabrous, adhering well to
the fruit; skin tough, adhering; flesh golden-yellow, medium juicy, firm,
subacid, mild; good; stone free, one inch by three-quarters inch in size,
roundish-oval, flattened, with rough and pitted surfaces, blunt at the base
and apex; ventral suture wide, prominent, often distinctly winged; dorsal
suture with a wide, deep groove.

PEARL
PEARL

Prunus domestica

1. Burbank Cat. 5. 1898. 2. Am. Gard. 21:36. 1900. 3. Waugh Plum


Cult. 118. 1901.
One can grow seedlings of some plums with considerable
certainty of getting respectable offspring—plums worth having in an
orchard—but the chances of growing a variety of superior qualities
are small indeed. It is a piece of good luck, a matter almost wholly of
luck, when, as in this case, but one parent is known, to secure as
fine a fruit as the Pearl plum. The variety now under notice is one to
be pleased with if it came as a chance out of thousands; its rich,
golden color, large size, fine form, melting flesh and sweet, luscious
flavor, place it among the best dessert plums. In the mind of the
writer and of those who have assisted in describing the varieties for
The Plums of New York, it is unsurpassed in quality by any other
plum. The tree-characters, however, do not correspond in desirability
with those of the fruits. The trees, while of medium size and
seemingly as vigorous and healthy as any, are unproductive. In none
of the several years they have been fruiting at this Station have they
borne a large crop. If elsewhere this defect does not show, the
variety becomes at once one of great value. The fruits of Pearl are
said to cure into delicious prunes—to be readily believed by one who
has eaten the fresh fruits. This variety ought to be very generally
tried by commercial plum-growers and is recommended to all who
grow fruit for pleasure.
Pearl is a recent addition to the list of plums and though its history
is well known its parentage is in doubt. In 1898, Luther Burbank
introduced the variety as a new prune grown from the seed of the
well-known Agen. The male parent is not known but from the fruit
and tree, one at once surmises that it was some variety of the Reine
Claude group, its characters being so like those of the plum named
that no one could suspect that it came from the seed of a plum so far
removed from the Reine Claude as the Agen.

Tree of medium size, vigorous, vasiform, dense-topped, hardy,


unproductive; branches ash-gray, with numerous, small, raised lenticels;
branchlets twiggy, thick, long, with long internodes, greenish-red changing
to brownish-red, very pubescent early in the season becoming less so at
maturity, with numerous, small, raised lenticels; leaf-buds large, above
medium in length, conical, appressed; leaf-scars prominent.
Leaves broadly oval, one and seven-eighths inches wide, three and
one-half inches long, thick, leathery; upper surface dark green, rugose,
covered with fine hairs, with a grooved midrib; lower surface pale green,
pubescent; apex abruptly pointed, base abrupt, margin serrate or crenate,
with small, black glands; petiole seven-eighths inch long, thick, pubescent,
tinged red, glandless or with from one to three small, globose, brownish
glands on the stalk.
Blooming season intermediate in time and length; flowers appearing
after the leaves, showy on account of their size, averaging one and five-
eighths inches across, white, with a tinge of yellow at the apex of the
petals; borne on lateral spurs and buds, usually singly; pedicels one-half
inch long, thick, strongly pubescent, greenish; calyx-tube green,
campanulate, pubescent; calyx-lobes broad, obtuse, pubescent on both
surfaces, glandular-serrate and with marginal hairs, strongly reflexed;
petals obovate or oblong, entire, tapering to short, broad claws; anthers
yellow; filaments nearly one-half inch long; pistil glabrous, shorter than the
stamens.
Fruit intermediate in time and length of ripening season; one and three-
quarters inches by one and one-half inches in size, roundish-oval,
compressed, halves unequal; cavity shallow, narrow, abrupt; suture a line;
apex depressed; color golden-yellow, obscurely striped and splashed with
dull green, mottled, overspread with thin bloom; dots numerous, small,
whitish, inconspicuous, clustered about the apex; stem thick, three-
quarters inch long, thickly pubescent, adhering well to the fruit; skin tough,
separating readily; flesh deep yellow, juicy, a little coarse and fibrous, firm
but tender, very sweet, with a pleasant, mild flavor, aromatic; very good to
best; stone clinging, one inch by five-eighths inch in size, long-oval,
slightly necked at the base, bluntly acute at the apex, with rough surfaces;
ventral suture broad, blunt; dorsal suture with a wide, shallow groove.

PETERS

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