Understanding I2C Protocol and Its Implementation in

STM32 Microcontroller
What is I2C?
I2C (Inter-Integrated Circuit) is a synchronous, multi-master, multi-slave, packet-
switched, single-ended, serial communication bus. Developed by Philips
Semiconductors (now NXP Semiconductors), it allows multiple chips to
communicate with each other using just two wires: SDA (Serial Data Line) and
SCL (Serial Clock Line). I2C is widely used for communication between
microcontrollers and peripherals like sensors, displays, and EEPROMs.

Features of I2C:
➢ Simple 2-Wire Interface: Only two lines, SDA and SCL.
➢ Serial and Synchronous: Data is transferred bit by bit along a single wire
(the SDA line), and is synchronized by the clock (the SCL line).
➢ Multi-Master and Multi-Slave: Multiple master and slave devices can be
connected to the same bus.
➢ Addressing: Each device is addressed by a unique address.
➢ Various Data Transfer Modes:
• Standard-mode: 100kbit/s
• Fast-mode: 400kbit/s
• Fast-mode Plus (Fm+): 1Mbit/s
• High-speed mode: 3.4Mbit/s
• Ultra-Fast-mode: 5Mbit/s (unidirectional)
I2C Terminology:
➢ Master: The device that initiates communication, generates clock signals,
and terminates communication.
➢ Slave: The device that responds to the master's requests.
➢ Transmitter: The device that sends data to the bus.
➢ Receiver: The device that receives data from the bus.
➢ Multi-Master: More than one master can control the bus without
corrupting the message.
➢ Arbitration: Ensures that if multiple masters try to control the bus
simultaneously, only one succeeds, and the message is not corrupted.

I2C Protocol Format Overview:

The I2C protocol format specifies how data is transmitted and received over the
I2C bus. It consists of several stages, including the start condition, address frame,
data frames, and stop condition. Below is a detailed breakdown of each
component of the I2C protocol format:
Start Condition:
➢ The start condition signifies the beginning of communication on the I2C
bus.
➢ It is indicated by a transition from HIGH to LOW on the SDA line while the
SCL line is HIGH.
➢ This alerts all connected devices that a communication session is about to
start.
Address Frame:
➢ Following the start condition, the master sends an address frame to
identify the intended slave device.
➢ The address frame consists of a 7-bit or 10-bit address followed by a
read/write bit.
• 7-bit addressing: Most common, where the first 7 bits indicate the
slave address, and the 8th bit indicates the read (1) or write (0)
operation.
• 10-bit addressing: Used for systems with more devices, where the
first 10 bits represent the address.
Acknowledge (ACK) / Not Acknowledge (NACK):
➢ After each byte (address or data) is transmitted, the receiving device must
acknowledge receipt.
➢ ACK: The receiver pulls the SDA line LOW during the acknowledgment
clock pulse.
➢ NACK: The receiver leaves the SDA line HIGH during the acknowledgment
clock pulse, signaling the end of communication or that it cannot receive
further data.
Data Frames:
➢ Data frames are 8-bit bytes transmitted after the address frame.
➢ Each data byte is followed by an ACK/NACK bit from the receiver.
➢ Data can be transmitted by either the master or the slave, depending on
the read/write bit in the address frame.
Stop Condition:
➢ The stop condition signifies the end of communication on the I2C bus.
➢ It is indicated by a transition from LOW to HIGH on the SDA line while the
SCL line is HIGH.
➢ This releases the bus and allows other devices to initiate communication.
Repeated Start Condition:
➢ Sometimes, the master needs to keep control of the bus for another
transfer without releasing it.
➢ The repeated start condition is similar to the start condition but occurs
without a preceding stop condition.
➢ It allows the master to change direction (from write to read or vice versa)
or address another slave device without releasing the bus.
I2C Bus Configuration:
➢ Data Validity: Data on the SDA line must be stable during the HIGH period
of the clock. Data line changes are permitted only when the clock is LOW.
➢ Start and Stop Conditions:
• Start Condition: A HIGH to LOW transition on SDA while SCL is HIGH.
• Stop Condition: A LOW to HIGH transition on SDA while SCL is HIGH.
➢ Byte Format: Each byte (8 bits) transferred on the I2C bus is followed by
an acknowledgment bit (ACK/NACK).
➢ Acknowledge (ACK) and Not Acknowledge (NACK):
• ACK: The receiver pulls the SDA line LOW to indicate successful
reception of a byte.
• NACK: The receiver leaves the SDA line HIGH to indicate
unsuccessful reception or the end of communication.

Importance of Pull-Up Resistors in I2C:

What are Pull-Up Resistors?
Pull-up resistors are resistors connected between a signal line and a positive
voltage supply (Vcc). In the context of the I2C bus, pull-up resistors are
connected to the SDA (Serial Data Line) and SCL (Serial Clock Line) lines to ensure
these lines are pulled to a high logical level when they are not actively being
driven low by any device.
Importance of Pull-Up Resistors in I2C:
➢ Ensuring Proper Bus State: The I2C bus is an open-drain/open-collector
configuration, meaning that devices on the bus can only pull the lines low.
Without pull-up resistors, the lines would float when no device is pulling
them low, leading to undefined logic levels and unreliable
communication.
➢ Defining Idle State: When no communication is occurring on the I2C bus,
the pull-up resistors ensure that both the SDA and SCL lines are in a high
state (idle state). This idle state is necessary for devices to detect the start
condition correctly.
➢ Speed of Signal Transition: The values of the pull-up resistors affect the
speed at which the SDA and SCL lines can transition from low to high.
Lower resistance values lead to faster rise times, which is crucial for high-
speed communication. However, too low a resistance can result in higher
current consumption and potential signal integrity issues.

Clock Synchronization:
➢ When multiple masters are present, clock synchronization ensures all
devices operate at the same clock speed.
➢ Masters may stretch the clock by holding the SCL line LOW to synchronize
slower devices.

I2C in STM32F401RBT6 Microcontroller:

The STM32F401RBT6 microcontroller has built-in support for the I2C protocol
with the following features:
➢ Multi-master capability: Can operate as both master and slave.
➢ Clock generation, Start/Stop generation: Essential for I2C master
operation.
➢ Programmable address detection and dual addressing capability: For I2C
slave operation.
➢ Supports different communication speeds: Standard (up to 100 kHz), Fast
(up to 400 kHz), and up to 1 MHz.
➢ Error flags and status flags: For efficient I2C communication
management.
➢ Interrupt vectors: To handle successful communication and errors.
Interfacing I2C with STM32F401RBT6:
To interface I2C with the STM32F401RBT6 microcontroller:
➢ Initialize the I2C Peripheral: Enable the I2C peripheral and configure the
SDA and SCL pins.
➢ Set I2C Parameters: Configure the speed, address mode, and other
settings.
➢ Handle Data Transmission and Reception: Use I2C functions to send and
receive data between the microcontroller and peripherals.

Applications of I2C:
➢ Sensor Data Acquisition: Interfacing sensors like temperature, humidity,
and pressure sensors.
➢ Memory Access: Communicating with EEPROM and other memory
devices.
➢ Display Control: Controlling LCD and OLED displays.
➢ RTC (Real-Time Clock): Synchronizing time with RTC modules.

Conclusion:
The I2C communication protocol remains a cornerstone of modern embedded
systems, providing a balance of simplicity, flexibility, and efficiency. Its ability to
support multiple devices with just two wires makes it a preferred choice for
many applications, while its robust features ensure reliable and error-free
communication.
Understanding and effectively implementing I2C in microcontrollers like the
STM32F401RBT6 can significantly enhance the capability and performance of
embedded systems, making it a crucial skill for developers in the field. Whether
you are designing sensor networks, managing display interfaces, or
synchronizing real-time clocks, I2C offers a versatile and reliable solution to
meet your communication needs.