UNIT – I INTRODUCTION TO EMBEDDED COMPUTING AND ARM PROCESSORS

PART - A

1. What is an embedded computer system? (Apr/May '11)

Any device that includes a programmable computer but is not itself intended to be a general purpose computer is
called an embedded computer system.

2. Why microprocessor is used in embedded system? (Apr/May '11)

Microprocessors provide a very efficient way to implement an embedded system they also make it easier to design
families of products that can be built to provide various feature sets at different price points.

3. Mention the challenges in embedded computing system design.

How much hardware do we need, How do we meet deadlines, How do we minimize power consumption, How do
we design for upgradability.

4. Mention the reasons that makes embedded computing machines design difficult.

Complex testing, Limited observability and controllability, restricted development environments.

5. State the importance of design methodology.

It allows us to keep a scoreboard on a design, It allows us to develop computer aided design tools, It makes it much
easier for members of a design team to communicate.

6. Mention the major steps in embedded system design process.

Requirements, Specification, Architecture, Components, System Integration.

7. Mention the major goals of embedded system design.

Manufacturing cost, Performance, Power Consumption.

8. Mention the non functional requirements.

Performance, Cost, Physical Size and weight, Power Consumption.

9. List the characteristics of embedded computing (May/Jun '14)

Complex algorithm, User interface, Real-time, Multi rate, Power and energy, manufacturing cost

10. What is the difference between the Harvard and Von-neumann architecture? (May/Jun ’13’14)

HARDWARD VON-NEUMANN

Separate Program and Data memory Common memory for Program and data

Program counter points program memory Program counter holds address in memory of an
instruction

11. Mention the different types of relationships.

Association, Aggregation, Generalization.

12. List the functions of ARM processor in supervisor mode.(Apr/May’14)

The various functions of ARM processor in supervisor modes are: Exception, Prioritization, Vectoring, Traps.
13. How is ARM processor different from other processors?(Nov/Dec ‘12)

ARM is a RISC (Reduced Instruction Set Computing) architecture while other processor being a CISC (Computer
Instruction Set Computing) one.

In the ARM processor, arithmetic and logical operations cannot be perform directly on memory locations, while
other processors allow such operations to directly reference main memory.

14. Enumerate various issues in real time computing. (Nov/Dec ‘13)

The various issues in RT computing is: Real –time Response, Recovering from failures, Working with distributed
architecture, Asynchronous communication, Race condition and timing.

15. What is the purpose of current program status register (CPSR) and Z-bit. (May/Jun’14)

CPSR:It is set automatically during every arithmetic, logical or shifting operations. The top 4 bits of CPSR hold
useful information about the result.

Z-Bit: The zero (Z) bit is set when every bit of the result is zero.

16. Mention the addressing modes of C55x DSP.

Absolute addressing,Direct addressing,Indirect addressing.

17. Define procedure linkage.

The conventions used to pass values into and out of procedures are called procedure linkage.

18. Define CISC.

CISC refers to complex instruction set computers. As the name imply these computers are having a wide variety of
instructions that can perform very complex operations.

19. Define RISC.

RISC refers to reduced instruction set computers. These computers are having very simple instructions which are
also very fewer in number.

20. Differentiate big and little endian byte ordering modes.

In big endian mode the lowest order byte is stored in the highest bit of the word whereas in little endian mode the
lowest order byte is stored in the lowest bit of the word.

21. What is top down design?(Apr/ May’13)

In a top-down approach an overview of the system is formulated, specifying but not detailing any first-level
subsystems. Each subsystem is then refined in yet greater detail, sometimes in many additional subsystem levels,
until the entire specification is reduced to base elements.

22. Write short notes on ARM Processor. (Nov/Dec’13)

ARM–Advanced RISC Machine(Itisan32-bitMicroprocessor).

1)ARM is actually a family of RISC architectures that have been developed over many years. The ARM is a 32-bit
Reduced Instruction Set Computer (RISC) instruction set architecture developed by Arm holdings.

2)ARM processor is mad suitable for Low power application.

23. What are the parameters used to evaluate the CPU performance?(May/Jun’15)

Pipelining and Caching.

24. What are the Instruction set features useful for embedded programming?(May/Jun’13)

Instruction Sets can have a variety of characteristics/features including:

Fixed versus variable length, Addressing modes, Number of operands, Types of operations supported.

25. State the functions of Co-Processor (Nov/De’14)

Co-Processor is an additional computing device which is coupled to the main processor for execution of certain
complex instructions. The Co-Processor does not execute any portion of the program by itself. It comes into
operation only when a coprocessor instruction is executed by the processor.

PART – B

1. Explain in Adetail about the challenges in embedded computing system design.(Apr/May’11)

How much hardware do we need?

How big is the CPU? Memory?

How do we meet our deadlines?

Faster hardware or cleverer software?

How do we minimize power?

Turn off unnecessary logic? Reduce memory accesses?

oes it really work?

Is the specification correct?

Does the implementation meet the spec?

How do we test for real-time characteristics?

How do we test on real data?

How do we work on the system?

Observability, controllability?

What is our development platform?

2. Explain in detail about the embedded system design process.(Apr/May ‘11’15)

A procedure for designing a system.Understanding your methodology helps you ensure you didn’t skip
anything.Compilers, software engineering tools, computer-aided design (CAD) tools, etc., can be used to:help
automate methodology steps;keep track of the methodology itself.

requirements
specification
architecture
Top-down design:
component
design

system
integration
start from most abstract description;

work to most detailed.

Bottom-up design:

work from small components to big system.

Real design uses both techniques.

3. Explain in detail about ARM processor.

Processor and Memory Organization

Different versions of theARM architecture are identified by different numbers. ARM7

is a von Neumann architecture machine, while ARM9 uses a Harvard architecture.

However, this difference is invisible to the assembly language programmer, except

for possible performance differences.

The ARM architecture supports two basic types of data:

■ The standard ARM word is 32 bits long.

■ The word may be divided into four 8-bit bytes.

The other important basic register in the programming model is the cur-

rent program status register (CPSR). This register is set automatically during

every arithmetic, logical, or shifting operation. The top four bits of the CPSR

hold the following useful information about the results of that arithmetic/logical

operation:
■ The negative (N) bit is set when the result is negative in two’s-complement

arithmetic.

■ The zero (Z) bit is set when every bit of the result is zero.

■ The carry (C) bit is set when there is a carry out of the operation.

■ The overflow (V ) bit is set when an arithmetic operation results in an overflow.

4. Explain major levels of abstraction in design process for GPS moving map (Apr/May’14)

GPS search display

renderer
receiver engine

user
database interface

display frame CPU

buffer GPS
receiver

memory panel I/O

5. Explain with necessary coding & examples, how flow of control is changed using branch instruction in
ARM (Apr/May ‘14)

All operations can be performed conditionally, testing CPSR:

EQ, NE, CS, CC, MI, PL, VS, VC, HI, LS, GE, LT, GT, LE

Branch operation:

B #100,Can be performed conditionally.

C:

if (a > b) { x = 5; y = c + d; } else x = c - d;

Assembler:
; compute and test condition

ADR r4,a ; get address for a

LDR r0,[r4] ; get value of a

ADR r4,b ; get address for b

LDR r1,[r4] ; get value for b

CMP r0,r1 ; compare a < b

BGE fblock ; if a >= b, branch to false block

true block

MOV r0,#5 ; generate value for x

ADR r4,x ; get address for x

STR r0,[r4] ; store x

ADR r4,c ; get address for c

LDR r0,[r4] ; get value of c

ADR r4,d ; get address for d

LDR r1,[r4] ; get value of d

ADD r0,r0,r1 ; compute y

ADR r4,y ; get address for y

STR r0,[r4] ; store y

B after ; branch around false block

false block

fblock ADR r4,c ; get address for c

LDR r0,[r4] ; get value of c

ADR r4,d ; get address for d

LDR r1,[r4] ; get value for d

SUB r0,r0,r1 ; compute a-b

ADR r4,x ; get address for x

STR r0,[r4] ; store value of x

6. Explain in detail about the characteristics of embedded computing applications.

Sophisticated functionality.

Real-time operation.

Low manufacturing cost.

Low power.
Designed to tight deadlines by small teams.

Functional complexity

Often have to run sophisticated algorithms or multiple algorithms.

Cell phone, laser printer.

Often provide sophisticated user interfaces.

Non-functional requirements

Many embedded systems are mass-market items that must have low manufacturing costs.

Limited memory, microprocessor power, etc.

Power consumption is critical in battery-powered devices.

Excessive power consumption increases system cost even in wall-powered devices.

7. Explain in detail about memory system mechanisms.

Cache
operation

Many
main
memory
locations
are mapped onto one cache entry.

May have caches for:

instructions;

data;

data + instructions (unified).

Memory access time is no longer deterministic.

Cache hit: required location is in cache.

Cache miss: required location is not in cache.

Working set: set of locations used by program in a time interval.

Cache organizations

Fully-associative: any memory location can be stored anywhere in the cache (almost never implemented).

Direct-mapped: each memory location maps onto exactly one cache entry.

N-way set-associative: each memory location can go into one of n sets.

8. (i). Explain in detail about data operations of ARM processor.(Apr/May ‘11)

Word is 32 bits long.

Word can be divided into four 8-bit bytes.

ARM addresses cam be 32 bits long.

Address refers to byte.

Address 4 starts at byte 4.

Can be configured at power-up as either little- or bit-endian mode.

Logical shift:

fills with zeroes.

Arithmetic shift:

fills with ones.

RRX performs 33-bit rotate, including C bit from CPSR above sign bit.

ii)Explain Structural description in detail. (Apr/May’13)

structural descriptionmean the basic components of the system. The principal

component of an object-oriented design is, naturally enough, the object. An object

includes a set of attributes that define its internal state

. The object

is identified in two ways: It has a unique name, and it is a member of a class. The

name is underlined to show that this is a description of an object and not of a class.
there are several types of relationships that can exist between objects and

classes:

■ Association occurs between objects that communicate with each other but

have no ownership relationship between them.

■ Aggregation describes a complex object made of smaller objects.

■ Composition is a type of aggregation in which the owner does not allow

access to the component objects.

■ Generalization allows us to define one class in terms of another.

 9.

9i). Explain the model train controller with neat sketch. (Apr/May’15)

rcvr motor

power
supply
console

ECC command address header

nam e m odel train controller

purpose control speed of <= 8 m odel
trains
inputs throttle, inertia, em ergency stop,
train #
outputs train control signals
functions set engine speed w. inertia;
em ergency stop
perform ance can update train speed at least
10 tim es/sec
m anufacturing $50
cost
power wall powered
physical console com fortable for 2 hands;
 Voltage moves around the power supply voltage; adds no DC component.

Basic packet format: PSA(sD)+E.

P: preamble = 1111111111.

S: packet start bit = 0.

A: address data byte.

s: data byte start bit.

D: data byte (data payload).

E: packet end bit = 1.

ii)Discuss about formalism for system design

Object-oriented (often abbreviated OO) specification can be seen in two

complementary ways:

■ Object-oriented specification allows a system to be described in a way that

closely models real-world objects and their interactions.

■ Object-oriented specification provides a basic set of primitives that can

be used to describe systems with particular attributes, irrespective of the

relationships of those systems’ components to real-world objects.

Structural Description

By structural description, we mean the basic components of the system; we will

learn how to describe how these components act in the next section. The principal

component of an object-oriented design is, naturally enough, the object. An object

includes a set of attributes that define its internal state. When implemented in

a programming language, these attributes usually become variables or constants

held in a data structure.

Behavioral Description

A signal is an asynchronous occurrence. It is defined in UML by an object that

is labeled as a <<signal>>. The object in the diagram serves as a declaration

of the event’s existence. Because it is an object, a signal may have parameters

that are passed to the signal’s receiver.

■ A call event follows the model of a procedure call in a programming language.

■ A time-out event causes the machine to leave a state after a certain amount

of time. The label tm(time-value) on the edge gives the amount of time after

which the transition occurs.

10. Discuss about the CPU performance and CPU power consumption. (Nov/Dec’13)

Elements of CPU performance

Cycle time.

CPU pipeline.

Memory system.

Performance measures

Latency: time it takes for an instruction to get through the pipeline.

Throughput: number of instructions executed per time period.

Pipelining increases throughput without reducing latency.

ARM pipeline execution

CPU power
consumption

Most
modern
CPUs are
designed
with power
consumption
in mind to
some
degree.

Power vs.
energy:

heat depends on power consumption;

battery life depends on energy consumption.