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1300 IEEE JOURNAL OF SOLID-STATE CIRCUITS, VOL. 37, NO.

10, OCTOBER 2002

A Pixel-Level Automatic Calibration Circuit Scheme


for Capacitive Fingerprint Sensor LSIs
Hiroki Morimura, Member, IEEE, Satoshi Shigematsu, Member, IEEE, Toshishige Shimamura, Member, IEEE,
Katsuyuki Machida, Member, IEEE, and Hakaru Kyuragi

Abstract—We propose a pixel-level automatic calibration circuit


scheme that initializes a capacitive fingerprint sensor LSI to elim-
inate the influence of the surface condition, which is degraded by
dirt during long-time use. The scheme consists of an automatic cal-
ibration circuit for each pixel and a calibration control circuit for
the pixel array. The calibration is executed by adjusting variable
capacitance in each pixel to make the sensor signals of all pixels the
same. The calibration control circuit selects the pixels in parallel,
and calibrates all pixels in a short time. The scheme was applied to
a fingerprint sensor LSI using the 0.5- m CMOS process/sensor
process, and clear fingerprint images were obtained even for a de-
graded surface condition. This confirms that the scheme is effective
for capturing consistent clear images during long-time use.
Index Terms—Calibration, clear fingerprint image, dirt, finger- Fig. 1. Fingerprint sensor chip.
print sensor, pixel, sensing circuit.

from the sensor plate, and outputs a signal that reflects the fin-
I. INTRODUCTION gerprint pattern at that point.
Since the surface of a fingerprint sensor is exposed to capture
U SER AUTHENTICATION by fingerprints is an attractive
way to prevent illegal usage of mobile equipment and se-
cure devices. Recently, capacitive fingerprint sensors using the
a fingerprint image by finger touching, the condition of the
sensor surface changes during long-term use. In other words,
CMOS process have been developed for low-power low-cost the sensor surface becomes dirty in practical use. Gradually,
and small-size fingerprint identification systems [1]–[4]. We a parasitic capacitance is formed between the dirt and the
have developed a fingerprint sensing circuit scheme that has sensor plate, and the sensed capacitance increases as a result.
high sensitivity, a wide dynamic range, and contrast adjust- This means that the output signal from the fingerprint sensor
ment [5], and a grounded (GND)-wall-type sensor fabrication depends on the sensor surface condition. Thus, the change of the
process that offers electrostatic discharge (ESD) protection, surface condition degrades the captured fingerprint images. The
mechanical strength, and contamination protection [6]. Using degraded fingerprint images make accurate user authentication
these techniques, we have achieved a single-chip fingerprint impossible. To achieve accurate authentication, the fingerprint
sensor/identifier [7], [8]. sensor has to capture clear fingerprint images even though the
Fig. 1 shows a top view of our fingerprint sensor chip, and sensor surface condition has changed. Conventional fingerprint
a schematic cross section of one pixel. The fingerprint sensor sensors have no circuit technique that addresses this issue. To
has a pixel array to capture a fingerprint image. Each pixel is solve this problem, we have developed a pixel-level automatic
composed of a sensor plate, a GND wall, and a sensing circuit calibration circuit [9].
covered with a passivation film. The top of the GND wall is ex- This paper describes the pixel-level automatic calibration
posed to the surface of the sensor chip. The principle of finger- circuit scheme, which initializes the sensing characteristics
print sensing is based on the detection of the slight capacitance and eliminates the influence of the sensor surface condition.
between a finger and a sensor plate: A fingerprint pattern is Section II describes the principle of pixel-level calibration.
captured by the detection of the capacitance, which varies with The automatic calibration circuit and calibration control circuit
the pattern of a fingerprint’s ridges and valleys because they are are described in Sections III and IV. Section V evaluates
different distances from the plates. The sensing circuit can de- the effectiveness of this scheme implemented in a fabricated
tect even very small differences in capacitance by discharging fingerprint sensor LSI on fingerprint image capture.

Manuscript received December 18, 2001; revised April 30, 2002. II. PRINCIPLE OF PIXEL-LEVEL CALIBRATION
H. Morimura, S. Shigematsu, and T. Shimamura are with the NTT Lifestyle
and Environmental Technology Laboratories, Atsugi, Kanagawa 243-0198, The principle of pixel-level calibration is shown in Fig. 2,
Japan (e-mail: morimura@aecl.ntt.co.jp). which illustrates a pixel in the initial surface condition and a
K. Machida and H. Kyuragi are with the NTT Telecommunications Energy
Laboratories, Atsugi, Kanagawa 243-0198, Japan. pixel in the changed surface condition. In the initial condition,
Publisher Item Identifier 10.1109/JSSC.2002.803022. all pixels output the same signals when a finger is not in contact
0018-9200/02$17.00 © 2002 IEEE

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MORIMURA et al.: AUTOMATIC CALIBRATION CIRCUIT SCHEME FOR CAPACITIVE FINGERPRINT SENSOR LSIs 1301

(a) (b)
Fig. 2. Principle of pixel-level calibration using variable capacitance. (a) Pixel
in the initial surface condition. (b) Pixel in the changed surface condition due to
dirt.
Fig. 4. Configuration of the automatic calibration circuit.

each pixel makes the sensor signals of all pixels the same. Then,
the fingerprint sensor LSI is initialized for fingerprint sensing.

III. AUTOMATIC CALIBRATION CIRCUIT


A. Circuit Configuration
Fig. 4 shows the automatic calibration circuit configuration.
is realized by capacitors connected in parallel from
to . The control circuit comprises an -bit counter and
a comparison circuit. The connection of to is switched
by the value of the -bit counter. The value of is .
Fig. 3. Pixel architecture.
The is the capacitance value of a unit capacitor. Then, is
expressed as
with the sensor surface [Fig. 2(a)]. During long-term use, how-
ever, the surface becomes dirty and a parasitic capacitance
(2)
is formed between the dirt and the sensor plate [Fig. 2(b)]. The
sensing circuit detects even when there is no finger on the
plate. On the other hand, in the initial surface condition, there is where is the value of the th significant bit in the counter.
no extra capacitance. The output signals from the pixels thus de- Therefore, that varies from 0 to in steps is
pend on the sensor surface condition, and they become different realized.
when the condition of the sensor surface changes. To eliminate The switches in the circuit are initially open, and are
the influence of the sensor surface condition, we added a vari- closed successively as the counter is incremented by pulses from
able capacitance to each pixel, and in the figure. When the comparison circuit. The comparison circuit compares the
and are adjusted such that sensor signal with a reference signal. When the sensor signal is
smaller than the reference signal, the comparison circuit outputs
(1) a pulse signal and the counter is incremented. When the sensor
the signals output from the pixels in the initial condition and the signal becomes larger than the reference signal, the comparison
changed condition become the same because the sensed capaci- circuit does not output a pulse signal and stops incrementing the
tances by the sensing circuits are the same. This is the principle counter automatically. Thus, the automatic calibration circuit is
of the calibration. That is, the sensing circuits are calibrated by realized by this circuit configuration.
adjusting the variable capacitance, and all pixels are initialized
to make the output signals the same. B. Operation
Fig. 3 shows the pixel architecture for the pixel-level auto- The automatic calibration operation is as shown in Fig. 5. The
matic calibration circuit scheme. Each pixel includes a sensing horizontal axis is the number of calibration steps, and the ver-
circuit and an automatic calibration circuit. The calibration cir- tical axis is the signal level of a sensing circuit. Before calibra-
cuit is composed of variable capacitance and a control tion, the values of in all pixels are set to the minimum by
circuit. For the calibration of the sensing circuit, the control clearing the counter at a start condition, and the sensor signals
circuit adjusts by comparing the sensor signal output from of all pixels are different due to the surface condition. Here, the
the sensing circuit with a reference signal. To eliminate the in- sensor signals of three pixels, A, B, and C, are explained. At
fluence of the sensor surface condition on the sensor signals, the the start condition, the signals of pixels A, B, and C are dif-
sensing circuit is calibrated to make the sensor signal the same ferent from each other and are smaller than the level of the refer-
as the reference signal automatically. ence signal. After the first calibration, the sensor signals become
The calibration operation is executed when a finger is not larger than those for the previous sensing. This is because all
touching the sensor surface. The automatic calibration circuit in of the counters in the pixels are incremented and, from (2), the

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1302 IEEE JOURNAL OF SOLID-STATE CIRCUITS, VOL. 37, NO. 10, OCTOBER 2002

Fig. 6. Variable capacitance Cv control circuit.

Fig. 5. Operation of the automatic calibration.

value of increases. After the second calibration, the signal of


pixel A becomes the same as (precisely speaking, a little larger
than) the reference. Then, the incrementing of the counter in
pixel A is automatically stopped after the third calibration and
the sensor signal does not increase. As for pixels B and C, the
sensor signals increase until they become larger than the refer-
ence signal. The calibration is repeated times for all pixels.
Finally, the sensor signals of pixels A, B, and C become almost
the same as the reference signal, which is the initialized condi-
tion. Thus, the sensing circuits of all pixels are calibrated.
Therefore, the automatic calibration circuit enables initial-
ization of the fingerprint sensor LSI by calibrating the sensing
circuit in each pixel.

C. Circuit Techniques to Reduce Area


The pixel area has to be about 50 m square since the dis-
tance between ridges and valleys in a fingerprint pattern is of
the order of a hundred micrometers. Thus, the layout area of
the automatic calibration circuit has to be small. Though a finer
CMOS process would be useful in reducing the layout area, it
Fig. 7. Architecture of the calibration control circuit.
would increase the cost. To reduce the area of the calibration
circuit without a cost increase, we devised a control circuit
Therefore, the area of the automatic calibration circuit
with a counter based on a RAM-type latch and a NAND compar-
is reduced because the control circuit is composed of a
ison circuit.
counter based on a RAM-type latch and a NAND circuit as the
Fig. 6 shows the control circuit. For the counter, we used a
comparison circuit.
RAM-type latch because a conventional D-flip-flop-based reg-
ister is not suitable due to its large area. The RAM-type latch can
use a minimum gate-width transistor, which is used in a SRAM IV. CALIBRATION CONTROL CIRCUIT
cell. Accordingly, the layout area of the RAM-type latch can be A calibration control circuit was devised to operate the auto-
reduced to almost the size of the SRAM cell. matic calibration circuit. Fig. 7 shows the relationship between
A conventional comparison circuit is input with analog the pixel array and the calibration control circuit. The pixel array
voltage signals. Thus, it needs transistors with large gate length is connected to select lines SL1 to SLp, which are selected by the
to obtain stable operation and a switch transistor to reduce the calibration control circuit according to the address signals. The
sink current. This makes the area large. Using the NAND circuit outputs of the pixels are connected to data lines DL1 to DLq.
for the comparison circuit reduces the area increase because the The reference signal is input to all pixels. The sensing circuits
minimum gate-length transistors can be used and no additional are calibrated in the pixels activated by the select lines.
transistor is needed for power reduction. The sensing circuit we The calibration control circuit is designed for both calibra-
developed enables us to use a NAND circuit as the comparison tion and fingerprint sensing to suppress the area. In the sensing
circuit because the sensing circuit outputs a digital voltage operation, it activates one select line according to the address
signal [5]. signals. The activated pixels detect the capacitance between the

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MORIMURA et al.: AUTOMATIC CALIBRATION CIRCUIT SCHEME FOR CAPACITIVE FINGERPRINT SENSOR LSIs 1303

Fig. 10. Sensing circuit with the automatic calibration circuit.

Fig. 8. Calibration control circuit.

Fig. 11. Timing chart of the calibration circuit.

To calibrate all pixels, the operation is repeated times


in each pixel as described in Section III-B. Thus, the block is
(a) designed to contain select lines. This enables us to select
select lines in the calibration mode, the same number as the
repeat times of calibration. Fig. 9 shows the waveforms of the
select lines in one block in fingerprint sensing and calibration
modes. In the sensing mode, only one select line is selected at a
time. In the calibration mode, select lines are selected due
to the signal-inverting circuit. Thus, the time of the calibration
for one block is reduced to . There is no problem due
to the parallel selection because the sensor signals output from
(b)
the pixel are connected to the data line by the wired OR and are
Fig. 9. Waveforms of select line (a) in the sensing mode and (b) in the not conflicted.
calibration mode.
Therefore, the calibration control circuit calibrates all the
pixels in a short time by the parallel select line selection, and
finger and the sensor plates in the pixels, and output the sensor suppresses the area increase by operating in fingerprint sensing
signals to all data lines. In the calibration operation, it selects and calibration modes.
select lines in parallel for fast calibration. A mode signal deter-
mines whether the operation mode is sensing or calibration. V. EXPERIMENTAL RESULTS
Fig. 8 shows the configuration of the calibration control
circuit, which is based on an address decoder. It features some A. Sensing Circuit With Calibration Circuit
blocks that include a signal-inverting circuit. The signal-in- To evaluate the proposed scheme, a fingerprint sensor LSI
verting circuit is composed of exclusive-OR (E-OR) gates. In was fabricated with the 0.5- m CMOS process and our sensor
the sensing mode, the mode signal is at a low level, and the process [6]. Fig. 10 shows the sensing circuit with the automatic
E-OR gates transfer the decoded signals through the select lines. calibration circuit. The sensing circuit is composed of a sense
Thus, only one select line is activated according to the address amplifier and voltage–time transform circuit [5]. The sensing
signals. In the calibration mode, the mode signal becomes high. circuit amplifies to , and converts to a time-
In a block selected by a block-select signal, the E-OR gates variant signal for the sensor signal. This enables the sensor
invert the decoded signals. Thus, all the select lines are selected signal to be compared with the reference pulse signal. in the
except the one activated according to the address signals. calibration circuit is connected to node N1. is the parasitic

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1304 IEEE JOURNAL OF SOLID-STATE CIRCUITS, VOL. 37, NO. 10, OCTOBER 2002

TABLE I
CHIP CHARACTERISTICS

Fig. 12. Photograph of the fingerprint sensor LSI.

Fig. 14. Photograph of the sensor surface with pencil marks.

Fig. 13. Pixel layout.

capacitance of the sensor plate, and is the capacitance for


offset adjustment. and are made of MOS capacitance.
Fig. 11 shows the timing chart of the calibration circuit. The
(a) (b)
reference signal is a pulse that determines the pulsewidth .
The calibration circuit compares the sensor signal with the ref-
erence pulse signal. That is, it compares with . When
, a pulse is output and the counter is incremented.
In the first calibration step, is shorter than . The com-
parison circuit outputs a pulse with a width of , which
increments the counter from 000 to 001. In the second step,
is still shorter than . Thus, another pulse is output, and the
counter changes to 010. In the third step, is larger than . (c) (d)
Thus, the comparison circuit does not output a pulse. That is,
Fig. 15. Effectiveness of calibration. (a) Image before calibration without a
when is greater than or equal to , the generation of pulses finger touch. (b) Image before calibration with a finger touch. (c) Image after
stops automatically, and the counter remains the same. In this calibration without a finger touch. (d) Image after calibration with a finger touch.
way, the counter of each pixel is set to make approximately
equal to . almost half that area. The layout size of the calibration circuit
is reduced to 1/3 by using RAM-type latches. The sensing and
B. Evaluation With Fabricated Fingerprint Sensor Chip calibration time are 300 ms. The characteristics of the chip are
Fig. 12 is a microphotograph of the fingerprint sensor LSI. summarized in Table I.
The size is 15 15 mm . The area of the sensor array is To evaluate the effectiveness of calibration on a captured
12.8 11.2 mm . Each pixel is 50 m square. The number image, we marked the sensor surface with a pencil. Fig. 14
of pixels is 256 224. The output signal of the sensor LSI is shows a photograph of the sensor surface. The carbon from
256 grayscale. The counter in the control circuit is 3 bit. the pencil simulates the dirty condition. Before calibration, the
Thus, the calibration has an eight-level adjustment. The layout image of the carbon is captured as shown in Fig. 15(a). This is
of a pixel is shown in Fig. 13. The calibration circuit occupies because the carbon on the surface forms capacitance against the

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MORIMURA et al.: AUTOMATIC CALIBRATION CIRCUIT SCHEME FOR CAPACITIVE FINGERPRINT SENSOR LSIs 1305

sensor plate. As a result, the fingerprint image is degraded by the chip, and Y. Tanabe, T. Kumazaki, K. Kudou, and M. Yano
the dirt as shown in Fig. 15(b). In conventional capacitive fin- for the fabrication of the chip.
gerprint sensors without the GND wall, fingerprint images are
also degraded due to the dirt. This decreases the accuracy of the REFERENCES
identification. On the other hand, when the fingerprint sensor [1] M. Tartagni and R. Guerrieri, “A fingerprint sensor based on the feed-
chip is calibrated, the pencil marks disappear from the image as back capacitive sensing scheme,” IEEE J. Solid-State Circuits, vol. 33,
shown in Fig. 15(c). This is because the automatic calibration pp. 133–142, Jan. 1998.
[2] D. Inglis, L. Manchanda, R. Comizzoli, A. Dickinson, E. Martin, S.
circuit adjusts the sensor signal of each pixel. The captured Mendis, P. Silverman, G. Weber, B. Ackland, and L. O’Gorman, “A ro-
fingerprint image after calibration is shown in Fig. 15(d). The bust, 1.8 V 250 W direct-contact 500 dpi fingerprint sensor,” in IEEE
influence of the dirt on the image is completely eliminated and Int. Solid-State Circuits Conf. (ISSCC) Dig. Tech. Papers, Feb. 1998, pp.
284–285.
a clear image is obtained. Even though the dynamic range of [3] J. Lee, D. Min, J. Kim, and W. Kim, “A 600-dpi capacitive fingerprint
the output signal of the sensing circuit is reduced due to sensor chip and image-synthesis technique,” IEEE J. Solid-State Cir-
the calibration, there is no problem in practical use as shown cuits, vol. 34, pp. 469–475, Apr. 1999.
[4] S. Jung, R. Thewes, T. Scheiter, K. Goser, and W. Weber, “A low-power
in Fig. 15(d). When the dirt is water or oil, the same results and high-performance CMOS fingerprint sensing and encoding archi-
are obtained. This confirms the effectiveness of the automatic tecture,” IEEE J. Solid-State Circuits, vol. 34, pp. 978–984, July 1999.
calibration circuit scheme on fingerprint sensing. [5] H. Morimura, S. Shigematsu, and K. Machida, “A novel sensor cell ar-
chitecture and sensing circuit scheme for capacitive fingerprint sensors,”
IEEE J. Solid-State Circuits, vol. 35, pp. 724–731, May 2000.
[6] K. Machida, S. Shigematsu, H. Morimura, Y. Tanabe, N. Sato, N.
VI. SUMMARY Shimoyama, T. Kumazaki, K. Kudou, M. Yano, and H. Kyuragi, “A
novel semiconductor capacitive sensor for a single-chip fingerprint
We proposed a pixel-level automatic calibration circuit sensor/identifier LSI,” IEEE Trans. Electron. Devices, vol. 48, pp.
scheme for a capacitive fingerprint sensor LSI. This scheme 2273–2278, Oct. 2001.
can initialize the sensing circuits in the sensor LSI to eliminate [7] S. Shigematsu, H. Morimura, Y. Tanabe, T. Adachi, and K. Machida, “A
single-chip fingerprint sensor and identifier,” IEEE J. Solid-State Cir-
the influence of the surface condition, such as dirt. The scheme cuits, vol. 34, pp. 1852–1859, Dec. 1999.
features an automatic calibration circuit and a calibration [8] H. Morimura, S. Shigematsu, T. Shimamura, K. Machida, and H.
control circuit. Each pixel includes the automatic calibration Kyuragi, “A single-chip fingerprint sensor/identifier LSI,” AWAD, pp.
243–250, July 2001.
circuit for pixel-level calibration, and the calibration control [9] , “A pixel-level automatic calibration circuit scheme for sensing
circuit operates the automatic calibration circuits in the pixel initialization of a capacitive fingerprint sensor LSI,” in Symp. VLSI Cir-
array. cuits Dig. Tech. Papers, June 2001, pp. 171–174.

The automatic calibration circuit is composed of variable ca-


pacitance and a control circuit. The principle of the cal-
ibration is that the control circuit adjusts the value of Hiroki Morimura (M’96) was born in Saitama,
Japan, on January 9, 1968. He received the B.E.
to make the sensor signals of all pixels the same as the initial- degree in physical electronics and the M.E. degree
ized condition when a finger is not touching the sensor surface. in applied electronics from the Tokyo Institute
is realized by capacitors connected in parallel. The value of Technology, Tokyo, Japan, in 1991 and 1993,
respectively.
of is adjusted by switching the connection of the capacitor In 1993, he joined Nippon Telegraph and
with the value of the counter in the control circuit. The Telephone Corporation (NTT), Tokyo. He is
control circuit is composed of a counter based on a RAM-type currently with NTT Lifestyle and Environmental
Technology Laboratories, Kanagawa, Japan. He
latch and a NAND comparison circuit to reduce the layout area. has been engaged in the research and development
The calibration control circuit is based on an address decoder, of low-voltage low-power SRAM circuits. He is currently doing research on
and includes a signal-inverting circuit. It selects the select lines sensing circuits for CMOS fingerprint sensors and developing single-chip
fingerprint sensor/identifier LSIs for portable equipment.
in parallel to calibrate all the pixels quickly, and causes no area Mr. Morimura is a member of the Institute of Electronics, Information, and
increase because it is shared with the control circuit for the fin- Communication Engineers of Japan.
gerprint sensing operation.
A capacitive fingerprint sensor LSI was fabricated using the
0.5- m CMOS process and our sensor process to evaluate the Satoshi Shigematsu (M’93) was born in Tokyo,
proposed scheme. The influence of the sensor surface condition Japan, on August 2, 1967. He received the B.S. and
on the captured image was eliminated by initialization of the M.E. degrees in system engineering from Tokyo
Denki University, Tokyo, Japan, in 1990 and 1992,
sensor LSI, and a clear fingerprint images was obtained. In respectively.
conclusion, the proposed scheme is effective for capturing In 1992, he joined Nippon Telegraph and Tele-
consistent clear images in practical use, and overcomes the phone Corporation (NTT), Tokyo, Japan, where he
has been engaged in the research and development
problem of the degradation of the sensor surface’s condition of low-voltage low-power CMOS circuits. He is
during long-term use. currently with NTT Lifestyle and Environmental
Technology Laboratories, Kanagawa, Japan. His
research interests include biometrics sensor technology and low-power and
ACKNOWLEDGMENT high-speed circuit design techniques. He is currently doing research on parallel
processing circuits for CMOS fingerprint identifier and developing single-chip
The authors would like to thank T. Ogura, J. Yamada, fingerprint sensor and identifier LSIs and user authentication systems.
Mr. Shigematsu is a member of the Institute of Electronics, Information, and
S. Konaka, and Y. Okazaki for their encouragement and Communication Engineers of Japan and the Information Processing Society of
support, K. Tokunaga, K. Iizuka, and H. Kiya for the design of Japan.

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1306 IEEE JOURNAL OF SOLID-STATE CIRCUITS, VOL. 37, NO. 10, OCTOBER 2002

Toshishige Shimamura (M’01) was born in Kana- Hakaru Kyuragi was born in Fukuoka, Japan, on
gawa, Japan, on November 30, 1972. He received the October 4, 1954. He received the B.E., M.E., and Dr.
B.E. degree in physical electronics and the M.E. de- Eng. degrees in electronic engineering from Kyoto
gree in advanced applied electronics from the Tokyo University, Kyoto, Japan, in 1978, 1980, and 2000,
Institute of Technology, Tokyo, Japan, in 1995 and respectively.
1997, respectively. Since he joined the Nippon Telegraph and
In 1997, he joined Nippon Telegraph and Tele- Telephone Public Corporation (NTT), Tokyo, Japan,
phone Corporation (NTT), Tokyo, Japan, where in 1980, he has been involved in the research and
he has been engaged in the research and develop- development of Si CMOS process technology,
ment of low-voltage low-power CMOS circuits. synchrotron radiation-excited processes, and the
He is currently doing research on analog-circuit application of Si-based technology to fingerprint
design, testing, and reliability for CMOS fingerprint sensors, and developing sensor, MEMS and millimeter-wave component module. He is currently
single-chip fingerprint sensor/identifier LSIs. an Executive Manager in the Low-Energy Electronics Laboratory, NTT
Mr. Shimamura is a member of the Institute of Electronics, Information, and Telecommunications Energy Laboratories, Atsugi, Kanagawa, Japan.
Communication Engineers of Japan. Dr. Kyuragi is a member of the Japan Society of Applied Physics and the
Institute of Electronics, Information, and Communication Engineers.

Katsuyuki Machida (M’99) was born in Nagasaki,


Japan, on April 16, 1954. He received the B.E., M.E.,
and Dr. Eng. degrees in electronics engineering from
the Kyushu Institute of Technology, Kitakyusyu,
Japan, in 1979, 1981, and 1995, respectively.
In 1981, he joined the Musashino Electrical Com-
munication Laboratory, Nippon Telegraph and Tele-
phone Public Corporation (NTT), Musashino, Tokyo,
Japan. Since then, he has been engaged in research
on ECR plasma CVD and the development of LSI
process and manufacturing technologies. He is cur-
rently a Senior Research Engineer, Supervisor, with the NTT Telecommunica-
tions Energy Laboratories, Atsugi, Kanagawa, Japan. He is currently engaged in
research and development on the material and manufacturing technologies for
MEMS.
Dr. Machida is a member of the Japan Society of Applied Physics.

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