Digital Logic Design

(EC 104)

Dr. Vivek Garg

Department of Electronics Engineering
S. V. National Institute of Technology (SVNIT)
Surat

email: vivekg@eced.svnit.ac.in; vivekgarg0101@gmail.com

 Course Outline

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 Course Outline

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 Course Text and Materials

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 Digital systems

• Digital system: A sequential • Modular approach of digital

logic system with FFs and
gates.
• Sequential circuits: specified
by state table.
• To describe a large digital
system with state table is
very difficult, if not
impossible.
design.
– System partitioned into modular
subsystems performing some
functional tasks.
• Modules:
– Registers, counters, decoder,
multiplexers, arithmetic
elements and control logic.
– Interconnected with common
data and control paths to form
digital computer system.
 Digital systems

• Interconnection of digital functions to form digital system

module cannot be described using combinational or sequential
logic techniques.
• A higher-level mathematical model notation is required.
• Register-Transfer logic fulfill this.
• Registers are the primitive components in the digital system.
• Information flow and processing tasks on the data stored in the
registers.
• Uses a set of expressions and statements.
• Provides necessary tool for specifying prescribed set of
interconnections between various digital functions.
 Description of Operation of a Digital system

Operation of a digital system described by specifying.

✓ Set of registers in the system and their functions.

✓ Binary coded information stored in register.

✓ Operations performed on information stored in registers.

✓ Control functions that initiate the sequence of operations.

 Register

• Register in Register-transfer logic (RTL) encompasses

• All types of registers such as
• Shift register
• Counters
• Memory units.
• Counter: A register whose function is to increment by 1
information stored within it.
• Memory unit: Collection of registers where
information can be stored.
• FF standing alone is 1-bit register.
• FF and associated gates of any sequential circuit are
called a register in this designation.
 Binary Information in Registers

Binary information in registers may be

• Binary Numbers
• Binary coded decimal numbers.
• Alphanumeric characters.
• Control information
• Any binary coded information.
Operations performed on data stored in registers
depend on type of data.
• Numbers manipulated with arithmetic operations.
• Control information is manipulated with logic
operations (setting and clearing specified bits in register)
 Micro-operations
• Micro-operations: Operations performed on data stored in
registers.
• Elementary operation
• Performed in parallel during one clock pulse period.
• Eg: shift, count, add, clear and load.
• A counter with parallel load: Performs Micro-operations-
increment and load.
• Bidirectional shift register: Performs shift-right and shift-
left Micro-operations.
• Binary parallel adder: Add Micro-operations on contents of
2 registers that hold binary numbers.
• Micro-operation:
• Requires one clock pulse for execution if operation is done in
parallel.
• Requires: number of pulses= word time in serial computers.
 Control functions

• Control functions
• Initiate the sequence of operations
• Consist of timing signals that sequence the operations one at a
time.
• Binary variable
• One binary state initiates an operation.
• Other binary state inhibits the operation.

• Results of previous operations also determine the state

of control functions.
 Register-Transfer Language or Computer
Hardware Description Language

• To be described is simple.
• However, no standard symbology exists for a
register-transfer language (RTL). (different sources
different conventions)

• Statement in RTL consists

• Control function: Specifies the control condition and
timing sequence for executing listed micro-operations.
• List of micro-operations:
• Micro-operations specify the elementary operations to be
performed on information stored in registers.
 Register Transfer Logic
Arithmetic, Logic and Shift Micro operations

• The operation of digital are described by specifying:

• Register: Shift Register, Counter, and memory units.

• Binary Information: Binary number, Binary Coded Decimal, Control Information,
Alpha Numeric Number, etc.
• The operation performed on the data stored in the registers are called as micro
operations. Ex, Add, Shift Left, Shift Right,…
• Control Functions: that initiate the sequence of operations consist of timing signals that
sequence the operations one at a time.

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 Types of Micro-operations
• Inter-register transfer micro-operations
• Do not change the information content
• Binary information moves from one register to another.
• Arithmetic micro-operations
• Perform arithmetic on numbers stored in registers.
• Logic micro-operations
• Perform operations such as AND or OR on individual
pairs of bits stored in registers.
• Shift micro-operations
• Specify operations for shift registers.
 Binary Information types

• Numerical data
• Binary numbers or binary-coded decimal numbers
• Used in arithmetic computations.
• Non-numerical data
• Alphanumeric characters or other binary-coded symbols
used for special applications.
• Instruction codes, Addresses and other control
information
• used to specify data processing requirements in the system.
 Inter-register Transfer

• Registers
• designated by capital letters to denote the function of the
register.
• Eg: MAR for memory address register in memory unit.
• Other designations: A, B, R1, R2, IR etc.

• Cells or FFs in n-bit register

• numbered in sequence from 1 to n (or 0 to n-1)
• Starting either from the left or the right.
 Block diagrams of registers

• 4 different ways to represent a register.

• Can be specified in RTL with a declaration statement as
follows.
DECLARE REGISTER: A(8), MBR(12), PC(16)
DECLARE SUBREGISTER: PC(L)=PC(1-8), PC(H)=PC(9-16)
In text, Register is represented by block diagrams.
 Information transfer b/w registers

𝐴←𝐵
• Denotes transfer of contents of B into A.
• Replacement of contents of A.
• Contents of B do not change.

• Control function
• Condition that determines when transfer is to occur.
• Boolean function (equal to 1 or 0)
• Terminated with a colon
𝑥 ′ 𝑇1 : 𝐴 ← 𝐵
Symbolizes: Transfer be executed by hardware only when
𝑥 ′ 𝑇1 = 1
 Hardware implementation

𝑥 ′ 𝑇1 : 𝐴 ← 𝐵

• Control unit that generates timing variable T1 is

synchronized to the clock pulses applied to A.
• Control function stays on for one clock pulse when T1
is 1.
• Transfer occurs during the next transition of clock
pulse.
 Symbols for Register Transfer Logic

• 𝑇3 : 𝐴 ← 𝐵, 𝐵←𝐴
• Swaps the contents of A and B during the same clock pulse.
• Possible in registers with Master-slave or edge-triggered FFs.
• M designates a memory word, register inside the square
brackets provides the address for memory.
 Information from 2 sources
𝑇1 : 𝐶 ← 𝐴
𝑇5 : 𝐶 ← 𝐵
• Connection of 2 sources to same destination requires a
multiplexer circuit to select between 2 possible paths.

Multiplexer and load i/p of C enabled

when T1 or T5 occurs
 Transfer among three registers

• 6 data paths
• Each register requires a multiplexer to select b/w 2
sources.
• If each register has n FFs
• 6n lines and 3 multiplexers.
 Transfer through one common line

• One transfer at a time.

• O/p and i/p of each FF connected to a common line.
• Switches normally open.
• Transfer from F1 to F3:
• If S1, S2, S3 are connected to o/p of FFs and S4, S5, S6
connected to i/ps
• Registers with n FFs requires n common lines.
Bus system for 4 registers

• Multiplexer
• Selects source register for bus.
• n bits n multiplexers (n-line bus).
• Decoder
• Selects destination register to
transfer information from source.
• 𝐶←𝐴
• Select A for bus (Select source=00)
• Select C for destination
(select destination= 10 ,
decoder enable=0 )
 Memory Transfer(with MAR)

• Read operation
• 𝑅: 𝑀𝐵𝑅 ← 𝑀
• R is the control function that initiates Read operation.
• M is memory register specified by MAR.
• Write operation
• 𝑊: 𝑀 ← 𝑀𝐵𝑅
• W is the control function that initiates the Write operation.
Memory unit that communicate with multiple
registers

• Address to the memory unit

comes from an address bus.
• 4 registers connected to this
bus.
• O/p of memory can go to one of
4 registers (selected by
decoder).
• Data bus: Data i/ps to memory
Memory unit that communicate with multiple
registers

• Write operation
• 𝑊: 𝑀[𝐴1] ← 𝐵2

• A1 specifies the address.

• Required selection i/ps for 2
Multiplexers implied.
• Multiplexers form the address
and data buses.
Memory unit that communicate with multiple
registers

• Read operation
• R: 𝐵0 ← 𝑀[𝐴3]

• A3 specifies the address.

• Required selection i/ps for
Multiplexer and decoder implied.
• Multiplexer for the address and
decoder for destination register
selection.
 Register Transfer Logic
Arithmetic Micro operations

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 Register Transfer Logic
Logic Micro operations

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 Register Transfer Logic
Shift Micro operations

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 Register Transfer Logic
Conditional Control Statements

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 Signed Binary Numbers
• In ordinary arithmetic negative value is indicated by a
minus sign.
• Due to hardware limitations, computers must represent the
sign too using ‘0’ or ‘1’.
• Signed-Magnitude system:
• MSB represents the sign.
• 0 for positive and 1 for negative
• Eg: Positive 12 is 01100 and negative 12 is 11100.
• In implementing the signed-magnitude addition and
subtraction for n-bit numbers, the single sign bit and n-1
magnitude bits are processed separately.
• Magnitude bits are processed as unsigned binary numbers.
• Subtraction thus involves correction step.
 Signed Complement system
• Avoids the correction step.
• A negative number is indicated by its complement.
• A signed positive number starts with a ‘0’ in the
leftmost position.
• The complements starts with ‘1’, indicating a negative
number.
• 2’s complement is most common.
• Eg: 12 with 8 bits
• +12: 00001100
• -12: 11110100
Singed Magnitude vs Signed complement

Positive numbers are identical and have ‘0’

in the leftmost position.
Signed Magnitude: 2 zeros, 7 positive and
7 negative terms
Signed complement: 1 zero, 7 positive and
8 negative terms.
Signed magnitude used in ordinary
arithmetic.
Signed complement is normally used in
computers to avoid the separate handling of
sign and correction.
 Signed binary Addition and Subtraction

• In signed magnitude system (Minuend: M, Subtrahend:

N)
• If the signs are same then, add the two magnitudes and give
the sign of M

• If the signs are different then, subtract magnitude of N from

M. The presence or absence of an end borrow determines the
sign.

• 2’s complement taken if borrow is present

• Eg: 0 0111 – 0 1000

 Signed Compliment System

• Take the 2’s complement of the subtrahend (N) and add the two numbers,
including the sign bit.
• ±A − +B = ±A + −B
• ±A − −B = ±A + (+B)
Signed Compliment System
Signed Compliment System
 Register Transfer Logic
Fixed Point Data
• Signed Binary Number

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 Register Transfer Logic
Fixed Point Data

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 Overflow
• To obtain the correct answer when adding and subtracting, ensure
that the result has sufficient number of bits to accommodate the sum.
• If the sum of two n-bit number results in a n+1 bit number, an
overflow occurs.
• Overflow is a problem in computers as the number of bits to
represent a number is fixed.
• A result which exceeds the number of bits cannot be accommodated.
• Computers detect and signal the occurrence of overflow.
• Overflow condition may be handled automatically by interrupting
the execution of the program and taking special action. Or overflow
condition can be monitored using software.
• In unsigned addition overflow is indicated by the carryout of MSB.
• In unsigned subtraction the magnitude of the result is always less
than or equal to the larger of the original numbers: overflow is
impossible.
 Overflow in signed complementary numbers

• In signed 2s complement numbers, the MSB indicates the

sign.
• When two numbers are added, sign bit is treated as a part
of the number.
• An end carry of 1 does not necessarily indicate overflow.
• Overflow cannot occur if a positive number is added to a
negative number.
• An overflow can occur if both numbers have the same
sign.
Addition of signed-2’s complement numbers

• T: A←A + B, V ← Cn (xor) Cn + l
 Arithmetic Shifts

• An arithmetic shift is a micro-operation that shifts a

signed binary number to the left or right.
• Arithmetic shift-left multiplies a signed binary number
by 2.
• Arithmetic shift-right divides the number by 2.
• Arithmetic shifts must leave the sign unchanged.
 Arithmetic Right Shift (divide by 2)

• Binary fixed-point numbers can be represented in 3

different ways
• shifting the number stored in a register depends on the
representation.
• Sign magnitude: A(N) ← shr A(N), An - 1 ← 0
• Sign-1’s or sign-2’s complement:
• A ← shr A, A(A) ← A(S)
 Register Transfer Logic
Arithmetic Shift

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 Register Transfer Logic
Arithmetic Shift

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 Register Transfer Logic
Floating Point Data

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 Register Transfer Logic
Floating Point Data

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 Non-numeric data

• Computer can function as a character-string-manipulating

machine.
• character string: finite sequence of characters written one
after another.
• Characters are represented in computer registers by a binary
code.
• Operations mostly done on non-numerical data are
transfers, logic, shifts, and control decisions
 Non-numeric data
OR micro-operation for setting

AND micro-operation for resetting

Masking
 AND followed by OR for editing

• Masking

• Inserting
XOR micro-operation for complementing

XOR micro-operation for clearing

Checking of individual bits

• Shift registers can be used to check all the bits in a

register.
• Left shift the MSB to the carry FF.
Packing and unpacking using shift micro-
operations

• Binary information available in a register during

logical operations is called a logical word.
 Types of digital systems based on micro-operations

• Internal organization of a digital system is defined by

• registers it employs
• Sequence of micro-operations it performs on data stored in the
registers.
• special-purpose digital system
• the sequence of micro-operations is fixed.
• system performs the same specific task over and over again.
• general-purpose digital system
• can execute various operations.
• can be instructed to do specific sequence of operations.
• User of a computer can control the process by means of a
program,
• set of instructions that specify the operations, operands, and the
sequence in which processing has to occur.
 Instruction codes
• Instruction code is a group of bits that tell the computer
to perform a specific operation.
• Two parts:
• operation code: group of bits that define an operation such
as add, subtract, multiply, shift, and complement.
• Number of bits required for the operation code is a function of the
total number of operations used.
• Designer assigns a bit combination (a code) to each operation.
• Data
• specified explicitly if the instruction code contains special bits for its
identification.
• specified implicitly if it is included as part of the definition of the
operation
 Register Transfer Logic
Instruction Code and Design of Simple Computer

• An instruction code is a group of bits that tell the computer to perform a specific operation.

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 Part (a)

• Operation code which implies a register in the

processor unit.
• used to specify operations such as
• “clear a processor register,” or
• “complement a register,” or
• “transfer the contents of one register to a second
register.”
 Part (b)

• Operation code followed by an operand.

• Operand follows immediately after the operation-
code part of the instruction.
• used to specify operations such as
• “add the operand to the present contents of a register” or
• “transfer the operand to a processor register,” or
• it can specify any other operation to be done between
the contents of a register and the given operand.
 Part (c)

• Similar to the one in (b) except that the operand must

be extracted from memory at the location specified by
the address part of the instruction.
Memory representation of Instructions
 Operation vs Micro-operation

• An operation is specified by an instruction stored in

computer memory.
• It is a binary code that tells the computer to perform a
specific operation.
• The control unit receives the instruction from memory and
interprets the operation-code bits.
• It then issues a sequence of control functions that perform
micro-operations in internal computer registers.
• micro-operations
• are needed for the hardware implementation of the specified
operation code.
• is an elementary operation which is constrained by the available
hardware inside the computer.
 Macro-operations vs Micro-operations

• Macro-operation: A statement that requires a sequence of

micro-operations for its implementation
• A statement in the register-transfer method of notation
that defines an instruction is a macro-operation
statement.
• If the statement can be executed with a single control
function, it represents a micro-operation.
• If the hardware execution of the statement requires two
or more control functions, the statement is taken to be a
macro-operation.
• Knowledge of the hardware constraints of the system
needed for differentiating micro-operation and macro-
operation.
Example: 𝐴 ← 𝑜𝑝𝑒𝑟𝑎𝑛𝑑(macro-operation)

• To execute the instruction, the control unit must issue

control functions for the following sequence of micro-
operations:
• 1. Read the operation code from address 35.
• 2. Transfer the operation code to a control register.
• 3. Control decodes the operation code - recognizes it as an
immediate operand instruction, and reads the operand from
address 36.
• 4. Operand read from memory is transferred into A.
 Uses of Register Transfer method

• 1. To define computer instructions concisely by

macro-operation statements.
• without being concerned with specific hardware
implementation.
• 2. To define the internal organization of digital
systems by control functions and micro-operations.
• 3. To design a digital system by specifying the
hardware components and their interconnections.
 Register Transfer Logic
Design of Simple Computer

• consists of
• a memory unit:
• 256 words of 8 bits each
• Instructions and data are stored in the
memory unit,
• seven registers: all information
processing is done in the registers
• two decoders
• qi: one o/p for an operation code.
• ti: Timing variables from counter T

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Registers in simple computer
 Instructions for a simple computer

• MOV: Move
• LDI: Load immediate
• LDA: Load into A
 Instruction fetch cycle

• Fetches the operation code from memory and places

it in a control register IR.

• Timing variables used to sequence the micro-

operations.
 Execution of Instructions (MOV R)

• MOV R instruction has an operation code that

makes q1 = 1.
• execution of this instruction requires the micro-
operation

• 𝑞1 𝑡3 : 𝐴 ← 𝑅, 𝑇 ← 0

• 𝑇 ← 0: starts the fetch cycle again

 Execution of Instructions (LDI OPRD)

• LDI OPRD instruction has an operation code that

makes q2 = 1.
• execution of this instruction requires the micro-
operations
 Execution of Instructions (LDA ADRS)

• LDA ADRS instruction has an operation code that

makes q3 = 1.
• execution of this instruction requires the micro-
operations
Register Transfer statements of a simple computer
Hardware specification for a simple computer

• Combined control functions obtained for each

micro-operation.
Implementation of 𝑀𝐴𝑅 ← 𝑃𝐶
Design of a simple computer
 Processor Organization

Processor registers and ALU connected through

common buses
Processor with Accumulator Register
Accumulator Register

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 Design of Arithmetic Logic Unit

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 Design of Arithmetic Logic Unit

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 Design of Arithmetic Logic Unit

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 Control Logic Design

• PLA Control
• Micro Program Control
• Hardwired control
• Control of Processor Unit

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 Control Logic Design
• PLA Control

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 Control Logic Design
• Micro Program Control

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 Control Logic Design
• Hard Wired Control

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 Control Logic Design
1. Problem Statement

2. Equipment Configuration

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 Control Logic Design
4. Algorithm Formulation

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 Control Logic Design
4. Data Processor Specification

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 Control Logic Design
4. Control State Diagram

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 Control Logic Design
Control of Processor Unit

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 Control Logic Design
Control of Processor Unit

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