Design and implementation of Modified Advanced Standard for

Resource Constraint Environments.

In the partial fulfillment of the requirement for the award of the
degree of
Masters of Engineering in
ELECTRONICS AND COMMUNICATION ENGINEERING
(Embedded Systems and VLSI Design)
Submitted by
BALAVANTHULA SRIKANTH (160119744408)
Under the Supervision of
MALLIKARJHUNA RAO (ASST.PROFESSOR)
Dept. of ECE

Department of Electronics and Communication Engineering

Chaitanya Bharathi Institute of Technology
Hyderabad -500075
Year 2020-21
 Declaration
We do declare that the project work Design and implementation
of Modified Advanced Standard for Resource Constraint
Environments submitted in the department of Electronics and
Communication Engineering (ECE), Chaitanya Bharathi Institute of
Technology Hyderabad in fulfillment of degree for the award of
Bachelor of Engineering is a bonafide work done by us which
was carried under the supervision of Mallikharjuna Rao.
Also we declare that the matter embedded in this report has been
submitted by us in full or partial thereof for the award of any
degree/diploma of any other institution or University previously.

Station: Hyderabad Signature of the candidate

Date:
 Abstract
Internet of things (IOT) interworking of smart devices embedded
with sensors software electronics and network connectivity that
enables to communicate with each other to exchange and collect
data through an uncertain wireless medium.
Recently IOT devices are dominating the world by providing its
versatile functionality and real time data communication.
Apart from versatile functionality of IOT devices they are very
low battery powered small and sophisticated and experiences lot of
challenges due to unsafe communication medium.
Despite the fact of many challenges the energy issue is now
becoming the primary concern.
 CONTENTS
Abstract i
Contents ii
List of Figures iv
List of Tables v
List of Symbols vi
Abbrevations vii
1. Introduction 1
1.1 Introduction 1
1.2 Aim of the thesis 2
1.3 Motivation of the thesis 3
1.5 Technical approach 4
1.6 Application of thesis 5
1.7 Organization of the thesis 6
 1.1 INTRODUCTION
Internet of things (IOT) is the next revolution of the internet
which brings profound impact on our daily lives
IOT is the extension of the internet to connect just about
everything on the planet. This includes real and physical objects.
As such these things that are connected to the internet will be
able to take actions or make decisions based on the information
they gather from the internet with or without human interaction.
In addition they also update the internet with real time information
with the help of various sensors.
IOT works with resource constraint components such as sensor
nodes RFID tags etc. These components have low computation
capability limited memory capacity and energy resources.
Encryption of data is becoming a major concern but due to
resource constraint nature of components short term security can
meet the demand.
Encrypting data using standard cryptographic algorithms may
consume more energy which drastically reduces the life time of
the components.
Two main approaches are followed to design and implement
security primitives.
Firstly designing new light weight cryptosystem for instance are
some recently proposed light weight cryptographic algorithms
Secondly modifying the existing standard cryptosystem in a light
weight fashion. Possible examples of the second approach are
modification of the Advanced Encryption Algorithm.
With respect to the security aspect and implementation complexity
AES is considered as one of the strongest and efficient algorithms.
Despite that like other symmetric encryption algorithms the secret
key distribution is still considered as a critical issue. Again to
encrypt or decrypt a single block 128 bit of data an essential
amount of computational processing.
 1.2 Aim of the thesis
Internet of things (IOT) interworking of smart devices embedded
with sensors software electronics and network connectivity that
enables to communicate with each other to exchange and collect
data through an uncertain wireless medium.
Recently IOT devices are dominating the world by providing its
versatile functionality and real time data communication
Apart from versatile functionality of IOT devices they are very
low battery powered small and sophisticated and experiences a lot
of challenges due to unsafe communication medium
Despite the fact of many challenges the energy issue is now
becoming the primary concern.
Algorithms focus on hardware area to minimize it extensively and
to maximize it on security issue as soon as possible.
Present MAES a light weight version of Advanced Standard
Encryption (AES) which meets the demand.
Efficiency of MAES is around 18.35℅ in terms of packet
transmission which indicates MAES consumes less energy than
AES and is applicable for resource constraint environments.
 1.3 Motivation of the thesis
Bogodanov et al have investigated how the variation in architecture
of s-box/mix column, (b) frequency of the clock cycle and (c)
unrolling the design can effect the energy consumption.
Feldhofer et al and moradi et al have proposed an implementation
of AES and its basic transformations targeting low area and low
power.
Kerckhof et al have presented a comparative study of different
algorithms based on area throughput power and energy and applied
state of the art techniques for reducing power consumption.
Batina et al have explored the area power and energy consumption
of several recently developed light weight block ciphers
considering possible optimization for the non linear transformation
and compared these with the AES algorithms.
Banik et al have compared the energy consumption of 7 different
light weight block ciphers which are implemented in reconfigurable
devices and tackled the problem of energy efficiency for the first
time.
Kong et al have surveyed modern symmetric cryptographic
solutions for Resource Constraint Environments (RCES).
Felicisimo et al have proposed two substitution boxes where the
first s-box is the Rijndael s-box and the second s-box replacing the
mix columns operation of the original.
Kawle et al have proposed a modified AES using state of art
techniques to reduce computational overhead of the original AES.
 1.5 Technical approach
As we propose a light weight version of AES for RCES first we
analyze the actual mechanism of AES and implement AES in
structured programming language before implementing it in nesC.
The same process is followed for the proposed MAES After
implementing the both algorithms (AES and MAES) in nesC. We
integrate this in telosB Sensor mote.
Humidity temperature and luminance can be sensed by telosB
sensor mote. Room temperature is used as our input set for both
the algorithms.
Our experimental approach construct in two phases in first phase
we implement the original AES in the telosB sensor mote and
construct two sets of transmitted data packets.
The first data set is based on transmiting encrypted data packets
using the original AES encryption techniques and the second data
set is composed of without encrypted data packets.
In the second phase we implement both the original AES and the
proposed MAES in the telosB sensor mote. Unencrypted data
packets are not considered in the second phase of experiment.
We construct two sets of transmitted data packets which are
encrypted using the original AES and the proposed MAES. The
internal voltage sensor of telsoB uses the microcontrollers.
 1.6 Applications of thesis
As it is implemented in both hardware and software it is most
robust security protocol
It uses higher length key sizes such as 128,192,256 bits for
encryption. Hence it makes AES algorithms more robust against
hacking.
It is most common security protocol used for wide various of
applications such as wireless communication , financial transactions,
e-business, encrypted data storage etc.
It is one of the most spread commercial and open source solutions
used all over the world.
No one can hack your personal information.
For 128 bit about 2128 attempts are needed to break. This makes
it very difficult to hack it as a result it is very safe protocol.
It uses too simple algebraic structure
Every block is always encrypted in the same way.
Hard to implement with software.
AES in counter mode is complex to implement in software taking
both performance and security into considerations.
 1.7 Organization of the thesis
The thesis consists of seven chapters
Chapter 1: It is to discuss on introduction of using Advanced
Encryption Standard (AES) Algorithm in communication application.
Chapter 2: It is to describe the each research of literature review
about AES encryption algorithm.
Chapter 3: This is to describe my research methodology which was
the step involved in developing this project in clear sequence.
Chapter 4: It is to design the prototype to implement AES
encryption algorithm
Chapter 5: It is discussed the process and systematic to implement
the AES encryption algorithm in communication application.
Chapter 6: Chapter shows the result after testing and discussion as
well as the research constraints.
Chapter 7: This chapter gives the epilogue limitations and whole
research summary.
 2.1 Literature survey
With the establishment of the AES the need for new block ciphers
has been greatly diminished for almost all block cipher
applications the AES is an excellent and preferred choice.
However despite recent implementation advances the AES is not
suitable for extremely constrained environments such as RFID tags
and sensor networks.
In this paper we describe an ultra light weight block ciphers
present both security and hardware efficiency have been equally
important during the design of the block cipher.
The hardware requirements for present are competitive with todays
leading compact stream ciphers. In this paper we propose a new
hardware optimized block cipher that has been carefully designed.
With area and power constraints uppermost in our mind.
We have tried to avoid a compromise in security in achieving this
we have looked back with features from the AES finalist
candidate which demonstrated excellent performance hardware.
At this point we have to design a new block cipher which has
become an accepted fact that stream ciphers are potentially more
compact.
We might consider a compact block cipher first a block cipher is
a versatile primitive and by running a block cipher in counter
mode. We get a stream cipher.
 2.2
The AES is a cryptographic algorithm that is used to encrypt and
decrypt information key expansion generates a key schedule that is
used in the cipher and inverse cipher procedures.
The system aims at reduced hardware structure. Compared with the
pipeline structure it has less hardware resources and high cost
effective. And this system has high security and reliability.
We describe compact data path architecture for Rijindael where the
hardware resources are efficiently shared between encryption and
decryption.
The key arithmetic component S-box has been implemented using
look up table logic or ROMS in the previous approaches which
requires a lot of support for hardware. This AES system can be
widely used in the terminal equipments.
The implementation of FPGA is based on AES algorithm is
cryptography. The cryptography is the science of secret codes
enabling the confidentiality of communication through insecure
channel.
Cryptosystems can provide confidentiality authenticity integrity and
non repudiation services. It protects against unauthorized parties by
preventing unauthorized alteration of use.
 2.3
Generally speaking it uses a cryptographic system to transform a
plaintext into a ciphertext using most of the time a key. To
increase the computational speed parallelism and pipelining
architecture have been implemented.
The simulation is done using Xilinx 13.2 version. It does not
provide availability of data or systems. The salient features of AES
encryption and decryption are high throughput parameter flexibility
implantation flexibility.
Known security attack confidentially means that unauthorized
parties cannot access information. Authenticity refers to validating
the source of the message to ensure the sender is properly
identified.
Integrity provides assurance that the message was not modified
during transmission accidentally. Non repudiation means that a
sender cannot deny sending the message at a later date and the
receiver cannot deny receiving it.
Cipher is any method of encrypting text it is also sometimes used
to refer to the encrypted text message itself. A block cipher is
one that breaks a message up into chunks and combines a key
with each chunk.
 3. Methodology Work carried out MAES
3.1 DESIGN OF PIPELINED ARCHITECTURE
In the proposed method MAES pipeline registers are placed after
round or after the operation. By placing the registers in the
algorithm we can achieve high performance implementation in both
encryption and decryption.
The fully expanded implementation for all ten rounds the data
generated in each in each individual round is utilized as an input
data to the next round. Here placing the pipeline registers is the
key of achieving better performance.
Pipeline registers are basically used for intermediate data
processing. We have different optimizations in our coding it may
be delay optimization we are choosing the technique which is use
to reduce the delay in our previous delay.
In modified AES encryption and decryption process resembles to
that of AES in account of number of rounds, datakey size. The
round function consists of four stages to overcome the problem of
high calculation we skip the mix column step and add the
permutation step.
Mix column gives better security but it takes large calculation that
makes the encryption algorithm slow. The other three junctures
remain unbothered as it is in AES
 3.2 proposed method of pipeline architecture
A single 128 bit block is the input to the encryption and
decryption algorithms. This block is a 4×4 square matrix consisting
of 16 bytes. This block is divided into four operational blocks.
The data is either bytes or bit levels and the algorithm is
designed to treat any combination of data and is flexible for key
size of 128 bits. These four operational blocks represent one round
of modified AES. There are 10 rounds for full encryption.
MAES based pipeline architecture there are several ways to keep
pipeline architecture it may take 2 stage or stage 3 pipeline
according to our requirement.
The proposed MAES delay is shown in the below diagram. Three
key length alternatives 128,192,256 bits block length of 128 bits.
We assume a key length of 128 bits which is commonly
implemented.
 4. CONCLUSION
In this paper we present a modified version of AES for resource
constraint environments. A new substitution box is proposed which
works over Galois field by constructing a unique transformation
equation.
Features of MAES is extending the battery life of low powered
devices by consuming less amount of energy. The proposed MAES
shows 18.35℅ efficiency when encrypted packets are transmitted
using the proposed MAES to the sink node.
The number of transmitted packets has increased in addition
29.983 milliseconds is found in terms of latency in future security
issue and space complexity will be considered to make the
proposed modification more applicable.
While encrypting a data to the sink node we will further develop
to integrate public key cryptosystem specially elliptical curve
cryptography to achieve comparable efficiency.
The number of transmission packets and latency with better
security.
 REFERENCES

 Bogdanov et al PRESENT An ultra light weight block cipher

CHES.
 Feldhofer Martin Johannes Wolkerstrofer and Vincent Rijmen
AES implementation on a grain of sand IEE proceedings
information security.
 Kerchof, Stphanie, Franois Durvaux, Cdric Hocquet David
Bol and Franois Xavier Standaert. Towards green cryptography
a comparsion of light weight ciphers from the energy view
point. Cryptographic Hardware and Embedded systems CHES
2012
 Kawle Pravin et al Modified Advanced Encryption Standard
International journal of soft computing and engineering.
 Batina Lejila et al Dietary recommendations for light weight
block ciphers power, energy, and area analysis of recently
developed architectures International workshop on Radio
frequency Identification security issues and privacy issues.
 LIST OF FIGURES

2 sub bytes- The first transformation sub bytes is used at the

encryption site. It is non linear byte substitution that operates
independently on each byte of the each state using a
substituition table. All the 16 bytes of the state are substituted
by the corresponding values which are found from the lookup
table. In decryption inv sub bytes is used. Bytes of a state are
substituted from inv sub bytes table. Figure 2 shows the sub
bytes operation.
 3 shift rows – In the encryption the state bytes are shifted
left in each row. It is called shift rows operation. The number of
the shift depends on the row number (0,1,2,3) of the state matrix.
Row 0 bytes are not shifted and row 1,2,3 are shifted to 1,2,3
bytes left accordingly. Figure 3 shows the shift row operations.

4 mix column- The mix columns transformation operates at the

column level. It transforms each column of the state to a new
column. The transformation is actually the matrix multiplication of
a state column by a constant square matrix. All the arithmetic
operations are conducted in the galois field. The bytes are treated
as polynomials rather than numbers. Figure 4 shows the mix
columns.
Mix columns transformation operation is not performed in the last
round of encryption. The decryption process essentially follows the
same structure as encryption. In addition to the nine rounds of
inverse shift rows inverse sub bytes inverse add round key and
inverse mix columns transformation. In the final round inverse mix
columns is no longer performed.
5 Add round key- Add round key proceeds one column at a time.
It is similar to mix columns in this respect . Add Round key adds
a round key to each column matrix. Matrix addition operation is
performed in the Add Round key stage. Figure 5 shows the Add
Round key operation.
In encryption sub bytes shift rows mix columns and Add Round
key are performed in all rounds except the last round.
 LIST OF TABLES

The table 1 shows the rijindael s box is a square matrix which is

used in the rijindael cipher. The s box serves as a look up table.
It is generated by determining the multiplicative inverse for a
given number in GF 2 and then transforming the multiplicative
inverse using affine transformation

.
1. Multiplicative inverse- in multiplicative inverse phase the input
byte is inversed by substituting value from multiplicative inverse
table.
2. Affine transform- Selection of the irreducible polynomial and the
designated byte are the two most important factors of affine
transformation phase. In affine transformation consists of two
operations firstly 8×8 square matrix and secondly 8×1 constant
column matrix addition. The 8×8 square matrix is constructed
using following .