Department of Computing

Digital Logic Design

Mid-term Exam
Semester: Spring Max Marks: 20
Date: 12 May, 2023 Time: 40 Min
Instructor: Hassan Ali
Instructions:
• Attempt all questions in proposed time.
• Neat handwriting is to be done; cuttings may lead to marks deduction.
• This exam carries 20% weightage towards the final evaluation.
• Assume and report any missing data in the question paper.
• Calculator is not allowed.

Name: Reg. No.

Q-1: Construct BCD to seven segment circuit as shown in Figure 1 and write the output in
table 1. (5+2)

Figure 1

1
 Table 1

BCD Inputs Seven Segment Output

0000

0011

0101

0110

0111

1000

1001

Q-2: Solve the following Question

a) Convert each number into the other bases and show conversion steps in the given space.
Write your final answer in the table. (2+2)
Binary Octal Decimal Hex
01011011

2
 b) Simplify the following Expression using Boolean algebra. Draw the resultant circuit.
F(a,b,c,d) = a`b`cd + a`bcd + ab`cd + abc`d`+ abc`d + abcd` + abcd (3)
c) What is meant by universal gate? (2)

Q-3: Viva (4)