PROC.

2021 IEEE 32nd INTERNATIONAL CONFERENCE ON MICROELECTRONICS (MIEL), NIŠ, SERBIA, SEPTEMBER, 12-14, 2021

An Accurate Analytical Modeling of Contact

Resistances in MOSFETs
G. D. Bokitko, D. S. Malich, V. O. Turin, and G. I. Zebrev

Abstract - We have presented an analytical physics-based qnS 0 (VG )

model, which can continually describe the MOSFET I-V curves in
all operation modes taking into account the finite source-drain
resistances.
I. INTRODUCTION
As the MOSFET channel lengths decrease, the
influence of parasitic source-drain resistance on the current
characteristics becomes more and more important. The
2021 IEEE 32nd International Conference on Microelectronics (MIEL) | 978-1-6654-4528-3/21/$31.00 ©2021 IEEE | DOI: 10.1109/MIEL52794.2021.9569104
VDSAT (VG )  mT + , (2)
Cox + CD
where q is the electron charge, nS0 is the channel carrier
density near the source, φT = kBT / q is the thermal potential,
m is non-ideality factor, CD is depletion layer capacitance.
The MOSFET electrostatic saturation current IDSAT can
be written as follows

contact resistance is becoming a growing impediment to 1

I DSAT = G0VDSAT , (3)
transistor power and performance scaling. This is a common 2
challenge for SOI FETs [1], FinFETs [2] and GAAFETs [3]
and any other type of transistor. Most of modern compact where G0 is the channel conductance (i.e., total inverse
models that are used in circuits simulations are too much channel resistance at low drain bias) in a low drain bias
technically oriented. Such methods used are based on regime
specific approaches and have some drawbacks [4, 5]. We
find it important to construct an analytical approach that W
could be serve as a basis for compact modeling. This G0 = q 0 n S 0 , (4)
L
approach is based on analytical solution Kirchhoff’s
equations and on the diffusion-drift field effect transistor where W and L are the channel’s width and length, μ0 is the
model, originally proposed in [6, 7]. channel carrier mobility. The explicit dependence nS0 (VG)
can be simulated using any of the existing approaches (e.g.,
II. MODEL FORMULATION BSIM [4]).

A. I-V Model B. Kirchhoff’s equations

The abovementioned model relies on an explicit and An equivalent circuit of MOSFETs with a total series
exact solution of the channel current continuity equation, resistance (RSD = RS + RD) is shown in Fig.1. The intrinsic
and on an intrinsic model of long-channel FET I-V and extrinsic voltages are obeyed generally by the following
characteristics without series resistances that has a following Kirchhoff’s equations: VDint= VD − I D RSD and
form [8]
VGint= VG − I D RS , where VDint and VGint are the intrinsic
 drain-source and gate-source biases. The same equations
 V 
I D= I DSAT 1 − exp  −2 D   , (1) can be rewritten explicitly as follows
 V
  DSAT 
VD − VDint int
  VDint 
where IDSAT is the saturation current, VD is the drain-source = I DSAT 1 − exp  −2 int   , (5a)
RSD   VDSAT 
bias. For long-channel FETs with electrostatic current
blocking the drain saturation voltage VDSAT is an explicit VG − VGint int
  VDint 
function of the mobile charge density = I DSAT  1 − exp  −2 int   , (5b)
RS   VDSAT 
G. D. Bokitko, D. S. Malich, and G.I. Zebrev are with the
Department of Micro- and Nanoelectronics of National where:
Research Nuclear University MEPHI, Moscow, E-mail:
Bokitko_g@mail.ru. int
I DSAT = (1 2) G0intVDSAT
int
,
V. O. Turin is with the Orel State University, Russia.

978-1-6654-4528-3/21/$31.00 ©2021 IEEE

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 G0int (VG ) = G0 (VGint ) , (6) eff  GR 
VDSAT  VDSAT + I DSAT RD= VDSAT 1 + 0 D  (10)
V int
(VG ) = VDSAT (V int
).  2 
DSAT G

This means that these quantities are calculated at intrinsic

gate voltage VGint .
It is obvious from (6) that VGint  VG and therefore
G0int  G0 , VDSAT
int
 VDSAT , and the equality sign holds for RS
= 0. The latter case allows an exact analytical solution of
(5a) taken with G0int = G0 , VDSAT
int
= VDSAT

 1   V  
I D 0 = I DSAT 1 − W G0 RD exp  −2 D + G0 RD    ,(7)
 G0 RD   VDSAT   
 

where W (x) is the Lambert function defined as a solution of

the equation W (xex) = x [9]. The extrinsic conductance can Fig. 2. Output MOSFET I-V curves for different RD (at RS=0).
be derived straightforwardly
Fig. 2 shows MOSFET output I-V curves with zero RS

=
 I D 0 
g D =
1 (
W G0 RD eG0 RD − 2VD VDSAT
) . (8)
for different drain resistances which have different
 conductance and saturation voltages but the same saturation
V
 D VG RD 1 + W G0 RD e (
G0 RD − 2VD VDSAT
) current. It can be seen in Fig. 2 that apparent saturation drain
voltage increases with RD.

С. General case of non-zero RS

In general case the implicit functional equation

I D (VG ,VD ) =I D (VG − I D RS ,VD − I D RSD ) (11)

binds the “ideal” functional form (1) with the required

dependence valid for nonzero RS and RSD. Using an exact
solution (7) at RS = 0, we have

I D (V=
G ,VD ) I D 0 (VG − I D RS ,VD ) (12)

This exact functional equation has no analytical solution but

Fig. 1. Equivalent MOSFET circuit with series resistance. on condition VG >> IDRS we have a traditional
approximation
Using the Lambert function property W(x)  x at low x,
it can be seen that at low VD we have a voltage divider I D 0 (VG ,VD )
regime I D (VG ,VD )  , (13)
1 + g m 0 RS

G0
gD0  , (9) where gm0 = (∂ID0 / ∂VG)V is a bulky but an explicit function
D

1 + G0 RD of extrinsic biases that allows us to consider (13) as a

compact model.
which is obvious also directly from (5). For the saturation Fig. 3 and Fig. 4 show calculated I-V curves and
mode (high VD) we have VDint  VD − I DSAT RD , I D  I DSAT transconductance dependencies.
corresponding to the current source mode. The effective
saturation voltage is increased in this case due to voltage
drop on series resistance

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 Fig. 3. MOSFET’s output characteristics calculated at different RD
(0, 100, 200, 300 Ohm) and RS = 0 (dotted lines) and at different
RS = RD with the same nominal values (solid lines).
Fig. 4. Transfer I-V characteristics (solid lines) calculated for
RDS = 0 (upper solid line), RDS = 2.5 kOhm (lower solid line) and
corresponding transconductance curves (dashed lines).
It is well known in modern nanoscale FinFETs the
transconductance from which the field-effect mobility is
deduced is strongly degraded by source-drain series
resistances.
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Fig. 5. Transconductance calculated with a compact model at
different VD = 0.05, 0.2, 0.5, 1.0 V for the FET with RS=RD=500
Ohm-µm, L= 25 nm, EOT=1.3 nm, µ0 = 250 cm2/V×s, VT = 0.3V
Fig. 5 shows the transconductance degradation
calculated for a realistic set of parameters.
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