Unit 5

Current Controlled and

Voltage Controlled
Devices
Bipolar Junction Transistor
➢ Basically, a transistor is a combination of two back-to-back diodes, provided crystal continuity is
maintained.
➢ Addition of another layer results in a three-layer two junctions device which has npn or pnp form
and is called a transistor.
➢ With a terminal connected to each layer, it acts as a two-port device (input/output ports) wherein one
of the terminals is common between the two ports.
➢ Such a transistor is known as Bipolar Junction Transistor (BJT) which acts as a current-controlled
device with the output current being controlled by the input current, such that the input-current
waveform is replicated at the output.
➢ This is the amplifying action of a transistor commonly applied in various types of audio/video
amplifiers.
➢ A BJT can also be made to act as a switch wherein the input current level controls the ON/OFF state
of the output current.
➢ This mode of operation of a BJT finds wide applications in high-speed digital electronics
➢ PNP Transistors → It is formed by sandwiching thin layer of N-type semiconductor between two
layers of P-type semiconductors.
➢ NPN Transistors → A layer of P-type semiconductor is sandwiched between two layers of N-type
semiconductor.

➢ The two junctions of transistors are

❑ EB junction: Forward-biased diode → Between emitter and base
❑ CB junction: Reverse-biased diode → Between Base and collector
➢ Thus a transistor is nothing but two PN junction diodes connected back to back.
➢ The three regions in the transistor are named as….
❑ Base → Lightly doped – Middle Region
❑ Collector → Moderately doped – Outer Region
❑ Emitter → Heavily doped –Outer Region
➢ The collector region is made physically larger than emitter region, to dissipate the heat.
➢ The function of emitter is to inject charge carriers to the base which in turn passes them to the
collector.
➢ The collector collects the charge carriers from the base.
➢ In the circuit symbol, the emitter terminal has an arrowhead pointing from P-region to N-region.
Transistor Biasing:
➢ For better performance of a transistor, voltage of correct polarity has to be applied to its
junctions.
➢ For normal operation,
❑ The emitter to base junction is forward biased
❑ The collector to base junction is reverse biased
Operation of Transistor
NPN Transistor:
➢ When the emitter to base junction is forward biased, the electrons from emitter region
diffuse towards base region, and small amount of holes from base to emitter region.
➢ Since base region is lightly doped – in this case with P-type impurity, a few electrons will
combine with holes forming base current 𝐼𝐵 .
➢ The remaining electrons cross-over to collector region constituting collector current 𝐼𝐶 .
➢ Thus, the emitter current 𝐼𝐸 can be given by,
𝐈𝐄 = 𝐈𝐁 + 𝐈 𝐂
PNP Transistor:
➢ When forward bias is applied to emitter base junction of PNP transistor, large number
of holes diffuse from emitter to base and small amount of electrons from base to
emitter.
➢ Since base region is lightly doped – in this case with N-type impurity, a few holes will
combine with electrons forming base current 𝐼𝐵 .
➢ The remaining holes crossover to collector region constituting collector 𝐼𝐶 .
Transistor Configuration
➢ While connecting the transistor in a circuit, any of its three terminals may be common to
input and output.
➢ In the remaining two terminals, one terminal can be used as input terminal and other as
output terminal.
➢ Depending on the terminal connected common to both input and output, the transistor
configuration can be classified into three types, namely
❑ Common Emitter Configuration (CE)
❑ Common Base Configuration (CB)
❑ Common Collector Configuration (CC)
➢ To describe the behavior of any configuration, two characteristics are required.
(i) Driving point or input
(ii) Output
Common Base Configuration
➢ In common base configuration Emitter acts as input terminal and collector acts as output
terminal.
Input Characteristics:
➢ The EB junction is a forward-biased diode.
➢ It is found that it is practically independent of 𝑉𝐶𝐵 .
➢ It can be approximated as a diode characteristic. Conduction begins for 𝑉𝐵𝐸 = 0.7 𝑉.
➢ The current 𝐼𝐸 is controlled by adding a resistance in series with 𝑉𝐸𝐸 , while it will be
assumed that 𝑉𝐵𝐸 = 0.7 𝑉 .
➢ At any value of 𝐼𝐸 , once the transistor starts conducting, ON state.
Output Characteristics:
➢ These relate output current (𝐼𝐶 ) with output voltage (𝑉𝐶𝐵 ) for varying values of input current (𝐼𝐸 ).
➢ The characteristics can be divided into three regions.
❑ Active Region
❑ Cutoff Region
❑ Saturation Region

Active Region :
❑The base-emitter junction is forward biased, while
the collector-base junction is reverse biased.
❑ All the carriers that are injected into the emitter are
swept away through the base to the collector.
❑ As a result, as already shown that
𝑰𝑪 = 𝜶𝑰𝑬 𝑜𝑟 𝑰𝑪 ≈ 𝑰𝑬 𝒂𝒔 𝜶 = 𝟏
Where 𝛼 is the common-base forward current gain
Saturation Region :
❑ In this region, both base-emitter and collector-base
junctions are forward biased. This region is to the left of
𝑉𝐶𝐵 = 0. Cut-off Region : In this region, both base-
❑ In this region, the collector current rises exponentially to emitter and collector-base junctions are both
the 𝐼𝐸 value set by 𝑉𝐵𝐸 circuit as 𝑉𝐶𝐵 increases towards reverse biased. As a result, 𝑰𝑬 = 𝟎 and so 𝑰𝑪 = 𝟎.
reverse bias.
Common-Emitter (CE) Configuration
➢ In the common emitter configuration, base acts as input terminal and collector acts as
output terminal.
➢ It is the most frequently used configuration.
Input Characteristics:
➢ It is seen from the base characteristics that 𝐼𝐵 is practically independent of 𝑉𝐵𝐸 . The
base-emitter junction goes ‘on’ at 𝑉𝐵𝐸 = 0.7 𝑉 and then stays there, while 𝐼𝐵 is adjusted
by the external resistance 𝑅𝐵 .
Output Characteristics:
➢ These relate output current (𝐼𝐶 ) with output voltage (𝑉𝐶𝐸 ) for
varying values of input current (𝐼𝐵 ).
➢ The characteristics can be divided into three regions.
❑ Active Region
❑ Cutoff Region
❑ Saturation Region
Active Region :
❑ Base-emitter is forward biased and collector-base is
reverse biased.
𝑰𝑪𝑬 ≅ 𝜷 𝑰𝑪𝑩
❑ The middle of this region is linear w.r.t. 𝐼𝐵 and 𝑉𝐶𝐸
Saturation Region :
❑ It is to the left of 𝑉𝐶𝐸(𝑆𝑎𝑡) = 0.2 𝑉.
❑ In this region, the CB junction becomes forward biased
and 𝐼𝐵 no longer controls 𝐼𝐶 Cut-off Region : It is below 𝐼𝐵 = 0; the EB junction
𝐼 becomes reverse biased but the corresponding 𝐼𝐶 ≠ 0.
❑ 𝛽𝑑𝑐 = 𝐼𝐶 , large signal gain
𝐵
∆𝐼𝐶 𝑰𝑪 = 𝜷𝑰𝑩 + (𝟏 + 𝜷)𝑰𝑪𝑩𝟎
❑ 𝛽𝑎𝑐 = If 𝐼𝐵 = 0, 𝑰𝑪 = 𝟏 + 𝜷 𝑰𝑪𝑩𝟎 = 𝜷𝑰𝑪𝑩𝟎
∆𝐼𝐵
❑ 𝛽𝑑𝑐 ≈ 𝛽𝑎𝑐 = 𝛽 → Common-emitter forward-current gain
Common Collector (CC) Configuration
➢ In common collector configuration, base acts as input terminal and emitter acts as
output terminal.
➢ This connection is similar to common emitter, except that output is taken from the
emitter.
➢ This causes, the output to be in phase with input (signal).
➢ It offers a high input resistance and low output resistance.
➢ It is, therefore, employed for impedance matching.
➢ In this configuration, 𝛼𝑅 factor will exist which shows the amplification of input at
output.
∆𝐼𝐸
𝛾=
∆𝐼𝐵
Limits of operations
➢ For each transistor, there are limits of operation which identify the region on its characteristics
within which the signal exhibits least distortion.
➢ The region is bounded by cut-off region, saturation region 𝐼𝐶(𝑚𝑎𝑥) , maximum power dissipation
𝑃𝐷(𝑚𝑎𝑥) = 𝑉𝐶𝐸 𝐼𝐶 , an inverse hyperbola and 𝑉𝐶𝐸(𝑚𝑎𝑥) .
Comparison of the three configurations
Parameter CE CB CC
Input Resistance Low Very low High
Output Resistance High Very high Low
Current Gain High Less than 1 High
Voltage Gain High High Less than 1
Application Audio frequency High frequency Impedance
applications applications matching

Advantages of Transistor: Applications:

➢ Longer life ➢ Transistors are used as switches
➢ Low power consumption ➢ They are used in amplifiers to enhance the weak signals
➢ Higher efficiency ➢ They are also used in oscillator circuits
➢ Smaller in size
➢ Light in weight
➢ Does not require filaments
Silicon Controlled Rectifier (SCR)
➢ SCR is the most important family member of thyristor.
➢ It is a power semiconductor device which can handle currents of several hundred amperes and
voltages of several thousand volts.
➢ Because of its compactness, reliability and low loss, it is employed in almost all the power
controlled devices.
➢ The other members of thyristors family include triac, diac, silicon controlled switch and
programmable unijunction transistor etc.,.
➢ It is a four-layer device which along with its associated circuitry has a very wide range of
applications— rectifiers, regulated power supplies, dc to ac conversion (inverters), relay
control, time-delay circuits and many more.
➢ SCRs are now available to control power as high as 10 MW with individual rating of 2 kA and
1.8 kV.
➢ The frequency range has now been extended to 50 kHz, which are employed in high-frequency
applications like induction heating and ultrasonic cleaning.
 It is similar to that of a diode, the difference
Construction being the indication of the gate terminal

➢ SCR is a four layer, three terminal, three junction, unidirectional switching device.
➢ The three terminals are anode, cathode and gate.
➢ The four layers are of alternate P-type and N-type silicon semiconductors forming three junctions.
➢ The layers and junctions are formed by gaseous diffusion and alloying techniques.
➢ The PNP silicon pellet if formed by diffusion.
➢ An aluminum wire connected to top P-layer acts as gate.
➢ The upper N-region is made by alloying gold-antimony into the P-type silicon.
➢ To minimize the mechanical stresses and the thermal expansion, molybdenum disk is employed both at
the top and bottom.

The outer layers are connected to terminals to form anode (positive terminal) and cathode
(negative terminal). The P-layer closer to the cathode is connected to the gate terminal.
Operation of SCR
➢ As a forward voltage is applied across the anode (+) and cathode (–), no conduction takes place as the
middle np-junction is reverse biased.
➢ If a positive pulse is applied at the gate, such that a current of magnitude equal to more than 𝐼𝐺 (turn-
on) flows into the gate, the processes in the device cause it to go into conduction.
➢ The forward current (anode to cathode) is offered a resistance as low as 0.01 to 0.1 ohm.
➢ However, because of regenerative action, removing the gate current does not cause the device to turn
off.
➢ The dynamic reverse resistance of an SCR is as high as 100 k-ohm or more.
➢ SCR can be brought to on state by two ways.
➢ In the first method, gate terminal is kept open and the supply voltage is made equal to the break over
voltage and then turning it on by applying small voltage to the gate.
➢ Once the SCR starts conducting the gate loses the control i.e. even if the gate pulse is removed, SCR
will not stop conducting.
➢ The only way to stop conduction is to reduce the applied voltage to zero.
The important terms that are related to the study of SCR:
1. Break over voltage : Gate terminal being kept open. The minimum forward voltage at
which SCR starts conducting is called break over voltage.
2. Peak reverse voltage: The maximum reverse voltage that can be applied to SCR in the
reverse direction (with conducting) is called peak reverse voltage.
3. Holding Current: The minimum value of anode current below which it must fall to bring
the SCR to OFF state from ON state is called holding current.
4. Forward Current rating: The maximum anode current that an SCR is capable of
withstanding without getting damaged is called forward current rating.
5. Latching Current: It is the minimum value of anode current which the SCR must attain
during turn-on, to maintain conduction, when the gate signal is removed.

Note:
❖ Latching current is associated in the turn-on process whereas holding current is
associated with turn-off process.
❖ Latching current is greater than holding current.
Characteristics of SCR Reverse breakdown voltage
corresponds to Zener or avalanche
➢ The characteristics curve gives forward characteristics of SCR at 𝐼𝑔 = 0.
region of a diode.
➢ If the supply voltage is increased above 𝑉𝐹𝑂 , the SCR starts conducting.
➢ At this juncture, the voltage across the SCR falls down.
➢ The SCR can also be brought to conducting state below 𝑉𝐹𝑂 , by making gate positive with respect to
cathode.
➢ This causes the gate current 𝐼𝑔 increases the 𝑉𝐹𝑂 decreases.
➢ Forward and reverse blocking regions are those regions in which the SCR is open circuited and no current
flows from anode to cathode.

❑ Once the SCR is turned ON the gate loses

control.
❑ SCR cannot be turned OFF using gate.
❑ One method to turn OFF the SCR is that by
reducing 𝐼𝐴 below 𝐼ℎ .
Two-transistor model of SCR
➢ Here the SCR can be considered as NPN and a PNP transistor connected with collector of one
transistor coupled to the base of the another resulting a positive feedback action.
➢ The middle n and p layers can be imagined to be subdivided into two halves, as shown by the dotted
line.
➢ It is now immediately recognized that the device comprises one PNP and one NPN transistor.
➢ As there is an electrical continuity between the two halves of each of these layers, the base of PNP is
connected to the collector of NPN; and the collector of PNP is connected to the base of NPN, while
the gate is connected to the base of NPN.
Switching Action
➢ Let a positive voltage V be applied to the anode (𝐸1 ), and the cathode (𝐸2 ) and gate (G) be both
grounded.
➢ As 𝑉𝐺 = 𝑉𝐵𝐸2 = 0, the transistor 𝑇2 is in ‘off’ state.
➢ It means that CB-junction of 𝑇2, through EB-junction of 𝑇1 , is reverse biased.
➢ Therefore, 𝐼𝐵1 = 𝐼𝐶𝑂 (minority carrier current) is too small to ‘turn-on’ 𝑇1. Thus both 𝑇1 and 𝑇2
are ‘off’ and so anode current 𝐼𝐴 = 𝐼𝐵1 = 𝐼𝐶𝑂 is of negligible order.
➢ It means that SCR is in ‘turn-off’ state, that the switch between anode (𝐸1 ) and cathode (𝐸2 ) is
open.
➢ Now, let a voltage + 𝑉𝐺 be applied at the gate, as 𝑉𝐵𝐸2 = 𝑉𝐺 , on making 𝑉𝐺 sufficiently large,
𝐼𝐵2 will cause 𝑇2 to turn on and the collector current 𝐼𝐶2 becomes large.
➢ As 𝐼𝐵1 = 𝐼𝐶2, 𝑇2 turns on causing a large collector current 𝐼𝐶1 (𝐼𝐴 = 𝐼𝐶1 ) to flow.
➢ This in turn, increases 𝐼𝐵2 causing a regenerative action to set in (this is indeed a positive
internal feedback).
➢ The result is that the SCR is turned on, that is, the switch between the anode (𝐸1 ), and the
cathode (𝐸2 ) is closed (turn-on).
➢ The current 𝐼𝐴 must be limited by the external circuit, say a series resistance between the
source and 𝐸1 .
Turn-off:
➢ When the SCR is in conduction mode, the gate is ineffective in turning it off.
➢ The turn-off mechanism is called commutation and it can be achieved in two ways.
1. Natural Commutation
❑ When the source that feeds the current to anode of SCR is such that it naturally passes through
zero, the SCR turns off at the current zero.
❑ This is the case when the SCR is fed from the ac source.
❑ In this situation, the commutation is also known as line commutation.
2. Forced Commutation
❑ In this method of commutation, the current through the SCR is forced to become zero by
passing a current through it in opposite direction from an independent circuit.
❑ A variety of SCR turn-off circuits are available in books and in manufacturer’s manuals
➢ A transistor and dc battery source in series are connected to the SCR.
➢ When the SCR is in conduction mode (on), 𝐼𝐵 = 0 and when the transistor is off, it is almost an open
circuit.
➢ To turn off the SCR, a positive 𝐼𝐵 pulse of magnitude large enough to drive the transistor into saturation
is applied at the transistor base.
➢ The transistor acts almost like a short circuit.
➢ This causes flow of very large 𝐼𝑜𝑓𝑓 through the SCR in the opposite direction to its conduction current.
➢ The total SCR current reduces to zero in a very short time causing it to turn off.
➢ The transistor has to withstand a large current but for a very short time.
Advantages of SCR:
➢ High efficiency due to low loss
➢ Less maintenance and longer life due to the absence of moving parts.
➢ Noiseless operation
➢ Small size
➢ High reliability
➢ High switching speed
➢ High voltage and current rating
Applications of SCR:
➢ It can be used as electronic switch
➢ Used as converters and inverters
➢ Used as AC voltage controller
➢ HVDC transmission
Field Effect Transistor (FET)
➢ Like BJTs, FETs are three-terminal devices.
➢ These differ from BJTs in two respects.
❑ While BJT is a current-controlled device (input 𝐼𝐵 controls output 𝐼𝐶 ), FET is voltage-controlled
device (input voltage controls output current).
❑ BJT is bilateral while FET is unilateral, which means that only one type of carrier participates in
conduction.
➢ The two main drawbacks of a bipolar transistor are,
❑ Low input impedance (due to forward bias emitter junction) FET
❑ Considerable noise level
JFET
➢ These drawbacks can be overcome using a FET.
• N-Channel JFET
➢ Depending on the construction, the FET can be classified as, • P-Channel JFET

MOSFET
• Enhancement
MOSFET
• Depletion MOSFET
Junction Field Effect Transistor (JFET)
➢ In the N-Channel JFET, the electrons are the majority carriers whereas in P-channel JFET, the holes are
the majority carriers.
➢ In bipolar transistor both majority and minority carriers constitute the current flow.
➢ Hence FET is also known as unipolar device.
➢ Hence FET is a three-terminal semiconductor device in which the conduction is due to any one type of
majority carriers i.e. either electrons or holes.
➢ Channel → The space between source and drain (between two gates) is called channel which allows the
movement of majority carriers from source to drain.
➢ The three terminals are,
❑ Source (S) → At this terminal the majority carriers enter the bar
❑ Drain (D) → At this terminal the majority carriers leave the bar
❑ Gate (G) → The heavily doped P regions introduced on both the sides of the N-type bar (in N
channel JFET) is called gate. (Vice-versa in P Channel JFET)
➢ N Channel JFET:
❖ It consists of n-type silicon bar forming the conducting channel for the charge carriers.
❖ The heavily doped P regions introduced on both sides of the bar form the gate.
❖ This is used to control the flow of electrons from source to drain.
➢ P Channel JFET:
❖ It consists of p-type silicon bar forming the conducting channel for the charge carriers.
❖ The heavily doped N regions introduced on both sides of the bar form the gate.
❖ This is used to control the flow of holes from source to drain.
Operation of JFET
➢ Voltage VDS > 0 is applied across the DS terminals, VDS can be varied by the source VD𝐷 .
➢ The gate terminal G is connected to the source terminal S so that VGS = 0. VDS causes the
channel electrons to flow from S to D, the conventional current ID flows into D and IS flows
out of S; obviously, ID = IS

VGS = 0 and VDS > 0

➢ The voltage VDS reverse biases both the PN-junctions.
➢ The reverse biasing reduces towards the S terminal because of voltage drop in the channel from D to S.
➢ As a result, the depletion region widens at the D-end of the channel.
➢ The width of depletion region reduces along the channel towards the S-end.
➢ The depletion region is therefore non-uniform.
➢ As VDS is increased from zero, ID increases. As the channel width is decreasing with increase of VDS , ID
begins to level off.
➢ At VDS = VP (called pinch-off voltage), ID becomes constant and ID𝑆𝑆 , the saturation level, becomes
independent of VDS.
➢ The initial behavior of the channel is that of voltage-controlled resistance.
The operation of P-Channel FET
operates on the same lines except that the
polarity 𝐕𝐆𝐒 or 𝐕𝐃𝐒 are to be reversed
and the current carriers will be holes
𝐕𝐆𝐒 = 𝟎, 𝐕𝐃𝐒 increasing
Operation VGS < 0 and VDS > 0, Both variable
➢ A voltage source is connected between the gate G and source S terminals causing VGS to be negative.
➢ This negative VGS reverse biases both the junctions uniformly reducing the channel width throughout.
➢ This is over and above the effect of VDS .
➢ The channel therefore pinches off at value VDS < VP for VGS = 0.
➢ The pinch-off values of VDS continue to decrease as VGS is made more negative.
➢ At a value of VGS = VP (–4 V in Fig.), the channel completely closes and so ID = 0 irrespective of the
value of VDS.
➢ Then pinch-off is caused by negative VGS = VP .
➢ It is to be noted that as the two junctions are reverse biased, IG ≈ 0.
Voltage-controlled Resistance
➢ It is observed from the characteristics of JFET that the characteristics are linear (almost) to
lie left of the VP locus.
➢ It is further observed that the slope decreases as VGS increases.
➢ It means that the JFET acts as voltage-controlled resistance; and resistance increases with
VGS .
➢ To a good approximation, the resistance offered by JFET in the ohmic region can be
expressed a

𝒓𝟎
𝒓𝒅 = 𝟐
𝑽
𝟏 − 𝑮𝑺
𝑽𝑷

Where,
𝑟0 → Resistance with 𝑉𝐺𝑆 = 0
𝑟𝑑 → Drain Resistance
 Transfer Characteristic
➢ It is observed from the characteristics of JFET that the characteristics to the right of VP locus, the
saturation region (the major part of the characteristics), that ID is dependent on VGS but is independent
of VDS .
➢ For any value of VDS, (preferably in the middle), we can read ID for various values of VGS (from zero
to VP ) and plot ID vs VGS .
➢ This plot is known as the transfer characteristic [it transfers VGS (input) to ID (output)].
➢ That is why JFET is a voltage-controlled device in which input voltage controls the output current.

Shockley’s Equation
𝟐
𝑽𝑮𝑺
𝑰𝑫 = 𝑰𝑫𝑺𝑺 𝟏−
𝑽𝑷

At VGS = 0, 𝑰𝑫 = 𝑰𝑫𝑺𝑺
At VGS = VP , 𝑰𝑫 = 𝟎

𝑰𝑫
𝑽𝑮𝑺 = 𝑽𝑷 𝟏 −
𝑰𝑫𝑺𝑺
JFET Parameters
➢ Dynamic Drain Resistance:
It is the ratio of small change in drain-source voltage to the small change in drain current, at
constant gate-source voltage.
∆𝑽𝑫𝑺
𝒓𝒅 = 𝒂𝒕 𝒄𝒐𝒏𝒔𝒕𝒂𝒏𝒕 𝑽𝑮𝑺
∆𝑰𝑫
➢ Transconductance:
It is the ratio of small change in drain current to small change in gate-source voltage at constant
drain-source voltage.
∆𝑰𝑫
𝒈𝒎 = 𝒂𝒕 𝒄𝒐𝒏𝒔𝒕𝒂𝒏𝒕 𝑽𝑫𝑺
∆𝑽𝑮𝑺
➢ Amplification Factor:
It is the ratio of small change in drain-source voltage to small change in gate-source voltage at
constant drain current.
∆𝑽𝑫𝑺
𝝁= 𝒂𝒕 𝒄𝒐𝒏𝒔𝒕𝒂𝒏𝒕 𝑰𝑫
∆𝑽𝑮𝑺
MOSFET - Metal Oxide Semiconductor Field Effect Transistor
➢ The MOSFET transistor has become the most important device for construction of integrated circuits
for digital computers.
➢ Its thermal stability and other general features make it very suitable for IC design and construction
because of smaller silicon-chip space needed.
➢ It is available in two forms.
❑ Enhancement MOSFET
❑ Depletion MOSFET
➢ Due to very small leakage current, the input impedance of MOSFET is much higher than that of FET.
➢ By applying an electric field across the insulator deposited on the semiconductor material, the width of
the conducting channel can be controlled.
➢ MOSFET is also known as insulated gate field effect transistor (IGFET).
➢ The two special features of MOSFET are small chip area and low power consumption.
 Depletion-Type MOSFET
➢ A lightly doped P-type semiconductor is taken as substrate.
➢ The two highly doped 𝑁 + regions formed, act as source and drain respectively.
➢ Between these two, a shallow N region called Channel is diffused.
➢ A thin aluminium metallic film deposited over the N regions.
➢ Here the important point to note is that, the gate does not form a junction with the
source and the drain unlike JFET.

When 𝑽𝑮𝑺 = 𝟎 (i.e. positive 𝑽𝑫𝑺 ), saturation

current 𝑰𝑫 = 𝑰𝑺 = 𝑰𝑫𝑺𝑺 will flow.
➢ When a negative voltage is applied to the gate, say 𝑽𝑮𝑻𝑺 = −𝟏 𝑽, the holes from the substrate are
attracted by the gate and so the holes flow into N-channel.
➢ The holes recombine with electrons being repelled by the gate, thereby reducing the concentration of
electrons in the channel.
➢ The result is reduction in saturation current 𝑰𝑫 (sat).
➢ So to make 𝑽𝑮𝑺 more negative 𝑰𝑫 keeps reducing till at 𝑽𝑮𝑺 = 𝑽𝑷 , the channel pinches off.
➢ The chain characteristics and transfer characteristics are similar to those of JFET.

❑ However, unlike JFET, if VGS is made

positive, the minority electrons get
attracted into the N-channel and so 𝑰𝑫
begins to increase sharply.
❑ Even at small values of positive 𝑽𝑮𝑺 , 𝑰𝑫
may exceed the prescribed limit.
Shockley’s Equation P- Channel
𝟐
𝑽𝑮𝑺 Depletion type
𝑰𝑫 = 𝑰𝑫𝑺𝑺 𝟏 −
𝑽𝑷

Compared to N-channel type, 𝑽𝑮𝑺 is positive for depletion;

𝑽𝑫𝑺 reverses, –ve at D and +ve at S. The pinch-off voltage
𝑽𝑷 will be positive
Enhancement-Type MOSFET
➢ The construction is similar to that of depletion type except that there is no channel.
Drain and Transfer Characteristics
➢ In the enhancement mode of operation, 𝑽𝑮𝑺 is made positive.
➢ With the positive voltage on the gate, negative charge is induced in the channel and
the conductivity increases.

As 𝑽𝑮𝑺 is increased, the concentration of electrons in the

channel goes up, until 𝑽𝑮𝑺 = 𝑽𝑻 , called threshold voltage.