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Adc Lab Manual
Adc Lab Manual
LAB MANUAL
Regulation : 2021
Branch : B.E. – BIOMEDICAL ENGG
Year & Semester : II Year / IV Semester
1
BM3412 ANALOG AND DIGITAL INTEGRATED CIRCUITS LABORATORY
SYLLABUS
LIST OF EXPERIMENTS:
2
INDEX
PAGE
EXPT.NO NAME OF THE EXPERIMENT
NO
1 INVERTING AND NON-INVERTING AMPLIFIERS 1
USING OP-AMP
2 INTEGRATOR AND DIFFERENTIATOR USING OP- 5
AMP.
3 INSTRUMENTATION AMPLIFIER 13
4 ACTIVE LOWPASS, HIGH PASS AND BAND PASS 17
FILTER USING OP-AMP.
5 SCHMITT TRIGGER USING OP-AMP. 25
6 RC PHASE SHIFT OSCILLATOR USING OP-AMP 35
7 ASTABLE & MONOSTABLE MULTIVIBRATOR 41
USING IC 555 TIMER.
3
INVERTING AMPLIFIER:-
CIRCUIT DIAGRAM:-
Rf
+15v
R1=10K
2 7
-
IC 741
Signal
Generator + 3 + 4
6
+
~
V in CRO
-15v
- -
TABULATION:
MODEL GRAPH:
Vin
INPUT
Time (ms)
Vout
OUTPUT
Time (ms)
4
EXP.NO: 01 INVERTING AND NON-INVERTING
AMPLIFIERS USING OP-AMP
DATE:
AIM:
To design the Inverting and Non-Inverting and Amplifiers using Op-
amp IC741 and test their performance.
APPARATUS REQUIRED:
THEORY:
Op-amp in open-loop configuration has a very few application because
of its enormous open-loop gain. Controlled gain can be can be achieved by taking a
part of output signal to the input with the help of feedback. This is called as Closed-
Loop Configuration. The three basic types of closed-loop amplifier configuration
are: 1. Inverting amplifier.
2. Non-inverting amplifier.
The entire configuration can be operated with either AC or DC input.
INVERTING AMPLIFIER:-
5
NON-INVERTING AMPLIFER:-
CIRCUIT DIAGRAM:-
Rf
+15v
R1=10K 2 7
-
IC 741
3 +
4 6
+ + CRO
-15v
Signal V~in Generator - -
TABULATION:
MODEL GRAPH:
Vin
INPUT
Time (ms)
OUTPUT
Vout
Time (ms)
6
THEORY – (NON-INVERTING AMPLIFIER):-
If the input signal is given to non inverting terminal & the feedback
from output is connected to inverting terminal of an op-amp through a potential
divider network, then it is called as Non-Inverting Amplifier Configuration. It
operates in a same way as a voltage follower (unity gain buffer), except that the
output voltage is potentially divided before it is fedback to the inverting input
terminal. No phase shift or change in the circuit closed loop polarity occurs voltage
Rf
gain is Avcl1 R1
7
RESULT:
Thus the Inverting and Non-Inverting Amplifiers are designed and their
performance was successfully tested using op-amp IC 741.
8
INTEGRATOR:-
CIRCUIT DIAGRAM:-
Cf=0.01uf
Rf =15k
+15v
R1=1.5k 2 7
- 6
Signal IC 741
Generat or
s + 3 + +
1.5K
V~in Rcomp
RL=10k CRO
4 -
-15v
TABULATION:
Frequency Output Voltage Gain = 20 log (V0 /Vin)
S.No
(Hz) (Volts) (dB)
1.
2.
3.
4.
5.
6.
7.
8.
9.
10.
MODELGRAPH:
9
10
EXP.NO: 02 INTEGRATOR AND DIFFERENTIATOR USING OP-AMP.
DATE:
AIM:
To design an Integrator and Differentiator using op-amp IC 741 and to test their
performance.
APPARATUS REQUIRED:
11
5. Calculate the gain with respect to frequency & plot its graph.
12
CIRCUIT DIAGRAM:
Cf=0.005μf
Rf =1.5k
+15v
R1=100Ω C1=0.1μf
2 7 6
-
IC 741
+ + +
3
Signal R3=10K CRO
4
ROM=100Ω
Generators -15v
-
0
TABULATION:
1. Frequency (Input)
2. Input Voltage (Vin peak)
3. Input Time Period (tVin)
4. Output Voltage (Vout peak)
5. Output Time Period (tVo)
MODEL GRAPH:
(i) SINE WAVE INPUT
13
14
THEORY- (DIFFERENTIATOR):-
A differentiator or differentiation amplifier is a circuit which performs
the mathematical operation of differentiation; that is, the output waveform is the
derivative of the input waveform. The differentiator may be constructed from the
basic inverting amplifier if an input resistor R1 is replaced by capacitor C1. The
differentiation is very useful to find the rate at which a signal varies with time. For
maintaining the stability of differentiator, a series resistor R1 is connected with input
capacitor C1. the circuit will provide differentiation function but only over a limited
frequency range & over this range differentiator tend to oscillate (or) poor stability
R C dVin
results. The expression for output voltage is Vo f1
dt
PROCEDURE:
1. Select fa equal to the highest frequency of the input signal to be
differentiated. Calculate the component values of C1 & Rf.
2. Choose fb = 20fa & calculate the values of R1 & Cf, so that R1C1=Rf Cf.
3. Connect the components as shown in the circuit diagram.
4. Apply a sinusoidal & square wave input to the inverting terminal of op-amp
through R1 C1.
5. Observe the shape of the output signal for the given input in CRO.
6. Note down the reading and plot the graph of input versus output wave for
both cases.
(ii) SQUARE WAVE INPUT
15
DESIGN PROCEDURE-(INTEGRATOR):-
Design of integrator to integrate at cut-off frequency 1 KHz.
1
Take fa =
2 Rf C f
= 1KHz.
Always take Cf < μf and
Let Cf =
1
Rf =
2 C f fa
Rf = 15.9KΩ ≡
Rf =
Take fb 1
= = 10KHz.
2 R1C f
1
R1 = = 1.59KΩ.
2 fb C f
R1 ≡
Rcomp R1
= R1 // Rf ≡ R1, Assume RL = 10KΩ
Rf
= R1R f
Rcomp =
DESIGN PROCEDURE-(DIFFERENTIATOR):-
Design a differentiator to differentiate an input signal that varies in
frequency from 10Hz to 1KHz. Apply a sine wave & square wave of 2Vp-p & 1KHz
frequency & observe the output.
To find Rf & C1
Given: fa = 1KHz.
1
fa =
2 R f C1
fa = 1KHz.
Assume C1 =
Rf = 1.59KΩ ≡
16
To find R1 & Cf
Select fb = 20fa with R1 C1 = Rf Cf
1
fb = 20KHz =
2 R1C1
R1CR1
1
= 79.5Ω ≡
Cf = = 82 X 0.1X10 6
Rf 1.5K
Cf =
Rom ≡ R1 // Rf =
= -(1.5KΩ) d
(0.1μf) [sin [(2 )(103)t]
dt
= -(1.5KΩ) (0.1μf) (2 ) (103) cos [(2 )(103)t]
= - 0.94 cos [(2 )(103)t]
RESULT:
Thus an Integrator and Differentiator using op-amp are designed and their
performance was successfully tested using op-amp IC 741.
17
CIRCUIT DIAGRAM:
+15v
3 7
+ Rf=1K
IC 741
6
2 - 4
+15v
R2=1K
-15v
R1=1K 2 7
-
IC 741
RG 22K 3 + 4
6
+ R1=1K -15v
V1
-
~ R2=1K
+
+15v R1=1K V
-
2 7
-
IC 741
+ 3 + 4
6
-15v
~
V2
18
INSTRUMENTATION AMPLIFIER
EXP.NO: 03
DATE:
AIM:
To construct and test the CMRR of an instrumentation amplifier using op-amp
IC741.
APPARATUS REQUIRED:
THEORY:
19
TABULATION:
1.
2.
3.
4.
5.
Vo CMRR =
V1 V2 Vo Ad =
S.No RG (KΩ)
(Volts) (Volts) (Volts) V1 20 log ( Ad )(dB)
V2 Ac
1.
2.
3.
4.
5.
20
PROCEDURE:
1. Select the entire resistor with same value of resistance R. Let R G be the gain
varying resistor with different values of resistance for simplicity let R G, be a
constant value.
2. Connect the circuit as shown in the circuit diagram.
3. Give the input V1 & v2 to the non-inverting terminals of first & second op-
amp respectively.
4. By varying the value of RG, measure the output voltage for common mode and
differential mode operation. Since RG is selected as constant value, provide
different input value of V1 & V2.
5. Calculate the differential mode gain Ad and common mode gain Ac to
Ad
calculate the CMRR as CMRR=20 log .
Ac
RESULT:
Thus an instrumentation amplifier was constructed and CMRR is
tested using op-amp IC 741.
21
LOWPASS FILTER:-
CIRCUIT DIAGRAM:-
R1=27K RF=20K
+15v
7
2 -
Signal IC 741
Generator 1.5K
3 + 4 6
+ + CRO
Vin ~ 0.1uf
-15v
RL=10K -
TABULATION:
Frequency Output Voltage Gain = 20 log (V0 /Vin)
S.No
(Hz) (Volts) (dB)
1.
2.
3.
4.
5.
6.
7.
8.
9.
10.
MODEL GRAPH:
22
23
EXP.NO: 04 ACTIVE LOWPASS, HIGH PASS AND
BANDPASS FILTER USING OP-AMP.
DATE:
AIM:
To design an Active Low pass and Band Pass Filter using op-amp and to
test their performance
APPARATUS REQUIRED:
From the frequency response, when f<fH; the gain is maximum lAl. When
rolls off. The frequency range from 0 to f H is called as Passband & fH to is called
as Stopband. Out of Butterworth, chebyshev & cauer filters, Butterworth filter is
preferred because it has flat pass band as well as flat stop band (flat-flat) filter.
24
CIRCUIT DIAGRAM - (HIGH PASS FILTER):-
+15v
2 7
-
Signal 0.1μf IC 741
Generator
3 + 4 6
+ CRO
+
Vin ~ 1.5K -15v
RL=10K -
R1=27K RF=22K
TABULATION:
Frequency Output Voltage Gain = 20 log (V0 /Vin)
S.No
(Hz) (Volts) (dB)
1.
2.
3.
4.
5.
6.
7.
8.
9.
10.
MODEL GRAPH:
25
THEORY- (ACTIVE HPF):-
An active high pass filter is simply formed by interchanging the
frequency determining resistor and capacitor in lowpass filter. A filter circuit which
allows only high frequency range greater then a lower cut-off frequency f L is called
as HIGH PASS FILTER. From the frequency response, when f<fL; the gain
gradually increases from the lowest value. When f = fL; the gain reaches 70.7% of the
maximum gain A
and when f > fL, the gain is maximum lAl. The frequency range
2
from 0 to fL is called as Stopband & fL to is called as Passband. (This is exactly
opposite to active LPF)The order of the filter tells the roll-off rate at stop band. Order
n = 1 indicates -20dB / dec (-6db / octave); Order n = 2 indicates -40dB / dec & so on.
Higher the order of the filter, better the quality will be & complex the circuit will be.
Design a HPF at cutoff frequency fL of 1KHZ & P.B gain of 2. Follow the same
procedure as LPF & interchange the R & C position with capacitor first & resistor in
parallel.
26
CIRCUIT DIAGRAM: (BANDPASS FILTER)
R1=27K RF=20K
R1=27K RF=20K
+15v
+15v
2 7
2 7
-
IC 741
Signal - 6
Generator
0.1uf
IC 741 3 + 4
6
+ 3 + 4
1.5K
+
-15v CRO
Vin ~ 1.5K -15v
0.01uf
RL=10K -
TABULATION:
Frequency Output Voltage Gain = 20 log (V0 /Vin)
S.No
(Hz) (Volts) (dB)
MODEL GRAPH:
27
THEORY – (ACTIVE BANDPASS FILTER):-
A filter which has a pass band between two cut-off frequencies fH & fL
is called as Bandpass filter. Where fH > fL BPF is basically of two types
(i) Wide band pass filter. (ii) Narrow band pass filter.
Based on figure of merit or quality factor Q, the types are classified as follows. If
Q<10, selectivity is poor & allows higher bandwidth & such BPF is called as wide
BPF.
If Q > 10, selective is more and allows only narrow bandwidth & such
BPF is called as Narrow BPF. Relationship between Q & center frequency fC is
given as
fc fc f cf H f L
Q BW &
fH fL
When frequency fL < f < fH then gain is maximum. At f < fL the gain is
gradually increasing (positive roll-off) from lower value & at f > fH the gain is
gradually decreasing (Negative roll-off) & exactly when f = fL & f = fH the gain is
A
70.7% of maximum gain 2 .
PROCEDURE:
1. Select the lower and higher cut-off frequency and calculate the value of R &
C for the given frequencies.
2. Design for LPF & HPF separately and then combine the circuit by first
placing the HPF followed by a LPF (i.e) HPF in series with LPF.
3. Connect the circuit as shown in the circuit diagram.
4. Apply a constant voltage input sinusoidal signal to the non-inverting terminal
of op-amp.
5. Tabulate the output voltage Vo with respect to different values of input
frequency.
6. Calculate passband gain and plot the graph of frequency versus voltage gain &
check the graph to get approximately the same characteristic as shown in the
model graph.
28
DESIGN PROCEDURE - (ACTIVE BPF):-
Design a BPF to pass a band of 1KHz to 10KHz with a passband gain of 4.
1. Select the highest cut-off frequency of LPF as fH = 10 KHz and the lowest cut-
off frequency of HPF as fL = 1 KHz.
2. Design the HPF first by taking fL = 1KHz. Assume the value of C < 1μf.
Let C = 0.1μf.
3. Calculate R from the expression.
FL = 1 1
; Therefore R1 =
2 RC 2 f LC
R= 1
;
2 (1KHz)(0.1X10 6 )
4. Then design
R = the LPF by≡ taking fH = 10KHz. Assume the value of C < 1μf. Let
1.59KΩ
C = 0.01μf.
R = 1.59KΩ ≡
Therefore for both HPF & LPF the value of Rf = R1 to obtain a individual
Rf
P.B gain of 2. Af = (1+ )
R1 = 2 (for HPF)
Rf
Af = (1+ )
R1 = 2 (for LPF)
Let Rf = R1 = 22KΩ.
= Vin
L
29
[1( f )2 ][1 ( f 2
) ]
fH fL
30
DESIGN PROCEDURE (ACTIVE LPF):
Design a LPF at cutoff frequency fH of 1KHz with a passband gain of 2.
1. Choose the given value of fH = 1KHz.
1
R= = 1.5KΩ
2 X1X103 X 0.1 f
R= C=
4. Determine the value of R1 & Rf from pass band gain of the filter.
Af = 1 + Rf
= 2.
R1
Therefore Rf =R1 to select Af = 2.
Assume Rf = R1 = & Assume RL =
Af – P.B gain.
f – Input frequency.
fH – Higher cut-off frequency of LPF.
RESULT:
Thus an Active Lowpass, High pass and Band Pass Filters are designed
and tested using op-amp IC 741.
31
SCHMITT TRIGGER:-
CIRCUIT DIAGRAM:-
+15v
ROM=R1//R2- 7
10KΩ IC 741
3 +
4 6
-15V
+
RL=10K + CRO
Vin
~ R2=100K
-
R1
10K
TABULATION:
O/P
I/P Voltage I/P Time VUT (UTP) VLT (LTP) O/P Time
Voltage
(Volts) (ms) (Volts) (Volts) (ms)
(ms)
MODEL GRAPH:
32
SCHMITT TRIGGER USING OP-AMP.
AIM:
To design an Astable, Monostable multivibrator and Schmitt trigger
using op-amp IC 741 and to test their characteristics.
APPARATUS REQUIRED:
THEORY-(SCHMITT TRIGGER):-
33
DESIGN PROCEDURE:-
1. Select the desire value of Vut & Vlt with same magnitude & opposite polarity.
Let Vut = 1V & Vlt = -1V.
2. For Op-amp 741C ± Vsat ≡ ±13V to ± 14V. And assume Vref = 0, Since the
another end of R1 is grounded.
Vut = Vref + R1
(Vsat - Vref )
R1R2
Therefore Vref = 0.
R1
Vut = (+ Vsat).
R1R2
R1
4. Similarly Vlt will be Vlt = ( ) – Vsat.
R1R2
5. Sub Vut & assume R1 or R2 & find the other component value.
R1
1V = (13)
R1R2
R1 + R2 = 13R1
R2 = 12R1 if R1 = 10K then R2 = 120K ≡100K.
6. Calculate ROM by
1000K
ROM = 110K ≡ 10KΩ. & select RL = 10KΩ (Assumption)
7. Calculate hystersis
voltage
Vhy = Vut – Vlt
R1
= [+Vsat – (-Vsat)]
R1R2
10K
= [26V] Since Vsat = 13V
110K
34
= 0.0909 [26V]
Vhy = 2.363V
35
PROCEDURE:
1. Design the value of circuit components and select VUT & VLT as given in the
design procedure.
2. Connect the circuit as shown in the circuit diagram.
3. Apply the input signal to the input terminal of op-amp & set VUT & VLT
values.
4. Note down the readings from the output waveform.
5. Plot the graph & show the relationship between Input sine wave & Output
square wave.
RESULT:
Thus the Schmitt trigger was designed and tested using op-amp IC 741.
36
RC PHASE SHIFT OSCILLATOR:-
CIRCUIT DIAGRAM:-
Rf=1MΩ
+15v
R1=33K 2 - 7
IC 741
4 6
3 +-15v
R1//Rf
33K
+ CRO
-
C=0.1μf C=0.1μf0 C=0.1μf
TABULATION:.
MODEL GRAPH:
Vout
37
RC PHASE SHIFT OSCILLATOR USING OP-AMP
EXP.NO: 06
DATE:
AIM:
To design RC Phase Shift Oscillator using op-amp IC 741 and to test
its performance.
APPARATUS REQUIRED:
THEORY:
RC phase shift oscillator produces 360° of phase shift in two parts. Firstly,
each and every RC pair in the feedback network produces 60° phase shift and totally
there were three pairs, thus producing 180° Phase shift and secondly, the feedback
input is given to the inverting terminal of op-amp to produce another 180° phase shift
and a total phase shift of 360°.
The frequency of oscillation is given by f0 = 1 ; If an inverting
26RC
amplifier is used, the gain must be atleast equal to 29 to ensure the oscillations with
constant amplitude that is,
AV < 1. Otherwise the oscillation will die out.
DESIGN
PROCEDURE:
Design a RC phase shift oscillator to oscillate at 200Hz.
1. Select fo = 200Hz.
2. Assume C = 0.1μf & determine R from fo.
fo = 1 1
=R = 3.3K.
26RC
=
26 f oc
3. To prevent the loading of amp because it is necessary that
R1>>10R. Therefore R1=10R=33K.
4. At this frequency the gain must be atleast 29 (i.e)Rf / R1 =29.
Therefore Rf = 29R1.
38
Rf = 29 (33K) = 957KΩ.
Therefore use Rf = 1MΩ.
39
PROCEDURE- (RC PHASE SHIFT):-
1. Select the given frequency of oscillation f0 = 200Hz.
1
2. Assume either R or C to find out the other using formula f0 = .
26RC
3. The gain is selected such that Rf / R1 = 29K. Assume Rf or R1 to find the other.
4. Connect the circuit as per as the circuit diagram.
5. Measure the amplitude frequency of the output signal plot the graph.
RESULT:
Thus RC Phase Shift and Oscillator were designed and tested using
op-amp IC 741.
40
PIN CONFIGURATION OF 555 TIMER IC
Applications:-
1. Monostable and Astable Multivibrator
2. dc-ac converters
3. Digital logic probes
4. Waveform generators
5. Analog frequency meters
6. Tachometers
7. Temperature measurement and control
8. Infrared transmitters
9. Regulator & Taxi gas alarms etc.
41
Block Diagram of IC 555:
6.8K +5V HI
RA
3.3K 7 8 4 3
RB IC 555
5
6 2 1 + CRO
- Vo
Vc C=0.1μf 0.01uf
TABULATION:
Output
waveform
Capacitor
waveform
(Capacitor
voltage Vc)
43
EXP.NO: 07 ASTABLE & MONOSTABLE
DATE: MULTIVIBRATOR USING IC 555
TIMER.
AIM:
To Design and test Astable and Monostable multivibrator using 555 timer IC.
APPARATUS REQUIRED:
THEORY:
When the power supply VCC is connected, the external timing capacitor „C”
charges towards VCC with a time constant (RA+RB) C. During this time, pin 3 is high
(≈VCC) as Reset R=0, Set S=1 and this combination makes Q = 0 which has
unclamped the timing capacitor „C‟.
When the capacitor voltage equals 2/3 VCC, the upper comparator triggers the
control flip flop on that Q =1. It makes Q1 ON and capacitor „C‟ starts discharging
towards ground through RB and transistor Q1 with a time constant R BC. Current also
flows into Q1 through RA. Resistors RA and RB must be large enough to limit this
current and prevent damage to the discharge transistor Q1. The minimum value of RA
is approximately equal to VCC/0.2 where 0.2A is the maximum current through the
ON transistor Q1.
During the discharge of the timing capacitor C, as it reaches V CC/3, the lower
comparator is triggered and at this stage S=1, R=0 which turns Q =0. Now Q =0
unclamps the external timing capacitor C. The capacitor C is thus periodically
charged and discharged between 2/3 VCC and 1/3 VCC respectively. The length of
time that the output remains HIGH is the time for the capacitor to charge from 1/3
VCC to 2/3 VCC.
The capacitor voltage for a low pass RC circuit subjected to a step input of VCC
volts is given by VC = VCC [1- exp (-t/RC)]
Total time period T = 0.69 (RA + 2 RB) C
f = 1/T = 1.44/ (RA + 2RB) C
44
MODEL GRAPH:
45
DESIGN PROCEDURE:-
Design of Astable multivibrator of operation frequency = 1 KHz & duty cycle of 30%
using 555 timer IC.
Given Frequency=1000Hz
Duty cycle=30%
D= T low/T high = RB/RA+2RB*100-------------------------------------(1)
T high =0.69(RA+RB)C
T low = 0.69 RBC
From equation 1
0.30 T high = T low
0.30 * 0.69(RA+RB)C = 0.69 RBC
0.201(RA+RB)C = 0.69 RBC
0.483 RB-0.207 RA=
-----------------------------------------------(2)
0
given f=1khz we know that T=1/f
T=1ms
T= T high + T low
0.69(RA+RB)C +0.69 RBC= 1ms.
0.69(RA+RB) +0.69 RB = 1ms./C
Let C=0.1μF
0.69RA+0.69RB +0.69 RB = 1ms./0.1*10-6
------------------------------------------------
0.69RA+1.38RB = 10 4 (3)
RA=6.8K
RB= 2.674K ≡3.3KΩ
Procedure:
1. Calculate the component values using the design procedure.
2. Connect the circuit as shown in the circuit diagram.
3. Observe and note down the output waveform.
4. Measure the frequency of oscillations and duty cycle and then compare
with the given values.
5. Plot both the waveforms to the same time scale in a graph.
46
MONOSATBLE MULTIVIBRATOR:-
CIRCUIT DIAGRAM:-
HI
+5V
10K
7 8 4 3
IC 555
5
6 2 1 + CRO
0.1uf - Vo
Vc
Trigger
Input
0.01uf
Vin
TABULATION:
1. Input waveform
2. Output waveform
Capacitive waveform
3.
(Capacitor voltage Vc)
MODEL GRAPH:
47
THEORY- (MONOSATBLE):-
A Monostable Multivibrator, often called a one-shot Multivibrator, is a pulse-
generating circuit in which the duration of the pulse is determined by the RC network
connected externally to the 555 timer. In a stable or stand by mode the output of the
circuit is approximately Zero or at logic-low level. When an external trigger pulse is
given, the output is forced to go high ( VCC). The time for which the output remains
high is determined by the external RC network connected to the timer. At the end of
the timing interval, the output automatically reverts back to its logic-low stable state.
The output stays low until the trigger pulse is again applied. Then the cycle repeats.
The Monostable circuit has only one stable state (output low), hence the name
Monostable. Normally the output of the Monostable Multivibrator is low.
DESIGN PROCEDURE:-
Let, RA = 10K
Out put pulse width tp = 10μs
tp=1.1RAC
C= 0.909μF
C=0.1μF
PROCEDURE:-
1. Calculate the value of R & C using design procedure.
2. Connect the circuit as shown in the circuit diagram.
3. Apply Negative triggering pulses at pin 2 of frequency 1 KHz.
4. Observe the output waveform and measure the pulse duration.
5. Theoretically calculate the pulse duration as Thigh=1.1 RAC
RESULT:
Thus the Astable and Monostable multivibrator is designed and tested using
555 timer IC
48
SAMPLE VIVA-VOCE QUESTIONS AND ANSWERS
EXPT NO.1:
INVERTING AND NON-INVERTING AMPLIFIERS USING OP-
AMP
10. What is the maximum voltage that can be given at the inputs?
Ans: The inputs must be given in such a way that the output should be less than Vsat.
50
11. Why op-amps cannot be used in open-loop configuration?
Ans: Op-amp in open loop configuration has enormous gain. For example the
op-amp 741 has a typical gain of 200,000 (106 dB) & op-amp OP-77 has a typical
gain of 12 million (141.6 dB). This huge gain is not necessary for most of the
application of op-amp. Since op-amp output will saturate at ±Vsat (positive and
negative saturation) which is approximately equal to ±V (Supply voltage)
51
17. List all Specifications of op-amp 741
Ans:
1. Voltage gain A = α typically 2,00,000
2. I/P resistance RL = α Ω, practically 2MΩ
3. O/P resistance R =0, practically 75Ω
4. Bandwidth = α Hz. It can be operated at any frequency
5. Common mode rejection ratio = α
(Ability of op amp to reject noise voltage)
6. Slew rate + α V/μsec
(Rate of change of O/P voltage)
7. When V1 = V2, VD=0
8. Input offset voltage (Rs ≤ 10KΩ) max 6 mv
9. Input offset current = max 200nA
10. Input bias current : 500nA
11. Input capacitance : typical value 1.4pF
12. Offset voltage adjustment range : ± 15mV
13. Input voltage range : ± 13V
14. Supply voltage rejection ratio : 150 μV/V
15. Output voltage swing: + 13V and – 13V for RL > 2KΩ
16. Output short-circuit current: 25mA
17. supply current: 28mA
18. Power consumption: 85mW
19. Transient response: rise time= 0.3 μs
19. What is the maximum voltage that can be given at the inputs?
Ans: The inputs must be given in such a way that the output should be less than Vsat.
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EXPT NO: 2
INTEGRATOR AND DIFFERENTIATOR USING OP-AMP.
1. Express the output voltage of an Integrator.
Ans: The expression for the output voltage of an op-amp integrator is given as
t
Vo = -1 Vin dt + C
R1C 0
f
Where R1 Input Resistance
Cf Feedback Capacitance
Vin Input Voltage and
C Constant
4. What are the problems faced by basic ideal integrator and how can we
overcome ?
Ans: The input offset voltage Vio and the part of input current charging the
feedback capacitor Cf produces the error voltage at the output of the ideal integrator.
Therefore, in practical integrator, to reduce the error voltage at the output, a resistor
Rf is connected in parallel to Cf. This Rf, limits the low-frequency gain and hence
minimizes the variations in the output voltage. Both stability and the roll-off problems
in basic ideal integrator can be corrected by additional resistor Rf.
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8. Give the meaning and use of Virtual ground.
Ans: If the difference input voltage is ideally zero, and non-inverting terminal
is grounded with a input signal applied to the non-inverting terminal via R1, then
voltage at the inverting terminal is approximately equal to voltage at the non-inverting
terminal. This is known as virtual ground (A terminal that is not connected to physical
ground but, assumed to be.) It is much used in closed-loop analysis of inverting
amplifier.
13. How ideal differentiator suffers from instability? How can we overcome
them?
Ans: The ideal or basic differentiator‟s circuit gain (Rf/R1) increases with
increase in frequency at a rate of +20dB/decade. This makes the circuit unstable.
Also, the impedance Xc1 decreases with increase in frequency, which makes the
circuit very susceptible to high frequency noise. When amplified, this noise can
completely override the differentiated output signal. Both stability and high frequency
noise can be corrected by addition of two components R1 and Cf. This circuit is called
as practical differentiator.
17. Determine the output of differentiator for the following input waves.
Ans: The inputs and respective output waveform of differentiator are as follows,
Sine Wave Negative Cosine Wave
Cosine Wave Sine Wave
Square Wave Spike Wave
Sawtooth Wave Square
Wave
X- - - - - X---------X
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EXPT NO: 3
INSTRUMENTATION AMPLIFIER
1. What are the important requirements of an instrumentation Amplifier?
Ans: The requirements of an instrumentation amplifier are low noise, low
thermal and time drifts, high input impedance, accurate closed-loop gain, high CMRR
and high Slew Rate.
Flying-Capacitor IA :
Excellent CMRR, as common mode signals are completely ignored.
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6. Define CMRR of instrumentation Amplifier.
Ans: CMRR of instrumentation amplifier is defined as ratio of differential mode
gain to common-mode gain.
The Differential mode gain is preferred than Adcommon mode gain. Common
mode gain indicates the gain CMRR (dB) = when
of op-amp 20 log common
│ mode noise signals are
present. │
7. What is the disadvantage of a instrumentation amplifier?
Ans: The requirement for instrumentation amplifier is too strict to follow for
general purpose applications. When the requirements are not too strict, then a general
purpose op-amp can be used in differential mode. Such amplifiers are called as
differential instrumentation amplifier.
Gain of II stage:
Differential output stage
Vo = R2 ( Vo2 – Vo1)
R1
Where Vo2 – Vo1 the differential input to second
stage R2 feedback resistor of op-amp 3
R1 Input resistor of op-amp3
Overall Gain :
Vo = A(V2 – V1)
R3
Where A = AI x AII = (1+2 ) x ( R2
RG R1 )
9. Give some examples of a monolithic IAs.
Ans: Examples of IC Instrumentation Amplifiers from Analog Devices
AD 521/522/524/624/625
AMP - 01
AMP – 02
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EXPT NO.4 :
ACTIVE FILTER (LP, HP & BP) USING OP-AMP 741
2. Why active filters are not suitable for high frequency applications?
Ans: Above MHZ range the op-amp open-loop gain rolls-off with increase in
frequency.
7. Does a filter affect both amplitude and phase of the input signal?
Ans: Yes.
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11. What do you understand from the frequency response of filter?
Ans: There were three cases that should be noted in any filter except allpass
filter. The three cases for LPF filter for example is given as
Case i: If the input frequency fin is less than the higher cutoff frequency fH, then
magnitude of the gain is maximum and it is given as passband gain of the filter AF.
Case ii If the input frequency fin is equal to the cutoff frequency, then the gain
A
magnitude will be 70.7% of the maximum gain. That is, 2 .
Case iii: If the input frequency fin is greater than the higher cutoff frequency fH, then
magnitude of the gain is maximum and it is given as passband gain of the filter AF.
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16. List the applications of BPF.
Ans: It acts as frequency selector, stereo-equalizer octave filter,
communication transmitter and receiver circuits, radio, TV broadcast receivers,
telephone, radar, space satellites and bio-medical equipment.
ACL(HPF) = Vo
Vin
= Af (1 j(j(f f/ /flfl)) )
│ ACL │ = Af (f/fl) / √1+ (f/fl)2 ; Ø = tan -1(f/fl)
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EXPT NO.5:
SCHMITT TRIGGER USING OP-AMP
1. Define multivibrator.
Ans: A multivibrator is an oscillatory circuit capable of generating waveforms
without any Specific input signal. The circuit only has supply voltage connections,
from which the two amplifiers saturates one another to generate vibrations.
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10. Give the relationship between tp and T of a monostable multivibrator.
Ans: The Triggering pulse width „tp‟ must be much smaller than the ON time
„T‟ of Stable State.
12. Give the expression for the upper and lower threshold points of
Schmitt trigger.
Ans: The expression for upper threshold point and lower threshold point are as
follows
Upper threshold voltage VUT = R1
(+Vsat)
R1R2
R1
Lower threshold voltage VLT = (-Vsat)
R1R2
13. Write the truth table of a comparator.
Ans: Truth table of a Comparator
When V+ > V- +Vsat
When V+ < V- - Vsat
When V+ = V- High Impedance State
15. What happens when both threshold points in a Schmitt trigger is equal
to zero?
Ans: When VUT = VLT = 0, the Schmitt trigger behaves as a zero crossing
detector. There were two types of Schmitt trigger. They are positive and
negative Schmitt trigger.
16. Can a Schmitt trigger can be operated with single supply & single threshold
voltage?
Ans: Schmitt trigger can also be operated with single power supply or with a
single triggering input (Either Positive or Negative)
X - - - - - - X--------X
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RC PHASE SHIFT OSCILLATOR USING OP-AMP 741
1. State Barkhausen Criterion and its significance.
Ans: Barkhausen Criterion for oscillation gives the conditions for an oscillator
to oscillate.
i) AVβ ≤ 1; the product of forward gain AV and the feedback ratio β
must satisfy this condition.
ii) The total phase shift of AVβ must be 0° or 360°
3. How oscillations are created in RC phase shift and wien Bridge oscillator?
Ans: When the bridge is balanced and the overall phase attained is 0°, the
Wien bridge oscillator produces oscillations. RC phase shift oscillator produces 360°
of phase shift in two parts. Firstly, each and every RC pair in the feedback network
produces 60° phase shift and a totally there were three pairs, thus producing 180°
Phase shift and secondly, the feedback input is given to the inverting terminal of op-
amp to produce another 180° phase shift and a total phase shift of 360°.
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EXPT NO.7:
ASTABLE AND MONOSTABLE MODE OF IC 555 TIMER
3. What are the different types of packages available for 555 Timer IC?
Ans: The packages used for 555 Timer are 8-pin mini Dual-Inline-Package
(DIP) and 8-pin Metal Can.
X - - - - - - X--------X
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