Professional Documents
Culture Documents
ht1632
ht1632
Features Applications
• Operating voltage: 2.4V~5.5V • Industrial control indicator
• Multiple LED display − 32 ROW /8 COM and • Digital clock, thermometer, counter, voltmeter
24 ROW & 16 COM • Instrumentation readouts
• Integrated display RAM − select 32 ROW & • Other consumer application
8 COM for 64×4 display RAM, or select
• LED Displays
24 ROW & 16 COM for 96×4 display RAM
• 16-level PWM brightness control
• Integrated 256kHz RC oscillator General Description
• Serial MCU interface − CS, RD, WR, DATA The HT1632C is a memory mapping LED display
• Data mode & command mode instruction controller/driver, which can select a number of ROW
and commons. These are 32 ROW & 8 Commons
• Cascading function for extended applications and 24 ROW & 16 Commons. The device supports
• Selectable NMOS open drain output driver and 16-gradation LEDs for each out line using PWM
PMOS open drain output driver for commons control with software instructions. A serial interface
• 48/52-pin LQFP package is conveniently provided for the command mode
and data mode. Only three or four lines are required
for the interface between the host controller and the
HT1632C. The display can be extended by cascading
the HT1632C for wider applications.
Block Diagram
Pin Assignment
ROW25/COM14
ROW26/COM13
ROW27/COM12
ROW28/COM11
ROW29/COM10
ROW30/COM9
ROW31/COM8
LED_VDD
LED_VSS
LED_VDD
LED_VSS
ROW23
COM7
COM6
COM5
COM4
COM7
COM6
COM5
COM4
COM3
NC
NC
NC
NC
36 35 34 33 32 31 30 29 28 27 26 25 39 38 37 36 35 34 33 32 31 30 29 28 27
ROW22 37 24 LED_VSS ROW24/COM15 40 26 COM3
ROW21 38 23 COM2 ROW23 41 25 LED_VSS
ROW20 39 22 COM1 ROW22 42 24 COM2
ROW19 40 21 COM0 ROW21 43 23 COM1
ROW18 41 20 VDD ROW20 44 22 COM0
ROW17 HT1632C SYNC ROW19 45 21 VDD
42 19 HT1632C
ROW16 43 48 LQFP-A 18 CS ROW18 46 20 SYNC
ROW17 47
52 LQFP-A 19 CS
ROW15 44 17 RD
ROW14 45 16 WR ROW16 48 18 RD
ROW13 46 15 DATA ROW15 49 17 WR
ROW12 47 14 OSC ROW14 50 16 DATA
ROW11 48 13 VSS ROW13 51 15 OSC
1 2 3 4 5 6 7 8 9 10 11 12 ROW12 52 14 VSS
1 2 3 4 5 6 7 8 9 10 11 12 13
ROW10
ROW9
ROW8
ROW7
ROW6
LED_VDD
ROW5
ROW4
ROW3
ROW2
ROW1
ROW0
ROW11
ROW10
ROW9
ROW8
ROW7
ROW6
LED_VDD
ROW5
ROW4
ROW3
ROW2
ROW1
ROW0
Note: When the 48-pin LQFP is selected, this device does not support 1/16 duty.
Pin Description
Pad Name I/O Description
ROW0~ROW23 O Line drivers. These pins drive the LEDs.
ROW24/COM15~
O Drive LED outputs or common outputs. Each COM pin is double bonded.
ROW31/COM8
COM0~COM7 O Common outputs. Each COM pin is double bonded.
If the RC Master Mode or EXT CLK Master Mode command is programmed, the
synchronous signal is output to SYN pin.
SYNC I/O
If the Slave Mode command is programmed, the synchronous signal is input from SYN
pin.
If the RC Master Mode command is programmed, the system clock source is from on-
chip RC oscillator and system clock is output to OSC pin.
OSC I/O
If the Slave Mode or EXT CLK Master Mode command is programmed, the system clock
source is input from external clock via the OSC pin.
DATA I/O Serial data input or output with pull-high resistor
WRITE clock input with pull-high resistor Data on the DATA lines are latched into the
WR I
HT1632C on the rising edge of the WR signal.
READ clock input with pull-high resistor. The HT1632C RAM data is clocked out on the
RD I falling edge of the RD signal. The clocked out data will appear on the DATA line. The host
controller can use the next rising edge to latch the clocked out data.
Chip select input with pull-high resistor When the CS line is high, the data and command
read from or written to the HT1632C is disabled, and the serial interface circuit is also
CS I
reset. If CS is low, the data and command transmission between the host controller and
the HT1632C are all enabled.
LED_VDD — Positive power supply for driver circuit. Each LED_VDD pin is double bonded.
LED_VSS — Negative power supply for driver circuit, ground. Each LED_VSS pin is double bonded.
VSS — Negative power supply for logic circuit, ground.
VDD — Positive power supply for logic circuit.
Note: These are stress ratings only. Stresses exceeding the range specified under ″Absolute Maximum Ratings″ may
cause substantial damage to the device. Functional operation of this device at other conditions beyond those
listed in the specification is not implied and prolonged exposure to extreme conditions may affect device
reliability.
D.C. Characteristics
VDD=2.4V~5.5V, Ta=25°C (Unless otherwise specified)
Test Conditions
Symbol Parameter Min. Typ. Max. Unit
VDD Conditions
VDD Operating Voltage — — 2.4 5.0 5.5 V
No load, LED ON,
IDD Operating Current 5V — 0.3 0.6 mA
on-chip RC oscillator
A.C. Characteristics
VDD=2.4V~5.5V, Ta=25°C (Unless otherwise specified)
Test Conditions
Symbol Parameter Min. Typ. Max. Unit
VDD Conditions
fSYS System Clock 5V On-chip RC oscillator 230 256 282 kHz
Figure 1 Figure 2
tC S
V D D
C S 5 0 %
G N D
ts u 1 th 1
V D D
W R , R D
5 0 %
C lo c k G N D
F ir s t C lo c k L a s t C lo c k
Figure 3 Figure 4
System Oscillator O S C E x te r n a l C lo c k S o u r c e
The HT1632C system clock is used to generate the S y s te m
time base clock frequency, LED-driving clock. The O n - c h ip R C O s c illa to r C lo c k
2 5 6 k H z
clock may be sourced from an on-chip RC oscillator
(256kHz), or an external clock using the S/W setting. System Oscillator Configuration
The configuration of the system oscillator is as shown.
After the SYS DIS command is executed, the system LED Driver
clock will stop and the LED duty cycle generator will
The HT1632C has a 256 (32×8) and 384 (24×16)
turn off. This command is, however, available only
pattern LED driver. It can be configured in a 32×8 or
for the on-chip RC oscillator. Once the system clock
24×16 pattern and common pad N-MOS open drain
stops, the LED display will become blank, and the
output or P-MOS open drain output LED driver
time base will also lose its function. The LED OFF
using the S/W configuration. This feature makes the
command is used to turn the LED duty cycle generator
HT1632C suitable for multiple LED applications. The
off. After the LED duty cycle generator switches off
LED-driving clock is derived from the system clock.
by issuing the LED OFF command, using the SYS
The driving clock frequency is always 256kHz, an on-
DIS command reduces power consumption, serving
chip RC oscillator frequency, or an external frequency.
as a system power down command. But if the external
The LED corresponding commands are summarized
clock source is chosen as the system clock, using the
in the table. The bold form of 1 0 0, namely 1 0
SYS DIS command can neither turn the oscillator
0, indicates the command mode ID. If successive
off nor execute the power down mode. The crystal
commands have been issued, the command mode ID
oscillator option can be applied to connect an external
except for the first command will be omitted. The LED
frequency source to the OSC pin. In this case, the
OFF command turns the LED display off by disabling
system fails to enter the power down mode, similar to
the LED duty cycle generator. The LED ON command,
the case in the external clock source operation. At the
on the other hand, turns the LED display on by enabling
initial system power on, the HT1632C is in the SYS
the LED duty cycle generator.
DIS state.
Command
Name Function
Code
LED OFF 10000000010X Turn off LED outputs
LED ON 10000000011X Turn on LED outputs
ab=00: N-MOS open drain output and 8 common option
ab=01: N-MOS open drain output and 16 common option
Commons Option 1000010abXXX
ab=10: P-MOS open drain output and 8 common option
ab=11: P-MOS open drain output and 16 common option
Cascade Operation
For the cascade operation, the first IC is set to master mode and its SYNC and OSC pins are set to output pins. The
second IC is set to slave mode and its SYNC and OSC pins are set to input pins which are connected to the the
master IC. Please refer to the ″Cascade control flow chart″ for detail settings.
Blinker
The HT1632C has display blinking capabilities. The blink function generates all LED blinking. The blink rates is 0.25s
LED on and 0.25s LED off for one blinking period . This blinking function can be effectively performed by setting
the BLINK ON or BLINK OFF command.
OFF
COM2
ON
~
OFF
COM5
ON
OFF
COM6
ON
OFF
COM7
ON
1/2*tCLK
SYNC
1 Frame = 8*328*tCLK
Note: tCLK=1/fSYS
P-MOS Open Drain of 24×16 Driver Mode (COM pin with Transistor Buffer)
160*tCLK
ROW0~ROW23
4*tCLK
~ ON
OFF
162*tCLK
ON
COM0
OFF
2*tCLK
ON
COM1
OFF
ON
COM2
OFF
~
ON
ROW26/COM13
OFF
ON
ROW25/COM14
OFF
ON
ROW24/COM15
OFF
1/2*tCLK
SYNC
1 Frame = 16*164*tCLK
Note: tCLK=1/fSYS
Digital Dimming
The Display Dimming capabilities of the HT1632 are very versatile. The whole display can be dimmed using
pulse width modulation techniques for the ROW driver with the Dimming command. The relationship between
ROW and COM digital dimming duty time are shown as below:
OFF
COM
ON
ROW ON
1*T
1/16 Duty
OFF
ROW ON
2*T
2/16 Duty
OFF
ROW ON
3*T
3/16 Duty
OFF
ROW ON
4*T
4/16 Duty
OFF
ROW ON
5*T
5/16 Duty
OFF
ROW ON
6*T
6/16 Duty
OFF
ROW ON
7*T
7/16 Duty
OFF
ROW ON
8*T
8/16 Duty
OFF
ROW ON
9*T
9/16 Duty
OFF
ROW ON
10*T
10/16 Duty
OFF
ROW ON
11*T
11/16 Duty
OFF
ROW ON
12*T
12/16 Duty
OFF
ROW ON
13*T
13/16 Duty
OFF
ROW ON
14*T
14/16 Duty
OFF
ROW ON
15*T
15/16 Duty
OFF
ROW ON
16*T
16/16 Duty
OFF
Note: (1) T=20 × tCLK (32×8 driver mode)
(2) T=10 × tCLK (24×16 driver mode)
(3) tCLK=1/fSYS
The following are the data mode ID and the command Interfacing
mode ID:
Only four lines are required to interface to the
Operation Mode ID HT1632C. The CS line is used to initialise the serial
Read Data 110 interface circuit and to terminate the communication
Write Data 101 between the host controller and the HT1632C. If
the CS pin is set to 1, the data and command issued
Read-Modify-Write Data 101
between the host controller and the HT1632C are
Command Command 100 first disabled and then initialised. Before issuing
a mode command or mode switching, a high level
The mode command should be issued before the data
pulse is required to initialise the serial interface of
or command is transferred. If successive commands
the HT1632C. The DATA line is the serial data input/
have been issued, the command mode ID, namely 1
output line. Data to be read or written or commands
0 0, can be omitted. While the system is operating in
to be written have to be passed through the DATA
the non-successive command or the non-successive
line. The RD line is the READ clock input. Data in
address data mode, the CS pin should be set to ″1″
the RAM is clocked out on the falling edge of the
and the previous operation mode will be reset also.
RD signal, and the clocked out data will then appear
Once the CS pin returns to ″0″, a new operation mode
on the DATA line. It is recommended that the host
ID should be issued first.
controller reads in the correct data during the interval
between the rising edge and the next falling edge
of the RD signal. The WR line is the WRITE clock
input. The data, address, and command on the DATA
line are all clocked into the HT1632 on the rising
edge of the WR signal.
Timing Diagrams
C S
W R
R D
D A T A 1 1 0 A 6 A 5 A 4 A 3 A 2 A 1 A 0 D 0 D 1 D 2 D 3 1 1 0 A 6 A 5 A 4 A 3 A 2 A 1 A 0 D 0 D 1 D 2 D 3
M e m o ry A d d re s s 1 (M A 1 ) D a ta (M A 1 ) M e m o ry A d d re s s 2 (M A 2 ) D a ta (M A 2 )
C S
W R
R D
D A T A 1 1 0 A 6 A 5 A 4 A 3 A 2 A 1 A 0 D 0 D 1 D 2 D 3 D 0 D 1 D 2 D 3 D 0 D 1 D 2 D 3 D 0 D 1 D 2 D 3 D 0
M e m o ry A d d re s s (M A ) D a ta (M A ) D a ta (M A + 1 ) D a ta (M A + 2 ) D a ta (M A + 3 )
C S
W R
D A T A 1 0 1 A 6 A 5 A 4 A 3 A 2 A 1 A 0 D 0 D 1 D 2 D 3 1 0 1 A 6 A 5 A 4 A 3 A 2 A 1 A 0 D 0 D 1 D 2 D 3
M e m o ry A d d re s s 1 (M A 1 ) D a ta (M A 1 ) M e m o ry A d d re s s 2 (M A 2 ) D a ta (M A 2 )
C S
W R
D A T A 1 0 1 A 6 A 5 A 4 A 3 A 2 A 1 A 0 D 0 D 1 D 2 D 3 D 0 D 1 D 2 D 3 D 0 D 1 D 2 D 3 D 0 D 1 D 2 D 3 D 0
M e m o ry A d d re s s (M A ) D a ta (M A ) D a ta (M A + 1 ) D a ta (M A + 2 ) D a ta (M A + 3 )
C S
W R
R D
D A T A 1 0 1 A 6 A 5 A 4 A 3 A 2 A 1 A 0 D 0 D 1 D 2 D 3 D 0 D 1 D 2 D 3 1 0 1 A 6 A 5 A 4 A 3 A 2 A 1 A 0 D 0 D 1 D 2 D 3
M e m o ry A d d re s s 1 (M A 1 ) D a ta (M A 1 ) D a ta (M A 1 ) M e m o ry A d d re s s 2 (M A 2 ) D a ta (M A 2 )
C S
W R
R D
D A T A 1 0 1 A 6 A 5 A 4 A 3 A 2 A 1 A 0 D 0 D 1 D 2 D 3 D 0 D 1 D 2 D 3 D 0 D 1 D 2 D 3 D 0 D 1 D 2 D 3 D 0 D 1 D 2 D 3 D 0
M e m o ry A d d re s s (M A ) D a ta (M A ) D a ta (M A ) D a ta (M A + 1 ) D a ta (M A + 1 ) D a ta (M A + 2 )
C S
W R
D A T A 1 0 0 C 8 C 7 C 6 C 5 C 4 C 3 C 2 C 1 C 0 C 8 C 7 C 6 C 5 C 4 C 3 C 2 C 1 C 0
C o m m a n d 1 C o m m a n d ... C o m m a n d i C o m m a n d
o r
D a ta M o d e
Application Circuits
Low Power LED Application (Direct Drive)
32 ROW × 8 COM Example
Note: Values of the ″R″ resistors are selected depending on the power consumption of the LEDs.
Note: Values of the ″R″ resistors are selected depending on the power consumption of the LEDs.
Note: Values of the ″R″ resistors are selected depending on the power consumption of the LEDs.
24 ROW × 16 COM Example
Note: Values of the ″R″ resistors are selected depending on the power consumption of the LEDs.
High Power LED Application (ROW & COM with Transistor Buffer)
32 ROW × 8 COM Example
Note: Values of the ″R″ resistors are selected depending on the power consumption of the LEDs.
24 ROW × 16 COM Example
Note: Values of the ″R″ resistors are selected depending on the power consumption of the LEDs.
Cascade Function
32 ROW × 8 COM Example (Direct Drive)
Note: 1. It also can set cascade mode by software. User must set the Master in master mode and Slaves in slave
mode with command. The CS pin must be connected to MCU individually for independent read and write.
2. Values of the ″R″ resistors are selected depending on the power consumption of the LEDs.
Note: 1. It also can set cascade mode by software. User must set the Master in master mode and Slaves in slave
mode with command. The CS pin must be connected to MCU individually for independent read and write.
2. Values of the ″R″ resistors are selected depending on the power consumption of the LEDs.
Note: 1. It also can set cascade mode by software. User must set the Master in master mode and Slaves in slave
mode with command. The CS pin must be connected to MCU individually for independent read and write.
2. Values of the ″R″ resistors are selected depending on the power consumption of the LEDs.
Note: 1. It also can set cascade mode by software. User must set the Master in master mode and Slaves in slave
mode with command. The CS pin must be connected to MCU individually for independent read and
write.
2. Values of the ″R″ resistors are selected depending on the power consumption of the LEDs.
Command Summary
Name ID Command Code D/C Function Default
READ 1 1 0 A6A5A4A3A2A1A0D0D1D2D3 D Read data from the RAM
WRITE 1 0 1 A6A5A4A3A2A1A0D0D1D2D3 D Write data to the RAM
READ-MODIFY-
1 0 1 A6A5A4A3A2A1A0D0D1D2D3 D Read and Write data to the RAM
WRITE
Turn off both system oscillator and LED
SYS DIS 1 0 0 0000-0000-X C Yes
duty cycle generator
SYS EN 1 0 0 0000-0001-X C Turn on system oscillator
LED Off 1 0 0 0000-0010-X C Turn off LED duty cycle generator Yes
LED On 1 0 0 0000-0011-X C Turn on LED duty cycle generator
BLINK Off 1 0 0 0000-1000-X C Turn off blinking function Yes
BLINK On 1 0 0 0000-1001-X C Turn on blinking function
Set slave mode and clock source from
external clock, the system clock input from
SLAVE Mode 1 0 0 0001-0XXX-X C
OSC pin and synchronous signal input from
SYN pin
Set master mode and clock source from
RC Master on-chip RC oscillator, the system clock
1 0 0 0001-10XX-X C Yes
Mode output to OSC pin and synchronous signal
output to SYN pin
All the bold forms, namely 1 1 0, 1 0 1, and 1 0 0, are mode commands. Among these, 1 0 0 indicates the
command mode ID. If successive commands have been issued, the command mode ID except for the first
command will be omitted. The source of the tone frequency and of the time base clock frequency can be de-
rived from an on-chip RC oscillator or an external clock. Calculation of the frequency is based on the system
frequency sources as stated above. It is recommended that the host controller should initialize the HT1632C
after power on reset, for power on reset may fail, which in turn leads to the malfunction of the HT1632C
Package Information
Note that the package information provided here is for consultation purposes only. As this information may be
updated at regular intervals users are reminded to consult the Holtek website for the latest version of the package
information.
Additional supplementary information with regard to packaging is listed below. Click on the relevant section to be
transferred to the relevant website page.
• Further Package Information (include Outline Dimensions, Product Tape and Reel Specifications)
• Carton information
Dimensions in inch
Symbol
Min. Nom. Max.
A — 0.354 BSC —
B — 0.276 BSC —
C — 0.354 BSC —
D — 0.276 BSC —
E — 0.020 BSC —
F 0.007 0.009 0.011
G 0.053 0.055 0.057
H — — 0.063
I 0.002 — 0.006
J 0.018 0.024 0.030
K 0.004 — 0.008
α 0° ― 7°
Dimensions in mm
Symbol
Min. Nom. Max.
A — 9.00 BSC —
B — 7.00 BSC —
C — 9.00 BSC —
D — 7.00 BSC —
E — 0.50 BSC —
F 0.17 0.22 0.27
G 1.35 1.40 1.45
H — — 1.60
I 0.05 — 0.15
J 0.45 0.60 0.75
K 0.09 — 0.20
α 0° ― 7°
Dimensions in inch
Symbol
Min. Nom. Max.
A 0.622 0.630 0.638
B 0.547 0.551 0.555
C 0.622 0.630 0.638
D 0.547 0.551 0.555
E ― 0.039 BSC ―
F 0.015 ― 0.019
G 0.053 0.055 0.057
H — — 0.063
I 0.002 — 0.008
J 0.018 — 0.030
K 0.005 — 0.007
α 0° ― 7°
Dimensions in mm
Symbol
Min. Nom. Max.
A 15.80 16.00 16.20
B 13.90 14.00 14.10
C 15.80 16.00 16.20
D 13.90 14.00 14.10
E — 1.00 BSC —
F 0.39 — 0.48
G 1.35 1.40 1.45
H — — 1.60
I 0.05 — 0.20
J 0.45 — 0.75
K 0.13 — 0.18
α 0° ― 7°