Download as pdf or txt
Download as pdf or txt
You are on page 1of 48

5 4 3 2 1

MS-7500 1.0
Title Page
Cover Sheet 1 BTX(264.16mm X 266.4mm)
Block Diagram 2
CPU:
Device Map 3 AMD AM2R2+ Socket940
D D

GPIO Table 4
System Chipset:
Clock Distribution 5 North Bridge --- AMD-ATI RX780/RS780
CPU:AM2R2 6,7,8,9 South Bridge --- AMD-ATI SB700
DDR2 DIMM(Dual Channel) 10,11,12
OnBoard Chipset:
NB:RX780/RS780 13 ~ 17 Clock Gen:Seligo P625
CLK GEN ICS9LPRS475 18 AZALIA Codec:ADI1884
SB:SB700 19 ~ 23 LAN(PHY):BOARDCOM 5754 ( 5764 )
Giga LAN_BOARDCOM 5754 24 SIO:SMSC 5327
PCIE x 16 , x1 Slots. 25
C C

Flash ROM: 32 MB SPI (CHIP)


PCI Slot1 26
Main Memory:
VGA /THERMAL SENSOR 27 DDRII (667/800MHz) * 4 (Dual Channel)
DVI CONNECTOR / BLEED OFF 28 Expansion Slots:
SPI ROM / FAN / LPT 29 PCI Express (X16) Slot * 1
PCI Express (X1) Slot * 2
USB Conn. 30
PCI Slot * 1
Azalia Codec 31
PWM:
SMSC-5327 / TPM 32 Controller:ISL6323 ( 4-Phase 89W )
B KB / MS / COM / FDD 33 ACPI: B

ACPI Power Controler 34 INTERSIL 6545


System Regulators 35~36 Other:
VRM-ISL6323 37 FDD *1
SATA(SATA2-300MB/s) *4
Front Panel / ATX CONNECTOR 38
USB2.0 *10 (Rear*6 Front*4)
For EMI 39 DVI*1
BOM - Option Parts 40 VGA PORT *1
PRINT Header *1
POWER OK MAP 41
TPM *1
RESET MAP 42 COM PORT *1
A A

Power Sequence 43 COM Header *1


Power Delivery 44 <OrgAddr1> MICRO-STAR INt'L CO., LTD.
Title
History 45 Cover Sheet
Size Document Number Rev
1.0
MS-7500
Date: Wednesday, December 26, 2007 Sheet 1 of 48
5 4 3 2 1
5 4 3 2 1

AMD CONFIDENTIAL
RX780/RS780 + SB700 CUSTOMER DESKTOP REFERENCE DESIGN
D D
DDRII 400,533,667,800 UNBUFFERED UNBUFFERED
AMD DDRII DIMM1 DDRII DIMM3

128bit
AM2/AM2g2
Clock AM2 SOCKET DDRII 400,533,667,800 UNBUFFERED UNBUFFERED
Generator DDRII DIMM2 DDRII DIMM4
Seligo P625

OUT
DDRII FIRST LOGICAL DIMM DDRII SECOND LOGICAL DIMM
HyperTransport 16x16

IN
Link

RS740/RS780
HyperTransport LINK0 CPU I/F
DVI CON 1CH TMDS DX10 IGP( RS780)
LVDS/TVOUT/TMDS(RS780/740) I2C I/F BOOTSTRAPS
DISPLAY PORT X2 (RS780) ROM(NB)

Side Port Memory(RS780/740)


C C
VGA CON 1 X16 PCIE I/F 16X PCIE 16X
SLOT
1 X4 PCIE I/F WITH SB

6 1X PCIE INTERFACE

GIGA LAN
4X PCIE X1 PCIE X1 BCM5754/5764
PCIE SLOT SLOT

SB700 HD AUDIO ADI 1884


USB-6 USB-5 USB-4 USB-3 USB-2 USB-1 USB-0 USB 2.0 HD AUDIO I/F
USB2.0 (12)+ 1.1(2)
SATA II (6 PORTS)
SATA#0 SATA#1 SATA#2 SATA#3
AZALIA HD AUDIO SATA II I/F
ATA 66/100/133
USB-7 USB-8 USB-9
SPI I/F
B B
LPC I/F(S5)
ACPI 1.1
SPI ROM SPI I/F INT RTC
HW MONITOR
PCI/PCI BDGE
PCI BUS

PCI SLOT
#1 LPC I/F TPM 1.2

DESKTOP AM2/AM2g2 RS780


POWER CORE POWER
SMSC SIO
5327

A A

DDR2 +1.1V, +1.2V


MEMORY POWER
POWER
KBD <OrgAddr1> MICRO-STAR INt'L CO., LTD.
FLOPPY
MOUSE Title
COM Block Diagram
Size Document Number Rev
1.0
MS-7500
Date: Wednesday, December 26, 2007 Sheet 2 of 48
5 4 3 2 1
5 4 3 2 1

DDR DIMM Config. PCI Config.


DEVICE ADDRESS CLOCK DEVICE MCP1 INT Pin REQ#/GNT# IDSEL CLOCK
MEM_MA0_CLK_H0/L0 PCI_INT#E
DIMM 2 PCI_REQ0#
10100000B MEM_MA0_CLK_H1/L1 PCI Slot 1 PCI_INT#F AD20 PCICLK2_SLOT1
CH-A PCI_GNT0#
MEM_MA0_CLK_H2/L2 PCI_INT#G
(PCICLK2)
MEM_MA1_CLK_H0/L0 PCI_INT#H
DIMM 4 10100010B MEM_MA1_CLK_H1/L1
D D

CH-A MEM_MA1_CLK_H2/L2 LPCCLK0


MEM_MB0_CLK_H0/L0 TPM
DIMM 1
10100001B MEM_MB0_CLK_H1/L1
CH-B
MEM_MB0_CLK_H2/L2
SIO LPCCLK1
MEM_MB1_CLK_H0/L0
DIMM 3
10100011B MEM_MB1_CLK_H1/L1
CH-B
MEM_MB1_CLK_H2/L2

USB Port DATA +/- OC#

USB0-
USB0+
USB1- PCI RESET DEVICE
QUAD STACK USB1+ USB_OC#0
USB2- SB 700
Rear USB2+ ( OC#0~1 )
C USB3- Signals Target C
USB3+
PCIRST# PCISLOT1
USB4- USB_OC#1
LAN_USB1 USB4+
USB5- ( OC#2 )
USB5+
PE_RST# TPM_RST#
USB6- USB_OC#2 PE_RST# LPC/SIO
FRONT USB USB6+
USB7- ( OC#3 )
USB7+
Front
USB8- USB_OC#3
MEDIA CARD USB8+
READER USB9- ( OC#4 )
USB9+

B B

A A

MICRO-STAR INt'L CO., LTD.


Title
Device Map
Size Document Number Rev
1.0
MS-7500
Date: Wednesday, December 26, 2007 Sheet 3 of 48
5 4 3 2 1
5 4 3 2 1

D D

C C

B B

A A

MICRO-STAR INt'L CO., LTD.


Title
GPIO Table
Size Document Number Rev
1.0
MS-7500
Date: Wednesday, December 26, 2007 Sheet 4 of 48
5 4 3 2 1
5 4 3 2 1

D D

DIMM3 DIMM4

CPU_HT_CLK
DIMM1 DIMM2 PCI CLK2
PCI SLOT 0
NB_HT_CLK 33MHZ
3 PAIR MEM CLK

3 PAIR MEM CLK


3 PAIR MEM CLK

3 PAIR MEM CLK

25M_48M_66M_OSC
LPC_CLK0
TPM
33MHZ
AMD SB
SB700 32.768 KHZ
LPC_CLK1
HT REFCLK AMD NB 33MHZ SUPER IO
NB_DISP_CLK
100MHz DIFF(RX780/RS780) SMSC 5327
AM2/AM2g2 CPU
RX780/RS780 32.768 KHZ
1 PAIR CPU CLK
200MHZ
AM2 SOCKET
C C
NB-OSCIN GPP_CLK3
14.318MHZ

NB ALINK PCIE CLK PCIE_RCLK/


NB_LNK_CLK
100MHZ

SB ALINK PCIE CLK


100MHZ RTC_CLK
EXTERNAL
CLK GEN. NB GFX PCIE CLK
100MHZ SB_BITCLK
NB GPP PCIE CLK HD AUDIO
48MHZ
100MHZ (RX780)

PCIE GFX CLK SLT_GFX_CLK


100MHZ PCIE GFX SLOT 1 - 16 LANES
PCIE GPP CLK GPP_CLK0
100MHZ PCIE GPP SLOT 1 - 1 LANE
B B
PCIE GPP CLK GPP_CLK1
100MHZ PCIE GPP SLOT 2 - 1 LANES

25MHz
PCIE GPP CLK GPP_CLK2
100MHZ PCIE GBE BCM 5754
25MHZ OSC INPUT
USB CLK
USB_CLK
48MHZ

32.768KHz
SATA
25MHz
SIO 14M
14.318MHZ

14.31818MHz
A A

External clock mode


MICRO-STAR INt'L CO., LTD.
Title
Clock Distribution
Size Document Number Rev
1.0
MS-7500
Date: Wednesday, December 26, 2007 Sheet 5 of 48
5 4 3 2 1
5 4 3 2 1

CADIP[0..15]
13 CADIP[0..15]
CADIN[0..15]
13 CADIN[0..15]
CADOP[0..15]
13 CADOP[0..15]
XU1A CADON[0..15]
13 CADON[0..15]
HYPERTRANSPORT
13 CLKIP1 N6 L0_CLKIN_H(1) L0_CLKOUT_H(1) AD5 CLKOP1 13
13 CLKIN1 P6 L0_CLKIN_L(1) L0_CLKOUT_L(1) AD4 CLKON1 13
N3 AD1 32 CPU_PRESENT_L CPU_PRESENT_L
13 CLKIP0 L0_CLKIN_H(0) L0_CLKOUT_H(0) CLKOP0 13
13 CLKIN0 N2 L0_CLKIN_L(0) L0_CLKOUT_L(0) AC1 CLKON0 13
CTLIP1 V4 Y6
13 CTLIP1 L0_CTLIN_H(1) L0_CTLOUT_H(1) CTLOP1 13
CTLIN1 V5 W6
13 CTLIN1 L0_CTLIN_L(1) L0_CTLOUT_L(1) CTLON1 13
D CTLIP0 U1 W2 D
13 CTLIP0 L0_CTLIN_H(0) L0_CTLOUT_H(0) CTLOP0 13
CTLIN0 V1 W3 VDDA_25
13 CTLIN0 L0_CTLIN_L(0) L0_CTLOUT_L(0) CTLON0 13 VDDA25
L1 C59
CADIP15 U6 Y5 CADOP15 47nH/300mA/8 0.22uf/16V/X7R/6
CADIN15 L0_CADIN_H(15) L0_CADOUT_H(15) CADON15 VCC_DDR
V6 L0_CADIN_L(15) L0_CADOUT_L(15) Y4 2 1
CADIP14 T4 AB6 CADOP14 C64 C53 C57
CADIN14 L0_CADIN_H(14) L0_CADOUT_H(14) CADON14 392pf/50V/X7R/6 4.7uf/16V/X7R/8 332pf/50V/X7R/4
T5 L0_CADIN_L(14) L0_CADOUT_L(14) AA6
CADIP13 R6 AB5 CADOP13 XU1D
L0_CADIN_H(13) L0_CADOUT_H(13) 18 CPUCLKO_H
CADIN13 T6 AB4 CADON13 MISC R64
L0_CADIN_L(13) L0_CADOUT_L(13)
CADIP12 P4 L0_CADIN_H(12) L0_CADOUT_H(12) AD6 CADOP12 Layout : Place R63 R63 C10 VDDA1 KEY/VSS1 H22 X_300/4 R75 R635 R636 R74
CADIN12 P5 AC6 CADON12 within 0.5 inch of CPU 169/6/1 D10 AE9 X_300/4 1K/6 1K/6 X_300/4
CADIP11 L0_CADIN_L(12) L0_CADOUT_L(12) CADOP11 C67 VDDA2 KEY/VSS2
M4 L0_CADIN_H(11) L0_CADOUT_H(11) AF6
CADIN11 M5 AE6 CADON11 392pf/50V/X7R/6 CPUCLKIN_H A8 F2
L0_CADIN_L(11) L0_CADOUT_L(11) CLKIN_H PLATFORM_TYPE TP11
CADIP10 L6 AF5 CADOP10 CPUCLKIN_L B8 G5 CPU_CORE_TYPE CPU_CORE_TYPE 37
L0_CADIN_H(10) L0_CADOUT_H(10) 18 CPUCLKO_L CLKIN_L CORE_TYPE
CADIN10 M6 L0_CADIN_L(10) L0_CADOUT_L(10) AF4 CADON10
VCC_DDR
5/5/20
CADIP9 K4 L0_CADIN_H(9) L0_CADOUT_H(9) AH6 CADOP9 As the SIC and SID are LDT_PWRGD_L C9 PWROK VID(5) D2 VID5
VID5 37
CADIN9 K5 AG6 CADON9 R107 changed from 1K to LDT_STOP#_L D8 D1 VID4
CADIP8 J6
L0_CADIN_L(9) L0_CADOUT_L(9)
AH5 CADOP8 not recommended to use for 10M ohm 2007/10/18 LDT_RST#_L C7
LDTSTOP_L VID(4)
C1 VID3/SVC
VID4 37
L0_CADIN_H(8) L0_CADOUT_H(8) RESET_L SVC/VID(3) VID3/SVC 37 VCC_DDR
CADIN8 K6 L0_CADIN_L(8) L0_CADOUT_L(8) AH4 CADON8 the rev. F processors. R99 R101 VBAT
SVD/VID(2) E3 VID2/SVD
VID2/SVD 37
X_1K/4 390/4 E2 VID1/SEL
PVIEN/VID(1) VID1/SEL 37
CADIP7 U3 L0_CADIN_H(7) L0_CADOUT_H(7) Y1 CADOP7 5/10/10 R107 10M/4 CPU_PRESENT_L AL3 CPU_PRESENT_L VID(0) E1 VID0/VFIXEN
VID0/VFIXEN 37
CADIN7 U2 W1 CADON7 R390 changed from 1K to R102
CADIP6 L0_CADIN_L(7) L0_CADOUT_L(7) CADOP6 390 ohm 2007/10/18 THERM_SIC X_300/4
R1 L0_CADIN_H(6) L0_CADOUT_H(6) AA2 AL6 SIC THERMDC AG9 THERMDC_CPU 27
CADIN6 T1 AA3 CADON6 THERM_SID AK6 AG8
L0_CADIN_L(6) L0_CADOUT_L(6) SID THERMDA THERMDA_CPU 27
CADIP5 R3 L0_CADIN_H(5) L0_CADOUT_H(5) AB1 CADOP5 5/10/10 VCC_DDR R655 1K/6 AL4 ALERT_L THERMTRIP_L AK7 CPU_THRIP#
CPU_THRIP# 21,32
CADIN5 R2 L0_CADIN_L(5) L0_CADOUT_L(5) AA1 CADON5 If SI is not used,the SID pin can R561 0/4 AK4 SA0 PROCHOT_L AL7 PROCHOT#
PROCHOT_1.8# 19,32
CADIP4 N1 AC2 CADOP4 be left unconnector and SIC should
CADIN4 L0_CADIN_H(4) L0_CADOUT_H(4) CADON4 R98 CPU_TDI CPU_TDO
P1 AC3 AL10 AK10
CADIP3 L1
L0_CADIN_L(4) L0_CADOUT_L(4)
AE2 CADOP3 have a 390 ohm pull-up to VDDIO X_300/4 CPU_TRST_L AJ10
TDI TDO
CADIN3 M1
L0_CADIN_H(3) L0_CADOUT_H(3)
AE3 CADON3 (CPU schematic checklist item 5-22 CPU_TCK AH10
TRST_L R685
L0_CADIN_L(3) L0_CADOUT_L(3) TCK
CADIP2 L3 L0_CADIN_H(2) L0_CADOUT_H(2) AF1 CADOP2 5-23) CPU_TMS AL9 TMS
X_300/4 5/10/10
CADIN2 L2 AE1 CADON2
CADIP1 L0_CADIN_L(2) L0_CADOUT_L(2) CADOP1 CPU_DBREQ_L CPU_DBRDY
J1 L0_CADIN_H(1) L0_CADOUT_H(1) AG2 A5 DBREQ_L DBRDY B6
CADIN1 K1 L0_CADIN_L(1) L0_CADOUT_L(1) AG3 CADON1
VCC_DDR
10/5/10 5/10/10
CADIP0 J3 AH1 CADOP0 COREFB_H G2 AK11 CPU_VDDIOFB_H
C
CADIN0 L0_CADIN_H(0) L0_CADOUT_H(0) CADON0 37 COREFB_H COREFB_L VDD_FB_H VDDIO_FB_H CPU_VDDIOFB_H 35 C
J2 L0_CADIN_L(0) L0_CADOUT_L(0) AG1 37 COREFB_L G1 VDD_FB_L VDDIO_FB_L AL11 CPU_VDDIOFB_L CPU_VDDIOFB_L 35
VDDNB_FB_H G4 CPU_VDDNB_FB_H CPU_VDDNB_FB_H 37
ZIF-SOCKET940
VDDNB_FB_L G3 CPU_VDDNB_FB_L CPU_VDDNB_FB_L 37
Layout : Place
VCC5
AMD Sensor bus with in 1 inch
15u R105 CPU_VTT_SENSE E12 F1 CPU_PSI_L
N12-9400040-L06 R339 39.2/6/1 CPU_VTT_SENSE VTT_SENSE PSI_L TP6 VCCA_1V2
X_8.2K/4 CPU_M_VREF F12 V8 HTREF1 R103 44.2/6/1
MEMZN M_VREF HTREF1 HTREF0
AH11 M_ZN HTREF0 V7
C70 MEMZP AJ11 R104 44.2/6/1
R338 X_0.1uf/10V/X7R/4 M_ZP
X_8.2K/4 VCC_DDR R59 510/6 CPU_TEST25_H A10 TEST25_H TEST29_H C11 FBCLKOUT Layout : C157 C158
X_N-2N7002_SOT23 R62 510/6 CPU_TEST25_L B10 D11FBCLKOUT# R56 X_102pf/50V/X7R/4
TEST25_L TEST29_L
R106 R50 300/4 F10 80.6/6/1 1. Place R56
G 39.2/6/1 R51 300/4 TEST19 8/5/20 X_102pf/50V/X7R/4
E9 TEST18 within 0.5 inch
THERM_SIC S D SMB_CLK_SENSE SMB_CLK_SENSE 27,32 AJ7 TEST13
F6 TEST9
Q60 G
SMB_DATA_SENSE 27,32 TP5 D6 TEST17 TEST24 AK8 TP20
THERM_SID S DSMB_DATA_SENSE E7 AH8
TP7 TEST16 TEST23 TP16
TP8 F8 TEST15 TEST22 AJ9
Q61 X_N-2N7002_SOT23 C5 AL8 Add for AMD
TP4 TEST14 TEST21
AH9 AJ8 R100 R125 recommand VCC_DDR
TP12 TEST12 TEST20 TP13
300/4 2007/12/24
HP Recommand 2007/08/06 300/4
E5 TEST7 TEST28_H J10
AJ5 H9 VCC_DDR
TEST6 TEST28_L R58
TEST27 AK9 TP14

AH7
TEST26 AK5
G7
R110 300/4 15/6/1
15 mils
TEST3 TEST10 CPU_M_VREF
AJ6 TEST2 TEST8 D4
Add R125 R126 for AMD Test C63 C60
Pin Termination Update 0.1uf/10V/X7R/4 102pf/50V/X7R/4
VCC_DDR Rev1.0 2007/12/24 R57
15/6/1

B
N12-9400040-L06 B

+1.8V_S0 RN7 Add for AMD R126


15u
300R_8P4R/6 recommand 300/4 X_XDP1
1 2 2007/12/24 1 2
3 4 LDT_PWRGD_L 3 4
5 6 LDT_RST#_L 5 6
7 8 LDT_STOP#_L CPU_DBREQ_L 7 8
CPU_DBRDY 9 10 VCC3
CPU_TCK 11 12
CPU_TMS 13 14
CPU_TDI 15 16 VCC_DDR
For S3 issue(LDT RST can not still low) CPU_TRST_L
CPU_TDO
17
19
18
20
R80
X_220/4

5
RN3 21 22
-LDTSTOP LDT_STOP#_L V LDT_RST#_L
15,19 -LDTSTOP 1 2 23 24 6 1
15,19 -LDT_RST -LDT_RST 3 4 LDT_RST#_L 26 G
C487 KEY
5 6

2
19 LDT_PWRGD LDT_PWRGD 7 8 LDT_PWRGD_L X_0.22uf/16V/X7R/6
X_hdr_k8_hdt_B
8P4R-0R0402 U8A

VCC_DDR
Solder side X_NC7WZ07_SC70-6

R183
X_4.7K/4

X_10K/4
VCC3
B

Q17
LDT_PWRGD E C
X_N-2N3904_SOT23 PWROK_PWM 37

A A
LDT_RST#_L
15,34 SYS_PWRGD R199 0/4
1

J80
HP recommend 2007/10/19 X_D1x2-BK
MICRO-STAR INt'L CO., LTD.
2

Title
PU-HT & Straps
Size Document Number Rev
1.0
FOR AMD HT DEBUG MS-7500
Date: Wednesday, December 26, 2007 Sheet 6 of 48
5 4 3 2 1
5 4 3 2 1

XU1B XU1C
MEM_MA_DATA[63..0] 10,11 MEM_MB_DATA[63..0] 10,11
MEMORY INTERFACE A MEMORY INTERFACE B
MEM_MA0_CLK_H2 AG21 AE14 MEM_MA_DATA63 MEM_MB0_CLK_H2 AJ19 AH13 MEM_MB_DATA63
D 10,12 MEM_MA0_CLK_H2 MA0_CLK_H(2) MA_DATA(63) 10,12 MEM_MB0_CLK_H2 MB0_CLK_H(2) MB_DATA(63) D
MEM_MA0_CLK_L2 AG20 AG14 MEM_MA_DATA62 MEM_MB0_CLK_L2 AK19 AL13 MEM_MB_DATA62
10,12 MEM_MA0_CLK_L2 MA0_CLK_L(2) MA_DATA(62) 10,12 MEM_MB0_CLK_L2 MB0_CLK_L(2) MB_DATA(62)
MEM_MA0_CLK_H1 G19 AG16 MEM_MA_DATA61 MEM_MB0_CLK_H1 A18 AL15 MEM_MB_DATA61
10,12 MEM_MA0_CLK_H1 MA0_CLK_H(1) MA_DATA(61) 10,12 MEM_MB0_CLK_H1 MB0_CLK_H(1) MB_DATA(61)
MEM_MA0_CLK_L1 H19 AD17 MEM_MA_DATA60 MEM_MB0_CLK_L1 A19 AJ15 MEM_MB_DATA60
10,12 MEM_MA0_CLK_L1 MA0_CLK_L(1) MA_DATA(60) 10,12 MEM_MB0_CLK_L1 MB0_CLK_L(1) MB_DATA(60)
MEM_MA0_CLK_H0 U27 AD13 MEM_MA_DATA59 MEM_MB0_CLK_H0 U31 AF13 MEM_MB_DATA59
10,12 MEM_MA0_CLK_H0 MA0_CLK_H(0) MA_DATA(59) 10,12 MEM_MB0_CLK_H0 MB0_CLK_H(0) MB_DATA(59)
MEM_MA0_CLK_L0 U26 AE13 MEM_MA_DATA58 MEM_MB0_CLK_L0 U30 AG13 MEM_MB_DATA58
10,12 MEM_MA0_CLK_L0 MA0_CLK_L(0) MA_DATA(58) 10,12 MEM_MB0_CLK_L0 MB0_CLK_L(0) MB_DATA(58)
AG15 MEM_MA_DATA57 AL14 MEM_MB_DATA57
MEM_MA0_CS_L1 MA_DATA(57) MEM_MA_DATA56 MEM_MB0_CS_L1 MB_DATA(57) MEM_MB_DATA56
10,12 MEM_MA0_CS_L1 AC25 MA0_CS_L(1) MA_DATA(56) AE16 10,12 MEM_MB0_CS_L1 AE30 MB0_CS_L(1) MB_DATA(56) AK15
MEM_MA0_CS_L0 AA24 AG17 MEM_MA_DATA55 MEM_MB0_CS_L0 AC31 AL16 MEM_MB_DATA55
10,12 MEM_MA0_CS_L0 MA0_CS_L(0) MA_DATA(55) 10,12 MEM_MB0_CS_L0 MB0_CS_L(0) MB_DATA(55)
AE18 MEM_MA_DATA54 AL17 MEM_MB_DATA54
MEM_MA0_ODT0 MA_DATA(54) MEM_MA_DATA53 MEM_MB0_ODT0 MB_DATA(54) MEM_MB_DATA53
10,12 MEM_MA0_ODT0 AC28 MA0_ODT(0) MA_DATA(53) AD21 10,12 MEM_MB0_ODT0 AD29 MB0_ODT(0) MB_DATA(53) AK21
AG22 MEM_MA_DATA52 AL21 MEM_MB_DATA52
MEM_MA1_CLK_H2 AE20 MA_DATA(52) MEM_MA_DATA51 MEM_MB1_CLK_H2 AL19 MB_DATA(52) MEM_MB_DATA51
11,12 MEM_MA1_CLK_H2 MA1_CLK_H(2) MA_DATA(51) AE17 11,12 MEM_MB1_CLK_H2 MB1_CLK_H(2) MB_DATA(51) AH15
MEM_MA1_CLK_L2 AE19 AF17 MEM_MA_DATA50 MEM_MB1_CLK_L2 AL18 AJ16 MEM_MB_DATA50
11,12 MEM_MA1_CLK_L2 MA1_CLK_L(2) MA_DATA(50) 11,12 MEM_MB1_CLK_L2 MB1_CLK_L(2) MB_DATA(50)
MEM_MA1_CLK_H1 G20 AF21 MEM_MA_DATA49 MEM_MB1_CLK_H1 C19 AH19 MEM_MB_DATA49
11,12 MEM_MA1_CLK_H1 MA1_CLK_H(1) MA_DATA(49) 11,12 MEM_MB1_CLK_H1 MB1_CLK_H(1) MB_DATA(49)
MEM_MA1_CLK_L1 G21 AE21 MEM_MA_DATA48 MEM_MB1_CLK_L1 D19 AL20 MEM_MB_DATA48
11,12 MEM_MA1_CLK_L1 MA1_CLK_L(1) MA_DATA(48) 11,12 MEM_MB1_CLK_L1 MB1_CLK_L(1) MB_DATA(48)
MEM_MA1_CLK_H0 V27 AF23 MEM_MA_DATA47 MEM_MB1_CLK_H0 W29 AJ22 MEM_MB_DATA47
11,12 MEM_MA1_CLK_H0 MA1_CLK_H(0) MA_DATA(47) 11,12 MEM_MB1_CLK_H0 MB1_CLK_H(0) MB_DATA(47)
MEM_MA1_CLK_L0 W27 AE23 MEM_MA_DATA46 MEM_MB1_CLK_L0 W28 AL22 MEM_MB_DATA46
11,12 MEM_MA1_CLK_L0 MA1_CLK_L(0) MA_DATA(46) 11,12 MEM_MB1_CLK_L0 MB1_CLK_L(0) MB_DATA(46)
AJ26 MEM_MA_DATA45 AL24 MEM_MB_DATA45
MEM_MA1_CS_L1 MA_DATA(45) MEM_MA_DATA44 MEM_MB1_CS_L1 MB_DATA(45) MEM_MB_DATA44
11,12 MEM_MA1_CS_L1 AD27 MA1_CS_L(1) MA_DATA(44) AG26 11,12 MEM_MB1_CS_L1 AE29 MB1_CS_L(1) MB_DATA(44) AK25
MEM_MA1_CS_L0 AA25 AE22 MEM_MA_DATA43 MEM_MB1_CS_L0 AB31 AJ21 MEM_MB_DATA43
11,12 MEM_MA1_CS_L0 MA1_CS_L(0) MA_DATA(43) 11,12 MEM_MB1_CS_L0 MB1_CS_L(0) MB_DATA(43)
AG23 MEM_MA_DATA42 AH21 MEM_MB_DATA42
MEM_MA1_ODT0 MA_DATA(42) MEM_MA_DATA41 MEM_MB1_ODT0 MB_DATA(42) MEM_MB_DATA41
11,12 MEM_MA1_ODT0 AC27 MA1_ODT(0) MA_DATA(41) AH25 11,12 MEM_MB1_ODT0 AD31 MB1_ODT(0) MB_DATA(41) AH23
AF25 MEM_MA_DATA40 AJ24 MEM_MB_DATA40
MA_DATA(40) MEM_MA_DATA39 MB_DATA(40) MEM_MB_DATA39
MA_DATA(39) AJ28 MB_DATA(39) AL27
MEM_MA_CAS_L AB25 AJ29 MEM_MA_DATA38 MEM_MB_CAS_L AC29 AK27 MEM_MB_DATA38
10,11,12 MEM_MA_CAS_L MA_CAS_L MA_DATA(38) 10,11,12 MEM_MB_CAS_L MB_CAS_L MB_DATA(38)
MEM_MA_WE_L AB27 AF29 MEM_MA_DATA37 MEM_MB_WE_L AC30 AH31 MEM_MB_DATA37
10,11,12 MEM_MA_WE_L MA_WE_L MA_DATA(37) 10,11,12 MEM_MB_WE_L MB_WE_L MB_DATA(37)
MEM_MA_RAS_L AA26 AE26 MEM_MA_DATA36 MEM_MB_RAS_L AB29 AG30 MEM_MB_DATA36
10,11,12 MEM_MA_RAS_L MA_RAS_L MA_DATA(36) 10,11,12 MEM_MB_RAS_L MB_RAS_L MB_DATA(36)
AJ27 MEM_MA_DATA35 AL25 MEM_MB_DATA35
MEM_MA_BANK2 MA_DATA(35) MEM_MA_DATA34 MEM_MB_BANK2 MB_DATA(35) MEM_MB_DATA34
10,11,12 MEM_MA_BANK2 N25 MA_BANK(2) MA_DATA(34) AH27 10,11,12 MEM_MB_BANK2 N31 MB_BANK(2) MB_DATA(34) AL26
C MEM_MA_BANK1 Y27 AG29 MEM_MA_DATA33 MEM_MB_BANK1 AA31 AJ30 MEM_MB_DATA33 C
10,11,12 MEM_MA_BANK1 MA_BANK(1) MA_DATA(33) 10,11,12 MEM_MB_BANK1 MB_BANK(1) MB_DATA(33)
MEM_MA_BANK0 AA27 AF27 MEM_MA_DATA32 MEM_MB_BANK0 AA28 AJ31 MEM_MB_DATA32
10,11,12 MEM_MA_BANK0 MA_BANK(0) MA_DATA(32) 10,11,12 MEM_MB_BANK0 MB_BANK(0) MB_DATA(32)
E29 MEM_MA_DATA31 E31 MEM_MB_DATA31
MEM_MA_CKE1 MA_DATA(31) MEM_MA_DATA30 MEM_MB_CKE1 MB_DATA(31) MEM_MB_DATA30
11,12 MEM_MA_CKE1 L27 MA_CKE(1) MA_DATA(30) E28 11,12 MEM_MB_CKE1 M31 MB_CKE(1) MB_DATA(30) E30
MEM_MA_CKE0 M25 D27 MEM_MA_DATA29 MEM_MB_CKE0 M29 B27 MEM_MB_DATA29
10,12 MEM_MA_CKE0 MA_CKE(0) MA_DATA(29) 10,12 MEM_MB_CKE0 MB_CKE(0) MB_DATA(29)
C27 MEM_MA_DATA28 A27 MEM_MB_DATA28
MEM_MA_ADD15 MA_DATA(28) MEM_MA_DATA27 MEM_MB_ADD15 MB_DATA(28) MEM_MB_DATA27
10,11,12 MEM_MA_ADD[15..0] M27 MA_ADD(15) MA_DATA(27) G26 10,11,12 MEM_MB_ADD[15..0] N28 MB_ADD(15) MB_DATA(27) F29
MEM_MA_ADD14 N24 F27 MEM_MA_DATA26 MEM_MB_ADD14 N29 F31 MEM_MB_DATA26
MEM_MA_ADD13 MA_ADD(14) MA_DATA(26) MEM_MA_DATA25 MEM_MB_ADD13 MB_ADD(14) MB_DATA(26) MEM_MB_DATA25
AC26 MA_ADD(13) MA_DATA(25) C28 AE31 MB_ADD(13) MB_DATA(25) A29
MEM_MA_ADD12 N26 E27 MEM_MA_DATA24 MEM_MB_ADD12 N30 A28 MEM_MB_DATA24
MEM_MA_ADD11 MA_ADD(12) MA_DATA(24) MEM_MA_DATA23 MEM_MB_ADD11 MB_ADD(12) MB_DATA(24) MEM_MB_DATA23
P25 MA_ADD(11) MA_DATA(23) F25 P29 MB_ADD(11) MB_DATA(23) A25
MEM_MA_ADD10 Y25 E25 MEM_MA_DATA22 MEM_MB_ADD10 AA29 A24 MEM_MB_DATA22
MEM_MA_ADD9 MA_ADD(10) MA_DATA(22) MEM_MA_DATA21 MEM_MB_ADD9 MB_ADD(10) MB_DATA(22) MEM_MB_DATA21
N27 MA_ADD(9) MA_DATA(21) E23 P31 MB_ADD(9) MB_DATA(21) C22
MEM_MA_ADD8 R24 D23 MEM_MA_DATA20 MEM_MB_ADD8 R29 D21 MEM_MB_DATA20
MEM_MA_ADD7 MA_ADD(8) MA_DATA(20) MEM_MA_DATA19 MEM_MB_ADD7 MB_ADD(8) MB_DATA(20) MEM_MB_DATA19
P27 MA_ADD(7) MA_DATA(19) E26 R28 MB_ADD(7) MB_DATA(19) A26
MEM_MA_ADD6 R25 C26 MEM_MA_DATA18 MEM_MB_ADD6 R31 B25 MEM_MB_DATA18
MEM_MA_ADD5 MA_ADD(6) MA_DATA(18) MEM_MA_DATA17 MEM_MB_ADD5 MB_ADD(6) MB_DATA(18) MEM_MB_DATA17
R26 MA_ADD(5) MA_DATA(17) G23 R30 MB_ADD(5) MB_DATA(17) B23
MEM_MA_ADD4 R27 F23 MEM_MA_DATA16 MEM_MB_ADD4 T31 A22 MEM_MB_DATA16
MEM_MA_ADD3 MA_ADD(4) MA_DATA(16) MEM_MA_DATA15 MEM_MB_ADD3 MB_ADD(4) MB_DATA(16) MEM_MB_DATA15
T25 MA_ADD(3) MA_DATA(15) E22 T29 MB_ADD(3) MB_DATA(15) B21
MEM_MA_ADD2 U25 E21 MEM_MA_DATA14 MEM_MB_ADD2 U29 A20 MEM_MB_DATA14
MEM_MA_ADD1 MA_ADD(2) MA_DATA(14) MEM_MA_DATA13 MEM_MB_ADD1 MB_ADD(2) MB_DATA(14) MEM_MB_DATA13
T27 MA_ADD(1) MA_DATA(13) F17 U28 MB_ADD(1) MB_DATA(13) C16
MEM_MA_ADD0 W24 G17 MEM_MA_DATA12 MEM_MB_ADD0 AA30 D15 MEM_MB_DATA12
MA_ADD(0) MA_DATA(12) MEM_MA_DATA11 MB_ADD(0) MB_DATA(12) MEM_MB_DATA11
MA_DATA(11) G22 MB_DATA(11) C21
MEM_MA_DQS_H7 AD15 F21 MEM_MA_DATA10 MEM_MB_DQS_H7 AK13 A21 MEM_MB_DATA10
10,11 MEM_MA_DQS_H7 MA_DQS_H(7) MA_DATA(10) 10,11 MEM_MB_DQS_H7 MB_DQS_H(7) MB_DATA(10)
MEM_MA_DQS_L7 AE15 G18 MEM_MA_DATA9 MEM_MB_DQS_L7 AJ13 A17 MEM_MB_DATA9
10,11 MEM_MA_DQS_L7 MA_DQS_L(7) MA_DATA(9) 10,11 MEM_MB_DQS_L7 MB_DQS_L(7) MB_DATA(9)
MEM_MA_DQS_H6 AG18 E17 MEM_MA_DATA8 MEM_MB_DQS_H6 AK17 A16 MEM_MB_DATA8
10,11 MEM_MA_DQS_H6 MA_DQS_H(6) MA_DATA(8) 10,11 MEM_MB_DQS_H6 MB_DQS_H(6) MB_DATA(8)
MEM_MA_DQS_L6 AG19 G16 MEM_MA_DATA7 MEM_MB_DQS_L6 AJ17 B15 MEM_MB_DATA7
10,11 MEM_MA_DQS_L6 MA_DQS_L(6) MA_DATA(7) 10,11 MEM_MB_DQS_L6 MB_DQS_L(6) MB_DATA(7)
MEM_MA_DQS_H5 AG24 E15 MEM_MA_DATA6 MEM_MB_DQS_H5 AK23 A14 MEM_MB_DATA6
10,11 MEM_MA_DQS_H5 MA_DQS_H(5) MA_DATA(6) 10,11 MEM_MB_DQS_H5 MB_DQS_H(5) MB_DATA(6)
MEM_MA_DQS_L5 AG25 G13 MEM_MA_DATA5 MEM_MB_DQS_L5 AL23 E13 MEM_MB_DATA5
10,11 MEM_MA_DQS_L5 MA_DQS_L(5) MA_DATA(5) 10,11 MEM_MB_DQS_L5 MB_DQS_L(5) MB_DATA(5)
MEM_MA_DQS_H4 AG27 H13 MEM_MA_DATA4 MEM_MB_DQS_H4 AL28 F13 MEM_MB_DATA4
B 10,11 MEM_MA_DQS_H4 MA_DQS_H(4) MA_DATA(4) 10,11 MEM_MB_DQS_H4 MB_DQS_H(4) MB_DATA(4) B
MEM_MA_DQS_L4 AG28 H17 MEM_MA_DATA3 MEM_MB_DQS_L4 AL29 C15 MEM_MB_DATA3
10,11 MEM_MA_DQS_L4 MA_DQS_L(4) MA_DATA(3) 10,11 MEM_MB_DQS_L4 MB_DQS_L(4) MB_DATA(3)
MEM_MA_DQS_H3 D29 E16 MEM_MA_DATA2 MEM_MB_DQS_H3 D31 A15 MEM_MB_DATA2
10,11 MEM_MA_DQS_H3 MA_DQS_H(3) MA_DATA(2) 10,11 MEM_MB_DQS_H3 MB_DQS_H(3) MB_DATA(2)
MEM_MA_DQS_L3 C29 E14 MEM_MA_DATA1 MEM_MB_DQS_L3 C31 A13 MEM_MB_DATA1
10,11 MEM_MA_DQS_L3 MA_DQS_L(3) MA_DATA(1) 10,11 MEM_MB_DQS_L3 MB_DQS_L(3) MB_DATA(1)
MEM_MA_DQS_H2 C25 G14 MEM_MA_DATA0 MEM_MB_DQS_H2 C24 D13 MEM_MB_DATA0
10,11 MEM_MA_DQS_H2 MA_DQS_H(2) MA_DATA(0) 10,11 MEM_MB_DQS_H2 MB_DQS_H(2) MB_DATA(0)
MEM_MA_DQS_L2 D25 MEM_MB_DQS_L2 C23
10,11 MEM_MA_DQS_L2 MA_DQS_L(2) 10,11 MEM_MB_DQS_L2 MB_DQS_L(2)
MEM_MA_DQS_H1 E19 J28 MEM_MB_DQS_H1 D17 J31
10,11 MEM_MA_DQS_H1 MA_DQS_H(1) MA_DQS_H(8) 10,11 MEM_MB_DQS_H1 MB_DQS_H(1) MB_DQS_H(8)
MEM_MA_DQS_L1 F19 J27 MEM_MB_DQS_L1 C17 J30
10,11 MEM_MA_DQS_L1 MA_DQS_L(1) MA_DQS_L(8) 10,11 MEM_MB_DQS_L1 MB_DQS_L(1) MB_DQS_L(8)
MEM_MA_DQS_H0 F15 MEM_MB_DQS_H0 C14
10,11 MEM_MA_DQS_H0 MA_DQS_H(0) 10,11 MEM_MB_DQS_H0 MB_DQS_H(0)
MEM_MA_DQS_L0 G15 J25 MEM_MB_DQS_L0 C13 J29
10,11 MEM_MA_DQS_L0 MA_DQS_L(0) MA_DM(8) 10,11 MEM_MB_DQS_L0 MB_DQS_L(0) MB_DM(8)
MEM_MA_DM7 AF15 K25 MEM_MB_DM7 AJ14 K29
10,11 MEM_MA_DM7 MA_DM(7) MA_CHECK(7) 10,11 MEM_MB_DM7 MB_DM(7) MB_CHECK(7)
MEM_MA_DM6 AF19 J26 MEM_MB_DM6 AH17 K31
10,11 MEM_MA_DM6 MA_DM(6) MA_CHECK(6) 10,11 MEM_MB_DM6 MB_DM(6) MB_CHECK(6)
MEM_MA_DM5 AJ25 G28 MEM_MB_DM5 AJ23 G30
10,11 MEM_MA_DM5 MA_DM(5) MA_CHECK(5) 10,11 MEM_MB_DM5 MB_DM(5) MB_CHECK(5)
MEM_MA_DM4 AH29 G27 MEM_MB_DM4 AK29 G29
10,11 MEM_MA_DM4 MA_DM(4) MA_CHECK(4) 10,11 MEM_MB_DM4 MB_DM(4) MB_CHECK(4)
MEM_MA_DM3 B29 L24 MEM_MB_DM3 C30 L29
10,11 MEM_MA_DM3 MA_DM(3) MA_CHECK(3) 10,11 MEM_MB_DM3 MB_DM(3) MB_CHECK(3)
MEM_MA_DM2 E24 K27 MEM_MB_DM2 A23 L28
10,11 MEM_MA_DM2 MA_DM(2) MA_CHECK(2) 10,11 MEM_MB_DM2 MB_DM(2) MB_CHECK(2)
MEM_MA_DM1 E18 H29 MEM_MB_DM1 B17 H31
10,11 MEM_MA_DM1 MA_DM(1) MA_CHECK(1) 10,11 MEM_MB_DM1 MB_DM(1) MB_CHECK(1)
MEM_MA_DM0 H15 H27 MEM_MB_DM0 B13 G31
10,11 MEM_MA_DM0 MA_DM(0) MA_CHECK(0) 10,11 MEM_MB_DM0 MB_DM(0) MB_CHECK(0)

N12-9400040-L06 N12-9400040-L06

A A

MICRO-STAR INt'L CO., LTD.


Title
CPU-Memory
Size Document Number Rev
1.0
MS-7500
Date: Wednesday, December 26, 2007 Sheet 7 of 48
5 4 3 2 1
5 4 3 2 1

VDD_NB VCORE
VCORE
XU1F XU1G XU1H VCCA_1V2 XU1I
VDD1 VDD2 VDD3 VDDIO X_0.01uf/25V/X7R/4
A4 A3 L14 AK20 AA20 N17 AJ4 H6 VLDT_RUN_B X_0.01uf/25V/X7R/4
VDDNB1 VSS1 VDD1 VSS1 VDD1 VSS1 VLDT_A1 VLDT_B1
A6 VDDNB2 VSS2 A7 L16 VDD2 VSS2 AK22 AA22 VDD2 VSS2 N19 AJ3 VLDT_A2 VLDT_B2 H5
B5 VDDNB3 VSS3 A9 L18 VDD3 VSS3 AK24 AB13 VDD3 VSS3 N21 AJ2 VLDT_A3 VLDT_B3 H2
B7 A11 M2 AK26 AB15 N23 VTT_DDR AJ1 H1 VTT_DDR C85
VDDNB4 VSS4 VDD4 VSS4 VDD4 VSS4 VLDT_A4 VLDT_B4 C86 C81 C82
D C6 VDDNB5 VSS5 AA4 M3 VDD5 VSS5 AK28 AB17 VDD5 VSS5 P2 D
C8 VDDNB6 VSS6 AA5 M7 VDD6 VSS6 AK30 AB19 VDD6 VSS6 P3 D12 VTT1 VTT5 AK12
D7 AA7 M9 AL5 AB21 P8 C12 AJ12 X_0.01uf/25V/X7R/4
VDDNB7 VSS7 VDD7 VSS7 VDD7 VSS7 VCC_DDR VTT2 VTT6
D9 VDDNB8 VSS8 AA9 M11 VDD8 VSS8 B4 AB23 VDD8 VSS8 P10 B12 VTT3 VTT7 AH12
E8 AA11 M13 B9 AC12 P12 A12 AG12 4.7uf/10V/Y5V/8
VDDNB9 VSS9 VDD9 VSS9 VDD9 VSS9 VTT4 VTT8
E10 VDDNB10 VSS10 AA13 M15 VDD10 VSS10 B11 AC14 VDD10 VSS10 P14 VTT9 AL12
F9 VDDNB11 VSS11 AA15 M17 VDD11 VSS11 B14 AC16 VDD11 VSS11 P16 AB24 VDDIO1
VCORE F11 AA17 M19 B16 AC18 P18 AB26 K24
VDDNB12 VSS12 VDD12 VSS12 VDD12 VSS12 VDDIO2 VSS1
G10 VDDNB13 VSS13 AA19 N8 VDD13 VSS13 B18 AC20 VDD13 VSS13 P20 AB28 VDDIO3 VSS2 K26
G12 VDDNB14 VSS14 AA21 N10 VDD14 VSS14 B20 AC22 VDD14 VSS14 P22 AB30 VDDIO4 VSS3 K28
VSS15 AA23 N12 VDD15 VSS15 B22 AD11 VDD15 VSS15 R7 AC24 VDDIO5 VSS4 K30
AA8 VDD3 VSS16 AB2 N14 VDD16 VSS16 B24 AD23 VDD16 VSS16 R9 AD26 VDDIO6 VSS5 L7
AA10 AB3 N16 B26 AE12 R11 AD28 L9 C235 C240
VDD4 VSS17 VDD17 VSS17 VDD17 VSS17 VDDIO7 VSS6
AA12 VDD5 VSS18 AB8 N18 VDD18 VSS18 B28 AF11 VDD18 VSS18 R13 AD30 VDDIO8 VSS7 L11
AA14 AB10 P7 B30 L20 R15 AF30 L13 180pf/50V/NPO/4 180pf/50V/NPO/4
VDD6 VSS19 VDD19 VSS19 VDD19 VSS19 VDDIO9 VSS8
AA16 VDD7 VSS20 AB12 P9 VDD20 VSS20 C3 L22 VDD20 VSS20 R17 M24 VDDIO10 VSS9 L15
AA18 VDD8 VSS21 AB14 P11 VDD21 VSS21 D14 M21 VDD21 VSS21 R19 M26 VDDIO11 VSS10 L17
AB7 VDD9 VSS22 AB16 P13 VDD22 VSS22 D16 M23 VDD22 VSS22 R21 M28 VDDIO12 VSS11 L19
AB9 VDD10 VSS23 AB18 P15 VDD23 VSS23 D18 N20 VDD23 VSS23 R23 M30 VDDIO13 VSS12 L21
AB11 VDD11 VSS24 AB20 P17 VDD24 VSS24 D20 N22 VDD24 VSS24 T8 P24 VDDIO14 VSS13 L23
AC4 VDD12 VSS25 AB22 P19 VDD25 VSS25 D22 P21 VDD25 VSS25 T10 P26 VDDIO15 VSS14 M8
AC5 VDD13 VSS26 AC7 R4 VDD26 VSS26 D24 P23 VDD26 VSS26 T12 P28 VDDIO16 VSS15 M10
AC8 VDD14 VSS27 AC9 R5 VDD27 VSS27 D26 R22 VDD27 VSS27 T14 P30 VDDIO17 VSS16 M12
AC10 VDD15 VSS28 AC11 R8 VDD28 VSS28 D28 T23 VDD28 VSS28 T16 T24 VDDIO18 VSS17 M14
AD2 VDD16 VSS29 AC13 R10 VDD29 VSS29 D30 U22 VDD29 VSS29 T18 T26 VDDIO19 VSS18 M16
AD3 VDD17 VSS30 AC15 R12 VDD30 VSS30 E11 V23 VDD30 VSS30 T20 T28 VDDIO20 VSS19 M18
AD7 VDD18 VSS31 AC17 R14 VDD31 VSS31 F4 W22 VDD31 VSS31 T22 T30 VDDIO21 VSS20 M20
C AD9 VDD19 VSS32 AC19 R16 VDD32 VSS32 F14 Y23 VDD32 VSS32 U4 V25 VDDIO22 VSS21 M22 C
AE10 VDD20 VSS33 AC21 R18 VDD33 VSS33 F16 VSS33 U5 V26 VDDIO23 VSS22 N4
AF7 VDD21 VSS34 AC23 R20 VDD34 VSS34 F18 VSS34 U7 V28 VDDIO24 VSS23 N5
AF9 VDD22 VSS35 AD8 T2 VDD35 VSS35 F20 VSS35 U9 V30 VDDIO25 VSS24 N7
AG4 VDD23 VSS36 AD10 T3 VDD36 VSS36 F22 VSS36 U11 Y24 VDDIO26 VSS25 N9
AG5 VDD24 VSS37 AD12 T7 VDD37 VSS37 F24 VSS37 U13 Y26 VDDIO27 VSS26 N11
AG7 VDD25 VSS38 AD14 T9 VDD38 VSS38 F26 VSS38 U15 Y28 VDDIO28 VSS27 N13
AH2 VDD26 VSS39 AD16 T11 VDD39 VSS39 F28 VSS39 U17 Y29 VDDIO29 VSS28 N15
AH3 VDD27 VSS40 AD20 T13 VDD40 VSS40 F30 VSS40 U19
B3 VDD28 VSS41 AD22 T15 VDD41 VSS41 G9 VSS41 U21
C2
C4
VDD31 VSS42 AD24
AE4
T17
T19
VDD42 VSS42 G11
H8
VSS42 U23
V2
N12-9400040-L06
VDD32 VSS43 VDD43 VSS43 VSS43
D3 VDD35 VSS44 AE5 T21 VDD44 VSS44 H10 VSS44 V3
D5 VDD36 U8 VDD45 VSS45 H12 VSS45 V10
E4 VDD39 VSS46 AE11 U10 VDD46 VSS46 H14 VSS46 V12
E6 VDD40 VSS47 AF2 U12 VDD47 VSS47 H16 1 GND VSS47 V14
F5 VDD43 VSS48 AF3 U14 VDD48 VSS48 H18 2 GND VSS48 V16
F7 VDD44 VSS49 AF8 U16 VDD49 3 GND VSS49 V18
G6 VDD47 VSS50 AF10 U18 VDD50 VSS50 H24 VSS50 V20
G8 VDD48 VSS51 AF12 U20 VDD51 VSS51 H26 VSS51 V22
H7 VDD51 VSS52 AF14 V9 VDD52 VSS52 H28 VSS52 W9
H11 VDD52 VSS53 AF16 V11 VDD53 VSS53 H30 VSS53 W11
H23 VDD53 VSS54 AF18 V13 VDD54 VSS54 J4 VSS54 W13
J8 VDD54 VSS55 AF20 V15 VDD55 VSS55 J5 VSS55 W15
J12 VDD55 VSS56 AF22 V17 VDD56 VSS56 J7 VSS56 W17
J14 VDD56 VSS57 AF24 V19 VDD57 VSS57 J9 VSS57 W19
J16 VDD57 VSS58 AF26 V21 VDD58 VSS58 J11 VSS58 W21
B J18 VDD58 VSS59 AF28 W4 VDD59 VSS59 J13 VSS59 W23 B
J20 VDD59 VSS60 AG10 W5 VDD60 VSS60 J15 VSS60 Y8
J22 VDD60 VSS61 AG11 W8 VDD61 VSS61 J17 VSS61 Y10
J24 VDD61 VSS62 AH14 W10 VDD62 VSS62 J19 VSS62 Y12
K7 VDD62 VSS63 AH16 W12 VDD63 VSS63 J21 VSS63 W7
K9 VDD63 VSS64 AH18 W14 VDD64 VSS64 J23 VSS64 Y20
K11 VDD64 VSS65 AH20 W16 VDD65 VSS65 K2 VSS65 Y22
K13 VDD65 VSS66 AH22 W18 VDD66 VSS66 K3
K15 VDD66 VSS67 AH24 W20 VDD67 VSS67 K8
K17
K19
VDD67 VSS68 AH26
AH28
Y2
Y3
VDD68 VSS68 K10
K12
N12-9400040-L06
VDD68 VSS69 VDD69 VSS69
K21 VDD69 VSS70 AH30 Y7 VDD70 VSS70 K14
K23 VDD70 VSS71 AK2 Y9 VDD71 VSS71 K16
L4 VDD71 VSS72 AK14 Y11 VDD72 VSS72 K18
L5 VDD72 VSS73 AK16 Y13 VDD73 VSS73 K20
L8 VDD73 VSS74 AK18 Y15 VDD74 VSS74 K22
L10 VDD74 VSS240 Y14 Y21 VDD75 VSS75 Y18
L12 VDD75 VSS241 Y16
Y17 VDD150
Y19 VDD151 N12-9400040-L06
N12-9400040-L06

A A

MICRO-STAR INt'L CO., LTD.


Title
CPU-Power & GND
Size Document Number Rev
1.0
MS-7500
Date: Wednesday, December 26, 2007 Sheet 8 of 48
5 4 3 2 1
5 4 3 2 1

VCC_DDR VCC_DDR-Decoupling
VCCA_1V2-Decoupling
0.22uf/16V/X7R/6
VTT_DDR-Decoupling VCCA_1V2
C155 C444 C90 C91
0.22uf/16V/X7R/6 X_0.22uf/16V/X7R/6
VTT_DDR 180pf/50V/NPO/4
C156 C159 C174 C162 C182
100p/50V/NPO/4 2.2uf/6.3V/X5R/6 0.22uf/16V/X7R/6
4.7uf/16V/X7R/8
C259 C194 C188 C55
VCC_DDR VCC_DDR 0.22uf/16V/X7R/6 X_0.22uf/16V/X7R/6
D 102pf/50V/X7R/6 VCC_DDR D
0.22uf/16V/X7R/6 2.2uf/6.3V/X5R/6
180pf/50V/NPO/4 10pf/50V/NPO/6
C469 C450 C173 C97 C92 0.22uf/16V/X7R/6 C201
C690 C691
2.2uf/6.3V/X5R/6 180pf/50V/NPO/4

0.22uf/16V/X7R/6 0.22uf/16V/X7R/6 0.22uf/16V/X7R/6


VTT_DDR VCCA_1V2
VCC_DDR X_0.22uf/16V/X7R/6
X_180pf/50V/NPO/4 4.7uf/16V/X7R/8 180pf/50V/NPO/4

C168 C189 C39 C23


C608 0.1uf/25V/Y5V/6 C191 C166 C179 C187 C185 C280 C281
X_102pf/50V/X7R/6

180pf/50V/NPO/4 X_102pf/50V/X7R/6 C609 100pf/50V/NPO/6 10uf/6.3V/X5R/1206 0.22uf/16V/X7R/6 180pf/50V/NPO/4


X_0.22uf/16V/X7R/6

VCCA_1V2 Place close to Q22


C C
C760 10uf/10V/Y5V/1206

C758 4.7uf/16V/X7R/8

C761 0.1uf/25V/Y5V/6
VCORE-Decoupling
C759 0.01uf/25V/X7R/4
VDD_NB
22uf/6.3V/X5R/1206
VCORE 22uf/6.3V/X5R/8 4.7uf/16V/X7R/8 0.22uf/16V/X7R/6 0.01uf/25V/X7R/4
X_22uf/6.3V/X5R/1206
X_22uf/6.3V/X5R/1206 X_22uf/6.3V/X5R/1206 C682 C683 C681 C685
C69 C421 C423 C424 C425 C426
C463 C458 C454 C448 C443 C440 C466 C462 C457 C453 C447

22uf/6.3V/X5R/1206 10uf/6.3V/X5R/8 0.22uf/16V/X7R/6 0.01uf/25V/X7R/4 0.01uf/25V/X7R/4

X_22uf/6.3V/X5R/1206
10uf/16V/X7R/1206 10uf/16V/X7R/1206 10uf/16V/X7R/1206 10uf/16V/X7R/1206
10uf/16V/X7R/1206 10uf/16V/X7R/1206 10uf/16V/X7R/1206 VCC_DDR

VCORE 22uf/6.3V/X5R/8 4.7uf/16V/X7R/8 4.7uf/16V/X7R/8 0.22uf/16V/X7R/6 0.01uf/25V/X7R/4


VCC_DDR
0.22uf/16V/X7R/6 0.01uf/25V/X7R/4 C692 C695
C693 C694 C456 C610 C611 C613 C612 C485 C486 C429 C146

C437 C436 C470 C438 C93 C136 C268


2.2uf/6.3V/X5R/6 10uf/16V/X7R/1206 22uf/6.3V/X5R/8 10uf/6.3V/X5R/8 4.7uf/16V/X7R/8 4.7uf/16V/X7R/8 0.22uf/16V/X7R/6 0.01uf/25V/X7R/4
B B
180pf/50V/NPO/4 2.2uf/6.3V/X5R/6 10uf/16V/X7R/1206

0.22uf/16V/X7R/6 0.22uf/16V/X7R/6 VTT_DDR

VCORE 0.1uf/16V/X7R/8 4.7uf/16V/X7R/8 4.7uf/16V/X7R/8 4.7uf/16V/X7R/8 4.7uf/16V/X7R/8 0.22uf/16V/X7R/6 0.22uf/16V/X7R/6 0.01uf/25V/X7R/4

VCORE C696 C461


C66 C58 C62 C192 C697 C698 C699 C701 C47 C48 C181 C177 C275 C430 C171 C526
X_10uf/6.3V/X5R/8 10uf/6.3V/X5R/8 10uf/6.3V/X5R/8

C689 C684 C687 C649 C686 22uf/6.3V/X5R/1206 4.7uf/16V/X7R/8 4.7uf/16V/X7R/8 4.7uf/16V/X7R/8 4.7uf/16V/X7R/8 0.22uf/16V/X7R/6 0.22uf/16V/X7R/6 33pf/50V/NPO/6 0.01uf/25V/X7R/4
0.22uf/16V/X7R/6
C688 10uf/6.3V/X5R/8
C512 VDD_NB
10uf/6.3V/X5R/8 100pf/50V/NPO/8 X_10uf/6.3V/X5R/8

VCORE VCC_DDR
C272
2.2uf/6.3V/X5R/6 10pf/25V/NPO/4 10pf/25V/NPO/4

C413 C418 C207 C151 C167 C169 C87 C128


0.22uf/16V/X7R/6 0.22uf/16V/X7R/6 180pf/50V/NPO/4
VCORE
100p/50V/NPO/4 100p/50V/NPO/4 180pf/50V/NPO/4
VCORE
VCORE

A C56 C61 C68 A


4.7uf/16V/X7R/8 4.7uf/16V/X7R/8 4.7uf/16V/X7R/8

C419 C420
0.01uf/25V/X7R/4 0.01uf/25V/X7R/4
MICRO-STAR INt'L CO., LTD.
Title
CPU-Decoupling
Size Document Number Rev
1.0
MS-7500
Date: Wednesday, December 26, 2007 Sheet 9 of 48
5 4 3 2 1
5 4 3 2 1

VCC_DDR VCC3 VCC_DDR VCC3

102

191
194
181
175
170

197

172
187
184
178
189

238

161
162
167
168

102

191
194
181
175
170

197

172
187
184
178
189

238

161
162
167
168
D D
XMM1 XMM2

55
18
19

68

51
56
62
72
75
78

53
59
64

69

67

42
43
48
49

55
18
19

68

51
56
62
72
75
78

53
59
64

69

67

42
43
48
49
RC0
RC1
NC
NC/TEST
NC

VDD0
VDD1
VDD2
VDD3
VDD3
VDD4
VDD5
VDD6
VDD7
VDD8
VDDQ0
VDDQ1
VDDQ2
VDDQ3
VDDQ4
VDDQ4
VDDQ5
VDDQ6
VDDQ7
VDDQ7
VDDQ8
VDDQ9

VDDSPD

CB0
CB1
CB2
CB3
CB4
CB5
CB6
CB7

RC0
RC1
NC
NC/TEST
NC

VDD0
VDD1
VDD2
VDD3
VDD3
VDD4
VDD5
VDD6
VDD7
VDD8
VDDQ0
VDDQ1
VDDQ2
VDDQ3
VDDQ4
VDDQ4
VDDQ5
VDDQ6
VDDQ7
VDDQ7
VDDQ8
VDDQ9

VDDSPD

CB0
CB1
CB2
CB3
CB4
CB5
CB6
CB7
7,11 MEM_MA_DATA[63..0] 7,11 MEM_MB_DATA[63..0]
MEM_MA_DATA0 3 MEM_MB_DATA0 3
MEM_MA_DATA1 DQ0 MEM_MA_DQS_H0 MEM_MB_DATA1 DQ0 MEM_MB_DQS_H0
4 DQ1 DQS0 7 MEM_MA_DQS_H0 7,11 4 DQ1 DQS0 7 MEM_MB_DQS_H0 7,11
MEM_MA_DATA2 9 6 MEM_MA_DQS_L0 MEM_MB_DATA2 9 6 MEM_MB_DQS_L0
DQ2 DQS0# MEM_MA_DQS_L0 7,11 DQ2 DQS0# MEM_MB_DQS_L0 7,11
MEM_MA_DATA3 10 16 MEM_MA_DQS_H1 MEM_MB_DATA3 10 16 MEM_MB_DQS_H1
DQ3 DQS1 MEM_MA_DQS_H1 7,11 DQ3 DQS1 MEM_MB_DQS_H1 7,11
MEM_MA_DATA4 122 15 MEM_MA_DQS_L1 MEM_MB_DATA4 122 15 MEM_MB_DQS_L1
DQ4 DQS1# MEM_MA_DQS_L1 7,11 DQ4 DQS1# MEM_MB_DQS_L1 7,11
MEM_MA_DATA5 123 28 MEM_MA_DQS_H2 MEM_MB_DATA5 123 28 MEM_MB_DQS_H2
DQ5 DQS2 MEM_MA_DQS_H2 7,11 DQ5 DQS2 MEM_MB_DQS_H2 7,11
MEM_MA_DATA6 128 27 MEM_MA_DQS_L2 MEM_MB_DATA6 128 27 MEM_MB_DQS_L2
DQ6 DQS2# MEM_MA_DQS_L2 7,11 DQ6 DQS2# MEM_MB_DQS_L2 7,11
MEM_MA_DATA7 129 37 MEM_MA_DQS_H3 MEM_MB_DATA7 129 37 MEM_MB_DQS_H3
DQ7 DQS3 MEM_MA_DQS_H3 7,11 DQ7 DQS3 MEM_MB_DQS_H3 7,11
MEM_MA_DATA8 12 36 MEM_MA_DQS_L3 MEM_MB_DATA8 12 36 MEM_MB_DQS_L3
DQ8 DQS3# MEM_MA_DQS_L3 7,11 DQ8 DQS3# MEM_MB_DQS_L3 7,11
MEM_MA_DATA9 13 84 MEM_MA_DQS_H4 MEM_MB_DATA9 13 84 MEM_MB_DQS_H4
DQ9 DQS4 MEM_MA_DQS_H4 7,11 DQ9 DQS4 MEM_MB_DQS_H4 7,11
MEM_MA_DATA10 21 83 MEM_MA_DQS_L4 MEM_MB_DATA10 21 83 MEM_MB_DQS_L4
DQ10 DQS4# MEM_MA_DQS_L4 7,11 DQ10 DQS4# MEM_MB_DQS_L4 7,11
MEM_MA_DATA11 22 93 MEM_MA_DQS_H5 MEM_MB_DATA11 22 93 MEM_MB_DQS_H5
DQ11 DQS5 MEM_MA_DQS_H5 7,11 DQ11 DQS5 MEM_MB_DQS_H5 7,11
MEM_MA_DATA12 131 92 MEM_MA_DQS_L5 MEM_MB_DATA12 131 92 MEM_MB_DQS_L5
DQ12 DQS5# MEM_MA_DQS_L5 7,11 DQ12 DQS5# MEM_MB_DQS_L5 7,11
MEM_MA_DATA13 132 105 MEM_MA_DQS_H6 MEM_MB_DATA13 132 105 MEM_MB_DQS_H6
DQ13 DQS6 MEM_MA_DQS_H6 7,11 DQ13 DQS6 MEM_MB_DQS_H6 7,11
MEM_MA_DATA14 140 104 MEM_MA_DQS_L6 MEM_MB_DATA14 140 104 MEM_MB_DQS_L6
DQ14 DQS6# MEM_MA_DQS_L6 7,11 DQ14 DQS6# MEM_MB_DQS_L6 7,11
MEM_MA_DATA15 141 114 MEM_MA_DQS_H7 MEM_MB_DATA15 141 114 MEM_MB_DQS_H7
DQ15 DQS7 MEM_MA_DQS_H7 7,11 DQ15 DQS7 MEM_MB_DQS_H7 7,11
MEM_MA_DATA16 24 113 MEM_MA_DQS_L7 MEM_MB_DATA16 24 113 MEM_MB_DQS_L7
DQ16 DQS7# MEM_MA_DQS_L7 7,11 DQ16 DQS7# MEM_MB_DQS_L7 7,11
MEM_MA_DATA17 25 46 MEM_MB_DATA17 25 46
MEM_MA_DATA18 DQ17 DQS8 MEM_MB_DATA18 DQ17 DQS8
30 DQ18 DQS8# 45 30 DQ18 DQS8# 45
MEM_MA_DATA19 31 MEM_MB_DATA19 31
MEM_MA_DATA20 DQ19 MEM_MA_ADD0 MEM_MB_DATA20 DQ19 MEM_MB_ADD0
143 DQ20 A0 188 143 DQ20 A0 188
MEM_MA_DATA21 144 183 MEM_MA_ADD1 MEM_MB_DATA21 144 183 MEM_MB_ADD1
MEM_MA_DATA22 DQ21 A1 MEM_MA_ADD2 MEM_MB_DATA22 DQ21 A1 MEM_MB_ADD2
149 DQ22 A2 63 149 DQ22 A2 63
MEM_MA_DATA23 150 182 MEM_MA_ADD3 MEM_MB_DATA23 150 182 MEM_MB_ADD3
MEM_MA_DATA24 DQ23 A3 MEM_MA_ADD4 MEM_MB_DATA24 DQ23 A3 MEM_MB_ADD4
33 DQ24 A4 61 33 DQ24 A4 61
MEM_MA_DATA25 34 60 MEM_MA_ADD5 MEM_MB_DATA25 34 60 MEM_MB_ADD5
MEM_MA_DATA26 DQ25 A5 MEM_MA_ADD6 MEM_MB_DATA26 DQ25 A5 MEM_MB_ADD6
39 DQ26 A6 180 39 DQ26 A6 180
MEM_MA_DATA27 40 58 MEM_MA_ADD7 MEM_MB_DATA27 40 58 MEM_MB_ADD7
MEM_MA_DATA28 DQ27 A7 MEM_MA_ADD8 MEM_MB_DATA28 DQ27 A7 MEM_MB_ADD8
152 DQ28 A8 179 152 DQ28 A8 179
MEM_MA_DATA29 153 177 MEM_MA_ADD9 MEM_MB_DATA29 153 177 MEM_MB_ADD9
MEM_MA_DATA30 DQ29 A9 MEM_MA_ADD10 MEM_MB_DATA30 DQ29 A9 MEM_MB_ADD10
158 DQ30 A10_AP 70 158 DQ30 A10_AP 70
MEM_MA_DATA31 159 57 MEM_MA_ADD11 MEM_MB_DATA31 159 57 MEM_MB_ADD11
MEM_MA_DATA32 DQ31 A11 MEM_MA_ADD12 MEM_MB_DATA32 DQ31 A11 MEM_MB_ADD12
80 DQ32 A12 176 80 DQ32 A12 176
MEM_MA_DATA33 81 196 MEM_MA_ADD13 MEM_MB_DATA33 81 196 MEM_MB_ADD13
MEM_MA_DATA34 DQ33 A13 MEM_MA_ADD14 MEM_MB_DATA34 DQ33 A13 MEM_MB_ADD14
86 DQ34 A14 174 86 DQ34 A14 174
MEM_MA_DATA35 87 173 MEM_MA_ADD15 MEM_MB_DATA35 87 173 MEM_MB_ADD15
DQ35 A15 MEM_MA_ADD[15..0] 7,11,12 DQ35 A15 MEM_MB_ADD[15..0] 7,11,12
C MEM_MA_DATA36 199 MEM_MB_DATA36 199 C
MEM_MA_DATA37 DQ36 MEM_MA_BANK2 MEM_MB_DATA37 DQ36 MEM_MB_BANK2
200 DQ37 A16/BA2 54 MEM_MA_BANK2 7,11,12 200 DQ37 A16/BA2 54 MEM_MB_BANK2 7,11,12
MEM_MA_DATA38 205 190 MEM_MA_BANK1 MEM_MB_DATA38 205 190 MEM_MB_BANK1
DQ38 BA1 MEM_MA_BANK1 7,11,12 DQ38 BA1 MEM_MB_BANK1 7,11,12
MEM_MA_DATA39 206 71 MEM_MA_BANK0 MEM_MB_DATA39 206 71 MEM_MB_BANK0
DQ39 BA0 MEM_MA_BANK0 7,11,12 DQ39 BA0 MEM_MB_BANK0 7,11,12
MEM_MA_DATA40 89 MEM_MB_DATA40 89
MEM_MA_DATA41 DQ40 MEM_MA_WE_L MEM_MB_DATA41 DQ40 MEM_MB_WE_L
90 DQ41 WE# 73 MEM_MA_WE_L 7,11,12 90 DQ41 WE# 73 MEM_MB_WE_L 7,11,12
MEM_MA_DATA42 95 74 MEM_MA_CAS_L MEM_MB_DATA42 95 74 MEM_MB_CAS_L
DQ42 CAS# MEM_MA_CAS_L 7,11,12 DQ42 CAS# MEM_MB_CAS_L 7,11,12
MEM_MA_DATA43 96 192 MEM_MA_RAS_L MEM_MB_DATA43 96 192 MEM_MB_RAS_L
DQ43 RAS# MEM_MA_RAS_L 7,11,12 DQ43 RAS# MEM_MB_RAS_L 7,11,12
MEM_MA_DATA44 208 MEM_MB_DATA44 208
MEM_MA_DATA45 DQ44 MEM_MA_DM0 MEM_MA_DM[7..0] MEM_MB_DATA45 DQ44 MEM_MB_DM0 MEM_MB_DM[7..0]
209 DQ45 DM0/DQS9 125 MEM_MA_DM[7..0] 7,11 209 DQ45 DM0/DQS9 125 MEM_MB_DM[7..0] 7,11
MEM_MA_DATA46 214 126 MEM_MB_DATA46 214 126
MEM_MA_DATA47 DQ46 NC/DQS9# MEM_MA_DM1 MEM_MB_DATA47 DQ46 NC/DQS9# MEM_MB_DM1
215 DQ47 DM1/DQS10 134 215 DQ47 DM1/DQS10 134
MEM_MA_DATA48 98 135 MEM_MB_DATA48 98 135
MEM_MA_DATA49 DQ48 NC/DQS10# MEM_MA_DM2 MEM_MB_DATA49 DQ48 NC/DQS10# MEM_MB_DM2
99 DQ49 DM2/DQS11 146 99 DQ49 DM2/DQS11 146
MEM_MA_DATA50 107 147 MEM_MB_DATA50 107 147
MEM_MA_DATA51 DQ50 NC/DQS11# MEM_MA_DM3 MEM_MB_DATA51 DQ50 NC/DQS11# MEM_MB_DM3
108 DQ51 DM3/DQS12 155 108 DQ51 DM3/DQS12 155
MEM_MA_DATA52 217 156 MEM_MB_DATA52 217 156
MEM_MA_DATA53 DQ52 NC/DQS12# MEM_MA_DM4 MEM_MB_DATA53 DQ52 NC/DQS12# MEM_MB_DM4
218 DQ53 DM4/DQS13 202 218 DQ53 DM4/DQS13 202
MEM_MA_DATA54 226 203 MEM_MB_DATA54 226 203
MEM_MA_DATA55 DQ54 NC/DQS13# MEM_MA_DM5 MEM_MB_DATA55 DQ54 NC/DQS13# MEM_MB_DM5
227 DQ55 DM5/DQS14 211 227 DQ55 DM5/DQS14 211
MEM_MA_DATA56 110 212 MEM_MB_DATA56 110 212
MEM_MA_DATA57 DQ56 NC/DQS14# MEM_MA_DM6 MEM_MB_DATA57 DQ56 NC/DQS14# MEM_MB_DM6
111 DQ57 DM6/DQS15 223 111 DQ57 DM6/DQS15 223
MEM_MA_DATA58 116 224 MEM_MB_DATA58 116 224
MEM_MA_DATA59 DQ58 NC/DQS15# MEM_MA_DM7 MEM_MB_DATA59 DQ58 NC/DQS15# MEM_MB_DM7
117 DQ59 DM7/DQS16 232 117 DQ59 DM7/DQS16 232
MEM_MA_DATA60 229 233 MEM_MB_DATA60 229 233
MEM_MA_DATA61 DQ60 NC/DQS16# MEM_MB_DATA61 DQ60 NC/DQS16#
230 DQ61 DM8/DQS17 164 230 DQ61 DM8/DQS17 164
MEM_MA_DATA62 235 165 MEM_MB_DATA62 235 165
MEM_MA_DATA63 DQ62 NC/DQS17# MEM_MB_DATA63 DQ62 NC/DQS17#
236 DQ63 236 DQ63
195 MEM_MA0_ODT0 195 MEM_MB0_ODT0
ODT0 MEM_MA0_ODT0 7,12 ODT0 MEM_MB0_ODT0 7,12
2 VSS ODT1 77 2 VSS ODT1 77
5 VSS 5 VSS
8 VSS CKE0 52 MEM_MA_CKE0 7,12 8 VSS CKE0 52 MEM_MB_CKE0 7,12
11 VSS CKE1 171 11 VSS CKE1 171
14 VSS 14 VSS
17 193 MEM_MA0_CS_L0 17 193 MEM_MB0_CS_L0
VSS CS0# MEM_MA0_CS_L0 7,12 VSS CS0# MEM_MB0_CS_L0 7,12
20 76 MEM_MA0_CS_L1 20 76 MEM_MB0_CS_L1
VSS CS1# MEM_MA0_CS_L1 7,12 VSS CS1# MEM_MB0_CS_L1 7,12
23 VSS 23 VSS
26 185 MEM_MA0_CLK_H0 26 185 MEM_MB0_CLK_H0
VSS CK0(DU) MEM_MA0_CLK_H0 7,12 VSS CK0(DU) MEM_MB0_CLK_H0 7,12
29 186 MEM_MA0_CLK_L0 29 186 MEM_MB0_CLK_L0
VSS CK0#(DU) MEM_MA0_CLK_L0 7,12 VSS CK0#(DU) MEM_MB0_CLK_L0 7,12
32 137 MEM_MA0_CLK_H1 32 137 MEM_MB0_CLK_H1
B VSS CK1(CK0) MEM_MA0_CLK_H1 7,12 VSS CK1(CK0) MEM_MB0_CLK_H1 7,12 B
35 138 MEM_MA0_CLK_L1 35 138 MEM_MB0_CLK_L1
VSS CK1#(CK0#) MEM_MA0_CLK_L1 7,12 VSS CK1#(CK0#) MEM_MB0_CLK_L1 7,12
38 220 MEM_MA0_CLK_H2 38 220 MEM_MB0_CLK_H2
VSS CK2(DU) MEM_MA0_CLK_H2 7,12 VSS CK2(DU) MEM_MB0_CLK_H2 7,12
41 221 MEM_MA0_CLK_L2 41 221 MEM_MB0_CLK_L2
VSS CK2#(DU) MEM_MA0_CLK_L2 7,12 VSS CK2#(DU) MEM_MB0_CLK_L2 7,12
44 VSS 44 VSS
47 120 SCL0 47 120 SCL0
VSS SCL SCL0 11,18,21,32 VSS SCL SCL0 11,18,21,32
50 119 SDA0 50 119 SDA0
VSS SDA SDA0 11,18,21,32 VSS SDA SDA0 11,18,21,32
65 VSS 65 VSS
66 1 VDDR_VREF 66 1 VDDR_VREF
VSS VREF VSS VREF
79 VSS 79 VSS
82 C42 82 VCC3 C41
VSS 0.1uf/10V/X7R/4 VSS 0.1uf/10V/X7R/4
85 VSS SA0 239 85 VSS SA0 239
88 VSS SA1 240 88 VSS SA1 240
91 VSS SA2 101 91 VSS SA2 101
94 PLACE CLOSE TO DIMM PIN 94 PLACE CLOSE TO DIMM PIN
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS

VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS VSS
97 VSS 97 VSS
DDRII-240_WHITE DDRII-240_WHITE
100
103
106
109
112
115
118
121
124
127
130
133
136
139
142
145
148
151
154
157
160
163
166
169
198
201
204
207
210
213
216
219
222
225
228
231
234
237

100
103
106
109
112
115
118
121
124
127
130
133
136
139
142
145
148
151
154
157
160
163
166
169
198
201
204
207
210
213
216
219
222
225
228
231
234
237
ADDRESS: 1010 000 ADDRESS: 1010 001
N13-2400481-L06 N13-2400481-L06
WHITE COLOR WHITE COLOR

VCC_DDR
VCC_DDR

VDDR_VREF

C29
C549 R35
15/6/1 X_0.1uf/10V/X7R/4
4.7uf/10V/Y5V/8
VDDR_VREF

A C33 3VDUAL 3VDUAL A


R33 C36 C763
15/6/1 X_0.1uf/10V/X7R/4 0.1uf/16V/Y5V/4
102pf/50V/X7R/4
2

SCL0 3 SDA0 3
D15 D13
BAV99_SOT23 BAV99_SOT23
1

MICRO-STAR INt'L CO., LTD.


Title
FIRST LOGICAL DDR DIMM
Size Document Number Rev
1.0
MS-7500
Date: Wednesday, December 26, 2007 Sheet 10 of 48
5 4 3 2 1
5 4 3 2 1

D D

VCC_DDR VCC3 VCC_DDR VCC3

102

191
194
181
175
170

197

172
187
184
178
189

238

161
162
167
168

102

191
194
181
175
170

197

172
187
184
178
189

238

161
162
167
168
XMM3 XMM4

55
18
19

68

51
56
62
72
75
78

53
59
64

69

67

42
43
48
49

55
18
19

68

51
56
62
72
75
78

53
59
64

69

67

42
43
48
49
RC0
RC1
NC
NC/TEST
NC

VDD0
VDD1
VDD2
VDD3
VDD3
VDD4
VDD5
VDD6
VDD7
VDD8
VDDQ0
VDDQ1
VDDQ2
VDDQ3
VDDQ4
VDDQ4
VDDQ5
VDDQ6
VDDQ7
VDDQ7
VDDQ8
VDDQ9

VDDSPD

CB0
CB1
CB2
CB3
CB4
CB5
CB6
CB7

RC0
RC1
NC
NC/TEST
NC

VDD0
VDD1
VDD2
VDD3
VDD3
VDD4
VDD5
VDD6
VDD7
VDD8
VDDQ0
VDDQ1
VDDQ2
VDDQ3
VDDQ4
VDDQ4
VDDQ5
VDDQ6
VDDQ7
VDDQ7
VDDQ8
VDDQ9

VDDSPD

CB0
CB1
CB2
CB3
CB4
CB5
CB6
CB7
7,10 MEM_MA_DATA[63..0] 7,10 MEM_MB_DATA[63..0]
MEM_MA_DATA0 3 MEM_MB_DATA0 3
MEM_MA_DATA1 DQ0 MEM_MA_DQS_H0 MEM_MB_DATA1 DQ0 MEM_MB_DQS_H0
4 DQ1 DQS0 7 MEM_MA_DQS_H0 7,10 4 DQ1 DQS0 7 MEM_MB_DQS_H0 7,10
MEM_MA_DATA2 9 6 MEM_MA_DQS_L0 MEM_MB_DATA2 9 6 MEM_MB_DQS_L0
DQ2 DQS0# MEM_MA_DQS_L0 7,10 DQ2 DQS0# MEM_MB_DQS_L0 7,10
MEM_MA_DATA3 10 16 MEM_MA_DQS_H1 MEM_MB_DATA3 10 16 MEM_MB_DQS_H1
DQ3 DQS1 MEM_MA_DQS_H1 7,10 DQ3 DQS1 MEM_MB_DQS_H1 7,10
MEM_MA_DATA4 122 15 MEM_MA_DQS_L1 MEM_MB_DATA4 122 15 MEM_MB_DQS_L1
DQ4 DQS1# MEM_MA_DQS_L1 7,10 DQ4 DQS1# MEM_MB_DQS_L1 7,10
MEM_MA_DATA5 123 28 MEM_MA_DQS_H2 MEM_MB_DATA5 123 28 MEM_MB_DQS_H2
DQ5 DQS2 MEM_MA_DQS_H2 7,10 DQ5 DQS2 MEM_MB_DQS_H2 7,10
MEM_MA_DATA6 128 27 MEM_MA_DQS_L2 MEM_MB_DATA6 128 27 MEM_MB_DQS_L2
DQ6 DQS2# MEM_MA_DQS_L2 7,10 DQ6 DQS2# MEM_MB_DQS_L2 7,10
MEM_MA_DATA7 129 37 MEM_MA_DQS_H3 MEM_MB_DATA7 129 37 MEM_MB_DQS_H3
DQ7 DQS3 MEM_MA_DQS_H3 7,10 DQ7 DQS3 MEM_MB_DQS_H3 7,10
MEM_MA_DATA8 12 36 MEM_MA_DQS_L3 MEM_MB_DATA8 12 36 MEM_MB_DQS_L3
DQ8 DQS3# MEM_MA_DQS_L3 7,10 DQ8 DQS3# MEM_MB_DQS_L3 7,10
MEM_MA_DATA9 13 84 MEM_MA_DQS_H4 MEM_MB_DATA9 13 84 MEM_MB_DQS_H4
DQ9 DQS4 MEM_MA_DQS_H4 7,10 DQ9 DQS4 MEM_MB_DQS_H4 7,10
MEM_MA_DATA10 21 83 MEM_MA_DQS_L4 MEM_MB_DATA10 21 83 MEM_MB_DQS_L4
DQ10 DQS4# MEM_MA_DQS_L4 7,10 DQ10 DQS4# MEM_MB_DQS_L4 7,10
MEM_MA_DATA11 22 93 MEM_MA_DQS_H5 MEM_MB_DATA11 22 93 MEM_MB_DQS_H5
DQ11 DQS5 MEM_MA_DQS_H5 7,10 DQ11 DQS5 MEM_MB_DQS_H5 7,10
MEM_MA_DATA12 131 92 MEM_MA_DQS_L5 MEM_MB_DATA12 131 92 MEM_MB_DQS_L5
DQ12 DQS5# MEM_MA_DQS_L5 7,10 DQ12 DQS5# MEM_MB_DQS_L5 7,10
MEM_MA_DATA13 132 105 MEM_MA_DQS_H6 MEM_MB_DATA13 132 105 MEM_MB_DQS_H6
DQ13 DQS6 MEM_MA_DQS_H6 7,10 DQ13 DQS6 MEM_MB_DQS_H6 7,10
MEM_MA_DATA14 140 104 MEM_MA_DQS_L6 MEM_MB_DATA14 140 104 MEM_MB_DQS_L6
DQ14 DQS6# MEM_MA_DQS_L6 7,10 DQ14 DQS6# MEM_MB_DQS_L6 7,10
MEM_MA_DATA15 141 114 MEM_MA_DQS_H7 MEM_MB_DATA15 141 114 MEM_MB_DQS_H7
DQ15 DQS7 MEM_MA_DQS_H7 7,10 DQ15 DQS7 MEM_MB_DQS_H7 7,10
MEM_MA_DATA16 24 113 MEM_MA_DQS_L7 MEM_MB_DATA16 24 113 MEM_MB_DQS_L7
DQ16 DQS7# MEM_MA_DQS_L7 7,10 DQ16 DQS7# MEM_MB_DQS_L7 7,10
MEM_MA_DATA17 25 46 MEM_MB_DATA17 25 46
MEM_MA_DATA18 DQ17 DQS8 MEM_MB_DATA18 DQ17 DQS8
30 DQ18 DQS8# 45 30 DQ18 DQS8# 45
MEM_MA_DATA19 31 MEM_MB_DATA19 31
MEM_MA_DATA20 DQ19 MEM_MA_ADD0 MEM_MB_DATA20 DQ19 MEM_MB_ADD0
143 DQ20 A0 188 143 DQ20 A0 188
MEM_MA_DATA21 144 183 MEM_MA_ADD1 MEM_MB_DATA21 144 183 MEM_MB_ADD1
MEM_MA_DATA22 DQ21 A1 MEM_MA_ADD2 MEM_MB_DATA22 DQ21 A1 MEM_MB_ADD2
149 DQ22 A2 63 149 DQ22 A2 63
MEM_MA_DATA23 150 182 MEM_MA_ADD3 MEM_MB_DATA23 150 182 MEM_MB_ADD3
MEM_MA_DATA24 DQ23 A3 MEM_MA_ADD4 MEM_MB_DATA24 DQ23 A3 MEM_MB_ADD4
33 DQ24 A4 61 33 DQ24 A4 61
MEM_MA_DATA25 34 60 MEM_MA_ADD5 MEM_MB_DATA25 34 60 MEM_MB_ADD5
MEM_MA_DATA26 DQ25 A5 MEM_MA_ADD6 MEM_MB_DATA26 DQ25 A5 MEM_MB_ADD6
39 DQ26 A6 180 39 DQ26 A6 180
MEM_MA_DATA27 40 58 MEM_MA_ADD7 MEM_MB_DATA27 40 58 MEM_MB_ADD7
MEM_MA_DATA28 DQ27 A7 MEM_MA_ADD8 MEM_MB_DATA28 DQ27 A7 MEM_MB_ADD8
152 DQ28 A8 179 152 DQ28 A8 179
C MEM_MA_DATA29 153 177 MEM_MA_ADD9 MEM_MB_DATA29 153 177 MEM_MB_ADD9 C
MEM_MA_DATA30 DQ29 A9 MEM_MA_ADD10 MEM_MB_DATA30 DQ29 A9 MEM_MB_ADD10
158 DQ30 A10_AP 70 158 DQ30 A10_AP 70
MEM_MA_DATA31 159 57 MEM_MA_ADD11 MEM_MB_DATA31 159 57 MEM_MB_ADD11
MEM_MA_DATA32 DQ31 A11 MEM_MA_ADD12 MEM_MB_DATA32 DQ31 A11 MEM_MB_ADD12
80 DQ32 A12 176 80 DQ32 A12 176
MEM_MA_DATA33 81 196 MEM_MA_ADD13 MEM_MB_DATA33 81 196 MEM_MB_ADD13
MEM_MA_DATA34 DQ33 A13 MEM_MA_ADD14 MEM_MB_DATA34 DQ33 A13 MEM_MB_ADD14
86 DQ34 A14 174 86 DQ34 A14 174
MEM_MA_DATA35 87 173 MEM_MA_ADD15 MEM_MB_DATA35 87 173 MEM_MB_ADD15
DQ35 A15 MEM_MA_ADD[15..0] 7,10,12 DQ35 A15 MEM_MB_ADD[15..0] 7,10,12
MEM_MA_DATA36 199 MEM_MB_DATA36 199
MEM_MA_DATA37 DQ36 MEM_MA_BANK2 MEM_MB_DATA37 DQ36 MEM_MB_BANK2
200 DQ37 A16/BA2 54 MEM_MA_BANK2 7,10,12 200 DQ37 A16/BA2 54 MEM_MB_BANK2 7,10,12
MEM_MA_DATA38 205 190 MEM_MA_BANK1 MEM_MB_DATA38 205 190 MEM_MB_BANK1
DQ38 BA1 MEM_MA_BANK1 7,10,12 DQ38 BA1 MEM_MB_BANK1 7,10,12
MEM_MA_DATA39 206 71 MEM_MA_BANK0 MEM_MB_DATA39 206 71 MEM_MB_BANK0
DQ39 BA0 MEM_MA_BANK0 7,10,12 DQ39 BA0 MEM_MB_BANK0 7,10,12
MEM_MA_DATA40 89 MEM_MB_DATA40 89
MEM_MA_DATA41 DQ40 MEM_MA_WE_L MEM_MB_DATA41 DQ40 MEM_MB_WE_L
90 DQ41 WE# 73 MEM_MA_WE_L 7,10,12 90 DQ41 WE# 73 MEM_MB_WE_L 7,10,12
MEM_MA_DATA42 95 74 MEM_MA_CAS_L MEM_MB_DATA42 95 74 MEM_MB_CAS_L
DQ42 CAS# MEM_MA_CAS_L 7,10,12 DQ42 CAS# MEM_MB_CAS_L 7,10,12
MEM_MA_DATA43 96 192 MEM_MA_RAS_L MEM_MB_DATA43 96 192 MEM_MB_RAS_L
DQ43 RAS# MEM_MA_RAS_L 7,10,12 DQ43 RAS# MEM_MB_RAS_L 7,10,12
MEM_MA_DATA44 208 MEM_MB_DATA44 208
MEM_MA_DATA45 DQ44 MEM_MA_DM0 MEM_MA_DM[7..0] MEM_MB_DATA45 DQ44 MEM_MB_DM0 MEM_MB_DM[7..0]
209 DQ45 DM0/DQS9 125 MEM_MA_DM[7..0] 7,10 209 DQ45 DM0/DQS9 125 MEM_MB_DM[7..0] 7,10
MEM_MA_DATA46 214 126 MEM_MB_DATA46 214 126
MEM_MA_DATA47 DQ46 NC/DQS9# MEM_MA_DM1 MEM_MB_DATA47 DQ46 NC/DQS9# MEM_MB_DM1
215 DQ47 DM1/DQS10 134 215 DQ47 DM1/DQS10 134
MEM_MA_DATA48 98 135 MEM_MB_DATA48 98 135
MEM_MA_DATA49 DQ48 NC/DQS10# MEM_MA_DM2 MEM_MB_DATA49 DQ48 NC/DQS10# MEM_MB_DM2
99 DQ49 DM2/DQS11 146 99 DQ49 DM2/DQS11 146
MEM_MA_DATA50 107 147 MEM_MB_DATA50 107 147
MEM_MA_DATA51 DQ50 NC/DQS11# MEM_MA_DM3 MEM_MB_DATA51 DQ50 NC/DQS11# MEM_MB_DM3
108 DQ51 DM3/DQS12 155 108 DQ51 DM3/DQS12 155
MEM_MA_DATA52 217 156 MEM_MB_DATA52 217 156
MEM_MA_DATA53 DQ52 NC/DQS12# MEM_MA_DM4 MEM_MB_DATA53 DQ52 NC/DQS12# MEM_MB_DM4
218 DQ53 DM4/DQS13 202 218 DQ53 DM4/DQS13 202
MEM_MA_DATA54 226 203 MEM_MB_DATA54 226 203
MEM_MA_DATA55 DQ54 NC/DQS13# MEM_MA_DM5 MEM_MB_DATA55 DQ54 NC/DQS13# MEM_MB_DM5
227 DQ55 DM5/DQS14 211 227 DQ55 DM5/DQS14 211
MEM_MA_DATA56 110 212 MEM_MB_DATA56 110 212
MEM_MA_DATA57 DQ56 NC/DQS14# MEM_MA_DM6 MEM_MB_DATA57 DQ56 NC/DQS14# MEM_MB_DM6
111 DQ57 DM6/DQS15 223 111 DQ57 DM6/DQS15 223
MEM_MA_DATA58 116 224 MEM_MB_DATA58 116 224
MEM_MA_DATA59 DQ58 NC/DQS15# MEM_MA_DM7 MEM_MB_DATA59 DQ58 NC/DQS15# MEM_MB_DM7
117 DQ59 DM7/DQS16 232 117 DQ59 DM7/DQS16 232
MEM_MA_DATA60 229 233 MEM_MB_DATA60 229 233
MEM_MA_DATA61 DQ60 NC/DQS16# MEM_MB_DATA61 DQ60 NC/DQS16#
230 DQ61 DM8/DQS17 164 230 DQ61 DM8/DQS17 164
MEM_MA_DATA62 235 165 MEM_MB_DATA62 235 165
MEM_MA_DATA63 DQ62 NC/DQS17# MEM_MB_DATA63 DQ62 NC/DQS17#
236 DQ63 236 DQ63
195 MEM_MA1_ODT0 195 MEM_MB1_ODT0
ODT0 MEM_MA1_ODT0 7,12 ODT0 MEM_MB1_ODT0 7,12
2 VSS ODT1 77 2 VSS ODT1 77
5 VSS 5 VSS
8 VSS CKE0 52 MEM_MA_CKE1 7,12 8 VSS CKE0 52 MEM_MB_CKE1 7,12
B
11 VSS CKE1 171 11 VSS CKE1 171 B
14 VSS 14 VSS
17 193 MEM_MA1_CS_L0 17 193 MEM_MB1_CS_L0
VSS CS0# MEM_MA1_CS_L0 7,12 VSS CS0# MEM_MB1_CS_L0 7,12
20 76 MEM_MA1_CS_L1 20 76 MEM_MB1_CS_L1
VSS CS1# MEM_MA1_CS_L1 7,12 VSS CS1# MEM_MB1_CS_L1 7,12
23 VSS 23 VSS
26 185 MEM_MA1_CLK_H0 26 185 MEM_MB1_CLK_H0
VSS CK0(DU) MEM_MA1_CLK_H0 7,12 VSS CK0(DU) MEM_MB1_CLK_H0 7,12
29 186 MEM_MA1_CLK_L0 29 186 MEM_MB1_CLK_L0
VSS CK0#(DU) MEM_MA1_CLK_L0 7,12 VSS CK0#(DU) MEM_MB1_CLK_L0 7,12
32 137 MEM_MA1_CLK_H1 32 137 MEM_MB1_CLK_H1
VSS CK1(CK0) MEM_MA1_CLK_H1 7,12 VSS CK1(CK0) MEM_MB1_CLK_H1 7,12
35 138 MEM_MA1_CLK_L1 35 138 MEM_MB1_CLK_L1
VSS CK1#(CK0#) MEM_MA1_CLK_L1 7,12 VSS CK1#(CK0#) MEM_MB1_CLK_L1 7,12
38 220 MEM_MA1_CLK_H2 38 220 MEM_MB1_CLK_H2
VSS CK2(DU) MEM_MA1_CLK_H2 7,12 VSS CK2(DU) MEM_MB1_CLK_H2 7,12
41 221 MEM_MA1_CLK_L2 41 221 MEM_MB1_CLK_L2
VSS CK2#(DU) MEM_MA1_CLK_L2 7,12 VSS CK2#(DU) MEM_MB1_CLK_L2 7,12
44 VSS 44 VSS
47 120 SCL0 47 120 SCL0
VSS SCL SCL0 10,18,21,32 VDDR_VREF VSS SCL SCL0 10,18,21,32
50 119 SDA0 50 119 SDA0
VSS SDA SDA0 10,18,21,32 VSS SDA SDA0 10,18,21,32
65 VSS 65 VSS
66 1 VDDR_VREF 66 1 VDDR_VREF
VSS VREF VSS VREF
79 VSS 79 VSS
82 VCC3 C664 82 VCC3 C665
VSS 0.1uf/10V/X7R/4 VSS 0.1uf/10V/X7R/4
85 VSS SA0 239 85 VSS SA0 239
88 VSS SA1 240 88 VSS SA1 240
91 VSS SA2 101 91 VSS SA2 101
94 PLACE CLOSE TO DIMM PIN 94 PLACE CLOSE TO DIMM PIN
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS

VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS VSS
97 VSS 97 VSS
DDRII-240_BLACK DDRII-240_BLACK
100
103
106
109
112
115
118
121
124
127
130
133
136
139
142
145
148
151
154
157
160
163
166
169
198
201
204
207
210
213
216
219
222
225
228
231
234
237

100
103
106
109
112
115
118
121
124
127
130
133
136
139
142
145
148
151
154
157
160
163
166
169
198
201
204
207
210
213
216
219
222
225
228
231
234
237
ADDRESS: 1010 010
N13-2400121-L06 N13-2400121-L06 ADDRESS: 1010 011

BLACK COLOR
BLACK COLOR

A A

MICRO-STAR INt'L CO., LTD.


Title
SECOND LOGICAL DDR DIMM
Size Document Number Rev
1.0
MS-7500
Date: Wednesday, December 26, 2007 Sheet 11 of 48
5 4 3 2 1
5 4 3 2 1

Place Between Processor and DIMMs


VCC_DDR
VCC_DDR

MEM_MA_ADD15 C446 22pf/50V/NPO/4 MEM_MB_ADD15 C101 22pf/50V/NPO/4


MEM_MA_ADD14 C441 22pf/50V/NPO/4 MEM_MB_ADD14 C95 22pf/50V/NPO/4
MEM_MA_ADD13 C479 22pf/50V/NPO/4 MEM_MB_ADD13 C160 22pf/50V/NPO/4
MEM_MA_ADD12 C445 22pf/50V/NPO/4 MEM_MB_ADD12 C98 22pf/50V/NPO/4
MEM_MA_ADD11 C449 22pf/50V/NPO/4 MEM_MB_ADD11 C100 22pf/50V/NPO/4
D MEM_MA_ADD10 C476 22pf/50V/NPO/4 MEM_MB_ADD10 C142 22pf/50V/NPO/4 D
MEM_MA_ADD9 C455 22pf/50V/NPO/4 MEM_MB_ADD9 C109 22pf/50V/NPO/4
MEM_MA_ADD8 C459 22pf/50V/NPO/4 MEM_MB_ADD8 C103 22pf/50V/NPO/4
MEM_MA_ADD7 C452 22pf/50V/NPO/4 MEM_MB_ADD7 C107 22pf/50V/NPO/4
MEM_MA_ADD6 C465 22pf/50V/NPO/4 MEM_MB_ADD6 C116 22pf/50V/NPO/4
MEM_MA_ADD5 C460 22pf/50V/NPO/4 MEM_MB_ADD5 C105 22pf/50V/NPO/4
RTT:Place Behind DIMMs MEM_MA_ADD4 C464 22pf/50V/NPO/4 MEM_MB_ADD4 C120 22pf/50V/NPO/4
RN14 VTT_DDR VCC_DDR MEM_MA_ADD3 C467 22pf/50V/NPO/4 MEM_MB_ADD3 C111 22pf/50V/NPO/4
47R_8P4R/4 MEM_MA_ADD2 C468 22pf/50V/NPO/4 MEM_MB_ADD2 C118 22pf/50V/NPO/4
RN16 VTT_DDR VCC_DDR MEM_MB_ADD111 2 C193 0.1uf/10V/X7R/4 MEM_MA_ADD1 C471 22pf/50V/NPO/4 MEM_MB_ADD1 C124 22pf/50V/NPO/4
7,10,11 MEM_MB_ADD11
47R_8P4R/4 MEM_MA_ADD123 4 MEM_MA_ADD0 C474 22pf/50V/NPO/4 MEM_MB_ADD0 C132 22pf/50V/NPO/4
7,10,11 MEM_MA_ADD12
MEM_MA_BANK21 2 C127 0.1uf/10V/X7R/4 MEM_MA_ADD95 6
7,10,11 MEM_MA_BANK2 7,10,11 MEM_MA_ADD9
7,10,11 MEM_MB_BANK2 MEM_MB_BANK23 4 MEM_MB_ADD77 8 C228 47pf/50V/NPO/4 MEM_MA_CAS_L C475 22pf/50V/NPO/4 MEM_MB_CAS_L C133 22pf/50V/NPO/4
7,10,11 MEM_MB_ADD7
MEM_MB_ADD125 6 MEM_MA_WE_L C478 22pf/50V/NPO/4 MEM_MB_WE_L C150 22pf/50V/NPO/4
7,10,11 MEM_MB_ADD12
MEM_MB_ADD97 8 C178 0.1uf/10V/X7R/4 RN18 MEM_MA_RAS_L C477 22pf/50V/NPO/4 MEM_MB_RAS_L C147 22pf/50V/NPO/4
7,10,11 MEM_MB_ADD9
47R_8P4R/4
RN17 MEM_MB_ADD81 2 C184 0.1uf/10V/X7R/4 MEM_MA_BANK2 C451 22pf/50V/NPO/4 MEM_MB_BANK2 C102 22pf/50V/NPO/4
7,10,11 MEM_MB_ADD8
47R_8P4R/4 MEM_MA_ADD113 4 MEM_MA_BANK1 C472 22pf/50V/NPO/4 MEM_MB_BANK1 C125 22pf/50V/NPO/4
7,10,11 MEM_MA_ADD11
MEM_MA_CKE01 2 C126 0.1uf/10V/X7R/4 MEM_MA_ADD75 6 MEM_MA_BANK0 C473 22pf/50V/NPO/4 MEM_MB_BANK0 C130 22pf/50V/NPO/4
7,10 MEM_MA_CKE0 7,10,11 MEM_MA_ADD7
MEM_MB_ADD143 4 MEM_MA_ADD87 8 C233 0.1uf/10V/X7R/4
7,10,11 MEM_MB_ADD14 7,10,11 MEM_MA_ADD8
MEM_MA_ADD155 6
7,10,11 MEM_MA_ADD15
MEM_MA_ADD147 8 C172 0.1uf/10V/X7R/4 RN21
7,10,11 MEM_MA_ADD14
47R_8P4R/4
RN20 MEM_MB_ADD51 2 C176 0.1uf/10V/X7R/4
7,10,11 MEM_MB_ADD5
47R_8P4R/4 MEM_MB_ADD43 4
7,10,11 MEM_MB_ADD4
MEM_MB_ADD61 2 C121 0.1uf/10V/X7R/4 MEM_MA_ADD35 6
7,10,11 MEM_MB_ADD6 7,10,11 MEM_MA_ADD3
MEM_MA_ADD63 4 MEM_MA_ADD17 8 C226 0.1uf/10V/X7R/4
7,10,11 MEM_MA_ADD6 7,10,11 MEM_MA_ADD1
MEM_MA_ADD55 6 MEM_MA1_CLK_H2 MEM_MA0_CLK_H2
7,10,11 MEM_MA_ADD5 7,11 MEM_MA1_CLK_H2 7,10 MEM_MA0_CLK_H2
C MEM_MA_ADD47 8 C129 0.1uf/10V/X7R/4 RN23 C238 C165 C
7,10,11 MEM_MA_ADD4
47R_8P4R/4 1.5pf/50V/NPO/4 1.5pf/50V/NPO/4
RN22 MEM_MB_ADD01 2 C153 0.1uf/10V/X7R/4
7,10,11 MEM_MB_ADD0
47R_8P4R/4 7,10,11 MEM_MB_BANK1 MEM_MB_BANK13 4
MEM_MA_ADD21 2 C183 0.1uf/10V/X7R/4 MEM_MB_ADD105 6 MEM_MA1_CLK_L2 MEM_MA0_CLK_L2
7,10,11 MEM_MA_ADD2 7,10,11 MEM_MB_ADD10 7,11 MEM_MA1_CLK_L2 7,10 MEM_MA0_CLK_L2
MEM_MB_ADD33 4 MEM_MA_ADD07 8 C231 47pf/50V/NPO/4
7,10,11 MEM_MB_ADD3 7,10,11 MEM_MA_ADD0
MEM_MB_ADD15 6
7,10,11 MEM_MB_ADD1
MEM_MB_ADD27 8 C180 0.1uf/10V/X7R/4 RN25 MEM_MA1_CLK_H1 MEM_MA0_CLK_H1
7,10,11 MEM_MB_ADD2 7,11 MEM_MA1_CLK_H1 7,10 MEM_MA0_CLK_H1
47R_8P4R/4 C529 C54
RN24 MEM_MB1_CS_L01 2 C164 0.1uf/10V/X7R/4 1.5pf/50V/NPO/4 1.5pf/50V/NPO/4
7,11 MEM_MB1_CS_L0
47R_8P4R/4 MEM_MB0_CS_L03 4
7,10 MEM_MB0_CS_L0
MEM_MA_BANK11 2 C115 0.1uf/10V/X7R/4 MEM_MA_BANK05 6
7,10,11 MEM_MA_BANK1 7,10,11 MEM_MA_BANK0
7,10,11 MEM_MB_BANK0 MEM_MB_BANK03 4 MEM_MA_RAS_L7 8 C232 0.1uf/10V/X7R/4 MEM_MA1_CLK_L1 MEM_MA0_CLK_L1
7,10,11 MEM_MA_RAS_L 7,11 MEM_MA1_CLK_L1 7,10 MEM_MA0_CLK_L1
7,10,11 MEM_MB_RAS_L MEM_MB_RAS_L5 6
MEM_MA_ADD107 8 C234 0.1uf/10V/X7R/4 RN15
7,10,11 MEM_MA_ADD10
47R_8P4R/4 MEM_MA1_CLK_H0 MEM_MA0_CLK_H0
7,11 MEM_MA1_CLK_H0 7,10 MEM_MA0_CLK_H0
RN26 MEM_MB_CKE11 2 C152 0.1uf/10V/X7R/4 C534 C113
7,11 MEM_MB_CKE1
47R_8P4R/4 MEM_MB_CKE03 4 1.5pf/50V/NPO/4 1.5pf/50V/NPO/4
7,10 MEM_MB_CKE0
MEM_MA_WE_L1 2 C110 0.1uf/10V/X7R/4 MEM_MA_CKE15 6
7,10,11 MEM_MA_WE_L 7,11 MEM_MA_CKE1
MEM_MA_CAS_L3 4 MEM_MB_ADD157 8 C277 0.1uf/10V/X7R/4
7,10,11 MEM_MA_CAS_L 7,10,11 MEM_MB_ADD15
MEM_MB0_ODT05 6 MEM_MA1_CLK_L0 MEM_MA0_CLK_L0
7,10 MEM_MB0_ODT0 7,11 MEM_MA1_CLK_L0 7,10 MEM_MA0_CLK_L0
MEM_MA0_ODT07 8 C106 0.1uf/10V/X7R/4 RN28
7,10 MEM_MA0_ODT0
47R_8P4R/4
RN57 MEM_MA0_CS_L01 2 C131 0.1uf/10V/X7R/4
7,10 MEM_MA0_CS_L0
47R_8P4R/4 MEM_MA1_CS_L03 4
7,11 MEM_MA1_CS_L0
MEM_MA0_CS_L11 2 C108 0.1uf/10V/X7R/4 7,10,11 MEM_MB_WE_L MEM_MB_WE_L5 6 MEM_MB1_CLK_H2 MEM_MB0_CLK_H2
7,10 MEM_MA0_CS_L1 7,11 MEM_MB1_CLK_H2 7,10 MEM_MB0_CLK_H2
MEM_MB0_CS_L13 4 MEM_MB_CAS_L7 8 C278 0.1uf/10V/X7R/4 C273 C163
7,10 MEM_MB0_CS_L1 7,10,11 MEM_MB_CAS_L
MEM_MB1_CS_L15 6 1.5pf/50V/NPO/4 1.5pf/50V/NPO/4
7,11 MEM_MB1_CS_L1
MEM_MA1_CS_L17 8 C123 47pf/50V/NPO/4 RN56
B 7,11 MEM_MA1_CS_L1 B
47R_8P4R/4
MEM_MA1_ODT01 2 C276 0.1uf/10V/X7R/4 MEM_MB1_CLK_L2 MEM_MB0_CLK_L2
7,11 MEM_MA1_ODT0 7,11 MEM_MB1_CLK_L2 7,10 MEM_MB0_CLK_L2
MEM_MA_ADD133 4
7,10,11 MEM_MA_ADD13
MEM_MB1_ODT05 6
7,11 MEM_MB1_ODT0
MEM_MB_ADD137 8 C279 0.1uf/10V/X7R/4 MEM_MB1_CLK_H1 MEM_MB0_CLK_H1
7,10,11 MEM_MB_ADD13 7,11 MEM_MB1_CLK_H1 7,10 MEM_MB0_CLK_H1
C161 C65
1.5pf/50V/NPO/4 1.5pf/50V/NPO/4

MEM_MB1_CLK_L1 MEM_MB0_CLK_L1
7,11 MEM_MB1_CLK_L1 7,10 MEM_MB0_CLK_L1
VTT_DDR
MEM_MB1_CLK_H0 MEM_MB0_CLK_H0
7,11 MEM_MB1_CLK_H0 7,10 MEM_MB0_CLK_H0
C533 C117
0.01uf/25V/X7R/4 0.01uf/25V/X7R/4 0.01uf/25V/X7R/4 0.01uf/25V/X7R/4 0.01uf/25V/X7R/4 1.5pf/50V/NPO/4 1.5pf/50V/NPO/4

C495 C94 C530 C96 C531 C140 C537 C154 C566 C170 MEM_MB1_CLK_L0 MEM_MB0_CLK_L0
7,11 MEM_MB1_CLK_L0 7,10 MEM_MB0_CLK_L0

180pf/50V/NPO/4 180pf/50V/NPO/4 180pf/50V/NPO/4 180pf/50V/NPO/4 180pf/50V/NPO/4

VTT_DDR

0.01uf/25V/X7R/4 0.01uf/25V/X7R/4 0.01uf/25V/X7R/4 0.01uf/25V/X7R/4 0.01uf/25V/X7R/4


A A

C568 C186 C573 C190 C622 C196 C624 C199 C642 C200

180pf/50V/NPO/4 180pf/50V/NPO/4 180pf/50V/NPO/4 180pf/50V/NPO/4 180pf/50V/NPO/4 MICRO-STAR INt'L CO., LTD.


Title
DDR II Termination
Size Document Number Rev
1.0
MS-7500
Date: Wednesday, December 26, 2007 Sheet 12 of 48
5 4 3 2 1
5 4 3 2 1

D D

20 / 5 / 5 / 5 / 20 20 / 5 / 5 / 5 / 20
U3A
6 CADOP[0..15] CADOP[0..15] CADOP0 Y25 D24 CADIP0 CADIP[0..15]
HT_RXCAD0P HT_TXCAD0P CADIP[0..15] 6
CADON0 Y24 PART 1 OF 6 D25 CADIN0
CADOP1 HT_RXCAD0N HT_TXCAD0N CADIP1
V22 HT_RXCAD1P HT_TXCAD1P E24
CADON1 V23 E25 CADIN1
CADOP2 HT_RXCAD1N HT_TXCAD1N CADIP2
V25 HT_RXCAD2P HT_TXCAD2P F24
CADON2 V24 F25 CADIN2
CADOP3 HT_RXCAD2N HT_TXCAD2N CADIP3
U24 HT_RXCAD3P HT_TXCAD3P F23
CADON3 U25 F22 CADIN3
CADOP4 HT_RXCAD3N HT_TXCAD3N CADIP4
T25 HT_RXCAD4P HT_TXCAD4P H23
CADON4 T24 H22 CADIN4
CADOP5 HT_RXCAD4N HT_TXCAD4N CADIP5
P22 HT_RXCAD5P HT_TXCAD5P J25
CADON5 P23 J24 CADIN5
CADOP6 HT_RXCAD5N HT_TXCAD5N CADIP6
P25 HT_RXCAD6P HT_TXCAD6P K24
CADON6 P24 K25 CADIN6
CADOP7 HT_RXCAD6N HT_TXCAD6N CADIP7
N24 HT_RXCAD7P HT_TXCAD7P K23
CADON7 CADIN7

HYPER TRANSPORT CPU


C N25 HT_RXCAD7N HT_TXCAD7N K22 C

CADOP8 AC24 F21 CADIP8


6 CADON[0..15] CADON[0..15] CADON8 HT_RXCAD8P HT_TXCAD8P CADIN8 CADIN[0..15]
AC25 HT_RXCAD8N HT_TXCAD8N G21 CADIN[0..15] 6
CADOP9 AB25 G20 CADIP9
CADON9 HT_RXCAD9P HT_TXCAD9P CADIN9
AB24 HT_RXCAD9N HT_TXCAD9N H21
CADOP10 AA24 J20 CADIP10
CADON10 HT_RXCAD10P HT_TXCAD10P CADIN10
AA25 HT_RXCAD10N HT_TXCAD10N J21
CADOP11 Y22 J18 CADIP11
CADON11 HT_RXCAD11P HT_TXCAD11P CADIN11
Y23 HT_RXCAD11N HT_TXCAD11N K17
CADOP12 W21 L19 CADIP12
CADON12 HT_RXCAD12P HT_TXCAD12P CADIN12
W20 HT_RXCAD12N HT_TXCAD12N J19
CADOP13 V21 M19 CADIP13
CADON13 HT_RXCAD13P HT_TXCAD13P CADIN13
V20 HT_RXCAD13N HT_TXCAD13N L18
CADOP14 U20 M21 CADIP14
CADON14 HT_RXCAD14P HT_TXCAD14P CADIN14
U21 HT_RXCAD14N HT_TXCAD14N P21
CADOP15 U19 P18 CADIP15
CADON15 HT_RXCAD15P HT_TXCAD15P CADIN15
U18 HT_RXCAD15N HT_TXCAD15N M18
CLKOP0 T22 H24 CLKIP0
6 CLKOP0 HT_RXCLK0P HT_TXCLK0P CLKIP0 6
CLKON0 T23 H25 CLKIN0
6 CLKON0 HT_RXCLK0N HT_TXCLK0N CLKIN0 6
CLKOP1 AB23 L21 CLKIP1
6 CLKOP1 HT_RXCLK1P HT_TXCLK1P CLKIP1 6
CLKON1 CLKIN1

I/F
6 CLKON1 AA22 HT_RXCLK1N HT_TXCLK1N L20 CLKIN1 6
CTLOP0 M22 M24 CTLIP0
6 CTLOP0 HT_RXCTL0P HT_TXCTL0P CTLIP0 6
CTLON0 M23 M25 CTLIN0
6 CTLON0 HT_RXCTL0N HT_TXCTL0N CTLIN0 6
CTLOP1 R21 P19 CTLIP1 RX780/RS740/RS780 difference table (HT LINK)
6 CTLOP1 HT_RXCTL1P HT_TXCTL1P CTLIP1 6
CTLON1 R20 R18 CTLIN1
6 CTLON1 HT_RXCTL1N HT_TXCTL1N CTLIN1 6
SIGNALS RS740 RX780 RS780
B B
301/4/1 R34 HT_RXCALP C23 B24 HT_TXCALP R36 301/4/1
HT_RXCALN HT_RXCALP HT_TXCALP HT_TXCALN HT_RXCALP 49.9R (GND)
A24 HT_RXCALN HT_TXCALN B25
1.21K 301R
5 / 10 5 / 10 HT_RXCALN 49.9R (VDDHT)

HT_TXCALP
08/10/07 AMD: Please note that R34 and R36 are 301 1% resistor when using RS780. 100R 1.21K 301R
HT_TXCALN
R34 and R36 are 1.21K 1% resistor when using RX780.

VCORE

C920 C925
0.01uf/16V/X7R/4 0.01uf/16V/X7R/4

AMD-215NDA7BKA12FG-A12-RH

Adding some 0.01uF stitching capacitors


A for crossing a split when these signals A
change different reference layer.
For 07/09/07
MICRO-STAR INt'L CO., LTD.
Title
RS780/RX780-HT LINK I/F
Size Document Number Rev
1.0
MS-7500
Date: Wednesday, December 26, 2007 Sheet 13 of 48
5 4 3 2 1
5 4 3 2 1

20 / 5.5 / 4.5 / 5.5 / 20 20 / 5.5 / 4.5 / 5.5 / 20


U3B
25 PE0_RX0 D4 GFX_RX0P GFX_TX0P A5 PE0_TX0 25
25 PE0_RX0# C4 GFX_RX0N PART 2 OF 6 GFX_TX0N B5 PE0_TX0# 25
25 PE0_RX1 A3 GFX_RX1P GFX_TX1P A4 PE0_TX1 25
25 PE0_RX1# B3 GFX_RX1N GFX_TX1N B4 PE0_TX1# 25
25 PE0_RX2 C2 GFX_RX2P GFX_TX2P C3 PE0_TX2 25
D 25 PE0_RX2# C1 GFX_RX2N GFX_TX2N B2 PE0_TX2# 25 D
25 PE0_RX3 E5 GFX_RX3P GFX_TX3P D1 PE0_TX3 25
25 PE0_RX3# F5 GFX_RX3N GFX_TX3N D2 PE0_TX3# 25
25 PE0_RX4 G5 GFX_RX4P GFX_TX4P E2 PE0_TX4 25
25 PE0_RX4# G6 GFX_RX4N GFX_TX4N E1 PE0_TX4# 25
25 PE0_RX5 H5 GFX_RX5P GFX_TX5P F4 PE0_TX5 25
25 PE0_RX5# H6 GFX_RX5N GFX_TX5N F3 PE0_TX5# 25
25 PE0_RX6 J6 GFX_RX6P GFX_TX6P F1 PE0_TX6 25
25 PE0_RX6# J5 GFX_RX6N GFX_TX6N F2 PE0_TX6# 25
25 PE0_RX7 J7 GFX_RX7P GFX_TX7P H4 PE0_TX7 25
25 PE0_RX7# J8 GFX_RX7N GFX_TX7N H3 PE0_TX7# 25
25 PE0_RX8 L5 GFX_RX8P GFX_TX8P H1 PE0_TX8 25
25 PE0_RX8# L6 GFX_RX8N GFX_TX8N H2 PE0_TX8# 25
25 PE0_RX9 M8 GFX_RX9P GFX_TX9P J2 PE0_TX9 25
25 PE0_RX9# L8 GFX_RX9N GFX_TX9N J1 PE0_TX9# 25
25 PE0_RX10 P7 GFX_RX10P GFX_TX10P K4 PE0_TX10 25
25 PE0_RX10# M7 GFX_RX10N GFX_TX10N K3 PE0_TX10# 25
25 PE0_RX11 P5 GFX_RX11P GFX_TX11P K1 PE0_TX11 25
25 PE0_RX11# M5 GFX_RX11N GFX_TX11N K2 PE0_TX11# 25
25 PE0_RX12 R8 GFX_RX12P GFX_TX12P M4 PE0_TX12 25

PCIE I/F GFX


25 PE0_RX12# P8 GFX_RX12N GFX_TX12N M3 PE0_TX12# 25
25 PE0_RX13 R6 GFX_RX13P GFX_TX13P M1 PE0_TX13 25
25 PE0_RX13# R5 GFX_RX13N GFX_TX13N M2 PE0_TX13# 25
25 PE0_RX14 P4 GFX_RX14P GFX_TX14P N2 PE0_TX14 25
25 PE0_RX14# P3 GFX_RX14N GFX_TX14N N1 PE0_TX14# 25
25 PE0_RX15 T4 GFX_RX15P GFX_TX15P P1 PE0_TX15 25
25 PE0_RX15# T3 GFX_RX15N GFX_TX15N P2 PE0_TX15# 25
C C
25 PE1_RX AE3 GPP_RX0P GPP_TX0P AC1 PE1_TX 25
25 PE1_RX# AD4 GPP_RX0N GPP_TX0N AC2 PE1_TX# 25
25 PE2_RX AE2 GPP_RX1P GPP_TX1P AB4 PE2_TX 25
25 PE2_RX# AD3 GPP_RX1N GPP_TX1N AB3 PE2_TX# 25
24 PE3_RX AD1 GPP_RX2P GPP_TX2P AA2 PE3_TX 24
24 PE3_RX# AD2 GPP_RX2N PCIE I/F GPP GPP_TX2N AA1 PE3_TX# 24
V5 GPP_RX3P GPP_TX3P Y1
W6 GPP_RX3N GPP_TX3N Y2
U5 GPP_RX4P GPP_TX4P Y4
U6 GPP_RX4N GPP_TX4N Y3
U8 GPP_RX5P GPP_TX5P V1
U7 GPP_RX5N GPP_TX5N V2 X7R
19 A_RX0P A_RX0P AA8 AD7 A_TX0P_C C359 0.1uf/10V/X7R/4
SB_RX0P SB_TX0P A_TX0P 19
19 A_RX0N A_RX0N Y8 AE7 A_TX0N_C C389 0.1uf/10V/X7R/4
SB_RX0N SB_TX0N A_TX0N 19
19 A_RX1P A_RX1P AA7 AE6 A_TX1P_C C197 0.1uf/10V/X7R/4
SB_RX1P SB_TX1P A_TX1P 19
19 A_RX1N A_RX1N Y7 AD6 A_TX1N_C C206 0.1uf/10V/X7R/4
SB_RX1N SB_TX1N A_TX1N 19
19 A_RX2P A_RX2P AA5 PCIE I/F SB AB6 A_TX2P_C C212 0.1uf/10V/X7R/4
SB_RX2P SB_TX2P A_TX2P 19
19 A_RX2N A_RX2N AA6 AC6 A_TX2N_C C251 0.1uf/10V/X7R/4
SB_RX2N SB_TX2N A_TX2N 19
19 A_RX3P A_RX3P W5 AD5 A_TX3P_C C349 0.1uf/10V/X7R/4
SB_RX3P SB_TX3P A_TX3P 19
19 A_RX3N A_RX3N Y5 AE5 A_TX3N_C C352 0.1uf/10V/X7R/4
SB_RX3N SB_TX3N A_TX3N 19

PCE_BCALRP AC8 R39 1.27K/4/1 VCC1_1 1.1V(RX780.RS780)


AB8 R40 2K/4/1
PCE_BCALRN
AMD-215NDA7BKA12FG-A12-RH
B B

RS780 Display Port Support (muxed on GFX)

GFX_TX0,TX1,TX2 and TX3


DP0
AUX0 and HPD0

GFX_TX4,TX5,TX6 and TX7


DP1
AUX1 and HPD1

A A

MICRO-STAR INt'L CO., LTD.


Title
RX780/RS780-PCIE I/F
Size Document Number Rev
1.0
MS-7500
Date: Wednesday, December 26, 2007 Sheet 14 of 48
5 4 3 2 1
5 4 3 2 1

+1.8V_S0

3VDUAL
VCC3 VCC3 +VDDG_NB +1.8V_S0
2007/08/01 ANALOG POWER X5R
U62A
R93 RS780
X_NC7WZ07_SC70-6 4.7K/4 FB8 220-2000mA AVDD 15 MILS WIDTH DVI_TXD00P R41 X_110/4 DVI_TXD00N

5
RS780 RS780 RX780 RS780
V NB_PWRGD_IN R149 0/4 R163 X_0/4 DVI_TXD01P R44 X_110/4 DVI_TXD01N
6,34 SYS_PWRGD 1 6
G C506 RS780 C678 RS780 RS780
NB_PWRGD_IN must have a pull-up +1.8V_S0 2.2uf/6.3V/X5R/6 0.1uf/10V/X7R/4 DVI_TXD02P R46 X_110/4 DVI_TXD02N DVI_TXC0P R47 X_110/4 DVI_TXC0N

2
resister to +1.8V_S0 due to
R304 0/4 NC7W207 output pin is op-drain
21 WD_PWRGD
R49 AVDDDI 15 MILS WIDTH 15 / 5 / 7 / 5 / 15
RS780 0/4
U62B 3VDUAL For meet power RS780 U3C

5
sequence C514 C679 F12 A22
V 2007/08/06 2.2uf/6.3V/X5R/6 NC1 NC18 DVI_TXD00P 28
3 4 0.1uf/10V/X7R/4 E12 NC2 PART 3 OF 6 NC19 B22 DVI_TXD00N 28
D Deleted R302 ,unpopulated G R108 F14 A21
D
U62 and R108,added R304 and X_4.7K/4 +1.8V_S0 NC3 NC20 DVI_TXD01P 28
G15 B21

2
R357 for RS780 A12 spec NC4 NC21 DVI_TXD01N 28
X_NC7WZ07_SC70-6 FB17 220-2000mA AVDDQ 15 MILS WIDTH H15 NC5 NC22 B20 DVI_TXD02P 28
2007/10/12 R357 0/4 RS780 H14 A20
SB_PWRGD 21 NC6 DBG_GPIO0 DVI_TXD02N 28
RS780 RS780 A19
C544 C540 NC23
RX740/RS740/RS780 difference table E17 DFT_GPIO5 DBG_GPIO2 B19
2.2uf/6.3V/X5R/6 0.1uf/10V/X7R/4 RX780_DFT_GPIO2 F17

CRT/TVOUT
DFT_GPIO2
RS740 RX780 RS780 FOR EMI 07/06/15 F15 DFT_GPIO4 NC24 B18
NC25 A18
NB_PWRGD IN 3.3V IN 1.8V IN 1.8V IN C542 X_5pF/50V/NPO/4 10 MILS WIDTH G18 A17
27 R RED(DFT_GPIO0) PCIE_RESET_GPIO3
R205 150/4/1 G17 B17
NC7 PCIE_RESET_GPIO2
ALLOW_LDTSTOP OC OC OC/3.3V IN 27 G C597 X_5pF/50V/NPO/4 RS780 10 MILS WIDTH E18 GREEN(DFT_GPIO1) NC26 D20 Q4 changed from 2N7002 to
OUT(default)/IN * R206 150/4/1
RS780
F18 NC8 NC27 D21 P8503 for HP request
C745 X_5pF/50V/NPO/4 10 MILS WIDTH E19 D18
LDT_STOP# 3.3V IN 1.8V IN 3.3V IN/OC
27 B
R53 150/4/1 F19
BLUE(DFT_GPIO3) PCIE_RESET_GPIO5
D19
2007/11/08
IN(default)/IN * RS780 NC9 NC28
HSYNC# A11 B16 DBG_GPIO1 +1.8V_S0
27 HSYNC# DAC_HSYNV(PWM_GPIO4) DBG_GPIO1 DVI_TXC0P 28 Q4
VSYNC# B11 A16 DBG_GPIO3
27 VSYNC# DAC_VSYNC(PWM_GPIO6) DBG_GPIO3 DVI_TXC0N 28 N-P8503BMG_SOT23-3-RH
*, CLMC mode: NB send LDT_STOP#, ALLOW_LDTSTOP will become input R54 RS780 0/4 E8 D16
27 DDC_DATA DAC_SCL(PCE_TCALRN) PCIE_RESET_GPIO4
1.1V R55 RS780 0/4 F8 D17 D S
27 DDC_CLK DAC_SDA(PCE_RCALRN) PCIE_RESET_GPIO1
RS780 +1.8V_S0
VCC1_1 RS780
PLL X5R R60 RX780 X_2K/4/1 715/4/1 R200 DAC_RSET G14 VDDLTP18 15 MILS WIDTH L9 28L900m_100_0805 RS780

G
FB13 220-2000mA R66 RX780 X_2K/4/1 RS780 PWM_GPIO1 C505
VCC1_1 VDDLTP18(NC29) A13
FB15 220-2000mA 15 MILS WIDTH PLLVDD A12 PLLVDD(NC10) VSSLTP18(NC30) B13 C428 2.2uf/6.3V/X5R/6
RS780 15 MILS WIDTH PLLVDD18 D14 0.1uf/16V/Y5V/4
PLLVDD18(NC11)
+1.8V_S0 C488 C435 B12 A15 RS780 RS780 R90 4.7K/4
+12V

LVTM
PLLVSS(NC12) VDDLT18_1(NC31)
2.2uf/6.3V/X5R/6 RS780 2.2uf/6.3V/X5R/6 C543 RS780 B15 VDDLT18 15 MILS WIDTH L7 RS780

PLL PWR
0.1uf/16V/Y5V/4 VDDTL18_2(NC32)
H17 VDDA18HTPLL NC33 A14
FB14 220-2000mA 15 MILS WIDTH VDDA18HTPLL
NC34 B14 VDDLT33 TP38 28L900m_100_0805
FB16 220-2000mA 15 MILS WIDTH VDDA18PCIEPLL D7 VDDA18PCIEPLL
E7 C14 4.7uf/16V/X7R/8 C539
C496 C498 C337 VDDA18PCIEPLL VSS C570 1uf/6.3V/Y5V/4
VSS D15
2.2uf/6.3V/X5R/6 C307 2.2uf/6.3V/X5R/6 0.1uf/16V/Y5V/4 SYSRESET# D8 SYSRESET# VSS C16 RS780
0.1uf/16V/Y5V/4 NB_PWRGD_IN A10 POWERGOOD VSS C18 RS780
LDT_STOP#_NB C10 C20
ALLOW_LDTSTOP_NB LDTSTOP# VSS
C12 E20

PM
C ALLOW_LDTSTOP VSS C
VSS C22
NBHT_REFCLKP C25 ANALOG POWER X5R
18 KG_NBHT_CLKP HT_REFCLKP
NBHT_REFCLKN C24
18 KG_NBHT_CLKN HT_REFCLKN
NB_OSC_14M R61 0/4 E11 RS780
18 NB_OSC_14M OSCIN R210 4.7K/4

CLOCKs
F11 PWM_GPIO3 PCE_TCALRP E9 VCC3
VCC1_1 R88 150/4 R178 150/4 F7
R166 RX780 0/4 NBGFX_SRCCLK PCE_RCALRP PWM_GPIO2 TP37
18 KG_NBGFX_CLKP T2 GFX_REFCLKP PWM_GPIO2 G12
R202 RX780 0/4 NBGFX_SRCCLK# T1
18 KG_NBGFX_CLKN GFX_REFCLKN RX780 R72 X_1.27K/4/1
NBGPP_CLKP U1 RX780 R71 X_1.27K/4/1
NBGPP_CLKN GPP_REFCLKP
U2 GPP_REFCLKN
R188 RX780 X_0/4 SBLINKCLK V4
18 KG_NBGPP_CLKP RX780 SB_REFCLKP
R254 X_0/4 SBLINKCLK# V3
18 KG_NBGPP_CLKN SB_REFCLKN
Refer to page 18 for clock 28 DVI_DDC_DATA
DVI_DDC_DATA TP47
TP48
DVI_DDC_DATA A9 I2C_DATA
DVI_DDC_CLK DVI_DDC_CLK B9 D9
difference among RS780 and RX780 28 DVI_DDC_CLK
DDC_DATA_TP B8
I2C_CLK MIS. HPD0
D10 HPD1 R112 0/4
TMDS_HPD0 28
DDC_DATA0/AUX0N(NC13) HPD1 TMDS_HPD1 25
DDC_CLK_TP A8
18 KG_NBREF_CLKP DDC_CLK0/AUX0P(NC14)
18 KG_NBREF_CLKN B7 DDC_CLK1/AUX1P(NC15) SUS_STAT#(PWM_GPIO5) D12 R187 10K/4 Refer to page 50 (item 12-31) of
A7 RS780
DDC_DATA1/AUX(NC16)
AE8
RS780 schematic checklist.
THERMALDIODE_P THERMDA_NB 27
STRP_DATA B10 AD8 THERMDC_NB 27
+VDDG_NB 36 STRP_DATA STRP_DATA THERMALDIODE_N
R172 and R175 changed to 39K TP84 RSVD G11 D13 TEST_EN
ohm for AMD RS780 SCL VSS TESTMODE
Checklist 2007/10/19 RS740_DFT_GPIO1 C8 R87 RX780/RS740/RS780 DEBUG PIN MAPPING
+1.8V_S0 +VDDG_NB R192 R181 AUX_CAL(NC17) 1.8K/4 RX780 RS740 RS780
R175 R172 AMD-215NDA7BKA12FG-A12-RH
X_4.7K/4 X_4.7K/4 39K/4 39K/4 DEBUG_OUT0 RED(DFT_GPIO0) LVDS_DIGON LVDS_DIGON
RS740/RX780/RS780: STRAP_DEBUG_BUS_GPIO_ENABLE
RS780 R176 R179 DVI_DDC_DATA DEBUG_OUT1 GREEN(DFT_GPIO1) LVDS_ENA_BL LVDS_ENA_BL
X_4.7K/4 X_4.7K/4 DVI_DDC_CLK VSYNC# R184 3K/4
VCC3
RS780 DDC_DATA_TP Enables the Test Debug Bus using GPIO and/or memory IO DEBUG_OUT2 Y(DFT_GPIO2) LVDS_BLON LVDS_BLON
B DDC_CLK_TP 1 : Disable (RS740/RS780); Enable (RX780) B
B

RS780 R169 X_3K/4


0 : Enable (RS740/RS780); Disable(RX780) DEBUG_OUT3 BLUE(DFT_GPIO3) TMDS_HPD TMDS_HPD
Q15
19 ALLOW_LDTSTOP E C ALLOW_LDTSTOP_NB For RS780 2007/09/06 RS740: pin DFT_GPIO5 DEBUG_OUT4 TXOUT_L2N(DBG_GPIO0) X AUX1N
reference AMD demo borard RX780: pin DFT_GPIO5
X_N-2N3904_SOT23 SHINER rev 2.0 C) DEBUG_OUT5 TXCLK_LP(DBG_GPIO1) X AUX1P
RS780: pin VSYNC
R291 0/4 DEBUG_OUT6 TXOUT_L3N(DBG_GPIO2) X HPD
RX780 DEBUG_OUT7 TXCLK_LN(DBG_GPIO3) X AUX_CAL
RX780: STRAP_PCIE_GPP_CFG[2:0] (Pins: RX780_DFT_GPIO[4:2])
Unpopulated R176,R179,Q15,R170,R171
and Q10;populated R275 and R291 for 111: 1-1-1-1-1-1 Mode L default RS780: STRAP_PCIE_GPP_CFG[2:0]
meet RS780 A12 spec. 2007/10/12 R189 X_1K/4 110: 1-1-1-1-1-1 Mode L
RX780_DFT_GPIO2
(configure thru register setting)
+1.8V_S0 +VDDG_NB 101: 2-0-2-0-2-0 Mode C2
100: 2-0-2-0-1-1 Mode K 1-1-1-1-1-1 Mode L default
011: 2-0-1-1-1-1 Mode E 1-1-1-1-1-1 Mode L
010: 1-1-1-1-1-1 Mode L 2-0-2-0-2-0 Mode C2
C37
001: 4-0-0-0-1-1 Mode C 2-0-2-0-1-1 Mode K
0.1uf/10V/X7R/4 near Q10 R170 R171
2-0-1-1-1-1 Mode E
RS780 X_4.7K/4 X_4.7K/4 000: 4-0-0-0-2-0 Mode B
RS780 PA_RX7X0A1:R189,R190,R196 have been changed 1-1-1-1-1-1 Mode L
from 3K to 1K. 2007/08/06 4-0-0-0-1-1 Mode C
B

HP recommend 2007/10/19 RS780 4-0-0-0-2-0 Mode B


Q10
6,19 -LDTSTOP E C LDT_STOP#_NB
RX780/RS780: STRAP_DEBUG_BUS_PCIE_ENABLE
X_N-2N3904_SOT23 RS740/RX780/RS780: LOAD_EEPROM_STRAPS
Enables Test debug bus
R275 0/4 Selects Loading of STRAPS from EPROM using PCIE bus
RS740_DFT_GPIO1 R198 150/4 1 : Bypass the loading of EEPROM straps and use Hardware Default Values
RX780 1. Disable (can be enabled
Note: for RS780, change R198 to 150R as AUX_CAL, 0 : I2C Master can load strap values from EEPROM if connected, or use thru nbcfg register)
place close to pin C8 default values if not connected 0 : Enable
+1.8V_S0 +VDDG_NB
RX780: pin DFT_GPIO0
A
RX780: pin DFT_GPIO1 RS780: configurable thru register A
RS780: pin SUS_STAT# setting only
RS780 R81 R84 RS740: Not supported
X_4.7K/4 X_4.7K/4
RS780
For RS780 2007/08/14 RS740/RX780/RS780: SIDE-PORT MEMORY ENABLE
B

Q9 N-2N3904_SOT23 HSYNC# R127 3K/4


VCC3 Enables Side port memory
6,19 -LDT_RST E C
RS780
SYSRESET# 1. Disable (RS740/RS780) MICRO-STAR INt'L CO., LTD.
R185 X_10K/4 0 : Enable (RS740/RS780)
RX780 RS780: pin HSYNC Title
R191 X_0/4 RX780: Not Appicable RX780/RS780-SYSTEM I/F
R282 0/4 Size Document Number Rev
19,32 A_RST# 1.0
MS-7500
for HP recommend 2007/10/22(TRACK 1019 item80)
Date: Wednesday, December 26, 2007 Sheet 15 of 48
5 4 3 2 1
5 4 3 2 1

D D

U3D
PAR 4 OF 6
AB12 NC37 NC64 AA18
AE16 NC38 NC65 AA20
V11 NC39 NC66 AA19
AE15 NC40 NC67 Y19
AA12 NC41 NC68 V17
AB16 NC42 NC69 AA17
AB14 NC43 NC70 AA15
AD14 NC44 NC71 Y15
AD13 NC45 NC72 AC20
AD15 NC46 NC73 AD19
+1.8V_S0
SBD_MEM/DVO_I/F
AC16 NC47 NC74 AE22
AE13 NC48 NC75 AC18
AC14 NC49 NC76 AB20
Y14 NC50 NC77 AD22
AC22 C35
NC78 0.1uf/10V/X7R/4
AD16 NC51 NC79 AD21
AE17 NC52
C AD17 NC53 NC80 Y17 HP recommend 2007/10/19 C

NC81 W18 near C202


W12 NC54 NC82 AD20
Y12 NC55 NC83 AE21
AD18 NC56
AB13 NC57 NC84 W17
AB18 AE19 +1.8V_S0 VCC1_1
NC58 NC85
V14 NC59
NC86 AE23 IOPLLVDD18 15 MILS WIDTH R148 0R/6
V15 NC60 NC87 AE24 IOPLLVDD 15 MILS WIDTH R162 0R/6
W14 NC61
NC88 AD23
AE12 C202
NC62 MEM_VREF1 2.2uf/6.3V/X5R/6
AD12 NC63 NC89 AE18

AMD-215NDA7BKA12FG-A12-RH FOR RS780,R148,R162,C203 and C202 will be populated.


C203
2.2uf/6.3V/X5R/6
VCC_DDR

R807
X_1K/4/1

MEM_VREF1

C34
R808
B 0/4 X_0.1uf/10V/X7R/4 B

08/13/07 AMD: Please let


MEM_VREF short to GND when
Sideport is not used.

A A

MICRO-STAR INt'L CO., LTD.


Title
SPMEM/STRAPS
Size Document Number Rev
1.0
MS-7500
Date: Wednesday, December 26, 2007 Sheet 16 of 48
5 4 3 2 1
5 4 3 2 1

AE14
RS740/RX780/RS780 POWER DIFFERENCE TABLE

AC3
AC4

M11
AA4
AB5
AB1
AB7

AE1
AE4
AB2

D11

E14
E15

K14

L15
J15
J12
W1
W2
W4
W7
W8
M6
G1
G2
G4

G8
D3
D5

H7

R7

N4

R1
R2
R4

U4
A2
B1

E4

P6

V7

V8
V6

Y6
L1
L2
L4
L7
J4
U3F PIN NAME RS740 RX780 RS780 PIN NAME RS740 RX780 RS780

VSSAPCIE
VSSAPCIE
VSSAPCIE
VSSAPCIE
VSSAPCIE
VSSAPCIE
VSSAPCIE
VSSAPCIE
VSSAPCIE
VSSAPCIE
VSSAPCIE
VSSAPCIE
VSSAPCIE
VSSAPCIE
VSSAPCIE
VSSAPCIE
VSSAPCIE
VSSAPCIE
VSSAPCIE
VSSAPCIE
VSSAPCIE
VSSAPCIE
VSSAPCIE
VSSAPCIE
VSSAPCIE
VSSAPCIE
VSSAPCIE
VSSAPCIE
VSSAPCIE
VSSAPCIE
VSSAPCIE
VSSAPCIE
VSSAPCIE
VSSAPCIE
VSSAPCIE
VSSAPCIE
VSSAPCIE
VSSAPCIE
VSSAPCIE
VSSAPCIE

VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
AMD-215NDA7BKA12FG-A12-RH
VDDHT NC +1.1V +1.1V IOPLLVDD +1.2V NC +1.1V

VDDHTRX NC +1.1V +1.1V AVDD +3.3V NC +3.3V

VDDHTTX +1.2V +1.2V +1.2V AVDDDI +1.8V NC +1.8V

PART 6/6
D D
GROUND VDDA18PCIE NC +1.8V +1.8V AVDDQ +1.8V NC +1.8V

VDD18 +1.8V +1.8V +1.8V PLLVDD +1.2V NC +1.1V

VDD18_MEM NC NC +1.8V PLLVDD18 +1.8V NC +1.8V


VSSAHT
VSSAHT
VSSAHT
VSSAHT
VSSAHT
VSSAHT
VSSAHT
VSSAHT
VSSAHT
VSSAHT
VSSAHT
VSSAHT
VSSAHT
VSSAHT
VSSAHT
VSSAHT
VSSAHT
VSSAHT
VSSAHT
VSSAHT
VSSAHT
VSSAHT
VSSAHT
VSSAHT
VSSAHT
VSSAHT
VSSAHT
VDDPCIE +1.2V +1.1V +1.1V VDDA18PCIEPLL +1.2V +1.8V +1.8V

VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VDDC +1.2V +1.1V +1.1V VDDA18HTPLL +1.8V +1.8V +1.8V

VDD_MEM +1.8V/1.5V NC +1.8V/1.5V VDDLTP18 +1.8V NC +1.8V


A25
D23
E22
G22
G24
G25
H19
J22
L17
L22
L24
L25
M20
N22
P20
R19
R22
R24
R25
H20
U22
V19
W22
W24
W25
Y21
AD25

L12
M14
N13
P12
P15
R11
R14
T12
U14
U11
U15
V12
W11
W15
AC12
AA14
Y18
AB11
AB15
AB17
AB19
AE20
AB21
K11
VDD33 +3.3V NC +3.3V VDDLT18 +1.8V NC +1.8V

IOPLLVDD18 +1.8V NC +1.8V VDDLT33 +3.3V NC NC

VCC1_1
VCC1_1
C 1.2A 120 MILS WIDTH U3E 300 MILS WIDTH 2A C
L26 28L900m_100_0805 J17 A6 VDD_PCIE L27
VDDHT VDDPCIE 28L900m_100_0805
K16 VDDHT PART 5/6 VDDPCIE B6
C601
L16 VDDHT VDDPCIE C6
C211 C553 C593 C587 M16 D6 C550 C596 C215 C579
0.1uf/16V/Y5V/4 VDDHT VDDPCIE
10uf/10V/Y5V/8 0.1uf/16V/X7R/6 0.1uf/16V/X7R/6 P16 VDDHT VDDPCIE E6 10uf/10V/Y5V/8
R16 VDDHT VDDPCIE F6
T16 G7 0.1uf/16V/X7R/6
VDDHT VDDPCIE
70 MILS WIDTH VDDPCIE H8 0.1uf/16V/X7R/6 1uf/16V/X5R/6 1uf/16V/X5R/6
FB19 220-2000mA VDDHTRX H18 J9
VDDHTRX VDDPCIE
G19 VDDHTRX VDDPCIE K9
F20 VDDHTRX VDDPCIE M9
C600 C578 C588 C603 E21 L9
0.1uf/16V/Y5V/4 VDDHTRX VDDPCIE
10uf/10V/Y5V/8 0.1uf/16V/X7R/6 0.1uf/16V/X7R/6 D22 VDDHTRX VDDPCIE P9
VCCA_1V2
0.5A B23 VDDHTRX VDDPCIE R9
A23 VDDHTRX VDDPCIE T9
45 MILS WIDTH VDDPCIE V9
FB22 220-2000mA VDDHTTX AE25 U9
VDDHTTX VDDPCIE VCC1_1
AD24 VDDHTTX
300 MILS WIDTH 7A
AC23 VDDHTTX VDDC K12
C545 C580 C296 C589 C304 AB22 J14
VDDHTTX VDDC
10uf/10V/Y5V/8 0.1uf/16V/X7R/6 AA21 VDDHTTX VDDC U16
Y20 J11 C584 C590 C541 C551 C556 C577 C595 C582 C585
0.1uf/16V/Y5V/4 0.1uf/16V/X7R/6 VDDHTTX VDDC
W19 K15 10uf/10V/Y5V/8

POWER
0.1uf/16V/X7R/6 VDDHTTX VDDC
V18 VDDHTTX VDDC M12
U17 L14 0.1uf/16V/X7R/6 0.1uf/16V/X7R/6 0.1uf/16V/X7R/6 10uf/10V/Y5V/8
VDDHTTX VDDC 0.1uf/16V/Y5V/4 0.1uf/16V/X7R/6 0.1uf/16V/Y5V/4
T17 VDDHTTX VDDC L11
R17 M13 0.1uf/16V/Y5V/4
VDDHTTX VDDC
B P17 VDDHTTX VDDC M15 B
+1.8V_S0
0.9A M17 VDDHTTX VDDC N12
20 MILS WIDTH VDDC N14
FB18 220-2000mA VDDA18PCIE J10 P11
VDDA18PCIE VDDC
P10 VDDA18PCIE VDDC P13
K10 VDDA18PCIE VDDC P14
C262 C594 C602 C547 C581 M10 R12
VDDA18PCIE VDDC
10uf/10V/Y5V/8 L10 VDDA18PCIE VDDC R15 Please do not install C592,C598, C546, C583 and R122 when using RX780.
W9 VDDA18PCIE VDDC T11
0.1uf/16V/Y5V/4 0.1uf/16V/X7R/6 H9 VDDA18PCIE VDDC T15 07/03/07 AMD: Found C598 will be changed to 0
0.1uf/16V/X7R/6 T10 U12
0.1uf/16V/X7R/6 VDDA18PCIE VDDC ohm when RS780 doesn't use side-port memory.
R10 VDDA18PCIE VDDC T14
Y9 VDDA18PCIE VDDC J16
+1.8V_S0
AA9 VDDA18PCIE 0.5A
AB9 AE10 R122 X_0R/8
VDDA18PCIE NC92
AD9 VDDA18PCIE NC93 AA11
+1.8V_S0 AE9 Y11 C598 RS780
VDDA18PCIE NC94 C546 C583 C592
CP4 U10 VDDA18PCIE NC95 AD10 0/4
AB10 X_10uf/10V/Y5V/8
NC96
2 1 15 MILS WIDTH VDDG18 F9 VDDG18 NC97 AC10
G9 X_0.1uf/16V/Y5V/4 X_0.1uf/16V/Y5V/4 VCC3
VDDG18
AE11 NC90 NC98 H11 VDDG33 15 MILS WIDTH R157 0R/6
R143 0R/6 15 MILS WIDTH VDD18 AD11 NC91 NC99 H12
RS780
RS780 RS780 C555 C576
C261 AMD-215NDA7BKA12FG-A12-RH 1uf/6.3V/Y5V/4 0.1uf/16V/Y5V/4
C599
1uf/6.3V/Y5V/4 1uf/6.3V/Y5V/4
A
Please do not install C555,C576 when using RX780. A

07/03/07 AMD: Found C599 will be changed


to 0 ohm when RS780 doesn't use side-port
memory. MICRO-STAR INt'L CO., LTD.
Title
08/26/07 AMD: recommend R143 install 0 ohm RX780/RS780-POWER
and C599 install 1uf. Size Document Number Rev
1.0
MS-7500
Date: Wednesday, December 26, 2007 Sheet 17 of 48
5 4 3 2 1
5 4 3 2 1

NB CLOCK INPUT TABLE


NB CLOCKS RS740 RX780 RS780

HT_REFCLKP
66M SE(SE) 100M DIFF 100M DIFF
VCC3 CLK_VDD HT_REFCLKN NC 100M DIFF 100M DIFF

L13 150 MILS WIDTH REFCLK_P


14M SE (3.3V) 14M SE (1.8V) 14M SE (1.1V) 100M DIFF
REFCLK_N NC NC vref
D 600L500mA-300_0805 C654 100M DIFF D
C637 C605 C606 C656 C651 C652 C607 C636 GFX_REFCLK 100M DIFF 100M DIFF 100M DIFF(IN/OUT)*
22uf/6.3V/X5R/8 0.1uf/16V/X5R/4 0.1uf/16V/X5R/4 0.1uf/16V/X5R/4 0.1uf/16V/X5R/4 0.1uf/16V/X5R/4 0.1uf/16V/X5R/4 0.1uf/16V/X5R/4 0.1uf/16V/X5R/4
GPP_REFCLK NC 100M DIFF 100M DIFF(OUT)

GPPSB_REFCLK 100M DIFF 100M DIFF 100M DIFF

* RS780 can be used as clock buffer to output two PCIE referecence clocks
By deault, chip will configured as input mode, BIOS can program it to output mode.
1- PLACE ALL THE SERIES TERMINATION RESISTORS AS CLOSE AS U6 AS POSSIBLE
2- ROUTE ALL CPUCLK/#, NBSRCCLK/#, GPPCLK/# AS DIFFERENT PAIR RULE
3- PUT DECOUPLING CAPS CLOSE TO U6 POWER PIN

VCC3
L16 15 MILS WIDTH
CLK_VDDA

C661 U6 C249 C241


600L500mA-300_0805 C604 X_5pF/50V/NPO/4 X_5pF/50V/NPO/4
22uf/6.3V/X5R/8 0.1uf/16V/X5R/4 36 42
CLK_VDD VDDA CPUKG0T_LPRS CPUCLKO_H 6
35 GNDA CPUKG0C_LPRS 41 CPUCLKO_L 6
L20 12 MILS WIDTH CPUKG1T_LPRS 38
VDDREF 52 37
2.2uf/6.3V/X5R/6 VDDREF CPUKG1C_LPRS
53 GNDREF
C C733 32 C
ATIG0T_LPRS KG_NBGFX_CLKP 15
600L500mA-300_0805 VDD48 56 31
VCC3 VDD48 ATIG0C_LPRS KG_NBGFX_CLKN 15
3 GND48 ATIG1T_LPRS 30
L10 12 MILS WIDTH ATIG1C_LPRS 29
33 VDD ATIG2T_LPRS 26 KG_GFX_CLKP 25
34 GND ATIG2C_LPRS 25 KG_GFX_CLKN 25
2.2uf/6.3V/X5R/6
600L500mA-300_0805 C655 40 VDDCPU
39 GNDCPU
SB_SRC0T_LPRS 23 KG_NBREF_CLKP 15
48 VDDHTT SB_SRC0C_LPRS 22 KG_NBREF_CLKN 15
45 GNDHTT SB_SRC1T_LPRS 19 KG_SBALINK_CLKP 19
SB_SRC1C_LPRS 18 KG_SBALINK_CLKN 19
CLK_VDD 28 VDDATIG
11 VDDSRC1
14 VDDSRC2
21 VDDSB_SRC
SRC0T_LPRS 17 KG_NBGPP_CLKP 15
24 GNDATIG SRC0C_LPRS 16 KG_NBGPP_CLKN 15
C650 14.318MHZ16P_D-RH 27 13
GNDATIG SRC1T_LPRS KG_GPP_CLK0P 25
SRC1C_LPRS 12 KG_GPP_CLK0N 25
10 GNDSRC SRC2T_LPRS 9 KG_GPP_CLK1P 25
2

22pf/50V/NPO/4 15 8
GNDSRC SRC2C_LPRS KG_GPP_CLK1N 25
Y1 R213 20 7
GNDSB_SRC SRC3T_LPRS KG_GBE_CLKP 24
X_1MR 6 KG_GBE_CLKN 24
1

C653 SRC3C_LPRS
54 X1
55 X2
22pf/50V/NPO/4
B B
VCC3 R226 4.7K/4 RST#_CLK 44 47
RESTORE# HTT0T_LPRS/66M KG_NBHT_CLKP 15
HTT0C_LPRS/66M 46 KG_NBHT_CLKN 15
R292 0/4 4
10,11,21,32 SCL0 SMBCLK
R294 0/4 5 2
10,11,21,32 SDA0 SMBDAT 48MHz_0
21,34 FP_RST# R235 X_0/4 1 USBCLK_EXT_R R216 33/4
48MHz_1 KG_CLK_48M_USB 21
CLK_VDD R193 1K/4/1 PD# 43 PD#
CLK_VDD 51 REF0/SEL_HTT66 C615
50 REF1 5pf/50V/NPO

R230 49 REF2
X_8.2K/4
Seligo P625_TSSOP56
R371 33/4 SEL_HTT66
32 SIO_14M OSC14M_REFOUT
R218 158/4/1
15 NB_OSC_14M
R161

R218 and R229 have R229 8.2K/4


90.9/4/1
been change value
for support RS780
2007/08/07
A A

REF0/SEL_HTT66 HTT CLOCK NB_OSC_14M

RS740 3.3V IN
MICRO-STAR INt'L CO., LTD.
0 100.00 DIFFERENTIAL Title
RX780 1.8V 75R/100R
Clock-Gen Seligo P625
1 66.66 SINGLE END RS780 1.1V 150R/75R
Size Document Number Rev
1.0
MS-7500
Date: Wednesday, December 26, 2007 Sheet 18 of 48
5 4 3 2 1
5 4 3 2 1

For EMI
PCICLK2_SLOT1 C725 15pF/50V/NPO/4

PCICLK3 C716 15pF/50V/NPO/4

PCICLK5 C718 15pF/50V/NPO/4

U4A

15,32 A_RST# A_RST# R245 33/4 N2


SB700 P4
A_RST# PCICLK0 RN37
Part 1 of 5 PCICLK1 P3

PCI CLKS
C729 0.1uf/10V/X7R/4 A_RX0P_C V23 P1 PCI_CLK2 1 2 PCICLK2_SLOT1
14 A_RX0P PCIE_TX0P PCICLK2 PCICLK2_SLOT1 23,26
D C663 0.1uf/10V/X7R/4 A_RX0N_C V22 P2 PCI_CLK3 3 4 PCICLK3 D
14 A_RX0N PCIE_TX0N PCICLK3 PCICLK3 23
14 A_RX1P
C702 0.1uf/10V/X7R/4 A_RX1P_C V24 PCIE_TX1P PCICLK4 T4 PCI_CLK4 5 6 SIO PCICLK has been chaneged
C727 0.1uf/10V/X7R/4 A_RX1N_C V25 T3 PCI_CLK5 7 8 PCICLK5
14 A_RX1N
C730 0.1uf/10V/X7R/4 A_RX2P_C U25
PCIE_TX1N PCICLK5/GPIO41 PCICLK5 23 PCICLK5 to LPCCLK1 for AMD
14 A_RX2P PCIE_TX2P
14 A_RX2N
C700 0.1uf/10V/X7R/4 A_RX2N_C U24 PCIE_TX2N 8P4R-33R0402 recommand 2006/08/13
PLACE PCIE CAPS C703 0.1uf/10V/X7R/4 A_RX3P_C T23
14 A_RX3P PCIE_TX3P
CLOSE TO U4 C728 0.1uf/10V/X7R/4 A_RX3N_C T22 N1 PCI_RST# R246 33/4
14 A_RX3N PCIE_TX3N PCIRST# PCIRST# 26

PCI EXPRESS INTERFACE


U22 AD[31..0]
14 A_TX0P PCIE_RX0P AD[31..0] 26
14 A_TX0N U21 U2 AD0
PCIE_RX0N AD0 AD1 VDD VCC3
14 A_TX1P U19 PCIE_RX1P AD1 P7
14 A_TX1N V19 V4 AD2
PCIE_RX1N AD2 AD3
14 A_TX2P R20 PCIE_RX2P AD3 T1
14 A_TX2N R21 V3 AD4
PCIE_RX2N AD4 AD5 C752 C751
14 A_TX3P R18 PCIE_RX3P AD5 U1
14 A_TX3N R17 V1 AD6 0.1uf/16V/Y5V/4 0.1uf/16V/Y5V/4
PCIE_RX3N AD6 AD7
AD7 V2
R240 562/4/1 T25 T2 AD8
VCC_SB R249 2.05K/4/1 PCIE_CALRP AD8 AD9
PCIE_VDDR T24 PCIE_CALRN AD9 W1
T9 AD10
L17 28L900m_100_0805 AD10 AD11
P24 PCIE_PVDD AD11 R6
R7 AD12
AD12
C731 P25 PCIE_PVSS AD13 R5 AD13 Adding some 0.1uF stitching capacitors for
C726 AD14
22uf/6.3V/X5R/8 AD14 U8
U5 AD15 crossing a split when these signals change
AD15
AD16 Y7 AD16 different reference layer.
1uf/6.3V/Y5V/4 W8 AD17
AD17
AD18 V9 AD18 For 07/09/07
Y8 AD19
AD19 AD20
AD20 AA8
Y4 AD21
C AD21 AD22 C
AD22 Y3
Y2 AD23
AD23 AD24
AD24 AA2
AB4 AD25
AD25 AD26 X_H2X3SF-1.27PITCH_BLACK-RH
18 KG_SBALINK_CLKP N25 PCIE_RCLKP/NB_LNK_CLKP AD26 AA1
18 KG_SBALINK_CLKN N24 AB3 AD27 J82 VCC3
PCIE_RCLKN/NB_LNK_CLKN AD27 AD28
AD28 AB2
K23 AC1 AD29
NB_DISP_CLKP AD29 AD30 R810
K22 AC2

PCI INTERFACE
NB_DISP_CLKN AD30 AD31 C_BE#[3..0] R809
AD31 AD1 C_BE#[3..0] 26
M24 W2 C_BE#0 21,30 USB_OCP#1 USB_OCP#1 1 2
NB_HT_CLKP CBE0# C_BE#1 USB_OCP#2 3
M25 NB_HT_CLKN CBE1# U7 21,30 USB_OCP#2 4 X_1K/4 X_1K/4
AA7 C_BE#2 21,30 USB_OCP#3 USB_OCP#3 5 6
CBE2# C_BE#3
P17 CPU_HT_CLKP CBE3# Y1
M18 AA6 21 SB_TEST1 SB_TEST1 1 2
CPU_HT_CLKN FRAME# FRAME# 26
DEVSEL# W5 DEVSEL# 26 3 4
M23 SLT_GFX_CLKP IRDY# AA5 IRDY# 26 5 6
M22 SLT_GFX_CLKN TRDY# Y5 TRDY# 26
U6 J81
PAR PAR 26
J19 W6 X_H2X3SF-1.27PITCH_BLACK-RH C750
GPP_CLK0P STOP# STOP# 26
J18 GPP_CLK0N PERR# W4 PERR# 26 X_0.1uf/16V/Y5V/4
SERR# V7 SERR# 26
L20 GPP_CLK1P REQ0# AC3 PCI_REQ0# 26 FOR AMD DEBUG 06/29/07
L19 AD4 PCI_REQ#1 TP160
GPP_CLK1N REQ1# PCI_REQ#2 TP161
REQ2# AB7
M19 GPP_CLK2P REQ3#/GPIO70 AE6 PCI_REQ#3 TP24 J81 chanegd from a header 2*5 to two header 2*3 for AMD

CLOCK GENERATOR
M20 AB6 R140 0/4 PRT_DET# 21,29 recommend 2007/10/23
GPP_CLK2N REQ4#/GPIO71
GNT0# AD2 PCI_GNT0# 26
N22 AE4 PCI_GNT#1 TP162
GPP_CLK3P GNT1# PCI_GNT#2 TP163 VCC3
P22 GPP_CLK3N GNT2# AD5
AC6 PCI_GNT#3 TP26 PCI_CLKRUN# R247 10K/4
B TP30 25M_48M_66M_OSC GNT3#/GPIO72 PCI_GNT#4 TP27 B
L18 25M_48M_66M_OSC GNT4#/GPIO73 AE5
AD6 PCI_CLKRUN#
CLKRUN#
LOCK# V5 PCI_LOCK# 26 Add R140 foe HP
25M_X1
R135
J21 25M_X1 recommend 2007/10/29
INTE#/GPIO33 AD3 PCI_INTE# 26 LPC_AD[3..0] 32
INTF#/GPIO34 AC4 PCI_INTF# 26
X_0/4 AE2
INTG#/GPIO35 PCI_INTG# 26
J20 25M_X2 INTH#/GPIO36 AE3 PCI_INTH# 26
D26 3VDUAL
R250 1K/4/1

1
G22 LPC_CLK0 R289 22/4 BAT54C_SOT23
LPCCLK0 LPCCLK0 23,32
E22 LPC_CLK1 R290 22/4 LPCCLK1 23,32
32K_X1 LPCCLK1
A3 X1 LAD0 H24 LPC_AD0 32 3
H23
RTC XTAL

LAD1 LPC_AD1 32
Y5 J25
LAD2 LPC_AD2 32 XBT1
32.768KHZ12.5P_D-LF J24 LPC_AD3 32

2
LAD3
LPC

1 2 32K_X2 B3 H25 1 2
X2 LFRAME# LPC_FRAME# 32
R242 VCC_DDR H22 SW50
LDRQ0# LPC_DRQ#0 32 3VDUAL
X_20MR R121 300/4 AB8 SB600_PCI_GNT5# TP23 VCC3 20mil
3
4

+1.8V_S0 LDRQ1#/GNT5#/GPIO68 SB600_PCI_REQ5# R237 10K/4 BAT2P-RH


BMREQ#/REQ5#/GPIO65 AD7 1 1 4 4
R239 1K/4/1
SERIRQ V15 SERIRQ 32 20mil
F23 R252 22/4 SUS_CLK_TPM 32 2
15 ALLOW_LDTSTOP ALLOW_LDTSTP 2
6,32 PROCHOT_1.8# R134 X_0/4 F24 C3 R251 22/4 SUS_CLK_SIO 23,32
PROCHOT# RTCCLK
R241 20MR 6 LDT_PWRGD LDT_PWRGD F22 LDT_PG INTRUDER_ALERT# C2 INTR_ALERT# 3VDUAL 20mil
-LDTSTOP VBT_SB VBT_IN R207 X_100K/4
CPU

6,15 -LDTSTOP G25 LDT_STP# VBAT B2 3 3


RTC

C704 C722 6,15 -LDT_RST -LDT_RST G24 R238 512/4/1 5


LDT_RST# VBAT 5
18pf/50V/NPO/6 18pf/50V/NPO/6 SW50 SLIDE SWITCH OPERATION
Note: LDT_PG, LDT_STP# & LDT_RST# are OD AMD-218S7EALA12FG-A12-RH 1-3 NORMAL OPERATION SWITCH
and require a PU to the CPU I/O rail. They are R248
A A
also in the S5 domain to prevent glitching at
512/4/1 2-3 CLEAR CMOS
PLACE THESE COMPONENTS CLOSE TO U600, AND
USE GROUND GUARD FOR 32K_X1 AND 32K_X2 power up.

C712 C662
MICRO-STAR INt'L CO., LTD.
0.1uf/16V/Y5V/4
Title
SB700-PCIE/PCI/CPU/LPC
Added R248 for 3VDUAL Size Document Number Rev
1uf/6.3V/Y5V/4
short when clean CMOS MS-7500 1.0
2007/08/06 Date: Wednesday, December 26, 2007 Sheet 19 of 48
5 4 3 2 1
5 4 3 2 1

G 1
2 SATA_TX0+_C PLACE SATA AC COUPLING
T+ SATA_TX0-_C
T- 3 CAPS CLOSE TO SB700
P60 G 4
SATA_RX0-_C U4B
R- 5
6 SATA_RX0+_C
R+ 4.99/4/1
N5N-07M0561-F02 G 7
SATA_TX0+_C C918 0.01uf/16V/X7R/4 R624 SATA_TX0+ AD9 SB700 IDE_IORDY TP34
4 Ss 3 Ps CONN-SATA_DARKBLUE SATA_TX0-_C C922 0.01uf/16V/X7R/4 R625 SATA_TX0- AE9 SATA_TX0P
Part 2 of 5
IDE_IORDY AA24
AA25 IDE_IRQ TP46
4.99/4/1 SATA_TX0N IDE_IRQ IDE_A0 TP39
IDE_A0 Y22
1 SATA_RX0-_C C548 0.01uf/16V/X7R/4 SATA_RX0-AB10 AB23 IDE_A1 TP44
G SATA_TX1+_C SATA_RX0+_C C739 0.01uf/16V/X7R/4 SATA_RX0+AC10 SATA_RX0N IDE_A1 IDE_A2 TP45
1 Pm 2 Sm T+ 2
3 SATA_TX1-_C 4.99/4/1 SATA_RX0P IDE_A2 Y23
AB24 IDE_DACK# TP35
D T- SATA_TX1+_C C774 0.01uf/16V/X7R/4 R626 SATA_TX1+AE10 IDE_DACK# IDE_DRQ TP36 D
P61 G 4
SATA_RX1-_C SATA_TX1-_C C773 0.01uf/16V/X7R/4 R627 SATA_TX1- AD10 SATA_TX1P IDE_DRQ AD25
IDE_IOR# TP40
R- 5 SATA_TX1N IDE_IOR# AC25
6 SATA_RX1+_C 4.99/4/1 AC24 IDE_IOW# TP41
R+ SATA_RX1-_C C775 0.01uf/16V/X7R/4 SATA_RX1-AD11 IDE_IOW# IDE_CS1# TP42
N5N-07M0571-F02 G 7
SATA_RX1+_C C776 0.01uf/16V/X7R/4 SATA_RX1+AE11 SATA_RX1N IDE_CS1# Y25
Y24 IDE_CS3# TP43
CONN-SATA_WHITE 4.99/4/1 SATA_RX1P IDE_CS3#
SATA_TX2+_C C782 0.01uf/16V/X7R/4 R628 SATA_TX2+AB12 AD24 IDE_D0 TP50
SATA_TX2-_C C780 0.01uf/16V/X7R/4 R629 SATA_TX2- AC12 SATA_TX2P IDE_D0/GPIO15 IDE_D1 TP57
G 1 SATA_TX2N IDE_D1/GPIO16 AD23
2 SATA_TX2+_C 4.99/4/1 AE22 IDE_D2 TP58
T+ IDE_D2/GPIO17

ATA 66/100/133
3 SATA_TX2-_C SATA_RX2-_C C784 0.01uf/16V/X7R/4 SATA_RX2- AE12 AC22 IDE_D3 TP53
T- SATA_RX2+_C C783 0.01uf/16V/X7R/4 SATA_RX2+ AD12 SATA_RX2N IDE_D3/GPIO18 IDE_D4 TP54
P62 G 4
SATA_RX2-_C 4.99/4/1 SATA_RX2P IDE_D4/GPIO19 AD21
IDE_D5 TP51
R- 5 IDE_D5/GPIO20 AE20
6 SATA_RX2+_C SATA_TX3+_C C787 0.01uf/16V/X7R/4 R630 SATA_TX3+AD13 AB20 IDE_D6 TP52
R+ R631 SATA_TX3P IDE_D6/GPIO21

SERIAL ATA
SATA_TX3-_C C788 0.01uf/16V/X7R/4 SATA_TX3- AE13 IDE_D7 TP55
N5N-07M0581-F02 G 7
4.99/4/1 SATA_TX3N IDE_D7/GPIO22 AD19
AE19 IDE_D8 TP56
CONN-SATA_LIGHTBLUE SATA_RX3-_C C789 0.01uf/16V/X7R/4 SATA_RX3-AB14 IDE_D8/GPIO23 IDE_D9 TP59
SATA_RX3N IDE_D9/GPIO24 AC20
SATA_RX3+_C C790 0.01uf/16V/X7R/4 SATA_RX3+AC14 AD20 IDE_D10 TP60
SATA_RX3P IDE_D10/GPIO25 IDE_D11 TP62
G 1 IDE_D11/GPIO26 AE21
2 SATA_TX3+_C AE14 AB22 IDE_D12 TP61
T+ SATA_TX3-_C SATA_TX4P IDE_D12/GPIO27 IDE_D13 TP64
T- 3 AD14 SATA_TX4N IDE_D13/GPIO28 AD22
IDE_D14 TP63
P63 G 4
SATA_RX3-_C IDE_D14/GPIO29 AE23
IDE_D15 TP66
R- 5 AD15 SATA_RX4N IDE_D15/GPIO30 AC23
6 SATA_RX3+_C AE15
R+ SATA_RX4P
N5N-07M0431-H06 G 7
AB16
CONN-SATA_ORANGE SATA_TX5P
AC16 SATA_TX5N
G6 SPI_DI
SPI_DI/GPIO12 SPI_DI 29
AE16 D2 SPI_DO SPI_DO 29
SATA_RX5N SPI_DO/GPIO11 SPI_CLK
AD16 SATA_RX5P SPI_CLK/GPIO47 D1 SPI_CLK 29
C F4 SPI_HOLD# SPI_HOLD# 29 C
SPI_HOLD#/GPIO31

SPI ROM
R219 1K/4/1 SATA_CAL V12 F3 SPI_CS# SPI_CS# 29
SATA_CAL SPI_CS1#/GPIO32
R219 IS 1K 1% FOR XTAL, SATA_X1 Y12 U15
SATA_X1 LAN_RST#/GPIO13 LPC_TPM_RST#
J1
4.99K 1% FOR INTERNAL SATA_X2 AA12
ROM_RST#/GPIO14 TP49
SATA_X2
CLK FANOUT0/GPIO3 M8 PROCHOT2_SB
PROCHOT2_SB 32
SATA_LED_SB# W11 M5 COMM_B_DET#
32 SATA_LED_SB# SATA_ACT#/GPIO67 FANOUT1/GPIO48 COMM_B_DET# 33
M7 FRONT_AUDIO_DET#
FANOUT2/GPIO49 FRONT_AUDIO_DET# 31
AA11 P5 FRONT_USB_DET#
PLLVDD_SATA PLLVDD_SATA FANIN0/GPIO50 FRONT_USB_DET# 30

SATA PWR
P8 FDO
FANIN1/GPIO51 PSWRD_EN TP67
XTLVDD_SATA W12 XTLVDD_SATA FANIN2/GPIO52 R8 PSWRD_EN 26
C6 R340 0/4
TEMP_COMM
TEMPIN0/GPIO61 B6
TEMPIN1/GPIO62 A6
A5 TEMP _COMM connect to GND for AMD recommand

HW MONITOR
TEMPIN2/GPIO63
TEMPIN3/TALERT#/GPIO64 B5 2007/08/13
A4 ROM_TBL#
VIN0/GPIO53 ROM_TBL# 26
B4 BBR#
VIN1/GPIO54 BBR# 26
C4 BRD_ID2
VIN2/GPIO55 BRD_ID2 21
VIN3/GPIO56 D4
VIN4/GPIO57 D5
VIN5/GPIO58 D6
VIN6/GPIO59 A7
VIN7/GPIO60 B7
3VDUAL
AVDD_HWM
B B
1 2
F6 CP14
AVDD

AVSS G7

AMD-218S7EALA12FG-A12-RH

NS_VIA CONNECTS
HWM_AGND TO GND
SATA_X1 C921 10pf/50V/NPO/6
VCC3
1

R224 Y6 FRONT_USB_DET# R332 8.2K/4


10MR 25MHZ/18pf/HC49S
2

SATA_X2 C923 10pf/50V/NPO/6 FRONT_AUDIO_DET# R341 X_8.2K/4


COMM_B_DET# R319 X_8.2K/4

SB700 internal prll-up to 3.3V_S0 2007/08/13

A VCC3 XTLVDD_SATA A
VCC_SB PLLVDD_SATA
28L900m_100_0805 L32 15 MILS WIDTH
L30 15 MILS WIDTH 28L900m_100_0805

C915 C917
MICRO-STAR INt'L CO., LTD.
C915 & C917 CLOSE 1uf/6.3V/Y5V/4 C919 CLOSE TO THE C919
1uf/6.3V/Y5V/4 Title
TO THE BALLS OF BALL OF U4
U4
10uf/10V/Y5V/8 SB700-SATA/IDE/HWM/SPI
Size Document Number Rev
1.0
MS-7500
Date: Wednesday, December 26, 2007 Sheet 20 of 48
5 4 3 2 1
5 4 3 2 1

The pull-up on the SB700 side of the transistor is not


VCC_DDR
needed. The SB700 has a default internal 10k pull-up.
(See attached pic for reference) MSI can NI R352 for U4D
R186 HP recommand 2007/08/19
4.7K/4 Part 4 of 5
PME# E1
SB700
24,26,32 PME#

B
RI# PCI_PME#/GEVENT4#
32 RI# E2 RI#/EXTEVNT0# USBCLK/14M_25M_48M_OSC C8 KG_CLK_48M_USB 18
Q22 TP186
SLP_S2 H7
SB_THRM# SLP_S3# SLP_S2/GPM9# USB_RCOMP R129 11.8K/4/1
6,32 CPU_THRIP# E C 32,34,38 SLP_S3# F5 SLP_S3# USB_RCOMP G8
SLP_S5# G1

USB MISC
24,28,32,35 SLP_S5# SLP_S5#

ACPI / WAKE UP EVENTS


N-2N3904_SOT23 32 PWRBTN# PWRBTN# H2
R352 X_8.2K/4 SB_PWRGD PWR_BTN#
3VDUAL 15 SB_PWRGD H1 PWR_GOOD
SUS_STAT# SUS_STAT# K3 SUS_STAT#
D C377 has been unpopulate SB_TEST2 H5 TEST2 USB_FSD13P E6 D
SB_TEST1 H4 E7
for meet power sequence 19 SB_TEST1
SB_TEST0 H3
TEST1 USB_FSD13N
TEST0
2007/08/13 A20GATE Y15 F7

USB 1.1
32 A20GATE KBRST# GA20IN/GEVENT0# USB_FSD12P
32 KBRST# W15 KBRST#/GEVENT1# USB_FSD12N E8
SIO_PME# K4
32 SIO_PME# LPC_PME#/GEVENT3#
R269 X_22K/4 32 EXT_SMI# R312 0/4 LPC_SMI# K24 H11
RSMRST# S3_STATE LPC_SMI#/EXTEVNT1# USB_HSD11P
3VDUAL 35 S3_STATE F1 S3_STATE/GEVENT5# USB_HSD11N J10
R261 0/4 J2
18,34 FP_RST# SYS_RESET#/GPM7#
PE_WAKE_CHIP# H6 E11
24,32 PE_WAKE_CHIP# WAKE#/GEVENT8# USB_HSD10P USBP10 27
C377 SB_BLINK F2 F11
BLINK/GPM6# USB_HSD10N USBN10 27
X_2.2uf/6.3V/X5R/6 SB_THRM# J6
WD_PWRGD SMBALERT#/THRMTRIP#/GEVENT2#
15 WD_PWRGD W14 NB_PWRGD USB_HSD9P A11 USBP9 30
USB_HSD9N B11 USBN9 30
RSMRST# D3
3VDUAL RSMRST#
USB_HSD8P C10 USBP8 30
32 IO_RSMRST# R295 0/4 D10
USB_HSD8N USBN8 30
R195 X_10K/4 SB_BLINK
29,38 CHASSIS_ID1 CHASSIS_ID1 R804 1K/4 AE18 G11
SATA_IS0#/GPIO10 USB_HSD7P USBP7 30
VCC3 38 CHASSIS_ID0 CHASSIS_ID0 R801 1K/4 AD18 H12
CLK_REQ3#/SATA_IS1#/GPIO6 USB_HSD7N USBN7 30
BRD_REV0 AA19
BRD_ID0 SMARTVOLT1/SATA_IS2#/GPIO4
W17 CLK_REQ0#/SATA_IS3#/GPIO0 USB_HSD6P E12 USBP6 30
GB_ENABLE R259 X_10K/4 TP65
PE0_PRSNTX16# V17 E14
CLK_REQ1#/SATA_IS4#/FANOUT3/GPIO39 USB_HSD6N USBN6 30
DDR3_RST# R262 X_10K/4 19,29 PRT_DET# PRT_DET# R263 X_0/4 W20
SCL0 R137 2.2K/4 SB600_SPKR_OUT CLK_REQ2#/SATA_IS5#/FANIN3/GPIO40
31 SPKR W21 SPKR/GPIO2 USB_HSD5P C12 USBP5 30

USB 2.0
SDA0 R277 2.2K/4 SCL0 AA18 D12
10,11,18,32 SCL0 SCL0/GPOC0# USB_HSD5N USBN5 30
WD_PWRGD R439 X_10K/4 SDA0 W18
10,11,18,32 SDA0 SDA0/GPOC1#
SB600_SCL1 K1 B12
SCL1/GPOC2# USB_HSD4P USBP4 30
SB600_SDA1 K2 A12
SDA1/GPOC3# USB_HSD4N USBN4 30
BRD_ID1 AA20

GPIO
3VDUAL CHASSIS_ID2 R802 1K/4 DDC1_SCL/GPIO9
38 CHASSIS_ID2 Y18 DDC1_SDA/GPIO8 USB_HSD3P G12 USBP3 30
C GB_ENABLE C1 G14 C
SB600 LLB#/GPIO66 USB_HSD3N USBN3 30
SB600_SCL1 R272 2.2K/4 BRD_REV1 Y19
SB600_SDA1 R274 SB600 2.2K/4 DDR3_RST# SMARTVOLT2/SHUTDOWN#/GPIO5
TP28 G5 DDR3_RST#/GEVENT7# USB_HSD2P H14 USBP2 30
SUS_STAT# R276 2.2K/4 H15
USB_HSD2N USBN2 30
SB_TEST2 R278 X_2.2K/4 Modify PRT_DET#
SB_TEST1 R279 X_2.2K/4 A13
SB_TEST0 R280 X_2.2K/4 circuit 2006/08/06 USB_HSD1P
B13
USBP1 30
USB_HSD1N USBN1 30

USB_HSD0P B14 USBP0 30


LAN_CTL B9 A14
24 LAN_CTL USB_OC6#/IR_TX1/GEVENT6# USB_HSD0N USBN0 30
27 DASH_DET R271 X_0/4 GPM5#/USB_OC5 B8
USB_OCP#4 USB_OC5#/IR_TX0/GPM5#
A8 USB_OC4#/IR_RX0/GPM4# IMC_GPIO8 A18

USB OC
USB_OCP#3 A9 B18
19,30 USB_OCP#3 USB_OCP#2 USB_OC3#/IR_RX1/GPM3# IMC_GPIO9
19,30 USB_OCP#2 E5 USB_OC2#/GPM2# IMC_PWM0/IMC_GPIO10 F21
USB_OCP#1 F8 D21
19,30 USB_OCP#1 USB_OCP#0 USB_OC1#/GPM1# SCL2/IMC_GPIO11
30 USB_OCP#0 E4 USB_OC0#/GPM0# SDA2/IMC_GPIO12 F19
SCL3_LV/IMC_GPIO13 E20
R141 22/4 AZ_BIT_CLK_R M1 E21
31 HDA_BITCLK_R R194 22/4 AZ_SDATA_OUT_R AZ_BITCLK SDA3_LV/IMC_GPIO14
31 HDA_SDOUT M2 AZ_SDOUT IMC_PWM1/IMC_GPIO15 E19
J7 AZ_SDIN0/GPIO42 IMC_PWM2/IMC_GPO16 D19 IMC_GPIO16 23
J8 AZ_SDIN1/GPIO43 IMC_PWM3/IMC_GPO17 E18 IMC_GPIO17 23
R256 0/4 SB600_SCL1

HD AUDIO
24,25,26,32 SMBCLK1 L8 AZ_SDIN2/GPIO44
R257 0/4 SB600_SDA1 31 HDA_SDIN0 M3 G20
24,25,26,32 SMBDATA1 AZ_SDIN3/GPIO46 IMC_GPIO18
R273 22/4 L6 G21
31 HDA_SYNC R434 22/4 SB600_AZ_RST# AZ_SYNC IMC_GPIO19
23,31 HDA_RST# M4 AZ_RST# IMC_GPIO20 D25
27 DASH_DET R258 0/4 GPM8#/AZ_DOCK_RST# L5 D24
AZ_DOCK_RST#/GPM8# IMC_GPIO21

INTEGRATED uC
IMC_GPIO22 C25
IMC_GPIO23 C24
IMC_GPIO24 B25
IMC_GPIO25 C23
B For EMI(closed SB) HDA_SDIN0
B24
B
IMC_GPIO26
IMC_GPIO27 B23
AZ_BIT_CLK_R HDA_BITCLK_R R270 A23
IMC_GPIO28
X_10K/4 IMC_GPIO29 C22
IMC_GPIO30 A22
C416 B22
R268 IMC_GPIO31
33pf/50V/NPO/4 IMC_GPIO32 B21
X_10K/4 IMC_GPIO33 A21
AMD recommend 2007/10/19 H19 D20
IMC_GPIO0 IMC_GPIO34
H20 IMC_GPIO1 IMC_GPIO35 C20

INTEGRATED uC
H21 SPI_CS2#/IMC_GPIO2 IMC_GPIO36 A20
F25 IDE_RST#/F_RST#/IMC_GPO3 IMC_GPIO37 B20
IMC_GPIO38 B19
AMD recommend 2007/10/19 D22 A19
IMC_GPIO4 IMC_GPIO39
E24 IMC_GPIO5 IMC_GPIO40 D18
E25 IMC_GPIO6 IMC_GPIO41 C18
D23 IMC_GPIO7

AMD-218S7EALA12FG-A12-RH
VCC3

BRD_REV0 X_8.2K/4 R367


BRD_REV1 8.2K/4 R376
PRT_DET# 8.2K/4 R354

BRD_REV0 2.7K/4 R382


BRD_REV1 X_2.7K/4 R387
A A

PE_WAKE_CHIP#

VCC3
C376
X_0.1uf/16V/Y5V/4 BRD_ID0
BRD_ID1
X_10K/4
X_10K/4
R417
R401
MICRO-STAR INt'L CO., LTD.
BRD_ID2 X_10K/4 R418
BRD_ID0 2.7K/4 R412 Title
BRD_ID1 2.7K/4 R404 SB700-ACPI/GPIO/USB/AUDIO
20 BRD_ID2 BRD_ID2 2.7K/4 R419
Size Document Number Rev
1.0
MS-7500
Date: Wednesday, December 26, 2007 Sheet 21 of 48
5 4 3 2 1
5 4 3 2 1

VCC_SB
U4C
VCC3
SB700 100 MILS WIDTH VDD FB24 0R/8
L9 L15 VDD 1 2
VDDQ_1 VDD_1
M9 VDDQ_2 Part 3 of 5 VDD_2 M12 SB700 A12
T15 M14 U4E
C561 C480 C507 VDDQ_3 VDD_3
U9 VDDQ_4 VDD_4 N13
1

CORE S0
C499 C562 C483 C564 C508 C714 C717
+

EC84 C502
U16 VDDQ_5 VDD_5 P12
22uf/6.3V/X5R/8 SB700

PCI/GPIO I/O
U17 VDDQ_6 VDD_6 P14 VSS_1 A2
D V8 R11 A25 D
2

VDDQ_7 VDD_7 1uf/6.3V/Y5V/4 1uf/6.3V/Y5V/4 1uf/10V/Y5V/6 1uf/6.3V/Y5V/4 VSS_2


W7 VDDQ_8 VDD_8 R15 VSS_3 B1
Y6 VDDQ_9 VDD_9 T16 VSS_4 D7
1uf/6.3V/Y5V/4 1uf/10V/Y5V/6 1uf/10V/Y5V/6 AA4 T10 F20
1uf/6.3V/Y5V/4 1uf/10V/Y5V/6 1uf/10V/Y5V/6 VDDQ_10 AVSS_SATA_1 VSS_5
AB5 VDDQ_11 U10 AVSS_SATA_2 VSS_6 G19
AB21 VDDQ_12 U11 AVSS_SATA_3 VSS_7 H8
1000uf/6.3V/8X11.5/3.5mm/30mOHM U12 K9
AVSS_SATA_4 VSS_8
V11 AVSS_SATA_5 VSS_9 K11
VCC3 V14 K16
AVSS_SATA_6 VSS_10
50 MILS WIDTH 30 MILS WIDTH VCC_SB W9 AVSS_SATA_7 VSS_11 L4
1 2 CP20 VDD33_18 Y20 L21 CKVDD_1.2V L41 Y9 L7
VDD33_18_1 CKVDD_1.2V_1 28L900m_100_0805 AVSS_SATA_8 VSS_12
AA21 VDD33_18_2 CKVDD_1.2V_2 L22 Y11 AVSS_SATA_9 VSS_13 L10

IDE/FLSH I/O

CLKGEN I/O
AA22 VDD33_18_3 CKVDD_1.2V_3 L24 Y14 AVSS_SATA_10 VSS_14 L11
C734 AE25 L25 C721 C528 C510 C527 Y17 L12
C567 C571 VDD33_18_4 CKVDD_1.2V_4 AVSS_SATA_11 VSS_15
AA9 AVSS_SATA_12 VSS_16 L14
X_22uf/6.3V/X5R/8 C563 2.2uf/6.3V/X5R/6 AB9 L16
C747 AVSS_SATA_13 VSS_17
AB11 AVSS_SATA_14 VSS_18 M6
X_1uf/10V/Y5V/6 X_1uf/10V/Y5V/6 2.2uf/6.3V/X5R/6 2.2uf/6.3V/X5R/6 AB13 M10
X_1uf/6.3V/Y5V/4 X_1uf/6.3V/Y5V/4 2.2uf/6.3V/X5R/6 AVSS_SATA_15 VSS_19
AB15 AVSS_SATA_16 VSS_20 M11
AB17 AVSS_SATA_17 VSS_21 M13
AC8 M15
POWER AD8
AVSS_SATA_18
AVSS_SATA_19
VSS_22
VSS_23 N4
CP11 AE8 N12
PCIE_VDDR AVSS_SATA_20 VSS_24
VCC_SB 100 MILS WIDTH 3VDUAL
VSS_25 N14
L43 28L900m_100_0805 P18 PCIE_VDDR_1
20 MILS WIDTH S5_3.3V_1 1 2 VSS_26 P6
P19 PCIE_VDDR_2 VSS_27 P9
P20 PCIE_VDDR_3 VSS_28 P10

A-LINK I/O
C735 C503 C711 P21 A17 C532 A15 P11
C481 C493 C715 PCIE_VDDR_4 S5_3.3V_1 AVSS_USB_1 VSS_29
R22 PCIE_VDDR_5 S5_3.3V_2 A24 B15 AVSS_USB_2 VSS_30 P13
22uf/6.3V/X5R/8 R24 B17 C14 P15
PCIE_VDDR_6 S5_3.3V_3 1uf/10V/Y5V/6 AVSS_USB_3 VSS_31
R25 J4 D8 R1

3.3V_S5 I/O
C 1uf/6.3V/Y5V/4 0.1uf/16V/Y5V/4 0.1uf/16V/Y5V/4 PCIE_VDDR_7 S5_3.3V_4 CP16 AVSS_USB_4 VSS_32 C
S5_3.3V_5 J5 D9 AVSS_USB_5 VSS_33 R2
1uf/6.3V/Y5V/4
S5_3.3V_6 L1 20 MILS WIDTH S5_3.3V_2 1 2 D11 AVSS_USB_6 VSS_34 R4
1uf/6.3V/Y5V/4 L2 D13 R9
VCC_SB AVDD_SATA S5_3.3V_7 C748 AVSS_USB_7 VSS_35

GROUND
D14 AVSS_USB_8 VSS_36 R10
50 MILS WIDTH C559 D15 AVSS_USB_9 VSS_37 R12
L31 28L900m_100_0805 AA14 AVDD_SATA_1
15 MILS WIDTH +1.2VALW 1uf/6.3V/Y5V/4 E15 AVSS_USB_10 VSS_38 R14
AB18 AVDD_SATA_4 F12 AVSS_USB_11 VSS_39 T11
C772 AA15 F14 T12
AVDD_SATA_2 AVSS_USB_12 VSS_40

SATA I/O
C491 C737 C492 C713 AA17 G2 22uf/6.3V/X5R/1206 G9 T14
AVDD_SATA_3 S5_1.2V_1 AVSS_USB_13 VSS_41

CORE S5
22uf/6.3V/X5R/8 0.1uf/16V/Y5V/4 AC18 G4 C536 C410 H9 U4
AVDD_SATA_5 S5_1.2V_2 1uf/6.3V/Y5V/4 1uf/6.3V/Y5V/4 USB_PHY AVSS_USB_14 VSS_42
AD17 AVDD_SATA_6 H17 AVSS_USB_15 VSS_43 U14
1uf/6.3V/Y5V/4 AE17 J9 V6
AVDD_SATA_7 AVSS_USB_16 VSS_44
1uf/10V/Y5V/6 0.1uf/16V/Y5V/4 15 MILS WIDTH J11 AVSS_USB_17 VSS_45 Y21
A10 USB_PHY_1.2V 1 2 CP12 J12 AB1
USB_PHY_1.2V_1 AVSS_USB_18 VSS_46
USB_PHY_1.2V_2 B10 J14 AVSS_USB_19 VSS_47 AB19
J15 AVSS_USB_20 VSS_48 AB25
C400 C395 C501 K10 AE1
10uf/10V/Y5V/8 AVSS_USB_21 VSS_49
K12 AVSS_USB_22 VSS_50 AE24
AVDD_USB K14
1uf/6.3V/Y5V/4 1uf/6.3V/Y5V/4 AVSS_USB_23
K15 AVSS_USB_24
3VDUAL P23
PCIE_CK_VSS_9
A16 AVDDTX_0 V5_VREF AE7 V5_VREF 10 MILS WIDTH 1K/6 R281
VCC5 PCIE_CK_VSS_10 R16
50 MILS WIDTH B16 AVDDTX_1 PCIE_CK_VSS_11 R19
L25 C16 J16 AVDDCK_3.3V T17
AVDDTX_2 AVDDCK_3.3V PCIE_CK_VSS_12
28L900m_100_0805 D16 AVDDTX_3
15 MILS WIDTH PCIE_CK_VSS_13 U18
C489 D17 K17 AVDDCK_1.2V C552 VCC3 H18 U20
AVDDTX_4 AVDDCK_1.2V PCIE_CK_VSS_1 PCIE_CK_VSS_14
PLL

C736 C744 C378 C417 C738 C414 E17 AVDDTX_5


15 MILS WIDTH 1uf/6.3V/Y5V/4 J17 PCIE_CK_VSS_2 PCIE_CK_VSS_15 V18
22uf/6.3V/X5R/8 0.1uf/16V/Y5V/4
USB I/O

F15 AVDDRX_0 AVDDC E9 +3.3V_AVDDC J22 PCIE_CK_VSS_3 PCIE_CK_VSS_16 V20


F17 AVDDRX_1
15 MILS WIDTH K25 PCIE_CK_VSS_4 PCIE_CK_VSS_17 V21
1uf/6.3V/Y5V/4 0.1uf/16V/Y5V/4 F18 M16 W19
AVDDRX_2 PCIE_CK_VSS_5 PCIE_CK_VSS_18

3
1uf/10V/Y5V/6 1uf/6.3V/Y5V/4 0.1uf/16V/Y5V/4 G15 D14 M17 W22
B AVDDRX_3 PCIE_CK_VSS_6 PCIE_CK_VSS_19 B
G17 AVDDRX_4 M21 PCIE_CK_VSS_7 PCIE_CK_VSS_20 W24
G18 S-BAT54A_SOT23 P16 W25
AVDDRX_5 PCIE_CK_VSS_8 PCIE_CK_VSS_21
F9 L17

2
AMD-218S7EALA12FG-A12-RH AVSSC AVSSCK
Part 5 of 5
AMD-218S7EALA12FG-A12-RH

VCC3
AVDDCK_3.3V

L28
28L900m_100_0805
C390
2.2uf/6.3V/X5R/6

VCC_SB
AVDDCK_1.2V

L36
28L900m_100_0805
C392
2.2uf/6.3V/X5R/6

3VDUAL
A A

+3.3V_AVDDC

L33
28L900m_100_0805
C394 C513
MICRO-STAR INt'L CO., LTD.
2.2uf/6.3V/X5R/6
1uf/6.3V/Y5V/4 Title
SB700-POWER & DECOUPLING
Size Document Number Rev
1.0
MS-7500
Date: Wednesday, December 26, 2007 Sheet 22 of 48
5 4 3 2 1
5 4 3 2 1

REQUIRED STRAPS NOTE: SB700 HAS INTERNAL 15K PULL UP RESISTOR FOR RTC_CLK

D D

VCC3 VCC3 VCC3 3VDUAL 3VDUAL 3VDUAL 3VDUAL 3VDUAL 3VDUAL

R342 R306 R318 R437 R317 R308 R325 R324 R443


X_2.2K/4 X_10K/4 X_10K/4 X_10K/4 X_10K/4 X_10K/4 2.2K/4 X_2.2K/4 X_10K/4

19,26 PCICLK2_SLOT1
19 PCICLK3
19 PCICLK5

19,32 LPCCLK0
19,32 LPCCLK1
21,31 HDA_RST#
21 IMC_GPIO17
21 IMC_GPIO16
19,32 SUS_CLK_SIO

R174
R305 R313 R333 10K/4
10K/4 10K/4 X_10K/4 R299 R311 R315 R323 R442
10K/4 10K/4 X_2.2K/4 2.2K/4 X_10K/4

C C
PCI_CLK2 PCI_CLK3 PCI_CLK5 LPC_CLK0 LPC_CLK1 AZ_RST# IMC_GPIO17 IMC_GPIO16 R325 and R323 have been
PULL ROM TYPE: changed from 10K ohm to
HIGH WATCHDOG TIMER USE RESERVED ENABLE PCI CLKGEN RESERVED 2.2K ohm 2007/08/01(AMD
ON NB_PWRGD DEBUG MEM BOOT ENABLED H, H = Reserved demo schematic update)
ENABLED STRAPS
H, L = SPI ROM DEFAULT

WATCHDOG TIMER IGNORE DISABLE PCI CLKGEN L, H = LPC ROM


PULL ON NB_PWRGD DEBUG MEM BOOT DISABLED
LOW DISABLED STRAPS L, L = FWH ROM
DEFAULT DEFAULT DEFAULT DEFAULT

B DEBUG STRAPS SB700 HAS 15K INTERNAL PU FOR PCI_AD[30:23] B

PCI_AD28 PCI_AD27 PCI_AD26 PCI_AD25 PCI_AD24 PCI_AD23

USE USE PCI USE ACPI USE IDE USE DEFAULT RESERVED
PULL LONG PLL BCLK PLL PCIE STRAPS
HIGH RESET
DEFAULT DEFAULT DEFAULT DEFAULT DEFAULT

PULL USE BYPASS BYPASS BYPASS IDE USE EEPROM


LOW SHORT PCI PLL ACPI PLL PCIE STRAPS
RESET BCLK

A A

MICRO-STAR INt'L CO., LTD.


Title
SB700-STRAPS
Size Document Number Rev
1.0
MS-7500
Date: Wednesday, December 26, 2007 Sheet 23 of 48
5 4 3 2 1
5 4 3 2 1

3VDUAL VAUX_25 3VDUAL

C845 Giga-Lan
X_0.1uf/16V/Y5V/4
VAUX_25 330/6 330/6 330/6 N58-22F0181-S42
R759 R760 R761
VAUX_12 N58-22F0361-U30
U10 J9B

15
19
56
61

17
68
6
VAUX_25 L38 Link Yellow
L37 LAN_ACTLED 19 AMBER+ Active Blinking

VDDP
VDDP
VDDIO
VDDIO
VDDIO
VDDIO
VDDIO
5 VDDC BIASVDD 36 BIASVDD BIASVDD 600L500mA-300_0805 LINK#_ACTIVITY 20 AMBER- 19
13 13 POWER
VAUX_12 C889 VDDC 600L500mA-300_0805 MDI_C0+ TD1+
20 VDDC 18
28L900m_100_0805 C849 0.1uf/10V/X7R/4 34 C846 C847 MDI_C0- 12 TD1-
L39 AVDDL0.1uf/10V/X7R/4 VDDC 0.1uf/10V/X7R/4 0.1uf/25V/Y5V/4 MDI_C1+ TD2+ 20 Yellow
D
55 VDDC 17 D
60 MDI_C1- 11 TD2-
C848 VDDC MDI_C2+ TD3+
XTALVDD 23 16
L40 Change to BEAD MDI_C2- 10 TD3-
4.7uf/10V/X5R/8 C897 XTALVDD MDI_C3+ 15 TD4+
C888 0.1uf/10V/X7R/4 MDI_C3- 9 TD4-
28L900m_100_0805 0.1uf/10V/X7R/4
U10 600L500mA-300_0805 14 GND 1000 Orange
C850 Change to BEAD 21 GREEN+ 100 Green
L45 GPHY_PLLVDD
AVDD 38 0.1uf/10V/X7R/4 22 GREEN- 10 None
39 R765 C886

4.7uf/10V/X5R/8
C851
C852
44
46
AVDDL
AVDDL
AVDDL
BCM5754 AVDD_LAN
L42
0/4 X_0.1uf/25V/Y5V/4 RJ45(GIGA)+USB*2
21
0.1uf/10V/X7R/4 51 AVDDL 10mm x 10mm AVDD 45
C853 C854
LED DEFINE ??
X_0.1uf/16V/Y5V/4 22 Green Orange
68-PIN QFN C856 600L500mA-300_0805
L46 PCIE_PLLVDD 35 52 C855 0.1uf/10V/X7R/4 C887 X_0.1uf/16V/Y5V/4
28L900m_100_0805 GPHY_PLLVDD AVDD 0.1uf/10V/X7R/4 0.1uf/10V/X7R/4 R766 0/4
SPEED_100# R767 X_0/4 N58-22F0521-E06
C857 R768 X_0/4
C858 49 MDI_C3- SPEED_1000# R769 0/4
4.7uf/10V/X5R/8 TRD3- MDI_C3+
0.1uf/10V/X7R/4 TRD3+ 50
30 PCIE_PLLVDD
48 MDI_C2- SERIAL_DI 6
TRD2- MDI_C2+ SERIAL_DO 5
TRD2+ 47
L47 PCIE_VDD 4
28L900m_100_0805 42 MDI_C1- 3 LAN_UART_DB
C859 TRD1- MDI_C1+ X_HEADER 1X6_NP2
TRD1+ 43
C860 27 3VDUAL 1
4.7uf/10V/X5R/8 PCIE_VDD MDI_C0-
0.1uf/10V/X7R/4 33 PCIE_VDD TRD0- 41
40 MDI_C0+
TRD0+
24 VSS
LINKLED# 2
1 SPEED_100#
Close To NIC IC SPD100LED# SPEED_1000# 3VDUAL
X7R SPD1000LED# 67
LINK#_ACTIVITY
TRAFFICLED# 66

0.1uf/10V/X7R/4 C861 TXDP_C 26 8


14 PE3_RX PCIE_TXDP GPIO2
C 0.1uf/10V/X7R/4 C862 TXDN_C 25 C863 C
14 PE3_RX# PCIE_TXDN
0.1uf/10V/X7R/4 C912 RXDP_C 31 X_0.1uf/16V/Y5V/4 R770 R771 3VDUAL
14 PE3_TX 0.1uf/10V/X7R/4 C911 RXDN_C PCIE_RXDP X_4.7K/4 X_4.7K/4
14 PE3_TX# 32 PCIE_RXDN
WOL 12 9 X_0R/6 R672
PE_RST# WAKE# UART_MODE SERIAL_DI
25,32 PE_RST# 10 PERST# GPIO1_SERIAL_DI 7
18 KG_GBE_CLKP 29 4 SERIAL_DO
REFCLK+ GPIO0_SERIAL_DO
18 KG_GBE_CLKN 28 REFCLK-
C864
U46 0.1uf/25V/Y5V/4
65 SCLK SO 1 8 SI
SCLK/EECLK SI SCLK SI SO
SI 63 2 SCK GND 7
PME# R772 X_0/4 WOL 64 SO 3 6 MDI_C0+ C898 X_5pF/50V/NPO/4
21,26,32 PME# SO/EEDATA RESET VCC
PE_WAKE# R773 0/4 62 CS# CS# 4 5 MDI_C0- C899 X_5pF/50V/NPO/4
25,32 PE_WAKE# CS# CS WP MDI_C1+ C900 X_5pF/50V/NPO/4
AT45DB011B-SU-LF MDI_C1- C901 X_5pF/50V/NPO/4
3VDUAL R774 1K/4 54 R776 R777 R778 MDI_C2+ C902 X_5pF/50V/NPO/4
INTERNAL PULL DOWN R775 1K/4 VAUXPRSNT 4.7K/4 4.7K/4 4.7K/4 MDI_C2- C903 X_5pF/50V/NPO/4
VCC3 53 VMAINPRSNT
R791 X_4.7K/4 LAN_DISABLE 3 59 MDI_C3+ C904 X_5pF/50V/NPO/4
LOW_PWR NC MDI_C3- C905 X_5pF/50V/NPO/4
21,25,26,32 SMBCLK1 AUTOSENSE MODE STARPPING IS USED
SMBCLK1 58
21,25,26,32 SMBDATA1 SMB_CLK
SMBDATA1 57
27pf/50V/NPO/6 XTALO_R 200/6 R779 SMB_DATA
C865 XTALO
CLOSE CONNECTOR FOR EMI
22 XTALO
Y3 XTALI 21 MMJT9435 Id=3A
XTALI 3VDUAL
25MHZ/18pf/HC49S RDAC 37 18 CTL25 BCP69 Id=1A
C866 RDAC REGCTL25
27pf/50V/NPO/6 R780
1.24K/6/1
NPO Q90 C868

3
MMJT9435 C867
MMJT9435 Id=3A 1 0.1uf/10V/X7R/4 4.7uf/10V/X5R/8
3VDUAL
14 CTL12 BCP69 Id=1A VAUX_25 N58-22F0181-S42

2
4
REGCTL12
GROUNG SLUG

VAUX_25
R668 1.5R/2512/1W

1
B B
Q91 C870

+
MMJT9435 3 C869 C871 C873 EC79
11 16 1 0.1uf/10V/X7R/4 4.7uf/10V/X5R/8 0.1uf/10V/X7R/4 X_0.1uf/10V/X7R/4 100uf/16V/6.3X5/2.5mm

2
NC VSS
B06-057540C-B11
2
4
69

VAUX_12 C872
10uf/6.3V/X5R/1206
C875
C874
0.1uf/10V/X7R/4 10uf/6.3V/X5R/1206
VAUX_12
C882 3VDUAL
0.1uf/10V/X7R/4 VAUX_25

C890
C876 0.1uf/25V/Y5V/4 C894
4.7uf/10V/X5R/8
C892 4.7uf/10V/X5R/8 C895 C896
X_4.7uf/10V/X5R/8 0.1uf/10V/X7R/4 0.1uf/10V/X7R/4

C878 C880 C884


0.1uf/10V/X7R/4 0.1uf/10V/X7R/4 0.1uf/10V/X7R/4 C891 C893
C881 C885 0.1uf/25V/Y5V/4 0.1uf/25V/Y5V/4
C877 C879 0.1uf/10V/X7R/4 C883 0.1uf/10V/X7R/4
0.1uf/10V/X7R/4 0.1uf/10V/X7R/4 0.1uf/10V/X7R/4
DBG1

2 1 TXDP_C
3VDUAL RXDP_C 4 3 TXDN_C
5V_DUAL RXDN_C 6 5
8 7
Support LAN wake up, even system crash R788
PCI-E mid bus probing 10 9
12 11
R785 X_1K/4 14 13
5V_DUAL X_4.7K/4 16 15
3VDUAL 18 17
A R786 X_0/4 20 19 A
22 21
R787 KG_GBE_CLKP 24 23
1

X_4.7K/4 R790 26 25
X_1K/4 REF_CLK 28 27
21 LAN_CTL 2 X_HEADER 1X3 30 29
PWSW+ 38 32 31
MCP68 CONTROL Q93 Q94 34 33
X_N-2N7002_SOT23 X_N-2N7002_SOT23 Q95 KG_GBE_CLKN 36 35
3

X_N-2N7002_SOT23 38
40
37
39
MICRO-STAR INt'L CO., LTD.
21,28,32,35 SLP_S5# 42 41
R789 X_4.7K/4 1 PME# 44 43 Title
3 46 45 GIGABIT ETHERNET
2 PE_WAKE_CHIP# PE_WAKE_CHIP# 21,32 48 47
D51 Size Document Number Rev
1.0
X_S-BAT54A_SOT23
SOT23 X_PCI-e mid bus probe
MS-7500
Date: Wednesday, December 26, 2007 Sheet 24 of 48
5 4 3 2 1
5 4 3 2 1

VCC3
3VDUAL
Add R452,R449 and VCC3
J41 R451 for modify
+12V PE_RST# signal

2
4
6
8
Support ASF for HP +12V VCC3
R781 B1 A1 RN59 quality 2007/08/06
4.7K/4 recommand 12V PRSNT1# 3VDUAL
B2 A2 X_4.7K_8P4R/4
2007/08/16 12V 12V

2
4
6
8
B3 A3 +12V J31

1
3
5
7
RSVD 12V
PE_WAKE# B4 GND GND A4 Support ASF for HP +12V RN58
21,24,26,32 SMBCLK1 B5 SMCLK JTAG_TCK A5 recommand B1 12V PRSNT1# A1 X_4.7K_8P4R/4
21,24,26,32 SMBDATA1 B6 A6 B2 A2

1
3
5
7
C557 VCC3 B7
SMDAT JTAG_TDI
A7 2007/08/16 B3
12V 12V
A3
D
0.1uf/25V/Y5V/6 3VDUAL GND JTAG_TDO VCC3 12V 12V D
B8 3.3V JTAG_TMS A8 B4 GND GND A4
B9 JTAG_TRST 3.3V A9 21,24,26,32 SMBCLK1 B5 SMCLK JTAG_TCK A5
B10 3.3VAUX 3.3V A10 21,24,26,32 SMBDATA1 B6 SMDAT JTAG_TDI A6
PE_WAKE# B11 A11 R452 0/4 PE_RST# B7 A7 VCC3
24,32 PE_WAKE# WAKE# PWRGD PE_RST# 24,32 GND JTAG_TDO
B8 3.3V JTAG_TMS A8
R284 X_4.7K/4 5/5/20 B9 JTAG_TRST 3.3V A9
X7R B12 RSVD GND A12 B10 3.3VAUX 3.3V A10
R449 0/4 PE_RST#
B13 GND REFCLK+ A13 KG_GFX_CLKP 18 24,32 PE_WAKE# B11 WAKE# PWRGD A11 PE_RST# 24,32
C324 0.1uf/10V/X7R/4 PE0_TX15C B14 A14
14 PE0_TX15 HSOP0 REFCLK- KG_GFX_CLKN 18
C341 0.1uf/10V/X7R/4 PE0_TX15C# B15 A15 X7R
14 PE0_TX15# HSON0 GND
B16 GND HSIP0 A16 PE0_RX15 14 B12 RSVD GND A12
TMDS_HPD1 B17 A17 B13 A13
PRSNT2# HSIN0 PE0_RX15# 14 GND REFCLK+ KG_GPP_CLK0P 18
5.5/4.5/20 B18 GND GND A18 14 PE1_TX
C285 0.1uf/10V/X7R/4 PE1_TXC B14 HSOP0 REFCLK- A14 KG_GPP_CLK0N 18
5.5/4.5/20 14 PE1_TX#
C292 0.1uf/10V/X7R/4 PE1_TXC# B15 HSON0 GND A15
B16 GND HSIP0 A16 PE1_RX 14 5/5/20
14 PE0_TX14
C321 0.1uf/10V/X7R/4 PE0_TX14C B19 HSOP1 RSVD A19 5.5/4.5/20 B17 PRSNT2# HSIN0 A17 PE1_RX# 14
C340 0.1uf/10V/X7R/4 PE0_TX14C# B20 A20 B18 A18
14 PE0_TX14# HSON1 GND GND GND
B21 GND HSIP1 A21 PE0_RX14 14 Series 0402 0.1uf cap on each TX line 5.5/4.5/20
B22 GND HSIN1 A22 PE0_RX14# 14 within 500 mil of connector
C322 0.1uf/10V/X7R/4 PE0_TX13C B23 A23 PCIEX1/White
14 PE0_TX13 HSOP2 GND
C339 0.1uf/10V/X7R/4 PE0_TX13C# B24 A24
14 PE0_TX13# HSON2 GND
B25 A25
B26
GND HSIP2
A26
PE0_RX13 14 R243 N11-0360051-A10
C327 0.1uf/10V/X7R/4 PE0_TX12C GND HSIN2 PE0_RX13# 14
14 PE0_TX12 B27 HSOP3 GND A27 X_4.7K/4
C345 0.1uf/10V/X7R/4 PE0_TX12C# B28 A28
14 PE0_TX12# HSON3 GND
B29 GND HSIP3 A29 PE0_RX12 14
B30 RSVD HSIN3 A30 PE0_RX12# 14
TMDS_HPD1 B31 A31
PRSNT2# GND
B32 GND RSVD A32
C VCC3 C

C326 0.1uf/10V/X7R/4 PE0_TX11C B33 A33 3VDUAL VCC3


14 PE0_TX11 HSOP4 RSVD
C344 0.1uf/10V/X7R/4 PE0_TX11C# B34 A34 +12V J32
14 PE0_TX11# HSON4 GND

2
4
6
8
B35 GND HSIP4 A35 PE0_RX11 14 Support ASF for HP +12V
B36 GND HSIN4 A36 PE0_RX11# 14 recommand B1 12V PRSNT1# A1
C328 0.1uf/10V/X7R/4 PE0_TX10C B37 A37 B2 A2
14 PE0_TX10 HSOP5 GND 2007/08/16 12V 12V
C346 0.1uf/10V/X7R/4 PE0_TX10C# B38 A38 B3 A3
14 PE0_TX10#

1
3
5
7
HSON5 GND 12V 12V RN60
B39 GND HSIP5 A39 PE0_RX10 14 B4 GND GND A4
B40 A40 B5 A5 X_4.7K_8P4R/4
GND HSIN5 PE0_RX10# 14 21,24,26,32 SMBCLK1 SMCLK JTAG_TCK
C330 0.1uf/10V/X7R/4 PE0_TX9C B41 A41 B6 A6
14 PE0_TX9 HSOP6 GND 21,24,26,32 SMBDATA1 SMDAT JTAG_TDI
C343 0.1uf/10V/X7R/4 PE0_TX9C# B42 A42 B7 A7
14 PE0_TX9# HSON6 GND GND JTAG_TDO VCC3
B43 GND HSIP6 A43 PE0_RX9 14 B8 3.3V JTAG_TMS A8
B44 GND HSIN6 A44 PE0_RX9# 14 B9 JTAG_TRST 3.3V A9
C329 0.1uf/10V/X7R/4 PE0_TX8C B45 A45 B10 A10
14 PE0_TX8 HSOP7 GND 3.3VAUX 3.3V
C342 0.1uf/10V/X7R/4 PE0_TX8C# B46 A46 24,32 PE_WAKE# B11 A11 R451 0/4 PE_RST#
14 PE0_TX8# HSON7 GND WAKE# PWRGD PE_RST# 24,32
B47 GND HSIP7 A47 PE0_RX8 14
TMDS_HPD1 B48 A48
PRSNT2# HSIN7 PE0_RX8# 14
B49 GND GND A49 X7R B12 RSVD GND A12
B13 GND REFCLK+ A13 KG_GPP_CLK1P 18
C286 0.1uf/10V/X7R/4 PE2_TXC B14 A14
14 PE2_TX HSOP0 REFCLK- KG_GPP_CLK1N 18
C325 0.1uf/10V/X7R/4 PE0_TX7C B50 A50 C293 0.1uf/10V/X7R/4 PE2_TXC# B15 A15
14 PE0_TX7 HSOP8 RSVD 14 PE2_TX# HSON0 GND
14 PE0_TX7#
C338 0.1uf/10V/X7R/4 PE0_TX7C# B51 HSON8 GND A51 B16 GND HSIP0 A16 PE2_RX 14 5/5/20
B52 GND HSIP8 A52 PE0_RX7 14 5.5/4.5/20 B17 PRSNT2# HSIN0 A17 PE2_RX# 14
B53 GND HSIN8 A53 PE0_RX7# 14 B18 GND GND A18
14 PE0_TX6
C311 0.1uf/10V/X7R/4 PE0_TX6C B54 HSOP9 GND A54 Series 0402 0.1uf cap on each TX line 5.5/4.5/20
C310 0.1uf/10V/X7R/4 PE0_TX6C# B55 A55
14 PE0_TX6#
B56
HSON9 GND
A56
within 500 mil of connector PCIEX1/White
GND HSIP9 PE0_RX6 14
B57 GND HSIN9 A57 PE0_RX6# 14
C313 0.1uf/10V/X7R/4 PE0_TX5C B58 A58
B 14 PE0_TX5
C312 0.1uf/10V/X7R/4 PE0_TX5C# B59
HSOP10 GND
A59 R244 N11-0360051-A10 B
14 PE0_TX5# HSON10 GND
B60 GND HSIP10 A60 PE0_RX5 14 X_4.7K/4
B61 GND HSIN10 A61 PE0_RX5# 14
C320 0.1uf/10V/X7R/4 PE0_TX4C B62 A62
14 PE0_TX4 HSOP11 GND
C319 0.1uf/10V/X7R/4 PE0_TX4C# B63 A63
14 PE0_TX4# HSON11 GND
B64 GND HSIP11 A64 PE0_RX4 14
B65 GND HSIN11 A65 PE0_RX4# 14
C318 0.1uf/10V/X7R/4 PE0_TX3C B66 A66 +12V +12V
14 PE0_TX3 HSOP12 GND
C317 0.1uf/10V/X7R/4 PE0_TX3C# B67 A67
14 PE0_TX3# HSON12 GND
B68 GND HSIP12 A68 PE0_RX3 14
B69 GND HSIN12 A69 PE0_RX3# 14

1
C336 0.1uf/10V/X7R/4 PE0_TX2C

+
14 PE0_TX2 B70 HSOP13 GND A70
C335 0.1uf/10V/X7R/4 PE0_TX2C# B71 A71 EC32 EC62
14 PE0_TX2# HSON13 GND
B72 A72 470uf/16V/8X11.5/3.5mm 470uf/16V/8X11.5/3.5mm

2
GND HSIP13 PE0_RX2 14
B73 GND HSIN13 A73 PE0_RX2# 14
C334 0.1uf/10V/X7R/4 PE0_TX1C B74 A74
14 PE0_TX1 HSOP14 GND
C333 0.1uf/10V/X7R/4 PE0_TX1C# B75 A75
14 PE0_TX1# HSON14 GND
B76 GND HSIP14 A76 PE0_RX1 14
B77 GND HSIN14 A77 PE0_RX1# 14
C332 0.1uf/10V/X7R/4 PE0_TX0C B78 A78
14 PE0_TX0 HSOP15 GND
C331 0.1uf/10V/X7R/4 PE0_TX0C# B79 A79 +12V +12V 3VDUAL
14 PE0_TX0# HSON15 GND
B80 GND HSIP15 A80 PE0_RX0 14
15 TMDS_HPD1 TMDS_HPD1 B81 A81
PRSNT2# HSIN15 PE0_RX0# 14
B82 RSVD GND A82

+
Series 0402 0.1uf cap on each TX line C785 C786 EC28
1uf/25V/X7R/8 10uf/16V/Y5V/1206
within 500 mil of connector PCIEX16/BLACK 470uf/10V/6.3X11/2.5mm

A
N11-1640241-L06 A

MICRO-STAR INt'L CO., LTD.


Title
T:2 , H:4.5 ,W:5.5 ,S:4.5,Er:4.2 ,Zo=91.8 Ohm PCIE x 16 , x1 Slots.
Size Document Number Rev
20 / 5.5 / 4.5 / 5.5 / 20 1.0
MS-7500
Date: Wednesday, December 26, 2007 Sheet 25 of 48
5 4 3 2 1
5 4 3 2 1

BOOT BLOCK WRITE JUMPER


VCC3 PCI SLOT 1 (PCI VER: 2.3 COMPLY) AD[31..0]
19 AD[31..0]
JP14 N33-1020301-H06 -12V C_BE#[3..0]
19 C_BE#[3..0]

1
E14 -12V +12V
BLACK J20
D1x2-BK

6.0
D JUMPER-1X2A_BLACK-RH C572 B1 A1 3VDUAL D
-12V TRST#
100uf/16V/6.3X5/2.5mm B2 A2

+
2 10K/4 TCK +12V
B3 GND TMS A3
R146 B4 A4
ROM_TBL# 20 TDO TDI
VCC5 B5 +5V +5V A5
B6 A6 R667
+5V INTA# PCI_INTE# 19
R359 B7 A7 X_2.7K/4
19 PCI_INTF# INTB# INTC# PCI_INTG# 19
1K/4 19 PCI_INTH# B8 INTD# +5V A8 VCC5
B9 A9 PME#
PRSNT#1 RESERVED VCC3
B10 RESERVED#B10 +5V(I/O) A10
B11 PRSNT#2 RESERVED#A11 A11
B12 A12 3VDUAL C558
GND GND X_0.1uf/25V/Y5V/6
B13 GND GND A13
VCC3 B14 A14
RESERVED#B14 3.3VAUX
B15 GND RST# A15 PCIRST# 19
19,23 PCICLK2_SLOT1 B16 CLK +5V(I/O) A16
B17 GND#B17 GNT# A17 PCI_GNT0# 19
19 PCI_REQ0# B18 REQ# GND A18
B19 A19 PME#
+5V(I/O) PME# PME# 21,24,32
AD31 B20 A20 AD30
AD31 AD30
BOOT BLOCK RECOVERY HEADER AD29 B21 AD29 +3.3V A21
AD28
VCC3 AD27
B22
B23
GND AD28 A22
A23 AD26 PCI SLOT DECOUPLING CAPACITORS
AD25 AD27 AD26
B24 AD25 GND A24
B25 A25 AD24
C_BE#3 +3.3V AD24 ID1 R482 33/4 AD20
B26 C/BE#3 IDSEL A26
R316 AD23 B27 A27 VCC5 VCC3 3VDUAL
AD23 +3.3 AD22
8.2K/4 B28 GND AD22 A28
C AD21 B29 A29 AD20 C370 C386 C399 C
AD19 AD21 AD20 0.1uf/25V/Y5V/4 0.1uf/25V/Y5V/4 0.1uf/25V/Y5V/4
B30 AD19 GND A30
BBR# B31 A31 AD18 C402 C401 C369
BBR# 20 +3.3V AD18
AD17 B32 A32 AD16 0.1uf/25V/Y5V/4 0.1uf/25V/Y5V/4 0.1uf/25V/Y5V/4
C_BE#2 AD17 AD16 C385 C403
B33 C/BE#2 +3.3V A33
1

E15 B34 A34 FRAME# 0.1uf/25V/Y5V/4 0.1uf/25V/Y5V/4


GND FRAME# FRAME# 19
IRDY# B35 A35
19 IRDY# IRDY# GND
D1x2-BK B36 A36 TRDY#
+3.3V TRDY# TRDY# 19
DEVSEL# B37 A37
19 DEVSEL# DEVSEL# GND STOP#
B38 A38 STOP# 19 PCI PULL-UP / DOWN RESISTORS
2

PCI_LOCK# GND STOP#


19 PCI_LOCK# B39 LOCK# +3.3V A39
PERR# B40 A40 SDONE R309 0/4
19 PERR# PERR# SMBCLK SMBCLK1 21,24,25,32
B41 A41 SBO# R310 0/4
+3.3V SMBDAT SMBDATA1 21,24,25,32
SERR# B42 A42 RN47
19 SERR# SERR# GND
B43 A43 PAR X_8.2K_8P4R/4
+3.3V PAR PAR 19
C_BE#1 B44 A44 AD15 DEVSEL# 8 7
C/BE#1 AD15 VCC3
AD14 B45 AD14 +3.3V A45 Support ASF for HP TRDY# 6 5
B46 A46 AD13 IRDY# 4 3
AD12 GND AD13 AD11 recommand FRAME#
B47 A47 2 1
AD10 B48
AD12 AD11
A48 2007/08/16
AD10 GND AD9 RN43
B49 GND AD9 A49
X_8.2K_8P4R/4
X1 X2 STOP# 2 1
AD8 X1 X2 C_BE#0 PCI_LOCK#
B52 AD8 C/BE#0 A52 4 3
AD7 B53 A53 PERR# 6 5
AD7 +3.3V AD6 SERR#
B54 +3.3V AD6 A54 8 7
AD5 B55 A55 AD4
AD3 AD5 AD4
B56 AD3 GND A56
B57 A57 AD2
B GND AD2 B
AD1 B58 A58 AD0 ACK64# R326 8.2K/4
AD1 AD0
B59 +5V(I/O) +5V(I/O) A59
ACK64# B60 A60 REQ64#A REQ64#A R303 8.2K/4
ACK64# REQ64#
B61 +5V +5V A61
B62 +5V +5V A62

SLOT-PCI_WHITE-30U-IN-RH
N11-1200231-F02
SB700
PCI SLOT1 VCC3 VCC5
PASSWORD JUMPER +12V

VCC3 IDSEL = AD20


PCI_REQ0#

1
+

+
EC36 EC37 C422
R403 PCI_GNT0# 1000uf/6.3V/8X11.5/3.5mm/30mOHM

2
0.1uf/25V/Y5V/6
330/4
PCI_INTE#
JP49
N33-1020441-H06
1

E49 GREEN
1000uf/6.3V/8X11.5/3.5mm/30mOHM
YJUMPER-MG
D1x2-BK
PCIRST#
PCICLK2_SLOT1
2

PSWRD_EN
A PSWRD_EN 20 A

R301
8.2K/4
MICRO-STAR INt'L CO., LTD.
Title
PCI Slot1
Size Document Number Rev
1.0
MS-7500
Date: Wednesday, December 26, 2007 Sheet 26 of 48
5 4 3 2 1
5 4 3 2 1

VGA CONN BLOCK VCC3 D44


BAV99_SOT23
2 1 Add L6,L21 and L22 for EMI solution 2007/08/20

D47 D48 close VGA connector

3
VCC5 VCC5 VGA_R 39nH/600mA/0.25/6
BAV99_SOT23 BAV99_SOT23 15 R R L6 L4 39nH/600mA/0.25/6
2 1 2 1
VCC3 D45
R95

3
DDC_SCL DDC_SDA BAV99_SOT23 150/4/1 C149 C148
2 1 7.5 / 15 / 15 5.6pF/50V/NPO/4 1.5pF/50V/NPO/4

D49 D50

3
VCC5 VCC5 VGA_G 39nH/600mA/0.25/6
BAV99_SOT23 BAV99_SOT23 15 G G L21 L3 39nH/600mA/0.25/6
D D
2 1 2 1
D46
VCC3 7.5 / 15 / 15 R94

3
HSYNC_A VSYNC_A BAV99_SOT23 150/4/1 C144 C143
2 1 5.6pF/50V/NPO/4 1.5pF/50V/NPO/4

3
VGA_B 39nH/600mA/0.25/6
15 B B L22 L2 39nH/600mA/0.25/6

VCC5 L34
R86 C112 27nh/600mA/L6 R92
10K/4 0.1uf/25V/Y5V/4 5V_VSYNC R686 22/4 VSYNC_A
150/4/1 C139 C175

5
5V_HSYNC R687 22/4 HSYNC_A 5.6pF/50V/NPO/4 1.5pF/50V/NPO/4
1 L35
4 5V_HSYNC 27nh/600mA/L6
HSYNC# 2 VCC5
15 HSYNC#
U11
NC7WZ08 7.5 / 15 / 15

3
FS1
D5 1.1A/mSMD110F/0.21OHM
1N5817
VCC5 FB12 1 2 301S/0805 VGAPWR_FB
C138
0.1uf/25V/Y5V/4 C104
0.1uf/25V/Y5V/4

17
U40_1 1
4 5V_VSYNC
15 VSYNC# VSYNC# 2 DDC_SCL 15 5
U49 10
NC7WZ08 VSYNC_A 14 4

3
VCC3 9
HSYNC_A 13 3 VGA_B
8
DDC_SDA 12 2 VGA_G
C 7 C
11 1 VGA_R
R91 C134 6
R300 2.2K/4 R89 C122
4.7K/4 2.2K/4 C135 C114 47pf/50V/NPO/4

16
X_470pf/50V/X7R/4 C792 C793

G
Q19 N-2N7002_SOT23 J69
0/4 DSUB-VGAF_BLUE-RH 0/4
DDC_DATA R688 33/4 DDC_SDA
15 DDC_DATA S D
N51-15F0521-F02
X_470pf/50V/X7R/4
R617 X_0/4 47pf/50V/NPO/4

VCC3

R180
4.7K/4

G
Q20 N-2N7002_SOT23

15 DDC_CLK DDC_CLK S D R689 33/4 DDC_SCL

R618 X_0/4

B B

FRONT PANEL USB CONNECTOR FOR USB PORT 10


POWER CIRCUIT FOR USB PORT 10
Temperature Sensing
5V_DUAL_USB

22uf/6.3V/X5R/1206
R592 has been populated and
R615 has been un-populated
5V_DUAL_USB
for HP recommand 2007/08/09 3VDUAL
Trace lengths must be less 5 inches
C397
L15 C442 C490
R615 has been deleted for 0.1uf/25V/Y5V/4 22uf/6.3V/X5R/1206 D39
HP recommand 2007/10/22 21 USBN10
USBN10 5 1 SBD10- P25 IP4220/SOT457

5
R592 USBP10 6 2 SBD10+
21 USBP10
0/4 7 3 SBD10+ 6 4
SBD10- 1 2
8 4 3 4
SBD10+ SBD10- 1 3
X_Common Chock 5 6
C765 C24 C404 7 8 DASH_DET DASH_DET 21

2
U24 10
6

100p/50V/NPO/4 0.1uf/10V/X7R/4 10uf/10V/Y5V/8 Match pairs to 50 mil.


1 THERMDA_CPU RN55 CON2X5-1_Black
VDD

DP1 THERMDA_CPU 6 0R_8P4R/6


C673 USBN10 1 2 SBD10-

A
SMSC 100p/50V/NPO/4 USBP10 3
5
4 SBD10+
6
N32-2051671-H06 A
2 THERMDC_CPU 7 8
SMB_CLK_SENSE DN1 THERMDC_CPU 6
6,32 SMB_CLK_SENSE 8 SMCLK
SMB_DATA_SENSE
6,32 SMB_DATA_SENSE 7 SMDATA
3 A_D+ R622 0/4 THERMDA_NB
NEAR USB CONNECTOR
DP2 THERMDA_NB 15
C

C676 C677
100p/50V/NPO/4 X_100p/50V/NPO/4 B Q69
X_N-2N3904_SOT23
GND

4 A_D- R623 0/4 THERMDC_NB


THERMDC_NB 15 MICRO-STAR INt'L CO., LTD.
E

DN2
COLSE CHIPSET
EMC1043 Add NB therm-circuit For HP
5

MSOP8_T Title
CPU & NB temperature sensor recommand 2007/08/06
VGA CONNECTOR
D0F-0104302-S32 Size Document Number Rev
1.0
MS-7500
Date: Wednesday, December 26, 2007 Sheet 27 of 48
5 4 3 2 1
5 4 3 2 1

15 / 5 / 7 / 5 / 15 T:2 , H:4.5 ,W:5 ,S:7,Er:4.2 ,Zo=104.8 Ohm


DVI_TXD00P R579 18.2/6/1 DVI_TXD00+ DVI_TXD02P R578 18.2/6/1 DVI_TXD02+
15 DVI_TXD00P 15 DVI_TXD02P
VCC5 FS6 D35 L19 DVI CONNECTOR

4
1N5817 100Ohm/4000mA/F8
HDMI5V
L23 L29

1
X_CMC_90ohm X_CMC_90ohm 1.1A/mSMD110F/0.21OHM

+
<Priority> <Priority> EC35 C500
0.1uf/25V/Y5V/4

2
15 DVI_TXD00N DVI_TXD00N DVI_TXD00- 15 DVI_TXD02N DVI_TXD02N DVI_TXD02- 10uf/16V/4X5/1.5mm

MEC1
R581 18.2/6/1 R580 18.2/6/1
VCC3

25
D R372 and R374 changed to 15K D
DVI_TXD01P R582 18.2/6/1 DVI_TXD01+ DVI_TXC0P R583 18.2/6/1 DVI_TXC+ ohm for AMD SCL Checklist
15 DVI_TXD01P 15 DVI_TXC0P

G
2007/10/19 DVI_TXD02- 1 13

4
15 DVI_DDC_CLK S D R374 R372 DVI_TXD02+ 2 14
15K/4 15K/4 3 15
L24 L44 4 16 HDMI_HOT_DET
X_CMC_90ohm X_CMC_90ohm Q58 DVI_TXD00-
15 DVI_DDC_DATA 5 17
<Priority> <Priority> N-2N7002_SOT23 FB32 220-2000mA DVI_DDC_CLK_R 6 18 DVI_TXD00+
FB33 220-2000mA DVI_DDC_DATA_R 7 19
2

3
DVI_TXD01N DVI_TXD01- DVI_TXC0N DVI_TXC- VCC3 8 20
15 DVI_TXD01N 15 DVI_TXC0N
R584 18.2/6/1 DVI_TXD01- 9 21
R585 18.2/6/1 C575 C574 DVI_TXD01+ 10 22

G
10pf/50V/NPO/4 11 23 DVI_TXC+
S D 10pf/50V/NPO/4 12 24 DVI_TXC-

Q59
C1 C3
N-2N7002_SOT23 C5 C6
C2 C4
R448 20K/4
HDMI_HOT_DET
15 TMDS_HPD0

26
MEC2
L18
180Ohm/1500mA/F6 J70

1
R450 DVI30P_WHITE-RH-2
D28 D36
100K/4
C538 N5B-24F0211-F02

2
470pf/50V/X7R/4
C C

Z-BZV55-B2V7_SOD80C-RH
X_Z-BZT52C2V7-7-F_SOD123-RH

CP35
C628 0.1uf/25V/Y5V/4

MEMORY VOLTAGE BLEED-OFF CIRCUIT


VCC5_SB 3VDUAL

B B
R208 R209

VCC5_SB 510/6 330/6


VCC_DDR
32,34,38 PS_ON#
CR1_P CR2_P

1
R334 CR1 CR2

+
330/1206
R478 R479 GREEN GREEN
20K/6 20/1206 <optional> <optional>

2
D
BLEED-OFF CIRCUIT G Q49
N-2N7002_SOT23
C

S
R480 20K/6 B Q21
VCC3 21,24,32,35 SLP_S5#
VCC5 N-2N3904_SOT23
E

R467 R472
10/1206 10/1206

A PS_RID_3_3 A
D

G Q48 G
MICRO-STAR INt'L CO., LTD.
N-2N7002_SOT23 Q47
N-2N7002_SOT23 Title
S

DVI CONNECTOR / BLEED OFF


Size Document Number Rev
32 CLAMP_CTRL 1.0
MS-7500
Date: Wednesday, December 26, 2007 Sheet 28 of 48
5 4 3 2 1
5 4 3 2 1

PRD[0..7] PARALLAL PORT


32 PRD[0..7]

U54 P126
SPI ROM
RSTB# 3 26 STB# STB# 1 2 RAFD#
32 RSTB# PSTROBE STROBE PRND0 3 4 RERR# SPI_DI
20 SPI_DI
PRND1 5 6 RINIT#
20 SPI_DO
SPI_DO Modify SPI HOLD# circuit for
PRND2 7 8 RSLIN# SPI_CLK
PRD0 4 25 PRND0 PRND3 9 10
20 SPI_CLK SPI_CS# AMD recommand 2007/08/01
PRD1 PD0 PD_0 PRND1 PRND411 20 SPI_CS# SPI_HOLD#
5 PD1 PD_1 24 12 20 SPI_HOLD#
PRD2 6 23 PRND2 PRND513 14 Connect E16 pin1 and pin2
D PRD3 PD2 PD_2 PRND3 PRND615 PRT_DET# 3VDUAL D
7 PD3 PD_3 21 16 PRT_DET# 19,21
PRD4 9 19 PRND4 PRND717 18 JP50 3VDUAL
PRD5 PD4 PD_4 PRND5 RACK# 19 3VDUAL
11 PD5 PD_5 18 20
PRD6 13 17 PRND6 RBUSY21 22
PRD7 PD6 PD_6 PRND7 RPE 23 YJUMPER-MG
14 PD7 PD_7 16 24 MP
RSLCT 25 26 R444 X_0/4 R314 R411
R468 10K/4 10K/4
32 RAFD#
RAFD# 28 AUTOFD LPT 1K/4 U19
RERR# 27 E16
32 RERR# FAULT
RINIT# 1 SPI_CS# 1 2 SPI_CS#OUT SPI_CS#OUT 1 8
32 RINIT# INIT CS# IN CS# OUT CS VCC
RSLIN# 2 20 1N4148S_SOD123 D6 SPI_DI 2 7 R453 X_0/4 SPI_HOLD#
32 RSLIN# Select In VCC VCC5 DO HLOD
RACK# 15 SPI_DO 3 3VDUAL SPI_WP# 3 6 SPI_CLK
32 RACK# ACK SI WP CLK
RBUSY 12 4 5 SPI_DO
32 RBUSY BUSY GND DI

1
RPE 10 C439 SPI_DI 5 6 E17
32 RPE PError SO +3.3V AUX
RSLCT 8 22 0.01uf/25V/X7R/4 C618
32 RSLCT SELECT GND SPI_CLK 7 8 D1x2-BK SPI FLASH-8P_BLACK-RH X_10uf/10V/Y5V/8
CLK GND C668
PACSZ128402Q_TSSOP28 ROM RECOVERY 47pf/50V/NPO/4

2
Modify Parallal port circuit 2007/08/13 (Added U54) R405 N14-0080030-L06
10K/4

Added E17 2007/08/13

C C

FAN BOLCK Modify Fan-circuit for HP recommend 2007/08/06 PSU FAN


CPU FAN

2
VCC3
2

VCC3 D33
D31 3 BAT54C_SOT23
3 X_BAT54C_SOT23 VCC3
VCC3

1
PSU-FAN_TACH 32
1

B CPU-FAN_TACH 32 B
R85 R812 R527
R13 R524 8.2K/4/1 1.2K/4
8.2K/4/1 R811 1K/4
1.2K/4 1K/4 R525 150/6/1
R523 X_150/6/1 PSU-FANPWM_FAN

VCC3 CPU-FANPWM 32
+12V
PSU-FANPWM_FAN +12V 4
4 3
3 CPU FAN 2 P/S FAN
D

2 1

1
R540 EC45 P16

+
1
1

Q63 EC17 P70


+

1K/4
N-2N7002_SOT23 100uF/16V/5x11/2.0mm C754 C927 D40 FAN1*4/WHITE

2
G X_100uF/16V/5x11/2.0mm D41 X_FAN1*4/WHITE C930
2

32 PSU-FANPWM C755 C928 C929 47pf/50V/NPO/4


VCC5 X_47pf/50V/NPO/4
DS

X_1N4148S_SOD123 0.1uf/25V/Y5V/4
R398 Q62 N-2N7002_SOT23 X_0.1uf/25V/Y5V/4 100pF/16V/X7R/4 X_1N4148S_SOD123
SYSTEM ID1 N-2N7002_SOT23 X_100pF/16V/X7R/4
SYS FAN
S

4.7K/4 Q66 VCC3


2

G +12V G
MT 1 D34
3 BAT54C_SOT23
S

R400
D

SYS-FAN_TACH 32
SFF 0 10K/4
D

Q38 VCC3 R539 1K/4


1

N-2N7002_SOT23 R26 R813


D

21,38 CHASSIS_ID1 G 8.2K/4/1 1.2K/4 R526


D

A SYS-FANPWM 32 A
Q64 150/6/1
N-2N7002_SOT23 Q65
S

G 4
G +12V
3
SYSTEM FAN MICRO-STAR INt'L CO., LTD.
S

2
S

1
1

EC39 C926 C931 P8


+

N-2N7002_SOT23 100uF/16V/5x11/2.0mm D38 FAN1*4/RED Title


C753 X_1N4148S_SOD123 SPI ROM / FAN / LPT
2

Size Document Number Rev


P/N,RED COLOR 1.0
Modify FAN-PWM duty cycle inverter circuit for HP recommand 2007/08/13 0.1uf/25V/Y5V/4 47pf/50V/NPO/4 MS-7500
100pF/16V/X7R/4
Date: Wednesday, December 26, 2007 Sheet 29 of 48
5 4 3 2 1
5 4 3 2 1

POWER CIRCUIT FOR USB PORT 0,1,2,3 POWER CIRCUIT FOR USB PORT 4,5 POWER CIRCUIT FOR USB PORT 6,7 POWER CIRCUIT FOR USB PORT 8,9
120 mils 120 mils
120 mils 80 mils 100 mils 80 mils 5V_DUAL_USB 5V_DUAL_USB
5V_DUAL_USB SVCC1 5V_DUAL_USB SVCC2 SVCC3 SVCC4
FS5
2.0A FS7
2.0A FS8
2.0A
2.6A
FS3
2.6A_miniSMDM260
2A_miniSMDM200 2A_miniSMDM200
40 mils 2A_miniSMDM200
40 mils

+
C408 EC41

1
R128 R131 C393 R132 C391 470uf/10V/6.3X11/2.5mm

+
C195 220/4 0.1uf/25V/Y5V/4 220/4 220/4
0.1uf/25V/Y5V/4 0.1uf/25V/Y5V/4

2
D D
0.1uf/25V/Y5V/4
EC48 USB_OCP#0 21 EC44 USB_OCP#1 19,21 EC46 USB_OCP#2 19,21
1000uf/6.3V/8X11.5/3.5mm/30mOHM 470uf/10V/6.3X11/2.5mm 470uf/10V/6.3X11/2.5mm R136
R123 R130 FRONT USB CONNECTOR R133 220/4
330/4 330/4 330/4 19,21 USB_OCP#3

R138
330/4

REAR PANEL USB CONNECTOR FOR USB PORT 0,1,2,3


Trace lengths must be less 12 inches

L8
T:2 , H:4.5 ,W:7 ,S:7,Er:4.2 ,Zo=90.7 Ohm
SVCC1
21 USBP1
USBP1
USBN1
5
6
1
2
SBD1+
SBD1-
20 / 7 / 7 / 7 / 20 / 7 / 7 / 7 / 20
21 USBN1
USBP0 7 3 SBD0+
21 USBP0
USBN0 8 4 SBD0- D11
21 USBN0
IP4220/SOT457
FRONT PANEL USB CONNECTOR FOR USB PORT 6,7
5
X_Common Chock
SBD1+ 6 4 SBD0+ SVCC3
SVCC3
Match pairs to 50 mil. SVCC1
Trace lengths must be less 5 inches
RN33 SBD1- 1 3 SBD0-
0R_8P4R/6 J10B
USBP1 1 2 SBD1+ 13 L12 P150 D21
2

C USBN1 3 4 SBD1- SBD3- 14 IP4220/SOT457 C

5
USBP0 5 6 SBD0+ SBD3+ 15 17 21 USBN7 USBN7 5 1 SBD7- 1 2
USBN0 7 8 SBD0- 16 UP 21 USBP7 USBP7 6 2 SBD7+ SBD7- 3 4 SBD6- SBD6- 6 4 SBD7-
9 18 21 USBN6 USBN6 7 3 SBD6- SBD7+ 5 6 SBD6+
SBD2- USBP6 SBD6+ SBD6+ SBD7+
NEAR USB CONNECTOR SBD2+
10
11 19
21 USBP6 8 4 7 8
10
1 3

12 SECOND X_Common Chock

2
Match pairs to 50 mil. H2X5[9]M_BLACK-RH-1
USB*4P
RN45
J10A 0R_8P4R/6 N31-2051391-H06
5 USBN7 1 2 SBD7- COLOR BLACK
SBD0- 6 USBP7 3 4 SBD7+
SBD0+ 7 20 USBN6 5 6 SBD6-
8 THIRD USBP6 7 8 SBD6+
1 21
Trace lengths must be less 12 inches SBD1-
SBD1+
2
3 22
NEAR USB CONNECTOR
SVCC1
L5 4 DOWN
USBP3 5 1 SBD3+ USB*4P
21 USBP3
USBN3 6 2 SBD3- D8
21 USBN3
USBP2 7 3 SBD2+ IP4220/SOT457
21 USBP2
5

USBN2 SBD2-
21 USBN2 8 4
SBD3+ 6 4 SBD2+ N53-16M0101-F02
X_Common Chock
SBD3- 1 3 SBD2-
Match pairs to 50 mil.
RN27
2

0R_8P4R/6
B B
USBP3 1 2 SBD3+
USBN3 3 4 SBD3-
USBP2 5 6 SBD2+
USBN2 7 8 SBD2-
SVCC4
FRONT PANEL USB CONNECTOR FOR USB PORT 8,9
T:2 , H:4.5 ,W:7 ,S:7,Er:4.2 ,Zo=90.7 Ohm
NEAR USB CONNECTOR Trace lengths must be less 5 inches SVCC4 D32
20 / 7 / 7 / 7 / 20 / 7 / 7 / 7 / 20 IP4220/SOT457

5
L14
SBD9- 6 4 SBD8-
21 USBN8 USBN8 5 1 SBD8- P24
21 USBP8 USBP8 6 2 SBD8+ SBD9+ 1 3 SBD8+
USBN9 SBD9-
REAL USB CONNECTOR WITH RJ45 FOR USB PORT 4,5 21
21
USBN9
USBP9 USBP9
7
8
3
4 SBD9+ SBD8- 1 2 SBD9-

2
SBD8+ 3 4 SBD9+
X_Common Chock 5 6
Trace lengths must be less 5 inches 7 8
10
Match pairs to 50 mil.
RN54 CON2X5-1_Yellow
L11 SVCC2 0R_8P4R/6 FRONT_USB_DET#
SVCC2 USBN8 1 2 SBD8- N31-2051701-F02 FRONT_USB_DET# 20
USBP4 5 1 SBD4+ J9A USBP8 3 4 SBD8+ C756
21 USBP4 USBN4 SBD4- USBN9 SBD9- 100p/50V/NPO/4
21 USBN4
USBP5
6 2
SBD5+ D20 SBD4-
5 23
USBP9
5 6
SBD9+
FRONT USE DETECT
21 USBP5 7 3 6 24 7 8
21 USBN5 USBN5 8 4 SBD5- IP4220/SOT457 SBD4+ 7 25 for EMI solution 2007/08/16
5

8 UP 26 NEAR USB CONNECTOR


X_Common Chock SBD5+ 6 4 SBD4+
SBD5-
1
2
27
28
T:2 , H:4.5 ,W:7 ,S:7,Er:4.2 ,Zo=90.7 Ohm
A Match pairs to 50 mil. RN44 SBD5- 1 3 SBD4- SBD5+ 3 29 A
0R_8P4R/6 4 DOWN 30
USBP4 1 2 SBD4+
20 / 7 / 7 / 7 / 20 / 7 / 7 / 7 / 20
2

USBN4 3 4 SBD4- RJ45(GIGA)+USB*2


USBP5 5 6 SBD5+
USBN5 7 8 SBD5-
N58-22F0521-E06 MICRO-STAR INt'L CO., LTD.
Title
NEAR USB CONNECTOR USB Conn.
T:2 , H:4.5 ,W:7 ,S:7,Er:4.2 ,Zo=90.7 Ohm Size Document Number Rev
1.0
20 / 7 / 7 / 7 / 20 / 7 / 7 / 7 / 20 MS-7500
Date: Wednesday, December 26, 2007 Sheet 30 of 48
5 4 3 2 1
5 4 3 2 1

5V_DUAL

3VDUAL
ADI1884 CODEC R590
HP_R 20K/4/1
NEED P/N HP_L
LOW ACTIVE TO R158
+3.3V_AVDD DISABLE AMP 10K/4 Q68

C
N-2N3904_SOT23
32 AUDIO_AMP_DIS# B
Trace Width 20mils. C398 C620
10uf/10V/Y5V/8 0.1uf/25V/Y5V/4 C778 R591 5V_DUAL

E
R603 0.01uf/25V/X7R/4 20K/4/1
ADI1884/LQFP48 U13 R_SPKR_IO R362 20K/4/1

49
48
47
46
45
44
43
42

41
40
39

38
37
32 BEEP

2
EC42 100uF/16V/5x11/2.0mm 100K/6 R343 X_0/4 FB29

AVss

AVss
DM_CLK
SPDIFO

SURR-OUTL

AVdd
GPIO_0/EAPD

RESERVED
RESERVED
RESERVED

SURR-OUT-R
NC

NC
36 FR_OUTR EC431+ 2100uF/16V/5x11/2.0mm LINE_FOUTR R377 C777 U14 301S/0805
D FR-OUTR D
C616
FR-OUTL 35 FR_OUTL 1+ 2 LINE_FOUTL 10K/4 0.01uf/25V/X7R/4
0.1uf/25V/Y5V/4 1 1 8 MONO_OUT+
DVcore SENSE_B R497 2K/4/1 SD VOUT_B
2 34 2 7

1
C381 NC SENSE_B R520 10/4 C644 BYPASS -V
3 33 3 6

GND
DVio MIC_Bias_src +3.3V_AVDD +IN +V
4.7uf/10V/X5R/8 R330 X_0/4 4 VOL_IN 0.1uf/25V/Y5V/4 4 5 MONO_OUT-
NC MONO_OUT MONO_OUT C384 2.2uf/10V/8/X7R M_OUT R369 18.2K/4/1 -IN VOUT_A C643
add two via on pin7 directly to DGND Mono_out 32
5 31 C674 C720 SSM2211CPZ-LFCSP8 X_10uf/10V/Y5V/8
21 HDA_SDOUT

9
SDATA_OUT GPIO_1 1uf/16V/Y5V/6
21 HDA_BITCLK_R 6 BIT_CLK 4.7uf/10V/X5R/8
7 DVss GPIO_2 30
R177 22/4 ACSDIN0 8 29 MIC_BIAS_C R604
21 HDA_SDIN0 SDATA_IN MIC_BIAS_C R_SPKR_SB SPKR_OUT R363 20K/4/1
3VDUAL 9 DVdd 21 SPKR
10 28 MIC_BIAS_B C781
21 HDA_SYNC SYNC MIC_BIAS_B 100K/6
11 0.01uf/25V/X7R/4 R607 26.1K/6/1
21,23 HDA_RST# RESET#
12 27 R365
PC_BEEP VREF C779 MONO_OUT-
10K/4 1
R164 R120 26 CP26 X_0R/6 0.01uf/25V/X7R/4 MONO_OUT+ 2
AVss

MIC2R/JD1
MIC2L/JD2
X_4.7K/4 C617 X_47/4 25 +3.3V_AVDD
AVdd

SENSEA
10uf/10V/Y5V/8 CP13 X_0R/6

MIC2R
MIC1L

LIN1R
LIN1L
C627 D1x2-WH-SNOL
C409 C625 C631 Internal Speaker

NC
NC

NC
NC
NC
VCC3 X_0.1uf/25V/Y5V/4 0.1uf/25V/Y5V/4 0.1uf/25V/Y5V/4
1uf/16V/Y5V/6
C632 X_102pf/50V/X7R/4
P6
C629
13

14
15

16
17

18
19
20

21
22

23
24
0.1uf/25V/Y5V/4 C560 C630
place 0.1uf close to pin3 and X_10pf/50V/NPO/4 0.1uf/25V/Y5V/4 C633 X_102pf/50V/X7R/4 MIC_BIAS_C R221 3K/4
pin9 each R227 3K/4
+3.3V_AVDD recommend place Mic bias resistor
ADI1884 JACK DETECT 1000pf stitch cap for EMI, and place close to jack
close to code
J78A

6
REAL_MIC_R C383 2.2uf/10V/8/X7R REAL_LINE-IN_R
R496 REAL_MIC_L C388 2.2uf/10V/8/X7R REAL_LINE-IN_L 1
2.67K/4/1 REAL_LINE-IN_L R331 150/4/1 FB34 1 2 301S/0805 22
REAL_LINE-IN_R R416 150/4/1 FB26 1 2 301S/0805 25
MIC1_R C638 2.2uf/10V/8/X7R FRONT_MIC_R 23 LITE BLUE
SA_D 5.1K/4/1 R298 SENSE_A MIC1_L C639 2.2uf/10V/8/X7R FRONT_MIC_L SA_C 24
SA_C 10K/4/1 R297 C675 R481 R485
1uf/16V/Y5V/6 33K/4 33K/4

10
JACK-AUDIOX2-9P_GREEN-RH-1
C
C623 B09-018841D-A25 Fix audio issue for HP
C

1uf/16V/Y5V/6 recommend 2007/10/31 J78B

8
LINE_FOUTL R470 0/4 FB35 1 2 0R/8 2
EMI Solution LINE_FOUTR R611 0/4 FB11 1 2 0R/8 5 GREEN
3
SA_D 4
C634 X_102pf/50V/X7R/4 R613 R612
1K/4 1K/4 C291
Speaker Out Decoupling C635 X_102pf/50V/X7R/4 470pf/50V/X7R/4
C294
JACK-AUDIOX2-9P_GREEN-RH-1

470pf/50V/X7R/4
R484 33K/4 C299 N54-09F0181-A10
1000pf stitch cap for EMI, and place close to jack C771 C746 230pf/4 ESD
R477 33K/4 C640 102pf/50V/X7R/4 X_470pf/50V/X7R/4 X_470pf/50V/X7R/4 C300
CP38 X_0R/6 230pf/4 ESD

FRONT_MIC_R
C641 X_102pf/50V/X7R/4
Rear audio jack
FOR EMI 07/06/15
FRONT_MIC_L 1000pf stitch cap for EMI, and place close to jack

R220 3K/4 Azalia Front Audio Connector


MIC_BIAS_B R225 3K/4

recommend place Mic bias resistor


close to code C619 X_102pf/50V/X7R/4 AUDIO CODE REGULATORS

C770 X_102pf/50V/X7R/4
Trace Width 30mils.
Place those component close to
5V_DUAL
audio connector. U20 +3.3V_AVDD
P23
B
1 2 L1087CG/SOT89/800mA 3.425V B
C569 100uf/16V/6.3X5/2.5mm FB21 3 4 FRONT_AUDIO_DET# 3
FRONT_AUDIO_DET# 20 VIN VOUT 2
HP_R 1+ 2HP_R_RR R469 49.9/4/1 1 2 0R/8 LINE_OUT_R 5 6 MIC_SNS
FB20 SENSE_A 7

ADJ
HP_L 1+ 2HP_L_LL R600 49.9/4/1 1 2 0R/8 LINE_OUT_L 9 10 HP_SNS R1 R370
C757 C626 100/4/1 C614
C554 YJ205-IA 100p/50V/NPO/4 10uf/16V/Y5V/1206 10uf/10V/Y5V/8 C719

1
100uf/16V/6.3X5/2.5mm GREEN 4.7uf/10V/X5R/8
C769 C621 R307 R577
R471 R601 230pf/4 ESD 230pf/4 ESD 39.2K/4/1 20K/4/1
22K/4 22K/4
N31-2051691-F02 R2 R321
165/4/1 CB6
0.1uf/25V/Y5V/4

A A

MICRO-STAR INt'L CO., LTD.


Title
Azalia Codec-ADI 1884
Size Document Number Rev
1.0
MS-7500
Date: Wednesday, December 26, 2007 Sheet 31 of 48
5 4 3 2 1
5 4 3 2 1

LPC length should be less than 18 inches.

3VDUAL
Reserved
VCC3

RN48
LPC SUPER I/O SMSC 5327 LPC_AD3 2 1
C17 C16 C14 C11 LPC_AD2 4 3
0.1uf/25V/Y5V/4 0.1uf/25V/Y5V/4 0.1uf/25V/Y5V/4 0.1uf/25V/Y5V/4 LPC_AD1 6 5
LPC_AD0 8 7
VBAT
VCC3 X_8.2K_8P4R/4

3VDUAL Add 0.1uf for HP


recommend 2007/08/14 C6 SB700 Internal Pull-High
C205 0.1uf/25V/Y5V/4
D D
R335 0.1uf/25V/Y5V/4

121
X_330/4 U5

15

19
80

46
9
PRD[0..7] 29

VBAT
VCC_IN

VTR
VTR
VTR
VTR
DRVDEN0 60 83 PRD0
33 DRVDEN0 GP40/DRVDEN0~ PD0
SATA_LED 61 84 PRD1
38 SATA_LED HD_LED_OUT~/GP41/DRVDEN1~ PD1
INDEX# 70 85 PRD2
33 INDEX# INDEX~ PD2
MOA# 62 86 PRD3
33 MOA# MTR0~ PD3 VCC3
SMB_CLK_SENSE 58 88 PRD4
6,27 SMB_CLK_SENSE SMBCLK/GP36/MTR1~ PD4
DSA# 64 89 PRD5
33 DSA# DS0~ PD5
SMB_DATA_SENSE 59 90 PRD6
6,27 SMB_DATA_SENSE SMBDATA/GP37/DS1~ PD6
DIR# 65 91 PRD7
33 DIR# DIR~ PD7
STEP# 66 81 RINIT#

Parallel Port
33 STEP# STEP~ INIT~ RINIT# 29
WRDATA# 67 82 RSLIN# RSLIN# 29 C434

Floppy Interface
33 WRDATA# WDATA~ SLCTIN~
WE# 68 92 RSLCT RSLCT 29 0.1uf/25V/Y5V/4
33 WE# WGATE~ SLCT
TRACK0# 71 93 RPE RPE 29
33 TRACK0# TRK0~ PE
WP# 72 94 RBUSY RBUSY 29
33 WP# WRTPRT~ BUSY
RDDATA# 73 95 RACK# RACK# 29
33 RDDATA# RDATA~ ACK~
HEAD# 69 96 RERR# RERR# 29
33 HEAD# HDSEL~ ERROR~
DSKCHG# 63 97 RAFD# RAFD# 29
33 DSKCHG# DSKCHG~ ALF~ VCC3
98 RSTB# RSTB# 29
SIO_14M STROBE~
18 SIO_14M 20 CLOCKI
LPC_AD0 21 112 SINA
19 LPC_AD0 LAD0 RXD1 SINA 33
LPC_AD1 22 113 SOUTA C12
19 LPC_AD1 LAD1 TXD1 SOUTA 33
for EMI LPC_AD2 DSRA#

COM1
C762 23 114 0.1uf/25V/Y5V/4 C10 C49
19 LPC_AD2 LAD2 DSR1~ DSRA# 33
solution 22pf/50V/NPO/4 LPC_AD3 24 115 RTSA#
19 LPC_AD3 LAD3 RTS1~/SYSOPT0 RTSA# 33
LPC_FRAME# 25 116 CTSA# 0.1uf/25V/Y5V/4
2007/08/16 19 LPC_FRAME#
LPC_DRQ#0 LFRAME~ CTS1~ DTRA#
CTSA# 33
19 LPC_DRQ#0
A_RST#
26
27
LDRQ~ SCH5327 DTR1~ 117
118 RIA#
DTRA# 33
0.1uf/25V/Y5V/4
15,19 A_RST# PCI_RESET~ RI1~ RIA# 33
21 RI# LPCCLK1 30 119 DCDA#
19,23 LPCCLK1 PCI_CLK DCD1~ DCDA# 33
R573 X_0/4 SERIRQR 31
19 SERIRQ SER_IRQ
21 SIO_PME#
R568 0/4 IO_PME# 14 IO_PME~/GP42 RI2~/GP50 120 RIB#
RIB# 33 (Place capacitor close to IC)
R572 0/4 EXT_SMI# 111 122 DCDB#

LPC Interface
21 EXT_SMI# IO_SMI~/GP46 DCD2~/TACH5/GP51 DCDB# 33
SUS_CLK_SIO 16 123 SINB
19,23 SUS_CLK_SIO CLKI32 RXD2/TACH6/GP52 SINB 33
SOUTB

COM2
TXD2/GP53 124 SOUTB 33
KBDATA 74 125 DSRB#
33 KBDATA KDAT DSR2~/TACH7/GP54 DSRB# 33
KBCLK 75 126 RTSB#
33 KBCLK KCLK RTS2~/GP55 RTSB# 33
C MSDATA 76 127 CTSB# C
33 MSDATA MDAT CTS2~/TACH8/GP56 CTSB# 33
MSCLK 77 128 DTRB#
33 MSCLK MCLK DTR2~/GP57 DTRB# 33
KBRST#

Mouse
R574 X_0/4 21 KBRST# A20GATE
78 KBDRST~ KBD & PSIN# IO_RSMRST# R797 1K/4
21 A20GATE 79 A20M PWRBTN_IN~/GP62 1 PSIN# 38 3VDUAL
A_RST# PE_RST# 2 SLP_S3# PWRGOODA R392 4.7K/4
SLP_S3~/GP63 SLP_S3# 21,34,38
DEFAULT USE CHIP RST R570 33/4 3 SLP_S5# PWRGD_SD2 R798 X_1K/4
HP RECOMMAND 2007/08/06 SLP_S5~/GP64 SLP_S5# 21,24,28,35
PE_RST# 33 7 CPU-FAN_TACH PWRGD_SD R799 1K/4
24,25 PE_RST# GPRST2~/GP61 PDS_EN~/GP85/FAN_TACH1 CPU-FAN_TACH 29
SYS-FANPWM 34 10 PWRBTN# PWRBTN# 21 PE_WAKE_CHIP# R800 1K/4 SYSOPT Strap (RTS1~):
29 SYS-FANPWM PWM2/GP11 PWRBTN_OUT~/GP66
RC_ID 35 11 PS_ON#
BEEP RC_ID/GP12/FAN_TACH2 PS_ON~/GP67 CLAMP_CTRL PS_ON# 28,34,38 PS_ON# R1 4.7K/4 R124 - 0x2E* DEFAULT
31 BEEP 53 17 VCC5_SB
Miscellaneous
CPU-FANPWM DIAG_BEEP/GP21 CLAMP_CTRL/GP60 PME# CLAMP_CTRL 28 3V_SW_MAIN R3 X_4.7K/4
29 CPU-FANPWM 54 PWM1/GP22 PME_IN~/GP13 36 PME# 21,24,26 R144 - 0x4E
PDS_EN2 SLP_S5# CLAMP_CTRL R6 4.7K/4

Power Mangement
47 PDS_EN2/INTRUDER~/GP25 USB_PWR~/GP70 37 SLP_S5# 21,24,28,35
CPU_PRESENT_L 48 38 3V_SW_MAIN
6 CPU_PRESENT_L SLOTOCC1~/GP26 3V_SW_MAIN~/EVENT5~/GP15 3VDUAL
21,24 PE_WAKE_CHIP# PE_WAKE_CHIP# 49 39 PE_WAKE#
R327 8.2K/4 HDLOCK WAKE_OUT~/GP27/SLOTOCC2~ EVENT6~/GP16 5V_SW_MAIN PE_WAKE# 24,25 VCC_DDR VCC3
VCC3 50 GP44/HDLOCK~ 5V_USB_MAIN~/GP72 102 5V_SW_MAIN 34
R355 8.2K/4 HDUNLOCK 51
PSU-FAN_TACH GP45/HDUNLCK~ PWRGOODA
29 PSU-FAN_TACH 103 GP73/FAN_TACH3 PWRGOODA 4 PWRGOODA 38
PSU-FANPWM 104 5 IO_RSMRST# IO_RSMRST# 21
29 PSU-FANPWM PWM3/GP74 RSMRST~
SYS-FAN_TACH 110 105 PWRGD_SD PWRGD_SD 34 R576 R124
29 SYS-FAN_TACH R633,R634,R637 and R638 near SIO FAN_TACH4 PWRGD_SD/GP75
106 PWRGD_SD2 SATA_LED_SB# R197 10K/4 0/4 10K/4 R8
SCL0 PWRGD_SD2~/GP76 ATX_PWROK KBRST# R356 8.2K/4 X_8.2K/4
28 108

RST Gen.
10,11,18,21 SCL0 SMB_CLK_M/GP17 PWROK_PS ATX_PWROK 34,35,38 VCC3
SMBCLK1 R633 0/4 29 107 A20GATE R358 8.2K/4 VREF RTSA#
SMBus

21,24,25,26 SMBCLK1 SMB_CLK_R/GP43 5VIN VCC5


SDA0 R634 0/4 100 109 12V_SENSE RC_ID R322 8.2K/4 PDS_EN2
10,11,18,21 SDA0 SMB_DAT_M/3V_SW_AUX/WOL~/GP14 12VIN Add 0.1uf for HP
SMBDATA1 R637 0/4 101 C213 SMB_CLK_SENSE R4 4.7K/4 R616 0/4 VCC3
21,24,25,26 SMBDATA1 SMB_DAT_R/5V_USB_AUX/GP71 recommand
R638 0/4 40 0.1uf/25V/Y5V/4 SMB_DATA_SENSE R5 4.7K/4 R621 X_0/4 3VDUAL C305 R144 C1
COLOR PECI/AMD_SID1 VREF 2007/08/14 X_102pf/50V/X7R/4
38 COLOR 8 COLOR/GP30 VREF 41 0.01uf/25V/X7R/4 X_470/4/1
BLINK_GR 13 42 PROCHOT1#
LEDs

38 BLINK_GR BLINK_GR/GP31 PROCHOT1~ PROCHOT_1.8# 6,19


SATA_LED_SB# 56 43 PROCHOT2# R569 0/4 CPU_THRIP_SIO# R150 300/4 VCC_DDR
20 SATA_LED_SB# HD_LED_IN~/GP33/WDO PROCHOT2~ PROCHOT2_SB 20
44 CPU_THRIP_SIO# R575 0/4 PROCHOT1# R145 10K/4
Digital Sensor

THERMTRIP~/GP32 READY R610 0/4 CPU_THRIP# 6,21 PROCHOT2# R147 10K/4


READY/AMD_SID2/AMD_SIC/GP24 45
55 AUDIO_AMP_DIS# READY R156 1K/4 R147 changed pull up to VCC_DDR 2007/10/18
AMD_SIC/GP23 AUDIO_AMP_DIS# 31
SATA_LED SATA_LED_SB# 18
R619 X_0/4 FILTER_CAP
AVSS
VSS1
VSS2
VSS3
VSS4
VSS5
VSS6

C405 C303
4.7uf/10V/X5R/8 0.01uf/25V/X7R/4 SCH5327
6
12
32
57
87
99

52

Delta PAS Rev 0.28


B B

B02-0532704-S32
CP1
X_COPPER

+12V +12VIN

3VDUAL R2 4.7K/4 PWRBTN# SB700 Internal Pull-High


installed R2 for AMD recommend 2007/10/19 R695
11.8K/4/1 R9
D3 6.04K/6/1
1.71V 12V_SENSE 1N4148S_SOD123
TPM 1.2 R697 C19
1.78K/4/1 C302 R165
U40 1K/6 0.1uf/25V/Y5V/4
0.01uf/25V/X7R/4
LPC_AD0 26 6 VCC3
LPC_AD1 LAD0 GPIO
23 LAD1
LPC_AD2 20 19
VCC3 LAD2 3V_1
LPC_AD3 17 LAD3 3V_2 24 Add the detection circuit for 4-pin 12V
LPC_FRAME# 22 LFRAME# 3V_3 10
R614 0/4
connector from the power supply. 2007/08/13
24,25 PE_RST# PE_RST# 16 5 3VDUAL
R353 4.7K/4 LPC_PD# 28 LRESET# 3VSB
TPM_CLKRUN# LPCPD#
15 CLKRUN# GND1 18
SERIRQR 27 25
SERIRQ GND2
GND3 11
R348 19,23 LPCCLK0 LPCCLK0 21 4
0/4 LCLK GND4
TPM_ADDR 9 14
TESTBI/BADD XTALO
8 TESTI XTALI/32KIN 13 SUS_CLK_TPM 19
PP 7 R565 0/4
R347 R346 PP
A A
X_4.7K/4 4.7K/4 2 12
NC3 NC1
1 NC4 NC2 3

SLB9635TT1.2/TSSOP28
VCC3
TPM_ADDR :
0x02E ( Low )
0x04E *( High ) Default
R350 R349 TPMPP1 Default 1-2 ( GND )
MICRO-STAR INt'L CO., LTD.
X_4.7K/4 4.7K/4 PP : Physical presence Title
3VDUAL standard connect to GND.
SIO-SMSC5327 / TPM
Size Document Number Rev
1.0
MS-7500
Date: Wednesday, December 26, 2007 Sheet 32 of 48
5 4 3 2 1
5 4 3 2 1

C32
PS2 KEYBOARD & MOUSE CONNECTOR SERIAL PORT 1 0.1uf/25V/Y5V/4

D1

5V_DUAL_USB 40 mils U31 +12VCOM 1N4148S_SOD123


+12V

VCC5 20 VCC VDD 1


FS2 NRIA# 2 19
PS2_PWR NCTSA# RA1 RY1 CTSA#
1 2 3 RA2 RY2 18 CTSA# 32
NDSRA# 4 17 DSRA#
RA3 RY3 DSRA# 32
F-SMD1812P110TF-RH NSINA 7 14 SINA
RA4 RY4 SINA 32
RN1 C5 R14 NDCDA# DCDA#
N56-06F0191-F02 9 RA5 RY5 12 DCDA# 32

2
4
6
8
4.7K_8P4R/4 0.1uf/25V/Y5V/4 680/4
D
J68_1 RTSA# 16 5 NRTSA D
32 RTSA# DA1 DY1
DTRA# 15 6 NDTRA
32 DTRA# DA2 DY2
CONN-MINIDIN6P-RH-1 SOUTA 13 8 NSOUTA D2
32 SOUTA
1
3
5
7
DA3 DY3 -12VCOM 1N4148S_SOD123
4 11 GND VSS 10 -12V
MSDATA FB3 0R/6 MSDATA_C 1
32 MSDATA
MSCLK FB4 0R/6 MSCLK_C 5 9 ST751852_TSSOP20_T C45
32 MSCLK
3 8 0.1uf/25V/Y5V/4
2 7
6

J68_2 P53

10
4
KBDATA FB1 0R/6 KBDATA_C 1 NDCDA# 1 6 NDSRA#
32 KBDATA
KBCLK FB2 0R/6 KBCLK_C 5 CN1 NSINA 2 7 NRTSA
32 KBCLK
3 8 180pf/50V/NPO_8P4C/6 NSOUTA 3 8 NCTSA#
2 7 NRTSA 1 2 NDTRA 4 9 NRIA#
6 NDSRA# 3 4 5
C15 NCTSA# 5 6
180pf/50V/NPO/4 C13 C20 C18 CONN-MINIDIN6P-RH-1 NRIA# 7 8

11

12
180pf/50V/NPO/4 CONN-COM
CN2
180pf/50V/NPO/4 180pf/50V/NPO_8P4C/6
180pf/50V/NPO/4 N56-06F0211-K06 NDCDA# 1 2
NSOUTA 3 4
FLOPPY CONN BOLCK !!!Can't use Carry-Cap!!! NSINA 5 6
NDTRA 7 8

C
N59-09M0211-F02 C
3VDUAL
P10
1 2 DRVDEN0 SERIAL PORT 2
DRVDEN0 32
4
6 R351
7 8 INDEX# 8.2K/4
INDEX# 32
9 10 MOA# P52
MOA# 32
11 12 DTRB# 1 2 SINB
32 DTRB# SINB 32
13 14 DSA# CTSB# 3 4 DSRB#
DSA# 32 32 CTSB# DSRB# 32
15 16 SOUTB 5 6 RIB#
32 SOUTB RIB# 32
17 18 DIR# 7 8
DIR# 32
19 20 STEP# VCC5 9 10 3VDUAL
STEP# 32
21 22 WRDATA# RTSB# 11 12 COMM_B_DET#
WRDATA# 32 32 RTSB# COMM_B_DET# 20
23 24 WE# DCDB# 13 14 -12VCOM
WE# 32 32 DCDB#
25 26 TRACK0# +12VCOM 15
TRACK0# 32
27 28 WP# C52
WP# 32
29 30 RDDATA# C51 0.1uf/25V/Y5V/4
RDDATA# 32
31 32 HEAD# 0.1uf/25V/Y5V/4 H2X8[16]M_BLACK-RH C766
HEAD# 32
33 34 DSKCHG# NEED P/N ,FOOTPRINT 100p/50V/NPO/4
DSKCHG# 32
for EMI solution 2007/08/16
BH2X17[3][5]_BLACK-RH-2

N32-2173061-H06
VCC5
RN50
B B
1K_8P4R/4
DSKCHG# 7 8
WP# 5 6
TRACK0# 3 4
INDEX# 1 2

RDDATA# R337 300/4

Support ring wake up


pull up resistor at S/B inside 3VDUAL

R344
8.2K/4

RIA# RIA# 32
C

D7
NRIA# R117 4.7K/4 NRIA#_G B Q18
N-2N3904_SOT23
1N4148S_SOD123
E

A R119 C482 A

2.2K/4 0.01uf/25V/X7R/4

MICRO-STAR INt'L CO., LTD.


Modify Ring circuit for HP recommand 2007/08/13 Title
KB/MS&COM1&Floppy Conn.
Size Document Number Rev
1.0
MS-7500
Date: Wednesday, December 26, 2007 Sheet 33 of 48
5 4 3 2 1
5 4 3 2 1

3VDUAL 5VDUAL Add two 30K resistors (R803,R817)and +12V VCC3


VCC3
VCC5_SB one 0.1uF capacitor (C707) to act as
+12V VCC5 a SOFT START circuit for VDDA_25 rail
5V_DUAL ALWAYS ON for HP recommend 2007/10/24

+
R154 C406
EC58 1K/8 10uf/10V/Y5V/8

D
+1
470uf/10V/6.3X11/2.5mm C316 C707

S
0.1uf/25V/Y5V/4 R155 EC20 VCC5 VCC5_SB R817 30K/4 0.1uf/25V/Y5V/4 Q37
1000uf/6.3V/8X11.5/3.5mm/30mOHM
G
N-2N7002_SOT23
2.5V/150mA
G 1K/8

2
R782

S
Q7 G R436 1K/4
N-20N03/20mOhm_TO-252 VDDA_25
N-20N03/20mOhm_TO-252
Q6 S0:10A X_4.7K/4 R783

D
D
D HP recommend 2007/10/19 U1 S3/S5:2A R803 20/4/1 D

+
3VDUAL 2 1 G Q34

D
3V3AUX VCC
HP recommend 2007/10/19 N-2N7002_SOT23 EC30

CATHODE

REF
D
5V_DUAL
C791 1
+ 6 30K/4 100uf/16V/6.3X5/2.5mm

S
DLA

1
X_4.7uf/10V/X5R/8 EC40 Q31

+
32 PWRGD_SD G

D
PAD_GND
EC29 R639 0/4 N-2N7002_SOT23 R784

ANODE
8
2

X_1000uf/6.3V/8X11.5/3.5mm/30mOHM NC 1000uf/6.3V/8X11.5/3.5mm/30mOHM
G 1K/4/1

S
2
SLP_S3#_U1 3 7 C706 U43
S3# 5VDLSB VCC5_SBQ100 0.1uf/25V/Y5V/4 LM431AIM3_NOPB_SOT23-RH
VCC5_SB 4 5

S
3VDUAL S5# GND P-P06P03LCG_SOT89-3-RH

3
ISL6506CB

1
+

EC57

+
EC25
470uf/10V/6.3X11/2.5mm 1000uf/6.3V/8X11.5/3.5mm/30mOHM

2
BOTTOM PAD USE 6 VIAs TO GND VCC5 5V DUAL USB
VCC5_SB VCC5_SB
HP recommend 2007/10/22
R266

S
+12V G
N-20N03/20mOhm_TO-252

D
Q8
R383 R402 4.7K/4 Q39
G
X_10K/4 X_10K/4 N-2N7002_SOT23

D
SLP_S3#_U1 5V_DUAL_USB

S
VCC5_SB

D
C C

D
G Q98
21,32,38 SLP_S3# VCC5_SB
X_N-2N7002_SOT23G

D
R265 5V_DUAL 5V_DUAL_USB

S
Q102 4.7K/4 G

S
X_N-2N7002_SOT23

D
R267 VCC5_SB

S
32 PWRGD_SD G Q101 4.7K/4 R421 X_0R/1206

D
X_N-2N7002_SOT23 Q99
G Q52 P-P06P03LCG_SOT89-3-RH R420 X_0R/1206
32 5V_SW_MAIN
S N-2N7002_SOT23

S
R643 0/4
Add R643 for HP
recommand 2007/12/04
This change is for get 4 beeps when a crowbar
is detected for HP recommend. 2007/11/28
3VDUAL
Add R644 for HP
recommand 2007/12/04
VCC5_SB
B B
VCORE_EN 37 R644 0/4 R381
10K/4
38 ATX_PWR_OK D17
SYS_PWRGD 6,15
X_S-RB751V-40_SOD323-RH
D

VCC5_SB VCORE_EN# 37
R380
10K/4 Q33
X_N-2N7002_SOT23
VCORE_EN G
R379 18,21 FP_RST# D29
D

4.7K/4 S-RB751V-40_SOD323-RH
S

Q36
VCC_DDR
G X_S-RB751V-40_SOD323-RH VCC5_SB

N-2N7002_SOT23 D30
C

R378 Q40

D
ATX_PWR_OK 38
B R642 X_0/4 R385
4.7K/4 Q42
4.7K/4 N-2N3904_SOT23 N-2N7002_SOT23
ATX_PWROK 32,35,38
E

C245 R641 X_0/4 G


4.7uf/10V/X5R/8 For Thermtrip and Vcore issue 2007/10/25 VCC_SB

S
Q41
R384 B
D

VDDA_25 10K/4
Q92 N-2N7002_SOT23 N-2N3904_SOT23 SB600 & RX780 POWER GOOD CIRCUIT
E

C243
C

R399 Q46 G 0.1uf/16V/X7R/6


A PS_ON# 28,32,38 A
B
S

4.7K/4 For HP recommend 2007/10/29 VCC1_1


C
E

C247 R394 Q45

4.7uf/10V/X5R/8 N-2N3904_SOT23
B MICRO-STAR INt'L CO., LTD.
4.7K/4 N-2N3904_SOT23
E

C246 Title
0.1uf/16V/X7R/6 ACPI Power Controler
Size Document Number Rev
1.0
MS-7500
Date: Wednesday, December 26, 2007 Sheet 34 of 48
5 4 3 2 1
5 4 3 2 1
High-side MOS AVL(RoHS):
DDR II 1.8V POWER D03-75N022B-N03
+12V 5V_DUAL Irms(MAX) of VCC_DDR=18A D03-06N030B-I14
D03-80N021B-O05
D25 5V_DUAL
BAT54C_SOT23 Low-side MOS AVL(RoHS):
2 1 D03-75N022B-N03
5V_DUAL D03-06N030B-I14
+12V D10

2
D03-80N021B-O05

3
X_BAT54C_SOT23

+
CHOKE1 EC34
2 1 470uf/10V/6.3X11/2.5mm FOR HP recommend 2007/10/12
R78 1.2uH/6mm/18A/4mOHM
2.2/8 EN_DDR1 EN_DDR2

1
D 1800uf/6.3V/8X20/3.5mm D
I32-0654503-I11

1
EN_DDR1 C382

+
1uf/16V/Y5V/6 R114 2.2/8 C99 EC9 EC14 Q67

C
10uf/10V/Y5V/8 1800uf/6.3V/8X20/3.5mm R571 R588 Q53 R632

2
C75 N-06N03/5.7mOhm_TO252 VCC5_SB EN_DDR# B EN_DDR# B

5
4700pf/50V/X7R/4 U47 C76 EC12

D
7 1 Q11 1uf/25V/X7R/8 1800uf/6.3V/8X20/3.5mm 1K/4/1 C648 4.7K/4 4.7K/4

VCC

E
COMP/SD BOOT R115 2.2/8 G 0.1uf/16V/Y5V/4 N-2N3904_SOT23 N-2N3904_SOT23
UGATE 2
C88 R20 10K/6 CHOKE2 1.1uH/9mm/30A/1.4mOHM VCC_DDR
33pf/50V/NPO/4 8 1 2

S
R18 PHASE R32 0R/6
21K/6/1 4.7R/6 R97

D
R73 0/4 2.2/8 Q54 Q55 X_N-2N3904_SOT23

GND

C
0/4 6 4 R22 G
FB LG/OCSET

1
R109 0R/8 R454 B R455 X_4.7K/4

+
21 S3_STATE B ATX_PWROK 32,34,38
ISL6545CB EC11 X_4.7K/4

S
3
R21 1800uf/6.3V/8X20/3.5mm

E
2

2
R69 5.9K/6/1 C141 21,24,28,32 SLP_S5# R586
X_0/4 0.01uf/25V/X7R/4 EC16 4.7K/4
1800uf/6.3V/8X20/3.5mm
R65 2K/4/1 X_0R/6 R669 N-2N3904_SOT23
Q12
Rs N-06N03/5.7mOhm_TO252 0R/6 R666
CPU_VDDIOFB_H 6
R76 0R/6 R673
CPU_VDDIOFB_L 6

Ro
1K/4/1
DDR VTT Power
C C
VCC_DDR

C244
0.1uf/25V/Y5V/4 VCC5_SB

U2

9
R593
1K/4/1 1 8

9
VIN NC1
2 GND NC2 7
EN_DDR2 R620 0/4 3 6
REFEN VCNTL
VTT_DDR 4 VOUT NC3 5

RT9173CPSP_SOP8-RH
VTT_DDR R594
1K/4/1 C749
0.1uf/25V/Y5V/4 C511
10uf/10V/Y5V/8

+
EC21 VIN and GND pin need big
power plane
EC7
470uf/10V/6.3X11/2.5mm
EC6
470uf/10V/6.3X11/2.5mm
470uf/10V/6.3X11/2.5mm

B B
I31-0520803-O05

Trace Width 30mils.


3VDUAL
U21 USB_PHY +1.2VALW
L1087CG/SOT89/800mA 1.2V 0.5A
Modify current 3 VIN VOUT 2 1 2
too weak CP40

ADJ
VCC5 2007/08/01 R1 R429

1
C705 EC47

+
Change Value 10uf/16V/Y5V/1206
X_0R/6
C666 C724

1
VCC5_SB R153 2007/10/16 4.7uf/10V/X5R/8

2
220/8/1 2.5VREF_NB
VCC_DDR
+12V R2
2.5Vref R29 10uf/10V/Y5V/8
R792 X_0.1uf/16V/Y5V/4 0R/6
4.7K/4 X_100uF/16V/5x11/2.0mm CB7
C

R426 0.1uf/25V/Y5V/4
B Q51 R805 8.45K/4/1 C740
8

N-2N3904_SOT23 20/4/1 N-P45N02LDG_TO252-RH


D

1.21VREF_SB 3 Q50
+
E

R264 4.7K/4 G Q32 1 G


36,37 VRM_GD
N-2N7002_SOT23 C741
R806 R440
2 -
C764 2200pf/50V/X7R/4 1.21V
1uf/6.3V/X5R/4
S

C742 1K/4/1 7.87K/4/1 U61A R814 R429 has been un-populated and R29 has been
4
2

A 1uf/6.3V/X5R/4 U42 LM358MX_SOIC8_4 VCC_SB A


populated for U21 heat 2007/08/01
1K/4
1.9A
CATHODE

REF

R440 and
R426 MICRO-STAR INt'L CO., LTD.
ANODE

R427 1K/4
changed
1

R425
+

LM431AIM3_NOPB_SOT23-RH value for X_357/6/1 EC56 Title


HP Sys. Regulators / DDR
3

1000uf/6.3V/8X11.5/3.5mm/30mOHM
recommend Size Document Number Rev
2007/10/26 MS-7500 1.0

Date: Wednesday, December 26, 2007 Sheet 35 of 48


5 4 3 2 1
5 4 3 2 1

+12V VCC3
2.5VREF_NB

C723
0.1uf/25V/Y5V/4
R393 C709
8.45K/4/1 X_0.1uf/25V/Y5V/4

For Hp recommend 2007/10/24

D
3 Q43
+
C708 1 VCC18_G1 G
D 2 D
- VCC3
U58A N-P45N02LDG_TO252-RH

S
1uf/6.3V/X5R/4 R441 LM358MX_SOIC8_4

4
21K/6/1 R815 1K/4 +1.8V_S0
C767 R408 X_0R/6
2200pf/50V/X7R/4

3
1.5A
R393 and R441change VCC18_FB1
R396 1K/4
2 1 2 1

value for HP D52


C710 R397
recommend. 2007/10/26

1
BAV99_SOT23 D53

+
X_1.5K/4
EC49
BAV99_SOT23

2
X_102pf/50V/X7R/6
1000uf/6.3V/8X11.5/3.5mm/30mOHM
2.5VREF_NB

+12V VCC_DDR
R428
8.45K/4/1
U58B
LM358MX_SOIC8_4
1.9A

8
VCC5_SB A11 1.35V

D
A12 1.23V 5 +
Q44
7 VCCA_1V2_DRV G
EN_NB 6 -
C R793 N-P45N02LDG_TO252-RH C

S
1K/4 R816 1K/4
D

4
R587 C732 VCCA_1V2
G Q57 7.87K/4/1 C768
N-2N7002_SOT23 2200pf/50V/X7R/4
D

High-side MOS AVL(RoHS):


S

35,37 VRM_GD
R287 4.7K/4 G Q56 D03-75N022B-N03
N-2N7002_SOT23 D03-06N030B-I14 R406 1K/4
C743 1uf/6.3V/X5R/4
D03-80N021B-O05
S

1
R428 and R587change

+
X_0.1uf/16V/Y5V/4 R407 EC52
value for HP X_357/6/1 1000uf/6.3V/8X11.5/3.5mm/30mOHM

2
Low-side MOS AVL(RoHS): recommend. 2007/10/26
D03-75N022B-N03
D03-06N030B-I14
D03-80N021B-O05
C708 and C732 have been
change from 0.1UF to According to ER_RS780A1,increasing the north bridge
VDDHTTX voltage from 1.2V to 1.35V helps to reduce the
0.01UF for HP recommand
VCC3 susceptibility and exposure to this problem.(This issue
+12V 2006/08/06 will be resolved in the A12 silicon revision.) 2007/08/29
+12V
2

Vout max=(2+2.4 || (32.4+16.2+5.1)) / (2.4 || (32.4+16.2+5.1)) * 0.6V


+
CHOKE4 EC38
470uf/10V/6.3X11/2.5mm
R83 D12 1.2uH/5mm/8A/4.0mOHM
I32-0654503-I11 2.2/8 X_1N4148S_SOD123 Vout min = 0.6+2*(0.6/22.6-(3.3-0.6)/(32.4+16.2+5.1))
1

B B
EC18
VCC1.1_VIN 1000uf/6.3V/8X11.5/3.5mm/30mOHM
1

1
EN_NB C396 STRAP_DATA North Bridge Core VCCNB_FB
+

+
1uf/16V/Y5V/6 R151 2.2/8 C119 EC22 Level Voltage
10uf/10V/Y5V/8 1000uf/6.3V/8X11.5/3.5mm/30mOHM
2

2
C78 N-06N03/5.7mOhm_TO252 VCC3
5

4700pf/50V/X7R/4 U48 C77 EC19 1 1.011V@VCC3=3.3V


D

7 1 Q14 1uf/25V/X7R/8 1000uf/6.3V/8X11.5/3.5mm/30mOHM R431


VCC

COMP/SD BOOT R118 2.2/8 G R159


UGATE 2 43.2K/4/1
C89 R24 CHOKE11 1.2uH/6mm/18A/4mOHM VCC1_1 0 1.112V@VCC3=3.3V X_1K/4/1
33pf/50V/NPO/4 8 10K/6 2 1
S

PHASE
R23
21K/6/1 R31 0R/6 10.2A R160 R433 R432
D

4.7R/6 Q13 R152 R113 0/4


+

+
GND

VCC3
R96 R77 6 4 G 2.2/8 EC23 EC15

D
0/4 0/4 FB LG/OCSET R25 0R/8 EC50
2

ISL6545CB X_10K/4/1 Q96 5.1K/4/1 16.2K4/1


S
3

X_N-2N7002_SOT23 C907 C812


R70 C145 15 STRP_DATA G
X_0/4 R27 0.01uf/25V/X7R/4 1000uf/6.3V/8X11.5/3.5mm/30mOHM 4700pf/25V/X7R/4 1500pf/50V/X7R/4
5.1K/6/1

S
VCCNB_FB R67 2K/4/1 R167
1000uf/6.3V/8X11.5/3.5mm/30mOHM 2K/4/1
Rs N-06N03/5.7mOhm_TO252 1000uf/6.3V/8X11.5/3.5mm/30mOHM
Ro R68
2.43K/4/1 Add OV circuit for HP recommend 2007/10/22
A
Stuff R113 0 ohm and R167 10K ohm;Un-stuff Q96 and R159 2007/11/08. A

IF Q13,Q14 USE 9.m OHM , R27=5.1K MICRO-STAR INt'L CO., LTD.


Title
CORE PWR 1.2/1.1/CPU_HTVDD1.2
Size Document Number Rev
1.0
MS-7500
Date: Wednesday, December 26, 2007 Sheet 36 of 48
5 4 3 2 1
5 4 3 2 1

ISL6323CR CKT for Hybride


+12VIN

VCC5_SB R690 VIN


X_10.7K/4/1 VCORE
Make sure +12vin connect plug in

2
R794 VCC5 +12VIN EC63
X_1K/4 C796 Q70 C794 C795 1+ 2

C
D D
R691 0.1uf/16V/Y5V/4 N-P0903BD_TO252 1uf/16V/X5R/6 C10U16X51210

D
1

1
34 VCORE_EN# R654 X_4.7K/4 B X_1K/4/1 CD680U4EL9-RH
R693 U_G1 R694 1R/8 G
R692 2.2/8/1 EC64

E
2.2/8/1 R696 1+ 2

S
HP recommend 2007/10/19 Q72 10K/4 CHOKE5 CH-0.3U35A-RH-1 X_CD680U4EL9-RH
X_N-2N3904_SOT23 PHASE1 1 2 VCORE
34 VCORE_EN Q73 EC65

2
R640 0/4 N-P0903BD_TO252 1+ 2

D
C797 C798 R700
VCC3 4.7uf/10V/Y5V/8 1uf/25V/X7R/8 L_G1 R698 0R/8 G G 2.2/8/1 X_CD680U4EL9-RH

1
CP42 CP43 EC67

2
U29 1+

10
2
R699 ISL6323CR C802 X_COPPER X_COPPER
10K/4 102pf/50V/X7R/4 X_CD680U4EL9-RH
PVCC1_2 29

VCC

1
24 Q74
EN R708 2.2/8/1 N-P0903BD_TO252 PHASE1_SEN EC68
35,36 VRM_GD 37 VDDPWRGD BOOT1 31 1 2
6 PWROK_PWM 34 PWROK
C803 ISEN1 1+ 2
9 32 U_G1 0.1uf/25V/X7R/6 VIN
6 VID5 VID5 UGATE1
8 33 PHASE1 CD680U4EL9-RH
6 VID4 VID4 PHASE1
7 30 L_G1
6 VID3/SVC VID3/SVC LGATE1
6 EC66
6 VID2/SVD VID2/SVD

2
6 VID1/SEL
R701 0/4 5 VID1/SEL
R702 604/4/1 1+ 2
4 20 ISEN1+ ISEN1 Q76 C804 C805
6 VID0/VFIXEN VID0/VFIXEN ISEN1+
1K/4/1 0.01uf/16V/X7R/4 21 ISEN1- C808 N-P0903BD_TO252 1uf/16V/X5R/6 C10U16X51210 CD680U4EL9-RH

1
ISEN1-

2
VDD_NB 1 2 C806 R703 C807 PHASE1_SEN R710 1 2
R709 X_680pf/50V/X7R/4 48 4.32K/4/1 C810 U_G2 R711 1R/8 G EC69
COMP_NB
X_49.9/4/1 1 2 0.1uf/16V/X7R/4 0.1uf/16V/Y5V/4 1+ 2

1
R712 360/4/1 C809 100p/50V/NPO/4 1 27 R715 2.2/8/1 1 2 R713

S
R714 FB_NB BOOT2 C799 CD680U4EL9-RH
100/4 1 2 ISEN_NB_AR796 0/4 26 U_G2 0.1uf/25V/X7R/6 10K/4 CHOKE6 CH-0.3U35A-RH-1
C811 UGATE2 PHASE2 PHASE2 EC70
PHASE2 25 1 2 VCORE
6 CPU_VDDNB_FB_H
R704 X_0.1uf/16V/Y5V/4 R795 X_0/4 2 VSEN_NB LGATE2 28 L_G2 Q77 Q78 1+ 2
0/4 N-P0903BD_TO252

D
1

3 R718 604/4/1 R717 CD680U4EL9-RH


C815 RGND_NB ISEN2+ ISEN2 L_G2 R705 0R/8
C
ISEN2+ 22 G G 2.2/8/1 C
1

X_0.1uf/16V/Y5V/4 C814 23 ISEN2- EC71


2

ISEN2-

2
6 CPU_VDDNB_FB_L
R706 X_0.1uf/16V/Y5V/4 PHASE2_SEN R716 1 2 CP45 CP44 1+ 2

2
0/4 C301 0.01uf/16V/X7R/4 4.32K/4/1 C800 C813
2

VCORE R707 R720 2.49K/4/1 18 0.1uf/16V/X7R/4 0.1uf/16V/Y5V/4 C816 X_COPPER X_COPPER CD680U4EL9-RH

1
R719 X_470/4/1 COMP PWM3 102pf/50V/X7R/4
35

1
PWM3
100/4 1 2
C817 C801 150pf/25V/NPO/4 44 ISEN3+ R722 0/4 ISEN3 N-P0903BD_TO252 PHASE2_SEN
R721 X_102pf/50V/X7R/4 ISEN3+ ISEN3- ISEN2
17 FB ISEN3- 43

2
100/4 0.01uf/16V/X7R/4 PHASE3_SEN R726 1 2
R724 C819 15 4.32K/4/1 C818 C820 VIN
R723 0/4 422/4/1 R725 RCOMP 0.1uf/16V/X7R/4 0.1uf/16V/Y5V/4 +12VIN
6 COREFB_H

1
2.8K/4/1 36 PWM4
PWM4
1

C821

2
X_0.1uf/16V/Y5V/4 13 46 ISEN4+ R727 0/4 ISEN4 R729
VSEN ISEN4+ ISEN4- Q79 C823 C825
45 2.2/8/1
2

ISEN4-

2
R728 0/4 12 PHASE4_SEN R730 1 2 C824 N-P0903BD_TO252 1uf/16V/X5R/6 C10U16X51210

D
6 COREFB_L

1
RGND 4.32K/4/1 C822 0.1uf/16V/Y5V/4 U44A
0.1uf/16V/X7R/4 14 12 U_G3 R734 1R/8 G VDD_NB

1
VCC UGATE1
1

42 R733 2.2/8/1 +12VIN 11 2 1


R731 C827 R732 C828 PVCC_NB BOOT1 R735 C831

S
100/4 X_0.1uf/16V/Y5V/4 4.99K/4/1 0.1uf/16V/Y5V/4 C830 1uf/25V/X7R/8 C832 2.2/8/1 0.1uf/25V/X7R/6 EC76
2

C826
BOOT_NB 40 R736 2.2/8/1 1 2 1uf/25V/X7R/8
PHASE1 13 R737 CHOKE7 CH-0.3U35A-RH-1 1+ 2
X_0.1uf/16V/Y5V/4 19 C829 3 GND PHASE3 10K/4 1 2 VCORE
APA UGATE_NB 0.1uf/25V/X7R/6 Q81 Q82 CD680U4EL9-RH
UGATE_NB 39
VCC5 R738 52.3K/4/1 16 38 PHASE_NB N-P0903BD_TO252

D
RESET PHASE_NB LGATE_NB R739 EC77
LGATE_NB 41
PWM3 1 PWM1 LGATE1 4 L_G3 R741 0R/8 G G 1+ 2
R740 56K/4/1 14 2.2/8/1
OFS ISL6614ACBZ-T_SOIC14-RH CP46 CP47 CD680U4EL9-RH
47
GND

S
ISEN_NB

2
+12VIN R742
P3 VCC5 11 FS R743 X_6.2K/4/1 C833 X_COPPER X_COPPER EC78
3 1 X_10K/4/1 7X7 QFN 102pf/50V/X7R/4 1+ 2
49

1
12V GND
C834 R745 PHASE_NB_A 1 2 ISEN_NB_A N-P0903BD_TO252 PHASE3_SEN CD680U4EL9-RH
4 2 R744 120K/4/1 R746 C835 0.1uf/16V/X7R/4 ISEN3
12V GND

2
X_0.01uf/50V/X7R/6 X_10K/4 4.32K/4/1 VIN
PWR-2X2M C906
B B
0.1uf/16V/Y5V/4
I32-6323C0C-I11

1
N93-04M0361-F02

2
BOTTOM PAD
Q83 C836 C837
CONNECT TO GND N-P0903BD_TO252 1uf/16V/X5R/6 C10U16X51210

D
Through 8 VIAs

1
1.2uH/7.5mm/18A/3.5mOHM U44B
CHOKE8 470uf/16V/8X11.5/3.5mm 470uf/16V/8X11.5/3.5mm 5 9 U_G4 R748 1R/8 G
470uf/16V/8X11.5/3.5mm 470uf/16V/8X11.5/3.5mm PVCC UGATE2
+12VIN 1 2 VIN BOOT2 10 2 1 R749
R747 C838

S
1

2.2/8/1 0.1uf/25V/X7R/6
+

C839 EC72 EC73 EC74 EC75 EC80 EC81 EC82 EC83 C840 8 10K/4 CHOKE9 CH-0.3U35A-RH-1
X_0.01uf/25V/X7R/4 0.1uf/16V/Y5V/4 PHASE2 PHASE4
6 1 2 VCORE
2

PGND Q85 Q86


470uf/16V/8X11.5/3.5mm 470uf/16V/8X11.5/3.5mm 470uf/16V/8X11.5/3.5mm 470uf/16V/8X11.5/3.5mm N-P0903BD_TO252

D
R751
VIN PWM4 2 7 L_G4 R750 0R/8 G G
PWM2 LGATE2 2.2/8/1
ISL6614ACBZ-T_SOIC14-RH CP48 CP49

2
2

C842 C843 C841 X_COPPER X_COPPER


102pf/50V/X7R/4

1
1uf/16V/X5R/6 C10U16X51210 N-P0903BD_TO252
D

VCC5 VCC5 PHASE4_SEN


UGATE_NB R752 1R/8 G ISEN4
R755
Q97
S

R753 R754 N-P0903BD_TO252


X_0R/8 X_0R/8 10K/4 CHOKE10 CH-0.3U35A-RH-1
PHASE_NB 1 2 VDD_NB VCC_DDR
PWM4 ISEN4-
D

Q88 Q89 R757 CHOKE5 ,6 ,7 ,9 ,10 have been changed toroid


LGATE_NB R756 0R/8 G G 2.2/8/1 R360
Disable PWM4 Use 3phase VID1/SEL type 2007/08/06
CP50 CP51
S

C844 X_300/4 LOW FOR SVID


X_COPPER X_COPPER
A 102pf/50V/X7R/4 R364 R368 A
1

N-P0903BD_TO252 3VDUAL X_27/4 X_27/4


N-P0903BD_TO252 PHASE_NB_A
ISEN_NB_A
D

D
R391
X_4.7K/4

G G VCORE_EN#
C

Q27 Q25 Q26


MICRO-STAR INt'L CO., LTD.
S

6 CPU_CORE_TYPE
R389 B S
X_4.7K/4 X_N-2N7002_SOT23
X_N-2N7002_SOT23 Title
E

X_N-2N3904_SOT23 VRM-ISL6323CR CKT for Hybride


R386 300/4 Size Document Number Rev
1.0
MS-7500
Date: Wednesday, December 26, 2007 Sheet 37 of 48
5 4 3 2 1
5 4 3 2 1

D D

VCC3

CHASSIS_ID0 R329 8.2K/4


CHASSIS_ID1 R336 8.2K/4
CHASSIS_ID2 R375 8.2K/4
21 CHASSIS_ID2

Front Panel
3VDUAL
EMI
3VDUAL C647
X_0.1uf/25V/Y5V/4
P5

R320 R492 82/6 HDD++ 1 2 BLINK_GR


BLINK_GR 32
10K/4 3 4 COLOR
32 SATA_LED COLOR 32
PWSW- 5 R493 75/4/1
33/4 R388 7 8
32 PSIN# 9 10
21 CHASSIS_ID0 CHASSIS_ID1 21,29
H2X5[6]_BLACK-RH
C565 C411 R328
X_1uf/16V/Y5V/6 0.1uf/25V/Y5V/4 100/4
C NEED P/N C

PWSW+
24 PWSW+
HP Front Panel

ATX Connector

-12V VCC3
B P1 B

VCC3 13 3.3V 3.3V 1


C274 IF SIO PWR_GD NOT USE , CHANGE TO ATX POWER CONNECT PWR_GD
X_0.1uf/25V/Y5V/4 14 2
-12V 3.3V C260
pull up resistor at SIO side C257 15 3 VCC5 0.1uf/25V/Y5V/4 VCC3 VCC3
102pf/50V/X7R/4 GND GND
R345 33/4 16 4
28,32,34 PS_ON# P_ON 5V VCC5 R111
17 5 R116 X_10K/4
C645 GND GND C237 X_10K/4
220pf/25V/NPO/4 18 6 0.1uf/25V/Y5V/4
GND 5V R139
B

19 7 10K/4
GND GND
20 8 R473 33/4 E C R79 X_0/4 ATX_PWR_OK 34
VCC5_SB -5V POK Q16 X_N-2N3904_SOT23
21 9 C646
5V 5VSB VCC5_SB
220pf/25V/NPO/4 C210
22 10 C242 0.1uf/25V/Y5V/4
VCC5 5V +12V +12V
R231 R390 0/4
32 PWRGOODA
X_4.7K/4 23 11
C230 5V +12V 0.1uf/25V/Y5V/4 ATX_PWROK 32,34,35
From SB X_0.1uf/25V/Y5V/4 24 GND DET 12 C198 CLOSE TO SIO
0.1uf/25V/Y5V/4
C

R228 X_4.7K/4 DEFAULT USE SIO PWRGD


21,32,34 SLP_S3# B 2X12 POWER VCC3
A
PWR-2X12M C204 For SA VCC5 fail 2007/10/26 A
Q23 0.1uf/25V/Y5V/4
N93-24M0171-F02
E

X_N-2N3904_SOT23 VCC5 Near power connector

Modify PS_ON# circuit MICRO-STAR INt'L CO., LTD.


2007/08/01 C412 C415 C484 C494
Title
Front Panel
10uf/10V/Y5V/8 10uf/10V/Y5V/8
10uf/10V/Y5V/8 10uf/10V/Y5V/8 Size Document Number Rev
1.0
MS-7500
Date: Wednesday, December 26, 2007 Sheet 38 of 48
5 4 3 2 1
5 4 3 2 1

+12V

C363 C366 C367


0.1uf/10V/X7R/4 0.1uf/10V/X7R/4 0.1uf/10V/X7R/4

D D

VCC5_SB

C427 C368 C379 C380 C407


0.1uf/10V/X7R/4 0.1uf/10V/X7R/4 0.1uf/10V/X7R/4 0.1uf/10V/X7R/4 0.1uf/10V/X7R/4
VCC_DDR -12V VCC_DDR VCC3

VTT_DDR
X_0.1uf/25V/Y5V/4
0.1uf/25V/Y5V/4 X_0.1uf/25V/Y5V/4

C209 5V_DUAL_USB
C520 C522 C524 C525 C591 0.1uf/10V/X7R/4 C586
C267 X_0.1uf/25V/Y5V/4 X_0.1uf/25V/Y5V/4
0.1uf/25V/Y5V/4 C519 C521 C523 0.1uf/25V/Y5V/4
X_0.1uf/25V/Y5V/4
C433 C431 C432
X_0.1uf/25V/Y5V/4 0.1uf/10V/X7R/4 0.1uf/10V/X7R/4 0.1uf/10V/X7R/4
0.1uf/25V/Y5V/4

C
VCC_DDR
Decoupling Cap C
C672 0.1uf/25V/Y5V/6
C658 X_0.1uf/25V/Y5V/6
C659 X_0.1uf/25V/Y5V/6 VCC_DDR
C660 0.1uf/25V/Y5V/6
C657 X_0.1uf/25V/Y5V/6 C671 X_0.1uf/25V/Y5V/6
C667 0R/6
C669 X_0.1uf/25V/Y5V/6 C220 C227 C236 C239
C670 0.1uf/25V/Y5V/6 C497
180pf/50V/NPO/4 180pf/50V/NPO/4 180pf/50V/NPO/4180pf/50V/NPO/4 0.1uf/10V/X7R/4

VCORE

VCC5
C517 C516 C504 C518 C509 C515
0.1uf/10V/X7R/4 0.1uf/10V/X7R/4 0.1uf/10V/X7R/4 0.1uf/10V/X7R/4 0.1uf/10V/X7R/4 0.1uf/10V/X7R/4

C216 C214 C217 C218 C219 C221 C222 C223


102pf/50V/X7R/4 0.1uf/10V/X7R/4 0.1uf/10V/X7R/4 0.1uf/10V/X7R/4 0.1uf/10V/X7R/4 0.1uf/10V/X7R/4 0.1uf/10V/X7R/4 0.1uf/10V/X7R/4

B B

C224 C225 C229 C265 C271 C283 C282 C284


0.1uf/10V/X7R/4 0.1uf/10V/X7R/4 0.1uf/10V/X7R/4 0.1uf/10V/X7R/4 0.1uf/10V/X7R/4 0.1uf/10V/X7R/4 0.1uf/10V/X7R/4 0.1uf/10V/X7R/4

VCC1_1
C288 C287 C289 C297 C290 C298 C315
0.1uf/10V/X7R/4 0.1uf/10V/X7R/4 0.1uf/10V/X7R/4 0.1uf/10V/X7R/4 0.1uf/10V/X7R/4 0.1uf/10V/X7R/4 0.1uf/10V/X7R/4

C208
0.1uf/25V/Y5V/4
VCC3
FOR EMI 06/28/07
VCORE

C295 C306 C360 C308 C309 C362 C314 C347


0.1uf/10V/X7R/4 0.1uf/10V/X7R/4 0.1uf/10V/X7R/4 0.1uf/10V/X7R/4 0.1uf/10V/X7R/4 0.1uf/10V/X7R/4 0.1uf/10V/X7R/4 0.1uf/10V/X7R/4

CP2 CP3 CP5 CP6


C348 C358 C350 C351 C361 C356 C353 C357 X_COPPER X_COPPER X_COPPER X_COPPER
0.1uf/10V/X7R/4 0.1uf/10V/X7R/4 0.1uf/10V/X7R/4 0.1uf/10V/X7R/4 0.1uf/10V/X7R/4 0.1uf/10V/X7R/4 0.1uf/10V/X7R/4 0.1uf/10V/X7R/4

A A

CP7 CP8 CP9


C372 C365
X_0.1uf/10V/X7R/4 0.1uf/10V/X7R/4
C354
0.1uf/10V/X7R/4
C364
X_0.1uf/10V/X7R/4
X_COPPER X_COPPER X_COPPER MICRO-STAR INt'L CO., LTD.
Title
For EMI
for EMI solution 2007/08/16 Size Document Number Rev
for EMI solution 2007/08/16 1.0
MS-7500
Date: Wednesday, December 26, 2007 Sheet 39 of 48
5 4 3 2 1
5 4 3 2 1

Optics Orientation Holes Mounting Holes

MH6 MH5 MH1 MH4 MH2 MH7 MH8


FM1 FM3 FM4

7
D D
X X X
9 6 9 6 9 6 9 6 9 6 9 6 9 6

X_FM X_FM X_FM 2 5 2 5 2 5 2 5 2 5 2 5 2 5

FM2 FM5 FM6

4
X X X

X_FM X_FM X_FM

FM7

X
NB/SB FAN/HEAT-SINK BATTERY BIOS
X_FM U19_X1
C C
U4_X1 U3_X1 SPI/8M/SOP8
XBT1_X1
XX1 XX1 MEC1 MEC1

Simulation

JS2 JS1 BAT_CR2032

SIM2 SIM1

X_PIN1*2 X_PIN1*2
VCC5
XX2 XX2 MEC2 MEC2

HS-0403280-RH HS-0403290-RH

B B

PCB
PCB1

P30-075000E-E48

A A

MICRO-STAR INt'L CO., LTD.


Title
BOM - Option Parts
Size Document Number Rev
1.0
MS-7500
Date: Wednesday, December 26, 2007 Sheet 40 of 48
5 4 3 2 1
5 4 3 2 1

PWROK MAP
PWROK PWM ISL6323CR
3-Phases Vcore
D D

AMD K9 940 1-Phases Vnb


PWROK

LDT_PWRGD

LDT_PG

VCORE_EN# VRM_GD
RX780/RS780

POWERGOOD
C C
HT_VLD VCCDDR_VLD
NB_PWRGD
HTVDD_EN VDD_25_VLD
SB_PWRGD CPU_VLD HT_PWRGD
CPUVDD_EN

NB_PWRGD PWR_GOOD

SB700

ATX_PWR_OK
B B

SLP_S3#

PWRBTIN#
PS_ON#
I/O SMSC 5327 PWRGOODA

ATX_PWROK
PSIN#
POWER CONN

Front Panel

A A

MICRO-STAR INt'L CO., LTD.


Title
PWROK MAP
Size Document Number Rev
1.0
MS-7500
Date: Wednesday, December 26, 2007 Sheet 41 of 48
5 4 3 2 1
5 4 3 2 1

LDT_RST#_L

AMD AM2R2 CPU


LDT_PWRGD_L
D D

RESET MAP
Reset Button

PCI_E2 X16
ATX_PWROK
PCI_E1 X1 RX780 / RS780 ATX Connector

BROADCOM 7454 SYSRESETb

POWERGOOD
C C

ATX_PWR_OK SMSC 5327


PWRGOODA

PWROK_PS

ADI1884 RSMRST#
FP_RST#
CPU_GD
SB700 RSTBTN#
PCI_RESET-
-LDT_RST
NB_PWRGD GPRST2
B B

TPM SYS_PWRGD
PWR_GOOD

IO_RSMRST#
PCI1
RSMRST#

HDA_RST#
AZ_RESET# PE_RST*

ROM_RST# PCIRST#
PCIRST#

A A

MICRO-STAR INt'L CO., LTD.


Title
RESET MAP
Size Document Number Rev
1.0
MS-7500
Date: Wednesday, December 26, 2007 Sheet 42 of 48
5 4 3 2 1
5 4 3 2 1

D D

C C

B B

A A

MICRO-STAR INt'L CO., LTD.


Title
Power Sequence
Size Document Number Rev
1.0
MS-7500
Date: Wednesday, December 26, 2007 Sheet 43 of 48
5 4 3 2 1
5 4 3 2 1

D D

C C

B B

A A

MICRO-STAR INt'L CO., LTD.


Title
CPU / VR Power Sequence
Size Document Number Rev
1.0
MS-7500
Date: Wednesday, December 26, 2007 Sheet 44 of 48
5 4 3 2 1
5 4 3 2 1

2.5V SHUNT CPU_VDDA_RUN (S0, S1) AM2R2


CPU VDDA 2.5V 0.2A
ATX P/S WITH 1A STBY CURRENT PW REGULATOR
VDD_CPUCORE_RUN (S0, S1)/VDD_CPUNB_RUN (S0, S1) VDDCORE
5VSB 5V 3.3V 12V -12V 12V 0.8-1.55V 110A
+/-5% +/-5% +/-5% +/-5% +/-5% +/-5% CPU_VTT_SUS (S0,S1,S3)
DDRII MEM I/F
CPU_VDDIO_SUS(S0,S1,S3) VTT 1.75A, VDD 10A
VRM SW VLDT 1.2V 1.4A
REGULATOR
D DDRII DIMMs D

0.9V VTT_DDR RX/780/RS780


REGULATOR VTT_DDR 1.75A
VDDHT/RX 1.1V 1.2A
1.8V VDD SW
REGULATOR VDD MEM 12A VDDHTTX 1.2V 0.5A
VDDPCIE 1.1V 2A
VCC 1.2V LINEAR +1.2V(S0, S1)
NB CORE VDDC
REGULATOR 1.1V 7A
+1.1V RX780/RS780
VCC 1.1V SW VDDA18PCIE 1.8V 0.9A
REGULATOR PLLs 1.8V 0.1A
1.8V LINEAR +1.8V(S0, S1)
REGULATOR VDD18/VDD18_MEM
1.8V 0.01A
+1.2V(S0, S1)
VCC 1.2V LINEAR
REGULATOR VDD_MEM 1.8V 0.5A
AVDD 3.3V 0.135A
5V_DUAL (S0, S1, S3, S4, S5)
5V_DUAL & SB700
3VDUAL 3VDUAL (S0, S1, S3, S4, S5)
X4 PCI-E 0.8A
REGULATOR ACPI
C
CONTROLLER ATA I/O 0.5A C

ATA PLL 0.01A


PCI-E PVDD 80mA
SB CORE 0.6A
CLOCK
+1.2VSB (S5)
1.2V STB LDO 1.2V S5 PW 0.22A
REGULATOR
3.3V S5 PW 0.01A
USB CORE I/O 0.2A
3.3V I/O 0.45A

AC97 CODEC

3.3V 59.2 mA
3.3V 31 mA
3.3V LDO
REGULATOR

B LAN B

3VDUAL 7mA

LDO AVDD1.2V 590mA


REGULATOR AVDD2.5V 235mA

SUPER I/O

3VDUAL 20mA
VCC3 1mA
VBAT 1uA
BAT
PCI Slot (per slot) X1 PCIE per X16 PCIE USB X4 FR USB X6 RL 2XPS/2 GBE
TPM
5V 5.0A 3.3V 3.0A 3.3V 3.0A VDD VDD 5VDual 3.3V 0.5A (S0, S1)
3.3V 5mA
3.3V 7.6A 5VDual 5VDual 3.3V 0.1A (S3)
12V 0.5A 12V 5.5A 1.0A 3VDUAL 25mA
12V 0.5A 2.0A 3.0A
A 3.3Vaux 0.1A A
3.3Vaux 0.375A
-12V 0.1A

MICRO-STAR INt'L CO., LTD.


3VDUAL (S0, S1, S3, S4, S5) Title
Power Delivery
Size Document Number Rev
1.0
MS-7500
Date: Wednesday, December 26, 2007 Sheet 45 of 48
5 4 3 2 1
5 4 3 2 1

08/07/07
MS-7500 0A Page 34:Add R394,C246 and Q45 (AMD recommand).
Page 06:Added AMD Sensor Bus for HP recommend.
06/05/07 Preliminary release Page 35:Add R673 (CPU_VDDIOFB_L).
Page 15:Added U62.B and R108 for meet powr sequence.
Page 35:Add C723,U22,R430,R30,C707,cb8 and C749 (for PA_SB700AA1).
06/15/07
Page 40:Add U4_X1 (SB HEATSINK). Page 19:Added R248 for 3VDUAL short issue when clean CMOS.
Page 06:R108,R109,R657 AND R658 have been deleted.
Page 21:C377 and C373 have been unpopulate for meet power
Page 15:C542,C597 AND C745 have been added(FOR EMI). 06/26/07 sequence.
Page 15:R93,R126,R165,R190,R199 R201,R167,R204,R270,R255,R179,R222,R236 and Page 16:Add R807,R808,C34(for NB MEM_VREF).
D
R248 have been deleted(using external CLK-GEN) Page 21:Added PRT_DET# circuit.. D
Page 18:U6 has been changed from ICS9LPRS472 (MLF 64pin) to
Page 15:R175,R179,Q15 and R291 have been added(level-shift for ALLOW_LDTSTOP). ICS9LPRS475 (TSSOP 56pin). Page 25:Added R452,R449 and R451 for modify PE_RST# signal
quality.
Page 15:R197,R45 and R47 have been deleted(DVI single channel).
Page 18:R231and R223 have been deleted.
Page 18:R338,R339,R340 AND R361 have been deleted(using external CLK-GEN) Page 27:Added NB THERM circuit for HP recommend.
Page 20:L29 has been deleted and CP14 has been added.
Page 19:R176,R211,R214 AND R215 have been deleted(using external CLK-GEN) Page 29:Modify Fan-circuit for HP recommend.
Page 19:R242 AND R250 have been deleted. 06/27/07 Page 32:R335 has been populated for SATA LED.
Page 19:R125 PULLUP 3VDUAL. Page 34:C245 has been changed from 0.1uF to 4.7uF.(power sequence) Page 32:Modify PE_RST# circuit for HP recommend.
Page 19:Add R276. 06/28/07 Page 34:5V DUAL USB circuit have been populated.
Page 23:R285,R183,R212,R186,R288,R203R,R189,R366,R357,R352,R351and R344 have Page 39:Add C290,C297,C298,C315 for EMI. Page 35:R153 has been changed from 220 ohm to 110 ohm
been deleted(SB700 HAS 15K INTERNAL PULLUP FOR PCI_AD[30:23) for 2.5VREF_NB voltage isn't stable.
06/29/07
Page 24:R187,R431,R433 AND R432 have been deleted(using external CLK-GEN) Page 15:R173,R135,R574,R196 have been deleted and Page 37:CPU PWM circuit follow HOUNDS Ver 0B modified.
R189,R190,R196 have been added.
Page 25:R408,R409,R394,R402,R414,R415,R410,R424,R430,R422 and R423 have been
deleted(using external CLK-GEN) 08/08/07
Page 16:R148,R162,C202 and C203 have been unpopulated.
Page 29:Added FAN-PWM duty cycle inverter circuit for
Page 28:R625,R626,R627,R628,R629,R630 have been deleted(using DVI single channel) Page 19:Add R809,R810,C750,J81 FOR AMD debug. HP recommend.
C Page 31:C771 and C746 have been added(FOR EMI). Page 21:R125 has been deleted. C
08/09/07
Page 22:C414 has been populated.
06/22/07 Page 6:Added C70 for the voltage divider for the gates of
Page 24:R766 and R769 have been populated,R767 and R768 the AMD SB-TSI translation circuit needs a decoupling
Page 06:C157,C158,R99 have been unpopulated,RN3 and R102 have been populated. unpopulated.(for HP LAN LED spec) cap.
Page 06:U51,RN2 have been deleted(for AMD recommand),R74 and J80 have been added.
Page 27:D44,D45 and D46 pin2 connect to VCC3. Page 27: R592 has been populated and R615 has been
Page 06:Add R183 and Q17(level-shift). un-populated for HP recommend .
Page 36:Add D52,D53.
Page 15:R42,RN43 and Q104 have been deleted,U62 has been added.
Page 15:R172,R175,R181,R192 and R187 have been changed from 3Kohm to 4.7Kohm. 07/04/07 08/13/07
Page 15:R182 has been changed from 2Kohm to 10Kohm. Page 6:R64 has been unpopulated. Page 13: R34 and R36 have changed to 301 ohm 1% resistor
when using RS780 for AMD recommend.
Page 15:C570 has been changed from 2.2uF to 4.7uF.
07/05/07
Page 17:Add ferrite bead L18,L26,L27,FB19,FB22. Page 14 and 19:PCI-E signal AC coupling have been changed
Page 34:Add R399,C247,Q46 for S3 function. from Y5V to X7R for AMD recommend.
Page 18:L10,L13,L16 and L20 have been populated.
Page 18:C654 and C661have been changed from 10uF to 22uF. 07/09/07 Page 15: U62 pin5 and R108 pin1 have been connected to
3VDUAL for AMD recommend.
Page 18:C655 and C733 have been changed from 1uF to 2.2uF. Page 13:Adding C920,C925 0.01uF stitching capacitors for
crossing a split when these signals change different reference
Page 15:R161,R223,R230 and R231 been changed from 10Kohm to 8.2Kohm. layer. Page 15:Deleted R296. WD_PWRGD signal only connect to
B R439. B
Page 19:R241 has been changed from 5.1Mohm to 20Mohm,R242 has been added.
Page 19:Adding C751,C752 0.1uF stitching capacitors for
Page 19: C323,C354,Y4,R168 have been deleted.U4.J21 connected to GND(25M_X1). crossing a split when these signals change different reference Page 16: C808 has been changed to 0 ohm when RS780 doesn't
layer. use side-port memory for AMD recommend.
Page 20:L29,C412,C924 have been unpopulated.
Page 21:RN36,RN38,Rn35,RN39,Rn40,C372,C511,C535 and C707 have been Page 17: C598 and C599 has been changed to 0 ohm when RS780
deleted,R278,R279 and R280 have been added. 07/11/07 doesn't use side-port memory for AMD recommend.
Page 21:Add R186 and Q22 (level-shift). Page 21:Added C387 0.1uF stitching capacitors for crossing a
split when these signals change different reference layer. Page 19:SIO PCICLK has been Changed from PCICLK5 to
Page 21:SMBDATA1 and SMBCLK1 have been connected U10. LPCCLK1 for AMD recommend.
Page 22:Add C394,C513,C748,L22,L36,L41 and EC84,delete C484,C527,C723. Page 32: R575 has been deleted.
Page 20: Add R340 .(TEMP _COMM connect to GND for
Page 22:C489,C717,C734,C735 and C772 have been changed from 10uF to 22uF.
MS-7500 0B AMD recommend )
Page 22:C378,C390,C480,C507,C508,C561,C563,C564,C567,C571,C714,C736,C744
and C747 have been changed from 0.1uF to 1uF. 08/01/07 Page 21: Deleted R186 and Q22.(SB THRMTRIP# not Implemented)
Page 22:C392,C510,C527,C528 and C721 have been changed from 1uF to 2.2uF. Page 15:Added R93 duo to NC7W207 output pin is op-drain . Page 22: C734,C567,C563,C571,C747 have been un-populated
when IDE or flash not using for AMD recommend.
Page 23:R308,R318 and R333 have been unpopulated,R311 have been populated. Page 23:R325 and R323 have been changed from 10Kohm to
2.2Kohm.(AMD demo schematic update)
Page 25:Add RN 58,RN59,RN60. Page 25:PCI-E signal AC coupling have been changed from Y5V
Page 29:Add R453 because modify SPI_HOLD# circuit for to X7R for AMD recommend.
Page 26:RN43,RN47 have been unpopulated. AMD recommend.
A A
Page 27:R180,R300 have been changed from 3Kohm to 4.7Kohm,and R89,R91 have Page 32 :Modify PS_IN# circuit for can't boot issue.
been changed from 2.2Kohm to 6.8Kohm.
Page 35 :R429 unpopulated and R29 populated for U21 too hot
issue.
Page 28:R581~R585,R578~R580 have been changed from 18ohm to 18.2ohm,and
R372,R374 have been changed from 2.2Kohm to 6.8Kohm.
MICRO-STAR INt'L CO., LTD.
Page 36 :R430 unpopulated and R30 populated for U22 too hot
issue. Title
Page 28:L21~L24 have been deleted. History-1
Page 31:R177 has been changed from 10ohm to 22ohm. Page 38 :Modify PS_ON# and ATX_PWR_GD circuit for can't boot Size Document Number Rev
issue. 1.0
MS-7500
Date: Wednesday, December 26, 2007 Sheet 46 of 48
5 4 3 2 1
5 4 3 2 1

MS-7500 0B 10/09/07
Page 6: Uninstall R102 and R74 for HP recommended.
08/13/07
10/11/07
Page 20:R341 and R319 have been un-populated.(SB700 internal pull-up).
Page 12: Change C228, C123 and C231 from 0.1uF to 47pF for EMI.
Page 20:Deleted C412 and C924.(SB HW Monitor).
Page 29: Change C668 from 0.1uF to 47pF for EMI.
Page 29:Modify Parall port circuit for HP recommend.
Page 9: Install 100pF cap in C609, C194 and C689 for EMI.
D Page 29:Added E17(SPI Write Protection) for HP recommend. D
Page 9: Change C169 from 180pF to 100pF for EMI.
Page 29:Modify FAN-PWM duty cycle inverter circuit for HP recommend.
Page 9: Change C207 from 0.1uF to 100pF for EMI.
Page 32:Add the detection circuit for 4-pin 12V connector from the
power supply for HP recommend. Page 9: Install 10pF cap in C188 for EMI.
Page 9: Change C151 from 0.1uF to 10pF for EMI.
Page 33:Modify RING Wake Up circuit for HP recommend.
Page 9: Change C169 from 180pF to 10pF for EMI.
08/14/07 Page 9: Change C461 from 10uF to 0.1uF for EMI.
Page 15:R169 has been changed to 3K ohm and populated for RS780. Page 9: Change C275 from 0.22uF to 33pF for EMI.
Page 15:R88 and R178 have been populated for RS780.
Page 15:R198 has been changed to 150 ohm and populated for RS780. MS-7500 0C
Page 15:R127 has been populated for RS780. 10/05/07
Page 39: Added C220, C227, C236, C239 and C216 for EMI.
Page 21:Add R186,Q22 ,R199 level shift circuit to U4 THERMTRIP#
for HP recommend. Page 18: Reserved C249 and C241 for EMI.
Page 20: Following AN_SB700AB2.pdf to added 0 ohm series resistor on SATA_TX [5:0]P/N.
Page 27:D39 has been populated for USB ESB protection.
C R624, R625, R626, R627, R628, R629, R630 and R631 C
Page 30:D8,D11,D20,D21,D32,D39 have been populated for USB ESB
protection. Page 31: Conneted C291, C294, C299, C300, C619, C621, C769 and 770 to GND for Huston EMC lab recommend.

Page 31:Add C554 and C569 decouple cap for HP recommend. 10/08/07
Page 32:R335 has been un-populated for HP recommend. Page 35, 36: Reserved R814, R815, R816, C764, C767 and C768 for Houston lab recommened.
Page 32:R144 has been changed to 470 ohm. Page 6: Change R107 connected power from VCC_DDR to VBAT.
Page 32:U31 has been changed from 75232 to 75185. Page 15: Change the name of a net from SYRESTE# to SYRESET#.
Page 33:Net "RDDATA#"pull up resistance value change to 300 ohm.
10/12/07
Page 35:R454 and R455 have been un-populated.R586 has been changed
to 4.7K ohm and populated. Page 35: Added R588,R632 and Q67 for EN_DDR2 circuit(HP recommend).
Page 35: Added EC47 for USB_PHY POWER.(HP recommend)
Page 35:R21 has been changed to 5.9K ohm for MSI POWER TEAM recommend.
Page 15: Deleted R302 ,unpopulated U62 and R108,added R304 and R357 for meet RS780 A12 spec. (AMD recommend)
Page 36:R27 has been changed to 5.1K ohm for MSI POWER TEAM recommend.
Page 15: Unpopulated R176,R179,Q15,R170,R171 and Q10;populated R275 and R291 for meet RS780 A12 spec.(AMD recommend)
Page 38:R228,Q23 and R231 have been un-populated.R345 and C645
populated. Page 28: Added L23,L24,L29 and L44 for EMI.

B 08/16/07 10/16/07 B

Page 39:Added C372,C365,C354 and C364 for EMI. Page 34: Unpopulated EC40 for 3VDUAL issue.(prevent ISL6506CB into OCP state )
Page 39:Added CP2,CP3,CP5,CP6,CP7,CP8 and CP9 for EMI. Page 35: Populated C742 for meet CPU power sequence.(AMD recommend)
08/20/07 Page 35: Changed R153 from 110 ohm to 220ohm.
Page 15:R188 and R254 have been uninstalled for RS780.
10/18/07
Page 21:R217 , R260 and C371 have been deleted.( for I2C signal )
Page 6: R107 changed to 10M ohm and R101 changed to 390 ohm for HP recommend.
Page 27:Add L6,L21 and L22 for EMI solution.
Page 32: R147 changed pull up to VCC_DDR for HP recommend.
09/27/07 Page 32: Added R633,R634,R637 and R638 (0 ohm) for HP recommecd.
Page 15:R169 have been uninstalled for RS780.R184 installed 3K
For RS780 2007/09/06 10/19/07
reference AMD demo borard
SHINER rev 2.0 C) Page 6: Added 0 ohm R199(unpopulated) for HP recommend.(SYS_PWRGD connected to PWROK_PWM)
Page 15 16 : Added two 0.1uF cap (C35,C37) for HP recommend.
Page 35:Changed EC9,EC12,EC14 from 1000uf to 1800uf that MSI POWER TEAM recommend.
Page 34: Added 0 ohm R639(unpopulated) for HP recommend.(PWRGD_SD connected to Q31 pin G )
Page 36:Changed R25 from 0ohm to 5.1k for MSI POWER TEAM recommend.
A Page 37: Added 0 ohm R640(unpopulated) for HP recommend.(VCORE_EN connected to U29 pin 24) A
Page 37:Changed C807,C301,C819 to 10nf and R702,R718 to 604ohm for MSI POWER TEAM recommend.
Page 34: Added a 4.7uF cap (C791) for HP recommend.
10/03/07 Page 15: Changed R172 and R175 from 4.7K ohm to 39K
ohm for AMD RS780 SCL.
MICRO-STAR INt'L CO., LTD.
Page 35, 36: Change C741, 708 and C732 from 0.01uF to 1uF for DDR power drop issue.
Title
Page 18: Remove R235 for S3 issue. Page 18: Changed R218 from 150 ohm to 158 ohm and and changed History-2
R229 from 75 ohm to 90.9 ohm for AMD RS780 SCL.
Size Document Number Rev
1.0
MS-7500
Date: Wednesday, December 26, 2007 Sheet 47 of 48
5 4 3 2 1
5 4 3 2 1

10/19/07 10/26/07 12/10/07


Page 21: R129 changed from 11.8K 1% ohm to 11.3K 1% ohm Page 27: C792,C793 changed from 0.1UF to 0 ohm and
Page 19: Uninstall R135 for AMD SB700 SCL. for SA USB fail. R91,R89 change from 6.8K ohm to 2.2K ohm and
Page 21: Added R268 and R270 for AMD SB700 SCL. R686,R687 change from 33 ohm to 22 ohm
Page 27: C148,C143,C175 changed from 6pf to 2.2pf and
Page 28: Changed R372 and R374 from 6.8K ohm to 15K C149,C144,C139 changed from 6pf to 3.3pf and L6,L21,L22 Page 35: Change R593, R594 value from 20K to 1K; C749 from 1uf to 0.1uf.
ohm for AMD RS780 SCL. changed from 47nH to 0 ohm for SA VGA signals fail.

Page 32: Install R2 for AMD SB700 SCL. Page 35 R440 changed from 1.5K 1% ohm to 7.87K 1% ohm MS-7500 0E
D and R426 changed from 1.5k 1% ohm to 8.45K 1% ohm. D
12/11/07
Page 36 : R393 , R428 changed from 1.5K 1% ohm to Page 27: NO STUFF C792 and C793 for HP recommend.
10/22/07 8.45K 1% ohm and R587 changed from 1.74K 1% ohm to
Page 15: Add R112 and connect U3C.D10 to PCI-E X16 SLOT(B17 7.87K 1% ohm and R441 changed from 4.21K 1% ohm to 21K
1% ohm for HP recommend.
12/12/07
B31 B48 B81) for HP recommend.
Page 27: STUFF C792 and C793 for HP recommend.
Page 15: NO_STUFF R81,R84 and R191 and connect A_RST# to Page 38: Add C412,C415,C484 and C494 for SA VCC5 fail.
SYSRESET# via 0 ohm (R282) for HP recommend.
12/14/07
10/29/07
Page 22: Deleted FB23. Page 27: L2-4,L6,L21,L22 C139,C144,C149,C175,C143,C148.,R91,R89
Page 19: Add R140 for HP recommend. change value for SA report
Page 25: STUFF EC28 for HP recommend.
Page 21: Add R271 and R258 for HP recommend.
Page 26: Deleted R803,E1 and R438 for HP recommend. 12/19/07
Page 34: Add Q92 for HP recommend.
Page 26: CP13,CP26,CP38 changed to 0ohm for HP recomemd (uninstalled). Page 37: R725 changed to 2.8K 1%,R720 changed to 2.49K 1% ,
C801 changed to 150pf for meet CX state power spec .
Page 27: Deleted R615 R593 and R594 for HP recommend. Page 36: Update NB OV circuit (add R167 R160 R113 and Q96
) for HP recommend.
Page 27: Deleted R599,R602, R597, R598, R595, R596, R609, 12/20/07
R608, R605, R606, C680, C679, C678, Q102, Q101 and P12 for
HP recommend. 10/30/07 Page 37: R725 changed to 2.2K 1%,R720 changed to 2K 1% ,
C801 changed to 47pf for meet CX state power spec .
C C
Page 27: Deleted FS9,R159 and R160 for HP recommend. Page 21: R129 changed from 11.3K 1% ohm to 11.8K 1% ohm Page 37: STUFF EC64,EC64 and EC67 for CX state power spec.
for AMD recommend.
Page 30: Changed R128,R131,R132 and R136 from 10K ohm to 280 Page 8: STUFF C448,C453,C458,C466,C687,C688 for CX state power spec.
ohm and Changed R123,R130,R133 and R138 from 5K ohm to 330
ohmfor HP recommend. Page 36: Update NB OV circuit
(R160,R113,R167,R159,R431,R68 change value) for HP 12/24/07
Page 34: NO STUFF EC40 and STUFF EC57 for HP recommend. recommend. Page 6: Add R125,R126 for AMD recommend.
Page 34: Deleted D27 for HP recommend.(5VDUAL).
11/06/07
Page 35: C742 changed from 0.1uF to 1uF.
Page 19: Add SW50 switch operation table.
Page 36: Deleted U22,C723,R430,R30,C707,C749,CB8.
Page 36: Add OV circuit for HP recommend. 11/08/07
Page 15: Q4 changed from 2N7002 to P8503 for HP request.
10/23/07
Page 36: for HP request
Page 15: R304 pin 1 connect to WD_PWRGD for HP recommend. 1.Stuff R113 with 0 ohm
Page 20: CP14 pin 2 connect to 3VDUAL for HP recommend. 2. Un-stuff Q96
3. Un-stuff R159
Page 39: J81 chanegd from a header 2*5 to two header 2*3 for AMD 4. Change R167 to 10K 1%
recommend .
B B

10/24/07
MS-7500 0D
Page 34: Add two 30K resistors (R803,R817)and one
0.1uF capacitor (C707) to act as a SOFT START 11/28/07
circuit for VDDA_25 for HP recommend. Page 34: Add Q98,Q101,Q102,R383,R402 for get 4 beeps
when a crowbar is detected for HP recommend.
Page 35: R440 change from 1.5Kohm to 1.37K ohm for HP
recommend .
11/29/07
Page 36: Add C723 for HP recommend . Page 35: Update VTT power circuit for meet AMD spec.
Page 21: Add R445 pull up +3VDAUL to USB_OCP#4 for HP recommend .
12/04/07
Page 36: Changed R159 from 10K ohm %5 to 10 ohm 1%and Deleted
R182 (same pull up VCC3 to STRP_DATA) Page 06: uninstall Q17,R28,R183 and install R199 for
HP recommand.
Page 19: Modify battery circuit for HP recommend .
Page 34: Add R643,R644 for HP recommand.
10/25/07 Page 34: Uninstall Q33,R436,D17 and install R639
for HP recommand.
Page 21: Deleted R445 and uninstall R439 for HP recommend.
A A
Page 31: Changed EC42,EC43 from 10uF to 22 uF for HP recommend. Page 37: uninstall R794,Q72,R690,R691,R654 and
install R640 for HP recommand.
Page 34: Add R641,642 for thermtrip and Vcore issue .
12/06/07 MICRO-STAR INt'L CO., LTD.
Page 15: Del R190, R196 (DFT_GPIO4/5 )pull up R for HP recommand.
Title
Page 15: Add C678 for AVDD by pass cap ; Add C679 for AVDDI by pass cap that HP History-3
recommand. Size Document Number Rev
1.0
MS-7500
Date: Wednesday, December 26, 2007 Sheet 48 of 48
5 4 3 2 1

You might also like