Acer TravelMate P653 (Wistron Bad50-HC)

5 4 3 2 1
BAD50_HC
DIS/UMA/Muxless Schematics Document
IVY/SNB Bridge
D D
Panther Point
C C
DY :None Installed ANNIE: ONLY FOR ANNIE solution.

PSL: KBC885 PSL circuit for 10mW solution installed.
DIS:DIS installed 10mW: External circuit for 10mW solution installed.
DIS_Muxless :BOTH DIS or Muxless installed 65W: for 65W adaptor installed.
DIS_PX:BOTH DIS or PX installed 90W: for 90W adaptor installed.
DIS_PX_Muxless:DIS or PX or Muxless installed.
Muxless: Muxless installed.(PX4.0)
PX:MUX installed.(PX3.0)
B PX_Muxless:BOTH PX or Muxless installed. B
UMA:UMA installed
UMA_Muxless:BOTH UMA or Muxless installed
UMA_PX_Muxless:UMA or PX or Muxless installed
<Core Design>
A A
Wistron Corporation
1bios.ru
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title
Cover Page
Size Document Number Rev
A3
BAD50-HC -1
Date: Friday, March 02, 2012 Sheet 1 of 109
5 4 3 2 1
5 4 3 2 1
TI CHARGER
BAD50-HC Block Diagram INPUTS
BQ24707
DCBATOUT
40
OUTPUTS BT+
(Discrete/UMA/co-lay) Project Code: 91.4UP01.001 SYSTEM DC/DC

RT8239CGQW 41
Project Name: BAD50_HC INPUTS DCBATOUT
D
Buttom Docking PCB No:11288 5V_AUX_S5
D
OUTPUTS 3D3V_AUX_S5
5V_CHARGER
VGA/HDMI(DVI)/DP PCB Version: -1 3D3V_S5
CPU DC/DC
HP OUT/SPDIF/MIC IN/LINE IN/ ISL95831HRTZ 42~43
USB2.0/USB3.0/DC JACK/ eDP Intel CPU
INPUTS DCBATOUT
OUTPUTS VCC_CORE
LAN/SERIAL PORT/PARALLEL PORT MUX
PI3VEDP212 103 DDRIII 1600 Channel A DDRIII Slot 0 GFX DC/DC
14
IVY/SNB Bridge 1600 ISL95831HRTZ 44
Nvidia N13P
27MHz
PCIe x 16 INPUTS DCBATOUT
-GS/GLP DDRIII 1600 Channel B DDRIII Slot 1 OUTPUTS +VCC_GFXCORE
(Discrete only) 15 26
##OnMainBoard 1600 SYSTEM DC/DC
TPS51218DS 45
VRAM DDR3 INPUTS DCBATOUT
2GB/1GB/512MB 900MHz 83.84,85,86,87
4,5,6,7,8,9,10,11,12,13
PCIE x 1 Express Card OUTPUTS 1D05V_LAN
88,89,90,91 75
26
Discreet/UMA/PX Co-lay SYSTEM DC/DC
51 SWITCH FDIx4x2 RT8207LGQW 46
HDMI G sensor PCIE x 1 Mini-Card
PS8122 51 (UMA only) DMIx4 79 USB x 1
INPUTS DCBATOUT
802.11a/b/g 65
1D5V_S3
OUTPUTS 0D75V_S0
C
eDP
SMBus non vpro RJ45
C
QM77/HM77 BCM57761 26
49
SWITCH CONN 59 SYSTEM DC/DC
MUX 94 LVDS(single Channel) Intel 31
vpro APW7153B 47
LCD 32.768 KHz
ST3DV520EQTR INPUTS 3D3V_S5
49
PCH OUTPUTS 1D8V_S0
PCIE x 1 intel 82579
SWITCH 95 SWITCH 95 RGB CRT Panther Point 105 25MHz 26
SYSTEM DC/DC
CRT 50 PI3VEDP212ZLE PI3VEDP212ZLE TPS51461 48
10 USB2.0 ports
INPUTS 5V_S5
Display Port 4 USB3.0 ports CardReader SD/MMC+/MS/
PCIE x 1 OUTPUTS 0D85V_S0
ETHERNET (10/100/1000Mb) MS Pro/xD 74 26
RTS5209 32
VGA
High Definition Audio
VT1312MFQX 92
USB CHARGER SATA 3G ports (4) 25MHz
Right Side: USB2.0 x 1 INPUTS 5V_PWR
USB x 1 USB x 1 107 SATA 6G ports (2)
OUTPUTS VGA_CORE
PCIE ports (8) Mini-Card
PCIE x 1,USB2.0 x 2
LPC I/F 66
USB2.0 x1 SIM Switches
CAMERA USB2.0 x 1 3G 66
49 ACPI 4.0a
INPUTS OUTPUTS
17,18,19,20,21,22,23,24,25,26 26
USB3.0 x3 Right Side: 5V_CHARGER 5V_S5
FingerPrinter69 USB2.0 x 1 USB x 3
B Switches B
HDA INPUTS OUTPUTS
SPI
Smart Card 76 USB2.0 x 1 SATA3.0 x 1 HDD
LPC Bus
1D5V_S3 1D5V_VGA_S0
56
3D3V_S0 3D3V_VGA_S0
Internal digital MIC HDA LPC debug port

Flash ROM SATA2.0 x 1 ODD
4MB+8M 60
71
56
PCB LAYER
CODEC
HP1 L1:Top L5:Power
CX20584 KBC SATA3.0 x 1 mSATA L2:GND L6:Signal
66
MIC IN 29 Fan L3:Signal L7:GND
NUVOTON 28 L4:Signal L8:Bottom
NPCE885 27 SMBus TPM/TCM
SPI
2CH SPEAKER
Thermal
Touch Int. NCT7718W
Flash ROM
60 PAD KB ENE P2793
69 69 2528
A A
<Core Design>
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Title
Block Diagram
Custom
BAD50-HC -1
5 4 3 2 1
1bios.ru
A
PCH Strapping B Rev1.5
Chief River Schematic Checklist C
Processor Strapping D
Chief River Schematic Checklist Rev1.5 E
Name Schematics Notes Pin Name Strap Description Configuration (Default value for each bit is Default
1 unless specified otherwise) Value
Reboot option at power-up
SPKR Default Mode: Internal weak Pull-down. Connect a series 1 kOhms resistor on the critical
CFG[0] CFG[0] trace in a manner which does not introduce
No Reboot Mode with TCO Disabled: If the signal is sampled high.
any stubs to CFG[0] trace.
INIT3_3V# Weak internal pull-up. This signal should not be pulled low.
PCIe Static x16 1: Normal Operation; Lane # definition matches
GNT3#/GPIO55 GNT[3:0]# functionality is not available on Mobile. CFG[2] Lane Numbering socket pin map definition 1
GNT2#/GPIO53 Used as GPIO only. Pull-up resistors are not required on these Reversal 0:Lane Reversed
4 GNT1#/GPIO51 signals. If pull-ups are used, they should be tied to the Vcc3_3 4
power rail. 1: Disabled - No Physical Display Port attached to
CFG[4] Display Port Embedded DisplayPort. 1
Integrated 1.05 V VRM Enable / Disable. Integrated 1.05 V VRMs is enabled when high. Presence strap
NOTE: This signal should always be pulled high. 0: Enabled - An external Display Port device is
INTVRMEN External 1.05 V VRM Enable / Disable. Integrated 1.05 V VRMs is enabled when Low. connectd to the EMBEDDED display Port
NOTE: This signal should be pulled down to GND through 330 kOhms resistor.
CFG[6:5] PCI-Express 00 = 1 x 8, 2 x 4 PCI Express 1
A strap for selecting DMI and FDI termination voltage. Port Bifurcation 01 = reserved
DF_TVS needs to be pulled up to VccDFTERM power rail through 2.2 kOhms ±5% resistor. Straps 10 = 2 x 8 PCI Express
DF_TVS
11 = 1 x 16 PCI Express
SATA1GP/ This Signal has a weak internal pull-up. configuration lands.
GPIO19 Note: the internal pull-up is disabled after PLTRST# deasserts. A test point may be
CFG[17:7]
This signal has a weak internal pull-down. placed
SATA2GP/ NOTE: The internal pull-down is disabled after PLTRST# deasserts. on the board for
GPIO36 NOTE: This signal should not be pulled high when strap is sampled. these lands.
This signal has a weak internal pull-down.

SATA3GP/ NOTE: The internal pull-down is disabled after PLTRST# deasserts. Voltage Rails
POWER PLANE VOLTAGE DESCRIPTION
GPIO37 NOTE: This signal should not be pulled high when strap is sampled. ACTIVE IN
5V_S0 5V
3D3V_S0 3.3V
3 HDA_SDO Weak internal pull-down. This signal has a 20k internal pull down resistor. 1D8V_S0 1.8V 3
1D5V_S0 1.5V
1D05V_VTT 1.05V
0D85V_S0 0.95 - 0.85V
HDA_SYNC On Die PLL VR is supplied by 1.5 V from VCCVRM when sampled high, 1.8 V from VCCVRM 0D75V_S0 0.75V
when sampled low. VCC_CORE 0.35V to 1.5V
S0
Needs to be pulled High for Chief River platform. VCC_GFXCORE 0.4 to 1.25V
1D8V_VGA_S0 1.8V
3D3V_VGA_S0 3.3V CPU Core Rail
1D5V_VGA_S0 1.5V Graphics Core Rail
GPIO15 This signal has a weak internal pull-down. 1D05V_VGA_S0 1.05V
NOTE：A strong pull-up may be needed for GPIO functionality.
L_DDC_DATA When '1'- LVDS is detected; When '0'- LVDS is not detected. 5V_USBX_S3 5V
1D5V_S3 1.5V S3
This signal has a weak internal pull-down DDR_VREF_S3 0.75V
SDVO_CTRLDATA
BT+ 7V-19.5V
DDPC_CTRLDATA When '1'- Port B is detected; When '0'- Port B is not detected DCBATOUT 7V-19.5V
DDPD_CTRLDATA This signal has a weak internal pull-down 5V_S5 5V
5V_CHARGER 5V All S states AC Brick Mode only
5V_AUX_S5 5V
If strap is sampled high, the Integrated Deep S4/S5 Well (DSW) On-Die VR mode is 3D3V_S5 3.3V
DSWVRMEN enabled.
If not used, 8.2-kΩ to 10-kΩ pull-up to +V3.3A power-rail.
GPIO28 3D3V_AUX_S5 3.3V
GPIO28 signal also needs to be pulled up to 3.3V_SUS with 4.7K resistor to ensure 3D3V_LAN_S5 3.3V WOL_EN Legacy WOL
proper strap setting when use as the chipset test interface.
2 2
If Intel LAN is implemented on the platform, SLP_LAN# must be used to control the 3D3V_AUX_KBC 3.3V DSW, Sx ON for supporting Deep Sleep states
GPIO29/ power to the PHY LAN. Powered by Li Coin Cell in G3
SLP_LAN# If integrated Intel LAN is not supported on the platform, GPIO29 can be used as a 3D3V_AUX_S5 3.3V G3, Sx and +V3ALW in Sx
normal GPIO.
USB Table SMBus ADDRESSES

Pair Device
PCIE Routing 0 USB port 1 I 2 C / SMBus Addresses CHIEF RIVER ORB
1 USB port 2 Device Address Bus

EC SMBus 1
2 USB port3 (usb charger) Battery 0 0x16 BAT_SCL/BAT_SDA
LANE1 X CHARGER 0x12 BAT_SCL/BAT_SDA
3 Dock PS8122(HDMI Switch) (Bottom Dock) 0x9E BAT_SCL/BAT_SDA
USB3.0 redriver PS8710 (Bottom Dock) 0x40 BAT_SCL/BAT_SDA
LANE2 Mini Card2(WWAN) SATA Table 4 X
EC SMBus 2
5 Fingerprint Battery 1 0x16 SML1_CLK/SML1_DATA
LANE3 Card Reader SATA PCH 0x96 & 0x94 SML1_CLK/SML1_DATA
6 smart card Discrete VGA Thermal 0x9C or 0x9E SML1_CLK/SML1_DATA
Pair Device PS8321 HDMI level shifter 0x96 & 0X97 SML1_CLK/SML1_DATA
LANE4 Mini Card1(WLAN) 7 X NCT7718W 0x98 or 0x99 SML1_CLK/SML1_DATA
<Core Design>
1 LANE5 X 0 HDD1 8 Mini Card2 (WWAN) EC SMBus 3 SMB2_CLK/SMB2_DATA 1
1bios.ru
NCT5605Y-0 0x30 SMB2_CLK/SMB2_DATA
1 M-SATA 9 USB port4(ESATA ),on M/B NCT5605Y-1 0x32 SMB2_CLK/SMB2_DATA Wistron Corporation
LANE6 Intel GBE LAN 2 N/A 10 3G Card PCH SMBus Taipei Hsien 221, Taiwan, R.O.C.
SO-DIMMA PCH_SMBDATA/PCH_SMBCLK
3 N/A 11 Mini Card1 (WLAN) SO-DIMMB PCH_SMBDATA/PCH_SMBCLK Title
LANE7 New Card Intel LAN 82579 PCH_SMBDATA/PCH_SMBCLK
4 ODD 12 CAMERA G-Sensor PCH_SMBDATA/PCH_SMBCLK Table of Content
MINI WWAN PCH_SMBDATA/PCH_SMBCLK Size Document Number Rev
LANE8 X 5 ESATA 13 New Card INTEL LAN82579 PCH_SMBDATA/PCH_SMBCLK A3
-1
BAD50-HC
Friday, March 02, 2012
Date: Sheet 3 of 109
5 4 3 2 1
SSID = CPU
Signal Routing Guideline:
PEG_ICOMPO keep W/S=12/15 mils and routing length less than 500 mils.
PEG_ICOMPI & PEG_RCOMPO keep W/S=4/15 mils and routing length less than 500 mils.
1D05V_VTT
CPU1A 1 OF 9
J22 PEG_IRCOMP_R R401 1 2
IVY-BRIDGE PEG_ICOMPI 24D9R2F-L-GP
19 DMI_TXN[3:0] PEG_ICOMPO J21
Note: DMI_TXN0 B27 H22
DMI_RX#0 PEG_RCOMPO
D Intel DMI supports both Lane DMI_TXN1
DMI_TXN2
B25
A25
DMI_RX#1 D
Reversal and polarity inversion DMI_RX#2 PEG_RXN[0..15] 83
DMI_TXN3 B24 K33 PEG_RXN15
but only at PCH side. This is DMI_RX#3 PEG_RX#0 PEG_RXN14
19 DMI_TXP[3:0] PEG_RX#1 M35
enabled via a soft strap. DMI_TXP0 B28 L34 PEG_RXN13
DMI_TXP1 DMI_RX0 PEG_RX#2 PEG_RXN12
B26 DMI_RX1 PEG_RX#3 J35
DMI
DMI_TXP2 A24 J32 PEG_RXN11
DMI_TXP3 DMI_RX2 PEG_RX#4 PEG_RXN10
B23 DMI_RX3 PEG_RX#5 H34
H31 PEG_RXN9
19 DMI_RXN[3:0] DMI_RXN0 PEG_RX#6 PEG_RXN8
G21 DMI_TX#0 PEG_RX#7 G33
DMI_RXN1 E22 G30 PEG_RXN7
DMI_RXN2 DMI_TX#1 PEG_RX#8 PEG_RXN6
F21 DMI_TX#2 PEG_RX#9 F35
DMI_RXN3 D21 E34 PEG_RXN5
DMI_TX#3 PEG_RX#10 PEG_RXN4
19 DMI_RXP[3:0] PEG_RX#11 E32
DMI_RXP0 G22 D33 PEG_RXN3
DMI_RXP1 DMI_TX0 PEG_RX#12 PEG_RXN2
D22 DMI_TX1 PEG_RX#13 D31
PCI EXPRESS* - GRAPHICS

DMI_RXP2 F20 B33 PEG_RXN1
DMI_RXP3 DMI_TX2 PEG_RX#14 PEG_RXN0
C21 DMI_TX3 PEG_RX#15 C32
PEG_RXP[0..15] 83
J33 PEG_RXP15
PEG_RX0 PEG_RXP14
PEG_RX1 L35
K34 PEG_RXP13
19 FDI_TXN[7:0] FDI_TXN0 PEG_RX2 PEG_RXP12
A21 FDI0_TX#0 PEG_RX3 H35
FDI_TXN1 H19 H32 PEG_RXP11
FDI_TXN2 FDI0_TX#1 PEG_RX4 PEG_RXP10
Note: E19 FDI0_TX#2 PEG_RX5 G34
FDI_TXN3 F18 G31 PEG_RXP9
Intel(R) FDI
Intel FDI supports both Lane FDI0_TX#3 PEG_RX6
FDI_TXN4 B21 F33 PEG_RXP8
Reversal and polarity inversion FDI_TXN5 C20
FDI1_TX#0 PEG_RX7
F30 PEG_RXP7
but only at PCH side. This is FDI_TXN6 FDI1_TX#1 PEG_RX8 PEG_RXP6
D18 FDI1_TX#2 PEG_RX9 E35
C enabled via a soft strap. FDI_TXN7 E17 FDI1_TX#3 PEG_RX10 E33
F32
PEG_RXP5
PEG_RXP4 NOTE.
C
PEG_RX11 PEG_RXP3
19 FDI_TXP[7:0] PEG_RX12 D34 If PEG is not implemented, the RX&TX pairs can be left as No Connect
FDI_TXP0 A22 E31 PEG_RXP2
FDI_TXP1 FDI0_TX0 PEG_RX13 PEG_RXP1
G19 FDI0_TX1 PEG_RX14 C33
FDI_TXP2 E20 B32 PEG_RXP0 PEG Static Lane Reversal
FDI_TXP3 FDI0_TX2 PEG_RX15 PEG_TXN[0..15] 83
G18 FDI0_TX3
FDI_TXP4 B20 M29 PEG_C_TXN15 C401 1DIS_PX_Muxless
2 SCD22U10V2KX-1GP PEG_TXN15
FDI_TXP5 FDI1_TX0 PEG_TX#0 PEG_C_TXN14 C402 SCD22U10V2KX-1GP PEG_TXN14
C19 FDI1_TX1 PEG_TX#1 M32 1DIS_PX_Muxless
2
FDI_TXP6 D19 M31 PEG_C_TXN13 C403 1DIS_PX_Muxless
FDI_TXP7 FDI1_TX2 PEG_TX#2 PEG_C_TXN12 C404 SCD22U10V2KX-1GP PEG_TXN12
Note: F17 FDI1_TX3 PEG_TX#3 L32 1DIS_PX_Muxless
2
Lane reversal does not apply to L29 PEG_C_TXN11 C405 1DIS_PX_Muxless
PEG_TX#4 PEG_C_TXN10 C406 SCD22U10V2KX-1GP PEG_TXN10
19 FDI_FSYNC0 J18 K31 1DIS_PX_Muxless
2
FDI sideband signals. J17
FDI0_FSYNC PEG_TX#5
K28 PEG_C_TXN9 C407 1DIS_PX_Muxless
19 FDI_FSYNC1 FDI1_FSYNC PEG_TX#6
J30 PEG_C_TXN8 C408 1DIS_PX_Muxless
19 FDI_INT H20 FDI_INT PEG_TX#8 J28 1DIS_PX_Muxless
2
H29 PEG_C_TXN6 C410 1DIS_PX_Muxless
19 FDI_LSYNC0 J19 FDI0_LSYNC PEG_TX#10 G27 1DIS_PX_Muxless
2
H17 E29 PEG_C_TXN4 C412 1DIS_PX_Muxless
19 FDI_LSYNC1 FDI1_LSYNC PEG_TX#11
F27 PEG_C_TXN3 C413 1DIS_PX_Muxless
PEG_TX#13 D28 1DIS_PX_Muxless
2
F26 PEG_C_TXN1 C415 1DIS_PX_Muxless
PEG_TX#15 E25 1DIS_PX_Muxless
2
1D05V_VTT 1 R402 2 24D9R2F-L-GP DP_COMP A18 EDP_COMPIO PEG_TXP[0..15] 83
A17 M28 PEG_C_TXP15 C417 1DIS_PX_Muxless
2 SCD22U10V2KX-1GP PEG_TXP15
eDP_HPD EDP_ICOMPO PEG_TX0 PEG_C_TXP14 C418 SCD22U10V2KX-1GP PEG_TXP14
B16 EDP_HPD PEG_TX1 M33 1DIS_PX_Muxless
2
M30 PEG_C_TXP13 C419 1DIS_PX_Muxless
PEG_TX2 PEG_C_TXP12 C420 SCD22U10V2KX-1GP PEG_TXP12
PEG_TX3 L31 1DIS_PX_Muxless
2
C15 L28 PEG_C_TXP11 C421 1DIS_PX_Muxless
103 eDP_AUXP_CPU EDP_AUX PEG_TX4
D15 K30 PEG_C_TXP10 C422 1DIS_PX_Muxless
B Signal Routing Guideline:
103 eDP_AUXN_CPU EDP_AUX#
eDP PEG_TX5
PEG_TX6 K27 PEG_C_TXP9 C423 1DIS_PX_Muxless
2 SCD22U10V2KX-1GP PEG_TXP9 B
EDP_ICOMPO keep W/S=12/15 mils and routing J29 PEG_C_TXP8 C424 1DIS_PX_Muxless
PEG_TX7 PEG_C_TXP7 C425 SCD22U10V2KX-1GP PEG_TXP7
C17 J27 1DIS_PX_Muxless
2
length less than 500 mils. 103 eDP_TXP0_CPU
F16
EDP_TX0 PEG_TX8
H28 PEG_C_TXP6 C426 1DIS_PX_Muxless
EDP_COMPIO keep W/S=4/15 mils and routing 103 eDP_TXP1_CPU EDP_TX1 PEG_TX9 PEG_C_TXP5 C427 SCD22U10V2KX-1GP PEG_TXP5
C16 EDP_TX2 PEG_TX10 G28 1DIS_PX_Muxless
2
length less than 500 mils. G15 E28 PEG_C_TXP4 C428 1DIS_PX_Muxless
EDP_TX3 PEG_TX11 PEG_C_TXP3 C429 SCD22U10V2KX-1GP PEG_TXP3
PEG_TX12 F28 1DIS_PX_Muxless
2
C18 D27 PEG_C_TXP2 C430 1DIS_PX_Muxless
103 eDP_TXN0_CPU EDP_TX#0 PEG_TX13 PEG_C_TXP1 C431 SCD22U10V2KX-1GP PEG_TXP1
103 eDP_TXN1_CPU E16 EDP_TX#1 PEG_TX14 E26 1DIS_PX_Muxless
2
D16 D25 PEG_C_TXP0 C432 1DIS_PX_Muxless
EDP_TX#2 PEG_TX15
NOTE. F15 EDP_TX#3
Processor strap CFG[4] should be pulled low to enable Embedded DisplayPort.
NOTE: 62.10055.321
全全MUX
Select a Fast FET similar to 2N7002E whose rise/
Stuff to disable internal graphics fall time is less than 6 ns. If HPD on eDP interface is 20100614 V1.1
disabled, connect it to CPU VCCIO via a 10-kΩ pull-Up
function for power saving. resistor on the motherboard.
NOTE: 1D05V_VTT
Select a Fast FET similar to 2N7002E whose rise/
FDI_LSYNC0 fall time is less than 6 ns. If HPD on eDP interface is 1209 SB
1
FDI_FSYNC0
FDI_FSYNC1
disabled, connect it to CPU VCCIO via a 10-kΩ pull-Up R403
FDI_LSYNC1 resistor on the motherboard. 10KR2J-3-GP
FDI_INT 2N7002K-2-GP
5
6
7
8
UMA_PX_EDP <Core Design>
2
RN401 G
A 103 eDP_HPD_R A
1
SRN1KJ-4-GP
1bios.ru
R404 DIS UMA_PX_EDP D eDP_HPD
Wistron Corporation
1
1KR2J-1-GPDIS
R406 S 21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
4
3
2
1
100KR2J-1-GP UMA_PX_EDP Taipei Hsien 221, Taiwan, R.O.C.

2
Q401
Title
2
84.2N702.J31
CPU (PCIE/DMI/FDI)
A3
BAD50-HC -1
Date: Thursday, March 29, 2012 Sheet 4 of 109
5 4 3 2 1
SSID = CPU CPU1B 2 OF 9

Disabling Guidelines:
If motherboard only supports external graphics:
IVY-BRIDGE Connect DPLL_REF_SSCLK on Processor to GND through
1K +/- 5% resistor.
BCLK A28 CLK_EXP_P 20 Connect DPLL_REF_SSCLK# on Processor to VCCP
MISC
CLOCKS
D 22 H_SNB_IVB# C26 PROC_SELECT# BCLK# A27 CLK_EXP_N 20 through 1K +/- 5% resistorpower (~15 mW) may beD
wasted.
JE40 modify AN34
1D05V_VTT SKTOCC# CLK_DP_N_R 2
DPLL_REF_CLK A16 CLK_DP_P_R 20 3 1D05V_VTT
CATERR# A15 CLK_DP_N_R 20 CLK_DP_P_R 1 4
H_PROCHOT# DPLL_REF_CLK#
1 2 this signal should have
DIS 66.10236.04L
R501
1
C502 an exposed test point for
JE40 modify AL33 RN502 SRN1KJ-7-GP
62R2J-GP SC47P50V2JN-3GP easy debug access. CATERR#
2
THERMAL
1 R502 2
C502: AN33 R8 4K99R2F-L-GP SM_DRAMRST# 37
22,27 H_PECI PECI SM_DRAMRST#
47pf@CRB
DDR3
MISC
43pf@CEKLT R513
27,42 H_PROCHOT# 1 2 H_PROCHOT#_R AL32 PROCHOT# SM_RCOMP0 AK1 SM_RCOMP_0 R506 1 2 140R2F-GP
56R2J-4-GP A5 SM_RCOMP_1 R507 1 2 25D5R2F-GP
SM_RCOMP1 SM_RCOMP_2 R508 1
SM_RCOMP2 A4 2 200R2F-L-GP
Connect EC to PROCHOT# through inverting OD buffer.
C 22,36 H_THERMTRIP# AN32 THERMTRIP#
Signal Routing Guideline: C
SM_RCOMP keep routing length less than 500 mils.
PROCHOT# with Two VR topology:
Requires a series-resistor of 100  ±5%
close to the processor followed by a
75  ±5% pull-up to VTT power-rail towards the VR. PRDY# AP29
PREQ# AP27
A pull up to VCCP(1.05 V) JE40 modify
hrough 300  ±5% resistor close to the IMVP 7 AR26
TCK
PWR MANAGEMENT
1D05V_VTT
JTAG & BPM

TMS AR27
AM34 AP30 XDP_TRST#
19 H_PM_SYNC PM_SYNC TRST# RN501
1 R503 2 TDI AR28 SRN51J-GP
10KR2J-3-GP AP26 XDP_TDO XDP_TDO 2 3
TDO XDP_TRST#
22,36,97 H_CPUPW RGD AP33 UNCOREPWRGOOD 1 4
AL35 XDP_DBRESET#
DBR#
19,37 PM_DRAM_PW RGD 1 DY 2 V8 SM_DRAMPWROK
R505 0R2J-2-GP
B BPM#0 AT28 B
37 VDDPW RGOOD BPM#1 AR29
BPM#2 AR30
BUF_CPU_RST# AR33 AT30
RESET# BPM#3 JE40 modify
BPM#4 AP32
BPM#5 AR31
BPM#6 AT31
BPM#7 AR32
3D3V_S0
RN503
SRN1K5J-1-GP
XDP_DBRESET# 1 8 <Core Design>
2 7
3 6 62.10055.321
4 5 BUF_CPU_RST#
18,27,31,32,36,65,66,71,75,82,83,97,105 PLT_RST#
Wistron Corporation
A PCH Reset# output Taipei Hsien 221, Taiwan, R.O.C.
A
DC levels are 0 V and 3.3 V, Title
processor Reset input CPU (THERMAL/CLOCK/PM )
DC levels are 0 V and 1.0 V. Size Document Number Rev
Custom
BAD50-HC -1
Date: Saturday, March 03, 2012 Sheet 5 of 109
5 4 3 2 1
1bios.ru
5 4 3 2 1
SSID = CPU
CPU1C 3 OF 9 CPU1D 4 OF 9
IVY-BRIDGE IVY-BRIDGE
SA_CK0 AB6 M_A_DIM0_CLK_DDR0 14 SB_CK0 AE2 M_B_DIM0_CLK_DDR0 15
M_A_DQ[63:0] AA6 M_B_DQ[63:0] AD2
14 M_A_DQ[63:0] SA_CLK#0 M_A_DIM0_CLK_DDR#0 14 15 M_B_DQ[63:0] SB_CLK#0 M_B_DIM0_CLK_DDR#0 15
D M_A_DQ0 C5 V9 M_B_DQ0 C9 R9 D
M_A_DQ1 SA_DQ0 SA_CKE0 M_A_DIM0_CKE0 14 M_B_DQ1 SB_DQ0 SB_CKE0 M_B_DIM0_CKE0 15
D5 SA_DQ1 A7 SB_DQ1
M_A_DQ2 D3 M_B_DQ2 D10
M_A_DQ3 SA_DQ2 M_B_DQ3 SB_DQ2
D2 SA_DQ3 C8 SB_DQ3
M_A_DQ4 D6 AA5 M_B_DQ4 A9 AE1
M_A_DQ5 SA_DQ4 SA_CK1 M_A_DIM0_CLK_DDR1 14 M_B_DQ5 SB_DQ4 SB_CK1 M_B_DIM0_CLK_DDR1 15
C6 SA_DQ5 SA_CLK#1 AB5 M_A_DIM0_CLK_DDR#1 14 A8 SB_DQ5 SB_CLK#1 AD1 M_B_DIM0_CLK_DDR#1 15
M_A_DQ6 C2 V10 M_B_DQ6 D9 R10
M_A_DQ7 SA_DQ6 SA_CKE1 M_A_DIM0_CKE1 14 M_B_DQ7 SB_DQ6 SB_CKE1 M_B_DIM0_CKE1 15
C3 SA_DQ7 D8 SB_DQ7
M_A_DQ8 F10 M_B_DQ8 G4
F8 SA_DQ9 F4 SB_DQ9
M_A_DQ10 G10 AB4 M_B_DQ10 F1 AB2
M_A_DQ11 SA_DQ10 SA_CK2 M_B_DQ11 SB_DQ10 SB_CK2
G9 SA_DQ11 SA_CLK#2 AA4 G1 SB_DQ11 SB_CLK#2 AA2
M_A_DQ12 F9 W9 M_B_DQ12 G5 T9
M_A_DQ13 SA_DQ12 SA_CKE2 M_B_DQ13 SB_DQ12 SB_CKE2
F7 SA_DQ13 F5 SB_DQ13
M_A_DQ14 G8 M_B_DQ14 F2
G7 SA_DQ15 G2 SB_DQ15
M_A_DQ16 K4 AB3 M_B_DQ16 J7 AA1
M_A_DQ17 SA_DQ16 SA_CK3 M_B_DQ17 SB_DQ16 SB_CK3
K5 SA_DQ17 SA_CLK#3 AA3 J8 SB_DQ17 SB_CLK#3 AB1
M_A_DQ18 K1 W10 M_B_DQ18 K10 T10
M_A_DQ19 SA_DQ18 SA_CKE3 M_B_DQ19 SB_DQ18 SB_CKE3
J1 SA_DQ19 K9 SB_DQ19
M_A_DQ20 J5 M_B_DQ20 J9
J4 SA_DQ21 J10 SB_DQ21
M_A_DQ22 J2 AK3 M_B_DQ22 K8 AD3
M_A_DQ23 SA_DQ22 SA_CS#0 M_A_DIM0_CS#0 14 M_B_DQ23 SB_DQ22 SB_CS#0 M_B_DIM0_CS#0 15
K2 SA_DQ23 SA_CS#1 AL3 M_A_DIM0_CS#1 14 K7 SB_DQ23 SB_CS#1 AE3 M_B_DIM0_CS#1 15
M_A_DQ24 M8 AG1 M_B_DQ24 M5 AD6
M_A_DQ25 SA_DQ24 SA_CS#2 M_B_DQ25 SB_DQ24 SB_CS#2
N10 SA_DQ25 SA_CS#3 AH1 N4 SB_DQ25 SB_CS#3 AE6
M_A_DQ26 N8 M_B_DQ26 N2
N7 SA_DQ27 N1 SB_DQ27
M_A_DQ28 M10 M_B_DQ28 M4
C M_A_DQ29 SA_DQ28 M_B_DQ29 SB_DQ28 C
M9 SA_DQ29 SA_ODT0 AH3 M_A_DIM0_ODT0 14 N5 SB_DQ29 SB_ODT0 AE4 M_B_DIM0_ODT0 15
DDR SYSTEM MEMORY B

M_A_DQ30 N9 AG3 M_B_DQ30 M2 AD4
DDR SYSTEM MEMORY A

M_A_DQ31 SA_DQ30 SA_ODT1 M_A_DIM0_ODT1 14 M_B_DQ31 SB_DQ30 SB_ODT1 M_B_DIM0_ODT1 15
M7 SA_DQ31 SA_ODT2 AG2 M1 SB_DQ31 SB_ODT2 AD5
M_A_DQ32 AG6 AH2 M_B_DQ32 AM5 AE5
M_A_DQ33 SA_DQ32 SA_ODT3 M_B_DQ33 SB_DQ32 SB_ODT3
AG5 SA_DQ33 AM6 SB_DQ33
M_A_DQ34 AK6 M_B_DQ34 AR3
AK5 SA_DQ35 AP3 SB_DQ35
M_A_DQ36 AH5 M_A_DQS#[7:0] 14 M_B_DQ36 AN3 M_B_DQS#[7:0] 15
M_A_DQ37 SA_DQ36 M_A_DQS#0 M_B_DQ37 SB_DQ36 M_B_DQS#0
AH6 SA_DQ37 SA_DQS#0 C4 AN2 SB_DQ37 SB_DQS#0 D7
M_A_DQ38 AJ5 G6 M_A_DQS#1 M_B_DQ38 AN1 F3 M_B_DQS#1
M_A_DQ39 SA_DQ38 SA_DQS#1 M_A_DQS#2 M_B_DQ39 SB_DQ38 SB_DQS#1 M_B_DQS#2
AJ6 SA_DQ39 SA_DQS#2 J3 AP2 SB_DQ39 SB_DQS#2 K6
M_A_DQ40 AJ8 M6 M_A_DQS#3 M_B_DQ40 AP5 N3 M_B_DQS#3
AK8 SA_DQ41 SA_DQS#4 AL6 AN9 SB_DQ41 SB_DQS#4 AN5
M_A_DQ42 AJ9 AM8 M_A_DQS#5 M_B_DQ42 AT5 AP9 M_B_DQS#5
AK9 SA_DQ43 SA_DQS#6 AR12 AT6 SB_DQ43 SB_DQS#6 AK12
M_A_DQ44 AH8 AM15 M_A_DQS#7 M_B_DQ44 AP6 AP15 M_B_DQS#7
M_A_DQ45 SA_DQ44 SA_DQS#7 M_B_DQ45 SB_DQ44 SB_DQS#7
AH9 SA_DQ45 AN8 SB_DQ45
M_A_DQ46 AL9 M_B_DQ46 AR6
AL8 SA_DQ47 AR5 SB_DQ47
M_A_DQ48 AP11 M_A_DQS[7:0] 14 M_B_DQ48 AR9 M_B_DQS[7:0] 15
M_A_DQ49 SA_DQ48 M_A_DQS0 M_B_DQ49 SB_DQ48 M_B_DQS0
AN11 SA_DQ49 SA_DQS0 D4 AJ11 SB_DQ49 SB_DQS0 C7
M_A_DQ50 AL12 F6 M_A_DQS1 M_B_DQ50 AT8 G3 M_B_DQS1
M_A_DQ51 SA_DQ50 SA_DQS1 M_A_DQS2 M_B_DQ51 SB_DQ50 SB_DQS1 M_B_DQS2
AM12 SA_DQ51 SA_DQS2 K3 AT9 SB_DQ51 SB_DQS2 J6
M_A_DQ52 AM11 N6 M_A_DQS3 M_B_DQ52 AH11 M3 M_B_DQS3
AL11 SA_DQ53 SA_DQS4 AL5 AR8 SB_DQ53 SB_DQS4 AN6
M_A_DQ54 AP12 AM9 M_A_DQS5 M_B_DQ54 AJ12 AP8 M_B_DQS5
AN12 SA_DQ55 SA_DQS6 AR11 AH12 SB_DQ55 SB_DQS6 AK11
M_A_DQ56 AJ14 AM14 M_A_DQS7 M_B_DQ56 AT11 AP14 M_B_DQS7
M_A_DQ57 SA_DQ56 SA_DQS7 M_B_DQ57 SB_DQ56 SB_DQS7
AH14 SA_DQ57 AN14 SB_DQ57
B M_A_DQ58 M_B_DQ58 B
AL15 SA_DQ58 AR14 SB_DQ58
M_A_DQ59 AK15 M_B_DQ59 AT14
AL14 SA_DQ60 M_A_A[15:0] 14 AT12 SB_DQ60 M_B_A[15:0] 15
M_A_DQ61 AK14 AD10 M_A_A0 M_B_DQ61 AN15 AA8 M_B_A0
M_A_DQ62 SA_DQ61 SA_MA0 M_A_A1 M_B_DQ62 SB_DQ61 SB_MA0 M_B_A1
AJ15 SA_DQ62 SA_MA1 W1 AR15 SB_DQ62 SB_MA1 T7
M_A_DQ63 AH15 W2 M_A_A2 M_B_DQ63 AT15 R7 M_B_A2
SA_DQ63 SA_MA2 M_A_A3 SB_DQ63 SB_MA2 M_B_A3
SA_MA3 W7 SB_MA3 T6
V3 M_A_A4 T2 M_B_A4
SA_MA4 M_A_A5 SB_MA4 M_B_A5
SA_MA5 V2 SB_MA5 T4
W3 M_A_A6 T3 M_B_A6
14 M_A_BS0 AE10 SA_BS0 SA_MA7 W6 15 M_B_BS0 AA9 SB_BS0 SB_MA7 R2
14 M_A_BS1 AF10 V1 M_A_A8 15 M_B_BS1 AA7 T5 M_B_A8
SA_BS1 SA_MA8 M_A_A9 SB_BS1 SB_MA8 M_B_A9
14 M_A_BS2 V6 SA_BS2 SA_MA9 W5 15 M_B_BS2 R6 SB_BS2 SB_MA9 R3
AD8 M_A_A10 AB7 M_B_A10
SA_MA11 V4 SB_MA11 R1
W4 M_A_A12 T1 M_B_A12
14 M_A_CAS# AE8 SA_CAS# SA_MA13 AF8 15 M_B_CAS# AA10 SB_CAS# SB_MA13 AB10
14 M_A_RAS# AD9 V5 M_A_A14 15 M_B_RAS# AB8 R5 M_B_A14
SA_RAS# SA_MA14 M_A_A15 SB_RAS# SB_MA14 M_B_A15
14 M_A_W E# AF9 SA_WE# SA_MA15 V7 15 M_B_W E# AB9 SB_WE# SB_MA15 R4
62.10055.321 62.10055.321
A <Core Design> A
1bios.ru
Wistron Corporation
Title
CPU (DDR)
A3
BAD50-HC -1
5 4 3 2 1
5 4 3 2 1
CFG2 CFG4
1
DIS_PX_Muxless UMA_PX_EDP
R703
R702 1KR2J-1-GP
SSID = CPU 1KR2J-1-GP
2
CPU1E 5 OF 9
D IVY-BRIDGE D
VCC_DIE_SENSE AH27
TPAD14-OP-GP
TP701
T P701 1 CFG0 AK28 AH26
TPAD14-OP-GP
TP702
T P702 CFG1 CFG0 VSS_DIE_SENSE
1 AK29 CFG1
PEG Static Lane Reversal CFG2 AL26
TPAD14-OP-GP
TP703
T P703 CFG3 CFG2
1 AL27 CFG3
1: Normal Operation; Lane # CFG4 AK26 L7
CFG5 CFG4 RSVD#L7
CFG2 definition matches socket pin map definition 9/22 AL29 CFG5 RSVD#AG7 AG7
CFG6 AL30 AE7
CFG6 RSVD#AE7
0:Lane Reversed CFG7 AM31 CFG7 RSVD#AK2 AK2
AM32 CFG8
CFG
AM30 CFG9 RSVD#W8 W8
AM28 CFG10
AM26 CFG11
AN28 CFG12 RSVD#AT26 AT26
AN31 CFG13 RSVD#AM33 AM33
AN26 CFG14 RSVD#AJ27 AJ27
AM27 CFG15
AK31 CFG16
PCIE Port Bifurcation Straps AN29 CFG17
CFG[6:5] 11: x16 - Device 1 functions 1 and 2 disabled RSVD#T8 T8

RSVD#J16 J16
10: x8, x8 - Device 1 function 1 enabled ; function 2 disabled AJ31 VAXG_VAL_SENSE RSVD#H16 H16
01: Reserved - (Device 1 function 1 disabled ; function 2 enabled) AH31 G16
00: x8,x4,x4 - Device 1 functions 1 and 2 enabled VSSAXG_VAL_SENSE RSVD#G16
AJ33 VCC_VAL_SENSE
AH33 VSS_VAL_SENSE
C C
AJ26 RSVD#AJ26 RSVD_NCTF#AR35 AR35
RESERVED
RSVD_NCTF#AT34 AT34
PEG DEFER TRAINING RSVD_NCTF#AT33 AT33
RSVD_NCTF#AP35 AP35
1: PEG Train immediately following xxRESETB de assertion RSVD_NCTF#AR34 AR34
CFG7
0: PEG Wait for BIOS for training
F25 RSVD#F25
F24 RSVD#F24
F23 RSVD#F23
SA D24 RSVD#D24 RSVD_NCTF#B34 B34
CFG5 CFG6 CFG7 G25 A33
RSVD#G25 RSVD_NCTF#A33
G24 RSVD#G24 RSVD_NCTF#A34 A34
1
E23 RSVD#E23 RSVD_NCTF#B35 B35

1
R704 1 D23 RSVD#D23 RSVD_NCTF#C35 C35

DY 1KR2J-1-GP R705 R706 C30
1KR2J-1-GP 1KR2J-1-GP RSVD#C30
DY DY A31 RSVD#A31
B30
2
RSVD#B30
B29
2
RSVD#B29
D30 RSVD#D30 RSVD#AJ32 AJ32
B31 RSVD#B31 RSVD#AK32 AK32
A30 RSVD#A30
C29 RSVD#C29
BCLK_ITP AN35
J20 RSVD#J20 BCLK_ITP# AM35
B18 RSVD#B18
B B
J15 RSVD#J15 RSVD_NCTF#AT2 AT2

RSVD_NCTF#AT1 AT1
RSVD_NCTF#AR1 AR1
62.10055.321
A <Core Design> A
1bios.ru
Wistron Corporation
Title
CPU (RESERVED)
A3
BAD50-HC -1
5 4 3 2 1
5 4 3 2 1
SSID = CPU
CPU1F POWER 6 OF 9
VCCIO Output Decoupling Recommendation:
IVY-BRIDGE
2 x 330 uF (3 x 330 uF for 2012 capable designs)
PROCESSOR CORE POWER 5 x 22 uF & 5 x 0805 no-stuff at Bottom
VCC_CORE 7 x 22 uF & 2 x 0805 no-stuff at Top
VCC_CORE 53A 1D05V_VTT
AG35 VCC1
AG34 VCC2 VCCIO1 AH13
D AG33 VCC3 VCCIO2 AH10 D
C805
C806
C807
C809
C810
C838
C839
C840
C841
SC10U6D3V3MX-GP
SC10U6D3V3MX-GP
SC10U6D3V3MX-GP
SC10U6D3V3MX-GP
SC10U6D3V3MX-GP
SC10U6D3V3MX-GP
SC10U6D3V3MX-GP
SC10U6D3V3MX-GP
SC10U6D3V3MX-GP
AG32 VCC4 VCCIO3 AG10
1
C801
C802
C803
C804
C811
SC10U6D3V3MX-GP
SC10U6D3V3MX-GP
SC10U6D3V3MX-GP
SC10U6D3V3MX-GP
SC10U6D3V3MX-GP
AG31 VCC5 VCCIO4 AC10
1
1
AG30 VCC6 VCCIO5 Y10
AG29 U10
2
VCC7 VCCIO6
AG28 P10
2
2
VCC8 VCCIO7
AG27 VCC9 VCCIO8 L10
AG26 VCC10 VCCIO9 J14
AF35 VCC11 VCCIO10 J13
AF32 VCC14 VCCIO13 H14
AF29 VCC17 VCCIO16 G14
C820
C819
C818
C817
C815
SC10U6D3V3MX-GP
SC10U6D3V3MX-GP
SC10U6D3V3MX-GP
SC10U6D3V3MX-GP
SC10U6D3V3MX-GP
AF28 VCC18 VCCIO17 G13 No-stuff sites outside the socket may be removed.
1
PEG AND DDR

AF27 G12
AF26
VCC19 VCCIO18
F14
No-stuff sites inside the socket cavity need to remain.
VCC20 VCCIO19
AD35 F13
2
2 VCC21 VCCIO20
AD34 VCC22 VCCIO21 F12
AD33 VCC23 VCCIO22 F11
AD32 VCC24 VCCIO23 E14
AD31 E12 1D05V_VTT
VCC25 VCCIO24
AD30 VCC26
AD29 VCC27 VCCIO25 E11
AD28 VCC28 VCCIO26 D14
C816
C821
C822
C823
C824
C825
C827
C812
C813
C814
C829
C830
C843
C844
C845
SC10U6D3V3MX-GP
SC10U6D3V3MX-GP
SC10U6D3V3MX-GP
SC10U6D3V3MX-GP
SC10U6D3V3MX-GP
SC10U6D3V3MX-GP
SC10U6D3V3MX-GP
SC10U6D3V3MX-GP
SC10U6D3V3MX-GP
SC10U6D3V3MX-GP
SC10U6D3V3MX-GP
SC10U6D3V3MX-GP
SC10U6D3V3MX-GP
SC10U6D3V3MX-GP
SC10U6D3V3MX-GP
1
1
AC35 VCC31 VCCIO29 D11
AC34 C14
2
2
VCC32 VCCIO30
AC33 VCC33 VCCIO31 C13
C AC32 VCC34 VCCIO32 C12 C
AC31 VCC35 VCCIO33 C11
AC30 VCC36 VCCIO34 B14
AC29 VCC37 VCCIO35 B12
AC28 VCC38 VCCIO36 A14
AA35 VCC41 VCCIO39 A11
C837
C836
C835
C834
C833
C832
C831
C828
SC10U6D3V3MX-GP
SC10U6D3V3MX-GP
SC10U6D3V3MX-GP
SC10U6D3V3MX-GP
SC10U6D3V3MX-GP
SC10U6D3V3MX-GP
SC10U6D3V3MX-GP
SC10U6D3V3MX-GP
AA34 VCC42
1
AA33 VCC43 VCCIO40 J23

AA32 VCC44
AA31
2
VCC45
AA30 VCC46
AA29 VCC47
AA28 VCC48
AA27 VCC49
AA26 1D05V_VTT
VCC50
CORE SUPPLY
Y35
Y34
VCC51
VCC52
close to CPU
Y33 VCC53
Y32 H_CPU_SVIDDAT R804 1 2 130R2F-1-GP
VCC54
Y31 VCC55
Y30 VCC56
Y29 VCC57
Y28 VCC58
Y27 VCC59
Y26 VCC60 PR4201 PU
V35 VCC61
SVID
V34 AJ29 H_CPU_SVIDALRT# R803 1 2 43R2J-GP
VCC62 VIDALERT# VR_SVID_ALERT# 42
V33 VCC63 VIDSCLK AJ30 H_CPU_SVIDCLK 42
V32 VCC64 VIDSOUT AJ28 H_CPU_SVIDDAT 42
B V31 VCC65 B
V30 VCC66
V29 VCC67
V28 VCC68
V27 VCC69
V26 VCC70
U35 VCC71
U34 VCC72
U33 VCC73
U32 VCC74
U31 VCC75
U30 VCC76
U29 VCC77
U28 VCC78
U27 VCC79
U26 VCC80
R35 VCC_CORE
VCC81
R34 VCC82
R33 VCC83 R801,R802 close to CPU
1
R32 VCC84
R31 R801
VCC85 100R2F-L1-GP-U
R30 VCC86
R29 VCC87
SENSE LINES
R28
2
VCC88
R27 VCC89 VCC_SENSE AJ35 VCCSENSE 42
R26 VCC90 VSS_SENSE AJ34 VSSSENSE 42
P35 VCC91
1
P34 VCC92
P33 R802
VCC93 100R2F-L1-GP-U
P32 VCC94 VCCIO_SENSE B10 VCCIO_SENSE 45
P31 VCC95 VSS_SENSE_VCCIO A10 VSSIO_SENSE 45
A P30 <Core Design> A
2
VCC96
P29 VCC97
P28 VCC98
1bios.ru
P27
P26
VCC99
VCC100
Wistron Corporation
VCC Output Decoupling Recommendation: 21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
4 x 470 uF at Bottom Socket Edge Taipei Hsien 221, Taiwan, R.O.C.
8 x 22 uF at Top Socket Cavity Title
8 x 22 uF at Top Socket Edge
8 x 22 uF at Bottom Socket Cavity CPU (VCC_CORE)
Custom
BAD50-HC -1
62.10055.321
5 4 3 2 1
5 4 3 2 1
VAXG Output Decoupling Recommendation: R906,R907 close to CPU

SSID = CPU 2 x 470 uF at Bottom Socket Edge
2 x 22 uF at Top Socket Cavity
VCC_GFXCORE
4 x 22 uF at Top Socket Edge
1
2 x 22 uF at Bottom Socket Cavity
R906
4 x 22 uF at Bottom Socket Edge
VCC_GFXCORE
CPU1G
POWER 7 OF 9
100R2F-L1-GP-U
UMA_PX_Muxless
2
VCC_AXG_SENSE
VSS_AXG_SENSE
SENSE
LINES
AT24 IVY-BRIDGE AK35
VAXG1 VAXG_SENSE VCC_AXG_SENSE 42
1
AT23 AK34 VSS_AXG_SENSE 42
D VAXG2 VSSAXG_SENSE R907 D
AT21 VAXG3
1
C901 C902 C903 C904 C905 C906 AT20 Refer to the latest Huron River Mainstream PDG 100R2F-L1-GP-U
VAXG4
SC10U6D3V3MX-GP
SC10U6D3V3MX-GP
SC10U6D3V3MX-GP
SC10U6D3V3MX-GP
SC10U6D3V3MX-GP
SC10U6D3V3MX-GP
AT18 VAXG5 (Doc# 436735) for more details on S3 power
AT17 UMA_PX_Muxless
2
VAXG6 reduction implementation.
AR24 VAXG7
AR23 VAXG8
UMA_PX_Muxless
UMA_PX_Muxless
UMA_PX_Muxless
UMA_PX_Muxless
UMA_PX_Muxless
UMA_PX_Muxless AR21 VAXG9 +V_SM_VREF_CNT should have 10 mil trace width
AR20 VAXG10
AR18 AL1
VAXG11 SM_VREF +V_SM_VREF_CNT 37
AR17
VREF
VAXG12
AP24
VAXG13
AP23 VAXG14
AP21
VAXG15
AP20 B4 M_VREF_DQ_DIMM0_C 37
VAXG16 SA_DIMM_VREFDQ
AP18 D1 M_VREF_DQ_DIMM1_C 37
VAXG17 SB_DIMM_VREFDQ
AP17
VAXG18
1
1
C907 C908 C921 C918 C919 C920 AN24
VAXG19
SC10U6D3V3MX-GP
SC10U6D3V3MX-GP
SC10U6D3V3MX-GP
SC10U6D3V3MX-GP
SC10U6D3V3MX-GP
SC10U6D3V3MX-GP
AN23
VAXG20 Chief River
3
4
AN21 1D5V_S0
2
2
VAXG21
AN20
VAXG22
DDR3 -1.5V RAILS

AN18 VAXG23 DY RN902
UMA_PX_Muxless
UMA_PX_Muxless
UMA_PX_Muxless
UMA_PX_Muxless
UMA_PX_Muxless
UMA_PX_Muxless AN17 PROCESSOR VDDQ: 10A SRN1KJ-7-GP
VAXG24
GRAPHICS
AM24
VAXG25 VDDQ1
AF7 1228 SB
AM23 AF4
2
1
VAXG26 VDDQ2
AM21 AF1
VAXG27 VDDQ3
1
AM20 AC7 C909 C910 C911 C912 C913 C914
VAXG28 VDDQ4
SC10U6D3V3MX-GP
SC10U6D3V3MX-GP
SC10U6D3V3MX-GP
SC10U6D3V3MX-GP
SC10U6D3V3MX-GP
SC10U6D3V3MX-GP
AM18 VAXG29 VDDQ5 AC4 9/20
AM17 AC1 DY 0805-->0603
2
VAXG30 VDDQ6
AL24 VAXG31 VDDQ7 Y7
AL23 Y4
VAXG32 VDDQ8
AL21 Y1
VAXG33 VDDQ9
AL20 VAXG34 VDDQ10 U7
AL18 U4
VAXG35 VDDQ11
C
AL17 VAXG36 VDDQ12 U1 VDDQ Output Decoupling Recommendation: C
AK24 P7 1 x 330 uF
VAXG37 VDDQ13
AK23 P4
AK21
VAXG38 VDDQ14
P1 0D85V_S0 6 x 10 uF
VAXG39 VDDQ15
AK20
VAXG40
AK18
VAXG41 PROCESSOR VCCSA: 6A
AK17
VAXG42
AJ24
VAXG43
AJ23
VAXG44
1
AJ21 C916 C915
VAXG45
SC10U6D3V3MX-GP
SC10U6D3V3MX-GP
AJ20
VAXG46 DY VCCSA Output Decoupling Recommendation:
AJ18 1 x 330 uF
2
VAXG47
AJ17 M27
SA RAIL
AH24
VAXG48 VCCSA1
M26
2 x 10 uF at Bottom Socket Cavity 1D05V_VTT 1D05V_VTT
VAXG49 VCCSA2 1 x 10 uF at Bottom Socket Edge
AH23 L26
VAXG50 VCCSA3
AH21 J26
VAXG51 VCCSA4
AH20 J25
VAXG52 VCCSA5
2
AH18 J24
VAXG53 VCCSA6 R908 R912
AH17
VAXG54 VCCSA7
H26 DY
DY
10KR2J-3-GP
VCCSA8 H25 10KR2J-3-GP
1
R902 R902 need be close to pin H23.
1
100R2F-L1-GP-U VCCSA_VID0 VCCSA_VID0 48
VCCSA_VID1 VCCSA_VID1 48
1.8V RAIL
2
H23 VCCSA_SENSE VCCSA_SENSE 48
1D8V_S0 VCCSA_SENSE R913 R914
3D3V_S5
PROCESSOR VCCPLL: 1.2A
10KR2J-3-GP
10KR2J-3-GP
B6
MISC
VCCPLL1
1
SC1U10V2KX-1GP
A6 C22 VCCSA_VID0 R911
1
VCCPLL2 VCCSA_VID0
C922
A2 C24 VCCSA_VID1
VCCPLL3 VCCSA_VID1
1
100KR2J-1-GP
9/19
DY
Disabling Guidelines for External Graphics Designs: DEL IVB
Can connect to GND if motherboard only supports external
2
2
A19 H_SNB_IVB#_PWRCTRL
B graphics and if GFX VR is not stuffed. VCCIO_SEL B
Can be left floating (Gfx VR keeps VAXG rail from floating)
if the VR is stuffed
PIn A19
62.10055.321
1.05V H
VCCPLL Output Decoupling Recommendation: 1V L
1 x 330 uF
2 x 1 uF
1 x 10 uF
VCC_GFXCORE
2
R901
R903 R904 R905
0R3J-0-U-GP 0R3J-0-U-GP 0R3J-0-U-GP 0R3J-0-U-GP
DIS DIS DIS DIS
1
A A
1bios.ru
<Core Design>
Wistron Corporation
Title
CPU (VCC_GFXCORE)
Custom
BAD50-HC -1
5 4 3 2 1
5 4 3 2 1
SSID = CPU
CPU1H 8 OF 9 CPU1I 9 OF 9
AT35 VSS1 VSS81 AJ22

AT32 VSS2 VSS82 AJ19
AT29 IVY-BRIDGE AJ16 T35 IVY-BRIDGE F22
VSS3 VSS83 VSS161 VSS234
D AT27 VSS4 VSS84 AJ13 T34 VSS162 VSS235 F19 D
AT25 VSS5 VSS85 AJ10 T33 VSS163 VSS236 E30
AT7 VSS11 VSS91 AH35 T27 VSS169 VSS242 E13
AT4 VSS12 VSS92 AH34 T26 VSS170 VSS243 E10
AT3 VSS13 VSS93 AH32 P9 VSS171 VSS244 E9
AR25 VSS14 VSS94 AH30 P8 VSS172 VSS245 E8
AR10 VSS19 VSS100 AH19 N35 VSS177 VSS250 E3
AR2 VSS22 VSS103 AH4 N32 VSS180 VSS253 D35
AP34 VSS23 VSS104 AG9 N31 VSS181 VSS254 D32
AP25 VSS26 VSS107 AF6 N28 VSS184 VSS257 D20
AP22 VSS27 VSS108 AF5 N27 VSS185 VSS258 D17
AP19 VSS28 VSS109 AF3 N26 VSS186 VSS259 C34
AP16 VSS29 VSS110 AF2 M34 VSS187 VSS260 C31
AP13 VSS30 VSS111 AE35 L33 VSS188 VSS261 C28
C AP4 AE32 L9 C23 C
AN30 VSS35 VSS116 AE30 L6 VSS193 VSS266 C1
AN27 VSS36 VSS117 AE29 L5 VSS194 VSS267 B22
AN25 AE28 L4 B19
AN22
AN19
VSS37
VSS38
VSS39
VSS VSS118
VSS119
VSS120
AE27
AE26
L3
L2
VSS195
VSS196
VSS197
VSS VSS268
VSS269
VSS270
B17
B15
AN16 VSS40 VSS121 AE9 L1 VSS198 VSS271 B13
AN13 VSS41 VSS122 AD7 K35 VSS199 VSS272 B11
AN10 VSS42 VSS123 AC9 K32 VSS200 VSS273 B9
AM29 VSS45 VSS126 AC5 J34 VSS203 VSS276 B5
AM25 VSS46 VSS127 AC3 J31 VSS204 VSS277 B3
AM22 VSS47 VSS128 AC2 H33 VSS205 VSS278 B2
AM19 VSS48 VSS129 AB35 H30 VSS206 VSS279 A35
AM2 VSS55 VSS136 AB28 H10 VSS213
AM1 VSS56 VSS137 AB27 H9 VSS214
AL34 VSS57 VSS138 AB26 H8 VSS215
AL31 VSS58 VSS139 Y9 H7 VSS216
B B
AL13 VSS64 VSS145 W35 H1 VSS222
AL10 VSS65 VSS146 W34 G35 VSS223
AK33 VSS69 VSS150 W30 G23 VSS227
AK22 VSS73 VSS154 W26 F34 VSS231
AK19 VSS74 VSS155 U9 F31 VSS232
AK16 VSS75 VSS156 U8 F29 VSS233
AK13 VSS76 VSS157 U6
AK10 VSS77 VSS158 U5
AK7 VSS78 VSS159 U3
AK4 VSS79 VSS160 U2
AJ25 VSS80
62.10055.321 62.10055.321
A <Core Design> A
1bios.ru
Wistron Corporation
Title
CPU (VSS)
A3
BAD50-HC -1
5 4 3 2 1
5 4 3 2 1
D D
C C
JE40 delete XDP function
B B
A <Core Design> A
1bios.ru
Wistron Corporation
Title
XDP
A3
BAD50-HC -1
5 4 3 2 1
5 4 3 2 1
D D
C C
(Blanking)
B B
<Core Design>
A
Wistron Corporation A
1bios.ru
Title
Reserved
A4
BAD50-HC -1
5 4 3 2 1
5 4 3 2 1
D D
C C
(Blanking)
B B
<Core Design>
A
1bios.ru
Title
Reserved
A4
BAD50-HC -1
5 4 3 2 1
5 4 3 2 1
DM1
SSID = MEMORY M_A_A0 98
A0 NP1
NP1
M_A_A1 97 NP2
M_A_A2 A1 NP2
M_A_A[15:0] 6 96
M_A_A3 A2
95 110 M_A_RAS# 6
M_A_A4 A3 RAS#
92 113 M_A_WE# 6
M_A_A5 A4 WE#
91 115 M_A_CAS# 6
M_A_A6 A5 CAS#
M_A_A7
90
A6 Note:
86 114 M_A_DIM0_CS#0 6
D M_A_A8 A7 CS0# If SA0 DIM0 = 0, SA1_DIM0 = 0 D
89 A8 CS1# 121 M_A_DIM0_CS#1 6
M_A_A9 85
M_A_A10 A9 SO-DIMMA SPD Address is 0xA0
107 A10/AP CKE0 73 M_A_DIM0_CKE0 6
M_A_A11 84 A11 CKE1 74 M_A_DIM0_CKE1 6 SO-DIMMA TS Address is 0x30
M_A_A12 83
M_A_A13 A12
119 A13 CK0 101 M_A_DIM0_CLK_DDR0 6
M_A_A14 80 A14 CK0# 103 M_A_DIM0_CLK_DDR#0 6 If SA0 DIM0 = 1, SA1_DIM0 = 0
M_A_A15 78
79
A15
102 SO-DIMMA SPD Address is 0xA2
6 M_A_BS2 A16/BA2 CK1 M_A_DIM0_CLK_DDR1 6
CK1#
104 M_A_DIM0_CLK_DDR#1 6 SO-DIMMA TS Address is 0x32
109
6 M_A_BS0 BA0
6 M_A_BS1 108 BA1 DM0 11
6 M_A_DQ[63:0] 28
M_A_DQ0 DM1
5 46
M_A_DQ1 DQ0 DM2
7 63
M_A_DQ2 DQ1 DM3
15 136
M_A_DQ3 DQ2 DM4
17 153
M_A_DQ4 DQ3 DM5
4 170
M_A_DQ5 DQ4 DM6
6 DQ5 DM7 187
M_A_DQ6 16
M_A_DQ7 DQ6
18 DQ7 SDA 200 PCH_SMBDATA 15,20,66,79
M_A_DQ8 21 202
M_A_DQ9 23
DQ8
DQ9
SCL PCH_SMBCLK 15,20,66,79
3D3V_S0
Thermal EVENT
M_A_DQ10 33 198 TS#_DIMM0_1 15
M_A_DQ11 DQ10 EVENT# 3D3V_S0
35
M_A_DQ12 DQ11
22 199
M_A_DQ13 DQ12 VDDSPD TS#_DIMM0_1
24 DQ13 1R1403 2
M_A_DQ14 34 197 10KR2J-3-GP
DQ14 SA0
1
M_A_DQ15 36 201 C1401
M_A_DQ16 DQ15 SA1
39
DQ16
SCD1U10V2KX-5GP
M_A_DQ17 41 77
2
M_A_DQ18 DQ17 NC#77
51 DQ18 NC#122 122
M_A_DQ19 53 125 1D5V_S3
DDR_VREF_S3 M_A_DQ20 DQ19 NC#125/TEST
40 DQ20
C M_A_DQ21 C
42 75
9/19 M_A_DQ22 DQ21 VDD
50 76
DEL IVB add M1 M_A_DQ23 DQ22 VDD
52 81
M_VREF_DQ_DIMM0 M_A_DQ24 DQ23 VDD
57 82
M_A_DQ25 DQ24 VDD
59 87
M_A_DQ26 DQ25 VDD
67 88
M_A_DQ27 DQ26 VDD
M1 DY 1228 SB 69
DQ27 VDD
93
2 1 2 1 M_A_DQ28 56 94
R1404 R1405 DDR_WR_VREF01_B4 37 M_A_DQ29 DQ28 VDD 1D5V_S3
58 99
0R3J-0-U-GP 0R3J-0-U-GP M_A_DQ30 DQ29 VDD
M_A_DQ31
68
DQ30 VDD
100 SODIMM A DECOUPLING
70 DQ31 VDD 105
1
Tracew should be at least 20 mils wide M_A_DQ32 129 106

C1411 C1413 M_A_DQ33 DQ32 VDD
131 111
DQ33 VDD
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
M_A_DQ34 141 112

2
DQ34 VDD
SC10U6D3V5KX-1GP
SC10U6D3V5KX-1GP
SC10U6D3V5KX-1GP
SC10U6D3V5KX-1GP
SC10U6D3V5KX-1GP
SC10U6D3V5KX-1GP
M_A_DQ35 143 117
SC10U10V5ZY-1GP
SC10U10V5ZY-1GP
DQ35 VDD
C1403
C1404
C1405
C1406
C1407
C1408
C1409
C1410
M_A_DQ36 130 118
DQ36 VDD
1
M_A_DQ37 132 123
M_A_DQ38 DQ37 VDD
140 124
M_A_DQ39 142
DQ38 VDD DY DY DY DY
2
M_A_DQ40 DQ39
147 2
M_A_DQ41 DQ40 VSS
149 3
M_A_DQ42 DQ41 VSS
157 DQ42 VSS 8
M_A_DQ43 159 9
M_A_DQ44 DQ43 VSS
146 13
M_A_DQ45 DQ44 VSS
148 14
M_A_DQ46 DQ45 VSS
158 DQ46 VSS 19
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
Place these caps M_A_DQ47 160 20
0D75V_S0 DQ47 VSS
C1416
C1417
M_A_DQ48 163 25
DQ48 VSS
1
close to VTT1 and M_A_DQ49 165 26
M_A_DQ50 DQ49 VSS
VTT2. 175 31
M_A_DQ51 DQ50 VSS
177 32
2
M_A_DQ52 DQ51 VSS
164 37
DQ52 VSS
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
M_A_DQ53 166 38 Layout Note:

DQ53 VSS
C1419
C1420
C1421
C1422
M_A_DQ54 174 43
DQ54 VSS
1
B
M_A_DQ55 176 44 Place these Caps near B
C1418 M_A_DQ56 DQ55 VSS
DY DY DY 181 DQ56 VSS 48 SO-DIMMA.
SC10U6D3V5KX-1GP
M_A_DQ57 183 49
2
M_A_DQ58 DQ57 VSS

191 54
M_A_DQ59 DQ58 VSS
193 DQ59 VSS 55
M_A_DQ60 180 60
M_A_DQ61 DQ60 VSS
182 DQ61 VSS 61
M_A_DQ62 192 65
M_A_DQ63 DQ62 VSS
194 66
DQ63 VSS
VSS 71
M_A_DQS#0 10 72
M_A_DQS#1 DQS0# VSS
27 127
M_A_DQS#2 DQS1# VSS
45 DQS2# VSS 128
M_A_DQS#3 62 133
M_A_DQS#4 DQS3# VSS
135 134
M_A_DQS#5 DQS4# VSS
152 138
M_A_DQS#6 DQS5# VSS
M_A_DQS#[7:0] 6 169 DQS6# VSS 139
M_A_DQS#7 186 144
DQS7# VSS
M_A_DQS[7:0] 6 145
M_A_DQS0 VSS
12 DQS0 VSS 150
M_A_DQS1 29 151
M_A_DQS2 DQS1 VSS
47 155
M_A_DQS3 DQS2 VSS
64 156
M_A_DQS4 DQS3 VSS
137 161
M_A_DQS5 DQS4 VSS
154 162
M_A_DQS6 DQS5 VSS
171 167
M_A_DQS7 DQS6 VSS
188 DQS7 VSS 168
VSS 172
116 173
6 M_A_DIM0_ODT0 ODT0 VSS
6 M_A_DIM0_ODT1 120 ODT1 VSS 178
179
VSS
DDR_VREF_S3 126 VREF_CA VSS 184
M_VREF_DQ_DIMM0 1 185
VREF_DQ VSS
A VSS 189 A
30 190
15,37 DDR3_DRAMRST# RESET# VSS
195
1bios.ru
VSS
VSS 196 <Core Design>
0D75V_S0 203 205
VTT1 VSS
204 206
VTT2 VSS
Wistron Corporation
DDR3-204P-138-GP 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
H =4mm Taipei Hsien 221, Taiwan, R.O.C.
62.10024.F31 Title
2ND = 62.10017.M61 DDR3-SODIMM1
Custom
BAD50-HC -1
5 4 3 2 1
5 4 3 2 1
SSID = MEMORY
DM2
205
NP1
D M_VREF_DQ_DIMM1 1 D
3 2
M_B_DQ0 5 4 M_B_DQ4
M_B_DQ1 7 6 M_B_DQ5
9 8
6 M_B_A[15:0] 11 10 M_B_DQS#0
13 12 M_B_DQS0
M_B_DQ2 15 14
M_B_A0 M_B_DQ3 17 16 M_B_DQ6
M_B_A1 19 18 M_B_DQ7
M_B_A2 M_B_DQ8 21 20
M_B_A3 M_B_DQ9 23 22 M_B_DQ12
M_B_A4 25 24 M_B_DQ13
M_B_A5 M_B_DQS#1 27 26
M_B_A6 M_B_DQS1 29 28
M_B_A7 31 30
M_B_A8 M_B_DQ10 DDR3_DRAMRST# 14,37
33 32
M_B_A9 M_B_DQ11 35 34 M_B_DQ14
M_B_A10 Note: 37 36 M_B_DQ15
M_B_A11 M_B_DQ16 39 38
M_B_A12 SO-DIMMB SPD Address is 0xA4 M_B_DQ17 41 40 M_B_DQ20
M_B_A13 43 42 M_B_DQ21
M_B_A14
SO-DIMMB TS Address is 0x34 M_B_DQS#2 45 44
M_B_A15 M_B_DQS2 47 46
49 48
SO-DIMMB is placed farther from M_B_DQ18 51 50 M_B_DQ22
M_B_DQ19 53 52 M_B_DQ23
the Processor than SO-DIMMA 55 54
M_B_DQ24 57 56 M_B_DQ28
6 M_B_DQ[63:0] M_B_DQ0 M_B_DQ25 M_B_DQ29
59 58
M_B_DQ1 61 60
M_B_DQ2 63 62 M_B_DQS#3
M_B_DQ3 65 64 M_B_DQS3
M_B_DQ4 M_B_DQ26 67 66
M_B_DQ5 M_B_DQ27 69 68 M_B_DQ30
M_B_DQ6 71 70 M_B_DQ31
M_B_DQ7 1D5V_S3 72 1D5V_S3
M_B_DQ8
M_B_DQ9 73
6 M_B_DIM0_CKE0
M_B_DQ10 75 74 M_B_DIM0_CKE1 6
C M_B_DQ11 77 76 C
M_B_DQ12 1D5V_S3 M_B_A15
M_B_DQ13
SODIMM B DECOUPLING 6 M_B_BS2
79 78
M_B_A14
81 80
M_B_DQ14 M_B_A12 83 82
M_B_DQ15 M_B_A9 85 84 M_B_A11
M_B_DQ16 87 86 M_B_A7
SC10U6D3V5KX-1GP
SC10U6D3V5KX-1GP
SC10U6D3V5KX-1GP
SC10U6D3V5KX-1GP
SC10U6D3V5KX-1GP
SC10U10V5ZY-1GP
SC10U10V5ZY-1GP
SC10U10V5ZY-1GP
M_B_DQ17 M_B_A8
C1503
C1504
C1505
C1506
C1507
C1508
C1509
C1510
89 88
1
M_B_DQ18 M_B_A5 91 90 M_B_A6
M_B_DQ19 93 92 M_B_A4
M_B_DQ20 DY DY DY DY M_B_A3 95 94
2
M_B_DQ21 M_B_A1 97 96 M_B_A2
M_B_DQ22 99 98 M_B_A0
M_B_DQ23 101 100
6 M_B_DIM0_CLK_DDR0
M_B_DQ24 6 M_B_DIM0_CLK_DDR#0 103 102 M_B_DIM0_CLK_DDR1 6
M_B_DQ25 105 104 M_B_DIM0_CLK_DDR#1 6
M_B_DQ26 M_B_A10 107 106
M_B_DQ27 109 108
M_B_DQ28 6 M_B_BS0 M_B_BS1 6
111 110
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
M_B_RAS# 6
M_B_DQ29
C1513
C1514
6 M_B_WE# 113 112
1
M_B_DQ30
M_B_DQ31
Layout Note: 6 M_B_CAS# 115 114 M_B_DIM0_CS#0 6
117 116
M_B_DQ32 Place these Caps near M_B_A13 M_B_DIM0_ODT0 6
2 119 118
2
M_B_DQ33 121 120
M_B_DQ34
SO-DIMMB. 6 M_B_DIM0_CS#1
123 122
M_B_DIM0_ODT1 6
M_B_DQ35 125 124
M_B_DQ36 127 126 DDR_VREF_S3
M_B_DQ37 M_B_DQ32 129 128
M_B_DQ38 M_B_DQ33 131 130 M_B_DQ36
M_B_DQ39 9/19 133 132 M_B_DQ37
M_B_DQ40 M_VREF_DQ_DIMM1
DEL IVB add M1 M_B_DQS#4 135 134
M_B_DQ41 DDR_VREF_S3 M_B_DQS4 137 136
M_B_DQ42 1228 SB 139 138
M_B_DQ43 DY M_B_DQ34 141 140 M_B_DQ38
M_B_DQ44 M_B_DQ35 M_B_DQ39
M_B_DQ45
2 M1 1
R1502
2
R1503
1
DDR_WR_VREF01_D1 37
143 142
145 144
M_B_DQ46 0R3J-0-U-GP 0R3J-0-U-GP M_B_DQ40 147 146 M_B_DQ44
1
M_B_DQ47 M_B_DQ41 149 148 M_B_DQ45

SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
M_B_DQ48 C1515 C1517 151 150

M_B_DQ49 153 152 M_B_DQS#5
2
M_B_DQ50 155 154 M_B_DQS5

M_B_DQ51 M_B_DQ42 157 156
B M_B_DQ52 M_B_DQ43 159 158 M_B_DQ46 B
M_B_DQ53 161 160 M_B_DQ47
M_B_DQ54 M_B_DQ48 163 162
M_B_DQ55 M_B_DQ49 165 164 M_B_DQ52
M_B_DQ56 167 166 M_B_DQ53
M_B_DQ57 M_B_DQS#6
M_B_DQ58
Place these caps M_B_DQS6
169 168
171 170
M_B_DQ59 0D75V_S0 close to VTT1 and 173 172
M_B_DQ60 M_B_DQ50 175 174 M_B_DQ54
M_B_DQ61 VTT2. M_B_DQ51 177 176 M_B_DQ55
M_B_DQ62 179 178
M_B_DQ63 M_B_DQ56 181 180 M_B_DQ60
M_B_DQ57 M_B_DQ61
C1518
C1519
C1520
C1521
183 182
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
6 M_B_DQS#[7:0]
1
M_B_DQS#0 185 184

M_B_DQS#1 M_B_DQS#7
M_B_DQS#2 DY DY 187
189
186
188 M_B_DQS7
2
M_B_DQS#3 M_B_DQ58 191 190

M_B_DQS#4 M_B_DQ59 193 192 M_B_DQ62
M_B_DQS#5 3D3V_S0 195 194 M_B_DQ63
M_B_DQS#6 197 196
M_B_DQS#7 199 198
6 M_B_DQS[7:0] TS#_DIMM0_1 14
2 1 SA1_DIM1 201 200 PCH_SMBDATA 14,20,66,79
1
M_B_DQS0 R1501 203 202

0D75V_S0 PCH_SMBCLK 14,20,66,79
SCD1U10V2KX-5GP
M_B_DQS1 C1501 10KR2J-3-GP 204 0D75V_S0

M_B_DQS2 NP2
2
M_B_DQS3 206
M_B_DQS4
M_B_DQS5 DDR3-204P-137-GP
M_B_DQS6
M_B_DQS7 62.10024.F01
2ND = 62.10017.M71
A A
1bios.ru
<Core Design>
Wistron Corporation
Title
DDR3-SODIMM2
A2
BAD50-HC -1
5 4 3 2 1
5 4 3 2 1
D D
C (Blanking) C
B B
<Core Design>
A
1bios.ru
Title
DDR3-SODIMM2
A4
BAD50-HC -1
5 4 3 2 1
5 4 3 2 1
3D3V_S0
D D
UMA_PX_Muxless PCH1D 4 OF 10 3D3V_S0
94 L_BKLT_EN J47 L_BKLTEN SDVO_TVCLKINN AP43
2 3 L_CTRL_CLK 94 LVDS_VDD_EN M45 AP45
L_CTRL_DATA L_VDD_EN SDVO_TVCLKINP
1 4
L_DDC_DATA(PAGE17): 94 L_BKLT_CTRL P45 L_BKLTCTL SDVO_STALLN AM42
4
3
RN1701 SDVO_STALLP AM40
SRN2K2J-1-GP This signal is on the LVDS interface. 94 LVDS_DDC_CLK_R T40 RN1706 DDI Port B Detect:(SDVO_CTRL_ DATA)
L_DDC_CLK
This signal needs to be left NC if eDP is 94 LVDS_DDC_DATA_R K47 L_DDC_DATA SDVO_INTN AP39 SRN2K2J-1-GP 1: Port B detected
SDVO_INTP AP40 UMA_PX_Muxless
RN1702 used for the local flat panel display L_CTRL_CLK T45 L_CTRL_CLK
0: Port B not detected
SRN100KJ-6-GP L_CTRL_DATA P39
1
2
L_BKLT_EN L_CTRL_DATA
1 4
2 3 LVDS_VDD_EN LVDS_IBG AF37 P38
JE40 modify LVD_IBG SDVO_CTRLCLK PCH_HDMI_CLK 51
RN1704 AF36 M39
LVD_VBG SDVO_CTRLDATA PCH_HDMI_DATA 51
SRN0J-6-GP
1
UMA_PX_Muxless 1 4 LVDS_VREFH AE48
R1701 LVDS_VREFL LVD_VREFH
2 3 AE47 AT49
2K37R2F-GP LVD_VREFL DDPB_AUXN
DDPB_AUXP AT47 HDMI
UMA_PX_Muxless UMA_PX_Muxless DDPB_HPD AT40 PCH_DP1_HPD 51
Place near PCH 94 LVDSA_CLK# AK39
2
LVDSA_CLK# 3D3V_S0
LVDS
94 LVDSA_CLK AK40 AV42 DDBP_DATA2# DDBP_DATA2# 51
LVDSA_CLK DDPB_0N DDBP_DATA2
DDPB_0P AV40 DDBP_DATA2 51
94 LVDSA_DATA0# AN48 AV45 DDBP_DATA1# DDBP_DATA1# 51
LVDSA_DATA#0 DDPB_1N DDBP_DATA1
94 LVDSA_DATA1# AM47 LVDSA_DATA#1 DDPB_1P AV46 DDBP_DATA1 51
Digital Display Interface

94 LVDSA_DATA2# AK47 AU48 DDBP_DATA0# DDBP_DATA0# 51
LVDSA_DATA#2 DDPB_2N
2
2
AJ48 AU47 DDBP_DATA0 DDBP_DATA0 51
LVDSA_DATA#3 DDPB_2P
AV47 DDBP_DATA3# DDBP_DATA3#
DY
51 2K2R2J-2-GP
UMA_PX_Muxless
DDPB_3N DDBP_DATA3 2K2R2J-2-GP
94 LVDSA_DATA0 AN47 LVDSA_DATA0 DDPB_3P AV49 DDBP_DATA3 51
C AM49 R1704 R1703 C
94 LVDSA_DATA1
AK49
LVDSA_DATA1 Close to PCH side
94 LVDSA_DATA2
1
1
LVDSA_DATA2 DDPC_CTRLCLK
AJ47 LVDSA_DATA3 DDPC_CTRLCLK P46
P42 DDPC_CTRLDATA
DDPC_CTRLDATA
AF40 LVDSB_CLK#
AF39 AP47 DDCP_AUX#
3D3V_S0 LVDSB_CLK DDPC_AUXN DDCP_AUX# 52
AP49 DDCP_AUX
DDPC_AUXP DDCP_AUX 52
AH45 LVDSB_DATA#0 DDPC_HPD AT38 PCH_DP_HPD 52
AH47 LVDSB_DATA#1
AF49 AY47 DDCP_DATA0# DDCP_DATA0# 52
LVDSB_DATA#2 DDPC_0N DDCP_DATA0
AF45 LVDSB_DATA#3 DDPC_0P AY49 DDCP_DATA0 52
AY43 DDCP_DATA1# DDCP_DATA1# 52
DDPC_1N DDCP_DATA1
AH43 LVDSB_DATA0 DDPC_1P AY45 DDCP_DATA1 52
4
3
AH49 BA47 DDCP_DATA2#

RN1707
SRN4K7J-8-GP
AF47
LVDSB_DATA1
LVDSB_DATA2
DDPC_2N
DDPC_2P BA48 DDCP_DATA2
DDCP_DATA3#
DDCP_DATA2#
DDCP_DATA2
52
52 DP
AF43 LVDSB_DATA3 DDPC_3N BB47 DDCP_DATA3# 52
BB49 DDCP_DATA3 DDCP_DATA3 52
DDPC_3P
UMA_PX_Muxless
1
2
95 CRT_BLUE N48 CRT_BLUE DDPD_CTRLCLK M43

95 CRT_GREEN P49 CRT_GREEN DDPD_CTRLDATA M36
95 CRT_RED T49 CRT_RED
DDPD_AUXN AT45
CRT
95 CRT_DDC_CLK T39 CRT_DDC_CLK DDPD_AUXP AT43
95 CRT_DDC_DATA M40 CRT_DDC_DATA DDPD_HPD BH41
DDPD_0N BB43
B B
95 CRT_HSYNC M47 CRT_HSYNC DDPD_0P BB45
95 CRT_VSYNC M49 CRT_VSYNC DDPD_1N BF44
DDPD_1P BE44
DDPD_2N BF42
DAC_IREF_R T43 BE42
DAC_IREF DDPD_2P
Close to PCH side T42 CRT_IRTN DDPD_3N BJ42
1
DDPD_3P BG42
R1702
CRT_BLUE 1KR2D-1-GP PANTHER-GP-NF
CRT_GREEN
CRT_RED
71.PANTH.00U
2
5
6
7
8
RN1705
SRN150F-1-GP
UMA_PX_Muxless
4
3
2
1
A <Core Design> A
1bios.ru
Wistron Corporation
Title
PCH (LVDS/CRT/DDI)
A3
BAD50-HC -1
5 4 3 2 1
5 4 3 2 1
SSID = PCH
PCH1E 5 OF 10
RSVD1 AY7
3D3V_S0 AV7
RSVD2
BG26 TP1 RSVD3 AU3
BJ26 TP2 RSVD4 BG4
BH25 TP3
BJ16 TP4 RSVD5 AT10
1
RN1801 BG16 BC8
SRN8K2J-2-GP-U TP5 RSVD6
AH38
D GSENSOR_INT1 1 10 3D3V_S0
DY 10KR2J-3-GP
AH37
TP6
AU2 D
INT_PIRQB# INT_PIRQD# R1823 TP7 RSVD7
2 9 AK43 TP8 RSVD8 AT4
INT_PIRQF# 3 8 INT_PIRQE# AK45 AT3
2
INT_PIRQA# INT_PIRQC# TP9 RSVD9
4 7 C18 TP10 RSVD10 AT1
3D3V_S0 5 6 INT_PIRQG# N30 AY3
DGPU_PW R_EN# TP11 RSVD11
H3 TP12 RSVD12 AT5
AH12 TP13 RSVD13 AV3
AM4 TP14 RSVD14 AV1
1
AM5 TP15 RSVD15 BB1
R1824 Y13 BA3
TP16 RSVD16
10KR2J-3-GP K24 TP17 RSVD17 BB5
L24 TP18 RSVD18 BB3
AB46 BB7
2
TP19 RSVD19
AB45 TP20 RSVD20 BE8
RSVD
RSVD21 BD4
RSVD22 BF6
9/3 B21 TP21 RSVD23 AV5

M20 TP22 RSVD24 AV10
AY16 TP23
A16 swap override Strap/Top-Block BG46 AT8
TP24 RSVD25
Swap Override jumper
RSVD26 AY5
9/21 del USB REDRIVER RSVD27 BA2
PCI_GNT#3 Low = A16 swap 82 USB30_RXN1 BE28 USB3RN1
override/Top-Block 82 USB30_RXN2 BC30 USB3RN2 RSVD28 AT12
Swap Override enabled 82 USB30_RXN3 BE32 USB3RN3 RSVD29 BF3
High = Default 104 USB30_RXN4 BJ32 USB3RN4 USB Ext. port 1 (HS)
82 USB30_RXP1 BC28 USB3RP1
C
82 USB30_RXP2 BE30 USB3RP2 External debug port use on Huron river platform C
82 USB30_RXP3 BF32 USB3RP3

BG32 C24
82
82
USB30_TXN1
USB30_TXN2
104 USB30_RXP4
SCD1U10V2KX-4GP 1
SCD1U10V2KX-4GP 1
2C1801
2C1802
USB30_TXN1_C
USB30_TXN2_C
AV26
BB26
USB3RP4
USB3TN1
USB3TN2
USBP0N
USBP0P
USBP1N
A24
C25
USB_PN0
USB_PP0
USB_PN1
82
82
82
USB Table
SCD1U10V2KX-4GP 1 2C1803 USB30_TXN3_C AU28 B25
DGPU_HOLD_RST#
R1822
9/3 82
104
USB30_TXN3
USB30_TXN4 SCD1U10V2KX-4GP 1
SCD1U10V2KX-4GP 1
2C1804 USB30_TXN4_C AY30
USB3TN3
USB3TN4
USBP1P
USBP2N C26
USB_PP1
USB_PN2
82
82 Pair Device
1 2 82 USB30_TXP1 2C1805 USB30_TXP1_C AU26 USB3TP1 USBP2P A26 USB_PP2 82
82 USB30_TXP2 SCD1U10V2KX-4GP 1 2C1806 USB30_TXP2_C AY26 K28 USB_PN3 104 0 USB port 1
SCD1U10V2KX-4GP 1 USB3TP2 USBP3N
10KR2J-3-GP 82 USB30_TXP3 2C1807 USB30_TXP3_C AV28 USB3TP3 USBP3P H28 USB_PP3 104
104 USB30_TXP4 SCD1U10V2KX-4GP 1 2C1808 USB30_TXP4_C AW30 E28 1 USB port 2
USB3TP4 USBP4N 1220 SB
USBP4P D28
USBP5N C28 USB_PN5 69 2 USB port3 (usb charger)
USBP5P A28 USB_PP5 69
3D3V_S0 Dock
USBP6N C29 USB_PN6 76 3
BOOT BIOS Strap USBP6P B29 USB_PP6 76
2 INT_PIRQA# K40 PIRQA# USBP7N N28 4 X
GNT1#/GPIO51 SATA1GP/GPIO19 BOOT BIOS Location R1814 INT_PIRQB# K38 M28
PIRQB# USBP7P
PCI
8K2R2J-3-GP INT_PIRQC# H38 L30 USB_PN8 66 5 Fingerprint
INT_PIRQD# PIRQC# USBP8N
0 0 LPC G38 PIRQD# USBP8P K30 USB_PP8 66
G30 USB_PN9 57 6 smart card
1
USBP9N
0 1 Reserved 83 DGPU_HOLD_RST# C46 REQ1#/GPIO50 USBP9P E30 USB_PP9 57
USB
94,95,103 DGPU_SELECT# C44 REQ2#/GPIO52 USBP10N C30 USB_PN10 66 7 X
1 0 Reserved 93 DGPU_PW R_EN# E40 REQ3#/GPIO54 USBP10P A30 USB_PP10 66
USBP11N L32 USB_PN11 65 8 Mini Card2 (WWAN)
1 1 SPI(Default) D47 GNT1#/GPIO51 USBP11P K32 USB_PP11 65
94 DGPU_PW M_SELECT# E42 GNT2#/GPIO53 USBP12N G32 USB_PN12 49 9 USB port4(ESATA ),on M/B
F46 GNT3#/GPIO55 USBP12P E32 USB_PP12 49
B USBP13N C32 USB_PN13 75 10 3G Card B
R1813 A32 USB_PP13 75
0R0402-PAD INT_PIRQE# USBP13P
G42 PIRQE#/GPIO2 11 Mini Card1 (WLAN)
56 SATA_ODD_DA# 1 2 INT_PIRQF# G40
INT_PIRQG# PIRQF#/GPIO3 USB_RBIAS
C42 PIRQG#/GPIO4 USBRBIAS# C33 1 2 12 CAMERA
79 GSENSOR_INT1 1 R1821 2 GSENSOR_INT1_R D44 PIRQH#/GPIO5
R1811
0R0402-PAD 22D6R2F-L1-GP 13 New Card
USBRBIAS B33
K10 3D3V_S5
PME#
5,27,31,32,36,65,66,71,75,82,83,97,105 PLT_RST# C6 PLTRST# OC0#/GPIO59 A14
2
OC1#/GPIO40 K20
9/22 B17 R1820
R1804 OC2#/GPIO41
71 CLK_PCI_LPC 1 2 22R2J-2-GP CLK_PCI_LPC_R H49 CLKOUT_PCI0 OC3#/GPIO42 C16 10KR2J-3-GP
20 CLK_PCI_FB R1805 1 2 22R2J-2-GP CLK_PCI_FB_R H43 L16
R1806 CLKOUT_PCI1 OC4#/GPIO43
27,82 CLK_PCI_KBC 1 2 22R2J-2-GP CLK_PCI_KBC_R J48 A16
1
CLKOUT_PCI2 OC5#/GPIO9 USB_OC
K42 CLKOUT_PCI3 OC6#/GPIO10 D14
SC4D7P50V2CN-1GP
H40 C14
DY DY DY CLKOUT_PCI4 OC7#/GPIO14
1
1
SC4D7P50V2CN-1GP
SC4D7P50V2CN-1GP
EC1803 EC1802 EC1801 PANTHER-GP-NF

-1_0303
2
OC[3:0]# for Device 29 (Ports 0-7)

OC[7:4]# for Device 26 (Ports 8-13)
A <Core Design> A
EMI request 20101109
1bios.ru
Wistron Corporation
Title
PCH (PCI/USB/NVRAM)
A3
BAD50-HC -1
5 4 3 2 1
5 4 3 2 1
SSID = PCH 4 DMI_RXN[3:0]

4 DMI_RXP[3:0] FDI_TXN[7:0] 4
FDI_TXP[7:0] 4
4 DMI_TXN[3:0]
4 DMI_TXP[3:0]
PCH1C 3 OF 10
4 DMI_RXN0 BC24 DMI0RXN FDI_RXN0 BJ14 FDI_TXN0 4

4 DMI_RXN1 BE20 DMI1RXN FDI_RXN1 AY14 FDI_TXN1 4
D 4 DMI_RXN2 BG18 DMI2RXN FDI_RXN2 BE14 FDI_TXN2 4 D
4 DMI_RXN3 BG20 DMI3RXN FDI_RXN3 BH13 FDI_TXN3 4
Signal Routing Guideline: FDI_RXN4 BC12 FDI_TXN4 4
DMI_ZCOMP keep W=4 mils and 4 DMI_RXP0 BE24 DMI0RXP FDI_RXN5 BJ12 FDI_TXN5 4
4 DMI_RXP1 BC20 BG10 FDI_TXN6 4
routing length less than 500 BJ18
DMI1RXP FDI_RXN6
BG9
4 DMI_RXP2 DMI2RXP FDI_RXN7 FDI_TXN7 4
mils. 4 DMI_RXP3 BJ20 DMI3RXP
DMI_IRCOMP keep W=4 mils and FDI_RXP0 BG14 FDI_TXP0 4
routing length less than 500 4 DMI_TXN0 AW24 DMI0TXN FDI_RXP1 BB14 FDI_TXP1 4
4 DMI_TXN1 AW20 BF14 FDI_TXP2 4
mils. BB18
DMI1TXN FDI_RXP2
BG13
4 DMI_TXN2 DMI2TXN FDI_RXP3 FDI_TXP3 4
4 DMI_TXN3 AV18 DMI3TXN FDI_RXP4 BE12 FDI_TXP4 4
DMI
FDI
FDI_RXP5 BG12 FDI_TXP5 4
4 DMI_TXP0 AY24 DMI0TXP FDI_RXP6 BJ10 FDI_TXP6 4
4 DMI_TXP1 AY20 DMI1TXP FDI_RXP7 BH9 FDI_TXP7 4
4 DMI_TXP2 AY18 DMI2TXP
4 DMI_TXP3 AU18 DMI3TXP
FDI_INT AW16 FDI_INT 4
1D05V_VTT BJ24 AV12
DMI_ZCOMP FDI_FSYNC0 FDI_FSYNC0 4 For platforms not supporting Deep S4/S5
R1901 2 49D9R2F-GP DMI_COMP_R
1 BG25 DMI_IRCOMP FDI_FSYNC1 BC10 FDI_FSYNC1 4 1.VccSUS3_3 and VccDSW3_3 will rise at the same time (connected on board)
R1902 1 2 750R2F-GP RBIAS_CPY BH21 DMI2RBIAS FDI_LSYNC0 AV14 FDI_LSYNC0 4 2.DPWROK and RSMRST# will rise at the same time (connected on board)
R1926 FDI_LSYNC1 BB10 FDI_LSYNC1 4 3.SLP_SUS# and SUSACK# are left as ‘no connect’
10KR2J-3-GP 4.SUSWARN# used as SUSPWRDNACK/GPIO30
1 DY 2 SYS_PW ROK
C 0628 Modify: A18 DSW ODVREN R1910 C
PW ROK Change R1904 to 100K 0402 from 10K and default stuff. DSWVRMEN 0R0402-PAD
1 2
R1904 1 2 PM_RSMRST#
System Power Management

100KR2J-1-GP JE40 modify SUS_PW R_ACK C12 E22 PCH_DPW ROK 1 2
SUSACK# DPWROK RTC_AUX_S5
R1911
DY 10KR2J-3-GP
3D3V_S0 1 2 SYS_RESET# K3 B9 PCIE_W AKE# 31,65,66,75
R1905 SYS_RESET# WAKE#
10KR2J-3-GP
36 SYS_PW ROK P12 SYS_PWROK CLKRUN#/GPIO32 N3 PM_CLKRUN# 27,82
R1924 0R0402-PAD
27,42 S0_PW R_GOOD 2 1 PW ROK L22 G8 SUS_STAT# 82
PWROK SUS_STAT#/GPIO61
1 2
Non _iAMT_SBA R1930 0R2J-2-GP
36 PM_MPW ROK 1 2 APW ROK L10 N14 PCH_SUSCLK_KBC 27
R1929 0R2J-2-GP For APWROK SUSCLK/GPIO62 DSWODVREN - On Die DSW VR Enable
SBA 0302
iAMT_SBA
B13 D10 PM_SLP_S5# 1 TP1901 TPAD14-OP-GP
5,37 PM_DRAM_PW RGD DRAMPWROK SLP_S5#/GPIO63 HIGH Enabled (DEFAULT)
S0_PWR_GOOD after PM_SLP_S3# delay 200 ms PM_RSMRST# C21 H4
LOW Disabled
RSMRST# SLP_S4# PM_SLP_S4# 27,46
27 SUS_PW R_ACK K16 SUSWARN#/SUSPWRDNACK/GPIO30 SLP_S3# F4 PM_SLP_S3# 27,29,36,37,47,75,82

1 2 RTC_AUX_S5
R1928 DY 0R2J-2-GP
27,97 PM_PW RBTN# E20 G10 SLP_A# 1 2 PM_SLP_A# 27,36
PWRBTN# SLP_A# R1927 0R2J-2-GP R1917 1 2 330KR2J-L1-GP
B B
iAMT_SBA For SBA 0302
27 AC_PRESENT H20 G16 PM_SLP_SUS# 1
ACPRESENT/GPIO31 SLP_SUS# TP1902 TPAD14-OP-GP DSW ODVREN R1918 1 2 330KR2J-L1-GP
BATLOW # E10 AP14

DY
BATLOW#/GPIO72 PMSYNCH H_PM_SYNC 5
PM_RI# A10 K14 PM_SLP_LAN# 27,36,45

RI# SLP_LAN#/GPIO29
PANTHER-GP-NF
R1919 3D3V_S0
8K2R2J-3-GP
PM_CLKRUN# 1 2
3D3V_S5
RN1901
SRN10KJ-6-GP
8 1 BATLOW #
7 2 PM_RI#
6 3 AC_PRESENT
5 4 SUS_PW R_ACK
PCIE_WAKE# 3D3V_AUX_S5
CRB : 1K R1909
100KR2J-1-GP
R1922 2 1 10KR2J-3-GP PM_SLP_LAN# CEKLT: 10K 2 1
Non_ iAMT_SBA For SBA 0302
2
A R1921 2 1 10KR2J-3-GP PCIE_W AKE# <Core Design> A

R1916
10KR2J-3-GP
1bios.ru
PM_RSMRST# 1
PWRBTN#
4 3
R1912
2 RSMRST#_KBC 27
Wistron Corporation
1
3V_5V_POK_# 5 2 1KR2J-1-GP 21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,

This signal has an internal pull-up resistor 3V_5V_POK 41
6 1 Q1901
R1908 2N7002KDW -GP Title
100KR2J-1-GP
PM_RSMRST# 84.2N702.A3F
2 1 PM_RSMRST# CRB : PL 10K 2nd = 84.2N702.F3F PCH (DM I/FDI/PM)
ANNIE : PL 100K A3
BAD50-HC -1
5 4 3 2 1
5 4 3 2 1
3D3V_S0 3D3V_S5
SSID = PCH
1
SMB_CLK 4 1 RN2003
R2004 SMB_DATA 2 SRN2K2J-1-GP
SB 10KR2J-3-GP
3
SML0_DATA 3 2 RN2004
PCH1B 2 OF 10 SML0_CLK 4 1 SRN2K2J-1-GP
2
PEG_CLKREQ#_R
BG34 SML1_CLK 2 3 RN2005
PERN1
1
BJ34 E12 EC_SW I# 27 SML1_DATA 1 4
PERP1 SMBALERT#/GPIO11 R2005 SRN4K7J-8-GP
AV32 PETN1
D AU32 H14 10KR2J-3-GP PCH_GPIO74 2 3 D
PETP1 SMBCLK SMB_CLK 31,75
DY PCIE_REQ0# 1 4 SRN10KJ-5-GP
BE34 C9 RN2006
66 PCIE_RXN2 SMB_DATA 31,75
2
PERN2 SMBDATA
66 PCIE_RXP2 BF34 PERP2
C2003 2 SCD1U10V2KX-5GP PCIE_TXN2_C R2009
66 PCIE_TXN2 C2004
1
1 2 SCD1U10V2KX-5GP PCIE_TXP2_C
BB32
AY32
PETN2 3GLAN DRAMRST_CNTRL_PCH 1 2
66 PCIE_TXP2 PETP2
SMBUS
A12 1KR2J-1-GP
SML0ALERT#/GPIO60 DRAMRST_CNTRL_PCH 37 3D3V_S0
32 PCIE_RXN3 BG36 PERN3 R2009:
32 PCIE_RXP3 BJ36 PERP3 SML0CLK C8 SML0_CLK 105
C2013 1 2 SCD1U10V2KX-5GP PCIE_TXN3_C AV34 Card Reader 2 3 1K@CRB
32 PCIE_TXN3 C2014 PCIE_TXP3_C PETN3
32 PCIE_TXP3 1 2 SCD1U10V2KX-5GP AU34 PETP3 SML0DATA G12 SML0_DATA 105 1 4 10K@CEKLT
BF36 RN2007
65 PCIE_RXN4 PERN4 SRN2K2J-1-GP
65 PCIE_RXP4 BE36 PERP4
C2001 2 SCD1U10V2KX-5GP PCIE_TXN4_C PCH_GPIO74
65 PCIE_TXN4 C2002
1
AY34
BB34
PETN4 WLAN SML1ALERT#/PCHHOT#/GPIO74 C13
65 PCIE_TXP4 PETP4
SML1CLK/GPIO58 E14 SML1_CLK 27
PCI-E*
9/3 PORT7-->PORT4 BG37 PERN5
BH37 M16 SMB_DATA 6 1
PERP5 SML1DATA/GPIO75 SML1_DATA 27 PCH_SMBDATA 14,15,66,79
AY36
BB36
PETN5 USB3.0 5 2
PETP5 Q2001
BJ38 2N7002KDW -GP 4 3
31,105 PCIE_RXN6 PERN6
31,105 PCIE_RXP6 BG38 PERP6 84.2N702.A3F
CL_CLK 65
Controller
C2011 2 SCD1U10V2KX-5GP PCIE_TXN6_C 2nd = 84.2N702.F3F
31,105 PCIE_TXN6
31,105 PCIE_TXP6 C2012
1
AU36
AV36
PETN6 INTEL/BCM LAN CL_CLK1 M7
PETP6
CL_DATA 65 PCH_SMBCLK 14,15,66,79
Link
75 PCIE_RXN7 BG40 PERN7 CL_DATA1 T11
BJ40 SMB_CLK
75 PCIE_RXP7 PERP7
C2025 2 SCD1U10V2KX-5GP PCIE_TXN7_C
75 PCIE_TXN7 C2026
1
AY40
BB40
PETN7 NEW CARD P10 CL_RST# 65
75 PCIE_TXP7 PETP7 CL_RST1#
C C
BE38 PERN8
BC38 PERP8
R2008 and C2008 CO-LAY
AW38 C2008
PETN8 R2003 SC12P50V2JN-3GP
AY38 PETP8 0R2J-2-GP XTAL25_IN 2 1
PEG_A_CLKRQ#/GPIO47 M10 PEG_CLKREQ#_R 1 2 PEG_CLKREQ# 83
2
Y40 CLKOUT_PCIE0N DIS_PX_Muxless 9/20
Y39 R2006 X2001
CLKOUT_PCIE0P CLKOUT_PEG_A_N 2 1M1R2J-GP
CLKOUT_PEG_A_N AB37 3 CLK_PCIE_VGA# 83 XTAL-25MHZ-149-GP
PCIE_REQ0# CLKOUT_PEG_A_P 1
CLOCKS
J2 AB38 4 CLK_PCIE_VGA 83
1
PCIECLKRQ0#/GPIO73 CLKOUT_PEG_A_P RN2016 SRN0J-6-GP
1
9/3 WLAN-->3GLAN 0R4P2R-PAD XTAL25_OUT 2 1
RN2012 2 CLK_PCH_SRC1_N DIS_PX_Muxless
66 CLK_PCIE_W W AN# 3 AB49 CLKOUT_PCIE1N CLKOUT_DMI_N AV22 CLK_EXP_N 5 82.30020.D11
1 4 CLK_PCH_SRC1_P AB47 AU22 2nd = 82.30020.I01 C2007
3GLAN CLK 66 CLK_PCIE_W W AN CLKOUT_PCIE1P CLKOUT_DMI_P CLK_EXP_P 5
RN
SC12P50V2JN-3GP
66 PCIE_CLK_W W AN_REQ# 1 2 PCIE_REQ1# M1 PCIECLKRQ1#/GPIO18
RN
R2018 0R0402-PAD AM12 CLKOUT_DP_N 1 4 CLK_DP_N_R 5

0R4P2R-PAD CLKOUT_DP_N CLKOUT_DP_P
CLKOUT_DP_P AM13 2 3 CLK_DP_P_R 5
RN2017 2 3 CLK_PCH_SRC2_N AA48 3D3V_S0 3D3V_S0
Card Reader 32 CLK_PCIE_CARD#
32 CLK_PCIE_CARD 1 4 CLK_PCH_SRC2_P AA47
CLKOUT_PCIE2N
CLKOUT_PCIE2P
RN2020 0R4P2R-PAD
BF18 CLK_BUF_EXP_N
CLKIN_DMI_N
1
32 PCIE_CLK_CARD_REQ# 1 2 PCIE_REQ2# V10 BE18 CLK_BUF_EXP_P
PCIECLKRQ2#/GPIO20 CLKIN_DMI_P
RN
R2017 0R0402-PAD R2012 R2013
10KR2J-3-GP
10KR2J-3-GP
DIS_UMA
65 CLK_PCIE_W LAN# RN2013 20R4P2R-PAD
3 CLK_PCH_SRC3_N Y37 BJ30 CLK_BUF_CPYCLK_N 2 3 UMA_Muxless
CLK_PCH_SRC3_P Y36 CLKOUT_PCIE3N CLKIN_GND1_N CLK_BUF_CPYCLK_P
1 4 BG30 1 4
WLAN CLK 65 CLK_PCIE_W LAN
2
CLKOUT_PCIE3P CLKIN_GND1_P
UMA_DIS# 22
65 PCIE_CLK_W LAN_REQ# 1 2 PCIE_REQ3# A8 RN2008 DGPU_PRSNT#
PCIECLKRQ3#/GPIO25
RN
R2019 0R0402-PAD G24 CLK_BUF_DOT96_N SRN10KJ-5-GP

CLKIN_DOT_96N
1
9/3 LAN-->WLAN E24 CLK_BUF_DOT96_P UMA_DISCRETE#
CLKIN_DOT_96P R2010 R2011
B Y43 CLKOUT_PCIE4N B
PX_Muxless (UMA_DIS#, DGPU_PRSNT#)=(1, 1) => UMA
10KR2J-3-GP
10KR2J-3-GP
Y45 CLKOUT_PCIE4P
AK7 CLK_BUF_CKSSCD_N DIS_PX (UMA_DIS#, DGPU_PRSNT#)=(0, 1) => DIS
USB3.0 CLK PCIE_REQ4# L12
CLKIN_SATA_N
AK5 CLK_BUF_CKSSCD_P
2
PCIECLKRQ4#/GPIO26 CLKIN_SATA_P (UMA_DIS#, DGPU_PRSNT#)=(0, 0) => PX
0R4P2R-PAD (UMA_DIS#, DGPU_PRSNT#)=(1, 0) => Optimus(Muxless)
31,105 CLK_PCIE_INTEL_LAN# RN2015 2 3 CLK_PCH_SRC5_N V45 K45 CLK_BUF_REF14
CLK_PCH_SRC5_P CLKOUT_PCIE5N REFCLK14IN
31,105 CLK_PCIE_INTEL_LAN 1 4 V46 CLKOUT_PCIE5P
INTEL 31,105
LANPCIE_CLK_INTEL_LAN_REQ#
CLK 1 2 PCIE_REQ5# L14 PCIECLKRQ5#/GPIO44 CLKIN_PCILOOPBACK H45 CLK_PCI_FB 18
RN
R2014 0R0402-PAD
AB42 V47 XTAL25_IN

CLKOUT_PEG_B_N XTAL25_IN XTAL25_OUT RN2001
AB40 CLKOUT_PEG_B_P XTAL25_OUT V49
CLK_BUF_REF14 1 10 3D3V_S5 SRN10KJ-6-GP
PEG_B_CLKRQ# E6 CLK_BUF_CKSSCD_P 2 9 CLK_BUF_EXP_P 1 8PCIE_REQ7#
PEG_B_CLKRQ#/GPIO56 CLK_BUF_CKSSCD_N CLK_BUF_EXP_N
3 8 2 7PCIE_CLK_W LAN_REQ#
XCLK_RCOMP Y47 XCLK_RCOMP
1 2 1D05V_VTT 4 7 CLK_BUF_DOT96_N 3 6PCIE_CLK_INTEL_LAN_REQ#
75 CLK_PCIE_NEW # 2 3 CLK_PCH_SRC6_N V40 R2007 5 6 CLK_BUF_DOT96_P 4 5PCIE_REQ4#
CLK_PCH_SRC6_P CLKOUT_PCIE6N 90D9R2F-1-GP
75 CLK_PCIE_NEW 1 4 V42 CLKOUT_PCIE6P
RN2019 0R4P2R-PAD RN2009
75 PCIE_CLK_NEW _REQ# 1 2 PCIE_REQ6# T13 SRN10KJ-L3-GP
PCIECLKRQ6#/GPIO45
RN
R2020 0R0402-PAD
V38 K43 NEW CARD_PW R_EN 75 need very close to PCH RN2002
FLEX CLOCKS
CLKOUT_PCIE7N CLKOUTFLEX0/GPIO64 SRN10KJ-6-GP

V37 CLKOUT_PCIE7P
CLKOUTFLEX1/GPIO65 F47 1 8 PEG_B_CLKRQ#
PCIE_REQ7# K12 2 7 PCIE_CLK_NEW _REQ#
PCIECLKRQ7#/GPIO46
CLKOUTFLEX2/GPIO66 H47 3 6
Reserved for DDR3L AK14 4 5 EC_SW I#
CLKOUT_ITPXDP_N
AK13 CLKOUT_ITPXDP_P CLKOUTFLEX3/GPIO67 K49 DGPU_PRSNT#
9/8
A <Core Design> A
PANTHER-GP-NF
1bios.ru
3D3V_S0 RN2018 – Prioritize 27/14/24/48/25-MHz FLEX on FLEX1 and FLEX3 Wistron Corporation
SRN10KJ-5-GP 21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
1 4 PCIE_CLK_CARD_REQ#
– Do not configure 27/14/24/48/25-MHz FLEX clock on FLEX0 and FLEX2 Taipei Hsien 221, Taiwan, R.O.C.
2 3 PCIE_CLK_W W AN_REQ# if more than 2 PCI clocks + PCI loopback are routed.
Title
9/3
PCIECLKRQ1# and PCIECLKRQ2# PCH (PCI-E/SMBUS/CLOCK/CL)
Support S0 power only Custom
BAD50-HC -1
5 4 3 2 1
5 4 3 2 1
RTC_AUX_S5
SSID = PCH G RTCRST_ON 27
1
R2111 20KR2F-L-GP
1 2 D
1 2 R2127 R2175
RTC_X1 S RTC_RST#_S
1 2 100KR2J-1-GP
R2106 20KR2F-L-GP
RTC Reset
2
1 2 RTC_X2 Q2102 2K2R2J-2-GP
SC1U6D3V3KX-2GP
2
R2101 10MR2J-L-GP 2N7002K-2-GP
1
84.2N702.J31
11/03 RTC Reset
C2104
X2101
X-32D768KHZ-34GPU
2
D 82.30001.661 D
1
2nd = 82.30001.B21 G2101 PCH1A 1 OF 10 LPC_AD[0..3]
LPC_AD[0..3] 27,71,82
GAP-OPEN
1 4 RTC_X1 A20 C38 LPC_AD0
SB SEIKO suggest modify to 5P RTCX1 FWH0/LAD0
A38 LPC_AD1
FWH1/LAD1
LPC
C2101 RTC_X2 LPC_AD2
EPSON suggest modify to 6P C20 RTCX2 FWH2/LAD2 B37
1
1
C37 LPC_AD3
FWH3/LAD3
SC5P50V2CN-2GP
2 3 C2102 RTC_RST# D20

SC5P50V2CN-2GP RTCRST#
D36
SC1U6D3V3KX-2GP
LPC_FRAME# 27,71,82
2
2 1M1R2J-GP SRTC_RST# FWH4/LFRAME#

G22 SRTCRST#
R2104 E36
LDRQ0#
RTC
2 1 SM_INTRUDER# K22 K36
C2103 INTRUDER# LDRQ1#/GPIO23
RTC_AUX_S5 1 2 PCH_INTVRMEN C17 V5 INT_SERIRQ 27,82
2
INTVRMEN SERIRQ
R2122 R2105
DY 33R2J-2-GP HDA_SYNC
330KR2F-L-GP
HDA_BITCLK SATA0RXN AM3 SATA_RXN0 56
2 1 N34 AM1
29 HDA_CODEC_SYNC HDA_SDOUT HDA_BCLK SATA0RXP SATA_RXP0 56
HDD1
SATA 6G
29 HDA_CODEC_SDOUT 2 1 SATA0TXN AP7 SATA_TXN0 56
R2123 HDA_SYNC L34 AP5 SATA_TXP0 56
33R2J-2-GP HDA_SYNC SATA0TXP
INTVRMEN- Integrated SUS
29 HDA_SPKR T10 AM10 SATA_RXN1 66
1.05V VRM Enable SPKR SATA1RXN
AM8
29 HDA_CODEC_RST# 1 4 HDA_RST#
HDA_BITCLK
High - Enable internal VRs HDA_RST# K34 HDA_RST#
SATA1RXP
SATA1TXN AP11
SATA_RXP1
SATA_TXN1
66
66 M-SATA
29 HDA_CODEC_BITCLK 2 3 Low - Enable external VRs SATA1TXP AP10 SATA_TXP1 66
RN2102 29 HDA_SDIN0 E34 AD7
SRN33J-5-GP-U HDA_SDIN0 SATA2RXN
SATA2RXP AD5
G34 HDA_SDIN1 SATA2TXN AH5
C AH4 C
SATA2TXP
C34 HDA_SDIN2
IHDA
SATA3RXN AB8
A34 HDA_SDIN3 SATA3RXP AB10
Flash Descriptor Security Overide SATA3TXN AF3
SATA3TXP AF1
Low = Default 27 ME_UNLOCK 1 R2107 2 HDA_SDOUT A36 HDA_SDO
1KR2J-1-GP
SATA
HDA_SDOUT High = Enable SATA4RXN Y7 SATA_RXN4 56
+3VS_+1.5VS_HDA_IO Y5
SMARTCARD_DET C36 HDA_DOCK_EN#/GPIO33
SATA4RXP
SATA4TXN AD3
SATA_RXP4
SATA_TXN4
56
56 ODD
DY SATA4TXP AD1 SATA_TXP4 56
1 R2102 2 HDA_SDOUT N32 HDA_DOCK_RST#/GPIO13
1KR2J-1-GP Y3 SATA_RXN5 57
SATA5RXN
SATA5RXP Y1 SATA_RXP5 57
AB3
PCH_JTAG_TCK_BUF J3 JTAG_TCK
SATA5TXN
SATA5TXP AB1
SATA_TXN5
SATA_TXP5
57
57 ESATA
No Reboot Strap H7 Y11 1D05V_VTT
JTAG_TMS SATAICOMPO
JTAG
Low = Default K5 Y10 SATA_COMP R2112 1 2 37D4R2F-GP
JE40 modify JTAG_TDI SATAICOMPI
HDA_SPKR High = No Reboot
H1 1D05V_VTT
JTAG_TDO
SATA3RCOMPO AB12
AB13 SATA3_COMP R2113 1 2 49D9R2F-GP

+3VS_+1.5VS_HDA_IO SATA3COMPI
12/9 SB
1 R2103 2 1KR2J-1-GP HDA_SYNC 60 SPI_CLK_R T3 SPI_CLK SATA3RBIAS AH1 RBIAS_SATA3 R2114 1 2 750R2F-GP
R2109
B PCH_SPI_CS0# B
This signal has a weak internal pull down. 60 SPI_CS0#_R 1 2 Y14 SPI_CS0#
On Die PLL VR is supplied by 1.5V when 0R2J-2-GP
sampled high, 1.8 V when sampled low. 60 SPI_CS1#_R 1 R2115 2 PCH_SPI_CS1# T1 SPI_CS1#
SPI
DUAL ROM 0R2J-2-GP P3 SATA_LED# 68
Needs to be pulled High for Huron River platform. SATALED#
co-operate with R2310 60 SPI_SI_R V4 V14 SATA_DET#0
SPI_MOSI SATA0GP/GPIO21
60 SPI_SO_R U3 SPI_MISO SATA1GP/GPIO19 P1
2
EC2101
PLL ODVR VOLTAGE
SC4D7P50V2CN-1GP
PANTHER-GP-NF
DY
1
Low = 1.8V (Default)

HDA_SYNC High = 1.5V 3D3V_S0 3D3V_S0
12/15 SB R2108 RN2103
60 SPI_CLK_1 1 2 SRN10KJ-6-GP
DUAL ROM 0R2J-2-GP 1 8
22 PSW _CLR#
1
SATA_LED# 2 7
5V_S0 R2110 R2126 INT_SERIRQ 3 6
60 SPI_SI_1 1 2 1KR2J-1-GP SATA_DET#0 4 5
R2124 DUAL ROM 0R2J-2-GP
G 33R2J-2-GP H->Smart Card
2
R2116 SMARTCARD_DET
D HDA_SYNC_R 1 2HDA_SYNC 60 SPI_SO_1 1 2 L->Non Smart Card
1
DUAL ROM 0R2J-2-GP
HDA_CODEC_SYNC S R2125
1KR2J-1-GP
Q2101
2N7002K-2-GP DY
2
A 84.2N702.J31 <Core Design> A
HDA_SYNC:
1bios.ru
This strap is sampled on rising edge of RSMRST# and is used to sample 1.5V VccVRM supply mode. Wistron Corporation
1K external pull-up resistor is required on this signal on the board. Taipei Hsien 221, Taiwan, R.O.C.
Signal may have leakage paths via powered off devices (Audio Codec) and hence contend with the external pull-up.
Title
A blocking FET is recommended in such a case to isolate HDA_SYNC from the Audio Codec device until after the Strap sampling is complete. PCH_JTAG_TCK_BUF 1 R2121 2
4K7R2J-2-GP PCH (SPI/RTC/LPC/SATA/IHDA)
A3
BAD50-HC -1
5 4 3 2 1
5 4 3 2 1
3D3V_S0
RN2203
SSID = PCH
1 4 H_RCIN#
2 3 H_A20GATE Note:
For PCH debug with XDP, need to NO STUFF R2218
SRN10KJ-5-GP PCH1F 6 OF 10
GPIO27 has a weak[20K] internal pull up.
To enable on-die PLL Voltage regurator, S_GPIO T7 C40 SATA_ODD_PW RGT 56
BMBUSY#/GPIO0 TACH4/GPIO68
should not place external pull down.
27 EC_VPS_SMI# A42 TACH1/GPIO1 TACH5/GPIO69 B41 UMA_DIS# 20
D
3D3V_S5 DGPU_HPD_INTR# H36 C41 VRAM_SIZE1 D
TACH2/GPIO6 TACH6/GPIO70
27 EC_SCI# E38 TACH3/GPIO7 TACH7/GPIO71 A40 VRAM_SIZE2

1
R2220 Reserved for DDR3L ICC_EN# 9/7 C10

10KR2J-3-GP GPIO8
DY 56 SATA_ODD_PRSNT#
105 LAN_DIS# C4 LAN_PHY_PWR_CTRL/GPIO12 1D8V_S0
2
PCH_GPIO15 G2 P4 H_A20GATE 27
PCH_GPIO24 3D3V_S0 GPIO15 A20GATE HR:P18
1
AU16 H_PECI_R DY1 R2203 2
PECI H_PECI 5,27
1
1 R2202 2 SATA_ODD_PRSNT# U2 0R2J-2-GP

R2207 200KR2F-L-GP SATA4GP/GPIO16 R2221
RCIN# P5 H_RCIN# 27
100KR2J-1-GP 2K2R2J-2-GP
GPIO
Reserved for DDR3L 92,93 DGPU_PW ROK D40 AY11 H_CPUPW RGD 5,36,97
2
TACH0/GPIO17 PROCPWRGD
CPU/MISC
2
PCH_GPIO22 T5 AY10 PCH_THERMTRIP_R NV_CLE 1 2

0806 delete TP2202, TP2203 SCLOCK/GPIO22 THRMTRIP# H_SNB_IVB# 5
R2222
PCH_GPIO24 9/7 E8 T14 1KR2J-1-GP
GPIO24 INIT3_3V#
TP2203
TPAD14-OP-GP PCH_GPIO27 NV_CLE RN2205
1 E16 GPIO27 DF_TVS AY1
SRN56J-4-GP
SB
INTERNAL GFX EXTERNAL GFX PLL_ODVR_EN P8 GPIO28 1 4 1D05V_VTT
TS_VSS1 AH8 2 3
R2205 DY 10K 21 PSW _CLR# K1 STP_PCI#/GPIO34
JE40 delete FP function eSATA_DET# TS_VSS2 AK11 DY
K4 GPIO35
R2206 100K DY AH10 PCH_THERMTRIP_R 1 2
TS_VSS3 H_THERMTRIP# 5,36
2
DMI_OVRVLTG V8 R2204
C PassWord Clear
G2201 FDI_OVRVLTG
SATA2GP/GPIO36
TS_VSS4 AK10 390R2J-1-GP
SB 公公 check different , C
M5 SATA3GP/GPIO37 check need modify or not
GAP-OPEN 9/3 check list 390
MFG_MODE check intel , R2204
H L N2 P37
1
3D3V_S0 SLOAD/GPIO38 NC_1 Series-resistor of 390  ±5%
49 EDP#_LVDS M3 SDATAOUT0/GPIO39 TS Signal Disable Guideline:
EDP#_LVDS LVDS eDP
1
V13 BG2 TS_VSS1, TS_VSS2, TS_VSS3 and TS_VSS4

R2224 SDATAOUT1/GPIO48 VSS_NCTF_15#BG2
10KR2J-3-GP TPAD14-OP-GP
TP2211
T P2211 PCH_TEMP_ALERT#
should not float on the motherboard. They should
1 V3 SATA5GP/GPIO49/TEMP_ALERT# VSS_NCTF_16#BG48 BG48
NON_ESATA be tied to GND directly.
3D3V_S0 TPAD14-OP-GP
TP2210
T P2210 1 USB3_PW R_ON D6 BH3
2
GPIO57 VSS_NCTF_17#BH3
FDI TERMINATION VOLTAGE OVERRIDE
RN2201 eSATA_DET# BH47
SRN10KJ-5-GP VSS_NCTF_18#BH47
1
DGPU_HPD_INTR# 1 4 TPAD14-OP-GP
TP2206
T P2206 1 PCH_NCTF_1 A4 BJ4
EC_SCI# R2209 VSS_NCTF_1#A4 VSS_NCTF_19#BJ4 GPIO37 LOW - Tx, Rx terminated to same voltage
2 3
NCTF
10KR2J-3-GP A44 BJ44 FDI_OVRVLTG (FDI_OVRVLTG) (DC Coupling Model DEFAULT)
VSS_NCTF_2#A44 VSS_NCTF_20#BJ44
ESATA
1
A45 BJ45
2
VSS_NCTF_3#A45 VSS_NCTF_21#BJ45 R2208

RN2202 TPAD14-OP-GP
TP2208
T P2208 1 PCH_NCTF_3 A46 BJ46 10KR2J-3-GP
PCH_TEMP_ALERT# VSS_NCTF_4#A46 VSS_NCTF_22#BJ46
1 8
2 7 A5 BJ5
2
MFG_MODE VSS_NCTF_5#A5 VSS_NCTF_23#BJ5
3 6
S_GPIO 4 5 A6 BJ6 DMI TERMINATION VOLTAGE OVERRIDE
VSS_NCTF_6#A6 VSS_NCTF_24#BJ6
A4,A44,A45,A46,A5,A6,B3,B47,
BJ45,BJ46,BJ5,BJ6,C2,C48,D1,
BD1,BD49,BE1,BE49,BF1,BF49,
BG2,BG48,BH3,BH47,BJ4,BJ44,
SRN10KJ-6-GP B3 C2
3D3V_S5 VSS_NCTF_7#B3 VSS_NCTF_25#C2
B B
B47 C48 GPIO36 LOW - Tx, Rx terminated to same voltage
VSS_NCTF_8#B47 VSS_NCTF_26#C48
(DMI_OVRVLTG) (DC Coupling Model DEFAULT)
D49,E1,E49,F1,F49
RN2204 BD1 D1
USB3_PW R_ON VSS_NCTF_9#BD1 VSS_NCTF_27#D1
8 1
NCTF TEST PIN:

LAN_DIS# 7 2 BD49 D49
VSS_NCTF_10#BD49 VSS_NCTF_28#D49
6 3
5
9/3
4 BE1 VSS_NCTF_11#BE1 VSS_NCTF_29#E1 E1 Integrated Clock Enable functionality is achieved
SRN10KJ-6-GP BE49 E49 DMI_OVRVLTG via soft-strap. The default is integrated clock
VSS_NCTF_12#BE49 VSS_NCTF_30#E49 enable.
1
TPAD14-OP-GP
TP2207
T P2207 1 PCH_NCTF_2 BF1 F1
VSS_NCTF_13#BF1 VSS_NCTF_31#F1 R2210
PCH_GPIO15 1 R2201 2 TPAD14-OP-GP
TP2209
T P2209 1 PCH_NCTF_4 BF49 F49 10KR2J-3-GP
1KR2J-1-GP VSS_NCTF_14#BF49 VSS_NCTF_32#F49
Integrated Clock Chip Enable
2
PANTHER-GP-NF
VRAM Frequency VRAM Size ICC_EN# HIGH (R2211 DY)- DISABLED [DEFAULT]
3D3V_S0 PCH_GPIO22=1 : 800MHZ 0909
3D3V_S0 LOW (R2211)- ENABLED
PCH_GPIO22=0 : 900MHZ 3D3V_S5
GPIO8 has a weak[20K] internal pull up.
1
Integrated Clock Enable functionality is achieved

1
R2218
via soft-strap. The default is integrated clock
1
10KR2J-3-GP R2214 R2216

10KR2J-3-GP
2G 1G enable.
10KR2J-3-GP
10KR2J-3-GP
R2223
2
UMA_VRAM800MHZ
2
A <Core Design> A
2
ICC_EN#
PCH_GPIO22 VRAM_SIZE1 PLL ON DIE VR ENABLE
2
1bios.ru
VRAM_SIZE2
Wistron Corporation
1
R2211 NOTE:This signal has a weak internal pull-up 20K

1
R2219 1KR2J-1-GP 21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,

10KR2J-3-GP R2215 R2217
ENABLED -- HIGH (R2212 UNSTUFFED) DEFAULT Taipei Hsien 221, Taiwan, R.O.C.
DY DISABLED -- LOW (R2212 STUFFED)
10KR2J-3-GP
10KR2J-3-GP
Title
2
PCH (GPIO/CPU)
2
VRAM900MHZ PLL_ODVR_EN Size Document Number Rev

1G_512M 2G_512M 1 R2212 2
1KR2J-1-GP A3
DY BAD50-HC -1
5 4 3 2 1
5 4 3 2 1
SSID = PCH 6A 3D3V_S0

R2301
0R2J-2-GP
1 2
DIS
D
1D05V_VTT
PCH1G POWER 7 OF 10 (0.1uF/0.01uF x1)
R2315 3D3V_DAC_S0
D
(10uF x1_0603)
1.3A 0R5J-5-GP
AA23 U48 +VCCA_DAC_1_2 1 2
VCCCORE1 VCCADAC
AC23 VCCCORE2 UMA_PX_Muxless
1
(1uFx3) AD21 C2313 C2314 C2315
CRT
VCCCORE3
SCD01U16V2KX-3GP
SCD1U10V2KX-5GP
SC10U6D3V5KX-1GP
(10uFx1_0603) C2301 C2302 C2303 C2304 AD23 U47 DY
VCCCORE4 VSSADAC
SC10U6D3V5KX-1GP
AF21
2
VCC CORE
VCCCORE5
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
AF23
2
VCCCORE6 R2304 3D3V_S0
AG21 VCCCORE7 UMA_PX_Muxless UMA_PX_Muxless
AG23 0.001A 0R3J-0-U-GP
VCCCORE8 +3VS_VCCA_LVDS
AG24 VCCCORE9 VCCALVDS AK36 2 1
AG26 VCCCORE10 U2301 for ANNIE flicker issue
AG27 VCCCORE11 VSSALVDS AK37 1 2 UMA_PX_Muxless
AG29 DIS R2312 for don't flicker solution
VCCCORE12 R2303
AJ23 VCCCORE13 1D8V_S0
LVDS
AJ26 AM37 0R2J-2-GP R2305
VCCCORE14 VCCTX_LVDS1 0R5J-5-GP
AJ27 VCCCORE15 +1.8VS_VCCTX_LVDS
0.06A
AJ29 VCCCORE16 VCCTX_LVDS2 AM38 1 2 3.3V CRT LDO
AJ31 VCCCORE17
2
VCCTX_LVDS3 AP36 UMA_PX_Muxless
UMA_PX_Muxless UMA_PX_Muxless
2
1D05V_VTT R2309 C2316 C2317 C2318 (0.01uF x2)
SC1U25V3KX-1-GP
AP37 DIS 0R2J-2-GP DY (22uF x1)
VCCTX_LVDS4
SCD01U16V2KX-3GP
SCD01U16V2KX-3GP
AN19
1
VCCIO28 5V_S0 3D3V_DAC_S0
1
U2301
JE40 modify BJ22
1D05V_VTT VCCAPLLEXP
1 IN OUT 5
SC1U6D3V2KX-GP
C
2.925A(Total current of VCCIO) V33 C2311 2 C
VCC3_3_6 GND
SC1U10V2KX-1GP
HVCMOS
AN16 VCCIO15 3 EN NC#4 4
3D3V_S0
1
DY AN17 VCCIO16
1
1
C2306 C2307 C2308 C2309 V34 AME8818BEEV330Z-GP C2312 C2327
VCC3_3_7
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
(0.1uFx1) 74.08818.B3F
2
1
SC10U6D3V3MX-GP
AN21
2ND = 74.70233.03F
2
2
VCCIO17 C2319
AN26 SCD1U10V2KX-5GP
2
VCCIO18
AN27 VCCIO19 VCCVRM3 AT16 VCCVRM
AP21 1D05V_VTT
VCCIO20
(1uF x4) AP23 AT20 JE40 modify
VCCIO21 VCCDMI1
(1uF x1)
1
DMI
AP24 VCCIO22
VCCIO
C2320 L2303
0.266A (Totally VCC3_3 current) AP26 AB36 SC1U6D3V2KX-GP IND-10UH-218-GP
2
VCCIO23 VCCCLKDMI
68.10050.10Y
AT24 2nd = 68.10090.10B 1D05V_VTT
3D3V_S0 VCCIO24
0.02A
+1.05VS_VCC_DMI_CCI 1 2
AN33 VCCIO25
1
SCD1U10V2KX-5GP
SC1U6D3V2KX-GP
SC10U6D3V5KX-1GP
(0.1uF x1) C2321 C2325 (1uFx1)
1
C2310 AN34 AG16 DY (10uFx1)

VCCIO26 VCCDFTERM1
0.159A(Totally current of VCCVRM)
2
2
BH29 VCC3_3_3 VCCDFTERM2 AG17

B B
DFT / SPI
VCCDFTERM3 AJ16
VCCVRM 1D8V_S0
VCCVRM AP16 VCCVRM2 0.19A JE40 modify
VCCDFTERM4 AJ17
1D5V_S0 1 2
1
R2316 0R3J-0-U-GP BG6 C2326 C2322
VCCAFDIPLL SCD1U10V2KX-5GP SCD1U10V2KX-5GP
1 2 0806 check VCCAFDIPLL
1D8V_S0
2
R2317 DY 0R3J-0-U-GP 1D05V_VTT AP17 VCCIO27
V1
FDI
VCCSPI
1D05V_VTT AU20 VCCDMI2 0.02A

0.042A (Totally current of VCCDMI) JE40 modify
3D3V_S5
(1uFx1)
1
PANTHER-GP-NF
C2323
SC1U6D3V2KX-GP
71.PANTH.00U
A <Core Design> A
1bios.ru
Wistron Corporation
Title
PCH (POWER1)
A3
BAD50-HC -1
5 4 3 2 1
5 4 3 2 1
SSID = PCH TP17 TPAD14-OP-GP

PCH1J POWER 10 OF 10 1D05V_VTT
1 VCCACK AD49 N26

VCCACLK VCCIO29
(1uFx1)
1
0.002A VCCIO30 P26
C2423
3D3V_S5 T16 VCCDSW3_3
P28 SC1U6D3V2KX-GP
2
VCCIO31
(10uFx1) (0.1uFx1)
(1uFx1) V12 DCPSUSBYP VCCIO32 T27
3D3V_S5 5V_S5
VCCIO33 T29
D T38 3D3V_S5 D
3D3V_S0
A
VCC3_3_5
0.097A (Totally current of VCCSUS3_3)
1
C2402 TP19 TPAD14-OP-GP T23 83.R0304.D8F D2401
SC1U10V2KX-1GP VCCSUS3_3_7
1VCCAPLLDMI2 BH23 VCCAPLLDMI2
(0.1uFx1) 2nd = 83.R3004.A8F CH751H-40-1-GP
1
T24 C2424
2
VCCSUS3_3_8 SCD1U10V2KX-5GP
1D05V_VTT (10uFx1) AL29
K
VCCIO14
V23 1 2
2
VCCSUS3_3_9
USB
R2408
AL24 V24 3D3V_S5 10R2J-2-GP (0.1uFx1)
DCPSUS3 VCCSUS3_3_10
1
P24 C2426
VCCSUS3_3_6 SCD1U10V2KX-5GP
(0.1uFx1)
2
1
AA19 VCCASW1
T26 1D05V_VTT C2425
VCCIO34 SCD1U10V2KX-5GP
AA21
2
VCCASW2
+5VA_PCH_VCC5REFSUS
0.001A
AA24 VCCASW3 V5REF_SUS M26
AA26 TP21 TPAD14-OP-GP 3D3V_S0 5V_S0
Clock and Miscellaneous

VCCASW4 DCPSUS4
DCPSUS4 AN23 1
1D05V_M AA27
A
VCCASW5
1.01A (Total current of VCCASW) VCCSUS3_3_1 AN24 3D3V_S5
D2402
AA29 VCCASW6 DY
CH751H-40-1-GP
AA31 VCCASW7
1
C2403 C2404 C2406 C2407 C2408 0.001A
K
DY AC26 P34 +5VS_PCH_VCC5REF 1 2
VCCASW8 V5REF R2407 (1uFx1)
2
2
SC10U6D3V5KX-1GP
SC10U6D3V5KX-1GP
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
AC27 10R2J-2-GP
VCCASW9
1
C N20 3D3V_S5 C
VCCSUS3_3_2 C2427
PCI/GPIO/LPC
AC29 VCCASW10
N22 JE40 modify SC1U10V2KX-1GP
2
VCCSUS3_3_3
AC31 VCCASW11
(1uFx1)
1
VCCSUS3_3_4 P20
AD29 C2428 JE40 modify 07/16
VCCASW12 SC1U6D3V2KX-GP
P22
2
VCCSUS3_3_5
(22uFx2_0603) AD31 VCCASW13
1D05V_VTT
0.08A (1uFx1) (1uFx3)
3D3V_S0
(220uFx1) W21 VCCASW14 VCC3_3_1 AA16
R2414
1 2 +1.05VS_VCCA_A_DPL W23 W16 909R2F-GP
IND-10UH-218-GP VCCASW15 VCC3_3_8
(0.1uFx2) 3D3V_S5 1 2 1D5V_S5
1
1
L2402 W24 T34 DY
C2409 VCCASW16 VCC3_3_4 C2430 C2431
68.10050.10Y
1
2nd = 68.10090.10B SC1U6D3V2KX-GP W26 SCD1U10V2KX-5GP SCD1U10V2KX-5GP
2
2
VCCASW17 R2402
W29 3D3V_S0 750R2F-GP
VCCASW18
0.08A (1uFx1) DY
(220uFx1) W31 AJ2
2
+1.05VS_VCCA_B_DPL VCCASW19 VCC3_3_2
1 2 (0.1uFx1)
1
IND-10UH-218-GP W33 VCCASW20
1
L2403 AF13 C2429

C2410 VCCIO5 SCD1U10V2KX-5GP 3D3V_S5
68.10050.10Y
2
2nd = 68.10090.10B SC1U6D3V2KX-GP +VCCRTCEXT N16 U2401 1D5V_S5
2
DCPRTC 1D05V_VTT
0.16A (Totally current of VCCVRM VCCIO12 AH13
1
1 VIN VOUT 5
C2411 (0.1uFx1) VCCVRM Y49 AH14 2
SCD1U10V2KX-5GP VCCVRM4 VCCIO13 GND
(1uFx1) 3 4
2
EN NC#4
1
B C2416 C2405 B
AF14 C2432
VCCIO6
SC1U10V3ZY-6GP
+1.05VS_VCCA_A_DPL BD47 SC1U6D3V2KX-GP C2436 G9090-150T11U-GP
2
VCCADPLLA
SC10U6D3V5KX-1GP
SATA
AK1 VCCAPLLSATA 1 TPAD14-OP-GP
SC1U10V3ZY-6GP
1D05V_VTT +1.05VS_VCCA_B_DPL VCCAPLLSATA TP27
BF47 74.09090.A3F
2
VCCADPLLB
JE40 modify 07/16 C2412 AF11 VCCVRM
SC1U6D3V2KX-GP JE40 modify VCCVRM1
AF17 VCCIO7
1D05V_VTT 1 2 (1uFx1) AF33 VCCDIFFCLKN1
AF34 VCCDIFFCLKN2 VCCIO2 AC16
(1uFx1) 0.055A AG34 VCCDIFFCLKN3
AC17 1D05V_VTT
VCCIO3
1
C2413 0.095A
C2414 1D05V_VTT SC1U6D3V2KX-GP JE40 modify AG33 AD17 JE40 modify
SC1U6D3V2KX-GP VCCSSC VCCIO4
1 2 (1uFx1) (1uFx1)
2
1
+3VS_+1.5VS_HDA_IO
2 1 +VCCSST V16 C2435
1D05V_M DCPSST 1D05V_M SC1U6D3V2KX-GP
(0.1uFx1)
2
C2415 1 2 3D3V_S5
1 R2416 2 SCD1U10V2KX-5GP T17 DCPSUS1 VCCASW22 T21 R2409 DY 0R3J-0-U-GP
DY 0R2J-2-GP 1D05V_M_DCPSUS V19 DCPSUS2
1
MISC
1 2 1D5V_S0
C2421 V21 R2415 DY 0R3J-0-U-GP
VCCASW23
DY SC1U6D3V2KX-GP
2
1D05V_VTT
CPU
BJ8 V_PROC_IO 1 2 1D5V_S5

T19 +3VS_+1.5VS_HDA_IO R2413 0R3J-0-U-GP
VCCASW21
(0.1uFx2)
SCD1U10V2KX-5GP
1
A (4.7uFx1_0603) C2418 0.01A <Core Design> A

SCD1U10V2KX-5GP
HDA
C2417 DY C2419 A22 P32

RTC
SC4D7U6D3V3KX-GP VCCRTC VCCSUSHDA

(0.1uFx1)
2
1
RTC_AUX_S5
1bios.ru
6uA PANTHER-GP-NF C2433 Wistron Corporation
SCD1U10V2KX-5GP 21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
2
(0.1uFx2) 71.PANTH.00U
1
(1uFx1) Title
C2420
SC1U6D3V2KX-GP PCH (POWER2)
2

A3
DY BAD50-HC -1
5 4 3 2 1
5 4 3 2 1
SSID = PCH PCH1I 9 OF 10
AY4 VSS159 VSS259 H46

AY42 VSS160 VSS260 K18
B11 VSS163 VSS263 K46
B15 VSS164 VSS264 K7
B19 VSS165 VSS265 L18
B23 VSS166 VSS266 L2
B27 VSS167 VSS267 L20
D B31 VSS168 VSS268 L26 D
PCH1H 8 OF 10 B35 L28
VSS169 VSS269
H5 VSS0 B39 VSS170 VSS270 L36
B7 VSS171 VSS271 L48
AA17 VSS1 VSS80 AK38 F45 VSS172 VSS272 M12
AA2 VSS2 VSS81 AK4 BB12 VSS173 VSS273 P16
AA3 VSS3 VSS82 AK42 BB16 VSS174 VSS274 M18
AB11 VSS6 VSS85 AL16 BB24 VSS177 VSS277 M30
AB7 VSS12 VSS91 AL26 BC14 VSS183 VSS283 M46
AC19 VSS13 VSS92 AL27 BC18 VSS184 VSS284 M8
AC2 VSS14 VSS93 AL31 BC2 VSS185 VSS285 N18
AC21 VSS15 VSS94 AL33 BC22 VSS186 VSS286 P30
AC24 VSS16 VSS95 AL34 BC26 VSS187 VSS287 N47
AC33 VSS17 VSS96 AL48 BC32 VSS188 VSS288 P11
AC34 VSS18 VSS97 AM11 BC34 VSS189 VSS289 P18
AC48 VSS19 VSS98 AM14 BC36 VSS190 VSS290 T33
AD10 VSS20 VSS99 AM36 BC40 VSS191 VSS291 P40
AD13 VSS23 VSS102 AM45 BD46 VSS194 VSS294 P7
AD19 VSS24 VSS103 AM46 BD5 VSS195 VSS295 R2
AD24 VSS25 VSS104 AM7 BE22 VSS196 VSS296 R48
C AD26 AN2 BE26 T12 C
AD27 VSS27 VSS106 AN29 BE40 VSS198 VSS298 T31
AD33 VSS28 VSS107 AN3 BF10 VSS199 VSS299 T37
AD34 VSS29 VSS108 AN31 BF12 VSS200 VSS300 T4
AD36 VSS30 VSS109 AP12 BF16 VSS201 VSS301 W34
AD37 VSS31 VSS110 AP19 BF20 VSS202 VSS302 T46
AD4 VSS34 VSS113 AP32 BF26 VSS205 VSS305 V11
AD42 VSS36 VSS115 AP4 BD3 VSS207 VSS307 V26
AD8 VSS40 VSS119 AR2 BF8 VSS211 VSS311 V36
AE2 VSS41 VSS120 AR48 BG17 VSS212 VSS312 V39
AE3 VSS42 VSS121 AT11 BG21 VSS213 VSS313 V43
AF10 VSS43 VSS122 AT13 BG33 VSS214 VSS314 V7
AF12 VSS44 VSS123 AT18 BG44 VSS215 VSS315 W17
AD14 VSS45 VSS124 AT22 BG8 VSS216 VSS316 W19
AD16 VSS46 VSS125 AT26 BH11 VSS217 VSS317 W2
AF16 VSS47 VSS126 AT28 BH15 VSS218 VSS318 W27
AF19 VSS48 VSS127 AT30 BH17 VSS219 VSS319 W48
AF24 VSS49 VSS128 AT32 BH19 VSS220 VSS320 Y12
AF26 VSS50 VSS129 AT34 H10 VSS221 VSS321 Y38
B B
AF4 VSS55 VSS134 AU24 BH39 VSS226 VSS328 BG29
AF42 VSS56 VSS135 AU30 BH43 VSS227 VSS329 N24
AF46 VSS57 VSS136 AV16 BH7 VSS228 VSS330 AJ3
AF5 VSS58 VSS137 AV20 D3 VSS229 VSS331 AD47
AF7 VSS59 VSS138 AV24 D12 VSS230 VSS333 B43
AF8 VSS60 VSS139 AV30 D16 VSS231 VSS334 BE10
AG19 VSS61 VSS140 AV38 D18 VSS232 VSS335 BG41
AG2 VSS62 VSS141 AV4 D22 VSS233 VSS337 G14
AG31 VSS63 VSS142 AV43 D24 VSS234 VSS338 H16
AG48 VSS64 VSS143 AV8 D26 VSS235 VSS340 T36
AH11 VSS65 VSS144 AW14 D30 VSS236 VSS342 BG22
AH3 VSS66 VSS145 AW18 D32 VSS237 VSS343 BG24
AH36 VSS67 VSS146 AW2 D34 VSS238 VSS344 C22
AH39 VSS68 VSS147 AW22 D38 VSS239 VSS345 AP13
AH40 VSS69 VSS148 AW26 D42 VSS240 VSS346 M14
AH42 VSS70 VSS149 AW28 D8 VSS241 VSS347 AP3
AH46 VSS71 VSS150 AW32 E18 VSS242 VSS348 AP1
AH7 VSS72 VSS151 AW34 E26 VSS243 VSS349 BE16
AJ19 VSS73 VSS152 AW36 G18 VSS244 VSS350 BC16
AJ21 VSS74 VSS153 AW40 G20 VSS245 VSS351 BG28
AJ24 VSS75 VSS154 AW48 G26 VSS246 VSS352 BJ28
AJ33 VSS76 VSS155 AV11 G28 VSS247
AJ34 VSS77 VSS156 AY12 G36 VSS248
AK12 VSS78 VSS157 AY22 G48 VSS249
AK3 VSS79 VSS158 AY28 H12 VSS250
H18 VSS251
PANTHER-GP-NF H22 VSS252
H24 VSS253
A H26 VSS254 <Core Design> A
H30 VSS255
H32 VSS256
1bios.ru
H34
F3
VSS257
VSS258
Wistron Corporation
PANTHER-GP-NF Title
PCH (VSS)
A3
BAD50-HC -1
5 4 3 2 1
5 4 3 2 1
D D
C C
B B
<Core Design>
A
1bios.ru
Title
Clock(colay)
A4
BAD50-HC -1
5 4 3 2 1
5 4 3 2 1
3D3V_AUX_S5
3D3V_S5
3D3V_AUX_KBC
SSID = KBC
4
3
3D3V_AUX_KBC
PCB VERSION A/D(PIN98) PULL-LOW RESISTOR PULL-HIGH RESISTOR VOLTAGE RN2717
SRN4K7J-8-GP
1
SA 100.0K 10.0K 3.0V
R2724
3D3V_S0 47KR2J-2-GP SB 100.0K 20.0K 2.75V
R1
1
2
Q2703
SC 100.0K 33.0K 2.48V
2
0628 Modify: SML1_CLK_C 6 1
Move R2771 to closed 3D3V_AUX_KBC power SML1_CLK 20
-1 100.0K 47.0K 2.24V
1
rail base on layout placement. PCB_VER_AD 5 2
C2702 C2713 R2 -1M 100.0K 64.9K 2.0V
1
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
SC2D2U10V3KX-1GP
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP SC2200P50V2KX-2GP 2N7002KDW-GP 4 3
2
SC2200P50V2KX-2GP
C2704
C2705
C2706
C2707
C2708
C2710
R2726 -2 100.0K 76.8 1.87V 84.2N702.A3F
1
1
C2709
100KR2F-L1-GP
D C2701 -3 100.0K 100.0K 1.65V

D
SC2D2U10V3KX-1GP
DY SML1_DATA 20
2
2
DY C2711
115
102
SC220P50V2KX-3GP SML1_DATA_C
19
46
76
88
4
U2701A 1 OF 2 1 2 5V_CHARGER
DY Vad=3.3*(R2/(R1+R2))
VCC
VCC
VCC
VCC
VCC
AVCC
VDD
40 AD_IA
1
104 7 PLT_RST# 5,18,31,32,36,65,66,71,75,82,83,97,105
C2714 VREF LRESET#
1DY 2 SCD1U10V2KX-5GP 2 CLK_PCI_KBC 18,82 R2706
LCLK 10KR2J-3-GP
PCB_VER_AD
97
GPIO90/AD0 LFRAME#
3
LPC_AD3
LPC_FRAME# 21,71,82 DY
98 1
ADT_TYPE GPIO91/AD1 LAD3 LPC_AD2 3D3V_AUX_KBC 3D3V_AUX_KBC 3D3V_AUX_S5
99 128 LPC_AD[0..3] 21,71,82
2
GPIO92/AD2 LAD2
1
100 127 LPC_AD1 R2772
1103RTC rest 21 RTCRST_ON GPIO93/AD3 LAD1
126 LPC_AD0 FC2715 ILIM_SEL 3D3V_AUX_S5 0R0805-PAD
LAD0
39 BAT_SEL_A/B# 101 125 INT_SERIRQ 21,82 SC4D7P50V2CN-1GP 0209 SC 1 2
2
TPAD14-OP-GP TP2703 AOAC_EN 9/7 GPIO94/DA0 SERIRQ VBKUP
1 105 8 PM_CLKRUN# 19,82 1 2
51 HDMI_DVI_IN 106
GPIO95/DA1 GPIO11/CLKRUN#
9 PANEL_BLEN 94
DY R2756
GPIO96/DA2 GPIO65/SMI#
2
29 ECSCI#_KBC 9/19 0R0402-PAD
ECSCI#/GPIO54 FOR RF R2704
0209 SC GPIO10/LPCPD#
124
ECSWI#_KBC
BD_HDMI_IN 104
19 SUS_PWR_ACK 79
KBC_GPIO3 95 GPIO2 GPIO67/PWUREQ#
123 DY 330KR2J-L1-GP
1128 SB 104 BD_AC_IN# 1 2
GPIO3/AD6 GPIO85/GA20
121 H_A20GATE 22 3D3V_AUX_S5 1 2
41 5V_CHARGER_EN R2703 96 122 H_RCIN# 22 U2701B 2 OF 2
KCOL[0..16] 69
1
0R0402-PAD MODEL_ID 108 GPIO4/AD5 KBRST#/GPIO86 R2760
EC_GPIO6 GPIO5/AD4 KCOL0 0R2J-2-GP
93 28 FAN_TACH1 31 53
PSL_IN2#_GPIO6 GPIO56/TA1 KBSOUT0/JENK# KCOL1 EC_GPIO6
70 LID_CLOSE# 94 27 BLON_OUT 49 19,97 PM_PWRBTN# 117 52 82 KBC_PWRBTN# 2 1
TPAD14-OP-GP TP2704 GPIO7/AD7 GPIO52/PSDAT3/RDY# GPIO20/TA2 KBSOUT1/TCK
1 RTC_AUX_S5_KBC 114 25 12/27 SB 82 INSTANT_VIEW_BTN# 63 51 KCOL2
GPIO16 GPIO50/PSCLK3/TDO NCT5605Y_WAKE# GPIO14/TB1 KBSOUT2/TMS KCOL3 R2757
38 AD_OFF 6 11 19,29,36,37,47,75,82 PM_SLP_S3# 64 50
GPIO24 GPIO27/PSDAT2 GPIO01/TB2 KBSOUT3/TDI KCOL4 470R2J-2-GP
86 DGPUHOT 109
GPIO30 GPIO26/PSCLK2
10 ILIM_SEL 82 KBSOUT4/JEN0#
49 DY
1
36,97,107 S5_ENABLE 14 71 TPDATA 69 12/27 SB 68 CHARGE_LED 32 48 KCOL5 20 EC_SWI# 1 R2758 2ECSWI#_KBC C2717
GPIO34/CIRRXL GPIO35/PSDAT1 GPIO15/A_PWM KBSOUT5/TDO
SC220P50V2KX-3GP
9/7 1128 SB KCOL6 0R2J-2-GP G2701
51 HDMI_IN 15
GPIO36 GPIO37/PSCLK1
72 TPCLK 69 <------ TP 29 KBC_BEEP 118
GPIO21/B_PWM KBSOUT6/RDY#
47
KCOL7
DY
39 BAT_A_IN# 80 62 43 GAP-OPEN
2
GPIO41 82 USB_CHARGER_CTL1 GPIO13/C_PWM KBSOUT7 KCOL8
17 82 USB_CHARGER_CTL2 65 42 22 EC_SCI# 1 2ECSCI#_KBC
GPIO42/TCK GPIO32/D_PWM KBSOUT8 KCOL9 R2759 0R0402-PAD
19 RSMRST#_KBC 20 70 BAT_SCL 39,40,104 <------ BATTERY / CHARGER 28 FAN1_PWM 81 41
2
GPIO43/TMS GPIO17/SCL1 GPIO66/G_PWM KBSOUT9/SDP_VIS# KCOL10
19,46 PM_SLP_S4# 21 69 BAT_SDA 39,40,104 82 MUTE_LED 66 40
GPIO44/TDI GPIO22/SDA1 SML1_CLK_C GPIO33/H_PWM KBSOUT10/P80_CLK KCOL11
21 ME_UNLOCK 23 67 SML1_CLK_C 39,51,79,86 <------PCH / EDP 68 STDBY_LED 22 39
GPIO46/CIRRXM/TRST# GPIO73/SCL2 SML1_DATA_C GPIO45/E_PWM KBSOUT11/P80_DAT KCOL12
39 BAT_B_IN# 26 68 SML1_DATA_C 39,51,79,86 68,82 PWRLED 16 38
GPIO51 GPIO74/SDA2 SMB2_CLK GPIO40/F_PWM KBSOUT12/GPIO64 KCOL13
40 AC_IN# 73 119 37
TPAD14-OP-GPTP2716
T P2716 PSL_IN1_GPIO70 GPIO23/SCL3 KBSOUT13/GPIO63
1 EC_ENABLE 74 120 SMB2_DAT 36 KCOL14 KCOL17 69 1
VBKUP PSL_OUT_GPIO71 GPIO31/SDA3 PROCHOT_EC ECRST# 85 KBSOUT14/GPIO62 KCOL15
75 24 35
VBKUP GPIO47/SCL4 VCC_POR# KBSOUT15/GPIO61/XOR_OUT KCOL16
86 dGPU_ALARM 82
GPIO75 GPIO53/SDA4
28 BD_DVI_IN 104 GPIO60/KBSOUT16
34
KCOL17 TP2701 TPAD14-OP-GP
DY 3
19,36,45 PM_SLP_LAN# 83 33 1
9/7 GPO76/SHBM GPIO57/KBSOUT17
19,42 S0_PWR_GOOD 84 65,66 E51_RxD 113 KROW[0..7] 69 2
GPIO77 GPIO87/CIRRXM/SIN_CR KROW0
60 SPI_WP2# 91 65,66 E51_TxD 111 54
GPIO81 GPIO83/SOUT_CR/TRIST# KBSIN0 KROW1
57,107 USB_PWR_EN# 110 55
GPO82/IOX_LDSH/TEST# KBSIN1 KROW2 D2701
112 90 30 56
C 0604 Modify:
19 AC_PRESENT
EC_GPIO97 107
GPIO84/IOX_SCLK/XORTR#
GPIO97
F_CS0#
F_SCK
F_SDI/F_SDIO1
92
86
87
SPICS#
SPICLK
SPIDI
60
60
60
29 AMP_MUTE#
19 PCH_SUSCLK_KBC 77
GPIO55/CLKOUT/IOX_DIN_DIO
GPIO00/EXTCLK
KBSIN2
KBSIN3
KBSIN4
57
58
59
KROW3
KROW4
KROW5
BAT54S-5-GP
83.BAT54.P81
2nd = 83.BAT54.N81
C
RN2704 pull-Low 10K Resistor to DY F_SDIO/F_SDIO0 SPIDO 60 KBSIN5
KBC_VCORF 44 5,22 H_PECI R2721 1 2 43R2J-GP PECI13 60 KROW6
on BLUETOOTH_EN. VCORF PECI KBSIN6 KROW7
1D05V_VTT 12 61
1
AGND VTT KBSIN7

C2712
GND
GND
GND
GND
GND
GND
1
SC1U10V3ZY-6GP NPCE795PA0DX-GP-U
2
3D3V_S0 C2716
SCD1U16V2KX-3GP
RN2708
18
45
78
89
116
5
103
2
SRN10KJ-6-GP 9/15 NPCE795PA0DX-GP-U 1ST = 71.00885.A0G
1 8 NOTE: 3D3V_AUX_S5 3D3V_S5
2 7
EC_VPS_SMI# 22 1ST = 71.00885.A0G
Locate resistors R2719 and R2722 close
3 6 PowerSmartBTN# NPCE885
4 5 to the NPCE791L.
FAN_TACH1 28
1 2 E51_RxD
R2789 DY 10KR2J-3-GP
NOTE:
SB LID_CLOSE# can not pull high, because push pull 1 2 BD_IN#
Connect GND and AGND planes via either R2791 10KR2J-3-GP
3D3V_AUX_KBC suggest RN2708 Pin5 change FAN_TACH1 0R resistor or one point layout connection.
RN2707 3D3V_AUX_S5
SRN100KJ-6-GP SPIDI 3D3V_AUX_S5
STOP_CHG#
9/15
1 4
1
2 3 ECRST#
U2702
R2773
R2786
100KR2J-1-GP 1
PM_SLP_A# RN2709 GND
2 1 3
2
1
SRN10KJ-5-GP PURE_HW_SHUTDOWN# VCC 3D3V_AUX_KBC
DY 2
E
C2715 RESET#
10KR2F-2-GP
1 4
SC1U6D3V2KX-GP
28,36,86 PURE_HW_SHUTDOWN# 2 3 PURE_HW_SHUTDOWN#_R B
1
G690L293T73UF-GP
DY DY
C
0604 Modify: Q2701 10KR2J-3-GP
Add Pull down 100k ohm at F_SDI for Power consumption concern. MMBT3906-4-GP Prevent BIOS data loss R2725
84.T3906.A11
2
R2770 RN2715
2nd = 84.03906.F11
1KR2J-1-GP SRN100KJ-6-GP 3D3V_S0 MODEL_ID
B 1 2 AD_OFF 1 4
B
1
RSMRST#_KBC2 3
R2727
RN2703 3D3V_AUX_KBC 100KR2F-L1-GP
SRN10KJ-5-GP
RN2712 1 4 AMP_MUTE#
2
SRN100KJ-6-GP 2 3 WIRELESS_SW# ADT_TYPE A/D(PIN99) PULL-LOW RESISTOR PULL-HIGH RESISTOR VOLTAGE R2707
EC_GPIO47 High Active
1
BD_DVI_IN 1 4 100KR2F-L1-GP
BD_HDMI_IN 2 3 65W N/A 100.0K 3.3V R2710
RN2704 65W UMA 10KR2F-2-GP
PROCHOT_EC G SRN10KJ-5-GP 90W 100.0K N/A 0V 3D3V_AUX_S5
1 4MUTE_BTN#
2
D H_PROCHOT# 5,42 RN2713 2 3BACKUP_BTN# 30W 10.0K 100.0K 0.3V ADT_TYPE
1
SRN100KJ-6-GP
2
R2732 S HDMI_DVI_IN 1 4 40W 20.0K 100.0K 0.55V DISCRETE#
100KR2J-1-GP
BD_DP_IN 2 3 R2708
1
Q2702 120W 33.0K 100.0K 0.82V R2701 330KR2J-L1-GP
2N7002K-2-GP 100KR2F-L1-GP R2739
2
84.2N702.J31 Reserved 47.0K 100.0K 1.06V 90W 10KR2F-2-GP
1
DIS_PX_Muxless 104 BD_PWNBTN# 2 1EC_GPIO97
Reserved 64.9K 100.0K 1.3V
1
R2761 C2724
65W_90W# 470R2J-2-GP DY
SC220P50V2KX-3GP
High: 65W / Low 90W
2
RTC_AUX_S5 DISCRETE#
NCT5606Y-0 (Addr: 0x32) 0209 -1 High: UMA / Low: Discrete
1 2RTC_AUX_S5_KBC
R2785 104 BD_USB_CHARGER_EN#
82 PowerSmartLED SMB2_DAT 0R0402-PAD SMB2_DAT
104 BD_PWR_LED SMB2_CLK 3D3V_AUX_KBC 82 USB_CHARGER_PORT_EN# SMB2_CLK 3D3V_AUX_KBC
104 BD_USB_Power_EN AFTP19 3D3V_AUX_KBC DY
1 VPS_EN_KBC 1 2 BLUETOOTH_EN
SC2D2U10V3KX-1GP
SC2D2U10V3KX-1GP
R2774
U2703 U2704
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
C2719
C2721
1 8 BAT_SDA 10KR2J-3-GP
NCT5606Y-0 (Addr: 0x30)
5
4
3
2
1
5
4
3
2
1
1
NCT5605Y-GP-U 3D3V_AUX_KBC NCT5605Y-GP-U 3D3V_AUX_KBC
C2718
C2720
2 7 BAT_SCL
3 6 SMB2_CLK 0604 Modify:
SCLK
SCLK
SDAT
SDAT
LED2/GP12
LED1/GP11
LED0/GP10
LED2/GP12
LED1/GP11
LED0/GP10
4 5 SMB2_DAT RN2704 pull-Low 10K Resistor to DY

2
2
2
2
RN2701 SRN4K7J-10-GP
R2784 R2781 on BLUETOOTH_EN.
10KR2F-2-GP 10KR2F-2-GP 2 1 CHG_ON#
6 20 68 DC_BATFULL 6 20 R2790 10KR2J-3-GP
82 WLAN_TEST_LED LED3/GP13 3VDD 3D3V_AUX_KBC_RST# LED3/GP13 3VDD 3D3V_AUX_KBC_RST#_R LID_CLOSE#
7 19 7 19 2 1
1
1
VSS RST# VSS RST#
A 82 PowerSmartBTN#
82 MUTE_BTN# 2
8
GP20
1MUTE_BTN#_R
9
GP21
INT#
A0/GP17
18
17
3D3V_AUX_KBC_INT# 1
R2780
2 3D3V_AUX_KBC
10KR2F-2-GP
CHG_ON# 40
82 WIRELESS_SW#
40 STOP_CHG#
8
9
GP20 INT#
18
17
3D3V_AUX_KBC_INT#_R
R2783
1 2
10KR2F-2-GP
3D3V_AUX_KBC R2782 DY 10KR2J-3-GP
A
1
GP21 A0/GP17
1
29 CODEC_EAPD_MUTE# R2702 10 16 DISCRETE# 10 16 1 4INSTANT_VIEW_BTN#
0R0402-PAD GP22 A1/GP16 C2722 GP22 A1/GP16 C2723 2 3NCT5605Y_WAKE#
BEEP/GP14
BEEP/GP14
SC1U6D3V2KX-GP SC1U6D3V2KX-GP RN2710 SRN10KJ-5-GP

0209 -1
2
2
A2/GP15
A2/GP15
S5_ENABLE
GP23
GP24
GP25
GP23
GP24
GP25
1 8 <Core Design>
2 7 ECRST#
NUMLOCK_LED 82 3G_EN 66 3 6 BD_AC_IN#
4 5 5V_CHARGER_EN
BLUETOOTH_EN 65
Wistron Corporation
11
12
13
14
15
11
12
13
14
15
RN2705 SRN10KJ-6-GP
Title
0209 -12KBC_GPIO23
1bios.ru
1
19,36 PM_SLP_A#
29,51,95,104,106 BD_IN#
R2709
WIRELESS_EN 65
KBC Nuvoton NPCE885
0R0402-PAD BACKUP_LED 82 Size Document Number Rev
Custom
52,104 BD_DP_IN
CAP_LED 68
82 BACKUP_BTN# BAD50-HC -1
NCT5605Y_WAKE# NCT5605Y_WAKE# Date: Saturday, March 03, 2012 Sheet 27 of 109
3G_LED 82
5 4 3 2 1
5 4 3 2 1
SSID = Thermal Fan controller P2793

5V_S0
*Layout* 15 mil
3D3V_S0
1
D C2809 C2808 D
SC4D7U10V3KX-GP
SCD1U10V2KX-5GP
D2802
2
3D3V_S0
R5 SB 3D3V_S0
CH551H-30GP-GP
1
C2801 C2802
A
1
SC10U6D3V5KX-1GP
SCD1U10V2KX-5GP
83.R5003.J8F
1
DY R2813 R2807
2
18K7R2D-GP 0R2J-2-GP R2805
10KR2J-3-GP
2nd = 83.R5003.H8H
1 2 DY
DY
2
D2801
2
ALERT#
27 FAN_TACH1 A K FAN_TACH1_C
6
ACES-CON4-19-GP FAN1
CH551H-30GP-GP 27 FAN1_PW M 4 20.F1637.004

3
83.R5003.J8F FAN_TACH1_C 2 2nd = 20.F1808.004
2nd = 83.R5003.H8H
5V_S0 1 3rd = 20.F1579.004
Layout notice :
2
Both DXN and DXP routing 10 mil
trace width and 10 mil spacing. C2815
5
C
84.03904.L06 SCD1U10V2KX-5GP C
1
2rd = 84.03904.X11 P2800_DXP 3D3V_S0 DY
U2801 check? SB
1
C2806
3
1
DY SC470P50V2JN-GP C2807 1 8 TMDS_SCL_A TMDS_SCL_A 51
VDD SCL
SC2200P50V2KX-2GP
R2808 Q2801 1 2 7 TMDS_SDA_A TMDS_SDA_A 51
2
D+ SDA
NTC-100K-8-GP
PMBS3904-1-GP 3 6 ALERT#
2
THERM_SYS_SHDN# D- ALERT#
4 5
2
P2800_DXN T_CRIT# GND
2.System Sensor, Put on palm rest NCT7718W -GP
1.H/W T8 Shutdown
R7 SB
3D3V_S0
B B
1
3D3V_AUX_S5
R2809
2KR2F-3-GP
3
D2803
2
BAT54PT-GP 1220 SB THERM_SYS_SHDN#
83.00054.T81
2ND = 83.BAT54.D81 DY
3rd = 83.BAT54.S81 R2810
S 0R2J-2-GP
2
1 2 3D3V_S0
27,36,86 PURE_HW _SHUTDOW N# D
1
G IMVP_PW RGD_G 1 2 IMVP_PW RGD 36,42
R2812 C2811
1
0R2J-2-GP
10KR2J-3-GP
DY Q2802
R2814
SCD1U10V2KX-5GP
DY 2N7002K-2-GP
84.2N702.J31 1108 SB DY
2
<Core Design>
A A
Wistron Corporation
Title
Thermal NCT7718W/Fan
Custom
BAD50-HC -1
5 4 3 2 1
1bios.ru
5 4 3 2 1
BAT54CGP-GP
3D3V_S0
1 KBC_BEEP_1 1 2 KBC_BEEP 27
R2903 0R0402-PAD
1
AUDIO_PC_BEEP 1 2 AUDIO_BEEP 3 R2902
10KR2J-3-GP
SCD1U10V2KX-5GP 2 SPKR_SB_1 1 2 HDA_SPKR 21
2
DY C2902 0R0402-PAD
D2901 1 2 R2933 D2902 R2904
2
D
27 AMP_MUTE# 2 10KR2J-3-GP 83.R2003.H81 D
R2901 GAP-CLOSE
3 CX20584_MUTE# 1 2 GPIO/SPK_MUTE# G2901
1
0R2J-2-GP
2nd = 83.R2003.Q81
19,27,36,37,47,75,82 PM_SLP_S3# 1 1 2
3rd = 83.BAT54.081
BAW56-5-GP
R2905 GAP-CLOSE
83.00056.Q11 1 2 EXT_MUTE# DY DY DY G2902 AUD_AGND
DMIC_CLK_C
DMIC_12_C
2
2
2nd = 83.00056.K11 0R2J-2-GP
C2936
C2937
C2935 1
1
SC33P50V2JN-3GP
SC10P50V2JN-4GP
SC10P50V2JN-4GP
3D3V_S0
1
1
C2939 C2940
R2947 DY DY
2
10KR2J-3-GP U2901
3D3V_S0 SC100P50V2JN-3GP SC100P50V2JN-3GP
Q2901
CODEC_SYNC 10 48 DOCK_SPDIF 104
2
BD_IN#_CODEC SYNC SPDIF/BEEPGAIN

3 4 21 HDA_CODEC_BITCLK R2945 2 1CX20584_BITCLK 7 13 AUDIO_PC_BEEP
33R2J-2-GP BIT_CLK PC_BEEP DMIC_12_C
21 HDA_CODEC_SDOUT 6 3 2 1 DMIC_12 58
R2908 2 CX20584_SDATA SDATA_OUT DMIC_1/2 DMIC_CLK_C R2931
27,51,95,104,106 BD_IN# 2 5 21 HDA_SDIN0 1 8 2 2 1 0R0402-PAD DMIC_CLK 58 EMI request 20101109
33R2J-2-GP SDATA_IN DMIC_CLK0 R2930 0R0402-PAD
21 HDA_CODEC_RST# 11 1
BD_IN#_BJT 2 RESET# DMIC_3/4
1 6 1
R2946 47 16 AUD_SPK_L-C 1 2 AUD_SPK_L- 58
10KR2J-3-GP 27 CODEC_EAPD_MUTE# GPIO0/EAPD# LEFT- AUD_SPK_L+C
14 1 R2940 0R0402-PAD
2 AUD_SPK_L+ 58
2N7002KDW-GP LEFT+ R2941 0R0402-PAD
84.2N702.A3F 17 AUD_SPK_R-C 1 2 AUD_SPK_R- 82 RN2903 2 3 SRN0J-6-GP DOCK_LINEOUT_L 104
GPIO/SPK_MUTE# RIGHT- AUD_SPK_R+C
46 19 1 R2942 0R0402-PAD
2 AUD_SPK_R+ 82 1 4 DOCK_LINEOUT_R 104
BD_IN#_CODEC GPIO1/SPK_MUTE# RIGHT+ R2943 0R0402-PAD
45
GPIO2/SPDIF2 Dock
12 EXT_MUTE#
C C2901 EXT_MUTE# C
SC10U6D3V3MX-GP
3D3V_S0 3D3V_AVDD 2 1 C2903 CX20584_FLYP 22 25 CX20584_A_L R2912 1 2 39R2J-L-GP
FLY_P PORTA_L MB_HP_L 58
1 2 CX20584_FLYN 23 26 CX20584_A_R R2913 1 2 39R2J-L-GP MB_HP_R 58
SC1U6D3V2KX-GP FIY_N PORTA_R
C2905 1 2 AVEE 24 27
SCD1U10V2KX-5GP AVEE PORTD_L
2 1
3D3V_S0
29
AVDD_HP PORTD_R
28 9/3
R2907 0R0603-PAD RN2902
1D5V_S0 39 2 3 SRN33J-5-GP-U
C2911 PORTB_L DOCK_MIC_IN_L 104
C2909 1 2 40 1 4 DOCK_MIC_IN_R 104
1
SC1U6D3V2KX-GP PORTB_R
2 1
3D3V_S0 SC10U6D3V3MX-GP 1 2 9 35 CX20584_C_L 1 2 CX20584_C_L_C R2916 1 2100R2F-L1-GP-U Dock MB_MICIN_L 58
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
C2915 2 C2913 SCD1U10V2KX-5GP VDD_IO PORTC_L CX20584_C_R C2914 SC2D2U6D3V3KX-GP CX20584_C_R_C

1 4 36 1 2 1 2 MB_MICIN_R 58
2
2
SC10U6D3V3MX-GP
SCD1U10V2KX-5GP VAUX_3.3 PORTC_R C2916 SC2D2U6D3V3KX-GP R2917 100R2F-L1-GP-U

21
C2906 FILT_1.8 DVDD_3.3 CX20584_D_L CX20584_D_L_C R2927 1
5 33 1 2 2100R2F-L1-GP-U DOCK_LINEIN_L 104
FILT_1.8 PORTE_L CX20584_D_R C2922 SC4D7U6D3V3KX-GP CX20584_D_R_C
34 1 2 1 2 DOCK_LINEIN_R 104
PORTE_R C2923 SC4D7U6D3V3KX-GP R2938 100R2F-L1-GP-U
31
AVDD_5V
LDO_OUT_3D3V 30 41
AVDD_3.3V PORTF_L
1
5V_S0 5V_AVDD 42
2
1
C2921 C2924 PORTF_R R2921
18
RPWR_5.0
SCD1U10V2KX-5GP
C2907 C2912 R2920 15 38 1 2 MB_MICIN_L
10KR2J-3-GP
SC10U6D3V3MX-GP
SCD1U10V2KX-5GP
2
LPWR_5.0 B_BIAS
0R5J-5-GP 2 1CLASS_D_REF
20 37 C_BIAS 3KR2F-GP
SC10U6D3V3MX-GP
2
2
C2925 CLASS_D_REF C_BIAS MB_MICIN_R
R2936 1 2
2
DY SCD1U50V3KX-GP 44 SENSE_A 3KR2F-GP

1
SENSEA SENSE_B
1 2 49 43 R2923
GND SENSEB
AUD_AGND 32 FILT_1.65V
0R5J-5-GP FILT_1.65
SC10U10V5ZY-1GP
CX20584_RPWR
C2919
1
1
C2920
C2917 CX20584-21Z-GP C2931 C2932
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
1
SC1U6D3V2KX-GP
R2918 C2918 C2927 C2928 C2929 C2930
2
2
SC10U6D3V3MX-GP
SC10U6D3V3MX-GP
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
2
B B
AUD_AGND
3D3V_S0 3D3V_AVDD
3D3V_AVDD
1
DY
R2935
33KR2F-GP
1
1
R2932
2
R2928 5K1R2F-2-GP
5K1R2F-2-GP
SYNC_CTL
2
2
C2938
R2937
1
SC33P50V2JN-3GP
DY 2N7002K-2-GP SENSE_A R2929 2 1 10KR2F-2-GP EXT_MIC_JD# 58 SENSE_B 1 2 DOCK_LINEIN_JD# 104

2
G SENSE_PORT_C 39K2R2F-L-GP
21 HDA_CODEC_SYNC D
R2939 1 2 39K2R2F-L-GP AUD_HP1_JD# 58
S CODEC_SYNC
A A
SENSE_PORT_A <Core Design>
Q2904 DY
Wistron Corporation
R2944 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
1 2 Taipei Hsien 221, Taiwan, R.O.C.
0R2J-2-GP Title
Audio Codec
Custom
BAD50-HC -1
1bios.ru
5 4 3 2 1
5 4 3 2 1
AUDIO OP AMPLIFIER
D D
JE40 delete AMP function

C C
B B
<Core Design>
A
1bios.ru
Title
Audio AMP
A4
BAD50-HC -1
5 4 3 2 1
5 4 3 2 1
3D3V_S5 3D3V_LAN_S5 1D2V_LAN_S5 3D3V_LAN_S5
1 R3101 2 3D3V_S0 3D3V_LAN_S0

0R3J-0-U-GP
1
C3104 C3105 C3106 3D3V_LAN_S5 U3101
BCM C3101 C3102 C3103 R3104 2
1
SCD1U10V2KX-4GP
L3104 1 2 GBK160808T-601Y-GP 0R3J-0-U-GP
1
SC4D7U6D3V3KX-GP
SCD1U10V2KX-4GP
SC4D7U6D3V3KX-GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
BCM BCM DY BCM BCM DY 42
VDDO BCM BCM
D BIASVDD_G C3107 C3113 D
BIASVDDH
25 BCM
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
DY
12 XTALVDD_G L3105 1 2 GBK160808T-601Y-GP
1
XTALVDDH
BCM
1D2V_LAN_S5 15 BCM C3109
VDDC SCD1U10V2KX-4GP
41
2
VDDC
L3106
1D2V_LAN_S5 GBK160808T-601Y-GP
68.00248.011
2nd = 68.00217.241 30 LAN_AVDD L3109 1 2 GBK160808T-601Y-GP
1
AVDDH LAN_AVDD
AVDDH
36 BCM
SCD1U10V2KX-4GP
1 2 AVDDL_G C3110 C3111
BCM BCM57761 BCM SCD1U10V2KX-4GP
2
1
1
BCM
L3103 C3116 C3117 AVDDL_G 27 6mm x 6mm
GBK160808T-601Y-GP SC4D7U6D3V3KX-GP SCD1U10V2KX-4GP AVDDL_G AVDDL
33
2
2 AVDDL_G AVDDL
68.00248.011 39
AVDDL 48-Pin QFN
2nd = 68.00217.241
BCM BCM
1 2 GPHY_PLLVDD 37 LAN_MDI3N_BCM 106
TRD3_N
BCM 38 LAN_MDI3P_BCM 106
1
GPHY_PLLVDD TRD3_P
24
L3110 C3119 C3108 GPHY_PLLVDDL
35 LAN_MDI2N_BCM 106
GBK160808T-601Y-GP SC4D7U6D3V3KX-GP SCD1U10V2KX-4GP TRD2_N
34 LAN_MDI2P_BCM 106
2
TRD2_P
68.00248.011 Mode 6( SPEED 10/100 LED MODE)
2nd = 68.00217.241 TRD1_N
31 LAN_MDI1N_BCM 106
BCM BCM TRD1_P
32 LAN_MDI1P_BCM 106
C PCIE_PLLVDD PCIE_PLLVDD C
1 2 18
PCIE_PLLVDDL
BCM 21 29 LAN_MDI0N_BCM 106
1
PCIE_PLLVDDL TRD0_N
28 LAN_MDI0P_BCM 106 1
C3120 C3121 TRD0_P
SC4D7U6D3V3KX-GP SCD1U10V2KX-4GP 45 10M/100M/1G_LED#_BCM_C 3 10M/100M/1G_LED#_BCM 10M/100M/1G_LED#_BCM 106
2
SO#_LINKLED# SPD100LED# BAW56-5-GP

48
SPD100LED# ROM_CLK
46 2
SCLK_SPD1000LED# D3101
BCM BCM TRAFFICLED#
47 LAN_ACT_LED#_BCM 106 BCM
3
GPIO0
SWAP 0214-1 BCM 3D3V_LAN_S5
20,105 PCIE_RXP6 C3123 1 2 SCD1U10V2KX-5GP PCIE_RXDP6_C 17 4 SMB_CLK_BCM R3140 1 2 0R2J-2-GP
PCIE_TXD_P SMB_CLK/TEST_1 SMB_CLK 20,75
20,105 PCIE_RXN6 RN3101 C3124 1 2 SCD1U10V2KX-5GP PCIE_RXDN6_C 16 5 SMB_DATA_BCMR3141 1 2 0R2J-2-GP
PCIE_TXD_N SMB_DATA/TEST_2 SMB_DATA 20,75
20,105 PCIE_TXP6 1 BCM
4 BCM PCIE_TXP6_BCM 22 BCM
1
PCIE_TXN6_BCM PCIE_RXD_P
20,105 PCIE_TXN6 2 3 BCM 23
PCIE_RXD_N R3102
19,65,66,75 PCIE_WAKE# 1
SRN0J-6-GP WAKE# 1KR2J-1-GP
5,18,27,32,36,65,66,71,75,82,83,97,105 PLT_RST# 6
CLK_PCIE_BCM_LAN PERST# EECLK
20,105 CLK_PCIE_INTEL_LAN 1 4 20
PCIE_REFCLK_P CS#_EECLK
43 BCM
20,105 CLK_PCIE_INTEL_LAN# 2 BCM
3 CLK_PCIE_BCM_LAN# 19
2
PCIE_REFCLK_N EEDATA U3102
44
RN3102 SI#_EEDATA 3D3V_LAN_S5
SRN0J-6-GP 10M/100M/1G_LED#_BCM_C 1 8 EEDATA
ROM_CLK SI SO
2 7
SCK GND
3 6
EECLK RESET# VCC
4 5
CS# WP#
B 3D3V_LAN_S0 B
1D2V_LAN_S5 AT45DB011D-SH-T-GP
C3118
1
BCM BCM
10KR2J-3-GP 2 1 R3136 BCM_PRSNT 40
VMAIN_PRSNT IND-4D7UH-192-GP 1
1 2BCM BCM_LOW_PWR 2 11 1D2V_LAN_S5_SR 2 L3107
2
LOW_PWR SR_LX
SCD1U10V2KX-4GP
0R3J-0-U-GP R3105 8 1D2V_LAN_S5 BCM
SR_VFB
BCM
1
R3138 C3132 C3130
SCD1U10V2KX-4GP
SC10U6D3V5KX-1GP
LAN_XO_R 2 1 LAN_XO_BCM 14 3D3V_LAN_S5
XTALO
EECLK
1 2LAN_XI 200R2F-L-GP 13
2EEDATA
2
2
XTALI
BCM BCM SR_VDDP
10 BCM BCM
X3101 LAN_RDAC 26 9
1
C3134 XTAL-25MHZ-102-GP RDAC SR_VDD
2
SC27P50V2JN-2-GP C3135
1
1
SC27P50V2JN-2-GP 49 R3103 R3107
2
R3139 THERMAL_PAD C3136 C3137 1KR2J-1-GP 1KR2J-1-GP

1K21R2F-2-GP
2
SC4D7U6D3V3KX-GP
SCD1U10V2KX-4GP
BCM BCM BCM DY
1
BCM BCM BCM
2
BCM
20,105 PCIE_CLK_INTEL_LAN_REQ# 1 2 PCIE_CLK_BCM_LAN_REQ# 7
0R3J-0-U-GP R3106 CLK_REQ#
A A
Package Body <Core Design>
71.57761.003
BCM Wistron Corporation
1st = 71.57761.M02 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Title
BCM57761
Custom
BAD50-HC -1
1bios.ru
5 4 3 2 1
5 4 3 2 1
TP3201 TPAD14-OP-GP
EEDI 1
RTS5139 clcok setting
D D
Clock Mode 0(R3216) Mode 1(R3215)
External 48Mhz X X
2 R3220 1 PLT_RST#_R 3D3V_S0
5,18,27,31,36,65,66,71,75,82,83,97,105 PLT_RST#
0R0402-PAD
DY X'tal 12Mhz sutff stuff
EESK 2 R3217 1 or 48Mhz
20 PCIE_CLK_CARD_REQ#
EEDI 10KR2J-3-GP
MS_INS# 74
SD_CD# 74
XD_D7/SD_W P 74
3D3V_S0 1 R3218 2 3D3V_S0_CR
0R3J-0-U-GP
XD_D6/MS_CLK 74
1 R3210 2 CR_RREF
1
C3213 6K2R2F-GP
SCD1U16V2ZY-2GP
RTS5209==>PCI-E Interface
48
47
46
45
44
43
42
41
40
39
38
37
U3201
CLK_REQ#
PERST#
MS_INS#
SD_CD#
SP15
SP14
EEDO
3V3_IN
EECS
EESK
GPIO/EEDI
RREF
R3202 20R0402-PAD1PCIE_TXN3_HSIP 1 36
20 PCIE_TXP3 HSIP SP13 XD_D5 74
R3204 0R0402-PAD
2 1PCIE_TXN3_HSIN 2 35 DY
20 PCIE_TXN3 HSIN SP12 XD_D4/MS_D3 74
C
20 CLK_PCIE_CARD 3 REFCLKP SP11 34 XD_D3 74 2 R3216 1 DV33_18 C
4 33 10KR2J-3-GP
20 CLK_PCIE_CARD# REFCLKN SP10 XD_D2/MS_D2 74
AV12 5 AV12 SP9 32 XD_D1/MS_D0 74
1 2 PCIE_RXDP3 6 31
20 PCIE_RXP3 HSOP SP8 XD_D0 74
C3204 1 2 SCD1U16V2ZY-2GP PCIE_RXDN3 7 71.05209.00G 30
20 PCIE_RXN3 HSON SP7 XD_W P#/MS_D1 74
C3206 SCD1U16V2ZY-2GP 8 29
GND SP6 XD_ALE 74
DV12 9 DV12 SP5 28 XD_CLE/MS_BS 74
3D3V_CARD_S0 2 R3222 1 CARD1_3V3 10 CARD1_3V3
Output 950mA DV12_S 27 DV33_18_DV12_S 2 R3221 1 DV12_S
3D3V_S0 0R0402-PAD 11 1.2A 26 0R0402-PAD
CARD2_3V3 3V3_IN GND SD_D2_R R3214
1 12 CARD2_3V3
Output 550mA SD_D2 25 2 10R0402-PAD SD_D2 74
TP11
TPAD14-OP-GP
SD_CMD
DV33_18
1
XD_CD#
SD_CLK
C3210 C3208
SD_D1
SD_D0
SD_D3
SC4D7U10V3KX-GP SCD1U16V2ZY-2GP
CLK_PCIE_CARD
CLK_PCIE_CARD#
GND
SP1
SP2
SP3
SP4
2
RTS5209-GR-GP
13
14
15
16
17
18
19
20
21
22
23
24
Closed to chip pin
DV33_18
SD_D3_R R3213 2 10R0402-PAD
AV12 DV12 SD_D3 74
EC3202
EC3201
SD_CMD_R R3212 2 10R0402-PAD

74 XD_CD# SD_CMD 74
SD_CLK_R R3211 2 10R0402-PAD SD_CLK 74
C3211
C3215
SD_D0_R R3209 2 10R0402-PAD SD_D0 74

1
DY DY SD_D1_R R3207 2 10R0402-PAD SD_D1 74

1
1
SC33P50V2JN-3GP
SC33P50V2JN-3GP
1
SC4D7U10V3KX-GP
SCD1U16V2ZY-2GP
C3212
XD_W E# 74
2
B B
DY
SC8P250V2CC-GP
XD_CE# 74
2
XD_RE# 74
2
XD_RDY 74
1
1
C3202 C3214
SC4D7U10V3KX-GP DY SC1U6D3V2KX-GP
2
2
EMI request
3D3V_CARD_S0 3D3V_S0
C3201 closed CARD1 Pin 18
C3216
SC10U6D3V5KX-1GP
1
C3205 C3201 C3203 C3209 C3207

SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
SC4D7U10V3KX-GP SC4D7U10V3KX-GP
SCD1U16V2ZY-2GP
DY
2
Closed Pin 11
C3203 closed to CARD1Pin 22
C3205 closed CARD1 Pin 11
A <Core Design> A
1bios.ru
Wistron Corporation
Title
RTS5209(CARD READER)
A3
BAD50-HC -1
5 4 3 2 1
A B C D E
4 4
3
(Blanking) 3
2 2
<Core Design>
1
Wistron Corporation 1
1bios.ru
Title
Reserved
A4
BAD50-HC -1
A B C D E
5 4 3 2 1
D D
C C
B B
A <Core Design> A
1bios.ru
Wistron Corporation
Title
Reserved
A3
BAD50-HC -1
5 4 3 2 1
5 4 3 2 1
D D
C C
reserve
B B
A A
1bios.ru
<Core Design>
Wistron Corporation
Title
USB 3.0 Controller

A2 -1
BAD50-HC
Friday, March 02, 2012
5 4 3 2 1
5 4 3 2 1
Power Sequence
28,42 IMVP_PWRGD 1 R3614 2 SYS_PWROK 19

0R0402-PAD
1
C3612
1 DY
SCD01U50V2KX-1GP
R3614
2
19,27,29,37,47,75,82 PM_SLP_S3# 3
D
CRB : 1K D
2
D3603
BAS16-6-GP
83.00016.K11
2ND = 83.00016.M11
ANNIE Run Power 5V_S0

U3604
AO4468-GP
84.04468.037 5V_CHARGER 3D3V_S5
2nd = 84.08882.037
1 S D 8
C3607 2 S D 7
1 DY2 3 S D 6 1 R3608 2 PS_S3CNTRL 37
RUN_ENABLE 4 G D 5 100KR2J-1-GP
SCD1U25V3KX-GP
D
Q3606
11/09 SB U3607 2N7002K-2-GP
AO4468-GP
84.2N702.J31
3D3V_S0
84.04468.037
2nd = 84.08882.037 3D3V_S5
RUN_ENABLE 1 S D 8
S
2 S D 7
3 S D 6
U3609 4 G D 5
G5938TL1U-GP 19,27,29,37,47,75,82 PM_SLP_S3#
19,27,29,37,47,75,82 PM_SLP_S3# 5V_S5
74.05938.09P
3D3V_S0
5V_S0 6 1
EN VCC U3605
5 2
DC2 GND AO4468-GP
4 3
DC1 HV
1D5V_S0
84.04468.037
2nd = 84.08882.037 1D5V_S3
C C
1 S D 8
2 S D 7
3 S D 6
4 G D 5
1
C3611 DY
SCD01U50V2KX-1GP
2
5V_S5 5V_S5 1D05V_M
1D05V_VTT 2 R3622 1 H_THERMTRIP# 5,22 For iAMT 5V_S5 5V_S5 1D05V_VTT

1D05V_LAN 1D05V_VTT
56R2J-4-GP iAMT_SBA
1
iAMT_SBA
E
1
iAMT_SBA R3633 R3634 C3613 R3637 R3638 1 2
1
100KR2J-1-GP
1 R3601 2 H_PWRGD_R B MMBT2222AH-GP SC10U6D3V5KX-1GP C3614 R3639 0R5J-5-GP
2
5,22,97 H_CPUPWRGD Q3601 1D05V_LAN
100KR2J-1-GP
100KR2J-1-GP
100KR2J-1-GP
1KR2J-1-GP SC10U6D3V5KX-1GP
DY iAMT_SBA Non_ iAMT_SBA
2
1
U3608 1D05V_LAN
iAMT_SBA iAMT_SBA 1 2
C
SCD1U10V2KX-5GP
C3602 QM3006S-GP U3610 R3640 0R5J-5-GP

R3616
2
84.03006.A37 QM3006S-GP Non_ iAMT_SBA
2
2
5,18,27,31,32,65,66,71,75,82,83,97,105 PLT_RST# 2 1 1 S D 8 84.03006.A37 1 2
84.M2222.011 2 S D 7 1 S D 8 R3641 0R5J-5-GP
1
2nd = 84.02222.V11 3 S D 6 2 S D 7 Non _iAMT_SBA

4K7R2J-2-GP R3632 D 5 3 S D 6 1 2
2K2R2J-2-GP G D 5 R3652 0R5J-5-GP
G
R3635 iAMT_SBA Non_ iAMT_SBA
RUNPWROK_BJT
R3636
2
4
2 1 2 PM_5V_S5_RR iAMT_SBA
iAMT_SBA 1 2 1D05V_LAN_MOS
3 iAMT_SBA
PM_SLP_A#_BJT
PURE_HW_SHUTDOWN# 27,28,86
330KR2J-L1-GP
D3601 330KR2J-L1-GP
RUNPWROK_BJT_1
41 3V/5V_EN 1
BAS16-6-GP
D
200KR2J-L1-GP
83.00016.K11
1
1D05V_LAN 1D05V_M
PM_5V_S5_R
2ND = 83.00016.M11 U3611
D
R3602
2N7002K-2-GP
DY iAMT_SBA U3613
B 2N7002K-2-GP 1 2 B
2 1 S5_ENABLE 27,97,107 84.2N702.J31 iAMT_SBA R3646 0R5J-5-GP
2
2KR2F-3-GP R3603 Non _iAMT_SBA

U3612 2nd = 84.07002.I31 84.2N702.J31 1 2
S
1 6 U3614 R3647 0R5J-5-GP
1 6 2nd = 84.07002.I31 Non_ iAMT_SBA
S
19,27 PM_SLP_A# 2 5
37,45,46,47 RUNPWROK 2 5
3 4 PM_SLP_A#_BJT 1D05V_VTT 0D85V_S0
3 4
2N7002KDW-GP
84.2N702.A3F 2N7002KDW-GP R3653 0R3J-0-U-GP
iAMT_SBA 1 2
iAMT_SBA 84.2N702.A3F R3654
DY 0R3J-0-U-GP
3D3V_S5 3D3V_S5 1 2
3D3V_S5 Q3602 3D3V_M
DMP2305U-7-GP 45 1D05V_LAN_PWRGD 3D3V_S5 R3655
DY 0R3J-0-U-GP
1 2
1
change U3612, U3614, U3615 to 84.2N702.A3F S D
R3649 R3650
DY
0822 SB
iAMT 4K7R2J-2-GP 10KR2J-3-GP
U3601
G
3D3V_S5
iAMT_SBA iAMT_SBA 1
2
B
5
PM_SLP_LAN#_BJT_R 1D05V_M_C VCC
2 iAMT_SBA
A
4 PM_MPWROK 19
Y
3
R3642 R3643 1D05V_M_BJT GND
84.M2222.011
1
2nd = 84.02222.V11 iAMT_SBA 74LVC1G08GW-1-GP
D
47KR2J-2-GP 47KR2J-2-GP 73.01G08.L04
iAMT iAMT Q3604 2ND = 73.7SZ08.DAH
R3648
C
2N7002K-2-GP 3D3V_S5 3D3V_M
iAMT 1D05V_M 2 1 1D05V_M_R B Q3603 SBA_NONiAMT
2
MMBT2222AH-GP 84.2N702.J31
U3615 1 2
E
1KR2F-L-GP R3658 0R5J-5-GP
1 6 PM_SLP_LAN#_BJT iAMT_SBA 2nd = 84.07002.I31
1
iAMT_SBA
S
2 5 C3616 iAMT_SBA 1 2
19,27,45 PM_SLP_LAN# SC2D2U10V3KX-1GP R3657 0R5J-5-GP
1 2
2
3 4 R3644 100R2J-2-GP SBA_NONiAMT
iAMT
1
2N7002KDW-GP iAMT
C3615 83.R0304.D8F
A SC10U6D3V5KX-1GP A
84.2N702.A3F
2
3D3V_M_R 2nd = 83.R3004.A8F

2ND = 84.2N702.F3F R3651
1 2 PM_SLP_A#_R
K A
19,27 PM_SLP_A#
1bios.ru
0R2J-2-GP D3602
CH751H-40-1-GP
iAMT_SBA iAMT_SBA
<Core Design>
Wistron Corporation
Title
Power Plane Enable

Custom
BAD50-HC -1
5 4 3 2 1
5 4 3 2 1
R3717
0R2J-2-GP
Close to DIMM 1
DY 2
Close to CPU S3 Power Reduction Circuit SM_DRAMPWROK

S3 Power Reduction Circuit Processor VREF_DQ Implementation 0D75V_S0 Q3707
R3707 S
D 0R2J-2-GP M_VREF_DQ_DIMM0_C 9 D
1
DDR_VREF_S3
1 DY 2 14 DDR_WR_VREF01_B4 D DY
R3703
22R2J-2-GP G
DRAMRST_CNTRL_PCH 20
S +V_SM_VREF_CNT 9
2
PS_S3CNTRL_MOS 2N7002K-2-GP
1228 SB
2
D 84.2N702.J31
R3705
D
G 100KR2J-1-GP
Q3701
Q3708 2N7002K-2-GP
1
2N7002K-2-GP R3726
84.2N702.J31 0R2J-2-GP
84.2N702.J31
1 2
Q3704 PM_SLP_S3# 19,27,29,36,47,75,82 DY
S
G
36 PS_S3CNTRL
D 0D75V_EN
36 PS_S3CNTRL Q3709
S S
M_VREF_DQ_DIMM1_C 9
2N7002K-2-GP 15 DDR_WR_VREF01_D1 D DY
84.2N702.J31 G
DRAMRST_CNTRL_PCH 20
Close to CPU
S3 Power Reduction Circuit SM_DRAMPWROK 2N7002K-2-GP
1D5V_S3
1228 SB
84.2N702.J31
1D05V_VTT_PWRGD 45,48
1
R3706
C R3709 1KR2J-1-GP C
5V_S5 0R2J-2-GP
2
1D5V_S0 3D3V_S0 1 2
DY
1
Q3705
1
R3714 2N7002K-2-GP
S3 Power Reduction Circuit
1
100KR2J-1-GP 84.2N702.J31 R3710
DY
2
R3712 0R0402-PAD SM_DRAMRST#

R3715 10KR2J-3-GP
DY 5 SM_DRAMRST# S
2
4K7R2J-2-GP
2
1.5V_RUN_CPU_EN# G D SM_DRAMRST#_D1 2 DDR3_DRAMRST# 14,15
2
DY
1
1
D 0D75V_EN_L 2 R3711 1 G R3718
0D75V_EN 46 20 DRAMRST_CNTRL_PCH
3
0R0402-PAD C3702 1KR2J-1-GP

1.5V_RUN_CPU_EN 1 Q3706 S R3716 Q3703 SC100P50V2JN-3GP
2
PMBS3904-1-GP 2 1
1
19,27,29,36,47,75,82 PM_SLP_S3# 0R2J-2-GP
DY
2
2
1
C3705 C3703 84.2N702.J31
DY
R3722 DY SCD1U10V2KX-5GP 2N7002K-2-GP
SCD047U16V2KX-1-GP
2
4K7R2J-2-GP 84.03904.L06
2
DY
1
9/14 SB DY
Close to CPU
SB S3 Power Reduction Circuit SM_DRAMPWROK 3D3V_S5
3D3V_S5 1D5V_S3 3D3V_S5

B 3D3V_S5 B
1
3D3V_S5 1D5V_S0 36,45,46,47 RUNPWROK
1
R3723
1
R3713 R3721 CEKLT V1.0: PCH to 1K,CUP to 200R 10KR2J-3-GP
1
200R2F-L-GP DY 200R2F-L-GP R3725 iAMT_SBA U3702

R3702 4K7R2J-2-GP 1
2
B
200R2F-L-GP 5
2
1D05V_VTT_C VCC
AiAMT_SBA
5,19 PM_DRAM_PWRGD 1 5 2
2
IN B VCC 1D05V_VTT_PWRGD
4
2
Y
42,48 ALL_PWR_OK 1 2 2 3
R3701 0R2J-2-GP IN A GND
iAMT_SBA
1
3 4 VDDPWRGOOD_R 1 R3719 2 74LVC1G08GW-1-GP

DY C3701 GND OUT Y VDDPWRGOOD 5
84.M2222.011
Q3702
73.01G08.L04
U3701 130R2F-1-GP 2nd = 84.02222.V11 ADP_1D05_R_BJT G 2ND = 73.7SZ08.DAH
2
74VHC1G09DFT2G-GP 1D05V_VTT
SCD1U10V2KX-5GP
45,48 1D05V_VTT_PWRGD
2
D
73.01G09.AAH
C
R3724
R3720
DY 0R2J-2-GP 2 1 ADP_1D05_R B Q3710 S
MMBT2222AH-GP
DY iAMT_SBA
iAMT_SBA
1
E
1KR2F-L-GP 2N7002K-2-GP
1
DY 84.2N702.J31
C3706 2nd = 84.07002.I31
SC1U10V3ZY-6GP
For U3701 not OD AND gate
2
R3719 to 64.15015.6DL iAMT_SBA

R3720 to 64.75005.6DL
R3702 to DY 9/23
A A
<Core Design>
Wistron Corporation
Title
ADAPTER
Custom
BAD50-HC -1
5 4 3 2 1
1bios.ru
5 4 3 2 1
ANNIE solution
D D
AD_JK_IN
Adaptor in to generate DCBATOUT AD+

DCIN1
6 D3803 AD_JK
1Pin=3A NP1 1 PU3802
1 3 1 S D 8
2 2 S D 7
2 3 S D 6
2
3 PC3801 PC3802 4 G D 5
PDS1040-13-GP-U
1
SCD1U50V3KX-GP
4 PW R_AD+_2
5 D3801 D3802 QM3005S-GP
SC1U50V5ZY-1-GP
1
2
NP2 83.10004.08M
P6SBMJ27AGP-GP
P6SBMJ27AGP-GP
2
C 7 PR3807 PC3805 C
1
DY 200KR2F-L-GP SC1U50V5ZY-1-GP
A
ACES-CON5-27-GP
2
83.P6SBM.EAG 83.P6SBM.EAG
R2
E
PW R_ADJK_EN B R1
C
1
PNP
3 R1/R2 =>22K/22K PQ3802 PR3808
1 R1 PDTA124EU-1-GP 100KR2J-1-GP
27 AD_OFF
2
R2
2
PQ3801
NPN LTC024EUB-FS8-GP
R1/R2 =>22K/22K
AD_DOCK
B B
AD_JK
D3804
1
3
1
2
PR3809
10KR2J-3-GP PDS1040-13-GP-U
2
83.10004.08M
<Core Design>
A A
Wistron Corporation
1bios.ru
Title
DCIN JACK
A3
BAD50-HC -1
5 4 3 2 1
5 4 3 2 1
MAIN BATTERY CONNECTOR 2nd BATTERY CONNECTOR

BATB+
BATA+ -1 0214
FOR RF
1
PC3904 FC3916
1
PC3902 FC3915 PC3903
PC3901 DY SCD1U50V3KX-GP SC2200P50V2KX-2GP
2
SCD1U50V3KX-GP SC2200P50V2KX-2GP
2
SC2200P50V2KX-2GP SC2200P50V2KX-2GP
9/19 BAT2
D
FOR RF BAT1 10 D
9 RN3902 8
1 SRN33J-7-GP 7
RN3901 1 8 6
SRN33J-7-GP 2 27 BAT_B_IN# 2 7 BAT_B_IN#_1 5
1 8 BI 3 3 6 BATB_SCL_1 4
27,51,79,86 SML1_CLK_C
27 BAT_A_IN# 2 7 BAT_A_IN#_1 4 4 5 BATB_SDA_1 3
27,51,79,86 SML1_DATA_C
3 6 BATA_SCL_1 5 2
BATB_6
27,40,104 BAT_SCL
4 5 BATA_SDA_1 6
27,40,104 BAT_SDA
7 1
8 9
10
ALP-CON8-14-GP
1
ALP-CON8-8-GP-U
K
PR3913
20.81352.008
K
PR3912 PD3902 0R3J-0-U-GP 20.81609.008

PD3901 0R3J-0-U-GP 2ND = 20.81353.008 MMPZ5232BGP-GP
2
MMPZ5232BGP-GP 83.5R603.R3F
2
83.5R603.R3F 3RD = 20.81358.008
A
A
C C
BATTERY SWITCH BT+
BATA+ BATB+ delete net 0215-1

PC3908 PC3906
9/14
1 2 1 2 CHGA CHGB
SC4D7U25V5KX-GP
PC3905
G1
S1
G2
S2
PC3907
BT+ 1 2 1 SC4D7U25V5KX-GP
2 BT+
1
3D3V_AUX_S5 3D3V_AUX_S5
PC3913
SC4D7U25V5KX-GP PC3914
SC4D7U25V5KX-GP
Adaptor IN Detection
1 2 1 2 AO4813-1-GP DCBATOUT
1
1
PR3909 PR3904 PQ3902
SC4D7U25V5KX-GP SC4D7U25V5KX-GP
10KR2J-3-GP
10KR2J-3-GP
PR3915 PR3914
8
100KR2J-1-GP
100KR2J-1-GP
D1
D1
D2
D2
PU3901
2
BATA+ AO4813-1-GP AO4813-1-GP

1 BATA BATB 20
BAT_A_IN# 2 19 BAT_B_IN# 3D3V_AUX_S5
CHGA THMA THMB CHGB COMA CHG_PW RA DISA
3 CHGA CHGB 18 4 5 5 4
B DISA DISB
G1 D1 D1 G1 B
4 DISA DISB 17
AD+ COMA 5 16 COMB 3 6 6 3
COMA COMB S1 D1 D1 S1
BATB+
27 BAT_SEL_A/B# 13 BATSEL ACPRES# 12 -1_0303
1 2 MAX1773_ACDET 10 ACDET BATSTAT 11 BATA_STAT 1 2 COMB
G2 2 7 D2
CHG_PW RB
D2 7 2 G2
DISB
PR39103K3R2F-2-GP PR3902
MAX1773_TCOMP 14 6 100KR2J-1-GP 1 8 8 1
TCOMP GND
1
S2 D2 D2 S2
8 EXTLD
1
PR3911 PC3911 M1773_EXTLD MAX1773_PDS 9 15

PDS VDD MAX1773_VDD
7 PQ3901 PQ3903
100KR2J-1-GP
SCD1U50V3KX-GP
MINV
1
PC3912
2
1
PR3908 PC3909 PC3910
MAX1773_MINV
2
10KR2J-3-GP
SC10U25V5KX-GP
MAX1773AEUP-GP SC1U10V3ZY-6GP
SC4D7U25V5KX-GP
2
2
2
MAX1773_PDS 40
2
PR3906 PR3907
MAX1773_VDD
1 2 1 2
15KR2F-GP
16K9R2F-GP G3902
K
MAX1773_VDD 2 1
M1773_EXTLD DCBATOUT
PD3903 1 2
PR3905
GAP-CLOSE-PW R
1
CH521G-30GP-GP
10KR2J-3-GP
A <Core Design> A
A
PR3903
100KR2J-1-GP
1bios.ru
Wistron Corporation
2

83.R2003.Q8F Title
BATT_CONN
A3
BAD50-HC -1
5 4 3 2 1
5 4 3 2 1
add 2nd source AD+_TO_SYS DCBATOUT
PU4002 ( 84.P1403.B37 ) PR4003

SSID = Charger
AD+ 8 D S 1 1 2
7 D S 2 D01R2512F-4-GP
1
6 D S 3
5 D G 4 PR4004
100KR2J-1-GP
QM3005S-GP DY A8( ANNIE/ASTRO)
1
84.03005.037 PR4014,PR4016
1
PR4019
10KR2F-2-GP 2ND = 84.P1403.B37 AD+_G_2 1 2 PG4003
PR4012
MAX1773_PDS 39
PG4002 DY GAP-CLOSE-PWR-3-GP
D 0R0402-PAD GAP-CLOSE-PWR-3-GP PR4009 D
2
2
1
0R2J-2-GP AD+ total power R1 R2
DC_IN_D
PR4006 2 1
10KR2F-2-GP
PQ4002 DY 65w 12.4K 100K
1 2
2
AD+_G_1
3 4
PC4001 80w 41.2k 100K
PWR_CHG_ACOK 2 5 SCD1U25V2KX-GP
SC1U25V3KX-1-GP
SCD1U50V3KX-GP
DCBATOUT
PC4004
1 6 90w 60.4k 100K
1
PC4007
AD+
SC2200P50V2KX-2GP
2N7002KDW-GP DY
SCD1U25V2ZY-1GP
120w 118k 100K
PWR_CHG_ACN
PWR_CHG_ACP
SC10U25V5KX-GP
SC10U25V5KX-GP
SC10U25V5KX-GP
84.2N702.A3F
PC4006
PC4008
PC4009
EC4001
EC4002
2nd = 84.2N702.F3F
1
1 PR4015 2 PWR_CHG_VCC PC4005 PWR_CHG_REGN
1
20R5F-1GP SCD1U50V3KX-GP
CHG_AGND CHG_AGND
2
1
PC4003 DY
2
5
6
7
8
SI4178DY-T1-GE3-GP
PR4011 1 PR4016 2 SCD47U25V3KX-3-GP PR4020 PD4002 PC4010
D
D
D
D
316KR2F-GP CHG_AGND 0R3J-0-U-GP SD103AWS-1-GP SC1U25V3KX-1-GP
20R5F-1GP 1 2CHG_BTST
K A 1 2
PU4004
CHG_AGND
2
1
PU4003
PC4013
G
SCD047U25V2KX-GP
4
ACP
ACN
1
3D3V_AUX_S5
S
S
S
PWR_CHG_IOUT 20 VCC
1
3
2
1
PR4007 PR4031
2
R1 60K4R2F-GP 10KR2F-2-GPPWR_CHG_ACDET
6 17 PWR_CHG_BTST
ACDET BTST
1
C C
1
PR4018 PC4011
2
49K9R2F-L-GP SCD01U50V2KX-1GP STOP_CHG 16

REGN
2
PR4017 3 0209 -1
2
PR4010 CMPOUT PWR_CHG_HIDRV

HIDRV 18
100KR2F-L1-GP 3D3MR2J-GP PR4022 BT+
R2 1
DY 2 PL4001
4 D01R2512F-4-GP
CMPIN PWR_CHG_PHASE PC4014 BT+_R
19 1 2 1 2
2
CHG_AGND PWR_CHG_CMPIN PHASE SC3300P50V2KX-1GP L-5D6UH-GP-U
GAP-CLOSE-PWR-3-GP
GAP-CLOSE-PWR-3-GP
PWR_CHG_BAT_SCL 9 PWR_CHG_LODRV ER4001
SCD1U50V3KX-GP
27,39,104 BAT_SCL 2 1 SCL LODRV 15 DY
1
PG4010
PC4020
CHG_AGND PG4008 GAP-CLOSE-PWR-3-GP 2D2R3-1-U-GP
PG4009
1
PC4015 PC4018
5
6
7
8
SI4178DY-T1-GE3-GP
SC10U25V5KX-GP
SE47U25VM-13-GP
2 1 PWR_CHG_BAT_SDA 8
27,39,104 BAT_SDA
2
SDA
D
D
D
D
3D3V_AUX_S5 PG4011 GAP-CLOSE-PWR-3-GP PR4025
PWR_CHG_PHASE_L
74.24727.073
2
SCD1U25V2KX-GP
10R2F-L-GP
PU4005
13 PWR_CHG_SRP 1 2
SRP
1
PWR_CHG_ILIM 10 DY
ILIM
1
PC4019
PR4021 PWR_CHG_SRN
G
SRN 12 1 2 4
S
S
S
100KR2J-1-GP PR4026 EC4003
PWR_CHG_AD_OFF 11 7D5R2F-GP SC680P-GP
3
2
1
2
NC#11
2
change to 74.24727.073 79.47612.3GL

PWR_CHG_REGN
0214-1 EMI 2ND = 79.47612.3FL
CHG_AGND
1
5 7 PWR_CHG_IOUT 1 2
ACOK# IOUT AD_IA 27
PC4015 add 2nd source
1
PR4023 PR4024 PWR_CHG_CSOP_1

GND
GND
PR4013 10KR2F-2-GP 0R0402-PAD

( 79.47612.3FL )
8K45R2F-2-GP
SCD1U25V2KX-GP
100KR2F-L1-GP
DY EMI requist
PR4028
1
SC220P50V2JN-3GP
PC4024
B DY BQ24727RGRR-GP B
2
21
14
2
2
PC4023
1
1
2 1
D
PQ4007
2N7002A-7-GP BATT_SENSE_C
DY
2
CHG_AGND PG4013
SCD1U25V2KX-GP
G GAP-CLOSE-PWR-3-GP
CHG_ON# 27
2
delete net
1
PC4022
CHG_AGND
3D3V_AUX_S5
S
3D3V_AUX_S5
2
1
PR4030 CHG_AGND
1
100KR2J-1-GP CHG_AGND
PR4029 3D3V_AUX_S5
100KR2J-1-GP
2
1
2
PWR_CHG_ACOK PR4032
100KR2J-1-GP
3D3V_AUX_S5
DY
9/22
2
27 AC_IN#
D
PQ4006 27 STOP_CHG#
1
2N7002A-7-GP
PR4037 PR4036
A 3K3R2F-2-GP 3K3R2F-2-GP AC_IN# A
DY DY G <Core Design>
1bios.ru
PQ4009
2
2N7002A-7-GP
Wistron Corporation
S
PWR_CHG_BAT_SCL
G STOP_CHG 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
PWR_CHG_BAT_SDA
Title
S
CHARGER BQ24727
2012.0220.wayler Size Document Number Rev
Custom
BAD50-HC -1
5 4 3 2 1
A B C D E
1 2 PWR_3D3V5V_ENTRIP
36 3V/5V_EN
PR4102 10KR2J-3-GP
1
DY PR4103
200KR2J-L1-GP 1 2 5V_CHARGER_EN_R
27 5V_CHARGER_EN
PR4111 10KR2J-3-GP
1
2
DY PR4110
200KR2J-L1-GP
4 4
2
PR4104
PWR_3D3V_ENTRIP2 1 2 PWR_3D3V_ENTRIP2_R
1
113KR2F-1-GP
PC4105 DY
4
SC18P50V2JN-1-GP
2
PQ4101
DMN66D0LDW-7-GP 5V_PWR 5V_CHARGER 5V_PWR
84.DMN66.03F PG4135 PG4140
3
Set in 9.826A 9/14 SB 1 2 1 2
5V_EN_L
2ND = 84.2N702.A3F chnge to 120k GAP-CLOSE-PWR GAP-CLOSE-PWR
PR4105
928 PG4137 PG4141
1 2 5V_EN 1 2 1 2
3D3V_S5 3D3V_PWR DCBATOUT
PG4103 ask power team to check this issue
1
120KR2F-L-GP GAP-CLOSE-PWR GAP-CLOSE-PWR
1 2 DY PC4109 PG4130 PG4142
SC18P50V2JN-1-GP 1 2 1 2
1
GAP-CLOSE-PWR
PG4104 PC4130 GAP-CLOSE-PWR GAP-CLOSE-PWR
1 2 OCP setting SE47U25VM-13-GP PG4131 PG4143
2
79.47612.3GL 1 2 1 2
GAP-CLOSE-PWR change to 130K 2ND = 79.47612.3FL
PG4106 GAP-CLOSE-PWR GAP-CLOSE-PWR
1 2
Set in 9.5652A PG4129 PG4144
1 2 1 2
GAP-CLOSE-PWR
1 2 PG4136 PG4145
1 2 1 2
GAP-CLOSE-PWR
1 2 PG4138 PG4146
1 2 1 2
GAP-CLOSE-PWR
3 PG4114 DCBATOUT GAP-CLOSE-PWR GAP-CLOSE-PWR 3
1 2 Add PC4125 , PC4126 PG4134 PG4147
1 2 1 2
GAP-CLOSE-PWR DCBATOUT PC4110 DCBATOUT
SC10U25V6KX-1GP
PG4115 DCBATOUT GAP-CLOSE-PWR GAP-CLOSE-PWR
1
1 2 DY
PC4111
change to close gaps 1129
SCD1U50V3KX-GP
GAP-CLOSE-PWR PC4112 PC4116
2
1
1
SCD01U50V2KX-1GP
SCD01U50V2KX-1GP
PG4117 PC4126 PC4127
5V_AUX_S5 PR4106
1 2 -1 0316
-1 0316 change to close gaps 1129
SC4D7U25V5KX-GP
SC4D7U25V5KX-GP
100KR2F-L1-GP
2
2
GAP-CLOSE-PWR
5
6
7
8
PU4102
2
8
7
6
5
D
D
D
D
SI4178DY-T1-GE3-GP PU4101
change design current
1
D
D
D
D
PC4117 PR4108
change to close gaps SC10U6D3V3MX-GP ENLDO
12 PWR_5V3D3V_ENLDO 1 2 PU4103
14 100KR2F-L1-GP TPCA8065-H-GP
change HS mosfet
2
LDO5
Iomax=6.5A DY
G
S
S
S
4 Iomax=15A
G
OCP>9.75A 11
1 S
2 S
3 S
4
3
2
1
PR4107 VIN PC4119
PC4118
change choke OCP>21A
2 1PWR_3D3V_VOOT2_1 1 2 PWR_3D3V_BOOT2 7 19 PWR_5V_BOOT1 1 PR4109 2 PWR_5V_VOOT1_1 1 2
3D3V_PWR BOOT2 BOOT1
SCD1U25V3KX-GP 2D2R2J-GP PWR_3D3V_UGATE2 8 18 PWR_5V_UGATE1 2D2R2J-GP SCD1U25V3KX-GP 5V_PWR
PL4102 UGATE2 UGATE1 PL4101
1 2 PWR_3D3V_PHASE2 9 17 PWR_5V_PHASE1 1 2
PHASE2 PHASE1
DY
SCD1U10V2KX-5GP
IND-1D5UH-34-GP
1
IND-1D5UH-34-GP
PC4120
PC4101
ST220U6D3VDM-18GP
PWR_5V_LGATE1 PG4124
16 D
8
7
6
5
5
6
7
8
1
LGATE1
GAP-CLOSE-PWR-3-GP
PWR_3D3V_LGATE2 10 PC4102 PC4103
SCD1U10V2KX-5GP
LGATE2
D
D
D
D
D
D
D
D
PC4121
PG4123
2
1
GAP-CLOSE-PWR-3-GP
PU4104 PWR_3D3V_FB2 5 1 PWR_5V_FB1

FB2 FB1
ST220U6D3VDM-18GP
ST220U6D3VDM-18GP
SI4134DY-T1-GE3-GP PU4105
2
3D3V_AUX_S5 20 PWR_5V_VOUT TPCA8062-H-GP
change LS mosfet
2
BYP1
1PWR_5V_VOUT
2
G
S
S
S
DY DY
S
S
S
G
15
LDO3
1
2
3
4
4
3
2
1
1
13 PWR_5V3D3V_ENM/SECFB
PC4122 3D3V_S5 SECFB
PWR_3D3V_VOUT
SC4D7U6D3V3KX-GP
2
3V_5V_POK 6
1
2 PGOOD 2
5V_EN 2 PR4113
PR4112 ENTRIP1 5V_AUX_S5 15KR2F-GP
DY
100KR2J-1-GP
TON
3 PWR_5V3D3V_TON
PR4114
add PC4103
PWR_3D3V_ENTRIP2 4 1 DY 2
2
2
1
ENTRIP2 GND PR4115
1
100KR2J-1-GP
PR4116 68KR2F-GP 3D3V_AUX_S5
19 3V_5V_POK
7K15R2F-L-GP
Set in 5V
21
2
PR4118
RT8239CZQW-GP-U
2
1 2 Vout = 2 * ( 1+ PR4113/ PR4117 )
1
1st = 74.08239.B73 100KR2J-1-GP PR4117
10KR2F-2-GP
1
Set in 3.45V
2
PR4119
10KR2F-2-GP
Vout = 2 * ( 1+ PR4116/ PR4119 )
2
DCBATOUT
K
PD4105
Vz=5.1V MMPZ5228B-GP
83.3R903.D3F
A PU4106_2_1
DCBATOUT
1
PR4123
1
PU4106 30KR2J-4-GP
1 PR4120 PWR_5V3D3V_ENLDO 1
4 3
40K2R2F-GP
2
5 2 PU4106_2
2
PU4106_5 6 1 0629 Modify
1bios.ru
SCD1U25V3KX-GP
0629 Modify
PR4121
1
FC4101
2N7002KDW-GP <Core Design>

100KR2F-L1-GP
1
PR4122 84.2N702.A3F
750KR2F-GP 2nd = 84.2N702.F3F
Wistron Corporation
2
2
DY 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

2
Title
5V/3D3V(RT8239C)
A2
BAD50-HC -1
A B C D E
5 4 3 2 1
-1_0301 Place close to VCC_GFXCORE

PR4230
PW R_GFXCORE_VW PR4236
PW R_GFXCORE_FB_L
2 1 CPU socket 1 2
1
PR4201 PC4201 2KR2F-3-GP PC4221 DY
8K06R2F-GP SC1000P50V3JN-GP-U PC4234 10R2F-L-GP
1 2
SC220P50V2KX-3GP
1
SC330P50V2KX-3GP VCC_AXG_SENSE 9
2
PC4222
SCD068U10V2KX-1GP
VSS_AXG_SENSE 9
2
2
PC4202 PR4203 PC4203 1 2 Parallel
PR4202 1 2 1 2 PW R_GFXCORE_FB_N1 2 PC4223
D 0R2J-2-GP SC1000P50V3JN-GP-U PR4231 D
SC39P50V2JN-1GP 422R2F-2-GP SC680P50V2KX-2GP 1 2
DY PC4224 SC1000P50V3JN-GP-U
1
PR4205 10R2F-L-GP 1 2
PC4204 PR4204 DY
1 2 PW R_GFXCORE_FB_C
1 2 1 2 PW R_GFXCORE_ISP 44
PW R_GFXCORE_ISN 44 PR4234
PWR_GFXCORE_COMP
SC150P50V2KX-GP 475KR2F-GP PR4233
2K26R2F-1-GP NTCG_R
1 2 2 1
TPAD14-OP-GP
TP8702 1 PW R_GFXCORE_IMON PR4232
PWR_GFXCORE_PROG2
1 2 NTC-470K-8-GP 3K83R2F-GP
PWR_GFXCORE_NTC
1D05V_VTT 24K9R2F-L-GP
PWR_GFXCORE_ISN
PWR_GFXCORE_ISP
PWR_GFXCORE_FB
1
PR4206 PC4205 PC4206
VSS_AXG_SENSE
8K66R2F-GP 1 2 PW R_GFXCORE_BOOT 2 PR4235 1
PW R_GFXCORE_BOOT 44
PW R_GFXCORE_HG 27K4R2F-GP
SCD047U25V2KX-GP
PW R_GFXCORE_HG 44
2
SCD1U10V2KX-4GP PW R_GFXCORE_PH PW R_GFXCORE_PH 44
2
VSS_AXG_SENSE PW R_GFXCORE_LG PW R_GFXCORE_LG 44 NTC place near high side MOSFET of Phase1
PR4210 Close to CPU
1
PR4209
PR4211
75R2F-2-GP
3D3V_S0
130R2F-1-GP
49
48
47
46
45
44
43
42
41
40
39
38
37
54D9R2F-L1-GP
PU4201
5V_PW R
PROG2
COMPG
FBG
VSENG
RTNG
ISPG
ISNG
NTCG
BOOTG
UGG
PHG
LGG
GND
2
1
8 H_CPU_SVIDDAT 1 PR4208 2 PR4237
0R0402-PAD PR4213 1 2
1K91R2F-1-GP 0R0402-PAD
2
1 VWG BOOT2 36 PW R_VCCCORE_BOOT2 43
1 PR4212 2 TPAD14-OP-GP 2 35 PW R_VCCCORE_HG2 43 PR4238 PR4247
2
C 8 VR_SVID_ALERT# 0R0402-PAD TP13PGOODG IMONG UG2 0R0402-PAD C
1 3 PGOODG PH2 34 PW R_VCCCORE_PH2 43 0R2J-2-GP
PW R_VCCCORE_SDA 4 33
PW R_VCCCORE_ALERT# SDA VSSP2
5 32 PW R_VCCCORE_LG2 43 DY
1
ALERT# LG2
8 H_CPU_SVIDCLK 1 PR4214 2 0R2J-2-GP PW R_VCCCORE_SCLK 6 SCLK VDDP 31 PW R_VCORE_VDDP
PR4215 0R0402-PAD PW R_VCCCORE_VRON PW R_VCCCORE_PW R3_R
PWR_GFXCORE_ISN
37,48 ALL_PW R_OK 1 DY 2 7 VR_ON PWM3 30
1
PR4216 1 2 0R2J-2-GP PR4217 1 2 1K91R2F-1-GP IMVP_PW RGD 8 29 PC4225 PC4226
SC1U10V2KX-1GP
19,27 S0_PW R_GOOD PGOOD LG1 PW R_VCCCORE_LG1 43
3D3V_S0 PW R_VCCCORE_IMON 9 28
IMON VSSP1
10 27
SC1U10V2KX-1GP
PW R_VCCCORE_PH1 43
2
TP4201 28,36 IMVP_PW RGD PW R_VCCCORE_NTC VR_HOT# PH1
1 11 NTC UG1 26 PW R_VCCCORE_HG1 43
TPAD14-OP-GP PR4218 PC4207 PW R_VCCCORE_VW 12 25 PW R_VCCCORE_BOOT1 43
VW BOOT1
1
ISEN3/FB2
1D05V_VTT 1PR4219 2 DY
1
75R2F-2-GP
PROG1
ISUMN
ISUMP
COMP
ISEN2
ISEN1
VSEN
SCD01U50V2KX-1GP
VDD
RTN
5,27 H_PROCHOT# 1
VIN
FB
36KR2F-GP
PC4208
2
SC47P50V2JN-3GP ISL95831HRTZ-T-GP For Discrete only,

2
13
14
15
16
17
18
19
20
21
22
23
24
8 VSSSENSE
PR4239 UMA need to DUMMY
PC4209
PWR_VCCCORE_ISEN3
PWR_VCCCORE_ISEN2
PWR_VCCCORE_ISEN1
1 2 PW R_VCCCORE_COMP PW R_VCORE_PRG11 2
PWR_VCORE_VDD
DY SC47P50V2JN-3GP
PW R_VCCCORE_FB
4K32R2F-GP PR4240 DCBATOUT
PR4220 PR4221 PR4249 PW R_VCORE_VIN 1 2
1 2PW R_VCCCORE_VW
1 2 _L 1 2PW R_VCCCORE_FB_L
1 2 PC4233 0R0402-PAD
2KR2F-3-GP
3K83R2F-GP NTC-470K-8-GP SC560P50V2KX-2GP
PR4241 5V_PW R
Place near high side MOSFET of Phase1 1 2
1 2
B PR4222 27K4R2F-GP 1R2F-GP B
1
PC4215 DY PC4227 1 PC4228
1 2 PW R_VCCCORE_ISEN1
SC1U10V2KX-1GP
SCD22U25V3KX-GP
43 PW R_VCCCORE_ISEN1
2
2
SCD22U10V2KX-1GP 43 PW R_VCCCORE_ISEN2 PW R_VCCCORE_ISEN2
1
PR4223
PC4216 43 PW R_VCCCORE_ISEN3 PW R_VCCCORE_ISEN3
2
PC4210 PW R_VCCCORE_VSUM-
8K06R2F-GP
1 2
SC1000P50V3JN-GP-U SCD22U10V2KX-1GP
2
PC4217
1 2 PWR_VCCCORE_VSUM-_11
SCD22U10V2KX-1GP PW R_VCCCORE_VSUM+ PW R_VCCCORE_VSUM+ 43
PR4243
PC4212
1 2K61R2F-1-GP
DY PR4225 PC4214 PC4230
1 2 1 2 1 2 PW R_VCCCORE_FB_C
1 2 PC4229
SCD15U10V2KX-GP
PR4224 8K06R2F-GP
SCD22U10V2KX-1GP
SC22P50V2JN-4GP 499R2F-2-GP SC470P50V-2-GP PR4242
11KR2F-L-GP
2
PC4211 PR4227
PW R_VCCCORE_ISEN3 2 1 1 2 1 2 1 2 PW R_VCCCORE_VSUM
2
1
PR4226 316KR2F-GP Place near choke of Phase1
SC10P50V3JN-GP PC4213 PW R_VCCCORE_ISEN3_CR 3K32R2F-GP PR4244
2
SC150P50V2KX-GP NTC-10K-26-GP
PR4228
VCC_CORE 1 2
2
A 1 2 PW R_VCCCORE_VSUM- 43 <Core Design> A
1
10R2F-L-GP PC4218 DY PC4220 PR4245 1K1R2F-GP
1
1 2
SC330P50V2KX-3GP
1bios.ru
PC4232
Wistron Corporation
2
8 VCCSENSE SC330P50V2KX-3GP PR4246 SCD1U10V2KX-4GP
2
8 VSSSENSE 1 2PW R_VCCCORE_VSUM-_L
1 DY 2 21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
1 2 DY Taipei Hsien 221, Taiwan, R.O.C.
PR4229 PC4219 PC4231 698R2F-GP
Parallel 1 2 SC1000P50V3JN-GP-U SCD068U10V2KX-1GP Title
10R2F-L-GP CPU Core-1(ISL95831)

Place close to Size Document Number Rev
A3
CPU socket BAD50-HC -1
5 4 3 2 1
5 4 3 2 1
DCBATOUT
change to Net Name
1
PC4313 PC4314 PC4315 PC4316 PC4317
PR4314
SC4D7U25V5KX-GP
SC4D7U25V5KX-GP
SC4D7U25V5KX-GP
SC4D7U25V5KX-GP
SC4D7U25V5KX-GP
1 2PWR_VCCCORE_BOOT1_1
2
42 PWR_VCCCORE_BOOT1
2D2R3-1-U-GP
1 PC4318 PU4308 PU4309
4
FDMS3660S-GP
SCD22U25V3KX-GP FDMS3660S-GP
G1
D1
D1
D1
G1
D1
D1
D1
2
D VCC_CORE D
Q1
Q1
PL4303
PHASE
PHASE
42 PWR_VCCCORE_HG1
9 S1/D2 9 S1/D2 1 2
Q2 S2
Q2 S2
42 PWR_VCCCORE_PH1 COIL-D36UH-1-GP-U
G2
S2
S2
G2
S2
S2
PC4303 PC4320 PC4321
ST470U2VDM-5-GP-U1
ST470U2VDM-5-GP-U1
ST470U2VDM-5-GP-U1
1
1
PG4318
2
GAP-CLOSE-PWR-3-GP
GAP-CLOSE-PWR-3-GP
2 2 2
3
PG4317
1
PWR_VCCCORE_VSUM-_1
PR4315
DY
1
1R2F-GP
2 PWR_VCCCORE_ISEN2 42
PWR_VCCCORE_VSUM+_1
PR4316
42 PWR_VCCCORE_LG1 DY
1
1R2F-GP
PR4317
1 2 PWR_VCCCORE_VSUM- 42
1R2F-GP
PR4318
2 1
PWR_VCCCORE_ISEN1 42
10KR2F-2-GP
C PR4319 C
2 1
PWR_VCCCORE_VSUM+ 42
3K65R2F-1-GP
DCBATOUT change to Net Name

DCBATOUT
1
1
1
PC4307 PC4308 PC4309 PC4310 PC4311 PC4306
SE47U25VM-11-GP
2
SC4D7U25V5KX-GP
SC4D7U25V5KX-GP
SC4D7U25V5KX-GP
SC4D7U25V5KX-GP
SC4D7U25V5KX-GP
2
2
PR4308
1 2PWR_VCCCORE_BOOT2_1 PL4302
VCC_CORE
42 PWR_VCCCORE_BOOT2
2D2R3-1-U-GP Delete gap 0220
1 2
1 PC4312 PU4305 PU4312 Delete gap
1
FDMS3660S-GP FDMS3660S-GP COIL-D36UH-1-GP-U PC4304 PC4305 PC4319

SCD22U25V3KX-GP
ST470U2VDM-5-GP-U1
ST470U2VDM-5-GP-U1
ST470U2VDM-5-GP-U1
1
1
G1
D1
D1
D1
G1
D1
D1
D1
2 PG4304
2
2
GAP-CLOSE-PWR-3-GP
GAP-CLOSE-PWR-3-GP
Q1
Q1
2 2 2
B PWR_VCCCORE_HG2 B
42 PWR_VCCCORE_HG2
3
PHASE
PHASE
PWR_VCCCORE_PH2 9 S1/D2 9 S1/D2 PG4303

Q2 S2
Q2 S2
1
42 PWR_VCCCORE_PH2
G2
S2
S2
G2
S2
S2
PWR_VCCCORE_LG2
42 PWR_VCCCORE_LG2
8
PR4309
PWR_VCCCORE_VSUM-_2
DY
1
1R2F-GP
PWR_VCCCORE_VSUM+_2
PR4310
DY
1
1R2F-GP
PR4311
1 2 PWR_VCCCORE_VSUM- 42
1R2F-GP
PR4312
2 1
PWR_VCCCORE_ISEN2 42
10KR2F-2-GP
PR4313
2 1
PWR_VCCCORE_VSUM+ 42
A 3K65R2F-1-GP A
<Core Design>
1bios.ru
Wistron Corporation
Title
CPU Core-2(ISL95831)
Custom
BAD50-HC -1
5 4 3 2 1
5 4 3 2 1
change to Net Name
DCBATOUT
1
D PC4412 PC4402 PC4403 PC4404 PC4405 PC4406 D
PR4401
1 2 PW R_GFXCORE_BOOT_1
SC4D7U25V5KX-GP
SC4D7U25V5KX-GP
SC4D7U25V5KX-GP
SC4D7U25V5KX-GP
SC4D7U25V5KX-GP
SC4D7U25V5KX-GP
2
2
42 PW R_GFXCORE_BOOT
1R3J-L1-GP
1 PC4407 PU4401 PU4402
4
SCD22U25V3KX-GP FDMS3660S-GP FDMS3660S-GP
G1
D1
D1
D1
G1
D1
D1
D1
2
VCC_GFXCORE
Q1
Q1
PL4401
PHASE
PHASE
42 PW R_GFXCORE_HG
9 S1/D2 9 S1/D2 1 2
Q2 S2
Q2 S2
42 PW R_GFXCORE_PH COIL-D36UH-1-GP-U
G2
S2
S2
G2
S2
S2
PC4401 PC4413
42 PW R_GFXCORE_LG
1
ST470U2VDM-5-GP-U1
ST470U2VDM-5-GP-U1
PG4401 PG4402
2
2 2
GAP-CLOSE-PWR-3-GP
GAP-CLOSE-PWR-3-GP
3
1
1
PWR_GFXCORE_ISN_R
PWR_GFXCORE_ISP_R
PC4408
PR4402
DY
DY
2 1PW R_GFXCORE_ISN_PRC
1 2
1
C PC4409 SCD068U16V2KX-GP 549R2F-GP C
SCD1U10V2KX-4GP
2
PR4403 PR4404
1 2 PW R_GFXCORE_ISN_PR 1 2 PW R_GFXCORE_ISN 42
NTC-10K-26-GP
1
1R2F-GP 402R2F-GP
PC4410
1
PR4405
1
PC4411
SCD01U16V2KX-3GP
PR4406 SCD1U16V2KX-3GP
Place near choke
1 2
2
PW R_GFXCORE_ISP_PR
11KR2F-L-GP
PR4407
2
7K5R2F-1-GP
PR4408
2
2 1 PW R_GFXCORE_ISP 42
10KR2F-2-GP
DCBATOUT
1
PC4414
SE47U25VM-11-GP
2
B B
delete gap
A <Core Design> A
1bios.ru
Wistron Corporation
Title
CPU Core-3(ISL95831)
A3
BAD50-HC -1
5 4 3 2 1
5 4 3 2 1
DCBATOUT PW R_DCBATOUT_1D05V 1D05V_LAN 1D05V_PW R 1D05V_LAN
PG4501
1 2 PG4505 PG4514
1 2 1 2
GAP-CLOSE-PW R
PG4502 GAP-CLOSE-PW R GAP-CLOSE-PW R
1 2 PG4506 PG4515
change to close gaps1129 1 2 1 2
GAP-CLOSE-PW R
D PG4503 GAP-CLOSE-PW R GAP-CLOSE-PW R D
1 2 PG4507 PG4516
1 2 1 2
GAP-CLOSE-PW R
PG4504 GAP-CLOSE-PW R GAP-CLOSE-PW R
1 2 PG4508 PG4517
1 2 1 2
GAP-CLOSE-PW R
GAP-CLOSE-PW R GAP-CLOSE-PW R
1
-1 0316 PG4510 PG4518

PC4509 PW R_DCBATOUT_1D05V 1 2 1 2
SE47U25VM-13-GP
TPS51218 for 1D05V

2
928 79.47612.3GL GAP-CLOSE-PW R GAP-CLOSE-PW R

2ND = 79.47612.3FL PG4509 PG4519
1 2 1 2
1
3D3V_S5 2 1 PC4504 PC4505 PC4506 PC4507
PR4516 10KR2J-3-GP DY GAP-CLOSE-PW R GAP-CLOSE-PW R
PU4502
SC4D7U25V5KX-GP
SC4D7U25V5KX-GP
SC4D7U25V5KX-GP
SCD1U25V3KX-GP
PG4511 PG4520
PWR_1D05V_PGOOD
2
5
6
7
8
FDMS7698-GP 1 2 1 2
D
D
D
D
Non_iAMT_SBA GAP-CLOSE-PW R GAP-CLOSE-PW R
1 2 PG4512 PG4522
37,48 1D05V_VTT_PW RGD PR4517 1 2 1 2
0R2J-2-GP
G
4
S
S
S
GAP-CLOSE-PW R GAP-CLOSE-PW R
iAMT_SBA PG4513 PG4523
3
2
1
36 1D05V_LAN_PW RGD 1
PR4515
2
Mag. 0.56uH 10*10*4
Iomax=18A 1 2 1 2
0R2J-2-GP
PU4501 DCR=1.6~1.8mohm OCP>27A GAP-CLOSE-PW R GAP-CLOSE-PW R
9/14 SB
PR4504 PC4502 Idc=25A, Isat=40A
C
PR4501
68KR2F-GP 1 PGOOD GND 11 0R3J-0-U-GP SCD1U25V3KX-GP 1D05V_PW R change to close gaps1129 C
Non_iAMT_SBA 1 2 PW R_1D05V_TRIP 2 10 PW R_1D05V_VBST 1 2PW R_1D05V_VBST_R
2 1
TRIP VBST PL4501
1 2 PW R_1D05V_EN 3 9 PW R_1D05V_DRVH
36,37,46,47 RUNPW ROK EN DRVH
PR4502 PW R_1D05V_VFB 4 8 PW R_1D05V_SW 1 2
0R2J-2-GP PW R_1D05V_CCM VFB SW
5 RF V5IN 7 5V_PW R
1
6 PW R_1D05V_DRVL
DRVL IND-D56UH-12-GP PR4505
1
1
SC1KP50V2KX-1GP
PC4501
1
1 2 PR4503 PC4503 10R2F-L-GP PC4508 PC4511
19,27,36 PM_SLP_LAN#
5
6
7
8
PR4514 470KR2F-GP TPS51218DSCR-GP-U2
2
D
D
D
D
SE330U2D5VDM-1GP
SC1U10V2KX-1GP
SCD1U10V2KX-4GP
0R2J-2-GP PU4503
2
iAMT_SBA FDMS0308AS-GP
2
2
VTT_SENSE_L
1
G
4
S
S
S
PR4506
10KR2F-2-GP
3
2
1
2
PW R_1D05V_VFB Matsuki cap 390uF
2.5V, ESR=10mohm
1
PR4507
20KR2F-L-GP
Vout=0.704V*(R1+R2)/R2
2
VSS_SENSE_L
1
PR4508
PR4509 10R2F-L-GP
B
VTT_SENSE_L 1 2
DY VCCIO_SENSE 8
B
2
0R2J-2-GP
1
PC4510
DY SC1000P50V3JN-GP-U
2
PR4510
VSS_SENSE_L 1 2 VSSIO_SENSE 8
0R2J-2-GP DY
A A
<Core Design>
1bios.ru
Wistron Corporation
Title
DC to DC_1D05V(TPS51218D)
Custom
BAD50-HC -1
5 4 3 2 1
5 4 3 2 1
DCBATOUT PWR_DCBATOUT_1D5V 1D5V_PWR 1D5V_S3
PG4601 PG4610
1 2 1 2
GAP-CLOSE-PWR GAP-CLOSE-PWR
PG4602 PG4611
1 2 1 2
D PG4603 PG4612 D
1 2 1 2
PG4604 PG4613
1 2 1 2
PG4614
1
1 2
PC4615
ST15U25VDM-5-GP GAP-CLOSE-PWR
DY
RT8207L for 1D5V
2
PG4615
1 2
change to close gaps1129 GAP-CLOSE-PWR
PG4616
PR4603 1 2
PWR_1D5V_VCC5 2 1 5V_S5
5D1R2F-GP GAP-CLOSE-PWR
PG4617
1
PC4606 1 2
SC1U10V2KX-1GP PWR_DCBATOUT_1D5V
-1 0316 GAP-CLOSE-PWR
2
PG4618
1
PC4602
SC1KP50V2KX-1GP
1 2
PR4602
9K53R2F-GP PC4610 PC4613 PC4614 GAP-CLOSE-PWR
1
1 2 PWR_1D5V_EN PG4619
19,27 PM_SLP_S4#
SCD1U25V3KX-GP
PR4610 0R0402-PAD PWR_1D5V_VDDP 1 PR4604 2 5V_S5 D 1 2
SC4D7U25V5KX-GP
SC4D7U25V5KX-GP
9/14 SB 0R0603-PAD
2
PU4602
1
1
PC4611 GAP-CLOSE-PWR
5
6
7
8
SCD1U10V2KX-5GP PC4601 FDMS7698-GP PG4620
DY
D
D
D
D
SC1U10V2KX-1GP
DY DY 1 2
2
2
C PWR_1D5V_CS C
GAP-CLOSE-PWR
PG4621
3D3V_S5
G
4 1 2
S
S
S
1
GAP-CLOSE-PWR
3
2
1
PR4601 PG4622
16
14
15
10KR2F-2-GP PU4601 1 2
PC4608
G S
CS
VDDP
VDD
PR4605 GAP-CLOSE-PWR
2
PWR_1D5V_BOOT PWR_1D5V_PHASE_L PG4623

13
BOOT
22 1 2
2D2R3-1-U-GP
1 2 Iomax=17A 1 2
36,37,45,47 RUNPWROK PGOOD SCD1U25V3KX-GP OCP>25.5A
PWR_DCBATOUT_1D5V 1PR4609 2PWR_1D5V_TON 12 21 PWR_1D5V_UGATE GAP-CLOSE-PWR
620KR2F-GP TON UGATE PG4624
Close to pin23 PWR_1D5V_EN 11 PL4601 1D5V_PWR 1 2
S5
PWR_0D75V_EN 10 20 PWR_1D5V_PHASE 1 2 GAP-CLOSE-PWR
PG4605 S3 PHASE PG4625
1D5V_PWR 1 2 PWR_1D5V_VTTIN 23 IND-D68UH-51-GP-U 1 2
VLDOIN
1
GAP-CLOSE-PWR PC4603 PWR_1D5V_LGATE PC4616 PC4617 GAP-CLOSE-PWR

LGATE
19 D
1
PG4606 SC10U6D3V5MX-3GP 7 PC4612 PG4626
NC#7
5
6
7
8
SC1U16V3KX-5GP
SE330U2D5VDM-1GP
SE330U2D5VDM-1GP
1 2 DY 1 2
2
D
D
D
D
Close to pin23
2
Iomax=1A PG4607
1
VTTGND PGND
18
17
NC#17
OCP>1.5A 1D5V_PWR 1 2 PWR_1D5V_VDDQ 4
MODE PWR_1D5V_VDDQ PU4603
G
8 4
VDDQ
S
S
S
GAP-CLOSE-PWR FDMS0308AS-GP
DDR_VREF_PWR 24 9 PWR_1D5V_FB
3
2
1
VTT FB
1
DY
1
2 PR4607 20101124
VTTSNS
VTTREF
Close to output cap pin1, not 6 5V_S5 30KR2F-GP PC4609

DEM SC18P50V2JN-1-GP
R1 G S
GND
GND
B B
2
inside of the output cap
2
change toclose gaps RT8207LZQW-GP
25
74.08207.D73
1
R2 R4608
28KR2F-GP Vout=0.75*(1+R1/R2)
1PWR_1D5V_VTTREF
Vout=0.75*(1+30K/30K) =1.5V
2
1 PR4606 2 DDR_VREF_S3
0R0402-PAD
PC4607
SCD033U16V2KX-GP
2
0.75V
change to chose gaps Iomax=1.2A
PG4608 1 PR4611 2 PWR_0D75V_EN
37 0D75V_EN 0R0402-PAD
0D75V_S0 1 2 DDR_VREF_PWR
GAP-CLOSE-PWR
PG4609
1 2
GAP-CLOSE-PWR DY
A A
1
PC4604 PC4605
1bios.ru
<Core Design>
SC10U6D3V5MX-3GP
SC10U6D3V5MX-3GP
2
Wistron Corporation
Title
RT8207L
Custom
BAD50-HC -1
5 4 3 2 1
5 4 3 2 1
D D
APW7153B for 1D8V_S0

PR4701
3D3V_PW R 1 2
DY
10KR2F-2-GP
36,37,45,46 RUNPW ROK
confirm with cherry

3D3V_S5
PU4701
1D8V_S0
6 PVDD PGND 5
PL4701 PG4701
7 4 PW R_1D8V_LX 2 1 1D8V_PW R 1 2
VDD LX#4 IND-3D3UH-57GP
1
PC4701 PC4702 8 3 GAP-CLOSE-PW R
POK LX#3
1
PC4706 PC4707 PC4708
SC10U6D3V3MX-GP
SC10U6D3V3MX-GP
PW R_1D8V_FB 9 2 PR4704 PG4702
2
2
FB GND
SC100P50V2JN-3GP
SC22U6D3V5MX-2GP
SC22U6D3V5MX-2GP
1 2
20KR2F-L-GP
2
PW R_1D8V_COMP 10 1 PW R_1D8V_RT
GND
COMP SHDN/RT GAP-CLOSE-PW R
2
C C
APW 7153BQBI-TRG-GP PW R_1D8V_FB PG4703
11
Set at 0.8V 1 2
74.07153.A73
1
GAP-CLOSE-PW R
1
PR4705
PC4703
PR4706 PR4702 PR4703
16KR2F-GP
820KR2F-GP
2PW R_1D8V_COMP_R
1MR2F-GP
1 1 2
2
2 20KR2F-L-GP
2
SC100P50V2JN-3GP
PC4704 change to close gaps 1129
1 2
SC47P50V2JN-3GP
Vo=0.8*(1+(R1/R2))
DY -1 0310
PM_SLP_S3#_MOS
PQ4701
B B
19,27,29,36,37,75,82 PM_SLP_S3# G
D
1
PC4705 S
SCD1U10V2KX-5GP DY
2
2N7002K-2-GP
-1 0317
84.2N702.J31
2nd = 84.07002.I31
A <Core Design> A
1bios.ru
Wistron Corporation
Title
LDO_1D8V(APW7153B)
A3
BAD50-HC -1
5 4 3 2 1
5 4 3 2 1
TPS51461 for VCCSA
D D
3D3V_S5
5V_S5
2
PR4809
100KR2J-1-GP
1
1
PC4814
1
SC1U10V2KX-1GP
PR4806 1 PR4808 2 ALL_PW R_OK 37,42
2
1R2F-GP 0R0402-PAD
PR4812
1 DY2
1KR2F-3-GP
2
PW R_VCCSA_VID1 1 PR4805 2 VCCSA_VID1 9
PWR_VCCSA_PGOOD
PC4816 0R0402-PAD
SC2D2U10V3KX-1GP
PW R_VCCSA_VID0 1 PR4804 2 VCCSA_VID0 9
0R0402-PAD
2
PW R_VCCSA_EN 1 PR4801 2
0R0402-PAD 1D05V_VTT_PW RGD 37,45
1
PWR_VCCSA_V5DRV
U4801
DY
2
C PC4804 C
18
17
16
15
14
13
TPS51461RGER-GPSC1U6D3V2KX-GP NETNAME SAME AS BA50
VID1
VID0
PGOOD
EN
V5DRV
V5FILT
PR4807 PC4805 Design Current =6 A
0R3J-0-U-GP SCD1U25V3KX-GP
19
6.6A<OCP< 7.8A
5V_S5 PGND PW R_VCCSA_BST 1 PW R_VCCSA_BST_R
20 PGND BST 12 2 1 2
PG4801 21 11
PW R_VCCSA_VIN PGND SW#11
1 2 22 VIN SW#10 10
23 9 0D85V_PW R 0D85V_S0
VIN SW#9 PL4801
GAP-CLOSE-PW R 24 8 PG4803
VIN SW#8
1
PG4802 PC4803 PC4815 PC4813 25 7 PW R_VCCSA_SW 1 2 1 2

GND SW#7
PC4808
PC4809
1 2
COMP
MODE
SLEW
SC4D7U25V5KX-GP
SC4D7U25V5KX-GP
VOUT
SCD1U25V3KX-GP
SC22U6D3V5MX-2GP
SC22U6D3V5MX-2GP
VREF
IND-D47UH-22-GP GAP-CLOSE-PW R
GND
2
GAP-CLOSE-PW R PG4804
1
74.51461.043 PC4811 PC4810 PC4807 PC4801 PC4812 1 2
68.R4710.10M
1
2
3
4
5
6
SC10U6D3V5MX-3GP
SC10U6D3V5MX-3GP
SC10U6D3V5MX-3GP
SC10U6D3V5MX-3GP
SCD1U25V3KX-GP
GAP-CLOSE-PW R
PR4811
2
PG4805
change to close gaps1129 PW R_VCCSA_VOUT
PWR_VCCSA_VREF
PWR_VCCSA_COMP
1 2 0D85V_PW R 1 2
PW R_VCCSA_SLEW 100R2F-L1-GP-U
PR4813 GAP-CLOSE-PW R
1 2 PG4806
VCCSA_SENSE 9
DY DY DY 1 2
2
0R2J-2-GP
PC4806 GAP-CLOSE-PW R
SCD01U50V2KX-1GP PG4807
1
1 2
1
B PR4802 GAP-CLOSE-PW R B
4K99R2F-L-GP PG4808
1 2
0215 -1
2
GAP-CLOSE-PW R
PWR_VCCSA_COMP_1
VID0 VID1 VCCSA
L L 0.9V
L H 0.8V change to close gaps1129
H L 0.725V
1
H H 0.675V PC4817
SC3300P50V2KX-1GP
2
0215 -1
2
PC4802
SCD22U10V2KX-1GP
1
A <Core Design> A
1bios.ru
Wistron Corporation
Title
LDO_VCCSA(TPS51461)
A3
BAD50-HC -1
5 4 3 2 1
3D3V_S0
INVERTER POWER
SSID = VIDEO Camera Power
F4901 DCBATOUT
POLYSW -1D1A24V-GP-U F4902
DCBATOUT_LCD FUSE-1D1A6V-4GP-U
69.50007.A31 3D3V_S0 3D3V_CAMERA_S0
2nd = 69.50007.A41 69.50007.691
2
2ND = 69.50007.771 R4915 R4916
LVDS CONNECTOR 2 1 1 2
100KR2J-4-GP 100KR2J-4-GP
1
FC4911 DY DY
1
SC4D7U25V5KX-GP
SC1KP50V2KX-1GP
SCD1U50V3KX-GP
SC68P50V2JN-1GP
C4906 C4904 C4905
1
C4903
SC10U6D3V5MX-3GP
103 DP_AUX#
2
103 DP_AUX
LVDS CONNECTOR
2
DCBATOUT_LCD R4917 R4918
LCD1 100KR2J-4-GP 100KR2J-4-GP

41 DY DY
NP1
1
1
2 eDP decet.
3
4
5
6
7
8 DBC_EN_C 103
9 BLON_OUT_C
10 LCD_BRIGHTNESS 2 1 LBKLT_CTL 94
11 R4902 33R2J-L1-GP 3D3V_CAMERA_S0
12 USB_CAMERA#1 2 USB_PN12 18
13 USB_CAMERA 1 R4908 2 0R0603-PAD
USB_PP12 18
14 R4909 0R0603-PAD Camera GND
15 LVDSA_CLK_R 94
16 LVDSA_CLK_R# 94
17
18 LVDSA_DATA2_R 94
19 LVDSA_DATA2_R# 94
20
21 LVDSA_DATA1_R 94 Note: Place pull up resistor within 2 inch of CPU
23
24 LVDSA_DATA0_R 94
26 1123 SB 3D3V_S0
27 DP_DATA1_R 103
28 DP_DATA1_R# 103
29 3D3V_S0
1
30 DP_AUX 103
31 DP_AUX# 103 R4933
32 10KR2J-L-GP
33 DP_DATA0_R 103
34 DP_DATA0_R# 103 0210 -1
2
1
35 EDP#_LVDS_R
36 R4919 EDP#_LVDS_C 1 2 EDP#_LVDS 22
LVDS_DDC_DATA 94 10KR2J-L-GP
37 R4929
LVDS_DDC_CLK 94
38 3D3V_S0 lvds connect to GND. Q4904 0R0402-PAD
39 LCDVDD MMBT3904-4-GP
C
2
40 84.T3904.C11
SCD1U10V2KX-5GP
C4901
NP2 EDP#_LVDS_R 1 2EDP#_LVDS_B B 2ND = 84.03904.P11

1
42 FC4913 FC4912 C4902 R4904 R4923 3rd = 84.03904.L06

SC68P50V2JN-1GP
10KR2J-3-GP 150KR2J-L1-GP
E
PS-CON40-GP DY SC1U6D3V2KX-GP 2 1 3D3V_S0
2
1
SC68P50V2JN-1GP
20.F1816.040 DY
9/19
FOR RF DBC_EN_C 2 1DBC_EN 1 TP4901
R4901
33R2J-2-GP
SSID = VIDEO
1
R4906
DY
9/22
DY 10KR2J-3-GP
LCD POWER for ANNIE

2
LCDVDD
3D3V_S0
1KR2J-1-GP
U4901 27 BLON_OUT 1 2 BLON_OUT_C
Layout 40 mil LVDSA_CLK_R 2 1 FC4901
R4903
SC100P50V2JN-3GP
1 5 DY SC4D7P50V2CN-1GP
94 LCDVDD_EN EN IN#5
2 LVDSA_CLK_R# 2 1 FC4902
GND
2
3 4 DY SC4D7P50V2CN-1GP
OUT IN#4
100KR2J-1-GP
R4911 C4910 LVDSA_DATA2_R 2 1 FC4903

1
1
SC4D7U6D3V3KX-GP
C4907 FC4914 DY SC4D7P50V2CN-1GP

2
1
R4914 C4909 C4908 G5285T11U-GP LVDSA_DATA2_R# 2 1 FC4904

100KR2J-1-GP
DY 74.05285.07F DY DY SC4D7P50V2CN-1GP
2
1
SCD1U16V2KX-3GP
SC4D7U6D3V3KX-GP
SC68P50V2JN-1GP
9/19 LVDSA_DATA1_R 1 FC4905

2nd = 74.09724.09F 2
2
FOR RF SC4D7P50V2CN-1GP
DY
2
LVDSA_DATA1_R# 2 1 FC4906
DY SC4D7P50V2CN-1GP
LVDSA_DATA0_R 2 1 FC4907 <Core Design>
DY SC4D7P50V2CN-1GP
LVDSA_DATA0_R# 2 1 FC4908
DY SC4D7P50V2CN-1GP
Wistron Corporation
1bios.ru
LVDS_DDC_DATA 2 1 FC4909
SC4D7P50V2CN-1GP 21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
LVDS_DDC_CLK
DY Taipei Hsien 221, Taiwan, R.O.C.
2 1 FC4910
DY SC4D7P50V2CN-1GP
Title
LCD Connector
A3
BAD50-HC -1
5 4 3 2 1
Pull High 5V Design on CRT Board 3D3V_S0

5V_CRT_S0 CRT1
CRT DDCDATA & DDCCLK level shift 5V_S0
9 4 500mA
A
VCC_CRT NC#4 5V_CRT_S0
SCD01U16V2KX-3GP
D 11 D
NC#11
C5012
D5001 CH551H-30GP-GP
1
CRT_DDCDATA_CON 12 F5001 83.R5003.J8F

CRT_DDCCLK_CON DDCDATA_ID1 5V_CRT_S0_R
15 DDCCLK_ID3 CRT_IN#_R 1 AFTP5001
2 1 2nd = 83.R5003.H8H
5 3rd = 83.5R003.08F
2
K
CRT_R GND FUSE-1D1A6V-4GP-U
1 CRT_RED GND 6
CRT_G 2 7 69.50007.691
CRT_B CRT_GREEN GND
3 CRT_BLUE GND 8 2nd = 69.50007.771
5
6
7
8
10 3D3V_S0
GND
14 VSYNC GND 16
95 CRT_VSYNC_CON_MB 13 17
95 CRT_HSYNC_CON_MB HSYNC GND RN5003
SRN10KJ-6-GP
D-SUB-15-124-GP-U
4
3
2
1
20.20939.015 4 3 CRT_DDCDATA_CON
95 DDCDATA_MB
CRT_IN#_R
2nd = 20.20935.015 5 2
6 1
C C
95 DDCCLK_MB
CRT_DDCCLK_CON
Q5001
2N7002KDW-GP
84.2N702.A3F
2nd = 84.2N702.F3F
L5001
FCM1608CF-220T05-GP
68.00245.011
CRT RGB 2nd = 68.00230.021
B 95 CRT_RED_R_MB 1 2 CRT_R CRT_DDCDATA_CON B
L5002
1
FCM1608CF-220T05-GP C5008 CRT_HSYNC_CON_MB
SC100P50V2JN-3GP
SC18P50V2JN-1-GP
68.00245.011
1
95 CRT_GREEN_R_MB 1 2 CRT_G C5009 CRT_VSYNC_CON_MB
SC18P50V2JN-1-GP
L5003
DY
1
FCM1608CF-220T05-GP CRT_DDCCLK_CON
C5010
2
68.00245.011 DY
1
95 CRT_BLUE_R_MB 1 2 CRT_B
2
C5011
DY SC100P50V2JN-3GP
2
4
3
2
1
1
RN5001 C5001 C5002 C5003
C5004 C5005 C5006 DY
DY DY DY
SC10P50V2JN-4GP
SC10P50V2JN-4GP
SRN150F-1-GP SC10P50V2JN-4GP
2
2
SC8P250V2CC-GP
SC8P250V2CC-GP
SC8P250V2CC-GP
<Core Design>
5
6
7
8
A
0806 check RN5004 擺擺擺擺 Wistron Corporation A
1bios.ru
Title
CRT Connector
A4
BAD50-HC -1
5 4 3 2 1
5 4 3 2 1
D5102
BAW56-5-GP I2C_CTL_EN LOW or NC LOW or NC HIGH HIGH
HDMI1 TMDS_TXC-_MB TMDS_TX0+_MB 83.00056.Q11
22 TMDS_TXC+_MB TMDS_TX0-_MB 2nd = 83.00056.K11 MODE /
20 C5101 SC2D2U10V3KX-1GP CEXT 5V_S0 LOW HIGH LOW HIGH
1
I2C_ADDR
3D3V_S0
1 TMDS_TX2+_MB
VBIAS_PS8122 TMDS_SCL_R 1 I2C I2C
2 TMDS_TX3+_C TMDS_TX1+_MB PinMode PinMode
TMDS_TX2-_MB TMDS_TX3-_C TMDS_TX1-_MB
addresses addresses
3 3 HDMI/DVI DP
4 TMDS_TX1+_MB 9E/9F BE/BF
5 TMDS_SDA_R
2
6 TMDS_TX1-_MB
TMDS_TX0+_MB
36
35
34
33
32
31
30
29
28
27
26
25
7
4
3
8 U5101 3D3V_S0
9 TMDS_TX0-_MB 5V_HDMI_S0 5V_S0
IN1P
VBIAS
OUT2D1P
OUT2D2P
OUT2D3P
IN1N
CEXT
OUT2D1N
GND
OUT2D2N
VCC
OUT2D3N
10 TMDS_TXC+_MB RN5101
11 SRN2K2J-1-GP
12 TMDS_TXC-_MB 1 2
1
13 HDMI_CEC 1 TP5101
1
2
D 14 TPAD14-OP-GP F5101 TMDS_TX0+_C 37 24 TMDS_TX2+_MB R5126 R5127 D
TMDS_SCL FUSE-1D1A6V-4GP-U TMDS_TX0-_C IN2P OUT2D4P TMDS_TX2-_MB
15 38 23 4K7R2J-2-GP 4K7R2J-2-GP
TMDS_SDA IN2N OUT2D4N
16 69.50007.691 C5106 3D3V_S0 39
VCC GND
22 I2C BEBF I2C
17 2nd = 69.50007.771 TMDS_TX1+_C 40 21 TMDS_SCL
2
TMDS_TX1-_C IN3P SCL2_AUX2P TMDS_SDA I2C_ADDR
18 1 2 41 20
HDMI_IN_C IN3N SDA2_AUX2N HDMI_IN
19 1 2 HDMI_IN 27 42 19
R5120 1KR2J-1-GP TMDS_TX2+_C GND HPD2 I2C_ADDR I2C_CTL
21 43 18
SC1U10V3ZY-6GP TMDS_TX2-_C IN4P MODE/I2C_ADDR
23 44 17 TMDS_TXC+_DOCK 104
1
TMDS_SCL_C TMDS_SCL_B IN4N OUT1D1P
1 4 45 16 TMDS_TXC-_DOCK 104
SKT-HDMI23-40-GP TMDS_SDA_C TMDS_SDA_B SCL_SRC OUT1D1N R5123 R5128
2 3 46 15 3D3V_S0
1
DP1_HPD_C SDA_SRC VCC 3D3V_S0

47 14 TMDS_TX0+_DOCK 104 0R2J-2-GP 1KR2J-1-GP
REXT HPD_SRC OUT1D2P
22.10296.271 48
REXT OUT1D2N
13 TMDS_TX0-_DOCK 104 PinMode/I2C 9E9F PinMode
R5101 SRN0J-6-GP
OE#/SCL_CTL
49
SDA1_AUX1N
SW/SDA_CTL
SCL1_AUX1P
2
1
1
GND
I2C_CTL_EN
100KR2J-1-GP RN5107 R5122
2ND = 22.10296.311
OUT1D4N
OUT1D3N
OUT1D4P
OUT1D3P
499R2F-2-GP R5106
2
3RD = 22.10296.501 0R2J-2-GP
HPD1
DY
GND
VCC
2
2
VBIAS_PS8122
1
2
3
4
5
6
7
8
9
10
11
12
1
PS8122QFAN48G-GP
R5104
0R2J-2-GP
I2C_CTL
TMDS_SDA_A_8122 TMDS_TX1+_DOCK 104
2
TMDS_SCL_A_8122
TMDS_TX1-_DOCK 104
UMA1 2 C5110 SCD1U10V2KX-5GP TMDS_TX0-_C TMDS_TX2+_DOCK 104

17 DDBP_DATA0# C5108 SCD1U10V2KX-5GP TMDS_TX0+_C 27 HDMI_DVI_IN
17 DDBP_DATA0 UMA1 2
C5103 SCD1U10V2KX-5GP TMDS_TX1-_C 104 DOCK_SDA TMDS_TX2-_DOCK 104
17 DDBP_DATA1# UMA1 2
C5111 SCD1U10V2KX-5GP TMDS_TX1+_C 104 DOCK_SCL 3D3V_S0
17 DDBP_DATA1 UMA1 2 VBIAS VCC GND
UMA1 2 C5112 SCD1U10V2KX-5GP TMDS_TX2-_C C5135
17 DDBP_DATA2#
SCD22U10V2KX-1GP
UMA1 2 C5102 SCD1U10V2KX-5GP TMDS_TX2+_C
1
17 DDBP_DATA2 C5104 SCD1U10V2KX-5GP TMDS_TX3-_C
17 DDBP_DATA3# UMA1 2 AC INPUT
C5109 SCD1U10V2KX-5GP TMDS_TX3+_C DC INPUT 3D3V_S0
17 DDBP_DATA3 UMA1 2 For HDMI/DVI 3D3V_S0
FOR HDMI/DVI
2
DIS_PX_Muless1 2 C5123 SCD1U10V2KX-5GP
0909
1
2
84 GPU_DDCP_DATA3 C5124 SCD1U10V2KX-5GP
C
84 GPU_DDCP_DATA3# DIS_PX_Muless1 2
C5122 SCD1U10V2KX-5GP
C
84 GPU_DDCP_DATA2 DIS_PX_Muless1 2
84 GPU_DDCP_DATA2# DIS_PX_Muless1 2 PinMode
C5117 SCD1U10V2KX-5GP SRN4K7J-8-GP
2 R5150 1 TMDS_SDA_A_8122
84 GPU_DDCP_DATA1 DIS_PX_Muless1 2
C5118 SCD1U10V2KX-5GP TMDS_SDA_A_8122 RN5113 0R2J-2-GP
84 GPU_DDCP_DATA1# DIS_PX_Muless1 2
27,29,95,104,106 BD_IN# 1
R5129
2
0R2J-2-GP
DIS_PX_Muless1 2 I2C
4
3
84 GPU_DDCP_DATA0 C5119 SCD1U10V2KX-5GP
84 GPU_DDCP_DATA0# DIS_PX_Muless1 2 11/09 SB
2N7002KDW-GP
6 1
27,39,79,86 SML1_DATA_C TMDS_SDA_A 28
H L 3D3V_VGA_S0 3D3V_S0 84.2N702.A3F

2nd = 84.2N702.F3F
5 2
SW 4 3
OUT2 OUT1 27,39,79,86 SML1_CLK_C

Q5101
3D3V_VGA_S0
2
2
TMDS_SCL_A 28
R5143 R5142 I2C
0R2J-2-GP 0R2J-2-GP 2 R5152 1 TMDS_SCL_A_8122
4
3
RN5102 PX UMA 0R2J-2-GP
SRN2K2J-1-GP
1
1
3D3V_S0 0909
PX
1
2
3D3V_S0 RN5105 HDMI_SMBUS_3D3V
5V Tolerance SRN0J-6-GP
1
PX
2 3 HDMI_CLK_1 4 3 TMDS_SCL_C
84 GPU_DDCP_SCL
2
1 4 HDMI_DATA_1 TMDS_SDA_C pin mode R5136

84 GPU_DDCP_SDA 10KR2J-3-GP
R5140 5 2
0R2J-2-GP
2
6 1 TMDS_SCL_A_8122
1 4
1
17 PCH_HDMI_CLK
17 PCH_HDMI_DATA 2 3
UMA Q5106 9/3
DP1_HPD_E
RN5112 2N7002KDW-GP
SRN0J-6-GP 84.2N702.A3F 4 3 R5137
B R5133 B
2nd = 84.2N702.F3F
HDMI_IN 1 2HDMI_IN_R 5 2 HDMI_DVI_IN_R 2 1 HDMI_DVI_IN
pin mode pin mode 0R2J-2-GP
pin mode
6 1
3
0R2J-2-GP
DP1_HPD_C 1 DP1_HPD
84.03904.L06
2 1
2nd = 84.03904.X11 Q5103
2
R5147 1KR2J-1-GP 2N7002KDW-GP

Q5102 UMA 84.2N702.A3F
PMBS3904-1-GP DP1_HPD_Q 2 1 2nd = 84.2N702.F3F
0R2J-2-GP R5135 PCH_DP1_HPD 17
1208 SB
1
2 1
R5119 0R2J-2-GP R5138 GPU_DP1_HPD 84
10KR2J-3-GP PX
2
A A
1bios.ru
<Core Design>
Wistron Corporation
Title
HDMI Level Shifter/Connector

A2
BAD50-HC -1
5 4 3 2 1
5 4 3 2 1
DP
3D3V_S0
2
D D
R5201
0R2J-2-GP
1
Dock
BD_DP_IN_E
3
1 2 BD_DP_IN_C 1 84.03904.L06
27,104 BD_DP_IN
2nd = 84.03904.X11
2
R5205 1KR2J-1-GP Dock_UMA
Q5201 DOCK
Dock PMBS3904-1-GP BD_DP_IN_Q 2 1 PCH_DP_HPD 17
0R2J-2-GP R5202
1
2 1 GPU_DP_HPD 84
R5204 0R2J-2-GP R5206
10KR2J-3-GP Dock_PX
Dock
2
C C
17 DDCP_AUX# Dock_UMA
1 2 C5209 SCD1U10V2KX-5GP DOCK_DP_AUX# 104
17 DDCP_AUX Dock_UMA
1 2 C5210 SCD1U10V2KX-5GP DOCK_DP_AUX 104
Dock_UMA
1 2 C5207 SCD1U10V2KX-5GP DOCK_DP_DATA0# 104
B 17 DDCP_DATA0# C5205 SCD1U10V2KX-5GP B
17 DDCP_DATA0 Dock_UMA
1 2 DOCK_DP_DATA0 104
Dock_UMA
17 DDCP_DATA1# C5206 SCD1U10V2KX-5GP
Dock_UMA
Dock_UMA
84 GPU_DDEP_AUX# Dock_PX1 2 C5216 SCD1U10V2KX-5GP

84 GPU_DDEP_AUX Dock_PX1 2 C5215 SCD1U10V2KX-5GP
Dock_PX1 2 C5220 SCD1U10V2KX-5GP

84 GPU_DDEP_DATA0# C5219 SCD1U10V2KX-5GP
84 GPU_DDEP_DATA0 Dock_PX1 2
84 GPU_DDEP_DATA3 Dock_PX1 2 <Core Design>
A A
Wistron Corporation
1bios.ru
Title
Display Port
A3
BAD50-HC -1
5 4 3 2 1
5 4 3 2 1
D D
C
(Blanking) C
B B
<Core Design>
A
1bios.ru
Title
S-VIDEO
A4
BAD50-HC -1
5 4 3 2 1
5 4 3 2 1
D D
(Blanking)
C C
B B
<Core Design>
A
1bios.ru
Title
Reserved
A4
BAD50-HC -1
5 4 3 2 1
5 4 3 2 1
SSID = User.Interface
D
ITP Connector D
H_CPURST# use pull-up Resistor close

ITP connector 500 mil ( max ),
others place near CPU side.
C C
CPU ITP Connector

TCK(PIN 5)
TCK(PIN AC5)
FBO(PIN 11)
B B
<Core Design>
A
1bios.ru
Title
ITP
A4
BAD50-HC -1
5 4 3 2 1
SSID = SATA
SATA HDD Connector
HDD1
22 21
1 NP1
79 HDD_UNLOAD 2
3
4
5
6
5V_S0 7
SC10U10V5ZY-1GP
SCD1U10V2KX-5GP
8
1
C5605 C5606 9
10
11
2
12
13
14
SCD01U16V2KX-3GP2 1 C5604 SATA_RXP0_C 15
21 SATA_RXP0 SCD01U16V2KX-3GP2 1 C5603 SATA_RXN0_C 16
21 SATA_RXN0 17
SCD01U16V2KX-3GP2 1 C5602 SATA_TXN0_C 18
21 SATA_TXN0 SCD01U16V2KX-3GP2 1 C5601 SATA_TXP0_C 19
21 SATA_TXP0 20 NP2
24 23
FOX-CON20-1-GP-U
20.F1546.020
2ND = 20.F1473.020
2nd source 62.10065.541 and 62.10065.A11.

ODD Connector BAY1
SATA Zero Power ODD
9
NP1 100 mil
S1
ODD_PW R_5V
22 SATA_ODD_PW RGT
21 SATA_TXP4 SCD01U16V2KX-3GP2 1 C5622 SATA_TXP4_C S2 U5601
21 SATA_TXN4 SCD01U16V2KX-3GP2 1 C5623 SATA_TXN4_C S3 SY6288CCAC-GP ZPO
S4 74.06288.079
SCD01U16V2KX-3GP2 1 C5614 SATA_RXN4_C S5
21 SATA_RXN4 SCD01U16V2KX-3GP2 1 C5610 SATA_RXP4_C S6 5V_S0
21 SATA_RXP4 S7 4 5
EN/EN# OC#
3 IN#3 OUT#6 6
8 2 IN#2 OUT#7 7
1 GND OUT#8 8
1
P1
1
22 SATA_ODD_PRSNT# P2 TC5601
R5603 2 ODD 1 ODD_PW R_5V P3 ZPO TC5602
SC10U10V5ZY-1GP
5V_S0
2
R5602 1 2 SATA_ODD_DA#_C P4 ZPO
Current limit
SC10U10V5ZY-1GP
2
18 SATA_ODD_DA# 0R2J-2-GP 0R5J-5-GP
DY P5
P6
NP2
Active High
10
MIN =>2.01A
SKT-SATA7P-6P-6-GP
62.10065.981
2nd = 62.10065.361
SATA Zero Power ODD

3D3V_S0
1
R5605
10KR2J-3-GP
3D3V_S0
RN5601
2
1 4 SATA_ODD_PW RGT
SATA_ODD_DA# SATA_ODD_DA#_C
ODD_PWRGT#
2 3
SRN10KJ-5-GP
ZPO
6
Q5601
2N7002KDW -GP
ZPO <Core Design>
84.2N702.A3F
1bios.ru
2nd = 84.2N702.F3F
1
Wistron Corporation
SATA_ODD_PW RGT SATA_ODD_DA# Title

0707 Modify:
Change Q5601 to DUAL 2N7002 for isolate MD/DA signal between PCH and ODD. HDD/ODD
A3
BAD50-HC -1
5 4 3 2 1
ESATA Power AP2301MPG-13-GP

D D
5V_USB0_S5
5V_S5 ESATA 5
FLG
27,107 USB_PW R_EN# 4 EN# OUT#6 6 at least 80 mil
at least 80 mil 3 IN#3 OUT#7 7
2 IN#2 NC#8 8
1 9 TC5701
GND GND
1
C5703 C5704 ST100U6D3VBM-5GP 1208 SB
77.C1071.081
1
C5702
SCD1U10V2KX-4GP
SC1U10V3ZY-6GP
2
2
1
C5709 U5701
74.02301.071
2
SCD1U10V2KX-4GP
SC1U10V3ZY-6GP
2
2ND = 74.02000.B71 ESATA

3RD = 74.06288.A79 2nd = 77.C1071.18L
3rd = 77.81071.06L
ESATA ESATA
ESATA ESATA
C C
ESATA1
8 10 ESATA
NP1 -1_0303 1208 SB
ESATA
5V_USB0_S5 1A 1
2 SATA_RXP5_C SCD01U16V2KX-3GP2 1 C5705 SATA_RXP5 21
2A 3 SATA_RXN5_C SCD01U16V2KX-3GP2 1 C5706 SATA_RXN5 21
18 USB_PN9
4
Bypass SATA redriver path 3A 5 SATA_TXN5_C 2 1 SATA_TXN5 21
18 USB_PP9 SATA_TXP5_C SCD01U16V2KX-3GP2
6 1 C5708 SATA_TXP5 21
9/30 4A 7 SCD01U16V2KX-3GP C5707
9/3
B
NP2 ESATA B
9 11
ESATA I-SATA-->ESATA
SKT-USB+ESATA-7-GP-U
1208 SB
A <Core Design> A
1bios.ru
Wistron Corporation
Title
E-SATA/USB CHARGER
A3
BAD50-HC -1
5 4 3 2 1
5 4 3 2 1
SSID = AUDIO
LINE OUT
LOUT1
1
Speaker 29
29
MB_HP_L
MB_HP_R
L5803 1 2
SBK160808T-601Y-N-GP
L5802 1 2
HP_L_C
HP_R_C
2
6
3
D SBK160808T-601Y-N-GP 4 D
Connector 29 AUD_HP1_JD# 5
NP1
NP2
1
GAP-CLOSE AUDIO-JK269-GP-U
-1_0302 EC5812
104 DOCK_LINEOUT_JD# 2 1 22.10263.371
SPK1
G5802
MLVS0402M04-GP-U 2ND = 22.10265.581
3
1 1 TP5813 TPAD14-OP-GP
29 AUD_SPK_L-
2
29 AUD_SPK_L+ 2
4
ACES-CON2-20-GP
AUD_AGND
C5801
C5802
20.F1639.002
2nd = 20.F1804.002
2
2
SC1000P50V3JN-GP-U
SC1000P50V3JN-GP-U
1
EC5815
2 1
C C
SCD1U10V2KX-5GP
R5810 2 DY 1
EC5816 0R2J-2-GP
2 1
SCD1U10V2KX-5GP
MIC IN EC5817
2 1
DY
R5811 2 DY 1
0R2J-2-GP
MICIN1
1 SCD1U10V2KX-5GP R5812 2 DY 1
L5804 1 2 MIC_IN_L_C 2 EC5818 DY 0R2J-2-GP
29 MB_MICIN_L SBK160808T-601Y-N-GP 6 2 1
L5805 1 2 MIC_IN_R_C 3 EC5813
29 MB_MICIN_R SBK160808T-601Y-N-GP SCD1U10V2KX-5GP
4 2 1 SCD1U10V2KX-5GP
29 EXT_MIC_JD# 5
NP1
NP2 EC5814 2 1 SCD1U10V2KX-5GP
AUD_AGND
1
GAP-CLOSE AUDIO-JK269-GP-U
2 1 EC5811 22.10263.371
104 DOCK_MIC_JD# AUD_AGND
MLVS0402M04-GP-U
G5801 2ND = 22.10265.581
1 TP5812 TPAD14-OP-GP
2
B B
AUD_AGND
Internal MB_MICIN_L MB_MICIN_R DMIC_12 DMIC_CLK MB_HP_L MB_HP_R
Microphone
1
DMIC1
5 EC5805 EC5806 EC5807 EC5808 EC5809 EC5810
TVL-0402-01-CB1-GP
TVL-0402-01-CB1-GP
SC22P50V2JN-4GP
SC22P50V2JN-4GP
SC22P50V2JN-4GP
SC22P50V2JN-4GP
3D3V_S0 1
2
ER5801 1 33R2J-2-GP
2 DMIC_12_R 2 AUD_SPK_L- AUD_SPK_L+
29 DMIC_12 ER5802 1 2 DMIC_CLK_R 3
2
29 DMIC_CLK 33R2J-2-GP 4
1
6
DY EC5801 DY EC5802
1
SC22P50V2JN-4GP
SC22P50V2JN-4GP
ACES-CON4-29-GP
2
L5807 L5808
MLVS0402M04-GP-U MLVS0402M04-GP-U
20.F1639.004
A 69.80007.021 69.80007.021 2ND = 20.F1804.004 <Core Design> A
2
DY DY
1bios.ru
-1_0302 Wistron Corporation
(Varistor) Taipei Hsien 221, Taiwan, R.O.C.
Need confirm with EMI : Title

69.80007.021 or 69.80024.011 ? Audio Jack
A3
BAD50-HC -1
5 4 3 2 1
5 4 3 2 1
LED COLOR
LAN1
GIGA Lan Transformer 10(+) 9(-)::GREEN 15
CONN_PWR2
12(+) 13(-):ORANGE 1
CONN_PWR
LAN_ACT_LED#_SYS
10M/100M/1G_LED#_SYS
SC1000P50V3JN-GP-U
SC1000P50V3JN-GP-U
2
SSID = LOM 106 LAN_ACT_LED#_SYS
106 10M/100M/1G_LED#_SYS
3
4
LAN MDI Off-Page CONN_PWR 5
CONN_PWR2 6 -1_0302
RJ45_7 7
RJ45_8 8
RJ45_5 9
DY DY DY DY RJ45_4 10
1
D EC5903 EC5904 RJ45_3 D
11
RJ45_6 12
RJ45_2 13
SC1000P50V3JN-GP-U
SC1000P50V3JN-GP-U
2
2
RJ45_1 14
EC5901
EC5902
16
ACES-CON14-11-GP
20.F1637.014
2nd = 20.F1808.014
XF5901
2 1CT:1CT 23 RJ45_7
106 MDI3+_SYS
XRF_TDC1 1 24 MCT1 For EMI
RN5902
1
C5901 106 MDI3-_SYS 3 22 RJ45_8 SRN470J-4-GP-U

CONN_PWR2
SCD1U10V2KX-5GP
3D3V_M 1 4
2 3 CONN_PWR
2
1CT:1CT RJ45_3
106 MDI1+_SYS 5 20
XRF_TDC2 4 21 MCT2 U5904 -1 0317

5V_S5 5
1
C5902 6 19 RJ45_6 U5901

106 MDI1-_SYS
SCD1U10V2KX-5GP
5V_S5 5
2
1CT:1CT RJ45_4
106 MDI2+_SYS 8 17
XRF_TDC3 7 18 MCT3 2
106 MDI2-_SYS 9 16 RJ45_5 2 TVLST2304AD0-GP
6
TVLST2304AD0-GP 83.02304.0AE
6
1
C C5903 1CT:1CT RJ45_1 C

106 MDI0+_SYS 11 14 83.02304.0AE
SCD1U10V2KX-5GP
XRF_TDC4 10 15 MCT4
106 MDI0+_SYS
2
12 13 RJ45_2
106 MDI0-_SYS 106 MDI1+_SYS
1
C5904 106 MDI0-_SYS

SCD1U10V2KX-5GP
XFORM-24P-19-GP 106 MDI1-_SYS

2
U5902
U5903 5V_S5 5
5V_S5 5
2
2
TVLST2304AD0-GP
6
TVLST2304AD0-GP 83.02304.0AE
6
83.02304.0AE
106 MDI2+_SYS
106 MDI3+_SYS
106 MDI2-_SYS
106 MDI3-_SYS
B B
MCT1
MCT2
MCT3
MCT4
MCT3
MCT4
MCT1
MCT2
1
GDT1 GDT2 GDT3 GDT4
1
B88069X9231T203-GP
B88069X9231T203-GP
B88069X9231T203-GP
B88069X9231T203-GP
75R3J-L-GP
75R3J-L-GP
75R3J-L-GP
75R3J-L-GP
R5903 R5901 R5902 R5904
2
2
MCT_R
1
C5905
DY DY DY DY SC1KP2KV6KX-GP
2
A A
1bios.ru
<Core Design>
Wistron Corporation
Title
LAN CONNECTOR
Custom
BAD50-HC -1
5 4 3 2 1
5 4 3 2 1
1209 SB
SPI FLASH ROM (4M byte) for PCH 3D3V_S5
SPI ROM Equal length need to less than 500mil

SSID = Flash.ROM 3D3V_S5
1
SC10U6D3V5KX-1GP
C6001 C6002 C6003
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
2
2
DY
8
7
6
5
64MB:72.25640.D01,72.25Q64.B01 RN6001
32MB:72.25Q32.A01, 72.25320.C01
SRN4K7J-10-GP
SYSTEM
D D
SPI ROM
1
2
3
4
SPI_HOLD_0#
3D3V_S5
U6001
21 SPI_CS0#_R 1 CS# VCC 8

21 SPI_SO_R 1 2 SPI_SO 2 7
R6001 SPI_WP# SO/SIO1 HOLD# SPI_CLK_R_0
3 6 1 R6012 2 SPI_CLK_R 21
33R2J-2-GP WP# SCLK SPI_SI_R_0
4 5 1 33R2J-2-GP
2 SPI_SI_R 21
GND SI/SIO0 R6013
33R2J-2-GP
1
SC4D7P50V2CN-1GP
MX25L6406EM2I-12G-GP
EC6003 DY DYEC6001
SC4D7P50V2CN-1GP
72.25640.D01
2
vPRO SBA NON vPRO
U6001 72.25Q32.A01 72.25320.C01 72.25640.D01
U6003 72.25Q64.B01 72.25640.D01

3D3V_S5 3D3V_S5 3D3V_S5
1
1
4K7R2J-2-GP
4K7R2J-2-GP
4K7R2J-2-GP
R6008
R6009
R6010
3D3V_S5
DUAL ROM DUAL ROM DUAL ROM
2
2
C U6003 C
21 SPI_CS1#_R 1 8
SPI_SO_1_R CS# VCC SPI_HOLD_1# R6014
33R2J-2-GP
21 SPI_SO_1 1 2 2 SO/SIO1 HOLD# 7
R6007 SPI_WP#_1 3 6 SPI_CLK_R_1 1 2 SPI_CLK_1 21
33R2J-2-GP WP# SCLK SPI_SI_R_1
4 GND SI/SIO0 5 1 DUAL2 ROM SPI_SI_1 21
DUAL ROM 33R2J-2-GP
R6015 DUAL ROM
MX25L6406EM2I-12G-GP
DUAL ROM
72.25640.D01
3D3V_AUX_S5
2
D6001 83.00016.K11
BAS16-6-GP 2nd = 83.00016.M11
DY
3
2 +RTC_PWR_R
R6002
DY 1KR2J-1-GP 20.F1639.002
B
SSID = RBATT RTC_AUX_S5 2nd = 20.F1804.002
B
1
3 RTC1
3
1 RTC_PWR 1 2+RTC_PWR 1
R6006
510R2J-1-GP 2
Q6001 4
CH715FGP-GP-U
ACES-CON2-20-GP
Width=20mils
83.R0304.D81
2nd = 83.R2004.G81
3D3V_AUX_S5
EC BIOS Flash ROM
256KB
SPICLK_1 SPI_DO SPIDI
3D3V_AUX_S5
1
2
EC6004 EC6005 EC6006

R6005 R6004 SC4D7P50V2CN-1GP SC4D7P50V2CN-1GP SC4D7P50V2CN-1GP
2
2
1
DY 10KR2J-3-GP
10KR2J-3-GP
ER6004
for ENE FAE suggest,SPICS# is push-pull pin, 0R0603-PAD DY DY DY
1
don't need to pull high SPI_HOLD# U6002

2
C6004
27 SPICS# 1 8 SPI_3D3V_VCC
CE# VCC
1
A
27 SPIDI 150R2F-1-GP1 2ER6001 SPI_DI 2 7 SPI_HOLD# SCD22U25V3KX-GP A
SPI_WP2# SO HOLD# SPICLK_1 150R2F-1-GP1
27 SPI_WP2# 3 WP# SCK 6 2ER6003 SPICLK 27
4 5 SPI_DO 150R2F-1-GP1 2ER6002
1bios.ru
GND SIO SPIDO 27
<Core Design>
2
R6003 PM25LD020C-SCE-GP
72.25020.E01
10KR2J-3-GP
2nd = 72.25020.00D Wistron Corporation

1
Title
Flash/RTC
Custom
BAD50-HC -1
5 4 3 2 1
5 4 3 2 1
SSID = USB
D D
C C
B B
<Core Design>
A
1bios.ru
Title
USB Power SW
A4
BAD50-HC -1
5 4 3 2 1
5 4 3 2 1
D D
C C
B B
A <Core Design> A
1bios.ru
Wistron Corporation
Title
USB 3.0 Port

A3
BAD50-HC -1
5 4 3 2 1
5 4 3 2 1
SSID = User.Interface
Bluetooth Module conn.
D D
C C
1220 SB del EC6302 put near BLUE1 / all USB put one
choke near connector by EMI request
ANNIE Bluetooth Module
B B
<Core Design>
A
1bios.ru
Title
Bluetooth
A4
BAD50-HC -1
5 4 3 2 1
5 4 3 2 1
D D
Finger printer
JE40 delete FP function

C C
F/P
1 8
B B
<Core Design>
A
1bios.ru
Title
RESERVED
A4
BAD50-HC -1
5 4 3 2 1
5 4 3 2 1
SSID = Wireless 3D3V_S5
3D3V_S0 3D3V_MINI1_S0
SBA_NONiMAT iAMT_AOAC
2 1 2 1
R6522 0R5J-5-GP R6524 0R5J-5-GP
Mini Card Connector(802.11a/b/g/n) 3G

3D3V_MINI2_S0
mSATA_AOAC
2 1 2 1
R6523 0R5J-5-GP R6525 0R5J-5-GP 3D3V_MINI1_S0
D D
1D5V_S0 3D3V_MINI1_S0
W LAN1
6 1.5V REFCLK+ 13 CLK_PCIE_W LAN 20
1
REFCLK- 11 CLK_PCIE_W LAN# 20
2 R6526 R6527
3.3V 10KR2J-3-GP
10KR2J-3-GP
PERN0 23 PCIE_RXN4 20 iAMT
28 +1.5V PERP0 25 PCIE_RXP4 20 DY
48
2
+1.5V 2nd = 84.2N702.F3F
PETN0 31 PCIE_TXN4 20
52 33 PCIE_TXP4 20 84.2N702.A3F
+3.3V PETP0 2N7002KDW -GP
24 36 Q6501
+3.3VAUX USB_D- USB_PN11 18
USB_D+ 38 USB_PP11 18 1 6
3 30 2 5 MINI_EN_R
RESERVED#3 SMB_CLK DEBUG_DET# 27 W IRELESS_EN
5 RESERVED#5 SMB_DATA 32
2
8 RESERVED#8 3 4
10 RESERVED#10 AOAC 0R2J-2-GP R6528
12 1 PCIE_W AKE#_R 2 R6511 1 PCIE_W AKE# 19,31,66,75 0R2J-2-GP
RESERVED#12 WAKE#
14 RESERVED#14 CLKREQ# 7 PCIE_CLK_W LAN_REQ# 20 SBA_NONiMAT iAMT
16 22
1
RESERVED#16 PERST# PLT_RST# 5,18,27,31,32,36,66,71,75,82,83,97,105
27,66 E51_RXD 1 R6501 2 0R2J-2-GP E51_RXD_R 17 RESERVED#17
MINI_EN
27,66 E51_TXD 1 R6502 2 0R2J-2-GP E51_TXD_R 19 RESERVED#19
MINI_EN 20 4 3D3V_MINI1_S0
3D3V_MINI1_S0 RESERVED#20 GND
-1D 0407 37 RESERVED#37 GND 9
C 39 15 C
RESERVED#39 GND
41 RESERVED#41 GND 18
R6504
iAMT 43 RESERVED#43 GND 21
20 CL_CLK 1 iAMT 2 0R2J-2-GP CL_CLK_R 45 RESERVED#45 GND 26
20 CL_DATA R6505 1 iAMT 2 0R2J-2-GP CL_DATA_R 47 27 iAMT IAMT
RESERVED#47 GND
1
20 CL_RST# R6506 1 2 0R2J-2-GP CL_RST#_R 49 29
+5V_MINI_DEBUG RESERVED#49 GND R6531 R6530
35 10KR2J-3-GP
10KR2J-3-GP
GND
GND 40 2nd = 84.2N702.F3F
2 R6513 1W LAN_LED#_C 42 50 84.2N702.A3F
2
TP6501 0R2J-2-GP W LAN_LED# LED_WWAN# GND 2N7002KDW -GP
1 44 LED_WLAN# GND 53
46 54 Q6502
NP1
NP2
TPAD14-OP-GP LED_WPAN# GND

1 6
2
R6512 SKT-MINI52P-71-GP-U 2 5 BLUETOOTH_EN_R

DY
NP1
NP2
10KR2J-3-GP 27 BLUETOOTH_EN
2
3 4
62.10043.A81 R6515
1
3D3V_S0 2nd = 62.10043.G91 0R3J-0-U-GP IAMT

SBA_NONiMAT
1
BLUETOOTH_EN_A
Change WLAN1 Main/2nd source -1 0216
B B
5V_S5
Q6503
DMP2130L-7-GP
S
+5V_MINI_DEBUG D
3D3V_MINI1_S0
D
1
G
84.02130.031 R6507
G
100KR2J-1-GP
1
FC6501 EMI request 2ND = 84.03413.A31

C6502 C6503 C6504
2
SCD1U16V2KX-3GP
SCD1U16V2KX-3GP
SC10U6D3V5KX-1GP
SC47P50V2JN-3GP
2
DY DEBUG_DET#
CLK_PCIE_WLAN#
DY
CLK_PCIE_WLAN
EC6502
EC6501
1D5V_S0
Q6504
2N7002K-2-GP
SC33P50V2JN-3GP
SC33P50V2JN-3GP
G
1
FC6502 DY DY
A C6505 C6506 C6507 BLUETOOTH_EN_A D <Core Design> A
SCD1U16V2KX-3GP
SCD1U16V2KX-3GP
SC10U6D3V5KX-1GP
SC47P50V2JN-3GP
2
DY S +5V_MINI_DEBUG
1bios.ru
DY Wistron Corporation
84.2N702.J31 Taipei Hsien 221, Taiwan, R.O.C.
2nd = 84.07002.I31
Title
Auto detect Debug card SC 20120210
MINICARD(WLAN)/ITP CONN
A3
BAD50-HC -1
5 4 3 2 1
5 4 3 2 1
SSID = Wireless
20100712 V1.5
Place near MINI Card CONN
Mini Card Connector(WWAN)
D D
3D3V_MINI2_S0
mSATA
9/19 C6611 1 2SCD01U16V2KX-3GP SATA_RXP1 21
1
1
FOR RF C6612 1 2SCD01U16V2KX-3GP SATA_RXN1 21
1
C6601 C6602 C6608 FC6602 FC6603 mSATA
1D5V_S0 3D3V_MINI2_S0 SRN0J-6-GP
2
2
DY DY DY 3G_MSATA 3 2
SCD1U16V2KX-3GP
SCD1U16V2KX-3GP
SCD1U16V2KX-3GP
SC47P50V2JN-3GP
SC47P50V2JN-3GP
PCIE_RXN2 20
2
4 1 PCIE_RXP2 20
3GLAN1 3G RN6601 9/3 PORT7-->PORT4
DY DY 3G SRN0J-6-GP
6 1.5V REFCLK+ 13 CLK_PCIE_W W AN 20 3 2 PCIE_TXN2 20
REFCLK- 11 CLK_PCIE_W W AN# 20 4 1 PCIE_TXP2 20
2 3.3V
23 PCIE_RXN2_R C6614 RN6602
PERN0 PCIE_RXP2_R
28 +1.5V PERP0 25 mSATA
1 2SCD01U16V2KX-3GP SATA_TXP1 21
48 C6613
1 2SCD01U16V2KX-3GP SATA_TXN1 21
+1.5V PCIE_TXN2_R
PETN0 31 mSATA
52 33 PCIE_TXP2_R 9/19
+3.3V PETP0 L6601 FOR RF
24 +3.3VAUX USB_D- 36 2 1 USB_PN8 18
1D5V_S0 38 DY
USB_D+
3 4 USB_PP8 18
3 30
UIM_PW R
5
RESERVED#3
RESERVED#5
SMB_CLK
SMB_DATA 32 FILTER-137-GP 9/3
8 RESERVED#8
1
C6606 C6609 FC6604 FC6601 UIM_DATA 10 DY

UIM_CLK RESERVED#10 PCH_SMBCLK_MINI2 R6609
12 RESERVED#12 WAKE# 1 1 2 PCH_SMBCLK 14,15,20,79
C 9/19 UIM_RESET 14 7 0R2J-2-GP C
SC47P50V2JN-3GP
SC47P50V2JN-3GP
2
FOR RF 0R2J-2-GPUIM_VPP RESERVED#14 CLKREQ# PCH_SMBDATA_MIN2

16 22 1 R6611 2
SCD1U16V2KX-3GP
RESERVED#16 PERST# PCH_SMBDATA 14,15,20,79

DY 1R6607 2 E51_RXD_MINI2 17 DY 0R2J-2-GP
SCD1U16V2KX-3GP
27,65 E51_RXD RESERVED#17

DY DY DY DY 27,65 E51_TXD 1 R6608 2
DY E51_TXD_MINI2 19
RESERVED#19
0R2J-2-GP MINI2_EN 20 4
RESERVED#20 GND
37 RESERVED#37 GND 9 AOAC R6604
3D3V_MINI2_S0 39 15 PCIE_W AKE#_C 2 1 PCIE_W AKE# 19,31,65,75
RESERVED#39 GND 0R2J-2-GP
43 RESERVED#43 GND 21 PCIE_CLK_W W AN_REQ# 20
47 RESERVED#47 GND 27 PLT_RST# 5,18,27,31,32,36,65,71,75,82,83,97,105
0R2J-2-GP 49 29
RESERVED#49 GND
5V_S5 1 R6610 2 MINI2_5V_R 51 RESERVED#51 GND 34
DY GND 35
GND 40
1 3G_LED# 42 50
TP26 LED_WWAN# GND
44 LED_WLAN# GND 53
3D3V_MINI2_S0 TPAD14-OP-GP 46 54
NP1
NP2
LED_WPAN# GND
2
R6606
DY SKT-MINI52P-71-GP-U
10KR2J-3-GP Change 3GLAN1 Main/2nd source -1 0216
NP1
NP2
1
R6612 3G
1
10KR2J-3-GP
3D3V_S0 62.10043.A81
84.2N702.A3F 2nd = 62.10043.G91
2N7002KDW -GP
2
Q6601
1 6
B 3D3V_MINI2_S0_R B
27 3G_EN 2 5
2
3 4
R6614
DY 0R2J-2-GP 3G
1
MINI2_EN 2 R6613 1 3D3V_MINI2_S0

DY 10KR2J-3-GP
-1_0304
3G
SIM1
UIM_PW R 1 NP1
VCC NP1
NP2 NP2
UIM_CLK UIM_VPP 6 VPP
RESERVED#4 4 USB_PP10 18
RESERVED#8 8 USB_PN10 18
1
DYEC6602 C6610 UIM_RESET 2 RST

SC68P50V2JN-1GP
3G UIM_CLK 3
UIM_DATA 7
CLK
5 9/3
SC4D7U25V5KX-GP
2
TPAD14-OP-GP
TP6601
T P6601 CD I/O GND
1 9 CD GND 10
GND 11
A CARDBUS9P-2-GP <Core Design> A

EMI request 20.I0137.001
1bios.ru
2nd = 20.I0131.001 Wistron Corporation
Title
WWAN Connector
A3
BAD50-HC -1
Date: Monday, April 02, 2012 Sheet 66 of 109
5 4 3 2 1
5 4 3 2 1
D D
(Blanking)
C C
B B
<Core Design>
A
1bios.ru
Title
Reserved
A4
BAD50-HC -1
5 4 3 2 1
5 4 3 2 1
SSID = User.Interface LED-BO-23-GP
STDBY_LED#_Q 1 R6802 2 560R2F-GP STDBY_LED#_R 4 2 5V_S5

Power button LED FRONT_PW RLED#_Q 1
R6801
2 470R2F-GP
FRONT_PW RLED#_R 3
- +
1
- +
D D
-1_0303
Q6801 PLED1
3 FRONT_PW RLED#_Q 83.00195.Z70
1 R1
27,82 PW RLED
DC_BATFULL#_Q
STDBY_LED#_Q
CHARGE_LED#_Q
FRONT_PWRLED#_Q
R2
2 83.00195.Z70
LTC043ZUB-FS8-GP LED-BO-23-GP
-1 20120209
CHARGE_LED#_Q 1 2 560R2F-GP CHARGE_LED#_R 4 2
2nd = 84.05143.011 R6804
- + 5V_CHARGER
3rd = 84.00143.E1K DC_BATFULL#_Q 1 R6803 2 470R2F-GP DC_BATFULL#_R 3

- + 1
1
Power STDBY_LED Change for LED ESD 0209 -1
CHLED1 EC6803 EC6802
SCD1U10V2KX-4GP
EC6804
SCD1U10V2KX-4GP
EC6801
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
Caps Lock LED
2
DY DY DY DY
Q6802 CLED1
C 3 STDBY_LED#_Q Q6810 R6808 ZENER DIODI C
1 R1 3 CAP_LED# 1 2 CAP_LED#_R K A
27 STDBY_LED 5V_S0
2 1 R1 220R2F-GP -
LED DICE
+
R2 27 CAP_LED
2
LTC043ZUB-FS8-GP R2 LED-B-159-GP
LTC043ZUB-FS8-GP 83.00193.N70
2nd = 84.05143.011
2nd = 84.05143.011
3rd = 84.00143.E1K
3rd = 84.00143.E1K
Battery LED2(DC_BATFULL) SATA HDD LED

Change for LED ESD 0209 -1
SATA_LED# 21
Q6805
3 DC_BATFULL#_Q
1 R1 LTC043ZUB-FS8-GP
27 DC_BATFULL 3D3V_S0
2 R2
R2 2 HLED1
LTC043ZUB-FS8-GP 1 ZENER DIODI
R1
3 SATA_LED#_1 2 1 MEDIA_LED#_R K A 5V_S0
B R6807 - + B
2nd = 84.05143.011 330R2F-GP
LED DICE
Q6809
3rd = 84.00143.E1K LED-B-159-GP
83.00193.N70
Battery LED1(CHARGE) 2nd = 84.05143.011
3rd = 84.00143.E1K
Q6808
3 CHARGE_LED#_Q
1 R1
27 CHARGE_LED
2
R2
LTC043ZUB-FS8-GP
2nd = 84.05143.011
3rd = 84.00143.E1K
for factory test
<Core Design>
A A
Wistron Corporation
Del PWRTN1 For PD 0209 -1 Taipei Hsien 221, Taiwan, R.O.C.
Title
LED Bard/Power Button

Custom
BAD50-HC -1
5 4 3 2 1
1bios.ru
5 4 3 2 1
TOUCH PAD
SSID = KBC 5V_S0 3D3V_DAC_S0
-1_0302
1
2
15
SC1U6D3V2KX-GP
D RN6901 1 D
Internal KeyBoard SRN10KJ-5-GP

18 USB_PN5 2
1
C6901 3
18 USB_PP5
Connector 9/3 4
4
3
5
2
6
7
8
RN6902 9
5V_S0
27 TPCLK 2 3 TP_CLK 10
20.K0449.026 27 TPDATA 1 4 TP_DATA 11
KB1 12
2nd = 20.K0615.026 SRN33J-5-GP-U TP_LEFT 13
PTWO-CON26-5-GP TP_RIGHT 14
16
TPAD1
ACES-CON14-12-GP
27
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
28
C 20.K0633.014 C
2nd = 20.K0474.014
KROW0
KROW1
KROW2
KROW3
KROW4
KROW5
KROW6
KROW7 3rd = 20.K0426.014
KCOL10
KCOL11
KCOL12
KCOL13
KCOL14
KCOL15
KCOL16
KCOL17
KCOL0
KCOL1
KCOL2
KCOL3
KCOL4
KCOL5
KCOL6
KCOL7
KCOL8
KCOL9
KROW[0..7] 27
Rubber Dome
KCOL17 27
MB PIN DEFINE 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 KCOL[0..16] 27 5
KB PIN DEFINE 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26
1
TP_LEFT 2
26 K/B 1 TP_RIGHT 3
4
B 6 B
FP1
ETY-CON4-34-GP
20.K0465.004
2nd = 20.K0422.004
-1_0304
<Core Design>
A
1bios.ru
Title
Key Board/Touch Pad

A4
BAD50-HC -1
5 4 3 2 1
5 4 3 2 1
D D
3D3V_AUX_KBC
1
C7001 LID1
SCD1U10V2KX-5GP APX9132HAI-TRG-GP
2
1 VDD
R7001 3
100R2J-2-GP GND
1 2 LID_CLOSE#_1 2
27 LID_CLOSE# VOUT
1
C7002
DY SCD047U16V2KX-1-GP
2
C
74.09132.C7B C
2nd = 74.05712.0BB
B B
<Core Design>
A
1bios.ru
Title
Hall Sensor
A4
BAD50-HC -1
5 4 3 2 1
5 4 3 2 1
D D
SB modify to test pad

C 3D3V_S0 C
1
21,27,82 LPC_AD0 2
21,27,82 LPC_AD1 3
21,27,82 LPC_AD2 4
21,27,82 LPC_AD3 5
21,27,82 LPC_FRAME# 6 DY
5,18,27,31,32,36,65,66,75,82,83,97,105 PLT_RST# 7
8
18 CLK_PCI_LPC 9
10
11
12
DB1
MLX-CON10-7-GP
20.D0183.110
B B
<Core Design>
A
1bios.ru
Title
Dubug connector
A4
BAD50-HC -1
5 4 3 2 1
5 4 3 2 1
D D
C C
(Blanking)
B B
<Core Design>
A
1bios.ru
Title
Reserved
A4
BAD50-HC -1
5 4 3 2 1
5 4 3 2 1
D D
C C
(Blanking)
B B
<Core Design>
A
1bios.ru
Title
Reserved
A4
BAD50-HC -1
5 4 3 2 1
5 4 3 2 1
SD/XD/MS Card Reader

SSID = SDIO
32 XD_CD#
D 32 SD_D1 D
32 SD_D0
32 SD_D2
32 SD_D3
32 SD_CLK
32 SD_CMD
32 SD_CD#
32 MS_INS#
32 XD_RDY SP1(N0 SD_D7)
32 XD_RE# SP2(NO SD_D6)
32 XD_CE# SP3(NO_SD_D5)
32 XD_W E# SP4(No SD_D4)
32 XD_CLE/MS_BS SP5
32 XD_ALE SP6
32 XD_W P#/MS_D1 SP7
32 XD_D0 SP8(NO MS_D4)

C SP9 C
32 XD_D1/MS_D0
32 XD_D2/MS_D2 SP10
32 XD_D3 SP11(MS_D6)
32 XD_D4/MS_D3 SP12
32 XD_D5 SP13
32 XD_D6/MS_CLK SP14
32 XD_D7/SD_W P SP15
20101021
CARD1
3D3V_CARD_S0 P11 1 XD_CD#

SD_VCC XD_CD XD_RDY
XD_R/B 2
P18 3 XD_RE#
MS_VCC XD_RE XD_CE#
XD_CE 4
18 5 XD_CLE/MS_BS
XD_VCC XD_CLE XD_ALE
XD_ALE 6
7 XD_W E#
SD_D0 XD_WE XD_W P#/MS_D1
P4 SD_DAT0 XD_WP_IN 8
SD_D1 P3
SD_D2 SD_DAT1 XD_D0
P21 SD_DAT2 XD_D0 10
B SD_D3 XD_D1/MS_D0 B
P19 SD_DATA3 XD_D1 11
12 XD_D2/MS_D2
SD_CD# XD_D2 XD_D3
P1 SD_CD XD_D3 13
XD_D7/SD_W P P2 14 XD_D4/MS_D3
SD_CLK SD_WP XD_D4 XD_D5
P8 SD_CLK XD_D5 15
SD_CMD P16 16 XD_D6/MS_CLK
SD_CMD XD_D6 XD_D7/SD_W P
XD_D7 17
XD_D1/MS_D0 P10
XD_W P#/MS_D1 MS_DATA0
P9 MS_DATA1 MS_GND P5
XD_D2/MS_D2 P12 P20
XD_D4/MS_D3 MS_DATA2 MS_GND
P15 MS_DATA3
XD_GND 9
XD_CLE/MS_BS P7 19
MS_INS# MS_BS XD_GND
P14 MS_INS
XD_D6/MS_CLK 1 2 XD_D6/MS_CLK_R P17 P6
R7401 MS_SCLK SD_GND
SD_GND P13
0R0402-PAD
1
C7401 NP1 P22

NP1 SD_CD/WP_COM/SDIO_GND
NP2 P23
DY
SC8P250V2CC-GP
NP2 SD_CD/WP_COM/SDIO_GND
2
CARD-PUSH-42P-1-GP
20.I0132.001 Del 2nd source 0209 -1
A <Core Design> A
1bios.ru
Wistron Corporation
Title
CARD Reader CONN

A3
BAD50-HC -1
5 4 3 2 1
5 4 3 2 1
For Expresscard socket

SSID = ExpressCard
+1.5V_CARD Max. 650mA, Average 500mA.
EXPC1 +3.3V_CARD Max. 1300mA, Average 1000mA
1 2 +3.3V_CARDAUX Max. 275mA
D D
EXPRESSCARD-2P-26-GP-U2
NewCard
EXPRESSCARD-26P-23-GP-U
28
NP2
26
20 PCIE_TXP7 25
20 PCIE_TXN7 24
23
20 PCIE_RXP7 22
20 PCIE_RXN7 21
20
20 CLK_PCIE_NEW 19
3D3V_NEW _S0 18
20 CLK_PCIE_NEW # CPPE# 17
20 PCIE_CLK_NEW _REQ# 16
15
3D3V_NEW _LAN_S5 14
PERST# 13
12
19,31,65,66 PCIE_W AKE# AOAC 1 2 PCIE_W AKE#_NEW 11
R7501 0R2J-2-GP 10
1D5V_NEW _S0
RN7502 9
1 DY 4 SMB_DATA_NEW 8
20,31 SMB_DATA
2 3 SMB_CLK_NEW
SRN33J-5-GP-U 7
20,31 SMB_CLK
1 CONN_TP16
C TPAD14-OP-GP
TP83
T P83 1 CONN_TP25 C
TPAD14-OP-GP TP82
T P82 CPUTSB# 4
3
18 USB_PP13 2
18 USB_PN13
1
9/4 for add usb port6 NP1
27
EXPC2
NewCard
U7501
1D5V_S0 14 1_5VIN AUXIN 17 3D3V_S5

12 1_5VIN AUXOUT 15 3D3V_NEW _LAN_S5 3D3V_S5
1D5V_NEW _S0 11 RN7501
1_5VOUT CPUTSB# 2
13 1_5VOUT CPUSB# 9 3
10 CPPE# 1 DY 4
CPPE#
3D3V_S0 2 3_3VIN
4 1 SRN100KJ-6-GP
3_3VIN STBY# PM_SLP_S3# 19,27,29,36,37,47,82
SYSRST# 6
3D3V_NEW _S0 3 8 PERST# PLT_RST# 5,18,27,31,32,36,65,66,71,82,83,97,105
3_3VOUT PERST#
5 3_3VOUT OC# 19
B B
SHDN# 20 1 2
C7504
18 SC100P50V2JN-3GP
RCLKEN
GND 21 DY
16 NC#16 GND 7
NEW CARD_PW R_EN 20
G577DSR91U-GP
NewCard
Place them Near to Chip Place them Near to Connector

For EMI
3D3V_S0 3D3V_NEW _S0 1D5V_NEW _S0 3D3V_NEW _LAN_S5

1
C7502 C7501 C7507 C7505

NewCard C7503 C7506
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
SC1U10V3ZY-6GP SC1U10V3ZY-6GP SCD1U16V2ZY-2GP

2
2
SCD1U16V2ZY-2GP
A NewCard NewCard NewCard <Core Design> A

NewCard NewCard
1bios.ru
Wistron Corporation
Title
New Card
A3
BAD50-HC -1
5 4 3 2 1
5 4 3 2 1
D D
SMART1
7
C 1 C
2 11/21 swap
3
4 USB_PP6 18
5 USB_PN6 18
6 5V_S0
8
ACES-CON6-21-GP
9/7 for addport6
20.K0473.006
2nd = 20.K0392.006
B B
<Core Design>
A
1bios.ru
Title
Reserved
A4
BAD50-HC -1
5 4 3 2 1
5 4 3 2 1
D D
C C
B B
A <Core Design> A
1bios.ru
Wistron Corporation
Title
Reserved
A3
BAD50-HC -1
5 4 3 2 1
5 4 3 2 1
D D
C
(Blanking) C
B B
<Core Design>
A
1bios.ru
Title
Reserved
A4
BAD50-HC -1
5 4 3 2 1
5 4 3 2 1
Note
SSID = User.Interface - no via, trace, under the sensor (keep out area around 2mm)
- stay away from the screw hole or metal shield soldering joints
- design PCB pad based on our sensor LGA pad size (add 0.1mm)
D
Free Fall Sensor - solder stencil opening to 90% of the PCB pad size
- mount the sensor near the center of mass of the NB as possible as you can
D
R7909 DY
2 1 SML1_CLK_G
27,39,51,86 SML1_CLK_C
0R2J-2-GP
R7910 DY
2 1 SML1_DATA_G 3D3V_S0
27,39,51,86 SML1_DATA_C
0R2J-2-GP 1107 3d3vs5-->3D3V_S0
2 1 SML1_CLK_G 3D3V_S0
14,15,20,66 PCH_SMBCLK
R7911 C7901
1
0R0402-PAD C7902
SCD22U10V2KX-1GP
SCD1U10V2KX-5GP
SML1_DATA_G
14
15
16
14,15,20,66 PCH_SMBDATA 2 1
R7912 R7901 U7901
2
C 0R0402-PAD 10KR2J-3-GP C
VDD
ADC2
ADC1
11/09 SB DY
0209 -1
1
13 ADC3 VDD_IO 1
D7902 12 2
GSENSOR_INT1_L GND NC#2
18 GSENSOR_INT1 A K 11 3
SDA/SDI/SDO
INT1 NC#3 SML1_CLK_G
10 RES SCL/SPC 4
SDM20U30-7-GP FFS_INT2 9 5
SDO/SA0
INT2 GND
CS
LIS3DHTR-GP
8
7
6
3D3V_S0 3D3V_S0
2
G_SA0
SML1_DATA_G
G_CS
1220 SB R7908 R7905
0R2J-2-GP 10KR2J-3-GP
?????0ohm 5V_S0
DY 3D3V_S0 3D3V_S0
B B
1
G_CS G_SA0
1
100KR2F-L1-GP
R7902
2
R7907 R7906 R7904

Q7901
10KR2J-3-GP 10KR2J-3-GP 10KR2J-3-GP
DY DY DY G
2
D7901
1
D FFS_INT2_L K A HDD_UNLOAD 56
S SDM20U30-7-GP
DY
2N7002K-2-GP 84.2N702.J31 DY
DY 2ND = 84.07002.I31
SDO="H"; address="3Ah" R7903 <Core Design>
*SDO="L"; address="38h" 1 2 GSENSOR_INT2 1 AFTP30
A
0R2J-2-GP
*CS="H"; mode="I2C" DY
1bios.ru
CS="L"; mode="SPI" Title
Free Fall Sensor

A4
BAD50-HC -1
5 4 3 2 1
5 4 3 2 1
D D
(Blanking)
C C
B B
<Core Design>
A
1bios.ru
Title
Reserved
A4
BAD50-HC -1
5 4 3 2 1
5 4 3 2 1
D D
(Blanking)
C C
B B
<Core Design>
A
1bios.ru
Title
Reserved
A4
BAD50-HC -1
5 4 3 2 1
5 4 3 2 1
PWRCN1 FFC 異異
D D
BTNCN1
15
1 5V_S0
2
3 5V_S5
4 BACKUP_BTN# 27
5 INSTANT_VIEW _BTN# 27
6 MUTE_BTN# 27
7 KBC_PW RBTN# 27 1220 SB
8 PowerSmartBTN# 27
9 NUMLOCK_LED 27
10 PW RLED 27,68 -1_0303
11 PowerSmartLED 27
12 MUTE_LED 27
13 BACKUP_LED 27
14
16
ACES-CON20-29-GP
ACES-CON14-12-GP 22
20
18 USB30_TXP2 19
20.K0633.014 18 USB30_TXN2 18
2nd = 20.K0474.014 17
18 USB30_TXN1 16
3rd = 20.K0426.014 18 USB30_TXP1 15
Change BTNCN1 main source 0214 -1 14
18 USB30_RXP1 13
C 12 C
18 USB30_RXN1
11
18 USB30_RXP2 10
18 USB30_RXN2 9
8
18 USB30_TXP3 7
18 USB30_TXN3 6
5
18 USB30_RXP3 4
18 USB30_RXN3 3
2
1
21
USBCN2
20.K0637.020
ACES-CON30-9-GP-U
32
5V_USB2_S3 30
B B
29
28
0207 27
26
25
24
5V_CHARGER 23
22
5V_S0 21
3D3V_S5 20
18 USB_PP0
12/27 SB 18 USB_PN0 19
18
1
3D3V_S0 17
18 USB_PP1
R8202 16
3D3V_S5 18 USB_PN1
10KR2J-3-GP 15
TPMCN1
DY 18 USB_PP2 14
18 USB_PN2 13
2
1 2 INT_SERIRQ 21,27 27 USB_CHARGER_PORT_EN# 12

R8203 11
LPCPD# 27 W IRELESS_SW #
3 4 1 2 SUS_STAT# 19 27 W LAN_TEST_LED 10
5 6 LPC_AD0 21,27,71 0R2J-2-GP 27 3G_LED 9
7 8 LPC_AD1 21,27,71 27 ILIM_SEL 8
9 10 LPC_FRAME# 21,27,71 19,27,29,36,37,47,75 PM_SLP_S3# 7
11 12 CLK_PCI_KBC 18,27 27 USB_CHARGER_CTL2 6
5,18,27,31,32,36,65,66,71,75,83,97,105 PLT_RST# 13 14 LPC_AD2 21,27,71 12/27 SB 27 USB_CHARGER_CTL1 5
19,27 PM_CLKRUN# 15 16 LPC_AD3 21,27,71 4
29 AUD_SPK_R- 3
FOX-CONN16D-GP 2
29 AUD_SPK_R+ <Core Design>
A 20.F2190.016 1
A
31
2nd = 20.F0881.016 Wistron Corporation
1bios.ru
USBCN1 21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Add 2ND Source 0213 Taipei Hsien 221, Taiwan, R.O.C.
20.K0510.030
Title
2nd = 20.K0580.030
Main source change to ACES 20.K0510.030 -1 0213 IO Board Connector
A3
BAD50-HC -1
5 4 3 2 1
5 4 3 2 1
D D
3D3V_VGA_S0
1D05V_VGA_S0
3D3V_VGA_S0
1 10KR2J-3-GP
R8302 VGA1A 1 OF 17
DIS_PX_Muxless
DIS_PX_Muxless 1/17 PCI_EXPRESS 1U Under GPU
2N7002K-2-GP DIS_PX_Muxless
DIS_PX_Muxless DIS_PX_Muxless
2
DIS_PX_Muxless
1
G AJ11
PEX_WAKE#
SC10U6D3V5KX-1GP
C8374 C8373 C8334 C8361 C8362 C8363
PEX_IOVDD_1
AG19
4.7U NEAR TO GPU
SC10U6D3V5KX-1GP
SC4D7U6D3V3KX-GP
SC1U10V2KX-1GP
D VGA_RST# AJ12 AG21
SC10U6D3V3MX-GP
SC10U6D3V3MX-GP
20 PEG_CLKREQ#
2
PEX_RST# PEX_IOVDD_2
AG22
PEG_CLKREQ#_1 PEX_IOVDD_3
S AK12 AG24
PEX_CLKREQ# PEX_IOVDD_4
PEX_IOVDD_5
AH21 DIS_PX_Muxless
DIS_PX_Muxless 10U mid TO GPU
Q8301 20 CLK_PCIE_VGA AL13 AH25
PEX_REFCLK PEX_IOVDD_6
84.2N702.J31 20 CLK_PCIE_VGA# AK13
PEX_REFCLK#
2nd = 84.07002.I31 PEG_RXP0 C8301 SCD22U10V2KX-1GP PEG_C_RXP0 AK14
1 2
PEG_RXN0 C8302 SCD22U10V2KX-1GP PEG_C_RXN0 AJ14 PEX_TX0 1D05V_VGA_S0
1 2
PEX_TX0#
DIS_PX_Muxless PEG_TXP0
DIS_PX_Muxless PEG_TXN0
AN12
PEX_RX0
AM12 AG13
dGPU reset PEG_RXP1 C8303 SCD22U10V2KX-1GP PEG_C_RXP1 AH14
PEX_RX0# PEX_IOVDDQ_1
PEX_IOVDDQ_2
AG15
1U Under GPU
PEG_RXN1
1 2
C8304 SCD22U10V2KX-1GP PEG_C_RXN1 AG14 PEX_TX1 PEX_IOVDDQ_3
AG16 DIS_PX_Muxless
1 2
PEX_TX1# PEX_IOVDDQ_4
AG18 DIS_PX_Muxless
1117 SB DIS_PX_Muxless AG25 DIS_PX_Muxless DIS_PX_Muxless
1
PEG_TXP1 PEX_IOVDDQ_5
Vendor ask to change property DIS_PX_Muxless PEG_TXN1
AN14
PEX_RX1 PEX_IOVDDQ_6
AH15
C8371 C8372 C8333 C8360 C8364 C8365 C8375 C8376 4.7U NEAR TO GPU
AM14 AH18
SC4D7U6D3V3KX-GP
SC1U10V2KX-1GP
AH26
SC22U6D3V5MX-2GP
SC22U6D3V5MX-2GP
SC10U6D3V3MX-GP
SC10U6D3V3MX-GP
SC10U6D3V3MX-GP
SC10U6D3V3MX-GP
2
2
PEG_RXP2 C8305 SCD22U10V2KX-1GP PEG_C_RXP2 AK15 PEX_IOVDDQ_8
DY 1 2
PEX_TX2 PEX_IOVDDQ_9
AH27
R8361 1 2 VGA_RST# PEG_RXN2 C8306 SCD22U10V2KX-1GP
1 2 PEG_C_RXN2 AJ15 AJ27
18 DGPU_HOLD_RST#
100R2J-2-GP DIS_PX_Muxless
PEX_TX2# PEX_IOVDDQ_10
DIS_PX_Muxless
AK27 DIS_PX_Muxless DIS_PX_Muxless
DIS_PX_Muxless
10U mid TO GPU
R8307 1 PEG_TXP2 PEX_IOVDDQ_11
C
5,18,27,31,32,36,65,66,71,75,82,97,105 PLT_RST# 2 DIS_PX_Muxless AP14 AL27 C
1
100R2J-2-GP PEG_TXN2 PEX_RX2 PEX_IOVDDQ_12

DY R8303
AP15
AM28
AN28
100KR2J-1-GP PEG_RXP3 C8307 SCD22U10V2KX-1GP PEG_C_RXP3 AL16 PEX_IOVDDQ_14
DIS_PX_Muxless 1 2
PEX_TX3
PEG_RXN3 C8308 SCD22U10V2KX-1GP
1 2 PEG_C_RXN3 AK16
3D3V_VGA_S0 PEX_TX3#
U8301 DIS_PX_Muxless
2
PEG_TXP3
18 DGPU_HOLD_RST# 1
B DIS_PX_Muxless PEG_TXN3
AN15
PEX_RX3
5 AM15
PLT_RST# VCC PEX_RX3#
2
A VGA_RST# PEG_RXP4 C8309 SCD22U10V2KX-1GP PEG_C_RXP4 AK17
4 1 2
Y PEG_RXN4 C8310 SCD22U10V2KX-1GP PEG_C_RXN4 AJ17 PEX_TX4
3 1 2
GND PEX_TX4#
74LVC1G08GW-1-GP
AN17
PEX_RX4
73.01G08.L04 AM17
PEX_RX4# 3.3V +/- 5%
PX_Muxless 3D3V_VGA_S0
PEG_RXP5 C8311 SCD22U10V2KX-1GP PEG_C_RXP5 AH17
PEG_RXN5
1 2
1 2 PEG_C_RXN5 AG17 PEX_TX5 120mA
PEX_TX5#
DIS_PX_Muxless PEG_TXP5 PEX_PLL_HVDD
AH12 (See NV DG)
AP17
PEX_RX5
AP18 AG12
PEX_RX5# PEX_SVDD_3V3
PEG_RXP6 C8313 SCD22U10V2KX-1GP
1 2 PEG_C_RXP6 AK18
PEG_RXN6 C8314 SCD22U10V2KX-1GP
1 2 PEG_C_RXN6 AJ18 PEX_TX6
DIS_PX_Muxless Near GPU.
1
PEX_TX6#
DIS_PX_Muxless PEG_TXP6 C8367 C8366
DIS_PX_Muxless AN18
PEX_RX6 DIS_PX_Muxless
SCD1U10V2KX-5GP
SC4D7U6D3V3KX-GP
PEG_TXN6 AM18
2
PEX_RX6#
1 2 PEG_C_RXP7 AL19
PEG_RXN7 C8316 SCD22U10V2KX-1GP PEG_C_RXN7 AK19 PEX_TX7
1 2
PEX_TX7#
AN20
PEX_RX7
AM20
PEX_RX7#
1 2 PEG_C_RXP8 AK20
PEG_RXN8 C8318 SCD22U10V2KX-1GP PEG_C_RXN8 AJ20 PEX_TX8
1 2
PEX_TX8#
DIS_PX_Muxless PEG_TXP8 VDD_SENSE
L4 VGACORE_VDD_SENSE 92
AP20
PEX_RX8
AP21
PEX_RX8#
L5 VGACORE_GND_SENSE 92
PEG_RXP9 C8319 SCD22U10V2KX-1GP PEG_C_RXP9 AH20 GND_SENSE
1 2
PEG_RXN9 C8320 SCD22U10V2KX-1GP PEG_C_RXN9 AG20 PEX_TX9
1 2
B PEX_TX9# B
AN21
PEX_RX9
AM21
PEX_RX9#
1 2 PEG_C_RXP10 AK21
PEG_RXN10 PEG_C_RXN10 AJ21
C8322 SCD22U10V2KX-1GP PEX_TX10
1 2
PEX_TX10#
DIS_PX_Muxless PEG_TXP10 NC_3V3AUX
P8
AN23
PEX_RX10
AM23
PEX_RX10#
1 2 PEG_C_RXP11 AL22
PEG_RXN11 PEG_C_RXN11 AK22
1 2
PEX_TX11#
AP23
PEX_RX11 1.05V +/- 3%
AP24
PEX_RX11#
4 PEG_TXP[0..15]
1 2 PEG_C_RXP12 AK23 PEX_TSTCLK_OUT
AJ26
AK26
120mA
PEG_RXN12 PEG_C_RXN12 AJ23 PEX_TX12 PEX_TSTCLK_OUT#
4 PEG_TXN[0..15] C8326 SCD22U10V2KX-1GP
1 2
PEX_TX12# (See NV DG)
DIS_PX_Muxless AN24
PEX_RX12
PEG_TXN12 AM24
PEX_RX12# DIS_PX_Muxless1D05V_VGA_S0
L8302
1 2 PEG_C_RXP13 AH23
PEG_RXN13 PEG_C_RXN13 AG23
C8328 SCD22U10V2KX-1GP PEX_TX13 VCC1R05VIDEO_PEX_PLLVDD
1 2 AG26 2 1
PEX_TX13# PEX_PLLVDD
SCD1U10V2KX-5GP
SC1U10V2KX-1GP
SC4D7U6D3V3KX-GP
PEG_RXP[0..15] 4 DIS_PX_Muxless PEG_TXP13
DIS_PX_Muxless AN26 BLM11A121S-GP
1
PEG_TXN13 PEX_RX13 CHIP BEAD BLM18AG121SN1D
PEG_RXN[0..15] 4 AM26
1
PEX_RX13# C8368
1 2 PEG_C_RXP14 AK24 R8308 C8369 C8370
2
PEG_RXN14 PEG_C_RXN14 AJ24 PEX_TX14
1 2 AK11 TESTMODE
1 2 10KR2J-3-GP
2
PEX_TX14# TESTMODE
AP26
PEX_RX14 DIS_PX_Muxless DIS_PX_Muxless DIS_PX_Muxless
AP27
PEX_RX14# DIS_PX_Muxless
1 2 PEG_C_RXP15 AL25
PEG_RXN15 PEG_C_RXN15 AK25
1 2
DIS_PX_Muxless
PEX_TX15# R8305 D1U Under GPU
PEG_TXP15 AP29 PEX_TERMP 2 2K49R2F-GP
AN27
PEX_RX15 PEX_TERMP
1
1U, 4.7U NEAR TO GPU
AM27
PEX_RX15#
DIS_PX_Muxless
A N13P-GS-A1-GP A
71.0N13P.00U DIS_PX_Muxless
1bios.ru
<Core Design>
Wistron Corporation
Title
GPU_PCIE/STRAPPING(1/5)
A2
BAD50-HC -1
5 4 3 2 1
5 4 3 2 1
VGA1K 11 OF 17
6/17 IFPC
VGA1J 10 OF 17 IFPCDE_PLLVDD_PWR ALL PINS NC FOR GF117

5/17 IFPAB
1 R8402 2IFPC_RSET AF8
1KR2F-3-GP IFPC_RSET
DVI/HDMI DP
ALL PINS NC FOR GF117
1.05V +/- 3% DIS_PX
220mA IFPA_TXC#
AN6 GPU_LVDSA_TXC# 94 AF7
IFPC_PLLVDD I2CW_SDA IFPC_AUX_I2CW_SDA#
AG2 GPU_DDCP_SDA 51
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
AM6 GPU_LVDSA_TXC 94 I2CW_SCL AG3 GPU_DDCP_SCL 51
IFPA_TXC IFPC_AUX_I2CW_SCL
(See NV DG) 1 2 IFPAB_RSET AJ8
1
IFPAB_RSET
1D05V_VGA_S0 GPU_DDCP_DATA3#
DY R8401 AN3 DIS_PX C8402 DIS_PX C8411 AG4
D
120ohm@100MHz DCR=0.05 1KR2F-3-GP IFPA_TXD0#
AP3
GPU_LVDSA_TX0# 94
GPU_LVDSA_TX0 94
TXC
TXC
IFPC_L3#
AG5 GPU_DDCP_DATA3
GPU_DDCP_DATA3# 51
GPU_DDCP_DATA3 51 D
2
L8401 IFPA_TXD0 IFPC_L3
1 2 IFPAB_PLLVDD AH8 AH4 GPU_DDCP_DATA0#
BLM18PG121SN1D-GP IFPAB_PLLVDD
IFPA_TXD1#
AM5 GPU_LVDSA_TX1# 94 Under GPU. IFPC
HDMI TXD0
TXD0
IFPC_L2#
IFPC_L2
AH3 GPU_DDCP_DATA0
GPU_DDCP_DATA0# 51
GPU_DDCP_DATA0 51
SC1U10V2KX-1GP
SC4D7U6D3V3KX-GP
DIS_PX IFPA_TXD1
AN5 GPU_LVDSA_TX1 94
GPU_DDCP_DATA1#
TXD1 AJ2 GPU_DDCP_DATA1# 51
IFPC_L1# GPU_DDCP_DATA1
TXD1 AJ3 GPU_DDCP_DATA1 51
1
C8403 IFPC_L1
AK6 GPU_LVDSA_TX2# 94
C8408 IFPA_TXD2# IFPC_IOVDD_PWR GPU_DDCP_DATA2#
DIS_PX IFPA_TXD2
AL6 GPU_LVDSA_TX2 94 TXD2 IFPC_L0#
AJ1 GPU_DDCP_DATA2# 51
TXD2 AK1 GPU_DDCP_DATA2 GPU_DDCP_DATA2 51
2
IFPC_L0
3.3V +/- 5% DIS_PX
AH6
IFPA_TXD3#
220mA IFPA_TXD3
AJ6
AF6 P2
(See NV DG)
Near GPU
LVDS IFPB_TXC#
AH9
IFPC_IOVDD
N13P-GS-A1-GP
GPIO15 GPU_DP1_HPD 51
3D3V_VGA_S0 AJ9
1
IFPB_TXC C8431
180ohm@100MHz ESR=0.15 DCR=0.09 AG8 DIS_PX
DIS_PX
IFPA_IOVDD
AP5
DIS_PX_Muxless
SCD1U10V2KX-5GP
2
IFPAB_IOVDD IFPB_TXD4#
1 2 AG9 AP6
L8402 IFPB_IOVDD IFPB_TXD4
SC4D7U6D3V3KX-GP
SC1U6D3V2KX-GP
SCD1U10V2KX-5GP
BLM18PG181SN1D-GP
Missed 1x 0.1uF AL7
1
IFPB_TXD5#
AM7
1
C8404 C8405 C8432 IFPB_TXD5

DIS_PX DIS_PX R8408
DIS_PX_Muxless 10KR2J-3-GP AM8 Under GPU. VGA1L 12 OF 17
2
IFPB_TXD6#
AN8 7/17 IFPD
2
IFPB_TXD6
DIS_PX_Muxless ALL PINS NC FOR GF117
AL8
IFPB_TXD7#
AK8
GPU_eDP_AUX
IFPB_TXD7 IFPCDE_PLLVDD_PWR
GPU_eDP_AUX#
1 R8403 2IFPD_RSET AN2
1KR2F-3-GP IFPD_RSET
DVI/HDMI DP
DIS_PX
Near GPU Under GPU AG7
IFPD_PLLVDD I2CX_SDA IFPD_AUX_I2CX_SDA#
AK2
GPU_eDP_AUX# 103
N4 I2CX_SCL AK3
GPIO14 IFPD_AUX_I2CX_SCL GPU_eDP_AUX 103
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
IFPAB
1
1
1
C N13P-GS-A1-GP TXC AK5 R8418 C
C8406 C8412 IFPD_L3# R8419
DIS_PX TXC IFPD_L3
AK4 100KR2J-1-GP
71.0N13P.00U DIS_PX_Muxless DIS_PX 100KR2J-1-GP
2
AL4
eDP
2
TXD0 IFPD_L2#
IFPD TXD0 AL3
2
IFPD_L2
TXD1 IFPD_L1#
AM4
GPU_eDP_DATA1# 103 DIS_PX DIS_PX
TXD1 AM3
IFPD_L1 GPU_eDP_DATA1 103
IFPC_IOVDD_PWR Under GPU. TXD2 IFPD_L0#
AM2
GPU_eDP_DATA0# 103
TXD2 AM1
IFPD_L0 GPU_eDP_DATA0 103
3D3V_VGA_S0
AG6 M6
IFPD_IOVDD GPIO17
GPU_eDP_HPD_C
N13P-GS-A1-GP
1
C8430
VGA1M 13 OF 17 DIS_PX PX_EDP R8412
Under GPU. 71.0N13P.00U DIS_PX_Muxless
SCD1U10V2KX-5GP
8/17 IFPEF 10KR2J-3-GP
2
Q8401
2
ALL PINS NC FOR GF117
3 4
IFPCDE_PLLVDD_PWR 2 5 3D3V_VGA_S0_5
DVI-DL DVI-SL/HDMI DP 103 GPU_eDP_HPD
PX_EDP1 6 2 1 3D3V_VGA_S0
R8413 10KR2J-3-GP
I2CY_SDA I2CY_SDA AB4 GPU_DDEP_AUX# PX_EDP
IFPE_AUX_I2CY_SDA# GPU_DDEP_AUX# 52 2N7002KDW-GP
I2CY_SCL I2CY_SCL AB3 GPU_DDEP_AUX
IFPE_AUX_I2CY_SCL GPU_DDEP_AUX 52
AB8 84.2N702.A3F
IFPEF_PLLVDD
AC5 GPU_DDEP_DATA3#
TXC TXC IFPE_L3# GPU_DDEP_DATA3# 52
1 R8404 2IFPEF_REST AD6 TXC TXC AC4 GPU_DDEP_DATA3
GPU_DDEP_DATA3 52
IFPEF_RSET IFPE_L3
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
1KR2F-3-GP
DIS_PX AC3 GPU_DDEP_DATA2#
GPU_DDEP_DATA2# 52
1
TXD0 TXD0 IFPE_L2# GPU_DDEP_DATA2

AC2 GPU_DDEP_DATA2 52
C8413 C8407
TXD0 TXD0 IFPE_L2
DIS_PX DIS_PX
AC1 GPU_DDEP_DATA1#
GPU_DDEP_DATA1# 52
2
TXD1 TXD1 IFPE_L1#

AD1 GPU_DDEP_DATA1
B Under GPU. IFPE TXD1
DP TXD1 IFPE_L1 GPU_DDEP_DATA1 52
B
AD3 GPU_DDEP_DATA0#
TXD2 TXD2 IFPE_L0# GPU_DDEP_DATA0# 52
AD2 GPU_DDEP_DATA0
TXD2 TXD2 IFPE_L0 GPU_DDEP_DATA0 52 1.05V +/- 3%
3.3V +/- 5%
285mA
440mA (220mA each, max 2 links)
(See NV DG)
HPD_E HPD_E R1
1D05V_VGA_S0 (See NV DG)
GPIO18 GPU_DP_HPD 52 3D3V_VGA_S0
IFPC_IOVDD_PWR IFPCDE_PLLVDD_PWR
300ohm@100MHz ESR=0.25
IFPC_IOVDD_PWR 220ohm@100MHz ESR=0.05
L8403 L8405
1 2 1 2
GPU_DDEP_AUX#
GPU_DDEP_AUX
ACMS160808A221-RDC05-GP ACMS160808A331-RDC08-GP
C8410
C8414
C8415
AC7 DIS_PX DIS_PX
SC1U10V2KX-1GP
SC4D7U6D3V3KX-GP
IFPE_IOVDD
C8418
AF2
SC1U10V2KX-1GP
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
I2CZ_SDA IFPF_AUX_I2CZ_SDA#
C8419
I2CZ_SCL AF3
1
IFPF_AUX_I2CZ_SCL
AC8
1
IFPF_IOVDD C8427 C8417
TXC AF1 SC4D7U6D3V3KX-GP DIS_PX
2
IFPF_L3#
TXC AG1 DIS_PX DIS_PX
2
1
IFPF_L3
1
C8429 TXD3 TXD0 AD5 R8414 R8415 DIS_PX DIS_PX DIS_PX

DIS_PX
IFPF_L2#
DIS_PX TXD3 TXD0 IFPF_L2
AD4 DIS_PX 100KR2J-1-GP 100KR2J-1-GP
DIS_PX
SCD1U10V2KX-5GP
Under GPU.
2
AF5
IFPF TXD4 TXD1
Near GPU.
2
IFPF_L1#
TXD4 TXD1 AF4
IFPF_L1
TXD5 TXD2 IFPF_L0#

AE4 Near GPU. Under GPU.
TXD5 TXD2 AE3
IFPF_L0
HPD_F P3
GPIO19
N13P-GS-A1-GP
A A
71.0N13P.00U
DIS_PX_Muxless
1bios.ru
<Core Design>
Wistron Corporation
Title
GPU Memory(2/5)
A2
BAD50-HC -1
5 4 3 2 1
5 4 3 2 1
EDP 10A
VGA1B 2 OF 17 VGA1C 3 OF 17 DC tolerance +/- 75mV
4 OF 17 1D5V_VGA_S0
VGA1D
2/17 FBA 3/17 FBB
14/17 FBVDDQ
AC tolerance +/- 50mV < 100MHz For RF -1 0217
88,89 MDA[63..0]
AA27
FBVDDQ_1
AA30
MDA0 90,91 MDB[63..0] MDB0 FBVDDQ_2
L28 E1 G9 AB27
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
SC1U6D3V3KX-2GP
SC1U6D3V3KX-2GP
SC4D7U6D3V3KX-GP
SC4D7U6D3V3KX-GP
MDA1 FBA_D0 FB_CLAMP MDB1 FBB_D0 FBVDDQ_3
M29 E9 AB33
MDA2 FBA_D1 MDB2 FBB_D1 FBVDDQ_4 FC8501 FC8502
L29 G8 AC27
FBA_D2 FBB_D2 FBVDDQ_5
1
MDA3 M28 MDB3 F9 AD27
MDA4 FBA_D3 MDB4 FBB_D3 FBVDDQ_6 C8504 C8505 C8506 C8507 C8512 C8508 C8509 C8510 C8511
N31 F11 AE27
D MDA5 FBA_D4 FB_PLLVDD_16mil MDB5 FBB_D4 FBVDDQ_7 D
P29 K27 G11 AF27
2
FBA_D5 FB_DLL_AVDD FBB_D5 FBVDDQ_8
SC68P50V2JN-1GP
SCD1U25V3KX-GP
MDA6 R29 MDB6 F12 AG27
MDA7 FBA_D6 MDB7 FBB_D6 FBVDDQ_9
P28 G12 B13
SCD1U10V2KX-5GP
J28 G6 B16
H29 F5 B19
1
MDA10 J29 MDB10 E6 E13
MDA11 FBA_D10 C8522 MDB11 FBB_D10 FBVDDQ_13
H28 F6 E16
G29 DIS_PX_Muxless F4 E19
2
MDA13 FBA_D12 MDB13 FBB_D12 FBVDDQ_15 DIS_PX_Muxless
DIS_PX_Muxless
DIS_PX_Muxless
DIS_PX_Muxless
DIS_PX_Muxless
DIS_PX_Muxlesss
DIS_PX_Muxless
E31
FBA_D13
G4
FBB_D13 FBVDDQ_16
H10
DIS_PX_MuxlessDIS_PX_Muxless
DIS_PX_MuxlessDIS_PX_Muxless
MDA14 E32 MDB14 E2 H11
F30 F3 H12
MDA16 C34
FBA_D15
FBA_D16 Place close to Ball MDB16 C2
FBB_D15
FBB_D16
FBVDDQ_18
FBVDDQ_19
H13 Under GPU.
MDA17 D32 MDB17 D4 H14
B33 D3 H15
C33 C1 H16
F33 B3 H18
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
MDA22
F32
FBA_D21 MDB22
C4
FBB_D21 FBVDDQ_24
H19 DIS_PX_Muxless
DIS_PX_Muxless
DIS_PX_Muxless
DIS_PX_Muxless
H33 B5 H20
1
MDA23 H32 MDB23 C5 H21
MDA24 FBA_D23 MDB24 FBB_D23 FBVDDQ_26 C8517 C8518 C8519 C8524 C8525 C8526 C8527
P34 A11 H22
P32 C11 H23
2
SC10U6D3V5KX-1GP
SC10U6D3V5KX-1GP
SC10U6D3V5KX-1GP
SC10U6D3V5KX-1GP
MDA26 P31 MDB26 D11 H24
P33 B11 H8
L31 D8 H9
L34 A8 L27
L32 C8 M27
L33 B8 N27
AG28 F24 P27
MDA33 FBA_D32 MDB33 FBB_D32 FBVDDQ_35 DIS_PX_Muxless
DIS_PX_Muxless
DIS_PX_Muxless
AF29
FBA_D33 FBA_CMD0
U30
-FBA_CS0 88 1207 SB NV G23
FBB_D33 FBB_CMD0
D13
-FBB_CS0 90 FBVDDQ_36
R27
MDA34 AG29 T31 MDB34 E24 E14 1207 SB NV T27
MDA35 FBA_D34 FBA_CMD1 MDB35 FBB_D34 FBB_CMD1 FBVDDQ_37
AF28 U29 G24 F14 T30
MDA36 FBA_D35 FBA_CMD2 FBA_ODT0 88 MDB36 FBB_D35 FBB_CMD2 FBB_ODT0 90 FBVDDQ_38
AD30 R34 D21 A12 T33
MDA37 FBA_D36 FBA_CMD3 FBA_CKE0 88 MDB37 FBB_D36 FBB_CMD3 FBB_CKE0 90 FBVDDQ_39
AD29 R33 E21 B12 V27
MDA38 FBA_D37 FBA_CMD4 FBA_A14 88,89 MDB38 FBB_D37 FBB_CMD4 FBB_A14 90,91 FBVDDQ_40
AC29 U32 G21 C14 W27
MDA39 FBA_D38 FBA_CMD5 FBA_RST 88,89 MDB39 FBB_D38 FBB_CMD5 FBB_RST 90,91 FBVDDQ_41
AD28 U33 F21 B14 W30
AJ29 U28 G27 G15 W33
AK29 V28 D27 F15 Y27
AJ30 V29 G26 E15
MDA43 FBA_D42 FBA_CMD9 FBA_A0 88,89 MDB43 FBB_D42 FBB_CMD9 FBB_A0 90,91
AK28 V30 E27 D15
AM29 U34 E29 A14 F1
MDA45 FBA_D44 FBA_CMD11 FBA_A1 88,89 MDB45 FBB_D44 FBB_CMD11 FBB_A1 90,91 FB_VDDQ_SENSE
AM31 U31 F29 D14 1D5V_VGA_S0
MDA46 FBA_D45 FBA_CMD12 FBA_BA0 88,89 MDB46 FBB_D45 FBB_CMD12 FBB_BA0 90,91
AN29 V34 E30 A15
MDA47 FBA_D46 FBA_CMD13 -FBA_WE 88,89 MDB47 FBB_D46 FBB_CMD13 -FBB_WE 90,91
AM30
FBA_D47 FBA_CMD14
V33 D30
FBB_D47 FBB_CMD14
B15 DIS_PX_Muxless F2
FB_GND_SENSE
MDA48 AN31 Y32 MDB48 A32 C17
MDA49 FBA_D48 FBA_CMD15 -FBA_CAS 88,89 MDB49 FBB_D48 FBB_CMD15 -FBB_CAS 90,91 R8501
AN32 AA31 C31 D18
MDA50 FBA_D49 FBA_CMD16 -FBA_CS1 89 MDB50 FBB_D49 FBB_CMD16 -FBB_CS1 91 FB_CAL_PD_VDDQ
AP30 AA29 C32 E18 2 1 J27
MDA51 FBA_D50 FBA_CMD17 MDB51 FBB_D50 FBB_CMD17 40D2R2F-GP FB_CAL_PD_VDDQ
AP32 AA28 B32 F18
MDA52 FBA_D51 FBA_CMD18 FBA_ODT1 89 MDB52 FBB_D51 FBB_CMD18 FBB_ODT1 91
AM33 AC34 D29 A20
MDA53 FBA_D52 FBA_CMD19 FBA_CKE1 89 MDB53 FBB_D52 FBB_CMD19 FBB_CKE1 91 FB_CAL_PU_GND
AL31 AC33 A29 B20 H27
MDA54 FBA_D53 FBA_CMD20 FBA_A13 88,89 MDB54 FBB_D53 FBB_CMD20 FBB_A13 90,91 FB_CAL_PU_GND
AK33 AA32 C29 C18
AK32 AA33 B29 B18
MDA56 FBA_D55 FBA_CMD22 FBA_A6 88,89 MDB56 FBB_D55 FBB_CMD22 FBB_A6 90,91 FB_CAL_TERM_GND
AD34 Y28 B21 G18 H25
MDA57 FBA_D56 FBA_CMD23 FBA_A11 88,89 MDB57 FBB_D56 FBB_CMD23 FBB_A11 90,91 FB_CAL_TERM_GND
AD32 Y29 C23 G17
AC30 W31 A21 F17
MDA59 FBA_D58 FBA_CMD25 FBA_A3 88,89 MDB59 FBB_D58 FBB_CMD25 FBB_A3 90,91 N13P-GS-A1-GP
AD33 Y30 C21 D16
AF31 AA34 B24 A18
AG34
FBA_D61 FBA_CMD28
Y31 C24
FBB_D61 FBB_CMD28
D17
71.0N13P.00U DIS_PX_Muxless
1
MDA62 FBA_A12 88,89 MDB62 FBB_A12 90,91
AG32 Y34 B26 A17
40D2R2F-GP
60D4R2F-GP
C MDA63 FBA_D62 FBA_CMD29 FBA_A10 88,89 MDB63 FBB_D62 FBB_CMD29 FBB_A10 90,91 R8502 C
AG33 Y33 C26 B17
FBA_D63 FBA_CMD30 -FBA_RAS 88,89 FBB_D63 FBB_CMD30 -FBB_RAS 90,91
FBA_CMD31
V31
FBB_CMD31
E17 DIS_PX_Muxless DIS_PX_Muxless
R8503
P30 R32 90 DQMB0 E11 C12
2
88 DQMA0 FBA_DQM0 FBA_CMD_RFU0 FBB_DQM0 FBB_CMD_RFU0
F31 AC32 90 DQMB1 E3 C20
88 DQMA1 FBA_DQM1 FBA_CMD_RFU1 FBB_DQM1 FBB_CMD_RFU1
F34 1D5V_VGA_S0 90 DQMB2 A3
88 DQMA2 FBA_DQM2 FBB_DQM2
M32 90 DQMB3 C9 1D5V_VGA_S0
AD31 91 DQMB4 F23
AL29 91 DQMB5 F27
89 DQMA6
AM32
FBA_DQM6 DIS_PX_Muxless 91 DQMB6 C30
FBB_DQM6 DIS_PX_Muxless
AF34 R28 FBA_DEBUG0 1 R8518 2 91 DQMB7 A24 G14 FBB_DEBUG0 R8520 1 2
89 DQMA7 FBA_DQM7 FBA_DEBUG0 FBB_DQM7 FBB_DEBUG0
AC28 FBA_DEBUG1 1 R8519 2 60D4R2F-GP G20 FBB_DEBUG1 R8521 1 2 60D4R2F-GP
FBA_DEBUG1 60D4R2F-GP FBB_DEBUG1 60D4R2F-GP
88 QSAP_0 M31 90 QSBP_0 D10
FBA_DQS_WP0 FBB_DQS_WP0
88 QSAP_1 G31 90 QSBP_1 D5
88 QSAP_2 E33 R30 90 QSBP_2 C3 D12
FBA_DQS_WP2 FBA_CLK0 CLKA0 88 FBB_DQS_WP2 FBB_CLK0 CLKB0 90
88 QSAP_3 M33 R31 90 QSBP_3 B9 E12
FBA_DQS_WP3 FBA_CLK0# CLKA0# 88 FBB_DQS_WP3 FBB_CLK0# CLKB0# 90
89 QSAP_4 AE31 AB31 91 QSBP_4 E23 E20
FBA_DQS_WP4 FBA_CLK1 CLKA1 89 FBB_DQS_WP4 FBB_CLK1 CLKB1 91
89 QSAP_5 AK30 AC31 91 QSBP_5 E28 F20
FBA_DQS_WP5 FBA_CLK1# CLKA1# 89 FBB_DQS_WP5 FBB_CLK1# CLKB1# 91
89 QSAP_6 AN33 91 QSBP_6 B30
89 QSAP_7 AF33 91 QSBP_7 A23
88 QSAN_0 M30 K31 90 QSBN_0 D9 F8

FBA_DQS_RN0 FBA_WCK1 FBB_DQS_RN0 FBB_WCK1
88 QSAN_1 H30 L30 90 QSBN_1 E4 E8
FBA_DQS_RN1 FBA_WCK1# FBB_DQS_RN1 FBB_WCK1#
88 QSAN_2 E34 H34 90 QSBN_2 B2 A5
88 QSAN_3 M34 J34 90 QSBN_3 A9 A6
89 QSAN_4 AF30 AG30 91 QSBN_4 D22 D24
89 QSAN_5 AK31 AG31 91 QSBN_5 D28 D25
89 QSAN_6 AM34 AJ34 91 QSBN_6 A30 B27
89 QSAN_7 AF32 AK34 91 QSBN_7 B23 C27
J30
1.05V +/- 3% D6
FBA_WCKB1 FBB_WCKB1
THE FBA_WCKBxx
PINS ARE USED
FBA_WCKB1#
J31
J32
200mA THE FBB_WCKBxx
PINS ARE USED
FBB_WCKB1#
D7
C6
FBA_WCKB23 FBB_WCKB23
ONLY ON GK107
THEY ARE NC
FBA_WCKB23#
J33
AH31
(See NV DG) ONLY ON GK107
THEY ARE NC
FBB_WCKB23#
B6
F26
AJ31 E26
FOR GF108
AND FOR GF117
FBA_WCKB45#
AJ32
30ohm@100MHz DCR=0.02 1D05V_VGA_S0
FOR GF108
AND FOR GF117
FBB_WCKB45#
A26
AJ33 L8501 A27
FBA_WCKB67# FBB_WCKB67#
H26 U27 FB_PLLVDD_16mil 1 2 H17 FB_PLLVDD_16mil
FB_VREF FBA_PLL_AVDD HCB1608KF-300T50-GP FBB_PLL_AVDD
DIS_PX_Muxless
SC10U6D3V3MX-GP
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
N13P-GS-A1-GP N13P-GS-A1-GP
SC1U6D3V2KX-GP
1
1
71.0N13P.00U DIS_PX_Muxless C8513 C8514 C8515 C8516 71.0N13P.00U DIS_PX_Muxless C8523
DIS_PX_Muxless
2
2
DIS_PX_Muxless DIS_PX_Muxless DIS_PX_Muxless
DIS_PX_Muxless
Place close to Ball
B
Under GPU. Near GPU. B
CLKA1 CLKA0
Group B CLKB1 CLKB0

1
R8504 R8505
1
DIS_PX_Muxless 162R2F-GP DIS_PX_Muxless 162R2F-GP
R8506 R8507
DIS_PX_Muxless 162R2F-GP DIS_PX_Muxless 162R2F-GP
2
CLKA1# CLKA0# Group A
2
FBB_CKE0 CLKB1# CLKB0#
CKE0 FBA_CKE0 CKE0
FBB_CKE1
CKE1 FBA_CKE1 CKE1
FBCLK Termination place on VRAM side Reset FBA_RST FBB_RST Reset
FBCLK Termination place on VRAM side
ODT0 FBA_ODT0 FBB_ODT0 ODT0
ODT1 FBA_ODT1 FBB_ODT1 ODT1
1
1
10KR2J-3-GP
10KR2J-3-GP
10KR2J-3-GP
10KR2J-3-GP
10KR2J-3-GP
10KR2J-3-GP
10KR2J-3-GP
10KR2J-3-GP
10KR2J-3-GP
10KR2J-3-GP
DIS_PX_Muxless
DIS_PX_Muxless R8508 R8509 R8510 R8511 R8512 R8513 R8514 R8515 R8516 R8517
2
DIS_PX_MuxlessDIS_PX_Muxless DIS_PX_Muxless
DIS_PX_Muxless
DIS_PX_Muxless
DIS_PX_Muxless
A A
1bios.ru <Core Design>
Wistron Corporation
Title
GPU_DP/LVDS/CRT/GPIO(3/5)
A1
BAD50-HC -1
5 4 3 2 1
5 4 3 2 1
3.3V +/- 5%
120mA
300ohm@100MHz ESR=0.25ohm (See NV DG)
3D3V_VGA_S0
220ohm@100MHz ESR=0.05
L8602
3D3V_VGA_S0_DACA_VDD_16MIL 1 2
1.05V +/- 3%
ACMS160808A221-RDC05-GP
150mA
SCD1U10V2KX-5GP
DIS_PX
(See NV DG)
1D05V_VGA_S0 PLLVDD_PWR
1
3D3V_VGA_S0
SCD1U10V2KX-5GP
SC1U10V2KX-1GP
SC4D7U6D3V3KX-GP
C8604 C8601 C8602 C8603
2
L8601
1 2
4
3
DIS_PX DIS_PX DIS_PX DIS_PX HCB1608KF-300T50-GP
RN8606 DIS_PX_Muxless
D SRN4K7J-8-GP D
DIS_PX C8607
30ohm@100MHz DCR=0.02
1
SCD1U10V2KX-5GP
Under GPU. Near GPU.
1
2
2
VGA1N 14 OF 17
4/17 DACA VGA1O 15 OF 17
DIS_PX_Muxless 11/17 XTAL_PLL
GF108/GKx GF117 GF117 GF108/GKx
1D05V_VGA_S0 SP_PLLVDD_PWR
Near GPU.
AG10 NC NC R4 VGA_CRT_DDCCLK 95
DACA_VDD I2CA_SCL
R5 AD8
DACA_VREF AP9 TSEN_VREF
NC I2CA_SDA VGA_CRT_DDCDATA 95 180ohm@100MHz ESR=0.15 DCR=0.09 AE8
PLLVDD
DACA_VREF SP_PLLVDD
DIS_PX_Muxless
DACA_RSET AP8 NC NC AM9 VGA_CRT_HSYNC 95 1 2 AD7 NC DIS_PX_Muxless
DACA_RSET DACA_HSYNC L8604 VID_PLLVDD
NC AN9 VGA_CRT_VSYNC 95
DACA_VSYNC BLM18PG181SN1D-GP C8605 C8606 GF108/GKx GF117
1
DIS_PX_Muxless
AK9 DIS_PX_Muxless C8613 DIS_PX_Muxless
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
NC DACA_RED VGA_CRT_RED 95
1
DIS_PX
2
1
SC10U6D3V3MX-GP
DIS_PX AL10 VGA_CRT_GREEN 95 TPAD14-OP-GPTP8609 1 VIDEO_CLK_XTAL_SS H1 J4 N12P_XTAL_OUTBUFF
NC DACA_GREEN XTAL_SSIN XTAL_OUTBUFF
C8609 R8603
SCD1U10V2KX-4GP
124R2F-U-GP AL9
NC VGA_CRT_BLUE 95
NVIDIA TABLE
2
DACA_BLUE
H3 H2
2
XTAL_IN XTAL_OUT
1
N13P-GS-A1-GP RN8602 N13P-GS-A1-GP
1
VGA_CRT_BLUE 1 8 R8605
DIS_PX_Muxless
VGA_CRT_GREEN 2 7
71.0N13P.00U DIS_PX_Muxless10KR2J-3-GP Hynix 2G Hynix 1G Samsung 1G Samsung 2G
71.0N13P.00U VGA_CRT_RED 3 6 R8604
4 5 10KR2J-3-GP 0110 0010 0011 0111
2
R8606
2
SRN150J-1-GP 27MHZ_IN 1 1MR2J-1-GP
2 27MHZ_OUT 128*16*8 64*16*8 64*16*8 128*16*8
DY
2
DIS_PX DIS_PX_Muxless
R8607
800MHZ 800MHZ 800MHZ
DIS_PX_Muxless
34.8Kohm 15Kohm 20Kohm 45Kohm
1
1 2 27MHZ_OUT_R
X8601
ROM_SI
1
XTAL-27MHZ-62-GP-U
DIS_PX_Muxless C8610
SC15P50V2JN-2-GP
82.30034.501
2nd = 82.30034.521
C8611
SC15P50V2JN-2-GP
R8627 64.34825.6DL 64.15025.6DL 64.20025.6DL 64.45325.6DL
2
DIS_PX_Muxless
3D3V_VGA_S0
3D3V_VGA_S0
Q8601
2N7002KDW-GP
84.2N702.A3F
2nd = 84.2N702.F3F
C SMBC_THERM_NV 1 6 SML1_CLK_C 27,39,51,79
NVIDIA TABLE C
4
3
RN8605 2 5 11/09 SB
SRN4K7J-8-GP
DIS_PX_Muxless 27,39,51,79 SML1_DATA_C 3 4 SMBD_THERM_NV
N13P-GS N13P-GS-ES N13P-GL
11/09 SB DIS_PX_Muxless DEV ID: DEV ID: DEV ID:
1
2
SMBC_THERM_NV 3D3V_VGA_S0
SMBD_THERM_NV
3D3V_VGA_S0
0x0FD2 0x0FDB 0x0DE9
15Kohm 20Kohm 10Kohm
STRAP2
4
3
RN8607
SRN4K7J-8-GP
64.15026.6DL 64.20025.6DL 63.10334.1DL
4
3
DIS_PX_Muxless
DIS_PX_Muxless
RN8683
1
2
VGA1Q 17 OF 17 SRN2K2J-1-GP
10/19 MISC1
T4 SMBC_THERM_NV
1
2
I2CS_SCL SMBD_THERM_NV
T3
I2CS_SDA
R2 GPU_LVDS_CLK 94
I2CC_SCL
R3 GPU_LVDS_DATA 94
I2CC_SDA
R7 I2CB_SCL
TP8601 TP8610 I2CB_SCL
1THERMDN K4 R6 I2CB_SDA
TPAD14-OP-GP TPAD14-OP-GP THERMDN I2CB_SDA
TP8611 1THERMDP K3
THERMDP 3D3V_VGA_S0
R8619 TPAD14-OP-GP
10KR2J-3-GP
1
1 2 N13P_JTAG_TCK AM10
TPAD14-OP-GPTP8603 N13P_JTAG_TMS JTAG_TCK
DY 1 AP11
JTAG_TMS
TPAD14-OP-GPTP8604 1 N13P_JTAG_TDI AM11
JTAG_TDI
1
1
10KR2J-3-GP
TPAD14-OP-GPTP8605 1 N13P_JTAG_TDO AP12 R8611
N13P_JTAG_TRST# JTAG_TDO 10KR2J-3-GP
1 2 AN11 P6 H_VID4 92
JTAG_TRST# GPIO0 R8609 R8610
M3 H_VID3 92
R8620 GPIO1 10KR2J-3-GP
GPIO2
L6 VGA_LBKLT_CTL 94 DIS_PX_Muxless
10KR2J-3-GP DIS_PX_Muxless
P5 VGA_LCDVDD_EN 94 -1 0209
2
GPIO3
P7 VGA_BLEN 94
DIS_PX_Muxless GPIO4
GPIO5
L7 H_VID1 92 DIS_PX_Muxless
M7 TP8602 TPAD14-OP-GP H_VID2 92
GPIO6 N13P_GPIO7
N8 1
GPIO7 GPIO8_OVERT#
M1
GPIO8 GPIO9_ALERT#
M2
GPIO9
L1
GPIO10
M5 H_VID0 92
GPIO11 DGPUHOT#
N3 DGPUHOT# 92
GPIO12
M4 H_VID5 92
GPIO13 N13P_GPIO16
R8 N13P_GPIO16 92
GPIO16
P4 3D3V_VGA_S0
GPIO20
P1
GPIO21
1
B R8640 B
-1 0223
0R2J-2-GP
DY 9/22
2
Q8605
N13P-GS-A1-GP OVERT#_G G
71.0N13P.00U
DIS_PX_Muxless D PURE_HW_SHUTDOWN# 27,28,36
GPIO8_OVERT#
ROM_SI ROM_SO ROM_CLK STRAP0 STRAP1 STRAP2 STRAP3 STRAP4
1 R8615 2 GPIO8_OVERT#_R S
0R2J-2-GP
DY 2N7002K-2-GP DY
PH PH PH PL PH PH PL
84.2N702.J31 N13P_GS
10K ohm 4.99K ohm 45K.3ohm 34.8K ohm 20K ohm 15K ohm 20K ohm
3D3V_VGA_S0
ES
DIS_PX
VGA1P 16 OF 17 PH PL PH PL PH PH PL
2
DGPUHOT_R
12/17 MISC2
R8638
27 DGPUHOT 1 2 G N13P_GL
10K ohm 15K ohm 45K.3ohm 34.8K ohm 10K ohm 15K ohm 20K ohm
DY 10KR2J-3-GP R8629 D DGPUHOT#
0R2J-2-GP
S
1
H6 ROM_CS#
ROM_CS# Q8604
H5 ROM_SI 2N7002K-2-GP
ROM_SI ROM_SO
ROM_SO
H7 84.2N702.J31
STRAP0 J2 H4 ROM_SLK
STRAP1 STRAP0 ROM_SCLK
J7
STRAP1 STRAP1 3GIO_PADCFG[0]=0
STRAP2 J6 DIS_PX 3GIO_PADCFG[1]=1
STRAP3
STRAP4
J5
J3
STRAP2
STRAP3
3D3V_VGA_S0
DIS_PX
STRAP0 USER[0]=1
USER[1]=1
3GIO_PADCFG[2]=1 USE 0110 (35K)
STRAP4
27 DGPU_ALARM 1 2 DGPU_ALARM_R G USER[2]=1 USE 1111 (45K) 3GIO_PADCFG[3]=0
1
USER[3]=1
R8628 R8622 D GPIO9_ALERT#
L2 10KR2J-3-GP DIS_PX_Muxless 0R2J-2-GP STRAP2 PCI_DEVID[0]= N13P-GS ES: (1011)
BUFRST#
S PCI_DEVID[1]= N13P-GL: (1001)
2
Q8603 PCI_DEVID[2]=
STRAP_REF0_GND J1 L3 N13P_CEC 2N7002K-2-GP PCI_DEVID[3]=
MULTI_STRAP_REF0_GND CEC
84.2N702.J31
1
DIS_PX
R8612 DIS_PX_Muxless
40K2R2F-GP
3D3V_VGA_S0
N13P-GS-A1-GP
2
3D3V_VGA_S0
DIS_PX_Muxless
1
R8637 R8649
3D3V_VGA_S0
1
A 15KR2F-GP 4K99R2F-L-GP R8624 A

N13P-GS N13P-GS
DY DY 2KR2F-3-GP R8626
R8625 4K99R2F-L-GP
2
STRAP3 10KR2F-2-GP N13P-GS
1bios.ru
2
2
1
R8630 DY STRAP4 ROM_SI

45K3R2F-L-GP R8634 ROM_SO
1
DIS_PX_Muxless R8632 20KR2F-L-GP R8621 ROM_SLK

34K8R2F-1-GP N13P-GSES/ GL=10K R8650 45K3R2F-L-GP
1
DY 15KR2F-GP N13P-GSQS/ES=10K
2
STRAP0 R8627 R8617 R8618

STRAP1 34K8R2F-1-GP 10KR2F-2-GP 15KR2D-GP
2
STRAP2 DIS_PX_Muxless N13P-GL N13P-GL

2
<Core Design>
1
R8633 R8636
R8631 4K99R2F-L-GP 15KR2F-GP
DY 2KR2J-1-GP Wistron Corporation
N13P-GS/GL=45K N13P-GSQS
2
Title
GPU_POWER(4/5)
A1
BAD50-HC -1
5 4 3 2 1
5 4 3 2 1
VGA1I 9 OF 17
EDP 50A A2
GND_1
15/17 GND_1/2
GND_71
AM25 VGA1H 8 OF 17
AA17 AN1 16/17 GND_2/2
(TDP 37W) AA18
AA20
AA22
GND_5
GND_6
GND_7
GND_72
GND_73
GND_74
AN10
AN13
AN16
N19
N2
GND_141 GND_170
T28
T32
GND_8 GND_75 GND_142 GND_171
VGA_CORE AB12 AN19 N21 T5
AB14 AN22 N23 T7
AB16 AN25 N28 U12
AB19 AN30 N30 U14
VGA1F 6 OF 17 GND_12 GND_79 GND_146 GND_175
Under GPU 13/17 NVVDD
AB2
AB21
GND_13 GND_80
AN34
AN4
N32
N33
GND_147 GND_176
U16
U19
A33 AN7 N5 U21
AA12 AB23 AP2 N7 U23
VDD_1 GND_15 GND_83 GND_150 GND_179
D AA14 AB28 AP33 P13 V12 D
AA16 AB30 B1 P15 V14
DIS_PX_Muxless
DIS_PX_Muxless
DIS_PX_Muxless
DIS_PX_Muxless AA19 AB32 B10 P17 V16
1
AA21 AB5 B22 P18 V19
C8704 C8703 C8702 C8701 VDD_5 GND_19 GND_87 GND_154 GND_183
AA23 AB7 B25 P20 V21
SC4D7U6D3V3KX-GP
SC4D7U6D3V3KX-GP
SC4D7U6D3V3KX-GP
SC4D7U6D3V3KX-GP
AB13 AC13 B28 P22 V23
2
AB15 AC15 B31 R12 W13
AB17 AC17 B34 R14 W15
AB18 AC18 B4 R16 W17
AB20 AA13 B7 R19 W18
AB22 AC20 C10 R21 W20
AC12 AC22 C13 R23 W22
AC14 AE2 C19 T13 W28
AC16 AE28 C22 T15 Y12
AC19 AE30 C25 T17 Y14
Under GPU AC21
VDD_16
AE32
GND_29 GND_98
C28 T18
GND_165 GND_194
Y16
AC23 AE33 C7 T2 Y19
M12 AE5 D2 T20 Y21
M14 AE7 D31 T22 Y23
DIS_PX_Muxless
DIS_PX_Muxless
DIS_PX_Muxless
DIS_PX_Muxless
DIS_PX_Muxless
DIS_PX_Muxless M16 AH10 D33
1
1
VDD_21 GND_34 GND_103
M19 AA15 E10
C8712 C8711 C8708 C8707 C8706 C8705 VDD_22 GND_4 GND_104
M21 AH13 E22
SC4D7U6D3V3KX-GP
SC4D7U6D3V3KX-GP
SC4D7U6D3V3KX-GP
SC4D7U6D3V3KX-GP
SC4D7U6D3V3KX-GP
M23 AH16 E25
2
2
SC4D7U6D3V3KX-GP
N13 AH19 E5
N15 AH2 E7
N17 AH22 F28 AG11 AH11
VDD_27 GND_39 GND_109 GND_F GND_H
N18 AH24 F7
N20 AH28 G10
N22 AH29 G13
P12 AH30 G16
P14 AH32 G19
P16 AH33 G2
P19 AH5 G22
Under GPU P21
VDD_34
AH7
GND_46 GND_116
G25 C16
VDD_35 GND_47 GND_117 GND_OPT_1
P23 AJ7 G28 W32
VDD_36 GND_48 GND_118 GND_OPT_2
R13 AK10 G3
DIS_PX_Muxless
DIS_PX_Muxless
DIS_PX_Muxless
DIS_PX_Muxless R15
VDD_38
AK7
GND_50 GND_120
G30 Optional CMD GNDs (2)
R17 AL12 G32 NC for 4-Lyr cards
1
C8720 C8719 C8718 C8717 VDD_39 GND_51 GND_121

R18 AL14 G33
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
R20 AL15 G5 N13P-GS-A1-GP

R22 AL17 G7 71.0N13P.00U
2

C T12 AL18 K2 C
T14
VDD_43
AL2
GND_55 GND_125
K28 DIS_PX_Muxless
T16 AL20 K30
T19 AL21 K32
T21 AL23 K33
T23 AL24 K5
U13 AL26 K7
NEAR TO GPU U15
VDD_49
AL28
GND_61 GND_131
M13
U17 AL30 M15
DIS_PX_Muxless
DIS_PX_Muxless
DIS_PX_Muxless
DIS_PX_Muxless U18
VDD_52
AL32
GND_64 GND_134
M17
DIS_PX_Muxless U20
VDD_53
AL33
GND_65 GND_135
M18
U22 AL5 M20
1
C8731 C8730 C8729 C8728 C8727 VDD_54 GND_66 GND_136

V13 AM13 M22
V15 AM16 N12
SC10U6D3V3MX-GP
SC10U6D3V3MX-GP
SC10U6D3V3MX-GP
SC10U6D3V3MX-GP
SC10U6D3V3MX-GP
V17 AM19 N14

2

V18 AM22 N16
V20
VDD_59
V22
VDD_60
W12
VDD_61 N13P-GS-A1-GP
W14
VDD_62
W16
VDD_63 71.0N13P.00U
W19
VDD_64 DIS_PX_Muxless
W21
VDD_65
W23
VDD_66
Y13
VDD_67
Y15
VDD_68
Y17
VDD_69
Y18
VDD_70
Y20
VDD_71
Y22
VDD_72
DIS_PX_Muxless
DIS_PX_Muxless
DIS_PX_Muxless
DIS_PX_Muxless VGA1E 5 OF 17
N13P-GS-A1-GP 9/17 XVDD
1
C8737 C8736 C8733 C8732 CONFIGURABLE

71.0N13P.00U
SC10U6D3V3MX-GP
SC10U6D3V3MX-GP
SC10U6D3V3MX-GP
SC10U6D3V3MX-GP
POWER
2
DIS_PX_Muxless CHANNELS
U1
XVDD_1
U2
XVDD_2
U3
XVDD_3
U4
B XVDD_4 B
U5
XVDD_5
U6
XVDD_6
U7
XVDD_7
U8
XVDD_8
VGA1G 7 OF 17 3D3V_VGA_S0 V1
XVDD_9
17/17 NC/VDD33 V2
XVDD_10
V3
XVDD_11
AC6 J8 V4
NC#AC6 VDD33_1 XVDD_12
AJ28 K8 V5
NC#AJ28 VDD33_2 XVDD_13
AJ4
NC#AJ4 VDD33_3
L8 DIS_PX_Muxless
DIS_PX_Muxless
DIS_PX_Muxless
DIS_PX_Muxless
DIS_PX_Muxless XVDD_14
V6
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
AJ5
NC#AJ5 VDD33_4
M8 DIS_PX_Muxless XVDD_15
V7
SCD1U10V2KX-5GP
AL11 V8
1
NC#AL11 XVDD_16
C15
NC#C15 C8710 C8741 C8738 C8735 C8739 C8740
D19
NC#D19
SC1U6D3V2KX-GP
SC4D7U6D3V3KX-GP
D20 W2
2
NC#D20 XVDD_17
D23 W3
NC#D23 XVDD_18
D26 W4
NC#D26 XVDD_19
H31 W5
NC#H31 XVDD_20
T8 W7
NC#T8 XVDD_21
V32 W8
NC#V32 XVDD_22
N13P-GS-A1-GP 0.1U Under GPU

71.0N13P.00U XVDD_23
Y1
DIS_PX_Muxless XVDD_24
Y2
Y3
4.7U NEAR TO GPU XVDD_25
Y4
XVDD_26
Y5
XVDD_27
Y6
XVDD_28
Y7
1U NEAR TO GPU XVDD_29
Y8
XVDD_30
AA1
XVDD_31
AA2
XVDD_32
AA3
XVDD_33
AA4
XVDD_34
AA5
A XVDD_35 A
AA6
XVDD_36
AA7
XVDD_37
AA8
XVDD_38
N13P-GS-A1-GP
1bios.ru
71.0N13P.00U <Core Design>
DIS_PX_Muxless
Wistron Corporation
Title
GPU_DPPWR/GND(5/5)
A2
BAD50-HC -1
5 4 3 2 1
5 4 3 2 1
1D5V_VGA_S0
1D5V_VGA_S0
VRAM2
VRAM1 MDA[63..0] 85,89
K8 E3 MDA2
MDA[63..0] 85,89 VDD DQL0
K8 E3 MDA21 K2 F7 MDA4
VDD DQL0 MDA17 VDD DQL1 MDA1
K2 VDD DQL1 F7 N1 VDD DQL2 F2
N1 F2 MDA23 R9 F8 MDA5
R9 VDD DQL3 F8 B2 VDD DQL4 H3
B2 H3 MDA20 D9 H8 MDA6
D D9 VDD DQL5 H8 G7 VDD DQL6 G2 D
G7 G2 MDA22 R1 H7 MDA7
VDD DQL6 MDA16 VDD DQL7
R1 VDD DQL7 H7 N9 VDD
N9 D7 MDA11
VDD MDA29 DQU0 MDA14
DQU0 D7 A8 VDDQ DQU1 C3
A8 C3 MDA26 A1 C8 MDA8
VDDQ DQU1 MDA30 VDDQ DQU2 MDA15
A1 VDDQ DQU2 C8 C1 VDDQ DQU3 C2
C1 C2 MDA24 C9 A7 MDA9
C9 VDDQ DQU4 A7 D2 VDDQ DQU5 A2
D2 A2 MDA27 E9 B8 MDA10
E9 VDDQ DQU6 B8 F1 VDDQ DQU7 A3
F1 A3 MDA25 H9
VDDQ DQU7 VDDQ
H9 VDDQ H2 VDDQ DQSU C7 QSAP_1 85
H2 VDDQ DQSU C7 QSAP_3 85 DQSU# B7 QSAN_1 85
B7 VRAM2_VREF H1
DQSU# QSAN_3 85 VREFDQ
VRAM1_VREF H1 M8 F3 QSAP_0 85
VREFDQ VRAM_ZQ2 VREFCA DQSL
M8 VREFCA DQSL F3 QSAP_2 85 L8 ZQ DQSL# G3 QSAN_0 85
VRAM_ZQ1 L8 G3
ZQ DQSL# QSAN_2 85
2
ODT K1 FBA_ODT0 85
2
K1 R8802 85,89 FBA_A0 N3

ODT FBA_ODT0 85 A0
R8801 85,89 FBA_A0 N3 243R2F-2-GP 85,89 FBA_A1 P7
A0 A1
243R2F-2-GP 85,89 FBA_A1 P7 A1 DIS_PX_Muxless 85,89 FBA_A2 P3 A2 CS# L2 -FBA_CS0 85
DIS_PX_Muxless 85,89 FBA_A2 P3 L2 -FBA_CS0 85 85,89 FBA_A3 N2 T2 FBA_RST 85,89
1
A2 CS# A3 RESET#
85,89 FBA_A3 N2 T2 FBA_RST 85,89 85,89 FBA_A4 P8
1
A3 RESET# A4
85,89 FBA_A4 P8 A4 85,89 FBA_A5 P2 A5
85,89 FBA_A5 P2 A5 85,89 FBA_A6 R8 A6 NC#T7 T7 FBA_A14 85,89
85,89 FBA_A6 R8 A6 NC#T7 T7 FBA_A14 85,89 85,89 FBA_A7 R2 A7 NC#L9 L9
85,89 FBA_A7 R2 A7 NC#L9 L9 85,89 FBA_A8 T8 A8 NC#L1 L1
85,89 FBA_A8 T8 A8 NC#L1 L1 85,89 FBA_A9 R3 A9 NC#J9 J9
85,89 FBA_A9 R3 A9 NC#J9 J9 1207 SB NV 85,89 FBA_A10 L7 A10/AP NC#J1 J1 1207 SB NV
85,89 FBA_A10 L7 A10/AP NC#J1 J1 85,89 FBA_A11 R7 A11
C 85,89 FBA_A11 R7 A11 85,89 FBA_A12 N7 A12/BC# C
85,89 FBA_A12 N7 A12/BC# 85,89 FBA_A13 T3 A13 VSS J8
85,89 FBA_A13 T3 A13 VSS J8 M7 A15 VSS M1
M7 A15 VSS M1 VSS M9
VSS M9 VSS J2
VSS J2 85,89 FBA_BA0 M2 BA0 VSS P9
85,89 FBA_BA0 M2 BA0 VSS P9 85,89 FBA_BA1 N8 BA1 VSS G8
85,89 FBA_BA1 N8 G8 85,89 FBA_BA2 M3 B3 1D5V_VGA_S0
BA1 VSS 1D5V_VGA_S0 BA2 VSS
85,89 FBA_BA2 M3 BA2 VSS B3 VSS T1
VSS T1 VSS A9
1
VSS A9 85 CLKA0 J7 CK VSS T9
1
85 CLKA0 J7 T9 85 CLKA0# K7 E1 R8806
CK VSS R8803 CK# VSS 1K33R2F-GP
85 CLKA0# K7 CK# VSS E1 VSS P1 DIS_PX_Muxless
P1 DIS_PX_Muxless 1K33R2F-GP K9
VSS 85 FBA_CKE0 CKE
85 FBA_CKE0 K9 G1
2
CKE VSSQ
G1 F9
2
VSSQ VSSQ VRAM2_VREF
VSSQ F9 85 DQMA1 D3 DMU VSSQ E8
D3 E8 VRAM1_VREF E7 E2
85 DQMA3 DMU VSSQ 85 DQMA0 DML VSSQ
1
85 DQMA2 E7 DML VSSQ E2 VSSQ D8
1
D8 D1 R8805 C8807
VSSQ VSSQ
SCD01U16V2KX-3GP
D1 R8804 C8802 L3 B9 1K33R2F-GP DIS_PX_Muxless
VSSQ 85,89 -FBA_WE W E# VSSQ
SCD01U16V2KX-3GP
L3 B9 1K33R2F-GP DIS_PX_Muxless K3 B1 DIS_PX_Muxless
85,89 -FBA_WE 85,89 -FBA_CAS
2
W E# VSSQ CAS# VSSQ
85,89 -FBA_CAS K3 B1 DIS_PX_Muxless 85,89 -FBA_RAS J3 G9
2
CAS# VSSQ RAS# VSSQ
85,89 -FBA_RAS J3 G9
2
RAS# VSSQ
H5TQ1G63BFR-12C-GP
H5TQ1G63BFR-12C-GP
DIS_PX_Muxless
DIS_PX_Muxless
VRAM = Hy2GX8,Sam1GX8,,Hy1GX8,Sam512X4,Sam2Gx8
B B
Hy2GX8_VR.2GB0G.001,Sam1GX8_VR.1GB0B.006,,Hy1GX8_72.51G63.C0U,Sam512X4_VR.1GB0B.006,Sam2GX8 FB CMD mapping Mode D-N12x
VRAM SAMSUNG 1Gb VR.1GB0B.006

1D5V_VGA_S0 VRAM HYNIX 1Gb 72.51G63.C0U/VR.1GB0G.005 DG requires 4x0.1uF and 8x1.0uF per
VRAM HYNIX 2Gb VR.2GB0G.001 VRAM chip
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
1
1D5V_VGA_S0
SC1U10V2KX-1GP
C8801 C8803 C8804 C8805 C8806

2
DIS_PX_Muxless
DIS_PX_Muxless
DIS_PX_Muxless
SC10U6D3V3MX-GP
1D5V_VGA_S0
1
CLOSE TO THE MEMORY C8809 DIS_PX_Muxless

2
CLOSE TO THE MEMORY

A <Core Design> A
1
1
SC1U10V2KX-1GP
SC1U10V2KX-1GP
SC1U10V2KX-1GP
SC1U10V2KX-1GP
SC1U10V2KX-1GP
SC1U10V2KX-1GP
SC1U10V2KX-1GP
C8810 C8811 C8812 C8813 C8814 C8815 C8816
Wistron Corporation
2
1bios.ru
DIS_PX_Muxless
DIS_PX_Muxless
DIS_PX_Muxless
DIS_PX_Muxless
DIS_PX_Muxless
DIS_PX_Muxless
DIS_PX_Muxless Taipei Hsien 221, Taiwan, R.O.C.
Title
GPU-VRAM1,2 (1/4)
Custom
BAD50-HC -1
5 4 3 2 1
5 4 3 2 1
1D5V_VGA_S0
1D5V_VGA_S0
VRAM3
MDA[63..0] 85,88 VRAM4
K8 E3 MDA63 MDA[63..0] 85,88
VDD DQL0 MDA59 MDA41
K2 VDD DQL1 F7 K8 VDD DQL0 E3
N1 F2 MDA60 K2 F7 MDA44
R9 VDD DQL3 F8 N1 VDD DQL2 F2
B2 H3 MDA61 R9 F8 MDA47
D9 VDD DQL5 H8 B2 VDD DQL4 H3
D G7 G2 MDA62 D9 H8 MDA46 D
R1 VDD DQL7 H7 G7 VDD DQL6 G2
N9 R1 H7 MDA45
VDD MDA52 VDD DQL7
DQU0 D7 N9 VDD
A8 C3 MDA51 D7 MDA35
VDDQ DQU1 MDA55 DQU0 MDA37
A1 VDDQ DQU2 C8 A8 VDDQ DQU1 C3
C1 C2 MDA49 A1 C8 MDA34
C9 VDDQ DQU4 A7 C1 VDDQ DQU3 C2
D2 A2 MDA50 C9 A7 MDA33
E9 VDDQ DQU6 B8 D2 VDDQ DQU5 A2
F1 A3 MDA48 E9 B8 MDA32
VDDQ DQU7 VDDQ DQU6 MDA39
H9 VDDQ F1 VDDQ DQU7 A3
H2 VDDQ DQSU C7 QSAP_6 85 H9 VDDQ
B7 QSAN_6 85 H2 C7 QSAP_4 85
VRAM3_VREF DQSU# VDDQ DQSU
H1 VREFDQ DQSU# B7 QSAN_4 85
M8 F3 QSAP_7 85 VRAM4_VREF H1
VRAM_ZQ3 VREFCA DQSL VREFDQ
L8 G3 QSAN_7 85 M8 F3 QSAP_5 85
ZQ DQSL# VRAM_ZQ4 VREFCA DQSL
L8 ZQ DQSL# G3 QSAN_5 85
K1 FBA_ODT1 85
ODT
2
85,88 FBA_A0 N3 K1 FBA_ODT1 85

A0 ODT
2
R8901 85,88 FBA_A1 P7 85,88 FBA_A0 N3
A1 R8904 A0
243R2F-2-GP 85,88 FBA_A2 P3 L2 -FBA_CS1 85 85,88 FBA_A1 P7
A2 CS# A1
DIS_PX_Muxless 85,88 FBA_A3 N2 A3 RESET# T2 FBA_RST 85,88 243R2F-2-GP 85,88 FBA_A2 P3 A2 CS# L2 -FBA_CS1 85
85,88 FBA_A4 P8 DIS_PX_Muxless 85,88 FBA_A3 N2 T2
1
A4 A3 RESET# FBA_RST 85,88

85,88 FBA_A5 P2 85,88 FBA_A4 P8
1
A5 A4
85,88 FBA_A6 R8 T7 FBA_A14 85,88 85,88 FBA_A5 P2
A6 NC#T7 A5
85,88 FBA_A7 R2 L9 85,88 FBA_A6 R8 T7 FBA_A14 85,88
A7 NC#L9 A6 NC#T7
85,88 FBA_A8 T8 L1 85,88 FBA_A7 R2 L9
A8 NC#L1 A7 NC#L9
85,88 FBA_A9 R3 J9 85,88 FBA_A8 T8 L1
A9 NC#J9 A8 NC#L1
C 85,88 FBA_A10 L7
A10/AP NC#J1
J1 1207 SB NV 85,88 FBA_A9 R3
A9 NC#J9
J9 1207 SB NV C
85,88 FBA_A11 R7 85,88 FBA_A10 L7 J1
A11 A10/AP NC#J1
85,88 FBA_A12 N7 A12/BC# 85,88 FBA_A11 R7 A11
85,88 FBA_A13 T3 J8 85,88 FBA_A12 N7
A13 VSS A12/BC#
M7 A15 VSS M1 85,88 FBA_A13 T3 A13 VSS J8
VSS M9 M7 A15 VSS M1
VSS J2 VSS M9
85,88 FBA_BA0 M2 BA0 VSS P9 VSS J2
85,88 FBA_BA1 N8 G8 1D5V_VGA_S0 85,88 FBA_BA0 M2 P9 1D5V_VGA_S0
BA1 VSS BA0 VSS
85,88 FBA_BA2 M3 B3 85,88 FBA_BA1 N8 G8
BA2 VSS BA1 VSS
T1 85,88 FBA_BA2 M3 B3
VSS BA2 VSS
1
A9 T1
VSS R8902 VSS R8906
85 CLKA1 J7 T9 A9
CK VSS 1K33R2F-GP VSS 1K33R2F-GP
85 CLKA1# K7
CK# VSS
E1 DIS_PX_Muxless 85 CLKA1 J7
CK VSS
T9 DIS_PX_Muxless
P1 85 CLKA1# K7 E1
VSS CK# VSS
85 FBA_CKE1 K9 P1
2
CKE VSS
VSSQ G1 85 FBA_CKE1 K9 CKE
F9 VRAM3_VREF G1 VRAM4_VREF
VSSQ VSSQ
85 DQMA6 D3 E8 F9
DMU VSSQ VSSQ
1
85 DQMA7 E7 E2 85 DQMA4 D3 E8
DML VSSQ DMU VSSQ
1
D8 R8903 C8902 85 DQMA5 E7 E2 R8905 C8917
VSSQ DML VSSQ
SCD01U16V2KX-3GP
SCD01U16V2KX-3GP
D1 DIS_PX_Muxless 1K33R2F-GP DIS_PX_Muxless D8 DIS_PX_Muxless 1K33R2F-GP DIS_PX_Muxless
VSSQ VSSQ
85,88 -FBA_WE L3 B9 D1
2
WE# VSSQ VSSQ
85,88 -FBA_CAS K3 B1 85,88 -FBA_WE L3 B9
2
CAS# VSSQ WE# VSSQ
85,88 -FBA_RAS J3 G9 85,88 -FBA_CAS K3 B1
RAS# VSSQ CAS# VSSQ
85,88 -FBA_RAS J3 RAS# VSSQ G9
H5TQ1G63BFR-12C-GP
H5TQ1G63BFR-12C-GP
B DIS_PX_Muxless B
DIS_PX_Muxless
1D5V_VGA_S0
VRAM = Hy2GX8,Sam1GX8,,Hy1GX8,Sam512X4,Sam2Gx8 FB CMD mapping Mode D-N12x VRAM = Hy2GX8,Sam1GX8,,Hy1GX8,Sam512X4,Sam2Gx8

VRAM HYNIX 1Gb 72.51G63.C0U/VR.1GB0G.005
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
VRAM HYNIX 2Gb VR.2GB0G.001

1
1
SC1U10V2KX-1GP
C8901 C8903 C8904 C8905 C8906

2
DIS_PX_Muxless
DIS_PX_Muxless
DIS_PX_Muxless
1D5V_VGA_S0
1D5V_VGA_S0
CLOSE TO THE MEMORY
SC10U6D3V3MX-GP
1
1
C8909 DIS_PX_Muxless <Core Design>

SC1U10V2KX-1GP
SC1U10V2KX-1GP
SC1U10V2KX-1GP
SC1U10V2KX-1GP
SC1U10V2KX-1GP
SC1U10V2KX-1GP
SC1U10V2KX-1GP
C8910 C8911 C8912 C8913 C8914 C8918 C8919

2
A A
2
Wistron Corporation
DIS_PX_Muxless
DIS_PX_Muxless
DIS_PX_Muxless
DIS_PX_Muxless
DIS_PX_Muxless
DIS_PX_Muxless
DIS_PX_Muxless CLOSE TO THE MEMORY 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
1bios.ru
Title
GPU-VRAM3,4 (2/4)
Custom
BAD50-HC -1
5 4 3 2 1
5 4 3 2 1
1D5V_VGA_S0
VRAM6
1D5V_VGA_S0
VRAM5 MDB[63..0] 85,91
MDB[63..0] 85,91 K8 E3 MDB29
MDB6 VDD DQL0 MDB25
K8 VDD DQL0 E3 K2 VDD DQL1 F7
K2 F7 MDB3 N1 F2 MDB30
VDD DQL1 MDB4 VDD DQL2 MDB27
N1 VDD DQL2 F2 R9 VDD DQL3 F8
R9 F8 MDB2 B2 H3 MDB28
B2 VDD DQL4 H3 D9 VDD DQL5 H8
D9 H8 MDB0 G7 G2 MDB31
D VDD DQL5 MDB5 VDD DQL6 MDB24 D
G7 VDD DQL6 G2 R1 VDD DQL7 H7
R1 H7 MDB1 N9
VDD DQL7 VDD MDB9
N9 VDD DQU0 D7
D7 MDB20 A8 C3 MDB12
DQU0 MDB22 VDDQ DQU1 MDB8
A1 C8 MDB16 C1 C2 MDB14
VDDQ DQU2 MDB23 VDDQ DQU3 MDB10
C1 VDDQ DQU3 C2 C9 VDDQ DQU4 A7
C9 A7 MDB18 D2 A2 MDB13
D2 VDDQ DQU5 A2 E9 VDDQ DQU6 B8
E9 B8 MDB19 F1 A3 MDB15
VDDQ DQU6 MDB17 VDDQ DQU7
F1 VDDQ DQU7 A3 H9 VDDQ
H9 VDDQ H2 VDDQ DQSU C7 QSBP_1 85
H2 C7 QSBP_2 85 B7 QSBN_1 85
VDDQ DQSU VRAM6_VREF DQSU#
DQSU# B7 QSBN_2 85 H1 VREFDQ
VRAM5_VREF H1 M8 F3 QSBP_3 85
VREFDQ VRAM_ZQ6 VREFCA DQSL
M8 F3 QSBP_0 85 L8 G3 QSBN_3 85
VRAM_ZQ5 VREFCA DQSL ZQ DQSL#
L8 ZQ DQSL# G3 QSBN_0 85
K1 FBB_ODT0 85
ODT
2
2
K1 FBB_ODT0 85 85,91 FBB_A0 N3
R9001 ODT R9002 A0
85,91 FBB_A0 N3 A0 85,91 FBB_A1 P7 A1
DIS_PX_Muxless 243R2F-2-GP 85,91 FBB_A1 P7
A1 DIS_PX_Muxless 243R2F-2-GP 85,91 FBB_A2 P3
A2 CS#
L2 -FBB_CS0 85
85,91 FBB_A2 P3 A2 CS# L2 -FBB_CS0 85 85,91 FBB_A3 N2 A3 RESET# T2 FBB_RST 85,91
85,91 FBB_A3 N2 T2 85,91 FBB_A4 P8
1
1
A3 RESET# FBB_RST 85,91 A4
85,91 FBB_A4 P8 85,91 FBB_A5 P2
A4 A5
85,91 FBB_A5 P2 85,91 FBB_A6 R8 T7 FBB_A14 85,91
A5 A6 NC#T7
85,91 FBB_A6 R8 T7 FBB_A14 85,91 85,91 FBB_A7 R2 L9
A6 NC#T7 A7 NC#L9
85,91 FBB_A7 R2 L9 85,91 FBB_A8 T8 L1
A7 NC#L9 A8 NC#L1
85,91 FBB_A8 T8
A8 NC#L1
L1 85,91 FBB_A9 R3
A9 NC#J9
J9 1207 SB NV
85,91 FBB_A9 R3
A9 NC#J9
J9 1207 SB NV 85,91 FBB_A10 L7
A10/AP NC#J1
J1
85,91 FBB_A10 L7 J1 85,91 FBB_A11 R7
C A10/AP NC#J1 A11 C
85,91 FBB_A11 R7 A11 85,91 FBB_A12 N7 A12/BC#
85,91 FBB_A12 N7 85,91 FBB_A13 T3 J8
A12/BC# A13 VSS
85,91 FBB_A13 T3 A13 VSS J8 M7 A15 VSS M1
M7 A15 VSS M1 VSS M9
VSS M9 VSS J2
VSS J2 85,91 FBB_BA0 M2 BA0 VSS P9
85,91 FBB_BA0 M2 P9 85,91 FBB_BA1 N8 G8
BA0 VSS 1D5V_VGA_S0 BA1 VSS
85,91 FBB_BA1 N8 G8 85,91 FBB_BA2 M3 B3
BA1 VSS BA2 VSS
85,91 FBB_BA2 M3 B3 T1
BA2 VSS VSS
T1 A9
VSS VSS
1
A9 85 CLKB0 J7 T9 1D5V_VGA_S0
VSS R9003 CK VSS
85 CLKB0 J7 T9 85 CLKB0# K7 E1
CK VSS 1K33R2F-GP CK# VSS
85 CLKB0# K7 E1 P1
CK# VSS VSS
1
VSS P1 85 FBB_CKE0 K9 CKE
K9 G1 R9006
85 FBB_CKE0
2
CKE VSSQ 1K33R2F-GP
VSSQ
G1
VSSQ
F9 DIS_PX_Muxless
F9 VRAM5_VREF 85 DQMB1 D3 E8
VSSQ DMU VSSQ
85 DQMB2 D3 E8 DIS_PX_Muxless 85 DQMB3 E7 E2
2
DMU VSSQ DML VSSQ
1
85 DQMB0 E7 E2 D8
DML VSSQ VSSQ
1
D8 R9004 C9002 D1 VRAM6_VREF
VSSQ VSSQ
SCD01U16V2KX-3GP
D1 1K33R2F-GP L3 B9
VSSQ 85,91 -FBB_WE WE# VSSQ
1
85,91 -FBB_WE L3 B9 85,91 -FBB_CAS K3 B1
2
WE# VSSQ CAS# VSSQ
1
K3 B1 2 J3 G9 R9005 C9017
85,91 -FBB_CAS CAS# VSSQ 85,91 -FBB_RAS RAS# VSSQ
SCD01U16V2KX-3GP
J3 G9 1K33R2F-GP DIS_PX_Muxless
85,91 -FBB_RAS RAS# VSSQ
DIS_PX_Muxless
2
DIS_PX_Muxless DIS_PX_Muxless H5TQ1G63BFR-12C-GP
2
H5TQ1G63BFR-12C-GP
DIS_PX_Muxless
DIS_PX_Muxless
B B
VRAM = Hy2GX8,Sam1GX8,Hynix1GX8,Sam2GX8
VRAM = Hy2GX8,Sam1GX8,Hynix1GX8,Sam2GX8
1D5V_VGA_S0
DG requires 4x0.1uF and 8x1.0uF per

VRAM chip
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
1D5V_VGA_S0
1
1
SC1U10V2KX-1GP
C9001 C9003 C9004 C9005 C9006

2
SC10U6D3V3MX-GP
DIS_PX_Muxless
DIS_PX_Muxless
DIS_PX_Muxless
1
1D5V_VGA_S0
C9009 DIS_PX_Muxless
CLOSE TO THE MEMORY
2
A CLOSE TO THE MEMORY <Core Design>

A
1bios.ru
1
Wistron Corporation
SC1U10V2KX-1GP
SC1U10V2KX-1GP
SC1U10V2KX-1GP
SC1U10V2KX-1GP
SC1U10V2KX-1GP
SC1U10V2KX-1GP
SC1U10V2KX-1GP
C9010 C9011 C9012 C9013 C9014 C9018 C9019

2
DIS_PX_Muxless
DIS_PX_Muxless
DIS_PX_Muxless
DIS_PX_Muxless
DIS_PX_Muxless
DIS_PX_Muxless
DIS_PX_Muxless Title
GPU-VRAM5,6 (3/4)
Custom
BAD50-HC -1
5 4 3 2 1
5 4 3 2 1
1D5V_VGA_S0
VRAM7
1D5V_VGA_S0
MDB[63..0] 85,90 VRAM8
K8 E3 MDB32 MDB[63..0] 85,90
VDD DQL0 MDB37 MDB56
K2 VDD DQL1 F7 K8 VDD DQL0 E3
N1 F2 MDB33 K2 F7 MDB60
D R9 VDD DQL3 F8 N1 VDD DQL2 F2 D
B2 H3 MDB34 R9 F8 MDB62
D9 VDD DQL5 H8 B2 VDD DQL4 H3
G7 G2 MDB35 D9 H8 MDB61
R1 VDD DQL7 H7 G7 VDD DQL6 G2
N9 R1 H7 MDB63
VDD MDB52 VDD DQL7
DQU0 D7 N9 VDD
A8 C3 MDB49 D7 MDB46
VDDQ DQU1 MDB55 DQU0 MDB42
C1 C2 MDB51 A1 C8 MDB47
C9 VDDQ DQU4 A7 C1 VDDQ DQU3 C2
D2 A2 MDB50 C9 A7 MDB44
E9 VDDQ DQU6 B8 D2 VDDQ DQU5 A2
F1 A3 MDB48 E9 B8 MDB45
VDDQ DQU7 VDDQ DQU6 MDB41
H9 VDDQ F1 VDDQ DQU7 A3
H2 VDDQ DQSU C7 QSBP_6 85 H9 VDDQ
DQSU# B7 QSBN_6 85 H2 VDDQ DQSU C7 QSBP_5 85
VRAM7_VREF H1 B7 QSBN_5 85
VREFDQ VRAM8_VREF DQSU#
M8 VREFCA DQSL F3 QSBP_4 85 H1 VREFDQ
VRAM_ZQ7 L8 G3 QSBN_4 85 M8 F3 QSBP_7 85
ZQ DQSL# VRAM_ZQ8 VREFCA DQSL
L8 ZQ DQSL# G3 QSBN_7 85
2
ODT K1 FBB_ODT1 85
2
R9101 85,90 FBB_A0 N3 K1
A0 ODT FBB_ODT1 85
DIS_PX_Muxless 243R2F-2-GP 85,90 FBB_A1 P7 R9104 85,90 FBB_A0 N3
A1 A0
85,90 FBB_A2 P3 A2 CS# L2 -FBB_CS1 85 243R2F-2-GP 85,90 FBB_A1 P7 A1
85,90 FBB_A3 N2 T2 FBB_RST 85,90 85,90
DIS_PX_Muxless FBB_A2 P3 L2 -FBB_CS1 85
1
A3 RESET# A2 CS#
85,90 FBB_A4 P8 85,90 FBB_A3 N2 T2 FBB_RST 85,90
1
A4 A3 RESET#
85,90 FBB_A5 P2 A5 85,90 FBB_A4 P8 A4
85,90 FBB_A6 R8 A6 NC#T7 T7 FBB_A14 85,90 85,90 FBB_A5 P2 A5
C 85,90 FBB_A7 R2 A7 NC#L9 L9 85,90 FBB_A6 R8 A6 NC#T7 T7 FBB_A14 85,90 C
85,90 FBB_A8 T8 A8 NC#L1 L1 85,90 FBB_A7 R2 A7 NC#L9 L9
85,90 FBB_A9 R3 A9 NC#J9 J9 85,90 FBB_A8 T8 A8 NC#L1 L1
85,90 FBB_A10 L7 A10/AP NC#J1 J1 1207 SB NV 85,90 FBB_A9 R3 A9 NC#J9 J9 1207 SB NV
85,90 FBB_A11 R7 A11 85,90 FBB_A10 L7 A10/AP NC#J1 J1
85,90 FBB_A12 N7 A12/BC# 85,90 FBB_A11 R7 A11
85,90 FBB_A13 T3 A13 VSS J8 85,90 FBB_A12 N7 A12/BC#
M7 A15 VSS M1 85,90 FBB_A13 T3 A13 VSS J8
VSS M9 M7 A15 VSS M1
VSS J2 VSS M9
85,90 FBB_BA0 M2 BA0 VSS P9 VSS J2
85,90 FBB_BA1 N8 BA1 VSS G8 85,90 FBB_BA0 M2 BA0 VSS P9
85,90 FBB_BA2 M3 BA2 VSS B3 85,90 FBB_BA1 N8 BA1 VSS G8
T1 1D5V_VGA_S0 85,90 FBB_BA2 M3 B3 1D5V_VGA_S0
VSS BA2 VSS
VSS A9 VSS T1
85 CLKB1 J7 CK VSS T9 VSS A9
1
85 CLKB1# K7 CK# VSS E1 85 CLKB1 J7 CK VSS T9
P1 R9102 85 CLKB1# K7 E1 R9105
VSS 1K33R2F-GP CK# VSS 1K33R2F-GP
85 FBB_CKE1 K9 CKE DIS_PX_Muxless VSS P1 DIS_PX_Muxless
VSSQ G1 85 FBB_CKE1 K9 CKE
F9 G1
2
VSSQ VSSQ
85 DQMB6 D3 DMU VSSQ E8 VSSQ F9
85 DQMB4 E7 E2 VRAM7_VREF 85 DQMB5 D3 E8 VRAM8_VREF
DML VSSQ DMU VSSQ
VSSQ D8 1 85 DQMB7 E7 DML VSSQ E2
1
VSSQ D1 VSSQ D8
1
L3 B9 R9103 C9118 D1 R9106 C9117
85,90 -FBB_W E WE# VSSQ VSSQ
SCD01U16V2KX-3GP
SCD01U16V2KX-3GP
K3 B1 DIS_PX_Muxless 1K33R2F-GP DIS_PX_Muxless L3 B9 1K33R2F-GP DIS_PX_Muxless
85,90 -FBB_CAS CAS# VSSQ 85,90 -FBB_W E WE# VSSQ
85,90 -FBB_RAS J3 G9 85,90 -FBB_CAS K3 B1 DIS_PX_Muxless
2
RAS# VSSQ CAS# VSSQ
85,90 -FBB_RAS J3 G9
2
2
RAS# VSSQ
B B
H5TQ1G63BFR-12C-GP
H5TQ1G63BFR-12C-GP
DIS_PX_Muxless
DIS_PX_Muxless
1D5V_VGA_S0 VRAM = Hy2GX8,Sam1GX8,Hynix1GX8,Sam2GX8 VRAM = Hy2GX8,Sam1GX8,Hynix1GX8,Sam2GX8
CLOSE TO THE MEMORY VRAM SAMSUNG 1Gb VR.1GB0B.006
1D5V_VGA_S0
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
1
1
SC1U10V2KX-1GP
SC1U10V2KX-1GP
C9101 C9102 C9103 C9104 C9105 C9106

2
1
C9109
DIS_PX_Muxless SC10U6D3V3MX-GP
DIS_PX_Muxless
DIS_PX_Muxless
DIS_PX_Muxless
DIS_PX_Muxless
2
1D5V_VGA_S0
CLOSE TO THE MEMORY
<Core Design>
A A
1
1
SC1U10V2KX-1GP
SC1U10V2KX-1GP
SC1U10V2KX-1GP
SC1U10V2KX-1GP
SC1U10V2KX-1GP
SC1U10V2KX-1GP
C9110 C9111 C9112 C9113 C9114 C9119

Wistron Corporation
1bios.ru
2

DIS_PX_Muxless
DIS_PX_Muxless
DIS_PX_Muxless
DIS_PX_Muxless
DIS_PX_Muxless
DIS_PX_Muxless
Title
GPU-VRAM7,8 (4/4)
Custom
BAD50-HC -1
5 4 3 2 1
5 4 3 2 1
VGA boot voltage setting 3D3V_VGA_S0

11/09 SB
5V_CHARGER 5V_CHARGER 5V_VGACORE
1
PR9243 PR9240 PR9241 PR9242 PG9205
1 2
1KR2J-1-GP
1KR2J-1-GP
1KR2J-1-GP
1KR2J-1-GP
PR9201 GAP-CLOSE-PWR
10R2F-L-GP PG9208
DIS_PX_Muxless
2
5V_CHARGER DY DY 1 2
5V_CHARGER
2
H_VID2 GAP-CLOSE-PWR
1
H_VID3 PG9206
PR9204 PR9203 H_VID4
D DIS_PX_Muxless 1 2 D
1
36R3F-GP 5K11R2F-L1-GP H_VID5
DIS_PX_Muxless PR9202 PC9201 PR9212 PR9214 PR9216 GAP-CLOSE-PWR
150R2F-1-GP
DIS_PX_Muxless SCD1U10V2KX-L-GP 16K9R2D-GP 3K09R2F-1-GP 11K3R2D-GP PG9207
DY
2
1313M_IDES_P_R
1208 SB DIS_PX_Muxless DIS_PX_Muxless DIS_PX_Muxless 1 2
1313M_7_VDD
1313M_IDES_N_MOS
2
1313M_R_SEL0_R 1313M_R_SEL0_R 1313M_R_SEL0_R GAP-CLOSE-PWR
PU9204 PG9209
1
LSK3541G1ET2L-GP G 1313M_DB_1 GND_1313M PU9201 1 2
PR9213 PR9215 PR9217
0R2J-2-GP 0R2J-2-GP 100R2D-GP GAP-CLOSE-PWR
84.03541.F31 7 6
D
VDD VID0 H_VID0 86
5 H_VID1 86 PG9212
PU9205 VID1
DIS_PX_Muxless 4 H_VID2 86 DIS_PX_Muxless DIS_PX_Muxless DIS_PX_Muxless 1 2
2
LSK3541G1ET2L-GP VID2
G 3 H_VID3 86
1313M_DB_0 VID3 GAP-CLOSE-PWR
19 2 H_VID4 86
1313M_DB_1 DB0 VID4 PG9210
20 1 H_VID5 86
1313M_DB_2 DB1 VID5
84.03541.F31 21
DB2 VID6
32 1 2
S
DIS_PX_Muxless 12 1313M_R_SEL0 GAP-CLOSE-PWR

VGACORE_VSS_SENSE_N R_SEL0 GND_1313M 1313M_R_SEL1 PG9211
10 13
VGACORE_VDD_SENSE_P SENSE- R_SEL1 1313M_R_SEL2
11 14 1 2
GND_1313M SENSE+ R_SEL2
2 PR9239 1 GND_1313M
1313M_IDES_N 17 22 1313M_SPHASE_0 0R0402-PAD GAP-CLOSE-PWR
1313M_IDES_P IDES_N SPHASE0 1313M_SPHASE_1
DIS_PX_Muxless 18
IDES_P SPHASE1
23
1313M_SPHASE_2 GND_1313M 3D3V_VGA_S0
24
SPHASE2
1PR9205 2 1313M_R_REF 16
1D05V_VTT 44K2R2D-GP 1313M_RSOC R_REF 1313M_OE 1 PR9237 2
26 31
R_OSC OE
DY 1 PR9206 2 10KR2F-2-GP
1 2 100KR2F-L1-GP 1313M_DCMDRP 9 25 DIS_PX_Muxless
GND_1313M DPRSLPVR DCMDRP NC#25
1313M_DB_1 PR9234 100KR2F-L1-GP
DIS_PX_Muxless 30
DPRSLPVR 1313M_IMON TP9201 VGACORE_VDD_SENSE_P
1 2 15 1 1 PR9218 2 VGACORE_VDD_SENSE 83
PR92442 IMON 0R2J-2-GP
86 N13P_GPIO16 1 27
2
PR9233 1313M_GFX_ON VR_TT#
DY 162KR2F-L-GP 0R2J-2-GP
PR9245
29
CLK_EN#
TPAD40-GP
1D05V_VTT
DIS_PX_Muxless
DY GND
8
0R2J-2-GP 28 33
PWRGD GND
DIS_PX_Muxless VGACORE_VSS_SENSE_N 1 PR9219 2 VGACORE_GND_SENSE 83
1
1D05V_VTT VT1312MFQX-GP DY 0R2J-2-GP Delete Gaps
PC9251
GND_1313M 74.01312.033 1 2 DIS_PX_Muxless

SC1200P50V2KX-1GP
PR9207 DIS_PX_Muxless GND_1313M 2011.09.16 wayler

1
1 21313M_VR_TT#_GFX PR9211 100KR2D-1-GP

C DIS_PX_Muxless PR9232 56R2F-1-GP PWR_VGA_CORE_PGOOD 2 PR9238 1 C
DGPU_PWROK 22,93
1
7K87R2F-GP 0R0402-PAD
DIS_PX_Muxless
2
1
DIS_PX_Muxless PR9210 DIS_PX_Muxless
PR9246 15KR2D-GP PC9202
DIS_PX_Muxless
2
PG9203 1 2 SC6800P25V2KX-1GP 1 PR9220 2

86 DGPUHOT#
2
1 2 DY 3D3V_VGA_S0 100R2F-L1-GP-U
2
1
1
GAP-CLOSE-PWR PR9208 PR9209
1K91R2F-1-GP 1K91R2F-1-GP
GND_1313M VGACORE_VSS_SENSE_N 5V_VGACORE
1 PR9221 2
2
2
GND_1313M Change NETNAME 100R2F-L1-GP-U
DIS_PX_Muxless
2011.07.22 wayler
PC9211
PC9212
PC9213
PC9214
PC9215
PC9216
SC1U10V2KX-1GP
SC1U10V2KX-1GP
SC1U10V2KX-1GP
SC10U6D3V3MX-GP
SC10U6D3V3MX-GP
SC10U6D3V3MX-GP
Change NETNAME
1
VGA_CORE 2011.09.16 wayler
2
PR9222 PR9223
1313M_IDES_N 1 2 1313M_IDES_N_K
1 2
G4
G5
G6
C6
C5
C4
E4
E5
E6
J4
J5
J6
SC22U6D3V5MX-2GP
SC22U6D3V5MX-2GP
SC22U6D3V5MX-2GP
SC22U6D3V5MX-2GP
SC22U6D3V5MX-2GP
1
6K81R2F-1-GP 2K8R2F-GP PU9202 DIS_PX_Muxless

DIS_PX_Muxless
DIS_PX_Muxless
SC22U4V3MX-GP
SC22U4V3MX-GP
SC22U4V3MX-GP
SC22U4V3MX-GP
SC22U4V3MX-GP
PC9220
PC9224
PC9225
PC9226
PC9227
PC9233
PC9234
PC9235
PC9236
PC9237
PR9235 DIS_PX_Muxless
DIS_PX_Muxless
DIS_PX_Muxless
VDDH
VDDH
VDDH
VDDH
VDDH
VDDH
VDDH
VDDH
VDDH
VDDH
VDDH
VDDH
1
1K1R2F-GP PWR_AXG_IDES_1_N A5 H1 PWR_VGA_VX_R
DIS_PX_Muxless DIS_PX_Muxless PWR_AXG_IDES_1_P A4
IDES_N VX#H1
H2
1313M_IDES_P IDES_P VX#H2
H3
1PWR_AXG_IDES_P_12
2
VX#H3
H4
1313M_DB_0 VX#H4 IND-200NH-2-GP
A6 H5
1313M_DB_1 DB0 VX#H5
DIS_PX_Muxless 1313M_DB_2
A1
DB1 VX#H6
H6 4 3
B1 D1
DB2 VX#D1
D2
1313M_SPHASE_0 VX#D2
B6 D3
SPHASE VX#D3 DIS_PX_Muxless
DIS_PX_Muxless
DIS_PX_Muxless
DIS_PX_Muxless
DIS_PX_Muxless
D4 1 2
VX#D4
DIS_PX_Muxless D5
SC22U6D3V5MX-2GP
SC22U6D3V5MX-2GP
SC22U6D3V5MX-2GP
5V_VGACORE PWR_AVDD_0 A3
VX#D5
D6 PL9201 DIS_PX_Muxless
DIS_PX_Muxless
DIS_PX_Muxless
DIS_PX_Muxless
DIS_PX_Muxless
SC22U4V3MX-GP
SC22U4V3MX-GP
SC22U4V3MX-GP
SC22U4V3MX-GP
SC22U4V3MX-GP
SC22U4V3MX-GP
SC22U4V3MX-GP
AVDD VX#D6
PC9228
PC9229
PC9230
PC9231
PC9232
PC9238
PC9239
PC9240
PC9241
PC9242
B3 F6
1
PC9205 AGND VX#F6
B4 F5
DIS_PX_Muxless
1
B SC6800P25V2KX-1GP AGND VX#F5 B

B5 F4
2
PR9224 PR9225 AGND VX#F4

PR9226 F3
2
10R2J-2-GP VX#F3
1 2PWR_AXG_IDES_P_C
1 2 DIS_PX_Muxless F2
AGND
AGND
VX#F2
DIS_PX_Muxless F1
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
VX#F1
2
6K81R2F-1-GP 2K8R2F-GP
VT1317SFCX-001-GP
A2
B2
E3
E2
E1
C1
C2
C3
J3
J2
J1
G3
G2
G1
1
DIS_PX_Muxless DIS_PX_Muxless PC9206

74.01317.B3Z 5V_VGACORE DIS_PX_Muxless
DIS_PX_Muxless
DIS_PX_Muxless
DIS_PX_Muxless
DIS_PX_Muxless
DIS_PX_Muxless
SCD1U25V3KX-GP
DIS_PX_Muxless
DIS_PX_Muxless
DIS_PX_Muxless
DIS_PX_Muxless
2
Change Size to 0603

PG9201 ( 78.2261T.5BL )
SC22U4V3MX-GP
SC22U4V3MX-GP
SC22U4V3MX-GP
SC22U4V3MX-GP
SC22U4V3MX-GP
SC22U4V3MX-GP
SC22U4V3MX-GP
SC22U4V3MX-GP
PC9218
PC9253
PC9221
PC9222
PC9223
PC9217
PC9243
PC9244
PC9245
PC9246
PC9247
PC9248
PC9249
PC9250
1 2
SC1U10V2KX-1GP
SC1U10V2KX-1GP
SC1U10V2KX-1GP
SC10U6D3V3MX-GP
SC10U6D3V3MX-GP
SC10U6D3V3MX-GP
2011.09.16 wayler
1
1
1
GAP-CLOSE-PWR
GND_1317S_GPU_1 DY DY
PR9227 PR9228
2
2
2
1 2 PWR_AXG_IDES_2_R
1 2
G4
G5
G6
C6
C5
C4
E4
E5
E6
J4
J5
J6
1
6K81R2F-1-GP 2K8R2F-GP PU9203

PR9236
VDDH
VDDH
VDDH
VDDH
VDDH
VDDH
VDDH
VDDH
VDDH
VDDH
VDDH
VDDH
1K1R2F-GP PWR_AXG_IDES_2_N A5 H1 PWR_VGA_VX_L DIS_PX_Muxless

DIS_PX_Muxless
DIS_PX_Muxless
DIS_PX_Muxless
DIS_PX_Muxless
DIS_PX_Muxless
DIS_PX_Muxless DIS_PX_Muxless PWR_AXG_IDES_2_P A4
IDES_N VX#H1
H2 DIS_PX_Muxless
DIS_PX_Muxless
DIS_PX_Muxless
IDES_P VX#H2
PWR_AXG_IDES_P_2
H3 DIS_PX_Muxless
2
VX#H3
H4
1313M_DB_0 VX#H4
A6 H5
1313M_DB_1 DB0 VX#H5
DIS_PX_Muxless 1313M_DB_2
A1
DB1 VX#H6
H6
B1 D1
DB2 VX#D1
D2
1313M_SPHASE_1 VX#D2
B6 D3
SPHASE VX#D3
DIS_PX_Muxless VX#D4
D4
D5
5V_VGACORE PWR_AVDD_1 VX#D5
A3 D6
1
AVDD VX#D6
B3 F6
PC9208 AGND VX#F6
B4 F5
1
SC6800P25V2KX-1GP AGND VX#F5

B5 F4
2
PR9229 PR9230 AGND VX#F4

PR9231 F3
10R2J-2-GP VX#F3
1 2PWR_AXG_IDES_P_RC
1 2 DIS_PX_Muxless F2
AGND
AGND
A VX#F2 A
DIS_PX_Muxless F1
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
VX#F1
2
6K81R2F-1-GP 2K8R2F-GP
VT1317SFCX-001-GP
A2
B2
E3
E2
E1
C1
C2
C3
J3
J2
J1
G3
G2
G1
1
74.01317.B3Z
1bios.ru
DIS_PX_Muxless DIS_PX_Muxless PC9252 <Core Design>
SCD1U25V3KX-GP
2
Wistron Corporation
DIS_PX_Muxless 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
PG9202 Taipei Hsien 221, Taiwan, R.O.C.
1 2
Title
GAP-CLOSE-PWR
GND_1317S_GPU_2 VT1312M_+VGA_CORE
A2
BAD50-HC -1
5 4 3 2 1
5 4 3 2 1
+3VS to 3.3V_DELAY Transfer 1D5V_VGA_S0
R9301
SB modify to 84.03006.A37
D
0R2J-2-GP D
1
DY
2
3D3V_VGA_S0
1.05V to 1.05V_VGA_S0 Transfer
1D5V_S3 1D5V_VGA_S0
DMP2130L-7-GP
U9301 1D05V_LAN 1D05V_VGA_S0
3D3V_S0
S Q9302 84.02130.031 8 D S 1 U9302
SC10U6D3V3MX-GP
D S QM3006S-GP
D 2nd = 84.03413.A31 7 2
1
D
TC9303 D S TC9302 DIS_PX_Muxless 84.03006.A37
6 3 3.6A
1
G
SCD1U16V2KX-3GP
R9302 ST100U6D3VBM-5GP D C9302 ST100U6D3VBM-5GP D S
DIS_PX_Muxless 5 G 4 8 1
1
100KR2J-1-GP
DIS_PX_Muxless C9301 77.C1071.081 TC9301 7 D S 2
G
SIR460DP-T1-GE3-GP SE390U2D5VM-10-GP 6 D S 3
2
DY DIS_PX_Muxless DIS_PX_MuxlessDIS_PX_Muxless 5 D
2
2
3.3V_ALW_1 77.93971.03L G
DIS_PX_Muxless
77.C1071.081 2nd = 77.C1071.18L 2nd = 79.3971V.3AL
4
84.00460.037 3rd = 77.81071.06L DIS_PX_Muxless
1
2nd = 77.C1071.18L 2nd = 84.08062.037
6
4
Q9301 R9304
2N7002KDW-GP 100R2J-2-GP
3rd = 77.81071.06L RUNON_R_1
84.2N702.A3F DIS_PX_Muxless
2nd = 84.2N702.F3F
2
DIS_PX_Muxless
1
RUNON_R_1
C C
1
3.3V_RUN_VGA_1
C9303
R9308 SC6800P25V2KX-1GP
2
10KR2F-2-GP DY
3D3V_S0 1 2
DIS_PX_Muxless
DGPU_PWR_EN
1 C9308
SCD22U25V3KX-GP
2
18 DGPU_PWR_EN# G DIS_PX_Muxless
DIS_PX_Muxless D
S 1D05V_VGA_S0
1D5V_VGA_S0
Q9305 U9304 5V_S5
2N7002K-2-GP G5938TL1U-GP
84.2N702.J31 74.05938.09P
2ND = 84.07002.I31
22,92 DGPU_PWROK 6 EN VCC 1
3RD = 84.2N702.W31 5
DC2 GND
2 RUNON_R_1
4 3
DC1 HV
B B
DIS_PX_Muxless
1129 SB
<Core Design>
A A
Wistron Corporation
1D8V_S0_NV = IFPA_IOVDD & IFPB_IOVDD, it
Title
should be the latest ramp up rail.
DISCRETE VGA POWER
Custom
BAD50-HC -1
5 4 3 2 1
1bios.ru
5 4 3 2 1
LVDS 3D3V_S0
18,95,103 DGPU_SELECT#
1
C9401 C9403 C9402
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
3D3V_S0 RN9408
17 LVDSA_DATA0 1 4 LVDSA_DATA0_R 49
2
17 LVDSA_DATA0# 2 3 LVDSA_DATA0_R# 49
LVDS_PX
LVDS_PX
LVDS_PX
SRN0J-6-GP
U9401
49
50
51
52
53
54
55
56
57
ST3DV520EQTR-1-GP LVDS_UMA
GND
VDD
GND
GND
VDD
GND
NC#51
NC#52
SEL2
RN9409
1 17 LVDSA_DATA1 1 4 LVDSA_DATA1_R 49
GND
84 GPU_LVDSA_TX0 48 2 LVDSA_DATA0_R 49 17 LVDSA_DATA1# 2 3 LVDSA_DATA1_R# 49
D A0 A D
84 GPU_LVDSA_TX0# 47 B0 B 3 LVDSA_DATA0_R# 49
17 LVDSA_DATA0 46 4 3D3V_S0 SRN0J-6-GP
A1 VDD
17 LVDSA_DATA0# 45 B1 NC#5 5
44 GND GND 6 LVDS_UMA
84 GPU_LVDSA_TX1 43 C0 C 7 LVDSA_DATA1_R 49
84 GPU_LVDSA_TX1# 42 D0 D 8 LVDSA_DATA1_R# 49
17 LVDSA_DATA1 41 C1 GND 9
17 LVDSA_DATA1# 40 D1 VDD 10 3D3V_S0
39 11 LVDSA_DATA2_R 49 RN9410
GND E
3D3V_S0 38 12 LVDSA_DATA2_R# 49 17 LVDSA_CLK# 4 5 LVDSA_CLK_R# 49
VDD F
84 GPU_LVDSA_TX2 37 13 17 LVDSA_CLK 3 6 LVDSA_CLK_R 49
E0 GND
84 GPU_LVDSA_TX2# 36 F0 G 14 LVDSA_CLK_R 49 17 LVDSA_DATA2# 2 7 LVDSA_DATA2_R# 49
17 LVDSA_DATA2 35
E1 LVDS_PX H
15 LVDSA_CLK_R# 49 17 LVDSA_DATA2 1 8 LVDSA_DATA2_R 49
17 LVDSA_DATA2# 34 16
F1 GND SRN0J-7-GP
33
GND SEL1
17 DGPU_SELECT# 18,95,103 LVDS_UMA
84 GPU_LVDSA_TXC 32 18 3D3V_S0
G0 VDD
84 GPU_LVDSA_TXC# 31 19 LVDS_DDC_DATA 49
H0 DDC1
17 LVDSA_CLK 30 20 LVDS_DDC_CLK 49
G1 DDC2
DDC2_1
DDC1_1
DDC2_0
DDC1_0
17 LVDSA_CLK# 29 H1
GND
GND
GND
VDD
28
27
26
25
24
23
22
21
3D3V_S0
17 LVDS_DDC_CLK_R
C 17 LVDS_DDC_DATA_R C
86 GPU_LVDS_CLK 3D3V_S0
86 GPU_LVDS_DATA
1
2
SRN2K2J-1-GP
RN9403
SEL->L(X=nX0),H(X=nX1)
4
3
RN9407
SEL1 Control A~H 17 LVDS_DDC_CLK_R 3 2 LVDS_DDC_CLK 49
17 LVDS_DDC_DATA_R 4 1 LVDS_DDC_DATA 49
SEL2 Control DDC1,DDC2 SRN0J-6-GP
LVDS_UMA
Panel BL brightness Power En BL En

3D3V_S0 3D3V_S0
LVDS_PX U9406
R9406 LVDS_PXU9405
B B
TP9401 1 BRIGHTNESS 1 2
0R2J-2-GP DY LVDS_PXU9407 3D3V_S0 3 4 PANEL_BLEN
LCDVDD_EN 86 VGA_BLEN B0 A
3 4 2 5
86 VGA_LCDVDD_EN B0 A GND VCC
1
2 5 1 6
GND VCC 17 L_BKLT_EN B1 S
86 VGA_LBKLT_CTL 1 R9407 2LBKLT_CTL_R 3 B0 A 4 LBKLT_CTL
17 LVDS_VDD_EN 1 B1 S 6 R9408
1
SC100P50V2JN-3GP
0R2J-2-GP LVDS_PX 2 5 100KR2J-1-GP

GND VCC R9411 NC7SB3157P6X-1GP
17 L_BKLT_CTRL 1 B1 S 6
1
C9407 NC7SB3157P6X-1GP 100KR2J-1-GP 73.03157.C0H
2
73.03157.C0H DY
NC7SB3157P6X-1GP
2
2
73.03157.C0H
18 DGPU_PWM_SELECT# 1 R9414 2 dGPU_SELECT#_PWM
0R2J-2-GP
DY
18,95,103 DGPU_SELECT# 1 R9415 2

0R2J-2-GP
LVDS_PX
Panel BL brightness/Power En/BL En
9/26 swap
RN9412
A
5 4 A
6 3 PANEL_BLEN 27
17 L_BKLT_EN
7 2
1bios.ru
17 L_BKLT_CTRL LBKLT_CTL 49 <Core Design>
17 LVDS_VDD_EN 8 1 LCDVDD_EN 49
SRN0J-7-GP
UMA Wistron Corporation
Title
LVDS_Switch
Custom
BAD50-HC -1
5 4 3 2 1
5 4 3 2 1
CRT DDCDATA & DDCCLK
VDD :
Recommend to use 6 caps (0.1u + 5*10nF) close to our chips
3D3V_S0
D D
SCD1U10V2KX-5GP
SCD01U16V2KX-3GP
SCD01U16V2KX-3GP
SCD01U16V2KX-3GP
3D3V_S0
1
C9501
C9503
C9504
C9505
PX
PX
2
PX PX
28
29
30
31
32
33
SCD1U10V2KX-5GP
SCD01U16V2KX-3GP
SCD01U16V2KX-3GP
SCD01U16V2KX-3GP
U9501
1
C9502
C9507
C5613
C9506
SEL2
GND
VDD
GND
VDD
GND
27,29,51,104,106 BD_IN#
2
27 1 CRT_RED_R
86 VGA_CRT_RED 0B1 A0 CRT_GREEN_R
33
32
31
30
29
28
17 CRT_RED 26 0B2 A1 2
25 3 U9502
86 VGA_CRT_GREEN 1B1 GND
24 4
SEL2
GND
VDD
GND
VDD
GND
17 CRT_GREEN 1B2 VDD 3D3V_S0
3D3V_S0 23 5 CRT_BLUE_R
VDD A2 CRT_HSYNC_CON
86 VGA_CRT_BLUE 22 2B1 A3 6
21 PX 7 CRT_VSYNC_CON CRT_RED_R 1 27
17 CRT_BLUE 2B2 A4 A0 0B1 CRT_RED_R_DOCK 104
86 VGA_CRT_HSYNC 20 8 DGPU_SELECT# 18,94,103 CRT_GREEN_R 2 26
3B1 SEL1 A1 0B2 CRT_RED_R_MB 50
17 CRT_HSYNC 19 9 DDCDATA 3 25
3B2 A5 GND 1B1 CRT_GREEN_R_DOCK 104
86 VGA_CRT_VSYNC 18 10 DDCCLK 3D3V_S0 4 24
4B1 A6 VDD 1B2 CRT_GREEN_R_MB 50
17 CRT_VSYNC 17 11 CRT_BLUE_R 5 23 3D3V_S0
4B2 GND CRT_HSYNC_CON A2 VDD
6 A3 2B1 22 CRT_BLUE_R_DOCK 104
CRT_VSYNC_CON 7 21
VDD
A4 2B2 CRT_BLUE_R_MB 50
6B2
6B1
5B2
5B1
27,29,51,104,106 BD_IN# 8 20 CRT_HSYNC_CON_DOCK_C
DDCDATA SEL1 3B1 CRT_HSYNC_CON_MB_C
9 A5 3B2 19
PI3V712-AZLEX-GP DDCCLK 10 18 CRT_VSYNC_CON_DOCK_C
16
15
14
13
12
A6 4B1 CRT_VSYNC_CON_MB_C
11 GND 4B2 17
73.03712.B03
VDD
5B1
5B2
6B1
6B2
C C
2nd = 73.07000.003 73.03712.B03
3D3V_S0 PI3V712-AZLEX-GP 2nd = 73.07000.003
12
13
14
15
16
17 CRT_DDC_CLK
86 VGA_CRT_DDCCLK
SEL->L(An=nB1),H(An=nB2)
17 CRT_DDC_DATA
86 VGA_CRT_DDCDATA
SEL1 Control A0~A4 3D3V_S0
SEL2 Control A5~A6 DDCCLK_MB 50

DDCCLK_DOCK 104
DDCDATA_MB 50
DDCDATA_DOCK 104
5V_S0
RN9506 U9503A
14
1
2 3 CRT_VSYNC_CON
17 CRT_VSYNC
1 4 CRT_HSYNC_CON R9504
17 CRT_HSYNC
CRT_HSYNC_CON_DOCK_C 2 3 CRT_HSYNC_CON_DOCK_R 1 2 CRT_HSYNC_CON_DOCK 104
SRN0J-6-GP
UMA 4D99R2F-GP
TC74VHCT125AFTQK2M-GP
7
RN9502
1 8
2 7 CRT_RED_R
17 CRT_RED CRT_GREEN_R 5V_S0
17 CRT_GREEN 3 6
4 5 CRT_BLUE_R
B 17 CRT_BLUE B
SRN0J-7-GP
UMA U9503B
14
RN9503 R9506
2 3 DDCCLK CRT_HSYNC_CON_MB_C 5 6 CRT_HSYNC_CON_MB_R 1 2
17 CRT_DDC_CLK CRT_HSYNC_CON_MB 50
1 4 DDCDATA
17 CRT_DDC_DATA
10R2J-2-GP
SRN0J-6-GP TC74VHCT125AFTQK2M-GP
7
UMA
5V_S0
U9503C
14
10
R9505
CRT_VSYNC_CON_DOCK_C 9 8 CRT_VSYNC_CON_DOCK_R 1 2 CRT_VSYNC_CON_DOCK 104
4D99R2F-GP
7
5V_S0
A <Core Design> A
1bios.ru
U9503D
14
13
Wistron Corporation
CRT_VSYNC_CON_MB_C 12 11 CRT_VSYNC_CON_MB_R 1 R9507 2 Taipei Hsien 221, Taiwan, R.O.C.
CRT_VSYNC_CON_MB 50
10R2J-2-GP
Title
CRT_Switch
7

A3
BAD50-HC -1
5 4 3 2 1
5 4 3 2 1
SSID = SDIO
D D
C C
B B
A A
1bios.ru
<Core Design>
Wistron Corporation
Title
TOUCH PANEL
A2
BAD50-HC -1
5 4 3 2 1
5 4 3 2 1
Check test point

3D3V_S0 1 AFTP1
3D3V_AUX_S5 1 AFTP7
3D3V_S5 1 AFTP8
HT10X10B10X10R28-GP
HT10X10B10X10R28-GP
HT10X10B10X10R28-GP
HT10X10B10X10R28-GP
HT10X10B10X10R28-GP
HT10X10B10X10R28-GP
HT10X10B10X10R28-GP
HT10X10B10X10R28-GP
D 5V_S5 1 AFTP9 D
H1 H2 H4 H5 H6 H7 H8 H19
1 AFTP10
1D5V_PWR 19,27 PM_PWRBTN#
5,22,36 H_CPUPWRGD 1 AFTP11
1
FC9735
1
SC68P50V2JN-1GP
1 AFTP12
27,36,107 S5_ENABLE
2
DEL Spring -1 0213 For RF -1 0217 5,18,27,31,32,36,65,66,71,75,82,83,105 PLT_RST# 1 AFTP13
1D5V_S0
AD+_TO_SYS Test Point擺放Dimm Door打打打打打打
DCBATOUT
1D5V_S3
SCD1U25V3KX-GP
-1_0314
EC9717
5V_S0 5V_CHARGER
SCD1U25V3KX-GP
SCD1U25V3KX-GP
EC9720
EC9721
H3 H9 H11
1
HOLE335R115-GP HOLE335R115-GP HOLE315R95-GP EC9701 EC9702
1
FC9730 FC9732 FC9716 FC9717 FC9718 FC9720 FC9734 FC9733 FC9719
1
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
2
1
2
SC47P50V2JN-3GP
DY DY
2
SC68P50V2JN-1GP
SCD1U25V3KX-GP
SC68P50V2JN-1GP
SCD1U25V3KX-GP
SC68P50V2JN-1GP
SC68P50V2JN-1GP
SC68P50V2JN-1GP
SC68P50V2JN-1GP
1
2
DY DY
DY DY DY
1
DY EC9725 EC9726
SCD1U10V2KX-4GP SCD1U10V2KX-4GP
2
C C
For RF -1 0217
DCBATOUT
EMI request 1215 SB
1215 SB RF request RF request
SCD1U25V3KX-GP
SCD1U25V3KX-GP
SCD1U25V3KX-GP
SCD1U25V3KX-GP
EC9727
EC9728
EC9729
EC9730
SCD1U25V3KX-GP
SCD1U25V3KX-GP
SCD1U25V3KX-GP
SCD1U25V3KX-GP
SCD1U25V3KX-GP
SC1KP50V2KX-1GP
SC1KP50V2KX-1GP
SCD1U25V3KX-GP
SC1KP50V2KX-1GP
SC1KP50V2KX-1GP
EC9713
EC9709
EC9716
EC9724
FC9712
SCD1U25V3KX-GP
FC9713
FC9714
FC9715
FC9721
SCD1U25V3KX-GP
FC9722
FC9723
FC9724
FC9731
SCD1U25V3KX-GP
EC9712
SCD1U25V3KX-GP
1
1
H17 H18
1
FC9725 FC9726 FC9727 FC9728 FC9729 EC9711 EC9710 EC9714 EC9715
2
2
STF217R113H115-GP STF217R113H115-GP
34.4Y824.001 34.4Y824.001 DY DY DY DY
2
SC68P50V2JN-1GP
SC68P50V2JN-1GP
SC68P50V2JN-1GP
SC68P50V2JN-1GP
SC68P50V2JN-1GP
SC68P50V2JN-1GP
SC68P50V2JN-1GP
SC68P50V2JN-1GP
SC68P50V2JN-1GP
2nd = 34.4Y824.101 2nd = 34.4Y824.101 DY
1
DCBATOUT
SCD1U25V3KX-GP
EC9718
STF237R128H42-1-GP
STF237R128H42-1-GP
STF237R128H42-1-GP
H12 H13 H14

1
B B
PWR_DCBATOUT_1D05V PWR_DCBATOUT_1D5V 3D3V_MINI1_S0 3D3V_MINI2_S0 1D5V_S0
2
3D3V_S0 AD_DOCK BATA+

1
SCD1U25V3KX-GP
SCD1U25V3KX-GP
SCD1U25V3KX-GP
SCD1U25V3KX-GP
SCD1U25V3KX-GP
SCD1U25V3KX-GP
SCD1U25V3KX-GP
DY
FC9703
FC9704
FC9711
FC9707
FC9708
FC9709
FC9710
SCD1U25V3KX-GP
SCD1U25V3KX-GP
SCD1U25V3KX-GP
34.4GD01.001 34.4GD01.001 34.4GD01.001
EC9719
EC9722
EC9723
2nd = 34.4GD01.301 2nd = 34.4GD01.301 2nd = 34.4GD01.301
1
1
2
2
STF237R128H42-1-GP
STF237R128H42-1-GP
H15 H16
DY DY DY DY DY DY DY DY
-1 0214 EMI
1
34.4GD01.001 34.4GD01.001
2nd = 34.4GD01.301 2nd = 34.4GD01.301
ADD 2ND source 0306-1

A <Core Design> A
Wistron Corporation
Title
UNUSED PARTS/EMI Capacitors

Custom
-1
1bios.ru
Thursday, March 29, 2012
BAD50-HC
5 4 3 2 1
5 4 3 2 1
Power Sequence
PU4601 PU4501 U4801
PM_SLP_S4# 1D5V_S3 RUNPWROK 1D05V_S0 1.05VTT_PWRGD 0D85V_S0 0D85V_S0
D 1D5V_S3 D
1D05V_VTT ALL_POWER_OK
0D75V_EN
0D75V_S0
PLT_RST#
U? U? U?
U?
ALL_POWER_OK EC S0_PWR_GOOD PCH PM_DRAM_PWRGD AND GATE VDDPWRGOOD CPU H_CPU_SVIDCLK
C C
ALL_POWER_OK
H_CPUPWRGD
U?
VCC_GFXCORE
CPU_CORE
SYS_PWROK
VCC_CORE
H_CPU_SVIDCLK U?
B IMVP_PWRGD AND GATE B
S0_PWR_GOOD
A <Core Design> A
1bios.ru
Wistron Corporation
Title
Change History
A3
BAD50-HC -1
5 4 3 2 1
5 4 3 2 1
Intel-Power Up Sequence
(AC mode) red word: KBC GPIO
(DC mode) red word: KBC GPIO
+RTC_VCC
+RTC_VCC T1
T1
PCH_RTCRST#
PCH_RTCRST#
+PWR_SRC
+PWR_SRC T2
T2
+3.3V_RTC_LDO
+3.3V_RTC_LDO
T3 KBC GPIO36 control
D Press Power button D
S5_ENABLE KBC_PWRBTN_EC# KBC_PWRBTN_EC# GPIO3
T4
+5V_ALW EC_ENABLE# (GPIO51) keep low
T5 T3
+KBC_PWR
+3.3V_ALW T4 KBC GPIO36 control
T6
S5_ENABLE
+5VALW_PCH_VCC5REFSUS T5
+5V_ALW
T6 +5V_ALW & +3.3V_ALW need meet 0.7V difference
+15V_ALW T7
T8 TPS51125 to KBC GPIO46 +3.3V_ALW
T7 +5V_ALW & +3.3V_ALW need meet 0.7V difference
3V_5V_POK
PCH to KBC GPI94 +5VALW_PCH_VCC5REFSUS
SUS_PWR_DN_ACK T9
KBC GPIO43 to PCH +15V_ALW T8
T10 T9 TPS51125 to KBC GPIO46
PCH_RSMRST#(EC Delay 40ms) >10ms
T11 PCH to KBC GPIO00 3V_5V_POK
T10 KBC GPO84 to PCH
PCH_SUSCLK_KBC
PM_PWRBTN#
AC_PRESENT_EC T12 <200ms PCH to KBC GPI94
SUS_PWR_DN_ACK T11
KBC GPIO43 to PCH
PCH_RSMRST# T12 >10ms
T13 PCH to KBC GPIO01
Press Power button
PCH_SUSCLK_KBC
AC KBC_PWRBTN_EC# KBC_PWRBTN_EC# GPIO3
3V_5V_POK
T13 KBC GPO84 to PCH DC PCH_RSMRST#
AC PM_PWRBTN# T14
PM_SLP_S4#
AC PM_PWRBTN# T15
T14 PM_SLP_S3# >30us
T16 KBC GPO16 to LAN
PM_LAN_ENABLE
PM_SLP_S4# T17
T15
+3.3V_LAN
PM_SLP_S3# >30us
C
T16 KBC GPO16 to LAN C
+1.5V_SUS T18
PM_LAN_ENABLE
T17
+V_DDR_REF(0.9V) T19
+3.3V_LAN +5V_RUN & +3.3V_RUN need meet 0.7V difference
+5V_RUN T20
+1.5V_SUS T18
+3.3V_RUN T21
+V_DDR_REF(0.9V) T19 T22
+5V_RUN & +3.3V_RUN need meet 0.7V difference
+5VS_PCH_VCC5REF
+5V_RUN T20
+1.5V_RUN T23 H_PWRGD
+3.3V_RUN T21 T25 >1ms
T22
+1.8V_RUN T24
+5VS_PCH_VCC5REF KBC GPIO71 to RT8208B
GFX_CORE_EN(Discrete only) T26
+1.5V_RUN T23 H_PWRGD
T25 >1ms T27
+VGA_CORE(Discrete only)
+1.8V_RUN T24 T28 KBC GPIO30 to APL5930
KBC GPIO71 to RT8208B 1.0V_RUN_VGA_EN(Discrete only)
GFX_CORE_EN(Discrete only)------Delay 5ms T26
T29
T27 +1.0V_RUN_VGA(Discrete only)
+VGA_CORE(Discrete only) T30 KBC GPIO66 to APL5930
T28 KBC GPIO30 to APL5930 1.8V_VGA_RUN_EN(Discrete only)
1.0V_RUN_VGA_EN(Discrete only)------Delay 4ms
T31
T29 +1.8V_RUN_VGA(Discrete only)
+1.0V_RUN_VGA(Discrete only) T32 KBC GPI95
T30 KBC GPIO66 to APL5930 +3.3V_RUN_VGA_EN(Discrete only)-->DY reserved
1.8V_VGA_RUN_EN(Discrete only)------Delay 5ms T33
T31 +3.3V_RUN_VGA(Discrete only) -->Reserved for sequence
+1.8V_RUN_VGA(Discrete only)
T32 KBC GPI95
+3.3V_RUN_VGA_EN(Discrete only)-->DY reserved RUNPWROK T34
T33
T35
+3.3V_RUN_VGA(Discrete only) -->Reserved for sequence +1.05V_VTT
T36 TPS51218 to KBC GPI34
1.5CPU_1.05VTT_PWRGD(after delay 1ms GPI96-VDDPWRGOOD_EC output for s3 reduction)
RUNPWROK T34
T37
T35 +0.75V_DDR_VTT
+1.05V_VTT
B
T36 TPS51218 to KBC GPI34 H_VTTPWRGD T38 B
1.5CPU_1.05VTT_PWRGD(after delay 1ms GPI96-VDDPWRGOOD_EC output for s3 reduction)

T37
+0.75V_DDR_VTT
H_VTTPWRGD T38
+1.05V_VTT
T39
CPU to TPS51611
GFX_VR_EN(UMA only)
+1.05V_VTT UMA GFX CORE Power
T39 T40
CPU to TPS51611 +CPU_GFX_CORE(UMA only)
GFX_VR_EN(UMA only)
T40 UMA GFX CORE Power
+CPU_GFX_CORE(UMA only)
1.5CPU_1.05VTT_PWRGD
T41 ( >99ms )
KBC GPO53 to ISL62883
IMVP_VR_ON
1.5CPU_1.05VTT_PWRGD T42
T41 ( >99ms ) CPU CORE Power
KBC GPO53 to ISL62883 +VCC_CORE <3ms
IMVP_VR_ON
T42 CLK_CPU_BCLK
CPU CORE Power CLKIN_BCLK(from CK505) stable
+VCC_CORE <3ms
43 >1ms ISL62883 to CLOCKGEN
CLK_CPU_BCLK
CLKIN_BCLK(from CK505) stable CK_PWRGD
ISL62884 to KBC GPO14
T44 >1ms
43 >1ms ISL62883 to CLOCKGEN IMVP_PWRGD T45
CK_PWRGD 1.5CPU_1.05VTT_PWRGD Delay 10ms
ISL62884 to KBC GPO14 T46 >5ms
T44 >1ms
IMVP_PWRGD T45 KBC GPIO47 to PCH
1.5CPU_1.05VTT_PWRGD Delay 10ms PM_PWROK 3ms< T47 <20ms
T46 >5ms
T48 >1ms
KBC GPIO47 to PCH +1.5V_RUN_CPU T49 >100ns
PM_PWROK 3ms< T47 <20ms PM_DRAM_PWRGD (for S3 Reduction)
T48 >1ms
+1.5V_RUN_CPU T49 >100ns
H_VTTPWRGD
A
PM_DRAM_PWRGD (for S3 Reduction) T50 >1ms A
PM_PWROK
H_VTTPWRGD T51 >1ms
1bios.ru
T50 >1ms
+VCC_CORE
PM_PWROK 0.05ms< T52 <650ms
T51 >1ms
H_PWRGD
T53 KBC LRESET#
+VCC_CORE
0.05ms< T52 <650ms PLT_RST# >1ms
T54 KBC GPIO45
H_PWRGD <Core Design>
T53 KBC LRESET# PLTRST_DELAY#
T55
PLT_RST# >1ms Wistron Corporation
T54 KBC GPIO45 H_CPURST#
PLTRST_DELAY# Taipei Hsien 221, Taiwan, R.O.C.
T55 Title
H_CPURST# Power Sequence
A1
BAD50-HC -1
5 4 3 2 1
5 4 3 2 1
1D5V_VGA_S0 SIR460DP
VT1312M VGA_CORE For Discrete
D D
DCBATOUT RT8207L
Adapter
ISL95831HRTZ TPS51218D TPS51461

AO4407A DDR_VREF_S3 0D75V_S0 1D5V_S3
Charger
BQ24707 VCC_CORE VCC_GFXCORE 1D05V_PWR 0D85V_S0
+AD For UMA For Discrete
AO4468
Battery
1D05V_VTT 1D05V_LAN QM3006S 1D05V_VGA_S0
RT8239 1D5V_S0
C 3D3V_AUX_S5
3D3V_S5 C
5V_AUX_S5 5V_S5
+KBC_PWR
AP2101MPG AP2101MPG TPS2540ARTER AO4468
AO4468
APW7153BQBI For Discrete
5V_USB1_S3 5V_USB2_S3 5V_USB0_S5 5V_S0
3D3V_S0 DMP2130L 3D3V_VGA_S0
USB Power USB Power USB Charge Power 1D8V_S0

RTS5209
G9091
A03400A G5285T11U-GP
3D3V_CARD_S0
B
3D3V_DAC_S0 B
1D8V_VGA_S0 LCDVDD
SB Don't need
Power Shape
Regulator LDO Switch
<Core Design>
A A
Wistron Corporation
1bios.ru
Title
Power Block Diagram

A3
BAD50-HC -1
5 4 3 2 1
A B C D E
PCH SMBus Block Diagram

3D3V_S5 3D3V_S0 KBC SMBus Block Diagram
3D3V_S0 5V_S0
SRN2K2J-1-GP
SRN2K2J-1-GP ‧
‧
DIMM 1
SMBCLK SMB_CLK ‧ ‧PCH_SMBCLK SCL
1
SMBDATA SMB_DATA ‧ ‧ PCH_SMBDATA SDA
SRN10KJ-5-GP
1
SRN33J-5-GP
2N7002SPT PSDAT1 TPDATA
‧ TP_DATA
TPDATA
TouchPad Conn.
PSCLK1 TPCLK
‧ TP_CLK TPCLK
DIMM 2
0R2J-2-GP ‧PCH_SMBCLK SCL 3D3V_AUX_KBC
‧ SML1_CLK_G
SCLK
G-Sensor ‧ PCH_SMBDATA SDA
3D3V_S5 ‧ SML1_DATA_G
SDATA
‧
0R2J-2-GP
SML1_CLK_NEW
SML1_DATA_NEW
SCLK
SDATA
NEW-Card Minicard SRN4K7J-10-GP
SRN2K2J-1-GP
DY
SRN0J-6-GP PCH_SMBCLK
W-WAN BAT1 CONN
SML0CLK ‧ SML0_CLK SML1_CLK_R Intel LAN
SCLK
SMB_CLK SRN100J-3-GP
82579
PCH_SMBDATA
SMB_DATA
GPIO17/SCL1 ‧ ‧BAT_SCL BATA_SCL_1 CLK_SMB
SML0DATA ‧ SML0_DATA SML1_DATA_R SDATA SMBus address:16
3D3V_S5
GPIO22/SDA1 ‧ ‧
BAT_SDA BATA_SDA_1 DAT_SMB
SCL2 BAT2
KBC PS8122Q eDP PS8321Q USBCN2 VGA THERM
SDA2 CONN BQ24707
SRN2K2J-1-GP
3D3V_AUX_S5 SCL
SML1CLK ‧ ‧ ‧ ‧ ‧ ‧ ‧
KBC SDA SMBus address:12
SML1DATA ‧ switch ‧ ‧ ‧ ‧ ‧ ‧ NPCE885 SRN2K2J-1-GP PCH

3D3V_S0
2 2
PCH SRN2K2J-1-GP
GPIO73/SCL2 ‧ SML1_CLK_C ‧ SCL eDP
UMA_PX_Muxless GPIO74/SDA2 ‧ SML1_DATA_C ‧ switch SDA
SMBus address:XX
3D3V_AUX_KBC
SDVO_CTRLCLK ‧PCH_HDMI_CLK
SMBus address:0X32
SDVO_CTRLDATA ‧PCH_HDMI_DATA
3D3V_S0 ‧
SCL
‧ NCT5606Y
SDA
SRN4K7J-10-GP
SRN2K2J-1-GP
SRN0J-6-GP
GPIO23/SCL3 ‧ SMB2_CLK ‧ SCL
NCT5606Y
L_DDC_CLK ‧
LVDS_DDC_CLK_R
GPIO31/SDA3 ‧ SMB2_DATA ‧ SDA
L_DDC_DATA ‧
LVDS_DDC_DATA_R
3D3V_S0
LVDS_UMA SMBus address:0X30
SRN4K7J-8-GP
EDP
3D3V_VGA_S0 SRN0J-6-GP
EDP_DDC_CLK
CRT_DDC_CLK ‧
CRT_DDC_CLK ‧ EDP_DDC_DATA
CRT_DDC_DATA ‧
CRT_DDC_DATA
SRN2K2J-1-GP
3 3
SRN0J-6-GP
I2CC_SCL GPU_LVDS_CLK ‧ ST3DV5 ‧ LVDS_DDC_CLK ‧LVDS_EDP_CLK CLK
I2CC_SDA GPU_LVDS_DATA ‧ 20EQTR ‧ LVDS_DDC_DATA ‧ LVDS_EDP_DATA DATA LCD CONN

LVDS_PX LVDS
3D3V_VGA_S0 SRN0J-6-GP
‧ ‧
DDCCLK PI3V712 DDCCLK_DOCK
SRN4K7J-8-GP ‧ ‧
DDCDATA
-AZLEX DDCDATA_DOCK
Docking
DIS_PX 5V_S0
UMA
I2CA_SCL
‧
VGA_CRT_DDCCLK PI3V712 DDCCLK
‧
I2CA_SDA
‧
VGA_CRT_DDCDATA
-AZLEX DDCDATA
3D3V_S0
SRN10KJ-6-GP
PX
‧
VGA DDCDATA_MB ‧CRT_DDCDATA_CON

CRT CONN
DDCCLK_MB ‧ CRT_DDCCLK_CON
5V_S0
3D3V_VGA_S0
2N7002DW-1-GP
‧
‧
4 SRN2K2J-1-GP 4
SRN1K5J-GP
SRN0J-6-GP
1bios.ru
IFPC_AUX_I2CW_SCL ‧
GPU_DDCP_SCL PS8321Q OUT_AUXP_SCL TMDS_SCL_B PS8122Q ‧ TMDS_SCL
IFPC_AUX_I2CW_SDA# ‧
GPU_DDCP_SDA
FN56GTR OUT_AUXN_SDA TMDS_SDA_B
FAN48G ‧ TMDS_SDA HDMI CONN <Core Design>
Wistron Corporation
Title
SMBUS Block Diagram

A2
BAD50-HC -1
A B C D Date: Friday, March 02, 2012 E Sheet 101 of 109
A B C D E
Thermal Block Diagram Audio Block Diagram

1 1
RIGHT-/RIGHT+ AUD_SPK_R
PAGE28 DXP P2800_DXP LEFT-/LEFT+ AUD_SPK_L SPEAKER

PMBS3904-1-GP
SC470P50V2JN-GP
DXN P2800_DXN
UMA Place near CPU
Thermal PWM CORE
NCT7718W PORTA_L MB_HP_L
HP
PORTA_R MB_HP_R
PAGE27 GPIO73
SML1_CLK_C
SML1_DATA_C Switch
TMDS_SCL_A
TMDS_SDA_A
SCL
SDA
T8 OUT
2
KBC GPIO74
T_CRIT# THERM_SYS_SHDN#
2N7002
D
PURE_HW_SHUTDOWN#
EN 3V/5V 2
NPCE885 S
G
IMVP_PWRGD PGOD
VR
Put under CPU(T8 HW shutdown)
Codec
SMBC_THERM_NV
I2CS_SCL
CX20584 PORTC_L MB_MICIN_L MIC
GPIO66 GPIO56 SMBD_THERM_NV I2CS_SDA PAGE86
PORTC_R MB_MICIN_R
IN
FAN_TACH1
FAN1_PWM
VGA
Thermal
SBK160808T-601Y
5V SRN33J-5-GP-U
DOCK
TACH
3 3
FAN
PORTE_L DOCK_LINEIN_L
PORTE-R DOCK_LINEIN_R
Docking
4 <Core Design> 4
1bios.ru
Wistron Corporation
Title
Thermal/Audio Block Diagram

Custom
BAD50-HC -1
A B C D E
5 4 3 2 1
3D3V_S0
SCD1U10V2KX-5GP
SC1000P50V3JN-GP-U
C10315 1 2 SCD1U10V2KX-4GP DP_DATA1_R#
SCD1U10V2KX-5GP
4 eDP_TXN1_CPU
SC1000P50V3JN-GP-U
4 eDP_TXP1_CPU C10314 1 2SCD1U10V2KX-4GP DP_DATA1_R
4 eDP_TXN0_CPU C10313 1 2 SCD1U10V2KX-4GP
UMA_EDP DP_DATA0_R#
1
4 eDP_TXP0_CPU C10316 1 2 SCD1U10V2KX-4GP
UMA_EDP DP_DATA0_R
C10308
C10309
C10307
C10310
UMA_EDP
D UMA_EDP D
2
9/5
PX_EDP PX_EDP PX_EDP
PX_EDP
4 eDP_AUXN_CPU C10311 1 2 SCD1U10V2KX-4GP DP_AUX#

4 eDP_AUXP_CPU C10312 1 2 SCD1U10V2KX-4GP DP_AUX
UMA_EDP
29
20
16
12
UMA_EDP
9
3
U10302
VDD
VDD
VDD
VDD
VDD
VDD
84 GPU_eDP_DATA0 31 1 DP_TXP0_SW C10301 1 2 SCD1U10V2KX-4GP DP_DATA0_R 49
D0+A D0+ DP_TXN0_SW C10302 1
9/20 84 GPU_eDP_DATA0# 30 D0-A D0- 2 2 SCD1U10V2KX-4GP DP_DATA0_R# 49
PX_EDP
84 GPU_eDP_DATA1 27 4 DP_TXP1_SW C10303 1 PX_EDP
2 SCD1U10V2KX-4GP DP_DATA1_R 49
D1+A D1+ DP_TXN1_SW C10304 1
84 GPU_eDP_DATA1# 26 D1-A D1- 5 2 SCD1U10V2KX-4GP DP_DATA1_R# 49
PX_EDP
4 eDP_HPD_R 2 1 DBC_EN_C 49 84 GPU_eDP_AUX 19 6 DP_AUX_SW C10305 1 2 SCD1U10V2KX-4GP
PX_EDP DP_AUX 49
0R2J-2-GP R10301 AUX+A AUX+ DP_AUX_SW # C10306 1
84 GPU_eDP_AUX# 18 AUX-A AUX- 7 2 SCD1U10V2KX-4GP DP_AUX# 49
1209 SB UMA_EDP PX_EDP PX_EDP
84 GPU_eDP_HPD 17 HPD_A HPD 8 PX_EDP DBC_EN_C 49
4 eDP_TXP0_CPU 25 D0+B
4 eDP_TXN0_CPU 24 D0-B SEL 10
AUX_SEL 32 DGPU_SELECT# 18,94,95
4 eDP_TXP1_CPU 23 D1+B HPD_SEL 11
C 22 C
4 eDP_TXN1_CPU D1-B
4 eDP_AUXP_CPU 15 AUX+B
4 eDP_AUXN_CPU 14 AUX-B L--->Port A
GND
GND
GND
4 eDP_HPD_R 13 HPD_B H--->Port B
PI3VEDP212ZLE-1-GP
21
28
33
0209 -1 71.03212.003
B B
1117 SB
<Core Design>
A A
Wistron Corporation
1bios.ru
Title
Switch GFX DP
A3
BAD50-HC -1
5 4 3 2 1
5 4 3 2 1
AD_DOCK
DOCK1
145
160 153
147
146 148 AD_DOCK

D D
27,29,51,95,106 BD_IN# 2 1
161
4 3 USB30_TXP4 18
18 USB_PP3 6 5 USB30_TXN4 18
18 USB_PN3 8 7
NP1
10 9 USB30_RXP4 18
12 11 USB30_RXN4 18
14 13
16 15
18 17
20 19
22 21
24 23 TMDS_TX2+_DOCK 51
51 TMDS_TX1+_DOCK 26 25 TMDS_TX2-_DOCK 51
51 TMDS_TX1-_DOCK 28 27
30 29 TMDS_TX0+_DOCK 51
51 TMDS_TXC+_DOCK 32 31 TMDS_TX0-_DOCK 51
51 TMDS_TXC-_DOCK 34 33
36 35
51 DOCK_SDA 38 37 DOCK_SCL 51
5V_HDMI_S0 40 39
42 41
27 BD_AC_IN# 44 43 95 CRT_RED_R_DOCK 2 L10401 1 R_DOCK_R
27 BD_HDMI_IN 46 45 Dock 0R3J-0-U-GP
27 BD_PW NBTN# 48 47 95 CRT_GREEN_R_DOCK 2 L10402 1 R_DOCK_G
50 49 Dock 0R3J-0-U-GP
95 CRT_BLUE_R_DOCK 2 L10403 1 R_DOCK_B
C Dock 0R3J-0-U-GP C
1
159 154 ECH401 ECH402 ECH403 C10401 C10402 C10403
SC18P50V2JN-1-GP
SC18P50V2JN-1-GP
SC18P50V2JN-1-GP
162
SC12P50V2JN-3GP
SC12P50V2JN-3GP
SC12P50V2JN-3GP
2
2
52 51
27 BD_DVI_IN 54 53 BAT_SDA 27,39,40
27 BD_PW R_LED 56 55 BAT_SCL 27,39,40
27 BD_USB_CHARGER_EN# 58 57 DY DY DY
27 BD_USB_Power_EN 60 59
52 DOCK_DP_DATA1 64 63 DOCK_DP_DATA0# 52
52 DOCK_DP_DATA1# 66 65
68 67 DOCK_DP_DATA3 52 DY DY DY
52 DOCK_DP_DATA2 70 69 DOCK_DP_DATA3# 52
52 DOCK_DP_DATA2# 72 71
74 73 BD_DP_IN 27,52
52 DOCK_DP_AUX 76 75
52 DOCK_DP_AUX# 78 77
80 79
82 81
R_DOCK_R 84 83 CRT_HSYNC_CON_DOCK 95
86 85 CRT_VSYNC_CON_DOCK 95
R_DOCK_G 88 87 DDCDATA_DOCK 95 DY
90 89 DDCCLK_DOCK 95
R_DOCK_B 92 91 0R2J-2-GP
1 2 R10404 0R2J-2-GP
1 2 R10405
94 93
Dock
158 155
B B
163
96 95 DOCK_GND AUD_AGND DOCK_GND
58 DOCK_MIC_JD# 98 97 DOCK_GND
29 DOCK_SPDIF 100 99 DOCK_LINEIN_L 29
58 DOCK_LINEOUT_JD# 102 101 DOCK_LINEIN_R 29
29 DOCK_LINEIN_JD# 104 103 DOCK_GND
106 105 DOCK_LINEOUT_L 29
108 107 DOCK_LINEOUT_R 29
110 109 DOCK_GND
112 111 DOCK_MIC_IN_L 29
114 113 DOCK_MIC_IN_R 29
116 115 DOCK_GND
118 117
120 119
122 121
106 MDI2+_DOCK 124 123
106 MDI2-_DOCK 126 125 MDI0+_DOCK 106
128 Dock 127 MDI0-_DOCK 106
106 MDI3+_DOCK 130 129
106 MDI3-_DOCK 132 131 MDI1+_DOCK 106
134 133 MDI1-_DOCK 106
136 135
106 LAN_ACT_LED#_DOCK 138 137 10M/100M/1G_LED#_DOCK 106
3D3V_M 140 139
142 141
144 143 BD_IN# 27,29,51,95,106
AD_DOCK NP2 <Core Design>
A 164 A
151 149 AD_DOCK
Wistron Corporation
1bios.ru
150
157 156 Taipei Hsien 221, Taiwan, R.O.C.
152 Title
JAE-CONN144D-1-GP-U BOTTOM DOCKING

A3
20.F1496.144 BAD50-HC -1
5 4 3 2 1
5 4 3 2 1
12/5 SB
R10510 U10501
0R2J-2-GP
20,31 PCIE_CLK_INTEL_LAN_REQ# iAMT
1 2PCIE_INTEL_CLK_REQ#
48 CLK_REQ# MDI_PLUS0 13 LAN_MDI0P_INTEL 106
5,18,27,31,32,36,65,66,71,75,82,83,97 PLT_RST# 36 PE_RST# MDI_MINUS0 14 LAN_MDI0N_INTEL 106
SRN0J-6-GP
D 20,31 CLK_PCIE_INTEL_LAN 1 4 CLK_PCIE_INTEL 44 17 D
20,31 CLK_PCIE_INTEL_LAN# 2 iAMT 3 CLK_PCIE_INTEL# 45 PE_CLKP MDI_PLUS1
18
LAN_MDI1P_INTEL 106
PCIE
PE_CLKN MDI_MINUS1 LAN_MDI1N_INTEL 106
MDI
C105161 RNH503
2 SCD1U10V2KX-5GP PCIE_RXDP6 38 20
20,31 PCIE_RXP6 PETP MDI_PLUS2 LAN_MDI2P_INTEL 106
20,31 PCIE_RXN6 1 2 SCD1U10V2KX-5GP PCIE_RXDN6 39 PETN MDI_MINUS2 21 LAN_MDI2N_INTEL 106
C10505
iAMT 1 RNH502 SRN0J-6-GP
4 PCIE_TXP6_INTEL
41 23
20,31 PCIE_TXP6 iAMT 2 PERP MDI_PLUS3 LAN_MDI3P_INTEL 106
20,31 PCIE_TXN6 3 PCIE_TXN6_INTEL
42 24
iAMT PERN MDI_MINUS3 LAN_MDI3N_INTEL 106
SRN0J-6-GP TPH503 3D3V_M 3D3V_M
1 4 SML0_CLK_R 28 6 RSVD_NC 1 TPAD14-OP-GP
20 SML0_CLK iAMT SMB_CLK RSVD_NC#6
SMBUS
2 3 SML0_DATA_R 31 R10502iAMT
20 SML0_DATA SMB_DATA
1 RSVD_VCC3P3_1 1 24K7R2F-GP
RNH501 RSVD_VCC3P3 RSVD_VCC3P3
RSVD_VCC3P3 2 1 R10503 2iAMT
5 4K7R2F-GP
VDD3P3_IN C10513 C10511
22 LAN_DIS# 3 LAN_DISABLE#
SCD1U10V2KX-5GP
SCD22U10V2KX-1GP
4 C10512 C10510 C10502
VDD3P3_OUT
1
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
1
1
15 VDD3P3
VDD3P3 1D05V_LAN
106 LAN_ACT_LED#_INTEL 26 19 iAMT
2
LED0 VDD3P3
106 10M/100M/1G_LED#_INTEL 27 29 iAMT iAMT
2
LED1 VDD3P3
LED
25 LED2
47 C10503 C10504 iAMT
VDD1P0
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
VDD1P0 46 iAMT
1
TPAD14-OP-GP
TPH501
T PH501 1 LAN_JTAG_TDI 32 37
LAN_DIS# 3D3V_M TPAD14-OP-GP
TPH502
T PH502 LAN_JTAG_TDO JTAG_TDI VDD1P0 1D05V_LAN
1 34 JTAG_TDO
JTAG
R105072 DY 10KR2J-3-GP
1 LAN_JTAG_TMS 33 43 C10506
2
JTAG_TMS VDD1P0
1
1
SCD1U10V2KX-5GP
R105082 10KR2J-3-GP
1 LAN_JTAG_TCK 35
C C10509 JTAG_TCK C
DY DY VDD1P0 11
1D05V_LAN iAMT iAMT iAMT
SCD1U10V2KX-5GP
2
2
LANXOUT_R 9 40
LANXIN_R XTAL_OUT VDD1P0
10 XTAL_IN VDD1P0 22
VDD1P0 16
8 1D05V_LAN
TEST_EN VDD1P0
2 1 30 TEST_EN R10504
1KR2J-1-GP R10501 IND-4D7UH-192-GP
1 2 RBIAS 12 7 CTRL_1P0 L105011 2 CTRL_1P0_L 1 2
3KR2F-GP iAMT R10509 RBIAS CTRL_1P0
DY
SC10U6D3V5KX-1GP
1
49 68.4R750.20CC10501
iAMT VSS_EPAD
DY
0R0603-PAD
82579LM-GP
2
1st = 71.82579.K03
iAMT
9/20 C10518
LANXOUT_R 1 2
B B
IAMT
SC18P50V2JN-1-GP
2
82.30020.D11 X10501
2nd = 82.30020.I01 XTAL-25MHZ-149-GP
IAMT
1
C10507
LANXIN_R 1 2
SC18P50V2JN-1-GP
IAMT
<Core Design>
A A
Wistron Corporation
1bios.ru
Title
LAN INTEL 82579

A3
BAD50-HC -1
5 4 3 2 1
5 4 3 2 1
D D
LAN switch
RNH601
SRN0J-7-GP
3D3V_S5
1 8 LAN_MDI3N
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
105 LAN_MDI3N_INTEL
105 LAN_MDI3P_INTEL 2 7 LAN_MDI3P
105 LAN_MDI2N_INTEL 3 6 LAN_MDI2N
105 LAN_MDI2P_INTEL 4 5 LAN_MDI2P
iAMT
1
RNH602
SRN0J-7-GP
LAN_MDI1N
DY
105 LAN_MDI1N_INTEL 1 8
2
105 LAN_MDI1P_INTEL 2 7 LAN_MDI1P C10608
C10607
C10604
C10602
C10601
C10603
LAN_MDI0N
14
21
30
39
105 LAN_MDI0N_INTEL 3 6
1
4
8
5
105 LAN_MDI0P_INTEL 4 5 LAN_MDI0P U10601
VDD
VDD
VDD
VDD
VDD
VDD
VDD
LP
iAMT
LAN_MDI0P 2 38 MDI0+_SYS 59
RNH603 LAN_MDI0N A A0
3 B B0 37 MDI0-_SYS 59
SRN0J-7-GP LAN_MDI1P 6 34
C C0 MDI1+_SYS 59
31 LAN_MDI3P_BCM 1 8 LAN_MDI3P LAN_MDI1N 7 33 MDI1-_SYS 59
LAN_MDI3N LAN_MDI2P D D0
31 LAN_MDI3N_BCM 2 7 9 E E0 29 MDI2+_SYS 59
C
31 LAN_MDI2N_BCM 3 6 LAN_MDI2N LAN_MDI2N 10 28 MDI2-_SYS 59
C
LAN_MDI2P LAN_MDI3P F F0
31 LAN_MDI2P_BCM 4 5 11 G G0 25 MDI3+_SYS 59
LAN_MDI3N 12 24 MDI3-_SYS 59
H H0
BCM R10601
A1 36 MDI0+_DOCK 104
3D3V_S5 1 2 DOCK_IN_LAN 13 35 MDI0-_DOCK 104
RNH604 10KR2J-3-GP SEL B1
C1 32 MDI1+_DOCK 104
SRN0J-7-GP 31
D1 MDI1-_DOCK 104
31 LAN_MDI1P_BCM 1 8 LAN_MDI1P LAN_ACT_LED# 15 27 MDI2+_DOCK 104
LAN_MDI1N 10M/100M/1G_LED# LED1 E1
31 LAN_MDI1N_BCM 2 7 2N7002K-2-GP 16 LED2 F1 26 MDI2-_DOCK 104
31 LAN_MDI0N_BCM 3 6 LAN_MDI0N 42 23 MDI3+_DOCK 104
LAN_MDI0P LED3 G1
31 LAN_MDI0P_BCM 4 5 27,29,51,95,104 BD_IN# G H1 22 MDI3-_DOCK 104
LED1_0
LED2_0
LED3_0
LED1_1
LED2_1
LED3_1
D
GND
BCM STMUX1800EQTR-GP
S
-1 0317 84.2N702.J31
17
18
41
19
20
40
43
Q10601 73.01800.A03
2nd = 84.07002.I31
2nd = 73.03720.003
iAMT
59 LAN_ACT_LED#_SYS
4 1 LAN_ACT_LED# 59 10M/100M/1G_LED#_SYS
105 LAN_ACT_LED#_INTEL 10M/100M/1G_LED#
105 10M/100M/1G_LED#_INTEL 3 2
104 LAN_ACT_LED#_DOCK
SRN0J-6-GP 104 10M/100M/1G_LED#_DOCK Function SEL
RNH605
RNH606
to X0 L SYSTEM
B SRN0J-6-GP B
to X1 H DOCK
3 2 LAN_ACT_LED#
31 LAN_ACT_LED#_BCM 10M/100M/1G_LED#
31 10M/100M/1G_LED#_BCM 4 1
BCM
A <Core Design> A
1bios.ru
Wistron Corporation
Title
LAN SWITCH
A3
BAD50-HC -1
5 4 3 2 1
5 4 3 2 1
Q10701
AO4468-GP
5V_S5 5V_CHARGER RUN_ENABLE2
84.04468.037 5V_CHARGER
2nd = 84.08882.037 U10702
S D 27,36,97 S5_ENABLE G5938TL1U-GP
C10702
DY 1
S D
8
2 7 74.05938.09P
1 2 3 S D 6
D RUN_ENABLE2 4 G D 5 5V_S5 D
SCD1U25V3KX-GP 6 1
EN VCC
5 DC2 GND 2
4 DC1 HV 3
1
C10703 DY
SCD01U50V2KX-1GP
2
5V_S5
Support 2A
U10703 5V_USB2_S3
C at least 80 mil C
at least 80 mil 1 GND GND 9
2 IN#2 NC#8 8
3 IN#3 OUT#7 7
27,57 USB_PWR_EN# 4 EN# OUT#6 6
1
C10701 C10704 5
FLG
1
C10706
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
C10705 TC10707 TC10708
SCD1U10V2KX-4GP
2
AP2301MPG-13-GP SC1U10V2KX-1GP ST100U6D3VAM-3-GP ST100U6D3VAM-3-GP
2
74.02301.071
2ND = 74.02000.B71 80.10715.B1L 80.10715.B1L
3RD = 74.06288.A79 2nd = 77.C1071.22L 2nd = 77.C1071.22L
change to one switch 0210
B B
<Core Design>
Wistron Corporation
A 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, A
1bios.ru
Title
USB charger
A4
BAD50-HC -1
5 4 3 2 1
D D
C C
B B
A <Core Design> A
1bios.ru
Wistron Corporation
Title
USB2 HUB AU6256

-1
BAD50-HC
Date: W ednesday, February 22, 2012 Sheet 108 of 109
5 4 3 2 1
5 4 3 2 1
I2C mode
To USB BD
D D
C C
B B
<Core Design>
A

Title
USB30 re-driver
B
BAD50-HC -1
1bios.ru
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5 4 3 2 1

DY :None Installed ANNIE: ONLY FOR ANNIE solution.

(Discrete/UMA/co-lay) Project Code: 91.4UP01.001 SYSTEM DC/DC

HDA INPUTS OUTPUTS

Internal digital MIC HDA LPC debug port

This signal has a weak internal pull-down.

USB Table SMBus ADDRESSES

1 USB port 2 Device Address Bus

PCI EXPRESS* - GRAPHICS

UMA_PX_EDP <Core Design>

100KR2J-1-GP UMA_PX_EDP Taipei Hsien 221, Taiwan, R.O.C.

SSID = CPU CPU1B 2 OF 9

JTAG & BPM

DDR SYSTEM MEMORY B

DDR SYSTEM MEMORY A

CFG[6:5] 11: x16 - Device 1 functions 1 and 2 disabled RSVD#T8 T8

AJ26 RSVD#AJ26 RSVD_NCTF#AR35 AR35

E23 RSVD#E23 RSVD_NCTF#B35 B35

R704 1 D23 RSVD#D23 RSVD_NCTF#C35 C35

J15 RSVD#J15 RSVD_NCTF#AT2 AT2

PEG AND DDR

AA33 VCC43 VCCIO40 J23

VAXG Output Decoupling Recommendation: R906,R907 close to CPU

4 x 22 uF at Top Socket Edge

DDR3 -1.5V RAILS

A6 C22 VCCSA_VID0 R911

AT35 VSS1 VSS81 AJ22

JE40 delete XDP function

Tracew should be at least 20 mils wide M_A_DQ32 129 106

M_A_DQ34 141 112

M_A_DQ53 166 38 Layout Note:

M_A_DQ58 DQ57 VSS

M_B_DQ47 M_B_DQ41 149 148 M_B_DQ45

M_B_DQ48 C1515 C1517 151 150

M_B_DQ50 155 154 M_B_DQS5

M_B_DQS#0 185 184

M_B_DQS#3 M_B_DQ58 191 190

M_B_DQS0 R1501 203 202

M_B_DQS1 C1501 10KR2J-3-GP 204 0D75V_S0

Digital Display Interface

AH49 BA47 DDCP_DATA2#

95 CRT_BLUE N48 CRT_BLUE DDPD_CTRLCLK M43

9/3 B21 TP21 RSVD23 AV5

82 USB30_RXP3 BF32 USB3RP3

EC1803 EC1802 EC1801 PANTHER-GP-NF

OC[3:0]# for Device 29 (Ports 0-7)

SSID = PCH 4 DMI_RXN[3:0]

4 DMI_RXN0 BC24 DMI0RXN FDI_RXN0 BJ14 FDI_TXN0 4

System Power Management

27 SUS_PW R_ACK K16 SUSWARN#/SUSPWRDNACK/GPIO30 SLP_S3# F4 PM_SLP_S3# 27,29,36,37,47,75,82

BATLOW # E10 AP14

PM_RI# A10 K14 PM_SLP_LAN# 27,36,45

A R1921 2 1 10KR2J-3-GP PCIE_W AKE# <Core Design> A

3V_5V_POK_# 5 2 1KR2J-1-GP 21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,

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