IEEE TRANSACTIONS ON VEHICULAR TECHNOLOGY, VOL. 69, NO.

7, JULY 2020 7131

A Comprehensive Analysis for High-Power Density,

High-Efficiency 60 kW Interleaved Boost Converter
Design for Electrified Powertrains
Jing Guo , Member, IEEE, Romina Rodriguez , Member, IEEE, Jacob Gareau , Dave Schumacher,
Maryam Alizadeh , Peter Azer , Student Member, IEEE, Jennifer Bauman , Member, IEEE,
Berker Bilgin , Senior Member, IEEE, and Ali Emadi , Fellow, IEEE

Abstract—High-power boost converters offer significant benefits

to hybrid and electric vehicles, because higher-voltage propulsion
power equates to lower motor losses. However, the converters
themselves must have high efficiency and high power density in
order to make the system-level trade-off beneficial. Thus, this paper
presents an optimized design process of high power multi-phase
interleaved bidirectional boost converters. In order to achieve a fast
and accurate analysis and design, a generalized method is devel-
oped for the calculations of required phase inductance and output
capacitance. In addition, a genetic algorithm (GA) optimization
method is implemented for the inductor design. Using the proposed
design process, a 3-phase 60 kW interleaved converter is designed
and tested using paralleled SiC MOSFETS. The converter achieves
peak efficiency of 99.2% at 10 kW and is > 98% efficiency from 5%
to 100% load. The resulting power density is 9.4 kW/L, which can be
further improved to 12.2 kW/L with alternate terminal connectors.
Index Terms—DC-DC power converter, electrified powertrain,
inductor design, interleaved converter.
I. INTRODUCTION
HE combustion of fossil fuels in the transportation sector
T is responsible for approximately 1/4 of the greenhouse gas
emissions generated in Canada [1] and the U.S. [2] as well as
local air pollution, which causes negative health effects in urban
areas [3]. It is well known that vehicles with electrified power-
trains, such as hybrid electric vehicles (HEVs), battery-electric
vehicles (BEVs), and plug-in hybrid electric vehicles (PHEVs),
can greatly reduce these greenhouse and regulated emissions [4].
Manuscript received October 11, 2019; revised January 4, 2020 and March 22,
2020; accepted April 19, 2020. Date of publication April 30, 2020; date of current
version July 16, 2020. This work was supported in part by the Canada Excellence
Research Chairs (CERC) and the Natural Sciences and Engineering Research
Council of Canada (NSERC) and in part by FCA US LLC / FCA Canada Inc. The
review of this article was coordinated by Dr. B. Akin. (Corresponding author:
Jennifer Bauman.)
Jing Guo is with the BorgWarner Inc - Waterloo Technical Center, Kitchener,
ON N2G 4X8, Canada (e-mail: jinguo@borgwarner.com).
Romina Rodriguez, Jacob Gareau, Maryam Alizadeh, Peter Azer, Jen-
nifer Bauman, Berker Bilgin, and Ali Emadi are with the Department
of Electrical and Computer Engineering, McMaster University, Hamilton,
ON L8S 4L8, Canada (e-mail: romina@mcmaster.ca; gareajj@mcmaster.ca;
alizadem@mcmaster.ca; eliap@mcmaster.ca; jennifer.bauman@mcmaster.ca;
bilginb@mcmaster.ca; emadi@mcmaster.ca).
Dave Schumacher is with the Enphase Energy, Austin, TX 78758 USA (e-
mail: dschumach3r@gmail.com).
Digital Object Identifier 10.1109/TVT.2020.2991395
0018-9545 © 2020 IEEE. Personal use is permitted, but republication/redistribution requires IEEE permission.
See https://www.ieee.org/publications/rights/index.html for more information.
Fig. 1. Electrical architecture.
Power electronic converters are crucial components within elec-
trified powertrains and automakers are continually striving to
increase the efficiency, increase the power density, and decrease
the cost of these converters. Most electrified powertrains con-
tain inverters for motor control, on-board chargers for charging
plug-in vehicles, and high-to-low voltage DC-DC converters for
connecting the auxiliary 12 V bus to the high-voltage battery [1]–
[5]. Some vehicles also use a high-voltage DC-DC converter to
boost propulsion power to higher voltages. There are two main
reasons to use such a converter in an electrified powertrain: (i)
to interface two different DC power sources (generally required
in fuel cell hybrid vehicles), (ii) to boost battery voltage with the
goals of increasing efficiency in the cables, inverter, and motor,
and decrease the mass and volume of these components due to
the lower current rating required for a higher voltage propulsion
system.
The Toyota Mirai is a fuel cell hybrid vehicle that uses a
DC-DC boost converter to boost the high-voltage battery voltage
and a second DC-DC boost converter to boost the fuel cell
voltage [6]. The use of these converters allows the motor to
operate at a high voltage for high efficiency, while the battery
pack and fuel cell stack can consist of fewer cells in series. The
Toyota Hybrid System II, which is used in many Toyota hybrid
vehicles, most notably the Prius, also uses a boost converter to
increase the battery voltage so the motor can operate at higher,
more efficient voltages [7]. The Prius and other Toyota hybrids
can boost the battery voltage, which ranges from 200 to 300 V,
to 650 V at the input of the motor inverter [8]. Fig. 1 shows the
high-voltage electrical architectures of the Toyota Mirai and the
Toyota Prius, including their high-power boost converters.

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7132
Despite the advantages Toyota has realized by using a high-
power boost converter, many other commercial HEVs, PHEVs,
and BEVs do not currently use such converters. The disad-
vantages of using a high-power boost converter in an elec-
trified powertrain include: additional cost, mass, volume, and
losses, which must be carefully weighed with the advantages
of a higher-voltage system. Thus, the use of a boost converter
must confer system-level benefits, such as the ability to use a
smaller, lower-voltage battery pack in an HEV, or efficiency
gains that outweigh the additional boost converter losses in a
BEV. Therefore, advancements that reduce the cost, size, and
losses of high-power boost converters can help shape the future
of electrified powertrain design, so that more vehicles can realize
the advantages of high-voltage propulsion power.
DC-DC converters using wide-bandgap semiconductors such
as silicon carbide (SiC) have been shown to have higher power
density and higher efficiency than their silicon-based counter-
parts [9], [10] due to the higher allowable switching frequencies.
Currently, large SiC modules with current ratings up to 300 A
are available; however, smaller discrete SiC devices allow for
a lower-volume design, have lower stray inductance and are
available with current ratings under 100A [11]. These discrete
devices can be connected in parallel [12], [13] if the circuit
layout minimizes loop inductance and has symmetry between
devices to equalize heating of each switch and minimize switch
losses [13].
To further increase power density, multiple phases of the
boost circuit can be interleaved, with phase-shifted control,
to increase the effective switching frequency and thus reduce
passive component size. The interleaved topologies have two
main advantages over the single-phase topologies. Firstly, the
interleaved converters have higher efficiency range compared to
the single-phase converters which only provide high efficiency
at the rated output power. Secondly, the input current ripple is
reduced due to the phase shift between phase currents, which
in turn reduces the passive filter at the input side (reducing
volume). Some prior work has focused on how to optimize the
number of interleaved phases. For example, [14] optimized the
number of phases in a unidirectional 600 W boost converter with
the goal of minimizing the input current ripple and the output
voltage ripple for a fixed switching frequency. Furthermore, [15]
optimized the number of phases for a 42/14 V 500 W buck
converter with a fixed switching frequency to minimize losses.
In this work, an optimization method is presented to maximize
efficiency for a 60 kW converter with varying duty cycle, varying
switching frequency, SiC devices, and low input current ripple
requirements.
The power density benefits of interleaving are clear: in [10], a
10 kW three-phase interleaved boost converter using one SiC
MOSFET and diode per phase is built for PV applications.
The switching frequency is set to 47 kHz and the resulting
power density is 2.67 kW/L. Reference [16] presents a 60 kW,
4-phase interleaved SiC-based air-cooled boost converter along
with a PV inverter, with a total power density of 1.65 kW/L
(the power density of the boost converter alone is not reported).
The fuel cell boost converter in the Toyota Mirai is a 4-phase
interleaved unidirectional circuit using silicon-based IGBTs and
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IEEE TRANSACTIONS ON VEHICULAR TECHNOLOGY, VOL. 69, NO. 7, JULY 2020
TABLE I
BOOST CONVERTER DESIGN SPECIFICATIONS
liquid cooling [6]. Toyota uses phase drive control to maximize
converter efficiency by operating the optimum number of phases
according to the power flow at any given instant [6]. If this
boost converter is assumed to have the same power rating as
the fuel cell (114 kW), the reported 13 L volume [17] equates
to a power density of 8.77 kW/L. Mitsubishi has demonstrated
a high power density of 26.5 kW/L in a 2-phase interleaved
65 kW boost converter using SiC [18], though the cold plate
is not included in this measurement, and the inductor current
ripple is extremely large, meaning the inductor current is close
to discontinuous and the inductance can be small. Reference [19]
provides the theoretical design of a 12-phase interleaved 100 kW
bidirectional boost converter with power density of 25 kW/L,
but does not discuss the inductor current ripple requirements
and does not provide experimental results of the converter.
This paper presents a comprehensive design procedure for a
60 kW interleaved SiC-based synchronous bidirectional boost
converter with liquid-cooling for automotive applications. The
specific contributions include: (1) a methodology for utilizing
genetic algorithm (GA) optimization method in inductor design
for a given winding type and core material, and (2) a useful
and comprehensive design process to maximize efficiency and
minimize volume for a 60 kW automotive interleaved boost con-
verter. Design guides for selecting inductor and capacitor sizes
in multi-phase interleaved converters across various switching
frequencies, mechanical design, thermal design and testing, and
control methods are also included. Using the design process, the
high power testing results show a peak efficiency of 99.2% and
an achievable power density of 12.2 kW/L.
The design process is explained in detail in Section II. Sec-
tion III describes the control algorithm for the converter used in
laboratory testing. In order to verify the analysis for the design
process, Section IV provides comprehensive experimental re-
sults and discussions. Finally, the conclusions are summarized
in Section V.
II. DESIGN PROCESS
A. Design Specifications
The converter design specifications are shown in Table I.
The target application is a hybrid vehicle with a configuration
as shown in Fig. 2. As the DC link voltage of an inverter is
defined based on motor specifications, the 320 V maximum
output voltage is defined from the motor requirements. Com-
pared to the Toyota Prius, the DC/DC converter in this paper has
been specifically designed for a hybrid vehicle with a smaller
GUO et al.: COMPREHENSIVE ANALYSIS 7133

Fig. 2. Three-phase interleaved bidirectional synchronous boost converter

circuit for HEV application.

battery pack (with voltage varying from 140 V to 258 V) and a
lower-voltage inverter (nominal 320 V). In applications such
as these, the cost savings from using a smaller battery and
lower-voltage-rated motor and inverter can assist in achieving
system-wide cost optimization. The example in Fig. 2 is a
3-phase interleaved converter, an important aspect of the design
process is to determine the volume and efficiency for different
phase numbers and switching frequencies. The converter oper-
ates in boost mode during vehicle propulsion and in buck mode
during regenerative braking and battery charging. The goal is to
achieve the maximum efficiency, while considering the cost and
system complexity. A synchronous circuit design is chosen to
help reach the targeted high efficiency (> 97%) of the converter.
B. Passive Component Sizing
The first step in the converter design is to select the passive
components that will satisfy the requirements of input current
ripple and output voltage ripple. The number of phases is not
yet selected at this point, therefore generalized equations are
used such that these parameters can be solved for based on the
number of phases, n.
The expression for the input current ripple in a single-phase
boost converter is the same as the inductor current ripple as
shown in (1) and (2) [20]. These expressions are equivalent to
each other based on the relationship in (3):
Vout D
ΔIin = (1 − D) (1)
Lreq fs
Vin D
ΔIin = (2)
Lreq fs
Vin = Vout (1 − D) , (3)
where Iin and Vin are the input current and input voltage,
respectively. Vout is the average output voltage, Lreq is the
required phase inductance, fs is the switching frequency, and
D is the duty cycle.
However, for an interleaved converter, the correlation between
the input current ripple and the phase current ripple is more
complex. The equation to describe the input current ripple in an
Fig. 3. Analytical calculated input current ripple, where Vout = 320 V, Lreq
= 50 µH, and fs = 50 kHz.
interleaved boost converter is derived in [21] as
 
Vout n floor(Dn) + 1
ΔIin = −D
Lreq fs n
 
floor(Dn)
× D− (4)
n
where floor is a function that rounds the value to the nearest
lower integer.
Evaluating (4) for an arbitrary chosen Lreq and fs , the input
current ripple can be calculated for various phase numbers as a
function of duty cycle, D, as shown in Fig. 3. A maximum input
current ripple is observed for each phase number and for a phase
number greater than one, discontinuties will exist when taking
the derivative of (4). It is of interest to solve for the maximum
input current ripple to determine the inductor size, therefore (4)
can be differentiated as a piecewise function where the number
of intervals is dictated by the value of D that results in a current
ripple of zero (where the discontinuity occurs). ΔIin is reduced
to zero at n+1 points when D varies from 0 to 1. The third factor
in (4) leads to these zero-ripple points for the following case:
 
floor(Dn)
D− =0 (5a)
n
floor(Dn) = Dn (5b)
At the points of zero ripple current, (5b) should be satisfied.
Dn must be an integer so that the floor function does not change
the value of the left-hand side. For example, there will always
be zero input current ripple when D = n1 . For different number
of phases n, there exists n intervals each sharing the same
maximum value that occurs halfways between the zero ripple
points. Thus, the maximum input current ripple will occur at
integer multiples of D = 2n 1
. For the purpose of design, the
maximum value of the first interval will be used because this
corresponds to the largest Vin (3) and thus the input current will
be the smallest relative to the current ripple.

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7134 IEEE TRANSACTIONS ON VEHICULAR TECHNOLOGY, VOL. 69, NO. 7, JULY 2020

Fig. 4. Calculated Lreq required to limit input current ripple to 16 A for all
operating points, where Vout = 320 V.

By setting D = 2n
1
(4) can be rearranged to solve for Lreq for
a given maximum ΔIin which results in
Vout
Lreq = . (6) Fig. 5. Phase and output currents for different number of interleaved phases
4ΔIin fs n at constant duty cycle.
and can be used to calculate the phase inductance needed to
ensure ΔIin does not exceed its maximum specification for a
ΔIL
variety of fs and n values. In this case, 5 different options for Iout,1 = (n − S) IL,max −
the number of phases (n = 2 to 6) and 6 switching frequency (1 − D) Ts
options (10, 25, 40, 50, 75, and 100 kHz) lead to 30 calculations, ⎛ ⎞
S 2 +S
A − floor 2 Ts
the results of which are shown in Fig. 4. These results represent × ⎝(n − S − 1) (t1 − DTs ) + ⎠
the minimum inductance required at any of the phase numbers n
or switching frequencies, and will be used in the later inductor (10)
design stage.
A similar process is now presented for calculating the min- ΔIL
Iout,2 = (n − S) IL,max −
imum capacitance required for various phase numbers and (1 − D) Ts
switching frequencies based on the maximum output voltage ⎛ ⎞
S 2 +S
ripple specification of ±1%. The output voltage ripple is based A − floor 2 Ts
× ⎝(n − S) (t2 − DTs ) + ⎠
on the current flowing through the output capacitor; thus, the out- n
put capacitor current is analyzed. Fig. 5 shows that the converter
output current changes along with the number of interleaved (11)
⎧
phase currents. ⎨Iout,1 , 0 ≤ t ≤ DTs − STs
n
The piecewise equations for the single-phase output current Iout = (12)
is presented in (7). ⎩I DTs − STs
≤t≤ Ts
out,2 , n n
⎧
⎨Iout,1 = 0, 0 ≤ t ≤ DTs To determine the voltage ripple, the current flowing through
⎩I = IL,max − ΔIL
(t − DTs ) , DTs ≤ t ≤ Ts the output capacitor must be found for different number of
out,2 (1−D)Ts
interleaved phases. The capacitor current will only be the AC
(7)
component of (10) and (11). Therefore, the result from (12)
According to (7), it is possible to develop a mathematical
should be shifted so that the DC component IDC,out is removed.
model for the calculations of converter output current for any ar-
Due to the zero average capacitor current, only a half period is
bitrary phase number. The output current of multiple interleaved
considered. As a result, the absolute value of the AC component
phases can be determined by phase shifting the single-phase
of Iout is added to itself; and then the negative part is canceled
waveform and adding them together as shown in Fig. 5. Then,
out, shown by (13) and (14). In this case, the results from (13)
the output current can mathematically be found using (8) to (12),
and (14) can be integrated as shown in (15); and then, the change
where A is an operator to determine the summation from 1 to
of capacitor charge is obtained and used in (16) to calculate the
n − 1; S is a real integer value from 0 to n − 1.
voltage ripple.
A = 1 + 2 + 3 + · · · (n − 1) (8)
(Iout,1 − IDC,out ) + abs (Iout,1 − IDC,out )
S = floor(Dn) (9) Inorm,1 = (13)
2

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GUO et al.: COMPREHENSIVE ANALYSIS 7135

the traditional convex methods cannot solve. Additionally, it

Fig. 6. Simulation (sim) and analytically calculated results for output voltage
ripple, where Vout = 320 V.
Fig. 7. Calculated Cout required to limit output voltage ripple to ±1% for all
operating points, where Vout = 320 V.
provides accurate results [24], [25]. Thus, this paper proposes
to use GA for optimal inductor design as there are a large
number of variables and constraints involved. The proposed
GA methodology has the following inputs: the phase inductance
calculated from Section II-B, wire type, core material, switching
frequency, and number of interleaved phases. The population
for the GA is made up of C-C type inductors, specified by
seven parameters that describe the physical dimensions of each
inductor design. The objective function to be minimized is the
inductor volume.
Fig. 8 describes the proposed GA process for minimizing
inductor volume subject to physical and thermal constraints.
The five inputs are used specify the search area. There are seven
population parameters that are varied in each generation: core
depth (D), core width (E), window width (W AW ), window
height (W AH), number of air gaps, air gap length (lg ), and
number of turns (N ). Fig. 9 shows how these seven parameters
relate to the inductor geometry. For the first generation, these
parameters are randomly generated within certain reasonable
bounds, for example, the initial core depth, D, may be between 1
and 10 cm. Each generation is defined as having 1000 population
members, which means 1000 unique inductor designs. In each
generation, important physical quantities are calculated for each
inductor geometry, such as the total flux density, in order to
determine the phase inductance of each physical design. This
must be checked for each individual in each generation to ensure
the phase inductance from GA, Lph , is greater than or equal to the
required phase inductance, Lreq . The calculations of core cross
sectional area, Ac , flux mean path length, M P L, and effective
reluctance, Req are all directly calculated from these population
parameters:
Ac = DE (17)

(Iout,2 − IDC,out ) + abs (Iout,2 − IDC,out ) M P L = (2(W AW + W AH) + πE) − lgtotal (18)
Inorm,2 = (14)
2 MPL lgtotal
Req = + (19)
DTs − ST
n
s Ts
n μr μ0 Ac Ac μ0
ΔQC = Inorm,1 dt + Inorm,2 dt
0 DTs − ST
n
s where μ0 is the permeability of vacuum, μr is the relative
(15) permeability of the material and lgtotal is the total length of
the air gap. Then, the flux density, B, is calculated as:
QC
ΔVout = (16)
C IN
B= (20)
Fig. 6 verifies the proposed calculation method with the simu- Req Ac
lated results for the output voltage ripple magnitude with respect
where I is the inductor peak current. Finally, B can be used to
to the duty cycle for the given ±1% voltage ripple specification.
determine the phase inductance:
The simulated results align well along the calculated curve, prov-
ing the accuracy of the proposed method. The calculated output Ac BN
capacitances are plotted in Fig. 7 and will be used later in the Lph = (21)
I
design process to calculate the volume and cost of the converter
with different phase numbers and switching frequencies. Each individual inductor design in the population is then
checked against the constraints and evaluated by the fitness
function. The following constraints are used in the GA to prevent
C. Inductor Design invalid designs:
Genetic algorithm (GA) is the most widely-used evolution- r The window width (W AW ) must be larger than twice
ary optimization method and it is known as a universal op- the coil wire thickness (W T ) to ensure the wires can be
timizer [22], [23]. GA can solve complicated problems that inserted in the core window,

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7136
Fig. 8. GA inductor optimization flowchart.
r The coil height (W H) must be smaller than the window
height (W AH),
r The expected rise in core temperature must be smaller than
the maximum working temperature,
r The inductance Lph must meet the required amount Lreq
at worst case operating conditions,
r The maximum flux density of the core should not exceed
the saturation value,
r The total length of air gaps must be smaller than the window
height (W AH).
The geometric constraints ensure that the inductor core ge-
ometry is properly defined such that the required windings
can fit around the columns. The electrical constraints ensure
that the design will meet the inductance requirement without
exceeding the material temperature limit or having the core
material saturate due to large magnetic flux density. In order
to estimate the core temperature, a lumped parameter thermal
network model has been developed for different numbers of air
gaps for the C-C core shape. In the optimization, the thermal
model is updated based on the core and winding dimensions.
Then the temperature rise is calculated using the estimated core
losses from the Steinmetz equation [26]:
Pcore = kf α Bac
β
V olcore
Ptotal 0.826
Trisesurf ace = 450
SA
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IEEE TRANSACTIONS ON VEHICULAR TECHNOLOGY, VOL. 69, NO. 7, JULY 2020
and the AC and DC copper losses at an ambient temperature
of 80 ◦ C (powertrain internal temperature) without considering
forced cooling [27].
The fitness function is set to be the volume of the inductor,
which is considered a rectangular prism that can enclose the
entirety of the inductor. The volume is calculated as follows,
based on the population parameters of each design:
W idth = W AW + 2E + 2W T (24a)
Height = W AH + 2E (24b)
Depth = D + 2W T (24c)
f itness f unction = V olume
= (W AH + 2E + 2W T )(W AH + 2E)(D + 2W T )
(25)
The GA will stop when the average change in the fitness
function is less than 1e-6 over 10 generations.
After each generation, several modifications are applied to
the members of the population to create the next generation. At
each generation, the members are scored according to the fitness
function (total volume). In order to proceed to the next gen-
eration, the current population is modified or evolved by three
(22) operators: (i) mutation, (ii) cross-over, and (iii) elite individuals.
Mutation is a random change in some of the seven population
(23) parameters (e.g., core depth, core width, etc.) in the member
GUO et al.: COMPREHENSIVE ANALYSIS
Fig. 9. C-C Inductor Parameters.
Fig. 10. Types of children in next GA generation.
from the previous population to ensure diversity in the next
generation. For cross-over, the population parameters from two
individuals are merged, such that some parameters values come
from one individual, and the rest come from the other individual.
Thirdly, some members of the new population are made up from
the most elite individuals of the previous populations. These
individual designs are carried forward without change to the
new generation (these are the lowest-volume individuals from
the current generation). These three operators are summarized
in Fig. 10. In this work, scattered crossover method is used
where a random binary vector is generated [28], for instance,
if we have two parents A and B, then, the gene of the child
is from Parent A or Parent B when the binary value is 1 or 0,
respectively. Additionally, adaptive feasible mutation method is
used where a child is generated that satisfies the constraints and
boundaries based on the QR algorithm [29]. Since the population
size is 1000, 50 elite individuals are allowed to pass to the next
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7137
Fig. 11. Total inductor volume comparison.
population, the remaining of the population is distributed to be
80% from crossover and 20% from mutation.
One example of the GA process is as follows: for the input
parameters of Litz wire, R-Ferrite core material, 100 kHz switch-
ing frequency, phase inductance of 11.6 uH, and 4 interleaved
phases, the boundary conditions for the design parameters were:
D = 1 to 10 cm, E = 1 to 10 cm, W AW = 1 to 6 cm, W AH =
1 to 50 cm, number of air gaps = 1 to 10, lg = 0.1 to 2 cm, and N
= 1 to 10. The boundary conditions were chosen to constrain the
search space to realistic solutions based on our experience. At
the completion of the GA process, the optimal design parameters
were found to be: D = 4.5 cm, E = 2.5 cm, W AW = 1.3 cm,
W AH = 5.2 cm, number of air gaps = 4, lg = 0.2 cm, and N
= 4, the total volume of the optimum inductor is 0.436 L.
Two different core materials have been investigated: High
Flux Silicon Iron (FeSi) core from Magnetic Inc. and DM90
Ferrite. FeSi material provides high saturation flux density and
high operating temperature, but it also has high core losses at
high switching frequencies. Ferrite core has lower saturation
flux density and lower operating temperature as compared to
FeSi core, but the core losses and cost are lower. The saturation
flux density of DM90 ferrite is 0.42 T at 120 ◦ C–130 ◦ C,
and the saturation flux density of High Flux FeSi is 1.4 T at
190 ◦ C–200 ◦ C. The parameter ‘wire type’ in Fig. 8, denotes the
selection between Litz and rectangular wires. Due to the effect
of bundling, the size of the Litz winding is larger than that of
rectangular winding. However, depending on the current profile
and frequency, the Litz bundle might have lower AC copper
losses. Therefore a tradeoff between each winding type exists.
Each member of the population generated by the GA, must
be validated against the set of constraints mentioned earlier to
ensure the design meets the requirements [27]. The GA returns a
single inductor along with its parameters. The inductor meets all
the laid out constraints and has the minimum volume compared
with all the other population members.
During the design process, the GA optimization was run
separately for FeSi and ferrite materials. Fig. 11 shows the
comparison of optimized total inductor volume for different
number of phases at different switching frequencies. In order to
simplify the comparison, results for ferrite core with Litz wire
and FeSi core with rectangular wire are shown. Optimization
results for other winding types have not been shown since they
have higher volume.
It can be observed from Fig. 11 that FeSi core inductors
increase in volume as the number of phases increases, while
7138
Fig. 12. Comprehensive efficiency comparison for different operating fre-
quency and number of interleaved phases.
ferrite decreases in volume for most conditions and slightly
increases for a few high frequency conditions. This is due to
the higher phase ripple current achieved by a higher number of
phases. As depicted in Fig. 4, for the same input current ripple,
designs with higher number of phases will have lower phase
inductance which causes higher phase current ripple (1). The
phase ripple current influences the AC flux which affects the
core loss as well as the AC winding loss. Although the average
phase current decreases as the number of phases increases, the
inductor losses are still dominated by AC current component.
FeSi inductor based configurations typically had smaller vol-
ume compared to ferrite inductor based systems, due to their
capability to operate at higher temperature. However, operating
at a higher temperature results in more power loss and results
in the converters with FeSi inductors to have lower efficiency as
seen in Fig. 12. In addition to greater efficiency, the ferrite core
also has much lower cost. Since the application is for automotive
vehicles, cost is a major factor when selecting the final design.
With FeSi, the overall reduction in size was not large enough to
justify the added cost. Therefore, ferrite core has been selected
for this application.
D. Selection of Switching Frequency and Number of Phases
To complete the comprehensive design process for different
numbers of interleaved phases and operating switching frequen-
cies, the capacitor and switch selection must first be discussed
and combined with the inductor GA results- subject to efficiency,
volume, and cost. Fig. 12 shows the bidirectional boost converter
design results in terms of switching frequency, phase number,
and efficiency.
As discussed in Section II-B, the passive component size is
directly linked with the switching frequency (6), (16). This is
further validated via Fig. 11 which shows that for a given phase
number the inductor volume is lower at higher frequencies. This
trend holds up until 75 kHz where the additional losses negate
any benefit from a lower inductance requirement. Taking in
account the losses and volume, 75 kHz has been chosen.
It can be expected that the component cost would increase as
the number of phases increases due to the increase in number of
passive components, switching devices and gate driver circuits.
As shown in Fig. 11, the volume of the ferrite core decreases with
the number of phases up to 75 kHz. However, systems with more
than 4-phases start to increase in inductor volume and they would
potentially have higher component cost. Furthermore, Fig. 12
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IEEE TRANSACTIONS ON VEHICULAR TECHNOLOGY, VOL. 69, NO. 7, JULY 2020
Fig. 13. Simulation results for cold plate surface temperature using experi-
mental boundary conditions.
shows that there is a large increase in efficiency in general when
moving from a 2-phase system to a 3-phase system, and these
efficiency gains diminish when using higher than 3 phases. Thus,
to minimize system complexity and cost while achieving high
efficiency, a 3-phase system in this case appears optimal. As a
result, taking into account volume, efficiency, cost, and system
complexity, a 3-phase 75 kHz ferrite core inductor with Litz wire
was selected.
E. Converter Thermal Design
The thermal management solution for the boost converter is
designed from the expected worst-case heat dissipation. Under
40 kW boost mode operation, the power loss is 14 W per switch
for the high side and 41 W per switch for the low side due to
the synchronous rectification. A cold plate is selected as the
cooling solution which could maintain the MOSFETs below
the critical junction temperature of 150 ◦ C at the worst-case
power dissipation. The cold plate is modeled in ANSYS Fluent
for a coolant flow rate of 9 L/min and 75 ◦ C coolant inlet, as
expected in a hybrid vehicle. The simulation results provide the
maximum MOSFET case temperature (cold plate surface) of
83 ◦ C. Therefore, the estimated junction temperature is less than
130 ◦ C, when the junction-to-case thermal impedance from the
manufacturer datasheet is used for the analysis.
The cold plate is modified to include a thermocouple (flush
with the surface) under every other MOSFET to measure the
case temperature during converter testing. The converter is
operated at 40 kW using a coolant temperature of 36 ◦ C in
the experiments. The coolant temperature could not be set to
75 ◦ C due to limitations by the testing facility. The simulation
results using the same boundary conditions as those during
testing (9 L/min, 36 ◦ C coolant inlet) are shown in Fig. 13.
The maximum case temperature acquired from the simulation
is 43.9 ◦ C. The experimental results are presented in Section IV
and are compared to the simulation. The simulation results with
different coolant temperatures are presented in Table II.
F. Mechanical Design
The main goal of the mechanical design is to minimize the
packaging volume, while maintaining high efficiency operation
with low parasitic inductances. As shown in the expanded view
GUO et al.: COMPREHENSIVE ANALYSIS 7139

TABLE II
SIMULATION RESULTS OF CASE TEMPERATURE AT 40 KW STEADY STATE

Fig. 15. The PWM counter is shown along with the inductor current and the
counter value at which each sample is triggered (red star).

TABLE III
BOOST CONVERTER DESIGN SPECIFICATIONS

generates the synchronous PWM signal for the active switch and
its complementary switching signal with a specified amount of
Fig. 14. Converter 3D model. (a) Current design. (b) Optimal design. dead band in each phase. Each phase will have nearly identical
PWMs, however they need to be phase shifted from one another
in order to cancel the current ripple. Interleaving the phases
of Fig. 14b, MOSFETs (green blocks) are mounted horizontally
has the added benefit of allowing only a single analog-to-digital
on the cold plate by bending their pins, which are soldered to the
converter (ADC). This is because the 3 inductor current samples
PCB board (yellow board) from the bottom. The inductors are
will not overlap as each sample is taken at the midpoint of the
mounted underneath the cold plate. The capacitors (grey blocks)
inductor current rising edge. This technique is known as average
are placed on the top of PCB board. The gate drivers (pink
current control (ACC).
blocks) are placed right above the MOSFETs. The designed
Average current mode control is used in this application
converter model is shown in Fig. 14a with a volume of 6.4 L
because it does not require the use of a slope regulator for duty
and the power density of 9.4 kW/L, including power devices,
cycles higher than 0.5 and also offers good noise immunity
connection bus bars between inductors and the PCB board. The
versus peak current mode control [30]. In order to achieve
power terminal blocks are mounted on the PCB. The connection
average current mode control, a current sample is taken every
bus bars are required, because the size of inductor leads, which
time the PWM period counter reaches its peak value, as shown
is defined by the inductor manufacturer, is larger than the hole
in Fig. 15. Current sensors measure the inductor currents and
diameter of the current sensors. As a result, the current sensors
provide this information to the ADC of the microcontroller.
could not be directly placed around the inductor windings to
These currents are compared to a manually set reference current
measure the inductor current.
on a PC interface since a voltage control loop is not needed for
However, the size of inductor leads could be dramatically
the lab setup. However, a single sample can be subject to noise
reduced to fit through the current sensor and then attached to the
or a slight delay in measuring which can cause small errors
PCB directly. In addition, the large size power terminal blocks
in the control. For this reason, several samples are taken and
are not necessary and could be removed to further reduce the
averaged together to account for slight measuring inaccuracies.
converter volume. Thus, the potential volume of this converter
Nevertheless, this technique alone may not eliminate sensor
could reach 4.9 L with a power density of 12.2 kW/L, as shown
noise, which can be an issue at low currents. For this reason,
in Fig. 14b.
digital filtering is also implemented on the microcontroller to
improve the signal fidelity.
III. CONTROL OF THE BOOST CONVERTER
A. Control for Experimental Prototyping Testing IV. SIMULATION AND EXPERIMENTAL RESULTS
For the prototype testing, two 60 kW bidirectional power Based on the results in Section II Part D, a three-phase, 75 kHz
supplies with programmable voltages are used. The control switching frequency converter is designed using a ferrite core
was implemented on the F28379D microcontroller from Texas inductor and litz wires. The list of components is shown in
Instruments with 3 separate PWM signals, one for each phase of Table III. The passive component values, switching frequency,
the converter. Based on the current control loop, the F28379D and heatsink described in Table III are designed based on the

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7140
TABLE IV
EXPERIMENT TESTING EQUIPMENT
Fig. 16. Testing configuration and experimental setup. (a) Testing configura-
tion. (b) Experimental setup.
Fig. 17. Cold plate and temperature measurement.
proposed methods illustrated in the paper. To verify the math-
ematical and simulation analysis, the experimental results are
shown for comparison. There are 24 SiC MOSFETs used in this
converter, including 4 SiC MOSFETs paralleled for both upper
and lower switch in each leg, meaning 8 switches per phase leg.
Table IV shows the testing equipment that is used to collect the
efficiency and waveform data.
Fig. 16 a shows the laboratory test setup diagram with the
bidirectional power supplies, where Power Supply 1 acts as the
source in boost mode, and Power supply 2 acts as the sink in
boost mode. Fig. 16b shows a picture of the test setup, including
a top view of the converter.
The MOSFET case temperature, inlet coolant temperature,
and outlet coolant temperature are measured by thermocouples
(TC) and captured by a data acquisition system (DAQ), as shown
in Fig. 17. Thermocouples TC1 to TC12 measure the case
temperatures of 12 different MOSFETs. TC1-TC6 are located
under 6 high side switches, while TC7-TC12 are for 6 lower
switches.
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IEEE TRANSACTIONS ON VEHICULAR TECHNOLOGY, VOL. 69, NO. 7, JULY 2020
Fig. 18. Converter experimental efficiency map data. (a) Boost mode. (b) Buck
mode.
A. Efficiency and Temperature Response
As per the design targets: the continuous operating power is
40 kW, the peak operating power is 60 kW for 30 seconds and
the efficiency at 10% to 100% load is higher than 97%. As a
result, the converter is tested at 40KW until thermal steady-state
is reached (over 30 min) and at 60 kW for 30 seconds. The
efficiency data are captured by the power analyzer and shown in
Fig. 18 for both boost and buck operation modes over the entire
operating range. The required design specifications are >97%
efficiency at 10% to 100% load. The results show that in boost
mode, >98% efficiency is attained from 3 kW to 60 kW (5% to
100% load) with a peak efficiency of 99.2% at 10 kW. In buck
mode, similar high efficiencies are also attained.
The thermal design is evaluated at 40 kW steady state and
60 kW for 30 seconds. First, the converter is operated at 40 kW
until the temperature reaches steady state, at which time the input
and output voltages are Vin = 140 V and Vout = 320 V. The
experimental case temperature of 12 MOSFETs and the coolant
inlet/outlet temperatures are plotted in Fig. 19 on the top and
bottom respectively. The simulation results from Section II-E
have good agreement with the experimental case temperatures
observed during testing, as shown by Fig. 13 and Fig. 19, with a
difference within 1 ◦ C, which may be due to neglecting the epoxy
between the tubes and the cold plate in the ANSYS model.
As the accuracy of the thermal analysis has been validated
above, the temperature response when the power changes from
40 kW to 60 kW can be estimated based on the experimental
GUO et al.: COMPREHENSIVE ANALYSIS
Fig. 19. 40 kW, steady state, when Vin = 140 V and Vout = 320 V.
Fig. 20. Temperature results, when Vin = 174 V and Vout = 320 V.
measurement; since the FEA simulation is time consuming. In
order to test the temperature response during 60 kW 30-second
operation, the converter should be operated at 40 kW until steady
state is reached. Then, the operating power is increased to 60 kW
and decreased back to 40 kW after 30 seconds. Limited by
the current supplying ability, the input voltage was raised to
Vin = 174 V (Vout = 320 V) to achieve lower current demand
during 60 kW testing. At around the 3040th second, the operating
power was increased from 40 kW (steady-state) and it took about
40 seconds to reach 60 kW, as shown in Fig. 20. From the
3080th second to the 3115th second, the converter was operated
at 60 kW, after which the power was reduced to 40 kW. It
can be seen in Fig. 20 that the temperature rise for 60 kW
30-second operation is about 7 ◦ C. According to the analysis
in Section II-E and Table II, considering a 7 ◦ C temperature
rise under 60 kW operation, the MOSFET maximum junction
temperature will be below 140 ◦ C and 100 ◦ C with 75 ◦ C and
36 ◦ C coolant temperature, respectively, which are below the
design requirement of 150 ◦ C MOSFET junction temperature.
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7141
Fig. 21. (a) JMAG inductor thermal simulation (b) Experimental, the worst
temperature case (inside of the window) at 30 ◦ C ambient.
It is observed that the 40 kW steady state temperature in Fig. 20
is lower than the one in Fig. 19, which is due to the higher input
voltage used in the experiment, thus lower current flows through
the devices and results in lower losses.
B. Inductor Temperature and Phase Current Ripple
The inductor design discussed in Section II-B is also verified
by experiments. The inductor volume was optimized to achieve
an operating temperature lower than the maximum temperature
of the core. To validate the operating temperature, thermocou-
ples are attached to the inductor core surface on the inside of
the window. The inside temperature is the hottest compared
with other locations on the inductor core surface. In order to
test the inductor thermal performance under steady state, the
single-phase test is implemented at 20 kW, 140 V input voltage,
and 320 V output voltage.
Due to experimental equipment limitations, a thermal cham-
ber could not be used to test the inductor under the designed
worst case ambient temperature of 80 ◦ C, as discussed in
Section II. Instead, the inductor experimental testing is com-
pleted at 30 ◦ C ambient. Although the ambient temperatures
are not the same, the temperature rise should be similar. Using
the developed lumped parameter network, a 30 ◦ C ambient
temperature gives an estimated core temperature of 80 ◦ C,
while the simulation results of 78 ◦ C from JMAG is presented
in Fig. 21(a). The experimental result of 73 ◦ C is shown by
Fig. 21(b), in which the inductor core temperature inside the
window (worst case temperature location) reaches steady state
after 3 hours; it indicates that the developed thermal models
match the experimental results.
Thus, assuming the same temperature rise of approximately
43 ◦ C, the core temperature for an 80 ◦ C ambient would be
approximately 123 ◦ C, which is less than the maximum core
temperature allowance of 130 ◦ C. This is the temperature at
which the magnetic performance of the ferrite core material
begins to degrade.
Considering the balanced structure of this three-phase DC-DC
converter, each phase carries 20 kW at peak power operating
condition. Hence, the inductor design for the phase current ripple
can be verified by the single-phase test, and the other two phases
would be under the same condition. Thus, the inductor current
7142 IEEE TRANSACTIONS ON VEHICULAR TECHNOLOGY, VOL. 69, NO. 7, JULY 2020

Fig. 22. Inductor current ripple, single-phase operation at 20 kW, Vin = 140 V, Fig. 23. Input current ripple, three-phase operation at 40 kW, Vin = 140 V,
Vout = 320 V. (a) Simulation. (b) Experiment. Vout = 320 V. (a) Simulation. (b) Experiment.

ripple is experimentally verified by single-phase operation at

20 kW. The simulated and experimental inductor current ripple
waveforms are shown in Fig. 22, which shows the experimental
results are close to the simulated results with peak-to-peak
inductor ripple at approximately 54 A.

C. Input Current Ripple

The input current ripple and output voltage ripple are analyzed
and validated under 75 kHz switching frequency and various
operating conditions. Fig. 23 shows the simulation and experi-
mental current ripple waveforms at 40 kW. The simulated phase
current ripple is close to the experimental results. However, the
input current ripple is twice as large for the simulation compared
with the experiment. This might be caused by the output capac-
itance and inductance within the bidirectional power supplies,
which were shown in Fig. 16a. The unknown components inside
them cannot be simulated and might affect the input current
ripple. The alternative solution is to remove the output-side
power supply and add a passive load.
Thus, another test was conducted using a constant 4.7 Ω,
11.8 kW resistive load and a 15 kW power supply to verify
the analysis. Fig. 24 shows the simulated and experimental input
current ripple over varying duty cycle for a constant input voltage Fig. 24. Input current ripple, three-phase operation, and 4.7 Ω constant re-
of 23 V. The resistor current is rated at 50 A and 11.8 kW, and sistive load up to 11.8 kW, Vin = 23 V. (a) Input current ripple (A). (b) Input
the power supply is rated at 15 kW and 200 A. This means that current ripple in percentage (%).

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GUO et al.: COMPREHENSIVE ANALYSIS 7143

Fig. 25. Input current ripple, three-phase operation, and 4.7 Ω constant resis- Fig. 26. Output voltage ripple, single-phase operation, and 4.7 Ω constant
tive load at 11.8 kW, Vin = 140 V, D = 40%, Vout = 223 V. (a) Simulation. resistive load at 11.8 kW, Vin = 140 V, D = 40%, Vout = 223 V. (a) Simulation.
(b) Experiment. (b) Experiment.

the input voltage can only be around 23 V to implement the test

with a wide duty cycle range.
The tests have been conducted with an input voltage of 140 V.
Due to the limitation from the resistor current rating as discussed
above, the maximum duty cycle that can be achieved is 40%.
This results in an output voltage of 223 V and the operating
power of 11.8 kW. The simulated and experimental waveforms
are shown by Fig. 25. It is observed that, the simulated current
ripple matches the experimental results.

D. Output Voltage Ripple

The output voltage ripple is also verified by resistive load
testing. During the three-phase operation, the output voltage
ripple is too low to be observed on the scope; thus, the testing
is implemented with single-phase operation. The simulated and
experimental output voltage ripple are given in Fig. 26. It shows
that the simulation analysis is well validated by the experimental
measurement.
With the resistive load, the output voltage ripple is measured.
Fig. 27 presents the experimental output voltage ripple plots
under various operating conditions. It can be seen that the
output voltage ripple is successfully limited to less than ±1% as
required. The output voltage ripple under two- and three-phase
operation reduces as power increases. Even though this testing Fig. 27. Output voltage ripples, 4.7 Ω constant resistive load up to 11.8 kW,
is done with a constant low power resistor, the output voltage V in = 140 V, D =5%–40%. (a) Output voltage (V). (b) Output voltage in
ripple will be within 1% over the entire operating range. percentage (%).

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7144
V. CONCLUSION
This paper presents a comprehensive design process for
a high efficiency boost converter. Generalized methods are
developed for calculating the minimum inductance and
capacitance required for a variety of phase numbers and
switching frequencies, which greatly simplifies the design
process. The physical design of the inductor is optimized
through the use of custom GA scripts to achieve low cost while
adhering to thermal constraints. For the given specifications, a
three-phase 75 kHz design is selected and built using paralleled
SiC MOSFETs to maximize efficiency. The analysis and
experimental verification are presented, including current and
voltage ripples, efficiency, inductor steady state temperature,
and thermal management steady state performance. In boost
mode, the converter achieves >98% efficiency from 5% to 100%
load, with a peak efficiency of 99.2% at 10 kW. The volume of
the final design is 4.9 L with a power density of 12.2 kW/L.
ACKNOWLEDGMENT
The authors are particularly grateful for the technical as-
sistance given by Mr. Sai Ravi Parasaram from FCA Power
Electronics Hardware group. The authors would also like to
thank Powersys Solutions, ANSYS, and CMC Microsystems for
their support with JMAG, FLUENT, and Solidworks software,
respectively.
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Jing Guo (Member, IEEE) received the B.S. degree
from Beijing Jiao Tong University, Beijing, China,
in 2009, the M.S. degree from the Illinois Institute of
Technology (IIT), Chicago, IL, USA, in 2012, and the
Ph.D. degree from McMaster University, Hamilton,
ON, Canada, in 2017, all in electrical engineering.
She was a Research Assistant with the Electrical
and Computer Engineering Department, IIT from
October 2012 to December 2012. From April 2017
to November 2018, she was a Postdoctoral Fellow
in the Program of the Canada Excellence Research
Chair in Hybrid Powertrain at McMaster Automotive Resource Centre (MARC),
Hamilton, ON, Canada. Currently, she is a Hardware Engineer at BorgWarner
Inc - Waterloo Technical Center. Her main research interests include power
switch modeling and power converter design, such as MOSFET/IGBT switching
transient modeling, inverter DC-link ripples estimation, the capacitor bank sizing
optimization, and bus bar design and analysis.
GUO et al.: COMPREHENSIVE ANALYSIS
Romina Rodriguez (Member, IEEE) received the
B.S. and M.S. degrees in mechanical engineering
from the University of California, Berkeley, CA,
USA and the Ph.D. degree in mechanical engineering
from McMaster University, Hamilton, ON, Canada in
2019. She was a Mechanical Engineer with the Ther-
mal Design & Analysis Group at Northrop Grumman
between 2012 and 2014 in California. She is cur-
rently a Postdoctoral Fellow at McMaster Automotive
Resource Centre (MARC). Her research interests in-
clude thermal management of power electronics and
electric machines, as well as investigating energy harvesting technologies.
Jacob Gareau received the bachelor’s degree in elec-
trical engineering from McMaster University, Hamil-
ton, ON, Canada, in 2017. Currently he is working
toward the master’s degrees in electrical engineering
from McMaster University. His master’s study is on
the isolated high frequency link DC/AC converter for
electrified transportation and PV integration. His re-
search interests include power electronics, dual active
bridge converters and control strategies.
Dave Schumacher received the B.S. and M.A.Sc
degrees in electrical engineering from McMaster Uni-
versity, Hamilton, Canada in 2014 and 2017 respec-
tively. He continued to work as a Research Engineer
at McMaster Automotive Resource Centre (MARC)
within the power electronic group. He is currently at
Enphase Energy as a Senior Power Electronic Engi-
neer. His research interests include renewable energy,
power electronics, magnetics, and system design and
simulation.
Maryam Alizadeh (Student Member, IEEE) re-
ceived the B.Sc. degree in mechanical engineer-
ing from the Amirkabir University of Technology,
Tehran, Iran, in 2016, and the M.A.Sc. degree in
mechanical engineering from McMaster University,
Hamilton, ON, Canada, in 2019. She was an Intern
as a Software Developer for design automation in
power electronics applications at Infineon Technolo-
gies, Villach, Austria in 2018. Currently, she is a
member of the Mechanical Design and Thermal Man-
agement Group at McMaster Automotive Resource
Center (MARC), Hamilton, ON, Canada. Her research interests include machine
learning, artificial intelligence application for design automation and thermal
management in power electronics, electric machines, as well as vehicle modeling
and control.
Peter Azer (Student Member, IEEE) received
the bachelor’s and master’s degrees in electrical
engineering from Ain Shams University, Cairo,
Egypt, in 2013 and 2016, respectively. He is cur-
rently working toward the Ph.D degree in elec-
trical and computer engineering with McMas-
ter University, Hamilton, ON, Canada. His ar-
eas of research include power electronics, motor
drives, switched reluctance machines (SRM), multi-
level inverters, fault-tolerant control and system
modeling.
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Jennifer Bauman (Member, IEEE) received the
B.Sc. and Ph.D. degrees in electrical engineering
from the University of Waterloo, Waterloo, Canada,
in 2004 and 2008, respectively. From 2009 to 2016,
she was the Director of Research at CrossChasm
Technologies, where she led the modeling team on a
wide variety of automotive projects. She is currently
an Assistant Professor of electrical engineering at
McMaster University, Hamilton, Canada. Dr. Bau-
man is a registered Professional Engineer and an
Associate Editor for the IEEE OPEN JOURNAL OF
POWER ELECTRONICS. Her current research interests include power electronic
converters for electrified powertrains (including wide bandgap devices), vehicle
design, modeling, and control, and EV interactions with the smart grid.
Berker Bilgin (Senior Member, IEEE) received the
Ph.D. degree in electrical engineering from the Illi-
nois Institute of Technology, Chicago, IL, USA, in
2011, and the MBA degree from DeGroote School
of Business, McMaster University, Hamilton, ON,
Canada, in 2018. He is an Assistant Professor with the
Department of Electrical and Computer Engineering
(ECE), McMaster University. He is the Co-Founder
and the Vice President of Engineering of Enedym
Inc., Hamilton, ON, Canada, which is a spin-off com-
pany of McMaster University. Enedym specializes
in electric machines, electric motor drives (EMDs), advanced controls and
software, and virtual engineering. He has authored and co-authored 86 journals
and conference papers and three book chapters. He is the Principal Inventor/Co-
Inventor of ten patents and pending patent applications. His current research
interests include electric machines, switched reluctance motor (SRM) drives,
acoustic noise and vibration analysis and reduction, and power electronics and
EMDs. He is the Lead Editor and Author of the textbook titled SRM Drives:
Fundamentals to Applications. Dr. Bilgin was the Elected General Chair of the
2016 IEEE Transportation Electrification Conference and Expo (ITEC). He also
serves as an Associate Editor for the IEEE TRANSACTIONS ON TRANSPORTATION
ELECTRIFICATION.
Ali Emadi (Fellow, IEEE) received the B.S. and
M.S. degrees in electrical engineering with highest
distinction from the Sharif University of Technology,
Tehran, Iran, in 1995 and 1997, respectively, and the
Ph.D. degree in electrical engineering from Texas
A&M University, College Station, TX, USA, in 2000.
He is the Canada Excellence Research Chair Lau-
reate at McMaster University in Hamilton, Ontario,
Canada. He is also the holder of the NSERC/FCA
Industrial Research Chair in Electrified Powertrains
and Tier I Canada Research Chair in Transportation
Electrification and Smart Mobility. Before joining McMaster University, he was
the Harris Perlstein Endowed Chair Professor of Engineering and Director of
the Electric Power and Power Electronics Center and Grainger Laboratories
at Illinois Institute of Technology in Chicago, where he established research
and teaching facilities as well as courses in power electronics, motor drives,
and vehicular power systems. He was the Founder, Chairman, and President
of Hybrid Electric Vehicle Technologies, Inc. (HEVT) a university spin-off
company of Illinois Tech. He has been the recipient of numerous awards and
recognitions. He was the Advisor for the Formula Hybrid Teams at Illinois
Tech and McMaster University, which won the GM Best Engineered Hybrid
System Award at the 2010, 2013, and 2015 competitions. He is the Principal
author/coauthor of over 450 journal and conference papers as well as several
books including Vehicular Electric Power Systems (2003), Energy Efficient
Electric Motors (2004), Uninterruptible Power Supplies and Active Filters
(2004), Modern Electric, Hybrid Electric, and Fuel Cell Vehicles (2nd ed, 2009),
and Integrated Power Electronic Converters and Digital Control (2009). He is
also the Editor of the Handbook of Automotive Power Electronics and Motor
Drives (2005) and Advanced Electric Drive Vehicles (2014). He is the Co-Editor
of the Switched Reluctance Motor Drives (2018). Dr. Emadi was the Inaugural
General Chair of the 2012 IEEE Transportation Electrification Conference and
Expo (ITEC) and has chaired several IEEE and SAE conferences in the areas of
vehicle power and propulsion. He is the founding Editor-in-Chief of the IEEE
TRANSACTIONS ON TRANSPORTATION ELECTRIFICATION.