Download as pdf or txt
Download as pdf or txt
You are on page 1of 23

MPS Digital Multiphase VR Introduce

SZ FAE Lori

Mar. 2020

rev 20180504
Outlines

• Basic terminologies

• Multiphase VR control methods

• Multiphase VR current balance

• MPS multiphase VR road map


Basic Terminologies
Phase and Rail
VR/MTP/VID/DVID/CS/APS/Loadline(droop resistor)

• VR means voltage regulator 1.9

• MTP means multiple-time programmer 1.85

• VID is same as Vref of DCDC converter 1.8

• DVID means dynamic VID

Output Voltage (V)


1.75

• CS means current sense


1.7
• APS means auto phase shedding
• Loadline(droop resistor) shows as picture 1.65

1.6

VccMAX VccMIN VID1_Loadline Min V @ I_Min (V) Max V @ I_Min (V)

1.55
0.0 20.0 40.0 60.0 80.0 100.0 120.0 140.0 160.0 180.0 200.0
Load Current (A)
Protocols: SVID/SVI2/3/OVR/PVID/AVS/PMBUS

• SVID Intel

• SVI2/3 AMD

• OVR NVidia

• PVID early Intel/POL

• AVS Arm-base IC

• PMBUS MPS and so on


Multiphase VR Control Methods
Typical Voltage Mode Digital Control

• Sophisticated pole and zero adjustment during operation


• Separated non-linear loop creates undershoot or ringback during tranisent
• Voltage mode control doesn’t guarantee cycle by cycle current sharing

Digital PID
Remote sense
 s  s 
VOSEN 1    1   PWM
G 
X1 ADC z1   z2 
DPWM
 s
VORTN s   1  
 p

Non-Linear Transient
Loop
Dual Loop COT Control

• Separated non-linear loop creates undershoot or ringback during tranisent


MPS Digital COT Control

• One fast loop takes care of both steady state and load transient
• MPS patented Technology-Simple, Fast and Fully Digital.

VID

DAC
Remote sense Digital Ramp
VOSEN set PWM
Digital
X1 Cmp
TON
VORTN
200MHz
Clock
DAC

DC Calibration
Digital COT Control – Steady State
Digital COT Control – Load Step Up
Digital COT Control – Load Step Down
Multiphase VR Current Balance
Intelli-Phase Current Sense Principle

• Zero tempco due to monolithic die current sensing

VTEMP/FLT
AGND

SYNC

PWM
VCC
BST

CS
21 20 19 18 17 16 15

VIN 1 14 VIN

SW 2

13 PGND

SW 3

12 PGND

SW 4

5 6 7 8 9 10 11

PGND

PGND

PGND

PGND

PGND

PGND

PGND
On-Die Current Sense Advantages
On-Die Current Sense Advantages
Current Balance Introduce
Current Balance Introduce

• Why dynamic current sharing for multiphase is difficult for voltage and current control
• In load step up mode, the leading phase would increase PWM on time dramatically, but
due to PWM switching cycle delay, the lagging phase supports less current
• Huge current stress on one phase during fast load step up
Load
Current

VOUT

Huge phase current


difference

COMP

IL1 IL2
Current Balance Introduce

• Reducing PWM off time to support load Load


Current
step up, while PWM on time keeps
constant VOUT

Vref

Phase
Fixed On Min off time
blanking time
• PWMs are evenly distributed to each Time

phase , so each phase carries the PWM1

average current even transient PWM2

• Inherently much better dynamic current


sharing than voltage and current control
IL1 IL2
MPS Multiphase VR Road Map
Multiphase VR Road Map
2017 2018 2019
Q1 Q2 Q3 Q4 Q1 Q2 Q3 Q4 Q1 Q2 Q3 Q4

MP2955A MP2965 MP2975 MP2972 MP2971 MP2973 Released


Intel Xeon Processor 7-ph/ 2-rail 7-ph/ 2-rail 8-ph/ 2-rail 12-ph/ 2-rail 8-ph/ 2-rail 12-ph/ 2-rail
VR13 VR13.HC VR13.HC VR13.HC VR14 VR14
Sampling
MP2949A MP2979A MP2940A MP2950A
Intel IMVP 6-ph/ 3-rail 6-ph/ 3-rail 3-ph/ 1-rail 6-ph/ 1-rail
IMVP8 IMVP8 IMVP9 IMVP9

MP2853 MP2945 MP2852 MP2855


AMD Gaming SoC 5-ph/ 2-rail 5-ph/ 2-rail 13-ph/ 2-rail 9-ph/ 2-rail
SVI2 SVI2 SVI2 SVI2

MP2853 MP2852 MP2855


AMD Server Processor 5-ph/ 2-rail 13-ph/ 2-rail 9-ph/ 2-rail
SVI2 SVI2 SVI2

MP2888A MP2886A MP2884A MP2988


Nvidia GPU 10-ph/ 1-rail 6-ph/ 1-rail 4-ph/ 1-rail 3-ph/ 1-rail
OVR4+ OVR4+ OVR4+ OVR3i

MP2965 MP2975 MP2978 MP2972 MP2852 MP2926 MP2882


AI Processor 7-ph/ 2-rail 8-ph/ 2-rail 5-ph/ 2-rail 12-ph/ 2-rail 13-ph/ 2-rail 6-ph/ 3-rail 16-ph/ 2-rail
AVS AVS AVS AVS AVS AVS AVS
Thank you

You might also like