MICRO-PROCESSOR SYSTEMS DIPLOMA IN ELECTRICAL AND ELECTRONICS

ENGINEERING

(POWER OPTION)

MODULE III

TRAINER: MUTUA SHEDRACK

MICRO-PROCESSOR SYSTEM (INTEL 8085)

Introduction

A computer is defined as a machine that is capable of taking in raw data (input) and
processing it into more meaningful output (information) under definite instructions (programs)
and stores the results for future use. Therefore, a computer has four basic operations or
functions:

➢ Accepting input (data)

➢ Processing data
➢ Output information (data)
➢ Storage data

Definition of Terms in Computers

1. Data:
A collection of unorganized facts including words, symbols, numbers, images, sounds etc
with little or no meaning.
2. Data Processing:
The manipulation of data to give information by arithmetic (addition, subtraction,
multiplication, division etc) or logical operations (=, , , , etc.)
3. Programs:
These are the step by step instructions used by the computer in data processing.
4. Information:
The finished product of data processing that has meaning and is useful for decision
making now and in future.
5. Hardware:
These are the tangible mechanical, electrical and electronic parts of a computer system.
That is the components or devices used to form computing machine in which the
software can be run and tested.
6. Software:
It is a set of instructions or commands needed for performing a specific task by a
programmable device or a computing machine.
Programs are part of software but not synonymous.

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 Without software the Hardware is an idle machine.

7. Microprocessor (µP):
It is a program controlled semiconductor device (IC), which fetches, decodes and
executes instructions.
That is, a digital device on a chip which can fetch instructions from a memory, decode
and execute them i.e. accept data from input device or read/fetch data from memory
locations, performs certain arithmetic and logical operations, and send results to output
devices.
The 8085 microprocessor operates at a frequency of 3 MHz and power supply of +5V.
8. Integrated circuit:
It is an electronic circuit fabricated out of a solid block of semiconductor material. This
design of circuit, often called a solid state circuit, allows for very complex circuits to be
constructed in a small volume. An integrated circuit is also called a ‘chip’.
9. Microprocessor-based system:
This is any system that contains a microprocessor, memory, and input/output ports
(devices).
In fact, despite all the hype, computers use only a small proportion of all the
microprocessors manufactured. Our garage door opening system is a
microprocessorbased system or is sometimes called a microprocessor-controlled
system. Some applications of microprocessor-based system are: - It is used:
➢ For measurements, display, and control of current, voltage,
temperature, pressure, etc.
➢ For traffic control and industrial tool control. ➢ For speed
control of machines.
10. Microcomputer:
This is a microprocessor interfaced with memory and Input/ Output devices. The
particular microprocessor-based systems that happen to be used as a computer are
called microcomputers. The additional circuits required for a computer can be built
into the same integrated circuit giving rise to a single chip microcomputer.
11. Microcontroller:
This is a complete microprocessor-based control system built onto a single chip. It
is small and convenient but doesn’t do anything that could not be done with a
microprocessor and a few additional components.
12. MPU and CPU:
An MPU is a MicroProcessor Unit or microprocessor. A CPU is a Central Processing
Unit. This is the central ‘brain’ of a computer and can be (usually is) made from one or
more microprocessors.
13. Micro-

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 The word micro is used in electronics and in science generally, to mean ‘one millionth’
or .
It has also entered general language to mean something very small like a very small
processor or microprocessor. It has also become an abbreviation for microprocessor,
microcomputer, microprocessor-based system or a micro controller; indeed almost
anything that has ‘micro’ in its name. In the scientific sense, the word micro is
represented by the Greek letter µ, (mu). It was only a small step for microprocessor to
become abbreviated to µP.

Components of a Computer System

The major components of a computer system are:

➢ Central Processing Unit

➢ Input Devices
➢ Output Devices
➢ Memory Unit
➢ Bus System

Figure 1 shows a block diagram of the basic components of a computer system

Figure 1: Block diagram of the basic components of computer system

Central Processing Unit (CPU)

The Central Processing Unit is analogous to the human brain as all the decisions as per the
instructions are made by CPU. All other parts are also controlled by this unit.

The CPU is the primary and central player in communicating with devices such as memory,
input and output. However, the timing of communication process is controlled by the group of
circuits called control unit.

Functions of CPU

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 ➢ The CPU fetches or takes the data and instruction from the memory
➢ It takes input signals from the input devices such as keyboards

➢ It decodes the received instructions to understand what task is to be performed.

➢ It executes the programs stored in the memory depending on the decoded instructions
➢ It uses the stored programs to send appropriate signals to drive output devices such as
printers or store the completed tasks in memory

So the main functions of CPU are fetch data, decode, execute, and store.

The CPU is made up of three main components:

➢ The control unit,

➢ The immediate access store (memory units) and ➢ The arithmetic and logic unit.

Figure 2: Basic components of a CPU and other external components attached to the CPU

Control Unit
The control unit contains many controlling circuits, some of them shown in above figure 2 such
as Clock Circuit, Latch Circuit, Reset Circuit, etc.
The main function of the control unit is to provide the required controlling signal to each part
and individual circuits of the CPU.
It provides hold, reset, clock signal to each part of the CPU. In simple words, the control unit
fulfills the all requirement of the CPU to perform a task.

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For example, the data is to be fetched from the cache memory to ALU. So in this case, the
control unit provides a synchronized clock signal to both for properly movement of data.
ALU( Arithmetic and Logic Unit)

As its name suggests, it has two sections; one is Arithmetic Unit another is Logic Unit. We know
that the CPU performs both arithmetic and logic operations.
The Arithmetic unit in ALU performs all the arithmetic operations such as Addition, Subtraction,
Multiplication, Division, etc. and logical operations such as Rotate operation, AND operation, OR
operation, NOT operations, comparing, selecting, etc.
The ALU has necessary circuits to perform arithmetic, logical, memory, register and program
sequencing operations.

Memory Unit
This is the storage unit where the data and instructions (programs) are stored.
The older CPU has only Registers as the memory but modern CPUs also contain the Cache
Memory which is very fast semiconductor memory.
The register holds intermediate results obtained during program processing and they are used for
holding such results rather than RAM because accessing registers is almost 10 times faster than
accessing RAM.

The memory size inside the CPU is very small and very fast. Often, all the data and instructions
(programs) are stored in primary (RAM, ROM) and secondary memory (Hard Disk). The CPU
fetches the data from those memories and store into its own memory (registers and cache
memory) only during its operation.

Input Devices
These are devices that feed data or instructions (programs) to the CPU.
The input unit links the user to the computer.
Some of the input devices that are commonly used in today’s computers are: ➢
Keyboard

➢ Mouse

➢ Microphone

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 ➢ Scanner

➢ Joy Stick

➢ Magnetic Ink Card Reader(MICR)

➢ Bar Code Reader

An input unit performs following functions:

✓ It accepts (or reads) instructions and data from outside world.
✓ It converts these instructions and data in computer acceptable form
✓ It supplies the converted instructions and data to computer system for further
processing.
Output Devices
These are devices that supplies information obtained from data processing to outside world.
Hence, the output unit links a computer with its external environment.
Some of the output devices that are commonly used in today’s computers are:
➢ Monitor

➢ Printer

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 ➢ Plotter

➢ Speaker

Output unit performs following functions:

✓ It accepts the results produced by a computer, which are in coded form and
hence, we (humans) cannot easily understand them
✓ It converts these coded results to human acceptable (readable) form ✓ It
supplies the converted results to outside world.
Memory Unit (Primary and Secondary Memory)
This is the storage unit where the data and instructions are stored for current and future use by
the CPU.
A microprocessor has two types of memory
➢ RAM
➢ ROM
RAM (Random Access Memory) is volatile memory that gets erased when power is switched
off. All data and instructions are stored in RAM.
ROM (Read Only Memory) is non-volatile memory whose data remains intact even after
power is switched off. Microprocessor can read from it any time it wants but cannot write to it.
It is preprogrammed with most essential data like booting sequence by the manufacturer.
Often, all the data and instructions (programs) are stored in primary memory (RAM, ROM) and
secondary memory (such as Hard Disk). The CPU fetches the data from those memories and
store into its own memory (registers and cache memory) during the operation. We will discuss
the memory concept at a later chapter in this course. Bus System
A bus is a group of conducting lines that carries data, address and control signals. A computer
bus consists of a set of parallel conductors, which may be conventional wires, copper tracks on a
Printed Circuit Board (PCB), or microscopic aluminum trails on the surface of a silicon chip.
The microprocessor performs four operations:
✓ Memory Read: reads data (or instructions) from memory
✓ Memory Write: writes data (or instructions) into memory ✓ Input/Output (I/O) Read:
Accepts data from input devices

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 ✓ I/O Write: Sends data to output devices
To perform these operations, the microprocessor goes through the following steps:
➢ Step 1 – Identify the peripheral or memory location using its address
➢ Step 2 – Transfer data and/or information through the buses
➢ Step 3 – Provide timing or synchronization signals
The 8085 microprocessor unit (MPU) performs these functions using three set of communication
lines called buses: the address bus, data bus and control bus.

Figure 3 Bus Structures of 8085

Types of buses
There are three types of buses each used to perform one of the above steps:
✓ Address Bus
✓ Data Bus
✓ Control Bus
1. Address Bus
This is a unidirectional 16- line communication medium usually labeled A0 to A15 and it is only
one way i.e. from the microprocessor to the peripherals (8080/8085).
The address is an identification number used by the microprocessor to identify or access a
memory location or I / O device.
Since the address is only sent out of the microprocessor, address bus is a unidirectional bus.
The number of address lines gives the capacity of the microprocessor to identify different
memory locations e.g. 216 = 65,536 memory locations. (This when rounded off and referred to as
64kB (1kB = 1024 Bytes).
Most 8-bit microprocessors have 16-address lines. The address lines carry the memory location
of data to be acted on by the microprocessor or the location or register in an input or output
device.
2. Data Bus
This is a bidirectional (two way) conducting lines for transmission of data to and from the
microprocessor.

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Data buses are bidirectional buses because the microprocessor has to fetch (read) the data from
memory or input device for processing and after processing, it has to store (write) the data to
memory or output device.
It consists of 8-lines hence 28 = 256 different numbers. The data bus determines the word
length and register size of a microprocessor hence they are named as per their data bus.
The data lines for an 8-bit microprocessor are usually labeled D0 to D7 i.e. 8-parallel data lines
carrying 8-bits of data or information simultaneously to or from different parts of the computer.
The data bus uses a bidirectional buffer i.e. allows data to flow in both directions. It is also called
the octal bus transceiver.
3. Control Bus
These are single lines that are unidirectional i.e. one way and they carry command signals from
the control unit to various parts of the computer system.

The microprocessor generates specific control signals for every operation it performs.

There are four main operations:

➢ I/O synchronization
➢ Memory Synchronization
➢ Microprocessor scheduling
➢ Control various utilities
i. Input/Output (I/O) Synchronization

Synchronization is scheduling or sequencing of various activities to ensure that there is no

conflict or collusion and that all operations run smoothly and perfectly.

Therefore the control unit sends to these devices READ or WRITE signals together represented
as R/W or separately as RD and WR.

A read command is to activate an I/O device to load or input data to the data bus while the
write command is used to make the peripheral devices to take or output data to the data bus.

ii. Memory Synchronization

These are signals used to regulate and sequence the transfer of data to and/or from memory

iii. Microprocessor Scheduling

These are signals geared towards sequencing the working of various parts of the
microprocessor in the data processing cycle. Therefore, they are microprocessor internal
commands.

iv. Control Utilities

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These are specific peripheral or externally initiated signals for which individual pins of the
microprocessor are assigned. These are:

➢ Reset
➢ Interrupt
➢ Ready
➢ Hold
a. Reset

When activated, all internal operations are suspended and the program counter is cleared. The
program execution then begins at the zero memory address.

b. Interrupt

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The microprocessor can be interrupted from its normal execution of instructions so as to deal
with other instructions called service routines e.g. emergency procedures, virus check/scanning
etc. the microprocessor resumes its operations after completing the service routine.

c. Ready

If the signal at the ready pin is low, the microprocessor enters a wait state. This is used to
synchronize slower peripheral devices with the microprocessor.

d. Hold

When the signal at the hold pin is high, the microprocessor gives up control of the buses and
allows an external peripheral device to use them e.g. during Direct Memory Access (DMA).

MICROPROCESSOR EVOLUTION AND ARCHITECTURE

Evolution of Microprocessors

The first Microprocessor (4004) was designed by Intel Corporation which was founded by
Moore and Noyce in 1968. In the early years, Intel focused on developing semiconductor
memories (DRAMs and EPROMs) for digital computers. In 1969, a Japanese Calculator
manufacturer, Busicom approached Intel with a design for a small calculator which need 12
custom chips.Ted Hoff, an Intel Engineer thought that a general purpose logic device could
replace the multiple components. This idea led to the development of the first so called
microprocessor. So, Microprocessors started with a modest beginning of drivers for calculators.
Fedrico Faggin and Stanely Mazor implemented the ideas of Ted Hoff’s and designed the Intel
4000 family of processors comprising 4001 (2K-ROM), the 4002 (320 bit RAM), the 4003 (10
bit I/O shift-register) and the 4004, a 4 bit CPU.

Intel introduced the 4004 microprocessor to the worldwide market on November 15, 1971. It was
a 4-bit PMOS chip with 2300 transistors. Around the same time Texas Instruments developed a
4-bit microprocessor TMS 1000 and became the owner of microprocessor patent. Later Intel
introduced world’s first 8 bit general purpose microprocessor 8008 in 1972.This processor was
used in the popular computer ‘Mark-8’ in those days. In 1974, Intel introduced the improved
version of 8008, the 8080 microprocessor. This 8080 is the much more highly integrated chip
than its predecessors which is built around N-channel MOS technology. It could execute up to
290,000 operations per second and could address up to 64K.bytes of memory. The other notable
8 bit microprocessors include Motorola 6800, Rockwell PPS-8 and Signetics 2650 with powerful
architecture and instruction set.

With developments in integration technology Intel was able to integrate the additional chips like
8224 clock generator and the 8228 system controller along with 8080 microprocessor with in a
single chip and released the 8 bit microprocessor 8085 in the year 1976. The 8085
microprocessor consisted of 6500 MOS transistors and could work at clock frequencies of 3-5

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MHz. It works on a single +5 volts supply. The other improved 8 bit microprocessors include
Motorola MC 6809, Zilog Z-80 and RCA COSMAC.

In 1978, Intel introduced the 16 bit microprocessor 8086 and 8088 in 1979. IBM selected the
Intel 8088 for their personal computer (IBM-PC). The 8086 microprocessor made up of 29,000
MOS transistors and could work at a clock speed of 5-10 MHz. It has a 16-bit ALU with 16-bit
data bus and 20-bit address bus. It can address up to 1MB of address space. The pipelining
concept was used for the first time to improve the speed of the processor. It had a pre-fetch
queue of 6 instructions where in the instructions to be executed were fetched during the
execution of an instruction. It means 8086 architecture supports parallel processing. The 8088
microprocessor is similar to 8086 processor in architecture, but the basic difference is it has only
8-bit data bus even though the ALU is of 16-bit. It has a pre-fetch queue of 4-instructions only.

In 1982 Intel released another 16-bit processor called 80186 designed by a team under the
leadership of Dave Stamm. This is having higher reliability and faster operational speed but at a
lower cost. It had a pre-fetch queue of 6-instructions and it is suitable for high volume
applications such as computer workstations, word-processor and personal computers. It is made
up of 134,000 MOS transistors and could work at clock rates of 4 and 6 MHz. This is also comes
under first generation of Microprocessors.

Intel released another 16 bit microprocessor 80286 having 1, 34,000 transistors in 1981. It was
used as CPU in PC-ATs in 1982. It is the second generation microprocessor, more advanced to
80186 processor. It could run at clock speeds of 6 to 12.5 MHz .It has a 16-bit data bus and 24bit
address bus, so that it can address up to 16MB of address space and 1GB of virtual memory. It
had a pre-fetch queue of 6 instructions .Intel introduced the concept of protected mode and
virtual mode to ensure proper operation. It also had on-chip memory management unit (MMU)
.This was popularly called as Intel 286 in those days.

In 1985, Intel released the first 32 bit processor 80386, with 275,000 transistors. It has 32-bit
data bus and 32-bit address bus so that it can address up to a total of 4GB memory also a virtual
memory space of 64TB.It could process five million instructions per second and could work with
all popular operating systems including Windows. It has a pre-fetch queue of length 16-bytes
with extensive memory management capabilities. It is incorporated with a concept called paging
in addition to segmentation technique. It uses a math co-processor called 80387.

Intel introduced 80486 microprocessor with a built-in maths co-processor and with 1.2 million
transistors. It could run at the clock speed of 50 MHz This is also a 32 bit processor but it is
twice as fast as 80386.The additional features in 486 processor are the built-in Cache and built-in
math co-processors. The address bus here is bidirectional because of presence of cache memory.

On 19th October, 1992, Intel released the Pentium-I Processor with 3.1 million transistors. So, the
Pentium began as fifth generation of the Intel x86 architecture. This Pentium was a backward
compatible while offering new features. The revolutionary technology followed is that the CPU

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is able to execute two instructions at the same time. This is known as super scalar technology.
The Pentium uses a 32-bit expansion bus; however, the data bus is 64 bits.

The 7.5 million transistors based chip, Intel Pentium II processor was released in 1997. It works
at a clock speed of 300MHz. Pentium II uses the Dynamic Execution Technology which consists
of three different facilities namely, Multiple branch prediction, Data flow analysis, and
Speculative execution unit. Another important feature is a thermal sensor located on the mother
board can monitor the die temperature of the processor. For thermal management applications.

Intel Celeron Processors were introduced in the year 1999. Pentium-III processor with 9.5
million transistors was introduced in 1999. It also uses dynamic execution micro-architecture, a
unique combination of multiple branch prediction, dataflow analysis and speculative execution.
The Pentium III has improved MMX and processor serial number feature. The improved MMX
enables advanced imaging, 3D streaming audio and video, and speech recognition for enhanced
Internet facility.

Pentium-IV with 42 million transistors and 1.5 GHz clock speed was released by Intel in
November 2000. The Pentium 4 processor has a system bus with 3.2 G-bytes per second of
bandwidth. This high bandwidth is a key reason for applications that stream data from memory.
This bandwidth is achieved with 64 –bit wide bus capable of transferring data at a rate of 400
MHz. The Pentium 4 processor enables real-time MPEG2 video encoding and near real-time
MPEG4 encoding, allowing efficient video editing and video conferencing.

Intel with partner Hewlett-Packard (HP) developed the next generation 64-bit processor
architecture called IA-64 .This first implementation was named Itanium. Itanium processor
which is the first in a family of 64 bit products was introduced in the year 2001.The Itanium
processor was specially designed to provide a very high level of parallel processing ,to enable
high performance without requiring very high clock frequencies .Key strengths of the Itanium
architecture include ,up to 6 instructions/cycle. The Itanium processor can handle up to 6
simultaneous 64 –bit instructions per clock cycle.

The Itanium II is an IA-64 microprocessor developed jointly by Hewlett-Packard (HP) and Intel
and released on July 8, 2002. It is theoretically capable of performing nearly 8 times more work
per clock cycle than other CISC and RISC architectures due to its parallel computing
microarchitecture. The recent Itanium processor features a split L2 cache, adding a dedicated
1MB L2 cache for instructions and thereby effectively growing the original 256KBL2 cache,
which becomes a dedicated data cache. The first Itanium 2 processor (code named McKinley)
was more powerful than the original Itanium processor, with approximately two times
performance.

Pentium 4EE was released by Intel in the year 2003 and Pentium 4E was released in the year
2004.

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The Pentium Dual-Core brand was used for mainstream X86-architecture microprocessors from
Intel from 2006 to 2009. The 64 bit Intel Core2 was released on July 27, 2006. In terms of
features, price and performance at a given clock frequency, Pentium Dual-Core processors were
positioned above Celeron but below Core and Core 2 microprocessors in Intel's product range.
The Pentium Dual-Core was also a very popular choice for over clocking, as it can deliver
optimal performance (when over clocked) at a low price.

The Pentium Dual Core, which consists of 167 million transistors, was released on January 21,
2007. Intel Core Duo consists of two cores on one die, a 2 MB L2 cache shared by both cores,
and an arbiter bus that controls both L2 cache and FSB access.

Core 2 Quad processors are multi-chip modules consisting of two dies similar to those used in
Core 2 Duo, forming a quad-core processor. While this allows twice the performance to a
dualcore processor at the same clock frequency in ideal conditions, this is highly workload
specific and requires applications to take advantage of the extra cores.

In September.2009, new Core i7 models based on the Lynnfield desktop quad-core processor and
the Clarks field quad-core mobile were added, and models based on the Arrandale dual-core
mobile processor have been announced. The first six-core processor in the Core lineup is the
Gulftown, which was launched on March 16, 2010. Both the regular Core i7 and the Extreme
Edition are advertised as five stars in the Intel Processor Rating.

Summary of the Evolution of Microprocessors

4-bit microprocessors:

4004 was the first microprocessor introduced in 1971 by Intel Corporation, USA.

Operating on 4-bits of data at a time and has the capabilities for addition, subtraction,
comparison and logical (AND and OR) operations.

Examples: Intel’s 4004, Intel’s 4040, Rockwell International’s PPS4, Toshiba’s T3472

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8-bit microprocessors:

8008 was the first 8-bit microprocessor introduced in 1973 by Intel Corporation, USA. It can
perform arithmetic and logical operations on 8-bit data.

Examples: Intel’s 8008, Intel’s 8080, Intel’s 8085, Motorola’s M6800, National Semiconductor’s
NSC 800, Zilog Corporation’s Z80, Fairchild’s F8, Hitachi’s 6809.

12-bit microprocessors:

They performs arithmetic and logical operations on 12-bit data

Examples: Intersil’s IM6100, Toshiba’s T3190 16-bit

microprocessors:

It performs arithmetic and logical operations on 16-bit data

Examples: Intel’s 8086, Intel’s 8088, Intel’s 80286, Fairchild’s 9440, Data General’s mN601,
Texas Instrument’s TMS9900, Motorola’s M68000, Zilog’s Z8000 32-bit microprocessors:

It performs arithmetic and logical operations on 32-bit data

Examples: Intel’s 80386, Intel’s 80486, Intel’s iAPX432, Motorola’s 68020, Motorola’s 68030,
National’s 32032, National’s 32523, Inmos’ T414, Inmos’ T800 64-bit microprocessors:

They can perform arithmetic and logical operations on 64-bit data

Intel’s Pentium microprocessor executes 100 million instructions per second (MIPS).

Examples: Intel’s Pentium (80586), Intel’s Pentium Pro, Intel’s Pentium II, Celeron, Intel’s
Pentium III and Intel’s Pentium IV.

Microprocessor Families and their Characteristics

The various microprocessor families are characterized by the following important characteristics:

➢ Clock speed
➢ Word size
➢ Instruction set

Clock Speed: - Is the speed at which the microprocessor executes instructions.

Every microprocessor has an internal clock that regulates the speed at which it executes
instructions and also synchronizes it with other components.

Word Size: - Is the number of bits that can be processed by a processor in a single instruction.
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Instruction Set: - Is the basic set of machine level instructions that a microprocessor is designed
to execute.

A command given to a digital machine to perform an operation on a piece of data is called

an instruction. These instructions do carry out these types of operations: -

➢ Data transfer
➢ Arithmetic operations
➢ Logical operations
➢ Control flow
➢ Input/output and machine control
The table below summarizes the microprocessor families and their characteristics
Family Name Year Clock Bus Size Number of Addressable
Released Rate/Speed Transistors Memory
(RAM size)
Intel 4004 1971 740 kHz 4 bits 2300 640 bytes
Intel 8008 1972 500 kHz 8 bits 3500 16 kB
Intel 8080 1974 2 MHz 8 bits 4500 64 kB
Intel 8085 1976 3 MHz 8 bits 6500 64 kB
Intel 8086 1978 10 MHz 16 bits 29000 1 MB
Intel 8088 1979 5 MHz 8 bits 29000 1 MB
Intel Pentium 1993 200 MHz 64 bits 3.1 × 10 6 4 GB
I
Intel Pentium 1997 450 MHz 64 bits 7.5 × 106 4 GB
II
Intel Pentium 1999 1.2 GHz 64 bits 9.5 × 106 4 GB
III
Intel Pentium 2000 2.8 GHz 64 bits 125 × 106 64 GB
IV
Zilog Z80 1976 33 MHz 16 bits 8500 64 kB
Motorola 1974 1 MHz 8 bits 4100 64 kB
MC6800

The 8085 Microprocessor

Features of 8085 Microprocessor

➢ The features of 8085 include:

➢ It is an 8-bit microprocessor i.e. it can accept, process or provide 8-bit data

simultaneously.

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 ➢ It operates on a single +5V power supply connected at Vcc ➢ It operates on clock cycle
with 50% duly cycle.
➢ It has on chip clock generator that generates clock signal, which can be used for
synchronizing external devices.
➢ It can operate with 3 MHz clock frequency.
➢ It has 16 address buses; hence it can access 64 bytes (26 𝑏𝑦𝑡𝑒𝑠) of memory.
➢ It provides 8 bit I/O address to access (28) 256 I/O ports.
➢ In 8085, the lower 8-bit address bus (A0-A7) and data bus (D0-D7) are multiplexed to
reduce number of external pins. But due to this, external hardware is required to separate
address lines and data lines.
➢ It supports 74 instructions with following addressing modes.
✓ Immediate
✓ Register
✓ Direct ✓ Indirect
✓ Implied.
➢ It has 8-bit accumulator (or register A), flag register, instruction register, six 8-bit general
purpose registers (B, C, D, E, H and C) and five 16-bit registers (SP and PC) ➢ It
provides five hardware interrupts: TRAP, RST 7.5. RST 6.5, RST 5.5 and INTR ➢ It has
serial I/O control which allows serial communication.
➢ It provides control signals (IO/M, RD, WR) to control bus cycles.

Architecture of 8085

It consists of various functions blocks as listed below:

➢ Registers
➢ Arithmetic and logic unit (ALU)
➢ Instruction decoder and machine cycle encoder
➢ Address Buffer
➢ Address / Data Buffer
➢ Incremented / Decremented address batch
➢ Serial I/O control

➢ Timing and control circuitry

➢ Interrupt control

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 Figure 4 Architecture of 8085 microprocessor

I. Registers

A register is a group of cascaded flip-flops used to store related bits of data/information.

It has eight addressable 8-bit registers: A, B, C, D, E, H, L, F and two 16-bit registers PC and SP.

These register can be classified as

➢ General purpose registers (B,C,D,E,H, and L)

➢ Temporary registers (a) Temporary data register (b) W and Z registers
➢ Special purpose registers (a) Accumulator (b) Flag registers (c) Instruction register
➢ Sixteen bit registers (a) Program counter (PC) (b) Stack pointer (SP)

All the registers are accessible to the programmer except temporary registers (temporary data
register, and W and Z registers that are used by the microprocessor for internal, and immediate
operations).

The table below shows the registers of the 8085 microprocessor

1) General Purpose Registers

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Registers B,C,D,E,H and L are 8-bit general purpose registers can be used as a separate 8-bit
registers or as 16-bit register pairs, BC,DE and HL. HL pair also functions as a data pointer or
memory pointer. These are also called Scratch pad registers, as user can store data in them. To
store and read data from these registers bus access is not required, it is an internal operation.
Thus it provides an efficient way to store intermediate results and used them when required.

2) Temporary Registers
a. Temporary Data Register

The ALU has two inputs. One input is supplied by the accumulator and other from temporary
data register. The programmer cannot access this temporary data register. However, it is
internally used for execution of most arithmetic and logical instructions.

b. W and Z registers

W and Z registers are temporary registers. These registers are used to hold 8-bit data during
execution of some instruments. These registers are not available for programmer, since 8085
uses them internally.

3) Special Purpose Registers

a) Register A (Accumulator)

It is a tri-state eight bit register that is extensively used in arithmetic, logic, load and store
operations, as well as, input / output (I/O) operations. Most of the times the result of arithmetic
and logical operations is stored in the register A, hence it is also identified as accumulator.

The accumulator is the register associated with the ALU operations and sometimes I/O
operations. It is an integral part of ALU. It holds one of data to be processed by ALU. It also
temporarily stores the result of the operation performed by the ALU.

b) Flag Register

A flag is a flip flop used to store the information about the status of the processor and the status
of the instruction executed most recently.

Flag register is an 8-bit register.

There are five flags in 8085; sign flag (S-Flag), zero flag (Z-Flag), Auxiliary carry flag
(ACFlag), and parity flag (P-Flag) and carry flag (CY-Flag).

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Sign flag: After the execution of arithmetic or logic operation, if bit D7 of the result is 1, the sign
flag is set. In a given byte if bit D7 is 1, the number will be viewed as negative number. If D7 is
0, the number is considered as positive number.

Zero flag: The zero flag sets if the result of operation in ALU is zero and flag resets if result is
non-zero. The zero flag is also set if a certain register content becomes zero following an
increment or decrement operation of that register.

Auxiliary carry flag: This flag is set if there is an overflow out of bit3 i.e., carry from lower
nibble to higher nibble (D3 to D4 bit). This flag is used for BCD operations.

Parity flag: Parity is defined by the number of ones present in the accumulator. After an
arithmetic or logic operation if the result has an even number of ones, i.e., even parity, the flag is
set. If the parity is odd, flag is reset.

Carry flag: This flag is set, if there is an overflow out of bit 7. The carry flag also serves as a
borrow flag for subtraction.

Example : Let us consider the addition of two binary numbers 11011001 and 11101101 and
check the Flag register.

The Flag register contents after addition are shown below:

c) Instruction register

In a typical processor operation, the processor first fetches the opcode of instruction from
memory (i.e. it places an address on the address bus and memory responds by placing the data
stored at the specified address on the data bus). The CPU stores this opcode in a register called
instruction register. This opcode is further sent to the instruction decoder to select one of the
alternatives.

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Note: An Opcode or operation code is the part of the instruction that specifies the operation to be
performed. An operand is the data on which the operation is to be performed.

4) Sixteen bit registers

There are two 16-bit registers in the 8085 microprocessor:

➢ Program Counter (PC) ➢

Stack Pointer (SP)
a) Program Counter (PC)

A program is a sequence of instructions. Microprocessor fetches these instructions from the

memory and executes them sequentially. The program counter is a special purpose register
which, at a given time, stores the address of the next instruction to be fetched. Program counter
acts as a pointer to the next instruction.

How processor increments the program counter depends upon the nature of instructions: for one
byte instruction it increments program counter by one, for two byte instruction it increments
program counter by two and for three byte instruction it increments program counter by three
such that program counter always points to the address of the next instruction.

b) Stack Pointer

The stack is a reserved area of the memory in the RAM where temporary information may be
stored. A 16-bit stack pointer is used to hold the address of the most recent stack entry.

The allowed register pairs of 8085 microprocessor are:

➢ B-C register pair

➢ D-E register pair
➢ H-L register pair

II. Arithmetic and Logic Unit (ALU)

The 8085’s ALU performs arithmetic and logical functions on eight bit variables. The arithmetic
unit performs bitwise fundamental, operation such as addition and subtraction. The logic unit
performs the logical operations such as complement, AND, OR and EX-OR as well as rotate and
clear. The ALU also looks after branching decisions.

III. Instruction Decoder

The processor first fetches the opcode of instruction from memory and stores this opcode in the
instruction register. It is then sent to the instruction decoder. The instruction decoder decodes it
and accordingly gives the timing and control signals which control the register, data buffer,
ALU, and external peripheral signals.

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The 8085 executes seven different types of machine cycles. It gives the information about which
machine cycle is currently executing in the encoded form on the S0, S1 and IO/M lines. The task
is done by machine cycle encoder.

IV. Address buffer

This is an 8-bit unidirectional buffer. It is used to drive external high order address (A15-A8). It
is also used to tri-state the high order address bus under certain conditions such as reset, hold,
halt, and when address lines are not in use.

V. Address / Data buffer

This is an 8-bit bidirectional buffer. It is used to drive multiplexed address/data bus i.e. low order
address bus (A7-A0) and data bus (D7-D0). It is also used to tri-state the multiplexed
address/data bus under certain conditions such as reset, hold, halt, and when bus is not in use.

VI. Incrementer/Decrementer address latch

This 16-bit register is used to increment or decrement the contents of program counter or stack
pointer as a part of execution of instructions related to them.

VII. Interrupt Control

The processor fetches, decodes and executes the instructions in a sequence. Sometimes it is
necessary to have the processor automatically execute one of a collection of special routines
whenever special condition exists within a program or the microcomputer system. After the
execution of special routine, the program control must be transferred to the program which
processor was executing before the occurrence of the special condition. The occurrence of this
special condition is referred as interrupt. The interrupt control block has five interrupt inputs
RST 5.5, RST 6.5, RST 7.5, TRAP and INTR and one acknowledge signal INTA.

VIII. Serial I/O Control

In situations like, data transmission over long distance and communication with cassette tapes or
CRT terminal, it is necessary to transmit data bit by bit to reduce the cost of cabling. In serial
communication one bit is transferred at a time over a single line.

The 8085’s serial I/O control provides two lines, SID and SOD for serial communication.

✓ SID (Serial input data line): It is an input line through which the microprocessor accepts
serial data.
✓ SOD (Serial output data line): It is an output line through which the microprocessor sends
output serial data.
IX. Timing and Control circuitry

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The control circuitry in the processor 8085 is responsible for all the operations. The control
circuitry and hence the operations in 8085 are synchronized with the help of clock signal.

The timing and control circuitry controls the fetching and decoding of operations and generates
appropriate signals for instruction execution. It also generates signals required to interface
external devices to the processor 8085.

PIN Diagram of 8085 Microprocessor Its Various Signals

The signals of 8085 can be classified into six groups according to their functions:

➢
Address bus
➢
Data bus
➢
Control and status signals
➢
Power supply and clock frequency signals ➢ Externally initiated signals and ➢
Serial I/O ports.
✓ Address Bus

The 8085 has eight lines; A15-A8, which are unidirectional and used as the high order address
bus.

✓ Data Bus (or Multiplexed Address)

The signal lines AD7-AD0 are bidirectional: they serve a dual purpose. They are used as the low
order address bus as well as the data bus.

In executing an instruction, during the earlier part of the cycle, these lines are used as the
loworder address bus. During the latter part of the cycle, these lines are used as the data bus.
(This is also known as multiplexing the bus.)

However, the low-order address bus can be separated from these signals by using a latch

✓ Control and Status Signals

This group of signals includes two control signals (RD and WR), three status signals (IO/M, S1,
and S0) to identify the nature of the operation, and one special signal (ALE) to indicate the
beginning of the operation. These signals are as follows:

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 Figure 5 Pin Diagram of 8085 Microprocessor

ALE — Address Latch Enable: This is positive going pulse generated every time the 8085
begins an operation (machine cycle); it indicates that the bits on AD7-AD0 are address bits. This
is used primarily to latch the low-order address from the multiplexed bus and generate a separate
set of eight address lines, A7-A0.

̅𝑹𝑫̅̅̅̅̅̅̅ — Read: This is a read control signal (active low). This signal indicates that the selected I/O
or memory device is to be read and data are available on the data bus.

̅𝑾𝑹̅̅̅ — Write: This is a write control signal (active low). This signal indicates that the data on the
data bus are to be written on into a selected memory device or I/O location.

IO/𝑴̅̅ : This is status signal used to differentiate between I/O and memory operations. When it is
high (IO/M = 1), it indicates an I/O operation; when it is low (IO/M = 0), it indicates a memory
operation. This signal combines with RD and WR to generate I/O and memory control signals.

S1 and S0: These status signals, similar to IO/M, can identify various operations, but they are
rarely used in small systems.

✓ Power Supply and Clock Frequency Signals

The power supply and frequency signals are as follows:

➢ Vcc: +5V power supply.

➢ Vss: Ground reference.
➢ X1, X2: A crystal is connected at these two pins. The frequency is internally divided by
two; therefore, to operate a system at 3MHz, the crystal should have frequency of 6MHz.
➢ Clk (Out) — Clock out: This signal is used as the system clock for other devices.
✓ Externally Initiated Signals, Including Interrupts
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The 8085 has five interrupt signals that can be used to interrupt a program execution.

The interrupt signals are Interrupt Request (INTR), Restart Interrupts (RST5.5, RST 6.5,
RST7.5), and TRAP.

The microprocessor acknowledges an interrupt request by the INTA (Interrupt acknowledge)

signal. In addition to the interrupts, three pins — RESET, HOLD, and READY — accept the
externally initiated signals as inputs.

To respond to the HOLD request, the 8085 has one signal called HLDA (Hold Acknowledge).
INTR (Input) Interrupt Request: This is used as a general-purpose interrupt
INTA (Output) Interrupt Acknowledge: This is used to acknowledge an interrupt
RST 7.5 (Inputs) Restart Interrupts: These are vectored interrupts and transfer the program
RST 6.5 control to specific memory locations. They have higher priorities than the
RST 5.5 INTR interrupt. Among these three, the priority order is 7.5, 6.5 and 5.5
TRAP (Input) This is a non maskable interrupt and has the highest priority
HOLD (Input) This signal indicates that a peripheral such as a DMA controller is
requesting the use of the address and data buses.
HLDA Hold Acknowledge: This signal acknowledges the HOLD request
READY This signal is used to delay the microprocessor Read or Write cycles until
a slow-responding peripheral is ready to send or accept data. When this
signal goes low, the microprocessor waits for an integral number of clock
cycles until it goes high.
RESET, HOLD and READY are additional interrupts. They accept the externally initiated
signals as inputs. To respond to the HOLD request, it has one signal called HLDA.

RESET IN: When the signal on this pin goes low, the program counter is set to zero, the buses
are tri-stated, and the microprocessor is reset.

RESET OUT: This signal indicates that the microprocessor is being reset. The signal can be used
to reset other devices.

✓ Serial I/O Ports

The microprocessor has 2 pins specially designed for software –controlled serial I/O. One is
called SOD (Serial Output Data) and the other is called SID (Serial Input Data). Data transfer is
controlled through 2 instructions: SIM and RIM. The instruction SIM is necessary to output data
serially from the SOD line. Similarly, instruction RIM is used to input serial data through the
SID line.

The SID and SOD lines in the 8085 eliminate the need for an input port and an output port in the
software-controlled serial I/O. Essentially, the SID is a 1-bit input port and SOD is a 1-bit output
port.

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 MICROCOMPUTER MEMORIES

The CPU is made of three components namely, the arithmetic logic unit (ALU), memory unit,
and the control unit. In addition to these, auxiliary storage/secondary storage devices are used to
store data and instructions on a long-term basis.

The memory unit together with the secondary storage is a major component of a digital computer
and is in a large proportion of all digital systems.

A memory is a collection of cells capable of storing binary information. In addition to these cells,
memory contains electronic circuits for storing and retrieving information.

Memories in computers provide temporary and permanent storage for substantial amount of
binary information. In order to be processed, information is first sent to the processing hardware
consisting of registers and combinational logic circuits, then back to memory through
input/output devices.

A register is simply a group of flip-flops. Flip-flop can store one bit information. So an n-bit
register has a group of n flip-flops and is capable of storing any binary information/number
containing n-bits.

Note: Shift registers: The binary information in a register can be moved from stage to stage
within the register or into or out of the register upon application of clock pulses. This type of bit
movement or shifting is essential for certain arithmetic and logic operations used in
microprocessors. This gives rise to group of registers called shift registers.

Types of shift registers

➢ Serial In Serial Out Shift Register (SISO)

➢ Serial In Parallel Out Shift Register (SIPO)
➢ Parallel In Serial Out Shift Register (PISO)
➢ Parallel In Parallel Out Shift Register (PIPO)
➢ Bidirectional Shift Register

Computer memories are divided into two broad categories:

➢ Primary/main storage/memory: is closely connected to the CPU and is used for

temporary storage of data and instructions during processing.
➢ Secondary/ auxiliary storage/memory: is relatively permanent but further away'' from
the CPU

The main differences between the two memory categories are: -

Primary/Main Storage (Memory) Secondary/Auxiliary Storage (Memory)
It is relatively fast It is relatively slow

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It is volatile (i.e. contents in it are lost when It is non-volatile (i.e. contents in it are not lost
power is removed) when power is removed)
It is based on electronic technology It is based on magnetic, optical or mechanical
technologies

✓ Primary Storage Devices (Primary Memories)

Primary memory is also called internal memory and is an important part of a computer. It is the
main area in a computer where the data is stored. The stored data can be recalled instantly and
correctly whenever desired. This memory can be quickly accessed by the CPU for reading or
storing information.

There are two main types of primary storage

➢ Read only memory (ROM)

➢ Random Access memory (RAM)
❖ ROM (Read Only Memory)

A read only memory (ROM) is a device that includes both the decoder and the OR gates within a
single IC package.

It is called Read-only memory as information can only be read from and not written or changed
onto ROM.

ROM is the ‘built-in’ memory of a computer. It stores some basic input – output instructions put
by the manufacturer to operate the computer. The storage of data and instructions in ROM is
permanent. It does not depend on the power supply. i.e it is non-volatile memory.

It consists of n input lines and m output lines. Each bit combination of the input variables is
called an address. Each bit combination that comes out of the output lines is called a word.

The number of distinct addresses possible with n input variables is 2n

A ROM contains programs and/or data ``burned in'' at the time of manufacture and it is
commonly used to contain programs to ``boot up'' the computer when it is switched on.

Types of ROM The

three types of ROM are:

➢ Masked ROM
➢ PROM (Programmable Read Only Memory)
➢ EPROM (EEPROM and UV-EPROM)
➢ Mask-Programmed ROM

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It derives its name because the information is written to this type of ROM at the time of
manufacture using a suitable mask. Once the manufacture writes this type of ROM, it is not
possible to change this information even by the manufacturer. The information entered is
permanent.

➢ PROM (Programmable Read Only Memory)

It is a ROM which is ``blank'' and into which programs and/or data can be written, but only once.
i.e. It allows user to store data or programs.

PROMs use the fuses with material like nichrome and polycrystalline. The user can blow these
fuses by passing around 20 to 50 mA of current for the period 5 to 20μs. The blowing of fuses is
called programming of ROM.

The PROMs are one time programmable. Once programmed, the information is stored
permanent.

➢ EPROM (Erasable Programmable Read Only Memory)

It is a PROM which allows a user to erase the information stored on the chip and reprogram it
with new information.

➢ UV-EPROM (Ultraviolet Erasable Programmable Read Only Memory)

One in which erasing of stored data, is done by exposure the device to UV light through a
transparent quartz window above the chip.

EPROMs use MOS (Metal Oxide Semiconductor) circuitry. They store 1s and 0s as a packet of
charge in a buried layer of the IC chip. It is not possible to erase selective information. The chip
can be reprogrammed.

EPROMs are easily identified by the transparent quartz window in the top of the package,
through which the silicon chip is visible. The window permits exposure to UV light during
erasing.

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 ➢ EEPROM (Electrically Erasable Programmable Read Only Memory)

EEPROM also use MOS circuitry. Data is stored as charge or no charge on an insulated layer or
an insulated floating gate in the device. EEPROM allows selective erasing at the register level
rather than erasing all the information since the information can be changed by using electrical
signals.

❖ RAM (Random Access Memory)

It is called ``RAM'' because any location in the memory can be directly accessed in the same
amount of time as any other location.

RAM is also known as read/write memory as information can be read from and written onto it.

RAM is a place in a computer that holds computer instructions, programs and data.

The CPU can directly access the data from RAM almost immediately. However, the storage of
data and instructions in RAM is temporary, only available when the computer is running. It
disappears from RAM as soon as the power to the computer is switched off. I.e. it is a volatile
memory

Types of RAMs

The two categories of RAMs are: -

➢ SRAM (Static RAM)

➢ DRAM (Dynamic RAMs) ➢ SRAM (Static RAM)

It uses flip flops as storage elements and therefore store data indefinitely as long as dc power is
applied.

There are two types of SRAMs:-

➢ Asynchronous SRAMs
➢ Synhronous Burst SRAMs
➢ DRAM (Dynamic RAMs)

It use capacitors as storage elements and cannot retain data very long without capacitors being
recharged by a process called refreshing.

The DRAMs are categorized as: -

➢ Fast Page Mode DRAM,

➢ Extended Data Out DRAM(EDO DRAM), ➢ Burst EDO DRAM and ➢
Synchronous DRAM.

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Note: Data flow in memory system is usually through a bus. i.e. a set of conductive paths that
interconnect two or more functional components of a system or several diverse systems.

✓ Secondary Memory

The primary memory which is faster (and hence expensive) is generally not sufficient for large
storage of data. As a result, additional memory, called the auxiliary or secondary memory is
used. It is also referred as backup storage as it is used to store large volume of data on a
permanent basis which can be transferred to the primary memory whenever required for
processing. Data are stored in secondary storage in the same binary codes as in the main
(primary memory) storage.

Two major types of secondary storage devices are: -

A. Direct Access Storage Devices (DASDs)

Examples of this type of secondary story are

➢ Magnetic disks, (high capacity, low cost, fast)

➢ Hard disks (high capacity, low cost, fast)
➢ Floppy disks (low capacity, lower cost, slow)
➢ Optical disks
➢ CD-ROM (Compact disc, Read Only Memory)
➢ CD-R Drive
➢ CD-RW disks
➢ DVD

➢ Blue ray Discs

➢ WORM (Write Once, Read Many)
➢ MO (Magneto-Optical Disks)
B. Serial Devices (flash drives) & Magnetic tapes (very fast sequential access)
❖ Magnetic Tape

This is oldest, and originally the only form of secondary storage. It is still used, mostly for
backup or archival storage, and for batch processing.

Data is stored on tracks on the tape. Most tapes have 9 tracks.

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Varieties of magnetic tapes:-

➢ 14" reels of 1/2" wide tape (2400' long)

➢ Cartridges of 1/4" tape
➢ Cassettes (very similar to audio cassettes) ➢ Digital Audio Tape (DAT).

Bytes of data (i.e. 8 bits) are stored across the width of the tape.

The 9th bit is a parity bit and it helps to detect storage errors. Two types of parity can be used.

✓ With even parity, the parity bit is set so that the group of 9 bits has an even number of `1'
bits.
✓ With odd parity, the parity bit is set so that the group of 9 bits has an odd number of `1'
bits.

Data is stored at different densities (e.g. 1600 and 6250 bpi, where ``bpi'' means ``bytes per
inch'').

Advantages of magnetic tapes

➢ They are very cheap

➢ They can store large amounts of data
➢ They are relatively robust

Disadvantages of magnetic tapes

➢ They only allow access to data sequentially and is therefore very slow compared to other
secondary storage technologies
➢ May need manual intervention to mount/dismount
❖ Magnetic Disks

This is the most common form of secondary storage used today. Magnetic disks come in two
forms:

➢ Hard disks

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 ➢ Floppy disks

Hard disks are (usually but not always) permanently mounted inside the computer. All magnetic
disks have a magnetizable iron oxide coating and read/write heads that can move over the
surface of the disk, which is spinning underneath it. The disk head works in a similar way to the
head in an audio tape recorder. The read/write head in a floppy disk drive actually contacts the
magnetic disk, but that in a hard disk ``flies'' a few thousandths of an inch above it.

The hard disk can hold more information than the floppy disk and the retrieval of information
from hard disk is faster when compared to floppies or tapes. A hard disk is fixed inside the CPU
and its capacity ranges from 20 MB onwards. The hard disk is made up of a collection of discs
(one below the other) known as platters on which the data is recorded. These platters are coated
with magnetic material. It is less sensitive to external environmental disorders and hence the
storage in hard disk is safe. A small hard disk might be as much as 25 times larger than a floppy
disk. Storage Capacity of hard disks varies from 20 MB to several Giga bytes like 80GB,
160GB.

➢ Magnetic Hard Disks

Data on the disk surface is recorded on tracks (magnetic, not physical grooves!) which form
concentric circles on the disk.

Each disk has a set number of tracks. Depending on type of disk drive, there may be from 100 to
over 10,000 tracks on the disk. Tracks with the same number on each disk (recording) surface
form a cylinder.

The disks spin at a fixed speed, typically at 3600 rpm (IDE) or 7500 -15,000 rpm (SCSI).

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Tracks on a disk are organized into sectors. To get to a particular piece of data on the disk, a
track number and a sector number are needed.

Data is read/written when the required sector on the track rotates into position under the
read/write head (note that data can be accessed from any track of the cylinder).

The time taken to position the head over the correct track/cylinder is called the seek time.

The time needed for the sector to arrive (once the head is in position over the correct
track/cylinder) is called the latency time.

Creating the magnetic tracks on a previously blank disk is called formatting the disk. Formatting
destroys any data that might have been on the disk previously.

Typical data access times for modern hard disks (i.e. latency + seek) are about 10-15
milliseconds.

Typical storage capacities today are:

➢ Microcomputer: 20 Mb - 240 Gb
➢ Mainframe: 240 - 800 Gb

Magnetic hard disks are, in a mainframe environment, often referred to as DASD's – “Direct
Access Storage Devices”.

➢ Magnetic Floppy Disks

Current size is 3.5" diameter (older floppy disks were 5.25" and 8" in diameter).

They are organized into tracks and sectors, like their hard disk cousins.

Typically they rotate at about 400 rpm, and do so only when access to them is needed (unlike
hard disks which rotate all the time the computer is on).

Like magnetic hard disks, floppy disks must also be formatted before they can be used.

Typical storage capacity is 1.4 Mb

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Typical data access time is200-400 milliseconds.

❖ Optical Disks

Optical disks are becoming more common. They come in several varieties:

➢ CD-ROM (Compact Disk Read Only Memory)

➢ CD-R (Compact Disk Recordable)
➢ CD-RW (compact Disk Re-Writable)
➢ DVD (Digital Versatile/Video Disk)
➢ DVD-R (Digital Versatile Disk Recodable)
➢ DVD-RW (Digital Versatile Disk Re-Writable)
➢ MO (magneto-optical)
❖ CD-ROM

CD-ROM stands for Compact Disk–Read Only Memory. It is used to store a wide variety of
information. Its main advantage is that it is portable and can hold a large amount of data. The
storage capacity of most CD-ROMs is approximately 650 MB or 700 MB.

CD-ROMs have the following variations

(i) CD-R(Compact disc Recordable): Data can be written onto it just once. The stored data
can be read. Data once written onto it cannot be erased.

(ii) CD-RW (Compact disc Rewritable): It is also called erasable CD. Data once written onto it
can be erased to write or record new information many times. To use a CD-ROM, a device called
CD drive is needed.

They come with data already stored on it - like a music compact disk.

They are useful for distributing information that should not be changed (e.g. encyclopedias) and
programs (e.g. new versions of software), and games.

They have a typical storage capacity of 650 Mb.

New technology of CD-ROM, known as DVD, will store up to 4GB per disk. DVD disk drives
are required to read these disks.

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They have a typical data access time of 30-50 milliseconds, although this is steadily improving
and should shortly be comparable with magnetic hard disks.

They are easy to handle, and relatively robust.

❖ WORM

It stands for “Write Once, Read Many”.

Data can be written onto the initially blank optical disk. Once written, the data cannot be erased.

They are useful for storing data that needs to be permanently retained and they are similar in
other respects to CD-ROM disks.

❖ Magneto-Optical Disks (CD-Rewriteable)

These are the optical version of magnetic hard disks. That is, data can be written to them and
erased from by shining a laser beam on them.

Data is written by heating a spot on the disk with a laser beam, in the presence of a magnetic
field, the direction of which determines whether a ‘0’ or ‘1’ is written.

Data is read by shining a lower power laser beam onto the disk spot (without the magnetic field)
and detecting the polarization of the light that is reflected.

Storage and Files Storage

has major implications for DBMS design.

READ: transfer data from disk to main memory (RAM).

WRITE: transfer data from RAM to disk. Both operations are high-cost operations, relative to in
memory operations, so DB must be planned carefully!

Why Not Store Everything in Main Memory?

➢ Main/Primary memory is very expensive. Cost of RAM is high compared to cost of the
same amount of disk space
➢ They have relatively small size/capacity
➢ Main/Primary memory is volatile thus data can easily get lost when power is removed

Typical storage hierarchy

a. The Main memory (RAM) (primary storage) is for currently used data
b. Disk is used for the main database (secondary storage)

Units of Measurement

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A bit is a binary digit, the smallest increment of data on a computer. A bit can hold only one of
two values: 0 or 1, corresponding to the electrical values of OFF or ON, respectively.

Spatial units:

➢ Byte: 8 bits
➢ Kilobyte (KB): 1024 or 210 bytes
➢ Megabyte (MB): 1024 kilobytes or 220 bytes
➢ Gigabyte (GB): 1024 megabytes or 230 bytes
➢ Terabyte (TB): 1024 Gigabytes or 240 bytes

➢ Petabyte (PB): 1024 Terabytes or 250 bytes

❖ Floppy Disk

It is also referred as Diskette and it is made of flexible Vinyl material. It has a small hole on one
side called right protect notch which protects accidental writing/deleting the information from
the disk. There is a hole in the center through which the spindle of drive unit rotates the disk.

The disks are available in two sizes of 5.25 and 3.5 inches and these could be either low density
or high-density floppies. Storage capacity of floppies is measured in kilobytes (KB) and
megabytes (MB). The details about the storage capacities of the floppies are presented below:

✓ Floppy Disk Storage Capacity Size (Diameter)

✓ Low Density 360 KB 5.25 inches
✓ High Density 1.2 MB 5.25 inches
✓ High Density 1.44 MB 3.5 inches
✓ Extended 2.8 MB 3.5 inches
❖ DVD

DVD stands for Digital Versatile Disc. It is similar to a CD-ROM, except that it can store larger
amounts of data. The storage capacity of a DVD is at least 4.7GB.

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DVDs that can store up to 17GBs are also available. Because of their capacity, DVDs are used to
store a very large multimedia presentations and movies that combine high quality sound and
graphics.

❖ Flash Drive

It is a small, portable device that can be used to store, access and transfer data. Due to its small
size, it is commonly called Pen drive. It is also called USB drive.

We can read, write, copy, delete, and move data from computer to flash drive or flash drive to
computer. It comes in various storage capacities of 2GB, 4GB, 8GB, 16 GB, 32 GB, 64 GB, etc.
It is popular because it is easy to use and small enough to be carried in a pocket. This device is
plugged into the USB port of the computer and the computer automatically detects this device.

Expanding memory

We need to expand the memory for the following two reasons.

➢ To increase the word size (number of bits in each memory

location).
➢ To increase the memory capacity (number of locations). ✓
Expanding word size

The word size i.e. the number of bits in the data lines can be expanded by connecting two or
more ICs together. The connection diagram is shown in figure.

Page 37 of 90
 Figure 6 Expanding word size of memory

The ICs are connected in such a way that the data lines are connected in series and the address
lines are connected in parallel. There are two 1K x 4 (1024 locations, each location has 4 bits)
memory ICs are used to get 1K x 8 memory. For 1024 locations, there are 10 address lines A0 to
A9. Both memory ICs are selected simultaneously by common chip select signal. When a
particular address is given, both ICs are selected. Out of 8-bits, the first 4-bits are taken from one
IC and the next 4-bits are taken from another IC.

✓ Expanding memory capacity

The memory capacity (i.e. the number of locations) can be increased by connecting two or more
ICs in parallel. The figure shows the connection diagram for 16 K x 8 memory using four 4K x 8
memory chips.

Figure 6 16K x 8 Memory expansion using four 4k x 8 memory chips

Address lines A12 and A13 are decoded by the 2:4 decoder to select any one of the memory
chip. When A12 and A13 are 00, chip 1 will be selected. Similarly when A12 and A13 are 11,
chip 4 will be selected. Address lines A0 to A11 are used to select a particular memory location
in the selected chip.

8085 MICROPROCESSOR PROGRAMMING

Computer Languages

Assembly language is the language in which the mnemonics (short -hand form of instructions)
are used to write a program. The manufacturers of microprocessor give the mnemonics.

There are two basic types of computer languages:

➢ High-Level languages

Page 38 of 90
 ➢ Low-Level languages
✓ High-Level languages

High-level computer languages use formats that are similar to English. The purpose of
developing high-level languages was to enable people to write programs easily, in their own
native language environment (English).

Examples of high-level languages are COBOL, FORTRAN, BASIC, C, C++, JAVA, etc.

Advantages

➢ Easy to write the instructions

➢ Easy for the user to read and understand
➢ Easy find errors and modify
➢ It is easy to learn them

Disadvantages

➢ High-level language needs to be translated into low-level language, which takes up time
➢ High-level language executes slower compared to middle and low-level languages ✓
Low-Level languages

Low-Level language is the only language which can be understood by the computer.

This type of language is further divided into two types:

➢ Machine language
➢ Assembly language
✓ Machine language (Binary language)

Machine language is the language which is directly understood by the computer and uses binary
digits i.e. “1”s and “0”s.

Advantages

➢ It is easily understood by the computer

➢ They are executed directly without any translation
➢ They require very less time for their execution

Disadvantages

➢ They are difficult for the user to understand them

➢ Machine language instructions are machine-dependent, that means a program written for
a particular machine does not execute on another machine

Page 39 of 90
 ➢ In machine language, there is more chance for errors and it is very difficult to find errors,
debug and modify
✓ Assembly language (Middle-level language)

Assembly language is a computer language in which the instructions are created using symbols
such as letters, digits and special characters.

Advantages

➢ Writing instructions in assembly language is easier than writing instructions in a machine

language.
➢ Assembly language is more readable compared to machine language
➢ Easy to understand, find errors and modify

Disadvantages

➢ Assembly language is specific to particular machine architecture. That means it is

machine-dependent.
➢ Assembly language needs to be translated into machine language
➢ Assembly language executes slower compared to machine language The figure below

shows a few key points related to computer languages

◆ Instruction Set And Addressing Modes

❖ Instruction Format

The format of 8085 microprocessor instructions is shown in figure.

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 The instruction has two parts, Opcode and Operand.

Opcode (Operation code) is the part of an instruction / directive that identifies a specific
operation.

Operand is a part of an instruction / directive that represents a value on which the instruction
acts.

Operand: Data or address is given in this part. If the operand is an 8-bit data, only Operand-1 is
present in the instruction. If the operand is a 16-bit data or address, Operand-1 and Operand-2 are
specified in the instruction. Both Operand-1 and Operand-2 are optional.

Opcode: Represents the operation to be performed on the operand. It is also called mnemonic.

❖ Classification of instructions based on size

There are three groups of instructions in 8085 microprocessor based on the length or size of the
instruction. They are: -

➢ Single byte (or 1 byte) instructions

➢ Two byte instructions
➢ Three byte instructions

Single byte instructions

This type of instruction has only Opcode and the operand is specified within the Opcode itself.

Examples: (i) MOV B, C

ii) ADD B

Two byte instructions

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 This type of instruction has Opcode and one operand. The first byte represents the Opcode and
the second byte represents the 8-bit operand data or 8-bit port address.

Examples: (i) MVI A, 50H

(ii) OUT 50H

Three byte instructions

This type of instruction has Opcode and two operands. The first byte represents the Opcode, the
second byte presents the lower order 8-bits of data or address and the third byte represents the
higher order 8-bits of data or address.

Examples: (i) STA 5000H

(ii) LXI B, 5000H

❖ Classification of instructions based on function

There are 246 instructions (74 types) in the 8085 microprocessor. Based on the function of the
instruction, the instructions are classified into the following five types.

➢ Data transfer instructions

➢ Arithmetic instructions
➢ Logic and bit manipulation instructions
➢ Branch instructions
➢ Machine control instructions
✓ Data transfer instructions

These instructions move (or copy) data from source to destination. The source and destination
are registers and/or memory. Memory to memory transfer is not possible. After the data transfer,
the content of the source is not modified and the earlier content of the destination is altered. No
flags are affected.

Examples: (i) MOV A, B

(ii) MOV A, M

✓ Arithmetic instructions

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 Arithmetic operations like addition, subtraction, increment and decrement are performed by this
category of instructions. One of the operand is taken from the Accumulator and the other
operand may be from registers or memory. The result of the arithmetic operations is stored in the
Accumulator. All the flags are affected.

Examples: (i) ADD B

(ii) INR A

✓ Logic and bit manipulation instructions

Logical functions like AND, OR and EX-OR are performed by this instructions. All logic
functions are performed in relation with the contents of the Accumulator. All the flags are
affected.

Examples: (i) ANA B

(ii) CMA

✓ Branch instructions

Branch instructions change the sequence of the program execution unconditionally or

conditionally. The condition of flags is used to take the decision for conditional branches. No
flags are affected.

Examples: (i) JMP 5000H

(ii) JNZ 5000H

✓ Machine control instructions

The instructions dealing with interrupt handling and system operations are classified into this
category. No flags are affected.

Examples: (i) HLT

(ii) EI

Note: (i) A microprocessor communicates to the memory ONLY THROUGH the Accumulator
(Register A) and not any other register. Therefore, to move or store data/instructions from/to
microprocessor/memory, it has to be moved/stored to the accumulator first. That is, the
accumulator is the intermediate between microprocessor/memory and other registers.

(ii) In microprocessor programming, the instructions are written in hexadecimal

form and not in decimal form because a very big hexadecimal numbers can be
occupy the same memory space as a small decimal number. For example, the 4-
digit number in decimal form can only be a maximum of 9999 while in
Page 43 of 90
 hexadecimal it can be a maximum of FFFF (equivalent to 164-1=65535). Basic
decimal numbers are 0,1,2,3,4,5,6,7,8,9 while basic hexadecimal numbers are
0,1,2,3,4,5,6,7,8,9,A,B,C,D,E,F.

To convert a decimal number to binary, we can use a simple trick of 8421 format. For example,
to convert 9 to binary, that means we add 8 and 1. So, from the above format, 8 and 1 are
represented by binary “1” while the other digits; 4 and 2, are represented by binary “0”.
Therefore, 9 in binary form is 1001. Similarly, 7 in binary is 0111 (i.e. 4+2+1=7), 3 in binary is
0011 (i.e. 2+1=3), 45H is 01000 0101 (i.e. 4 and 5 separately solved 4 and 4+1=5), 6501 is 0110
0101 0000 0001 (i.e. 6,5,0,1 separately solved 4+2=6, 4+1=5, 0, 1) etc.

(iii) 8-bit hexadecimal numbers are two-digit numbers with a H at the end e.g. 00H,
34H,
45H, 50H etc. and they range from 00H to FFH while 16-bit hexadecimal numbers are

four-digit numbers with a H at the end e.g. 0000H, 5000H, 3243H, etc. and range from
0000H to FFFFH.

A Bit is a digit of the binary number or code (1’s and 0’s).

A byte is a 8-bit (8-digit) binary number or code

A word is a 16-bit number or code. (Some microprocessor manufactures refer the basic
data size operated by the processor as word).

H/W Convert the following decimal numbers into binary. 5, 6, 10, 0, 15, 20H, 50H, 5000H,
4362H

❖ Instruction set

An instruction is a command given to the microcomputer to perform a specific task or function

on a given data.

An instruction set is a collection of instructions that the microprocessor is designed to perform.

An instruction structure comprises of an operation code (opcode) and the address of the data
(operand).

Functionally, the instructions can be classified into five groups:

➢ Data transfer instructions

➢ Arithmetic instructions
➢ Logic and bit manipulation instructions

Page 44 of 90
 ➢ Branching instructions
➢ Machine control instruction ✓ Data Transfer
Instructions
S.No Instruction Example
Move or Copy from source to destination
1 MOV Rd, Rs MOV B, C
MOV M, Rs MOV M, A
MOV Rd, M MOV B, M
This instruction copies the contents of the source register into the destination register;
the contents of the source register are not altered.
Move Immediate 8-bit
2 MVI Rd, data MVI B, 50H
MVI M, data MVI M, 50H
The 8-bit data is stored in the destination register or memory.

Load accumulator direct LDA

3 16-bit address LDA 5000H
The contents of a memory location, specified by a 16-bit address in the operand, are
copied to the accumulator.
Load accumulator indirect LDAX
4 Register pair LDAX B
LDAX D
The contents of the designated register pair point to a memory location. This
instruction copies the contents of that memory location into the accumulator.
Load register pair immediate LXI
5 Register pair, 16-bit data LXI B, 5000H
LXI D, 5000H
LXI H, 5000H
LXI SP, 5000H
The instruction loads 16-bit data in the register pair designed in the operand
Load H and L registers direct LHLD
6 16-bit address LHLD 5000H
The instruction copies the contents of the memory location pointed by the 16-bit
address into register L and copies the contents of the next memory location into
register H.
Store accumulator direct STA
7 16-bit address STA 5000H
The contents of the accumulator are copied into the memory location specified by the
operand.
Store accumulator indirect STAX
8 Register pair (Rx) STAX B
STAX D

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 The contents of the accumulator are copied into the memory location specified by the
contents of the operand (register pair).
Store H and L registers direct SHLD
9 16-bit address SHLD 5000H
The contents of register L are stored into the memory location specified by the 16-bit
address in the operand and the contents of H register are stored into the next memory
location.
Exchange H and L with D and E XCHG
10 XCHG
The contents of register H are exchanged with the contents of register D, and the
contents of register L are exchanged with the contents of register E.
Copy H and L registers to the stack pointer SPHL
11 SPHL
Loads the contents of the H and L registers into the stack pointer register.
Exchange H and L with top of stack pointer XTHL
12 XTHL
The contents of the L register are exchanged with the stack location pointed by the
contents of the stack pointer register. The contents of the H register are exchanged
with the next stack location (SP+1).
Push register pair onto stack
13 PUSH Register pair (PSW ‘Processor Status Word’ PUSH B
means Accumulator and Flag register) PUSH D
PUSH H
PUSH PSW
The contents of the register pair designated in the operand are copied onto the stack.
Pop off stack to register pair POP
14 Reg. pair POP B
POP D
POP H
POP PSW
The contents of the memory location pointed out by the stack pointer register are
copied to registers specified.
Output data from accumulator to a port with 8-bit
15 address OUT 50H
OUT 8-bit port address
The contents of the accumulator are copied into the I/O port specified by the operand.
Input data to accumulator from a port with 8-bit
16 address IN 50H
IN 8-bit port address
The contents of the input port designated in the operand are read and loaded into the
accumulator.

✓ Arithmetic Instructions
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S.No Instruction Example
Add register or memory to accumulator
1 ADD R ADD B
ADD M ADD M
The contents of the operand (register or memory) are added to the contents of the
accumulator and the result is stored in the accumulator.
Add register or memory to accumulator with carry
2 ADC R ADC B
ADC M ADC M
The contents of the operand (register or memory) and the Carry flag are added to the
contents of the accumulator and the result is stored in the accumulator.
Add immediate to accumulator ADI
3 8-bit data ADI 45H
The 8-bit data (operand) is added to the contents of the accumulator and the result is
stored in the accumulator.
Add immediate to accumulator with carry ACI 8-bit data
4 ACI 45H
The 8-bit data (operand) and Cary flag are added to the contents of the accumulator
and the result is stored in the accumulator.
Add register pair to H and L registers DAD
5 Reg. pair DAD H

The 16-bit contents of the specified register pair are added to the contents of the HL
register and the sum is stored in the HL register.
Subtract register or memory from accumulator
6 SUB R SUB B
SUB M SUB M
The contents of the operand (register or memory) are subtracted from the contents of
the accumulator and the result is stored in the accumulator.
Subtract source and borrow from accumulator
7 SBB R SBB B
SBB M SBB M
The contents of the operand (register or memory) and the Borrow (carry flag) are
subtracted from the contents of the accumulator and the result is placed in the
accumulator.
Subtract immediate from accumulator SUI
8 8-bit data SUI 45H
The 8-bit data (operand) is subtracted from the contents of the accumulator and the
result is stored in the accumulator.
Subtract immediate from accumulator with
9 borrow SBI 45H
SBI 8-bit data

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 The 8-bit data (operand) and the Borrow (carry flag) are subtracted from the contents
of the accumulator and the result is stored in the accumulator.
Increment register or memory by 1
10 INR R INR B
INR M INR M
The content of the designated register or memory is incremented by 1 and the result is
stored in the same place.
Increment register pair by 1 INX
11 Reg. pair INX B
INX D
INX H
The contents of the designated register pair are incremented by 1 and the result is
stored in the same place.
Decrement register or memory by 1
12 DCR R DCR B
DCR M DCR M
The content of the designated register or memory is decremented by 1 and the result
is stored in the same place.
Decrement register pair by 1 DCX
13 Reg. pair DCX B
DCX D
DCX H
The contents of the designated register pair are decremented by 1 and the result is
stored in the same place.
Decimal adjust accumulator
14 DAA DAA
The contents of the accumulator are changed from a binary value to two 4-bit binary
coded decimal (BCD) digits. If the value of the low-order 4-bit in the accumulator is
greater than 9 or if AC flag is set, the instruction adds 6 to the low-order 4-bits. If the
value of the high-order 4-bits in the accumulator is greater than 9 or if the Carry flag
is set, the instruction adds 6 to the high-order 4-bits.

✓ Logic and Bit Manipulation Instructions

S.No Instruction Example
Compare register or memory with accumulator
1 CMP R CMP B
CMP M CMP M

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 The contents of the operand (register or memory) are compared with the contents of
the accumulator. Both contents are preserved. The result of the comparison is
shown by setting the flags of the PSW as follows: if (A) < (reg./mem.): carry flag is
set if (A) = (reg./mem.): zero flag is set
if (A) > (reg./mem.): carry and zero flags are set

Compare immediate with accumulator CPI

2 8-bit data CPI 50H
The second byte (8-bit data) is compared with the contents of the accumulator. The
values being compared remain unchanged. The result of the comparison is shown by
setting the flags of the PSW as follows:
if (A) < data: carry flag is set if
(A) = data: zero flag is set
if (A) > data: carry and zero flags are set
Logical AND register or memory with accumulator
3 ANA R ANA B
ANA M ANA M
The contents of the accumulator are logically ANDed (bitwise) with the contents of
the operand (register or memory), and the result is placed in the accumulator.
Logical AND immediate with accumulator ANI
4 8-bit data ANI 50H
The contents of the accumulator are logically ANDed with the 8-bit data (operand)
and the result is placed in the accumulator.
Exclusive OR register or memory with
5 accumulator XRA B
XRA R XRA M
XRA M
The contents of the accumulator are Exclussive ORed with the contents of the
operand (register or memory), and the result is placed in the accumulator.
Exclusive OR immediate with accumulator XRI
6 8-bit data XRI 50H
The contents of the accumulator are Exclusive ORed with the 8-bit data (operand)
and the result is placed in the accumulator.
Logical OR register or memory with accumulator
7 ORA R ORA B
ORA M ORA M
The contents of the accumulator are logically ORed with the contents of the operand
(register or memory), and the result is placed in the accumulator.
Logical OR immediate with accumulator ORI
8 8-bit data ORI 50H
The contents of the accumulator are logically ORed with the 8-bit data (operand) and
the result is placed in the accumulator.

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 Rotate accumulator left RLC
9 RLC
Each binary bit of the accumulator is rotated left by one position. Bit D0 is placed in
the position of D0 as well as the Carry flag.
Rotate accumulator right RRC Rotate accumulator right
10 RRC
Each binary bit of the accumulator is rotated right by one position. Bit D0 is placed in
the position of D7 as well as the Carry flag.
Rotate accumulator with carry RAL RAL
11
Each binary bit of the accumulator is rotated left by one position Carr flag. Bit D7 is
placed in the Carry flag of D7, and the Carry flag is placed in the least significant
position D0.
Rotate accumulator through right RRA RRA
12
Each binary bit of the accumulator is rotated right by one position. Bit D0 is placed in
the position of D7 as well as the Carry flag, and the Carry flag is plaved in the most
significant position D7.
Complement accumulator CMA CMA
13
The contents of the accumulator are complemented.
Complement carry CMC
14 CMC
The Carry flag is complemented. .
Set Carry STC STC
10
The Carry flag is set to 1.

✓ Branching instruction
S.No Instruction Example
Jump unconditionally JMP
1 16-bit address JMP 5000H
The program sequence is transferred to the memory location specified by the 16-bit
address given in the operand.

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 Jump conditionally
2 J condition 16-bit address JC 5000H
JNC 5000H
JP 5000H
JM 5000H
JZ 5000H
JPE 5000H
JNZ 5000H
JPO 5000H
The program sequence is transferred to the memory location specified by the 16-bit
address given in the operand based on the specified flag.
Opcode Description Flag Status
JC Jump on Carry CY=1
JNC Jump on No Carry CY=0
JP Jump on Positive S=0
JM Jump on Minus S=1
JZ Jump on Zero Z=1
JNZ Jump on No Zero Z=0
JPE Jump on Parity Even P=1
JPO Jump on Parity Odd P=0
Unconditional subroutine call CALL
3 16-bit address CALL 5000H
The program sequence is transferred to the memory location specified by the 16-bit
address given in the operand. Before the transfer, the address of the next instruction
after CALL (the contents of the program counter) is pushed onto the stack.
Call conditionally
4 C condition 16-bit address CC 5000H
CNC 5000H
CP 5000H
CM 5000H
CZ 5000H
CNZ 5000H
CPE 5000H
CPO 5000H

Page 51 of 90
 The program sequence is transferred to the memory location specified by the 16-bit
address given in the operand based on the specified flag of the PSW as described
below. Before the transfer, the address of the next instruction after the call (the
contents of the program counter) is pushed onto the stack.
Opcode Description Flag Status
CC Call on Carry CY=1
CNC Call on No Carry CY=0
CP Call on Positive S=0
CM Call on Minus S=1
CZ Call on Zero Z=1
CNZ Call on No Zero Z=0
CPE Call on Parity Even P=1

CPO Call on Parity Odd P=0

Return from subroutine unconditionally RET
5 RET
The program sequence is transferred from the subroutine to the calling program. The
two bytes from the top of the stack are copied into the program counter, and program
execution begins at the new address.
Return from subroutine conditionally
6 R condition 16-bit address RC 5000H
RNC 5000H
RP 5000H
RM 5000H
RZ 5000H
RNZ 5000H
RPE 5000H
RPO 5000H
The program sequence is transferred from the subroutine to the calling program based
on the specified flag of the PSW as described below. The two bytes from the top of
the stack are copied into the program counter, and program execution begins at the
new address.
Opcode Description Flag Status
RC Return on Carry CY=1
RNC Return on No Carry CY=0
RP Return on Positive S=0
RM Return on Minus S=1
RZ Return on Zero Z=1
RNZ Return on No Zero Z=0
RPE Return on Parity Even P=1
RPO Return on Parity Odd P=0
Load program counter with HL contents PCHL
7 PCHL
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 The contents of registers H and L are copied into the program counter. The contents
of H are placed as the high-order byte and contents of L as the low-order byte.
Restart RST
8 0-7 RST 0
RST 1
RST 2
RST 3
RST 4
RST 5
RST 6
RST 7
The RST instruction is equivalent to a 1-byte call instruction to one of the eight
memory locations depending upon the number. The addresses are:
Instruction Restart Address
RST 0 0000H
RST 1 0008H
RST 2 0010H
RST 3 0018H
RST 4 0020H
RST 5 0028H
RST 6 0030H
RST 7 0038H

✓ Machine Control Instruction

S.No Instruction Example
No operation NOP
1 NOP
No operation is performed. The instruction is fetched and decoded. However, no
operation is executed.
Halt and enter wait state HLT HLT
2
The CPU finishes executing the current instruction and halts any further execution.
An interrupt or rest is necessary to exit from the halt state.
Disable interrupts
3 DI DI
The interrupt enable flip-flop is reset and all the interrupts except the TRAP are
disabled.
Enable interrupt EI
4 EI
The interrupt enable flip-flop is set and all the interrupts are enabled. No flags are
affected.

Page 53 of 90
 Read interrupt mast RIM
5 RIM
This is a multipurpose instruction used to read the status of interrupts 7.5, 6.5, 5.5 and
read serial data input bit. The instruction loads eight bits in the accumulator with the
following interpretations.

Set interrupt mask SIM

6 SIM
This is a multipurpose instruction and is used to implement the 8085 microprocessor
interrupts 7.5, 6.5, 5.5 and serial data output. The instruction interrupts the
accumulator contents as follows:

SOD – Serial Output Data: Bit D7 of the accumulator is latched into the SOD output
line and made available to a serial peripheral if bit D6 = 1.
SDE – Serial Data Enable: If this bit = 1, it enables the serial output. To implement
serial output, this bit needs to be enabled.
XXX – Don’t Care
R7.5 – Reset RST 7.5: If this bit = 1, RST7.5 flip-flop is reset. This is an additional
control to reset RST 7.5.
MSE – Mask Set Enable: If this bit is high, it enables the functions of bits D2, D1, D0.
This is a master control over all the interrupt masking bits. If this bit is low, bits D2,
D1 and D0 do not have any effect on the masks.\
M7.5 –D2 = 0, RST 7.5 is enabled
M7.5 –D2 = 1, RST 7.5 is disabled or masked
M6.5 –D1 = 0, RST 6.5 is enabled
M6.5 –D1 = 1, RST 6.5 is disabled or masked
M5.5 –D0 = 0, RST 5.5 is enabled
M5.5 –D0 = 1, RST 5.5 is disabled or masked

❖ Addressing Modes

The different ways that a microprocessor can access data are referred to as addressing modes.

Page 54 of 90
There are five types of addressing modes in 8085 microprocessor.

➢ Direct addressing mode

➢ Immediate addressing mode
➢ Register addressing mode
➢ Register indirect addressing mode
➢ Implicit (or) implied addressing mode
✓ Direct addressing mode

In direct addressing mode, the address of the operand is directly specified in the instruction. In
this addressing mode, the instruction is two or three bytes long. The first byte is the Opcode. The
operand may be a 16-bit (2 bytes) memory address or an 8-bit (1 byte) port address.

Examples:
S.No Instruction
1 STA 5000H
2 LDA 5000H
3 IN 80H
✓ Immediate addressing mode
Remarks
This instruction stores the content of the accumulator in
memory location 5000H. Here, the memory address is given
directly in the instruction.
This instruction loads the data from memory location 5000H
accumulator. Here, the memory address is given directly in
the instruction.
This instruction loads the data from input port 80H. Here,
the port address is directly given in the instruction.

In immediate addressing mode, the operand itself is immediately given after the Opcode. The
instruction is two or three bytes long. The first byte is the Opcode. The operand may be a 16-bit
(2 bytes) immediate data or an 8-bit (1 byte) immediate data.

Examples:
S.No Instruction
1 MVI A, 50H
2 LXI B 2050H
✓ Register addressing mode
Remarks
This instruction immediately moves the data 50H into the
accumulator. Here, the data is given immediately after the
Opcode.
This instruction immediately moves the data 2050H into the
register pair BC. 20 to B register and 50 to C register. Here,
the data is given immediately after the Opcode.

In register addressing mode, a register is specified as the operand in the instruction. The
instruction is one byte long. The register name is specified in the Opcode itself.

Examples:
S.No Instruction Remarks
Page 55 of 90
 This instruction adds the content of B register with the
1 ADD B accumulator. Here, the data is in the register B.
This instruction moves the D register value to C register.
2 MOV C, D Here, C and D registers are specified as the operands.
✓ Register indirect addressing mode

In register indirect addressing mode, the content of the register pair is used as the address of the
operand in the instruction. The instruction is one byte long. The register pair contains the 16-bit
address of the memory location where the actual operand is stored.

Examples:
S.No Instruction Remarks
This instruction stores the accumulator value in memory
1 STAX B location whose address is specified by the BC register pair.
Here, the address is indirectly specified in the register pair.
This instruction moves the data from memory to
2 MOV A, M accumulator.
M means memory whose address is specified in HL register
pair. Here, address of the operand is indirectly specified in
the HL register pair.
✓ Implicit or Implied addressing mode

In implicit addressing mode, a particular register is implicitly specified as the operand in the
instruction. The instruction is one byte long. This addressing mode is also known as implied
addressing mode and inherent addressing mode.

Examples:
S.No Instruction Remarks
This instruction complements the contents of the
1 CMA accumulator.
Here, Accumulator is implicitly specified in the instruction.
This instruction rotates the contents of the accumulator left
2 RLC one time.
Here, Accumulator is implicitly specified in the instruction.

◆ Machine Cycle and Instruction Cycle

❖ Machine Cycle

Machine cycle is defined as the time required for completing one operation of accessing
memory, I/O or acknowledging an external request.

Note :- Each instruction of the 8085 processor consists of one to five machine cycles.

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Machine cycle is comprised of T-states. T-state is defined as one subdivision of the operation
performed in one clock period. The following are the various machine cycles of 8085
microprocessor.

➢ Opcode Fetch (OF)

➢ Memory Read (MR)
➢ Memory Write (MW)
➢ I/O Read (IOR)
➢ I/O Write (IOW)
➢ Interrupt Acknowledge (IA)
➢ Bus Idle (BI)

The opcode fetch cycle is a machine cycle executed to fetch the opcode of an instruction stored
in memory. Every instruction starts with opcode fetch machine cycle. All instructions have at
least one Opcode Fetch machine cycle. Depending on the type of instruction one or more other
machine cycles are required to complete the execution of the instruction. The number and type of
machine cycles for different instructions are shown in table.

S.No Instruction Number of Machine Machine Machine Machine

machine cycle-1 cycle-2 cycle-3 cycle-4
cycles
1 MOV A, B 1 OF - - -
2 MVI A, 50H 2 OF MR - -
3 LDA 5000H 4 OF MR MR MR
4 STA 5000H 4 OF MR MR MW
5 IN 80H 3 OF MR IOR -
6 OUT 80H 3 OF MR IOW -
✓ Opcode Fetch (OF) machine cycle of 8085

Each instruction of the microprocessor has one byte Opcode. The Opcode is stored in memory.
So, the processor executes the Opcode Fetch machine cycle to fetch the Opcode from memory.
Hence, every instruction starts with Opcode Fetch machine cycle. The time taken by the
microprocessor to execute the Opcode Fetch cycle is 4T (T- states). The first 3 T-states are used
for fetching the Opcode from memory and the remaining T-state is used for internal operations
by the microprocessor.

The timing diagram for Opcode Fetch machine cycle is shown in the figure below.

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The steps in Opcode Fetch machine cycle are given in the table below.

✓ Memory Read Machine Cycle of 8085

Single byte instructions require only Opcode Fetch machine cycles. But, 2-byte and 3-byte instructions
require additional machine cycles to read the operands from memory. The additional machine cycle is
called Memory Read machine cycle. For example, the instruction MVI A, 50H requires one OF machine

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cycle to fetch the operand from memory and one MR machine cycle to read the operand (50H) from
memory. The MR machine cycle takes 3 T-states.

The timing diagram for Memory Read machine cycle is shown in the figure below.

The steps in Memory Read machine cycle are given in the table below.

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 ✓ Memory Write Machine Cycle of 8085

Microprocessor uses the Memory Write machine cycle for sending the data in one of the registers to
memory. For example, the instruction STA 5000H writes the data in accumulator to the memory location
5000H. The MW machine cycle takes 3 T-states.

The timing diagram for Memory Write machine cycle is shown in the figure below.

The steps in Memory Write machine cycle are given in the table below.

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 ✓ Read Machine Cycle of 8085

Microprocessor uses the I/O Read machine cycle for receiving a data byte from the I/O port or from the
peripheral in I/O mapped I/O systems. The IN instruction uses this machine cycle during execution. The
IOR machine cycle takes 3 T-states.

The timing diagram for I/O Read machine cycle is shown in the figure below.

The steps in I/O Read machine cycle are given in the table below.

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 ✓ I/O Write Machine Cycle of 8085

Microprocessor uses the I/O Write machine cycle for sending a data byte to the I/O port or to the
peripheral in I/O mapped I/O systems. The OUT instruction uses this machine cycle during execution.
The IOR machine cycle takes 3 T-states.

The timing diagram for I/O Write machine cycle is shown in the figure below.

The steps in I/O Read machine cycle are given in the table below.

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 ❖ Instruction cycle

Instruction cycle is the sequence of operations that a processor has to carry out while executing
the instruction. Each instruction cycle of a processor consists of a number of machine cycles.

Timing diagram for MOV Rd, Rs (or MOV r1, r2) instruction

MOV Rd, Rs instruction moves (copies) the contents of the source register (Rs) into the
destination register (Rd). It is a single byte instruction. It has only Opcode Fetch machine cycle.

Some examples for MOV Rd, Rs instruction:

➢ MOV A, B
➢ MOV C, L

The time taken by the processor to execute the Opcode Fetch cycle is 4T (Tstates). The first 3
Tstates are used for fetching the Opcode from memory and the remaining T-state is used for
internal operations by the microprocessor. The timing diagram for MOV Rd, Rs (Opcode Fetch
machine cycle) is shown in the figure below. It has 4 T states.

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The steps for machine cycle of MOV Rd, Rs instruction are given in the table below.

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 ❖ Interrupts

Interrupts are the signals send by an external device to the microprocessor to request the
microprocessor to perform a particular task or work.

Interrupts are used for data transfer between the peripheral and the microprocessor. The
microprocessor will check the interrupts always at the 2nd T-state ̅̅ of last machine cycle. If there
̅
is any interrupt, it accepts the interrupt and sends the 𝐼𝑁𝑇𝐴̅̅̅̅̅̅̅̅ signal to the peripheral. The
microprocessor executes an interrupt service routine (ISR) stored in memory. It returns to the
main program by (RET) instruction, after the ISR is executed. The interrupt process is shown in
the figure below.

✓ Types of interrupts

There are six types of interrupts:-

➢ Hardware interrupts
➢ Software interrupts
➢ Maskable interrupts
➢ Non-maskable interrupts
➢ Vectored interrupts
➢ Non-vectored interrupts

Hardware interrupts :- These interrupts are given by the peripheral devices to the interrupt pin
(hardware) of the microprocessor. Hardware interrupts are also called external interrupts.

Software interrupts :- These interrupts are internally generated within the microprocessor using
software instructions. Software interrupts are also called internal interrupts.

Maskable interrupts:- These external interrupts can be delayed or rejected by the

microprocessor.

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Non-maskable interrupts:- These external interrupts cannot be delayed or rejected by the
microprocessor. Non-maskable interrupts are used for handling emergency situations.

Vectored interrupts:- When the address of the Interrupt Service Routine (ISR) is fixed within the
microprocessor itself, then the interrupt is called Vectored interrupt.

Non-vectored interrupts:- When the address of the Interrupt Service Routine (ISR) is supplied
by the peripheral device, then the interrupt is called Nonvectored interrupt.

Example of 8085 Microprocessor Programs

1. Statement: Store the data byte 32H into memory location 4000H.

Program 1:

MVI A, 32H : Store 32H in the accumulator

STA 4000H : Copy accumulator contents at address 4000H

HLT : Terminate program execution

Program 2:

LXI H : Load HL with 4000H

MVI M : Store 32H in memory location pointed by HL register pair (4000H)

HLT : Terminate program execution

Note: The result of both programs will be the same. In program 1 direct addressing instruction is
used, whereas in program 2 indirect addressing instruction is used.

2. Statement: Exchange the contents of memory locations 2000H and 4000H

Program 1:
LDA 2000H : Get the contents of memory location 2000H into accumulator

MOV B, A : Save the contents into B register

LDA 4000H : Get the contents of memory location 4000Hinto accumulator

STA 2000H : Store the contents of accumulator at address 2000H

MOV A, B : Get the saved contents back into A register

STA 4000H : Store the contents of accumulator at address 4000H

Program 2:

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LXI H 2000H : Initialize HL register pair as a pointer to memory location 2000H.

LXI D 4000H : Initialize DE register pair as a pointer to memory location 4000H.

MOV B, M : Get the contents of memory location 2000H into B register.

LDAX D : Get the contents of memory location 4000H into A register.

MOV M, A : Store the contents of A register into memory location 2000H.

MOV A, B : Copy the contents of B register into accumulator.

STAX D : Store the contents of A register into memory location 4000H.

HLT : Terminate program execution.

Note: In Program 1, direct addressing instructions are used, whereas in Program 2,

indirect addressing instructions are used.

3. Statement: Add the contents of memory locations 4000H and 4001H and place the result
in memory location 4002H.

Sample problem

(4000H) = 14H

(4001H) = 89H

Result = 14H + 89H = 9DH

Source program
LXI H 4000H : HL points 4000H

MOV A, M : Get first operand

INX H : HL points 4001H

ADD M : Add second operand

INX H : HL points 4002H

MOV M, A : Store result at 4002H

HLT : Terminate program execution

Flowchart

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 4. Statement: Subtract the contents of memory location 4001H from the memory location
2000H and place the result in memory location 4002H. Program - 4: Subtract two 8-bit
numbers

Sample problem:

(4000H) = 51H (4001H)

= 19H

Result = 51H - 19H = 38H

Source program:
LXI H, 4000H : HL points 4000H

MOV A, M : Get first operand

INX H : HL points 4001H

SUB M : Subtract second operand

INX H : HL points 4002H

MOV M, A : Store result at 4002H.

HLT : Terminate program execution

Flowchart

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 5. Statement: Add the 16-bit number in memory locations 4000H and 4001H to the 16-bit
number in memory locations 4002H and 4003H. The most significant eight bits of the
two numbers to be added are in memory locations 4001H and 4003H. Store the result in
memory locations 4004H and 4005H with the most significant byte in memory location
4005H.

Program - 5.a: Add two 16-bit numbers - Source Program 1

Sample problem:

(4000H) = 15H

(4001H) = 1CH

(4002H) = B7H

(4003H) = 5AH

Result = 1C15H + 5AB7H = 76CCH

(4004H) = CCH

(4005H) = 76H

Source Program 1:

LHLD 4000H : Get first I6-bit number in HL

XCHG : Save first I6-bit number in DE

LHLD 4002H : Get second I6-bit number in HL

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MOV A, E : Get lower byte of the first number

ADD L : Add lower byte of the second number

MOV L, A : Store result in L register

MOV A, D : Get higher byte of the first number

ADC H : Add higher byte of the second number with CARRY

MOV H, A : Store result in H register

SHLD 4004H : Store I6-bit result in memory locations 4004H and 4005H.

HLT : Terminate program execution

Program - 5b: Add two 16-bit numbers - Source Program 2 Source
program 2:
LHLD 4000H : Get first I6-bit number

XCHG : Save first I6-bit number in DE

LHLD 4002H : Get second I6-bit number in HL

DAD D : Add DE and HL

SHLD 4004H : Store I6-bit result in memory locations 4004H and 4005H.

HLT : Terminate program execution

NOTE: In program 1, eight bit addition instructions are used (ADD and ADC) and addition is
performed in two steps. First lower byte addition using ADD instruction and then higher byte
addition using ADC instruction. In program 2, 16-bit addition instruction (DAD) is used.

Flowchart

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 6. Statement: Add the contents of memory locations 40001H and 4001H and place the
result in the memory locations 4002Hand 4003H.

Sample problem:

(4000H) = 7FH

(400lH) = 89H

Result = 7FH + 89H = lO8H

(4002H) = 08H

(4003H) = 0lH

Source program:
LXI H, 4000H :HL Points
4000H
:Get first
MOV A, M
operand
:HL Points
INX H
4001H
:Add second
ADD M
operand

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 :HL Points
INX H 4002H
MOV M, A :Store the lower byte of
result at 4002H
:Initialize higher byte result
MVIA, 00
with 00H
:Add carry in the high byte
ADC A
result
INX H :HL Points 4003H
:Store the higher byte of
MOV M, A
result at 4003H
:Terminate program
HLT execution
Flowchart

7. Statement: Subtract the 16-bit number in memory locations 4002H and 4003H from the
16-bit number in memory locations 4000H and 4001H. The most significant eight bits of
the two numbers are in memory locations 4001H and 4003H. Store the result in memory
locations 4004H and 4005H with the most significant byte in memory location 4005H.

Sample problem

(4000H) = 19H

(400IH) = 6AH

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(4004H) = I5H (4003H) = 5CH

Result = 6A19H - 5C15H = OE04H

(4004H) = 04H (4005H)

= OEH

Source program:
LHLD 4000H : Get first 16-bit number in HL

XCHG : Save first 16-bit number in DE

LHLD 4002H : Get second 16-bit number in HL

MOV A, E : Get lower byte of the first number

SUB L : Subtract lower byte of the second number

MOV L, A : Store the result in L register

MOV A, D : Get higher byte of the first number

SBB H : Subtract higher byte of second number with borrow

MOV H, A : Store l6-bit result in memory locations 4004H and 4005H

SHLD 4004H : Store l6-bit result in memory locations 4004H and 4005H

HLT : Terminate program execution.

Flowchart

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 8. Statement: Find the l's complement of the number stored at memory location 4400H and
store the complemented number at memory location 4300H.

Sample problem:

(4400H) = 55H Result =

(4300B) = AAB Source
program:
LDA 4400B : Get the number

CMA : Complement number

STA 4300H : Store the result

HLT : Terminate program execution

Flowchart

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 9. Statement: Find the 2's complement of the number stored at memory location 4200H and
store the complemented number at memory location 4300H.

Sample problem:

(4200H) = 55H

Result = (4300H) = AAH + 1 = ABH

Source program:

LDA 4200H : Get the number

CMA : Complement the number

ADI, 01 H : Add one in the number

STA 4300H : Store the result

HLT : Terminate program execution

Flowchart

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 10. Statement: Multiply two 8-bit numbers stored in memory locations 2200H and 2201H by
repetitive addition and store the result in memory locations 2300H and 2301H.

Sample problem:

(2200H) = 03H

(2201H) = B2H

Result = B2H + B2H + B2H = 216H

= 216H

(2300H) = 16H

(2301H) = 02H

Source program

LDA 2200H

MOV E, A

MVI D, 00 : Get the first number in DE register pair

LDA 2201H

MOV C, A : Initialize counter

LX I H, 0000 H : Result = 0

BACK: DAD D : Result = result + first number

DCR C : Decrement count

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 JNZ BACK : If count 0 repeat

SHLD 2300H : Store result

HLT : Terminate program execution

Flowchart

11. Addition of two 8-bit numbers

Aim: To perform addition of two 8-bit numbers using 8085.

Algorithm:

i. Start the program by loading the first data into accumulator

ii. Move the data to a register (B register)
iii. Get the second data and load into accumulator
iv. Add the two register contents

v. Check for carry

vi. Store the value of sum and carry in memory location
vii. Terminate the program Program:

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Observation:

12. Subtraction of two 8-bit numbers

Aim: To perform addition of two 8-bit numbers using 8085.

Program:

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 13. Multiplication of two 8-bit numbers

Aim: To perform the multiplication of two 8-bit numbers using 8085.

Algorithm:

Program:

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 14. Division of 8-bit numbers

Aim: To perform the division of two 8-bit numbers using 8085.

Program:

Observation:

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 15. Largest number in an array of data

Aim: To find the largest number in an array of data using 8085 instruction set Algorithm:

Program:

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 16. Smallest number in an array of data

Aim: To find the smallest number in an array of data using 8085 instruction set Algorithm:

Program:

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 17. Arrange an array of data in ascending order

Aim: To write a program to arrange an array of data in ascending order Algorithm:

Program:

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 18. Arrange an array of data in descending order

Aim: To write a program to arrange an array of data in descending order Algorithm:

Program:

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Observation:

19. BCD to Hexadecimal conversion

Aim: To convert BCD numbers in memory to the equivalent HEX number using 8085
instruction set

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 20. Hexadecimal to BCD conversion

Aim: To convert Hexadecimal numbers in memory to the equivalent BCD number using 8085
instruction set

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 21. HEX to ASCII conversion

Aim: To convert Hexadecimal numbers in memory to the equivalent ASCII character using 8085
instruction set

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 22. ASCII to HEX conversion

Aim: To convert ASCII character into its equivalent Hexadecimal number using 8085 instruction
set

23. Square of a number using look up table

Aim: To find the square of the number from 0 to 9 using a Table of Square

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