Lab1_Semiconductor_HanhPhuc-QuangThanh_20ECE

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THE UNIVERSITY OF DANANG – UNIVERSITY OF SCIENCE AND

TECHNOLOGY

FACULTY OF ADVANCED SCIENCE AND TECHNOLOGY

***

REPORT

DESIGN OF DIGITAL CIRCUITS AND SYSTEMS

ATM SIMULATION USING FPGA

Lecturer: THÁI VŨ HIỀN

Student Name: TRẦN QUANG THÀNH

HOÀNG THỊ HẠNH PHÚC

Class: 20ECE

Danang, March 28, 2024


Lab 1: Basic MOSFET I-V Curves
1. Draw I-V curves of NMOS.

1.1 With width 1x 2x 4x.


1.1.1 Temperature = −400 C
1.1.2 Temperature = 1250 C

1.2 With Length 1x; 1.5x; 2x


1.2.1 Temperature = −400 C
1.2.2 Temperature = 1250 C

2. Draw I-V curves of PMOS

2.1 With width 1x; 2x; 4x


2.1.1 Temperature = −400 C
2.1.2 Temperature = 1250 C

2.2 With length 1x; 1.5x; 2x

2.2.1 Temperature = −400 C

2.2.2 Temperature = 1250 C


3. Measure Idsat and Ioff of NMOS and PMOS.

Width Length Vdd Temperatur Process Saturation Ioff


(um) (um) (V) e corner current (mA)
(uA)
0.3 0.028 0.9 0
−40 C 0.4
0.6 TT 0.6 0
Width 1.2 0.7
variation 0.3 0.028 0.9 0
125 C 0.26
0.6 TT 0.6 0
NMOS 1.2 1.2
0.3 0.028 0.9 0
−40 C 340
0.042 TT 360 0
Length 0.056 410
variation 0.3 0.028 0.9 0
125 C 145
0.042 TT 195 0
0.056 300

Width Length Vdd Temperatur Process Saturation Ioff


(um) (um) (V) e corner current (mA)
(uA)
0.3 0.028 0.9 −40 C
0 -236.59
0.6 TT -486.44 0
Width 1.2 -972.24
variation 0.3 0.028 0.9 0
125 C -90
0.6 TT -182.04 0
PMOS 1.2 -377.78
0.3 0.028 0.9 −40 C
0 -140
0.042 TT -170 0
Length 0.056 -240
variation 0.3 0.028 0.9 0
125 C -35
0.042 TT -49 0
0.056 -92

4. Explain and conclude about the trend of: Idsat versus Temperature; Idsat versus W;
Idsat versus L. Do the same for Ioff.

Idsat (drain current in saturation)


 Temperature: Idsat likely increases with higher temperatures. This is because higher
temperature increases the mobility of carriers in the channel, allowing more current to
flow for the same gate voltage. We can see this trend in both NMOS and PMOS tables.
For example, in the NMOS table, at 0.3 um width and 0.028 um length, Idsat increases
from 0.4 mA at -40°C to 0.26 mA at 125°C.
 Width: Idsat likely increases with wider transistors. This is because a wider channel
allows more current to flow for the same gate voltage. This trend is also observed in both
tables. For instance, in the NMOS table, at 0.028 um length and 125°C temperature,
Idsat increases from 0.26 mA at 0.3 um width to 0.7 mA at 1.2 um width.
 Length: Idsat likely decreases with longer transistors. This is because a longer channel
offers higher resistance to current flow, reducing the drain current. This trend is evident
in the NMOS table. For example, at 0.3 um width and 125°C temperature, Idsat goes
from 0.7 mA at 0.028 um length to 0.41 mA at 0.056 um length.
Ioff (leakage current)
 Temperature: Ioff likely increases with higher temperatures. Leakage current arises
from various mechanisms that are temperature-dependent, such as sub-threshold
conduction and thermal generation of carriers. This trend is observed in both NMOS and
PMOS tables. For instance, in the PMOS table, at 0.3 um width and 0.028 um length,
Ioff increases from -140 uA at -40°C to -35 uA at 125°C.
 Width: Ioff likely increases with wider transistors. As the width increases, there is more
area for leakage current to flow through. This trend is evident in both tables. For
example, in the PMOS table, at 0.028 um length and 125°C temperature, Ioff increases
from -35 uA at 0.3 um width to -49 uA at 0.6 um width.
 Length: The effect of length on Ioff is complex and depends on the specific device
design. In the tables, there is no clear trend observed for Ioff with respect to length.

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