1MRK505344-UUS B en Technical Manual Line Differential Protection RED670 2.1 ANSI

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R E L I O N ® 670 SERIES
Line differential protection RED670

Version 2.1 ANSI
Technical manual
Document ID: 1MRK 505 344-UUS
Issued: March 2019
Revision: B
Product version: 2.1
© Copyright 2016 ABB. All rights reserved

Copyright
This document and parts thereof must not be reproduced or copied without written permission
from ABB, and the contents thereof must not be imparted to a third party, nor used for any
unauthorized purpose.
The software and hardware described in this document is furnished under a license and may be
used or disclosed only in accordance with the terms of such license.
This product includes software developed by the OpenSSL Project for use in the OpenSSL Toolkit.
(http://www.openssl.org/) This product includes cryptographic software written/developed by:
Eric Young (eay@cryptsoft.com) and Tim Hudson (tjh@cryptsoft.com).
Trademarks
ABB and Relion are registered trademarks of the ABB Group. All other brand or product names
mentioned in this document may be trademarks or registered trademarks of their respective
holders.
Warranty
Please inquire about the terms of warranty from your nearest ABB representative.
Disclaimer
The data, examples and diagrams in this manual are included solely for the concept or product
description and are not to be deemed as a statement of guaranteed properties. All persons
responsible for applying the equipment addressed in this manual must satisfy themselves that
each intended application is suitable and acceptable, including that any applicable safety or other
operational requirements are complied with. In particular, any risks in applications where a system
failure and/or product failure would create a risk for harm to property or persons (including but
not limited to personal injuries or death) shall be the sole responsibility of the person or entity
applying the equipment, and those so responsible are hereby requested to ensure that all
measures are taken to exclude or mitigate such risks.
This document has been carefully checked by ABB but deviations cannot be completely ruled out.
In case any errors are detected, the reader is kindly requested to notify the manufacturer. Other
than under explicit contractual commitments, in no event shall ABB be responsible or liable for any
loss or damage resulting from the use of this manual or the application of the equipment.
Conformity
This product complies with the directive of the Council of the European Communities on the
approximation of the laws of the Member States relating to electromagnetic compatibility (EMC
Directive 2004/108/EC) and concerning electrical equipment for use within specified voltage
limits (Low-voltage directive 2006/95/EC). This conformity is the result of tests conducted by ABB
in accordance with the product standard EN 60255-26 for the EMC directive, and with the product
standards EN 60255-1 and EN 60255-27 for the low voltage directive. The product is designed in
accordance with the international standards of the IEC 60255 series and ANSI C37.90.
Table of contents
Table of contents
Section 1 Introduction........................................................................................................... 45
1.1 This manual..............................................................................................................................................45
1.2 Intended audience..................................................................................................................................45
1.3 Product documentation........................................................................................................................46
1.3.1 Product documentation set.............................................................................................................46
1.3.2 Document revision history............................................................................................................... 47
1.3.3 Related documents............................................................................................................................47
1.4 Document symbols and conventions................................................................................................. 48
1.4.1 Symbols................................................................................................................................................48
1.4.2 Document conventions.....................................................................................................................49
1.5 IEC61850 edition 1 / edition 2 mapping............................................................................................ 50
Section 2 Available functions................................................................................................ 59

2.1 Main protection functions.................................................................................................................... 59
2.2 Back-up protection functions..............................................................................................................60
2.3 Control and monitoring functions...................................................................................................... 61
2.4 Communication...................................................................................................................................... 65
2.5 Basic IED functions.................................................................................................................................67
Section 3 Analog inputs..........................................................................................................71

3.1 Introduction............................................................................................................................................. 71
3.2 Function block......................................................................................................................................... 71
3.3 Signals....................................................................................................................................................... 71
3.4 Settings.................................................................................................................................................... 74
3.5 Monitored data........................................................................................................................................81
3.6 Operation principle................................................................................................................................ 82
3.7 Technical data......................................................................................................................................... 83
Section 4 Binary input and output modules........................................................................ 85

4.1 Binary input..............................................................................................................................................85
4.1.1 Binary input debounce filter............................................................................................................ 85
4.1.2 Oscillation filter.................................................................................................................................. 85
4.1.3 Settings................................................................................................................................................85
4.1.3.1 Setting parameters for binary input modules.......................................................................... 85
4.1.3.2 Setting parameters for binary input/output module............................................................. 86
Section 5 Local Human-Machine-Interface LHMI ............................................................... 87

5.1 Local HMI screen behaviour..................................................................................................................87
5.1.1 Identification.......................................................................................................................................87
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5.1.2 Settings................................................................................................................................................ 87
5.2 Local HMI signals.................................................................................................................................... 87
5.2.1 Identification.......................................................................................................................................87
5.2.2 Function block.................................................................................................................................... 88
5.2.3 Signals.................................................................................................................................................. 88
5.3 Basic part for LED indication module................................................................................................ 88
5.3.1 Identification...................................................................................................................................... 88
5.3.2 Function block.................................................................................................................................... 89
5.3.3 Signals.................................................................................................................................................. 89
5.3.4 Settings................................................................................................................................................90
5.4 LCD part for HMI function keys control module.............................................................................. 90
5.4.1 Identification...................................................................................................................................... 90
5.4.2 Function block.................................................................................................................................... 90
5.4.3 Signals.................................................................................................................................................. 91
5.4.4 Settings................................................................................................................................................ 91
5.5 Operation principle................................................................................................................................ 92
5.5.1 Local HMI..............................................................................................................................................92
5.5.1.1 Keypad.............................................................................................................................................. 93
5.5.1.2 Display...............................................................................................................................................95
5.5.1.3 LEDs................................................................................................................................................... 97
5.5.2 LED configuration alternatives....................................................................................................... 98
5.5.2.1 Functionality ................................................................................................................................... 98
5.5.2.2 Status LEDs......................................................................................................................................98
5.5.2.3 Indication LEDs............................................................................................................................... 99
5.5.3 Function keys.................................................................................................................................... 106
5.5.3.1 Functionality ................................................................................................................................. 106
5.5.3.2 Operation principle...................................................................................................................... 106
Section 6 Differential protection........................................................................................109

6.1 High impedance differential protection, single phase HZPDIF (87).......................................... 109
6.1.1 Identification.................................................................................................................................... 109
6.1.2 Functionality..................................................................................................................................... 109
6.1.3 Function block.................................................................................................................................. 109
6.1.4 Signals.................................................................................................................................................110
6.1.5 Settings.............................................................................................................................................. 110
6.1.6 Monitored data................................................................................................................................. 110
6.1.7 Operation principle.......................................................................................................................... 110
6.1.7.1 Logic diagram................................................................................................................................ 112
6.1.8 Technical data................................................................................................................................... 113
6.2 Low impedance restricted earth fault protection REFPDIF (87N).............................................. 113
6.2.1 Identification..................................................................................................................................... 114
6.2.2 Functionality......................................................................................................................................114
6.2.3 Function block................................................................................................................................... 115
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6.2.4 Signals.................................................................................................................................................115
6.2.5 Settings.............................................................................................................................................. 116
6.2.6 Monitored data................................................................................................................................. 116
6.2.7 Operation principle...........................................................................................................................117
6.2.7.1 Fundamental principles of the restricted ground fault protection.....................................117
6.2.7.2 Restricted ground fault protection, low impedance differential protection....................119
6.2.7.3 Calculation of differential current and bias current...............................................................119
6.2.7.4 Detection of external ground faults..........................................................................................120
6.2.7.5 Algorithm of the restricted ground fault protection............................................................. 122
6.2.8 Technical data................................................................................................................................... 123
6.3 Line differential protection.................................................................................................................123
6.3.1 Identification..................................................................................................................................... 123
6.3.2 Functionality......................................................................................................................................124
6.3.2.1 Line differential protection, 3 or 6 CT sets L3CPDIF, L6CPDIF............................................ 124
6.3.2.2 Line differential protection 3 or 6 CT sets, with in-zone transformers LT3CPDIF ,
LT6CPDIF ........................................................................................................................................125
6.3.2.3 Analog signal transfer for line differential protection.......................................................... 126
6.3.3 Function block...................................................................................................................................128
6.3.4 Signals................................................................................................................................................ 130
6.3.5 Settings.............................................................................................................................................. 136
6.3.6 Monitored data.................................................................................................................................145
6.3.7.1 Algorithm and logic...................................................................................................................... 147
6.3.7.2 Time synchronization...................................................................................................................154
6.3.7.3 Analog signal communication for line differential protection............................................ 156
6.3.7.4 Open CT detection feature......................................................................................................... 158
6.3.7.5 Binary signal transfer...................................................................................................................160
6.3.7.6 Line differential coordination function LDLPSCH (87L)....................................................... 160
6.3.8 Technical data...................................................................................................................................164
6.4 Additional security logic for differential protection LDRGFC (11).............................................. 167
6.4.1 Identification.....................................................................................................................................167
6.4.2 Functionality......................................................................................................................................167
6.4.3 Function block.................................................................................................................................. 168
6.4.4 Signals................................................................................................................................................ 169
6.4.5 Settings.............................................................................................................................................. 169
6.4.6 Monitored data................................................................................................................................. 170
6.4.7 Operation principle...........................................................................................................................171
6.4.8 Technical data................................................................................................................................... 174
Section 7 Impedance protection......................................................................................... 175

7.1 Distance measuring zones, quadrilateral characteristic ZMQPDIS (21), ZMQAPDIS (21),
ZDRDIR (21D)..........................................................................................................................................175
7.1.1 Identification..................................................................................................................................... 175
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7.1.2 Functionality......................................................................................................................................175
7.1.3 Function block...................................................................................................................................176
7.1.4 Signals.................................................................................................................................................177
7.1.5 Settings.............................................................................................................................................. 179
7.1.6 Monitored data................................................................................................................................. 181
7.1.7.1 Full scheme measurement...........................................................................................................181
7.1.7.2 Impedance characteristic............................................................................................................182
7.1.7.3 Minimum operating current....................................................................................................... 186
7.1.7.4 Measuring principles....................................................................................................................186
7.1.7.5 Directional impedance element for quadrilateral characteristics...................................... 189
7.1.7.6 Simplified logic diagrams........................................................................................................... 190
7.1.8 Technical data...................................................................................................................................194
7.2 Phase selection, quadrilateral characteristic with fixed angle FDPSPDIS (21).........................195
7.2.1 Identification.....................................................................................................................................195
7.2.1.1 Identification................................................................................................................................. 195
7.2.2 Functionality..................................................................................................................................... 195
7.2.3 Function block.................................................................................................................................. 196
7.2.4 Signals................................................................................................................................................ 196
7.2.5 Settings.............................................................................................................................................. 197
7.2.6 Operation principle..........................................................................................................................198
7.2.6.1 Phase-to-ground fault................................................................................................................. 200
7.2.6.2 Phase-to-phase fault.................................................................................................................... 201
7.2.6.3 Three-phase faults....................................................................................................................... 203
7.2.6.4 Load encroachment..................................................................................................................... 204
7.2.6.5 Minimum operate currents......................................................................................................... 207
7.2.7 Technical data................................................................................................................................... 213
7.3 Distance measuring zone, quadrilateral characteristic for series compensated lines
ZMCPDIS (21), ZMCAPDIS (21), ZDSRDIR (21D)................................................................................ 213
7.3.1 Identification..................................................................................................................................... 213
7.3.2 Functionality......................................................................................................................................214
7.3.3 Function block...................................................................................................................................215
7.3.4 Signals................................................................................................................................................ 215
7.3.5 Settings.............................................................................................................................................. 217
7.3.6 Monitored data................................................................................................................................. 221
7.3.7.1 Full scheme measurement...........................................................................................................221
7.3.7.2 Impedance characteristic............................................................................................................222
7.3.7.4 Measuring principles.................................................................................................................... 225
7.3.7.5 Directionality for series compensation....................................................................................228
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7.3.8 Technical data...................................................................................................................................233

7.4 Full-scheme distance measuring, Mho characteristic ZMHPDIS (21)........................................ 234
7.4.1 Identification.................................................................................................................................... 234
7.4.2 Functionality..................................................................................................................................... 234
7.4.3 Function block.................................................................................................................................. 235
7.4.4 Signals................................................................................................................................................ 235
7.4.5 Settings.............................................................................................................................................. 237
7.4.6.1 Full scheme measurement.......................................................................................................... 238
7.4.6.2 Impedance characteristic........................................................................................................... 238
7.4.6.3 Basic operation characteristics................................................................................................. 239
7.4.6.4 Theory of operation......................................................................................................................241
7.4.7 Technical data...................................................................................................................................253
7.5 Full-scheme distance protection, quadrilateral for earth faults ZMMPDIS (21),
ZMMAPDIS (21)......................................................................................................................................254
7.5.1 Identification.................................................................................................................................... 254
7.5.2 Functionality..................................................................................................................................... 254
7.5.3 Function block.................................................................................................................................. 255
7.5.4 Signals................................................................................................................................................ 256
7.5.5 Settings.............................................................................................................................................. 257
7.5.6.1 Full scheme measurement..........................................................................................................259
7.5.6.3 Minimum operating current........................................................................................................261
7.5.6.4 Measuring principles.................................................................................................................... 261
7.5.6.5 Directionality................................................................................................................................. 264
7.5.7 Technical data.................................................................................................................................. 268
7.6 Directional impedance element for mho characteristic and additional distance
protection directional function for earth faults ZDMRDIR (21D), ZDARDIR............................. 269
7.6.1 Identification.................................................................................................................................... 269
7.6.2 Functionality..................................................................................................................................... 269
7.6.3 Function block.................................................................................................................................. 269
7.6.4 Signals................................................................................................................................................ 270
7.6.5 Settings.............................................................................................................................................. 271
7.6.6 Monitored data................................................................................................................................. 272
7.6.7.1 Directional impedance element for mho characteristic ZDMRDIR (21D)...........................272
7.6.7.2 Additional distance protection directional function for ground faults ZDARDIR........... 274
7.7 Mho impedance supervision logic ZSMGAPC................................................................................. 276
7.7.1 Identification.....................................................................................................................................276
7.7.2 Functionality......................................................................................................................................277
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7.7.3 Function block...................................................................................................................................277

7.7.4 Signals................................................................................................................................................ 277
7.7.5 Settings.............................................................................................................................................. 278
7.7.6.1 Fault inception detection............................................................................................................278
7.8 Faulty phase identification with load encroachment FMPSPDIS (21)........................................ 279
7.8.1 Identification.....................................................................................................................................279
7.8.2 Functionality..................................................................................................................................... 280
7.8.3 Function block.................................................................................................................................. 280
7.8.4 Signals................................................................................................................................................280
7.8.5 Settings.............................................................................................................................................. 281
7.8.6.1 The phase selection function..................................................................................................... 282
7.8.7 Technical data...................................................................................................................................292
7.9 Distance protection zone, quadrilateral characteristic, separate settings ZMRPDIS
(21), ZMRAPDIS (21) and ZDRDIR (21D)............................................................................................. 293
7.9.1 Identification.................................................................................................................................... 293
7.9.2 Functionality..................................................................................................................................... 293
7.9.3 Function block.................................................................................................................................. 294
7.9.4 Signals................................................................................................................................................ 295
7.9.5 Settings.............................................................................................................................................. 297
7.9.6.1 Full scheme measurement..........................................................................................................299
7.9.6.5 Directional impedance element for quadrilateral characteristics..................................... 306
7.9.7 Technical data...................................................................................................................................310
7.10 Phase selection, quadrilateral characteristic with settable angle FRPSPDIS (21)....................311
7.10.1 Identification..................................................................................................................................... 311
7.10.2 Functionality...................................................................................................................................... 311
7.10.3 Function block...................................................................................................................................312
7.10.4 Signals.................................................................................................................................................312
7.10.5 Settings.............................................................................................................................................. 313
7.10.6.1 Phase-to-ground fault..................................................................................................................316
7.10.6.2 Phase-to-phase fault.................................................................................................................... 318
7.10.6.3 Three-phase faults........................................................................................................................319
7.10.6.5 Minimum operate currents......................................................................................................... 324
7.10.7 Technical data...................................................................................................................................330
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7.11 High speed distance protection ZMFPDIS (21).............................................................................. 330

7.11.1 Identification.................................................................................................................................... 330
7.11.2 Functionality..................................................................................................................................... 330
7.11.3 Function block.................................................................................................................................. 332
7.11.4 Signals................................................................................................................................................ 333
7.11.5 Settings..............................................................................................................................................335
7.11.6 Monitored data................................................................................................................................ 340
7.11.7.1 Filtering...........................................................................................................................................341
7.11.7.2 Distance measuring zones.......................................................................................................... 341
7.11.7.3 Phase-selection element............................................................................................................. 342
7.11.7.4 Directional element......................................................................................................................344
7.11.7.5 Fuse failure.................................................................................................................................... 344
7.11.7.6 Power swings................................................................................................................................ 345
7.11.7.9 Simplified logic schemes............................................................................................................ 356
7.11.7.10 Measurement.................................................................................................................................362
7.11.8 Technical data...................................................................................................................................367
7.12 High speed distance protection for series compensated lines ZMFCPDIS (21)......................368
7.12.1 Identification.................................................................................................................................... 368
7.12.2 Functionality..................................................................................................................................... 368
7.12.3 Function block.................................................................................................................................. 369
7.12.4 Signals................................................................................................................................................ 370
7.12.5 Settings.............................................................................................................................................. 372
7.12.6 Monitored data.................................................................................................................................379
7.12.7 Operation principle......................................................................................................................... 380
7.12.7.1 Filtering.......................................................................................................................................... 380
7.12.7.2 Distance measuring zones......................................................................................................... 380
7.12.7.3 Phase-selection element............................................................................................................. 381
7.12.7.4 Directional element...................................................................................................................... 382
7.12.7.5 Fuse failure.....................................................................................................................................383
7.12.7.6 Power swings................................................................................................................................ 383
7.12.7.7 Measurement principles..............................................................................................................383
7.12.7.9 Simplified logic schemes............................................................................................................ 396
7.12.7.10 Measurement.................................................................................................................................401
7.12.8 Technical data.................................................................................................................................. 406
7.13 Power swing detection ZMRPSB (68).............................................................................................. 406
7.13.1 Identification.................................................................................................................................... 406
7.13.2 Functionality.....................................................................................................................................406
7.13.3 Function block.................................................................................................................................. 407
7.13.4 Signals................................................................................................................................................407
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7.13.5 Settings............................................................................................................................................. 408

7.13.6.1 Resistive reach in forward direction......................................................................................... 410
7.13.6.2 Resistive reach in reverse direction...........................................................................................411
7.13.6.3 Reactive reach in forward and reverse direction.................................................................... 412
7.13.6.4 Basic detection logic.................................................................................................................... 412
7.13.6.5 Operating and inhibit conditions.............................................................................................. 414
7.13.7 Technical data...................................................................................................................................415
7.14 Automatic switch onto fault logic ZCVPSOF ................................................................................. 415
7.14.1 Identification.....................................................................................................................................415
7.14.2 Functionality..................................................................................................................................... 415
7.14.3 Function block.................................................................................................................................. 416
7.14.4 Signals................................................................................................................................................ 416
7.14.5 Settings..............................................................................................................................................416
7.14.6 Monitored data................................................................................................................................. 417
7.14.8 Technical data...................................................................................................................................419
7.15 Power swing logic PSLPSCH ............................................................................................................. 420
7.15.1 Identification.................................................................................................................................... 420
7.15.2 Functionality..................................................................................................................................... 420
7.15.3 Function block.................................................................................................................................. 420
7.15.4 Signals................................................................................................................................................ 421
7.15.5 Settings.............................................................................................................................................. 421
7.15.6.1 Communication and tripping logic........................................................................................... 422
7.15.6.2 Blocking logic................................................................................................................................ 422
7.16 Pole slip protection PSPPPAM (78)................................................................................................... 424
7.16.1 Identification.................................................................................................................................... 424
7.16.2 Functionality..................................................................................................................................... 424
7.16.3 Function block.................................................................................................................................. 425
7.16.4 Signals................................................................................................................................................ 425
7.16.5 Settings..............................................................................................................................................426
7.16.6 Monitored data.................................................................................................................................427
7.16.8 Technical data.................................................................................................................................. 430
7.17 Out-of-step protection OOSPPAM (78)............................................................................................431
7.17.1 Identification.....................................................................................................................................431
7.17.2 Functionality......................................................................................................................................431
7.17.3 Function block...................................................................................................................................431
7.17.4 Signals................................................................................................................................................ 432
7.17.5 Settings..............................................................................................................................................433
7.17.6 Monitored data................................................................................................................................ 434
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7.17.7.1 Lens characteristic....................................................................................................................... 437

7.17.7.2 Detecting an out-of-step condition..........................................................................................439
7.17.7.3 Maximum slip frequency............................................................................................................. 439
7.17.7.4 Taking care of the circuit breaker ............................................................................................440
7.17.7.5 Design............................................................................................................................................. 442
7.17.8 Technical data.................................................................................................................................. 443
7.18 Phase preference logic PPLPHIZ....................................................................................................... 443
7.18.1 Identification.................................................................................................................................... 443
7.18.2 Functionality.....................................................................................................................................444
7.18.3 Function block..................................................................................................................................444
7.18.4 Signals................................................................................................................................................444
7.18.5 Settings............................................................................................................................................. 445
7.18.6.1 Residual current criteria..............................................................................................................446
7.18.6.2 Phase selection............................................................................................................................. 447
7.18.6.3 Preference logic............................................................................................................................ 448
7.18.6.4 Output.............................................................................................................................................451
Section 8 Current protection.............................................................................................. 453

8.1 Instantaneous phase overcurrent protection PHPIOC (50).........................................................453
8.1.1 Identification.................................................................................................................................... 453
8.1.2 Functionality..................................................................................................................................... 453
8.1.3 Function block.................................................................................................................................. 453
8.1.4 Signals................................................................................................................................................453
8.1.5 Settings............................................................................................................................................. 454
8.1.6 Monitored data................................................................................................................................ 455
8.1.8 Technical data.................................................................................................................................. 455
8.2 Four step phase overcurrent protection OC4PTOC(51/67)........................................................ 456
8.2.1 Identification.................................................................................................................................... 456
8.2.2 Functionality..................................................................................................................................... 456
8.2.3 Function block.................................................................................................................................. 457
8.2.4 Signals................................................................................................................................................ 457
8.2.5 Settings............................................................................................................................................. 459
8.2.6 Monitored data................................................................................................................................ 465
8.2.8 Technical data...................................................................................................................................473
8.3 Instantaneous residual overcurrent protection EFPIOC (50N)................................................... 473
8.3.1 Identification.................................................................................................................................... 474
8.3.2 Functionality..................................................................................................................................... 474
8.3.3 Function block.................................................................................................................................. 474
8.3.4 Signals................................................................................................................................................474
8.3.5 Settings..............................................................................................................................................475
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8.3.6 Monitored data.................................................................................................................................475

8.3.8 Technical data...................................................................................................................................476
8.4 Four step residual overcurrent protection, (Zero sequence or negative sequence
directionality) EF4PTOC (51N/67N)..................................................................................................476
8.4.1 Identification.................................................................................................................................... 476
8.4.2 Functionality..................................................................................................................................... 476
8.4.3 Function block.................................................................................................................................. 477
8.4.4 Signals................................................................................................................................................ 477
8.4.5 Settings..............................................................................................................................................478
8.4.6 Monitored data................................................................................................................................ 485
8.4.7.1 Operating quantity within the function...................................................................................485
8.4.7.2 Internal polarizing........................................................................................................................ 486
8.4.7.3 External polarizing for ground-fault function........................................................................ 488
8.4.7.4 Directional detection for ground fault function.................................................................... 488
8.4.7.5 Base quantities within the protection..................................................................................... 488
8.4.7.6 Internal ground-fault protection structure.............................................................................489
8.4.7.7 Four residual overcurrent steps................................................................................................ 489
8.4.7.8 Directional supervision element with integrated directional comparison function...... 490
8.4.7.9 Second harmonic blocking element......................................................................................... 492
8.4.7.10 Switch on to fault feature...........................................................................................................494
8.4.8 Technical data.................................................................................................................................. 496
8.5 Four step directional negative phase sequence overcurrent protection NS4PTOC (46I2)...497
8.5.1 Identification.................................................................................................................................... 497
8.5.2 Functionality..................................................................................................................................... 497
8.5.3 Function block..................................................................................................................................498
8.5.4 Signals................................................................................................................................................498
8.5.5 Settings............................................................................................................................................. 499
8.5.6 Monitored data................................................................................................................................ 504
8.5.7.1 Operating quantity within the function.................................................................................. 504
8.5.7.2 Internal polarizing facility of the function...............................................................................505
8.5.7.3 External polarizing for negative sequence function............................................................. 505
8.5.7.4 Internal negative sequence protection structure..................................................................506
8.5.7.5 Four negative sequence overcurrent stages.......................................................................... 506
8.5.7.6 Directional supervision element with integrated directional comparison function...... 507
8.5.8 Technical data.................................................................................................................................. 509
8.6 Sensitive directional residual overcurrent and power protection SDEPSDE (67N)................ 510
8.6.1 Identification.....................................................................................................................................510
8.6.2 Functionality..................................................................................................................................... 510
8.6.3 Function block...................................................................................................................................512
8.6.4 Signals................................................................................................................................................ 513
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8.6.5 Settings.............................................................................................................................................. 514

8.6.6 Monitored data................................................................................................................................. 516
8.6.7.1 Function inputs............................................................................................................................. 516
8.6.8 Technical data...................................................................................................................................522
8.7 Thermal overload protection, one time constant Fahrenheit/Celsius LFPTTR/
LCPTTR (26)........................................................................................................................................... 523
8.7.1 Identification.................................................................................................................................... 524
8.7.2 Functionality..................................................................................................................................... 524
8.7.3 Function block.................................................................................................................................. 524
8.7.4 Signals................................................................................................................................................ 525
8.7.5 Settings..............................................................................................................................................526
8.7.6 Monitored data................................................................................................................................. 527
8.7.8 Technical data................................................................................................................................... 531
8.8 Breaker failure protection CCRBRF(50BF)....................................................................................... 531
8.8.1 Identification.....................................................................................................................................531
8.8.2 Functionality......................................................................................................................................531
8.8.3 Function block.................................................................................................................................. 532
8.8.4 Signals................................................................................................................................................ 532
8.8.5 Settings..............................................................................................................................................533
8.8.6 Monitored data.................................................................................................................................534
8.8.8 Technical data.................................................................................................................................. 540
8.9 Stub protection STBPTOC (50STB).................................................................................................. 540
8.9.1 Identification.................................................................................................................................... 540
8.9.2 Functionality.....................................................................................................................................540
8.9.3 Function block.................................................................................................................................. 541
8.9.4 Signals................................................................................................................................................ 541
8.9.5 Settings.............................................................................................................................................. 541
8.9.6 Monitored data.................................................................................................................................542
8.9.8 Technical data...................................................................................................................................543
8.10 Pole discrepancy protection CCPDSC(52PD)..................................................................................543
8.10.1 Identification.................................................................................................................................... 544
8.10.2 Functionality..................................................................................................................................... 544
8.10.3 Function block..................................................................................................................................544
8.10.4 Signals................................................................................................................................................545
8.10.5 Settings..............................................................................................................................................545
8.10.6 Monitored data................................................................................................................................ 546
8.10.7.1 Pole discrepancy signaling from circuit breaker....................................................................548
8.10.7.2 Unsymmetrical current detection............................................................................................. 549
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8.10.8 Technical data.................................................................................................................................. 549

8.11 Directional underpower protection GUPPDUP (37).......................................................................549
8.11.1 Identification.................................................................................................................................... 549
8.11.2 Functionality..................................................................................................................................... 550
8.11.3 Function block...................................................................................................................................551
8.11.4 Signals................................................................................................................................................ 551
8.11.5 Settings..............................................................................................................................................552
8.11.6 Monitored data.................................................................................................................................553
8.11.7.1 Low pass filtering......................................................................................................................... 555
8.11.7.2 Calibration of analog inputs.......................................................................................................555
8.11.8 Technical data.................................................................................................................................. 556
8.12 Directional overpower protection GOPPDOP (32)......................................................................... 557
8.12.1 Identification.....................................................................................................................................557
8.12.2 Functionality..................................................................................................................................... 557
8.12.3 Function block.................................................................................................................................. 558
8.12.4 Signals................................................................................................................................................558
8.12.5 Settings..............................................................................................................................................559
8.12.6 Monitored data................................................................................................................................. 561
8.12.7.1 Low pass filtering......................................................................................................................... 563
8.12.7.2 Calibration of analog inputs.......................................................................................................563
8.12.8 Technical data.................................................................................................................................. 564
8.13 Broken conductor check BRCPTOC (46).......................................................................................... 565
8.13.1 Identification.................................................................................................................................... 565
8.13.2 Functionality..................................................................................................................................... 565
8.13.3 Function block.................................................................................................................................. 565
8.13.4 Signals................................................................................................................................................565
8.13.5 Settings............................................................................................................................................. 566
8.13.6 Monitored data................................................................................................................................ 566
8.13.8 Technical data...................................................................................................................................567
8.14 Voltage-restrained time overcurrent protection VRPVOC (51V)................................................ 568
8.14.1 Identification.................................................................................................................................... 568
8.14.2 Functionality..................................................................................................................................... 568
8.14.3 Function block.................................................................................................................................. 568
8.14.4 Signals................................................................................................................................................569
8.14.5 Settings............................................................................................................................................. 569
8.14.6 Monitored data.................................................................................................................................570
8.14.7.1 Measured quantities.................................................................................................................... 570
8.14.7.2 Base quantities.............................................................................................................................. 571
8.14.7.3 Overcurrent protection................................................................................................................ 571
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8.14.7.4 Logic diagram................................................................................................................................572

8.14.7.5 Undervoltage protection.............................................................................................................573
8.14.8 Technical data...................................................................................................................................573
Section 9 Voltage protection.............................................................................................. 575

9.1 Two step undervoltage protection UV2PTUV (27)......................................................................... 575
9.1.1 Identification.....................................................................................................................................575
9.1.2 Functionality..................................................................................................................................... 575
9.1.3 Function block.................................................................................................................................. 575
9.1.4 Signals................................................................................................................................................ 576
9.1.5 Settings.............................................................................................................................................. 577
9.1.6 Monitored data.................................................................................................................................579
9.1.7.1 Measurement principle............................................................................................................... 580
9.1.7.2 Time delay......................................................................................................................................580
9.1.7.3 Blocking.......................................................................................................................................... 585
9.1.7.4 Design............................................................................................................................................. 586
9.1.8 Technical data...................................................................................................................................587
9.2 Two step overvoltage protection OV2PTOV (59).......................................................................... 588
9.2.1 Identification.................................................................................................................................... 588
9.2.2 Functionality OV2PTOV.................................................................................................................. 588
9.2.3 Function block.................................................................................................................................. 589
9.2.4 Signals................................................................................................................................................589
9.2.5 Settings............................................................................................................................................. 590
9.2.6 Monitored data.................................................................................................................................592
9.2.7.1 Measurement principle................................................................................................................593
9.2.7.2 Time delay...................................................................................................................................... 593
9.2.7.3 Blocking.......................................................................................................................................... 599
9.2.7.4 Design............................................................................................................................................. 599
9.2.8 Technical data...................................................................................................................................601
9.3 Two step residual overvoltage protection ROV2PTOV (59N)......................................................601
9.3.1 Identification.................................................................................................................................... 601
9.3.2 Functionality..................................................................................................................................... 601
9.3.3 Function block.................................................................................................................................. 602
9.3.4 Signals................................................................................................................................................602
9.3.5 Settings............................................................................................................................................. 603
9.3.6 Monitored data................................................................................................................................ 604
9.3.7.1 Measurement principle............................................................................................................... 605
9.3.7.2 Time delay......................................................................................................................................605
9.3.7.3 Blocking.......................................................................................................................................... 610
9.3.7.4 Design............................................................................................................................................. 610
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9.3.8 Technical data................................................................................................................................... 611

9.4 Overexcitation protection OEXPVPH (24)........................................................................................612
9.4.1 Identification.....................................................................................................................................612
9.4.2 Functionality......................................................................................................................................612
9.4.3 Function block...................................................................................................................................612
9.4.4 Signals................................................................................................................................................ 613
9.4.5 Settings.............................................................................................................................................. 613
9.4.6 Monitored data.................................................................................................................................614
9.4.7.1 Measured voltage..........................................................................................................................617
9.4.7.2 Operate time of the overexcitation protection...................................................................... 617
9.4.7.3 Cooling............................................................................................................................................ 621
9.4.7.4 Overexcitation protection function measurands...................................................................621
9.4.7.5 Overexcitation alarm....................................................................................................................622
9.4.7.6 Logic diagram................................................................................................................................622
9.4.8 Technical data...................................................................................................................................623
9.5 Voltage differential protection VDCPTOV (60).............................................................................. 623
9.5.1 Identification.................................................................................................................................... 623
9.5.2 Functionality..................................................................................................................................... 623
9.5.3 Function block.................................................................................................................................. 624
9.5.4 Signals................................................................................................................................................624
9.5.5 Settings..............................................................................................................................................625
9.5.6 Monitored data.................................................................................................................................625
9.5.8 Technical data...................................................................................................................................627
9.6 Loss of voltage check LOVPTUV (27)................................................................................................628
9.6.1 Identification.................................................................................................................................... 628
9.6.2 Functionality..................................................................................................................................... 628
9.6.3 Function block.................................................................................................................................. 628
9.6.4 Signals................................................................................................................................................628
9.6.5 Settings..............................................................................................................................................629
9.6.7 Technical data................................................................................................................................... 631
9.7 Radial feeder protection PAPGAPC (27)........................................................................................... 631
9.7.1 Identification.....................................................................................................................................631
9.7.2 Functionality......................................................................................................................................631
9.7.3 Function block.................................................................................................................................. 632
9.7.4 Signals................................................................................................................................................ 632
9.7.5 Settings..............................................................................................................................................633
9.7.6 Monitored data................................................................................................................................ 634
9.7.7 Principle of operation..................................................................................................................... 634
9.7.7.1 Faulted phase selection.............................................................................................................. 634
9.7.7.2 Residual current detection......................................................................................................... 635
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9.7.7.3 Fast fault clearance ..................................................................................................................... 635

9.7.7.4 Delayed fault clearance............................................................................................................... 636
9.7.7.5 Trip and autoreclose logic.......................................................................................................... 637
9.7.8 Technical data.................................................................................................................................. 638
Section 10 Frequency protection..........................................................................................639

10.1 Underfrequency protection SAPTUF (81)........................................................................................ 639
10.1.1 Identification.................................................................................................................................... 639
10.1.2 Functionality..................................................................................................................................... 639
10.1.3 Function block.................................................................................................................................. 639
10.1.4 Signals............................................................................................................................................... 640
10.1.5 Settings............................................................................................................................................. 640
10.1.6 Monitored data.................................................................................................................................641
10.1.7.2 Time delay...................................................................................................................................... 641
10.1.7.3 Voltage dependent time delay...................................................................................................642
10.1.7.4 Blocking.......................................................................................................................................... 643
10.1.7.5 Design............................................................................................................................................. 643
10.1.8 Technical data.................................................................................................................................. 644
10.2 Overfrequency protection SAPTOF (81).......................................................................................... 645
10.2.1 Identification.................................................................................................................................... 645
10.2.2 Functionality..................................................................................................................................... 645
10.2.3 Function block..................................................................................................................................646
10.2.4 Signals................................................................................................................................................646
10.2.5 Settings............................................................................................................................................. 646
10.2.6 Monitored data.................................................................................................................................647
10.2.7.2 Time delay...................................................................................................................................... 647
10.2.7.3 Blocking..........................................................................................................................................648
10.2.7.4 Design.............................................................................................................................................648
10.2.8 Technical data.................................................................................................................................. 649
10.3 Rate-of-change frequency protection SAPFRC (81)...................................................................... 649
10.3.1 Identification.................................................................................................................................... 649
10.3.2 Functionality.....................................................................................................................................649
10.3.3 Function block..................................................................................................................................650
10.3.4 Signals................................................................................................................................................650
10.3.5 Settings............................................................................................................................................. 650
10.3.6 Monitored data................................................................................................................................. 651
10.3.7.1 Measurement principle................................................................................................................ 651
10.3.7.2 Time delay...................................................................................................................................... 651
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10.3.7.3 Blocking.......................................................................................................................................... 652

10.3.7.4 Design............................................................................................................................................. 652
10.3.8 Technical data...................................................................................................................................653
Section 11 Multipurpose protection.................................................................................... 655

11.1 General current and voltage protection CVGAPC.......................................................................... 655
11.1.1 Identification.................................................................................................................................... 655
11.1.2 Functionality..................................................................................................................................... 655
11.1.3 Function block.................................................................................................................................. 656
11.1.4 Signals................................................................................................................................................656
11.1.5 Settings............................................................................................................................................. 658
11.1.6 Monitored data................................................................................................................................ 665
11.1.7.1 Measured quantities within CVGAPC....................................................................................... 665
11.1.7.2 Base quantities for CVGAPC function...................................................................................... 667
11.1.7.3 Built-in overcurrent protection steps...................................................................................... 668
11.1.7.4 Built-in undercurrent protection steps.................................................................................... 673
11.1.7.5 Built-in overvoltage protection steps.......................................................................................673
11.1.7.6 Built-in undervoltage protection steps.................................................................................... 673
11.1.7.7 Logic diagram................................................................................................................................673
11.1.8 Technical data...................................................................................................................................678
Section 12 System protection and control.......................................................................... 681

12.1 Multipurpose filter SMAIHPAC........................................................................................................... 681
12.1.1 Identification.....................................................................................................................................681
12.1.2 Functionality..................................................................................................................................... 681
12.1.3 Function block.................................................................................................................................. 681
12.1.4 Signals................................................................................................................................................ 681
12.1.5 Settings..............................................................................................................................................682
12.1.7 Filter calculation example.............................................................................................................. 685
Section 13 Secondary system supervision.......................................................................... 687

13.1 Current circuit supervision (87).........................................................................................................687
13.1.1 Identification.................................................................................................................................... 687
13.1.2 Functionality..................................................................................................................................... 687
13.1.3 Function block.................................................................................................................................. 687
13.1.4 Signals................................................................................................................................................688
13.1.5 Settings............................................................................................................................................. 688
13.1.7 Technical data.................................................................................................................................. 690
13.2 Fuse failure supervision FUFSPVC....................................................................................................690
13.2.1 Identification.................................................................................................................................... 690
13.2.2 Functionality.....................................................................................................................................690
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13.2.3 Function block.................................................................................................................................. 691

13.2.4 Signals................................................................................................................................................ 691
13.2.5 Settings..............................................................................................................................................692
13.2.6 Monitored data................................................................................................................................ 693
13.2.7.1 Zero and negative sequence detection................................................................................... 693
13.2.7.2 Delta current and delta voltage detection.............................................................................. 695
13.2.7.3 Dead line detection...................................................................................................................... 698
13.2.7.4 Main logic....................................................................................................................................... 699
13.2.8 Technical data...................................................................................................................................702
13.3 Fuse failure supervision VDSPVC (60)..............................................................................................702
13.3.1 Identification.................................................................................................................................... 702
13.3.2 Functionality..................................................................................................................................... 702
13.3.3 Function block.................................................................................................................................. 703
13.3.4 Signals................................................................................................................................................ 703
13.3.5 Settings..............................................................................................................................................704
13.3.6 Monitored data................................................................................................................................ 704
13.3.8 Technical data.................................................................................................................................. 706
Section 14 Control.................................................................................................................. 707

14.1 Synchronism check, energizing check, and synchronizing SESRSYN (25)................................ 707
14.1.1 Identification.....................................................................................................................................707
14.1.2 Functionality..................................................................................................................................... 707
14.1.3 Function block.................................................................................................................................. 708
14.1.4 Signals................................................................................................................................................708
14.1.5 Settings.............................................................................................................................................. 710
14.1.6 Monitored data................................................................................................................................. 713
14.1.7.1 Basic functionality.........................................................................................................................713
14.1.7.2 Logic diagrams.............................................................................................................................. 713
14.1.8 Technical data...................................................................................................................................724
14.2 Autorecloser for 1 phase, 2 phase and/or 3 phase operation SMBRREC (79).......................... 725
14.2.1 Identification.....................................................................................................................................725
14.2.2 Functionality..................................................................................................................................... 725
14.2.3 Function block.................................................................................................................................. 726
14.2.4 Signals................................................................................................................................................ 726
14.2.5 Settings..............................................................................................................................................728
14.2.6.1 Logic Diagrams............................................................................................................................. 729
14.2.6.2 Auto-reclosing operation Disabled and Enabled....................................................................729
14.2.6.3 Auto-reclosing mode selection..................................................................................................730
14.2.6.4 Initiate auto-reclosing and conditions for initiation of a reclosing cycle......................... 730
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14.2.6.5 Control of the auto-reclosing open time for shot 1............................................................... 731
14.2.6.6 Long trip signal..............................................................................................................................731
14.2.6.7 Time sequence diagrams............................................................................................................ 736
14.2.7 Technical data...................................................................................................................................738
14.3 Interlocking (3)...................................................................................................................................... 739
14.3.1 Functionality..................................................................................................................................... 739
14.3.3 Logical node for interlocking SCILO (3).......................................................................................742
14.3.3.1 Identification................................................................................................................................. 742
14.3.3.2 Functionality.................................................................................................................................. 742
14.3.3.3 Function block............................................................................................................................... 742
14.3.3.4 Signals.............................................................................................................................................743
14.3.3.5 Logic diagram................................................................................................................................743
14.3.4 Interlocking for busbar grounding switch BB_ES (3)................................................................743
14.3.4.1 Identification................................................................................................................................. 744
14.3.4.2 Functionality..................................................................................................................................744
14.3.4.3 Function block...............................................................................................................................744
14.3.4.4 Logic diagram............................................................................................................................... 744
14.3.4.5 Signals.............................................................................................................................................745
14.3.5 Interlocking for bus-section breaker A1A2_BS (3)..................................................................... 745
14.3.5.1 Identification................................................................................................................................. 745
14.3.5.2 Functionality.................................................................................................................................. 745
14.3.5.3 Function block...............................................................................................................................746
14.3.5.4 Logic diagram................................................................................................................................747
14.3.5.5 Signals.............................................................................................................................................748
14.3.6 Interlocking for bus-section disconnector A1A2_DC (3).......................................................... 749
14.3.6.1 Identification................................................................................................................................. 750
14.3.6.2 Functionality..................................................................................................................................750
14.3.6.3 Function block...............................................................................................................................750
14.3.6.4 Logic diagram................................................................................................................................ 751
14.3.6.5 Signals............................................................................................................................................. 751
14.3.7 Interlocking for bus-coupler bay ABC_BC (3)............................................................................. 752
14.3.7.1 Identification................................................................................................................................. 752
14.3.7.2 Functionality.................................................................................................................................. 752
14.3.7.3 Function block............................................................................................................................... 754
14.3.7.4 Logic diagram................................................................................................................................755
14.3.7.5 Signals............................................................................................................................................. 757
14.3.8 Interlocking for breaker-and-a-half diameter BH (3)................................................................ 759
14.3.8.1 Identification................................................................................................................................. 760
14.3.8.2 Functionality..................................................................................................................................760
14.3.8.3 Function blocks............................................................................................................................. 761
14.3.8.4 Logic diagrams..............................................................................................................................763
14.3.8.5 Signals.............................................................................................................................................768
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14.3.9 Interlocking for double CB bay DB (3).......................................................................................... 772

14.3.9.1 Identification..................................................................................................................................772
14.3.9.2 Functionality.................................................................................................................................. 772
14.3.9.3 Logic diagrams..............................................................................................................................774
14.3.9.4 Function block............................................................................................................................... 778
14.3.9.5 Signals............................................................................................................................................. 779
14.3.10 Interlocking for line bay ABC_LINE (3)......................................................................................... 782
14.3.10.1 Identification................................................................................................................................. 782
14.3.10.2 Functionality.................................................................................................................................. 782
14.3.10.3 Function block...............................................................................................................................784
14.3.10.4 Logic diagram................................................................................................................................785
14.3.10.5 Signals.............................................................................................................................................790
14.3.11 Interlocking for transformer bay AB_TRAFO (3)........................................................................ 792
14.3.11.1 Identification................................................................................................................................. 792
14.3.11.2 Functionality.................................................................................................................................. 792
14.3.11.3 Function block...............................................................................................................................794
14.3.11.4 Logic diagram................................................................................................................................795
14.3.11.5 Signals.............................................................................................................................................796
14.3.12 Position evaluation POS_EVAL...................................................................................................... 798
14.3.12.1 Identification................................................................................................................................. 798
14.3.12.2 Functionality..................................................................................................................................798
14.3.12.3 Function block...............................................................................................................................798
14.3.12.4 Logic diagram............................................................................................................................... 799
14.3.12.5 Signals.............................................................................................................................................799
14.4 Apparatus control APC........................................................................................................................ 799
14.4.1 Functionality..................................................................................................................................... 799
14.4.3 Error handling................................................................................................................................... 801
14.4.4 Bay control QCBAY.......................................................................................................................... 804
14.4.4.1 Functionality................................................................................................................................. 804
14.4.4.2 Function block.............................................................................................................................. 804
14.4.4.3 Signals............................................................................................................................................ 805
14.4.4.4 Settings.......................................................................................................................................... 805
14.4.5 Local/Remote switch LOCREM, LOCREMCTRL..........................................................................807
14.4.5.1 Function block...............................................................................................................................807
14.4.5.2 Signals............................................................................................................................................ 808
14.4.5.3 Settings.......................................................................................................................................... 809
14.4.5.4 Operation principle......................................................................................................................809
14.4.6 Switch controller SCSWI................................................................................................................. 810
14.4.6.1 Functionality ................................................................................................................................. 810
14.4.6.2 Function block................................................................................................................................811
14.4.6.3 Signals............................................................................................................................................. 811
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14.4.6.4 Settings...........................................................................................................................................813
14.4.6.5 Operation principle.......................................................................................................................813
14.4.7 Circuit breaker SXCBR..................................................................................................................... 819
14.4.7.1 Functionality ................................................................................................................................. 819
14.4.7.2 Function block............................................................................................................................... 819
14.4.7.3 Signals............................................................................................................................................ 820
14.4.7.4 Settings...........................................................................................................................................821
14.4.8 Circuit switch SXSWI....................................................................................................................... 824
14.4.8.1 Functionality ................................................................................................................................. 825
14.4.8.2 Function block...............................................................................................................................825
14.4.8.3 Signals.............................................................................................................................................825
14.4.8.4 Settings.......................................................................................................................................... 826
14.4.9 Proxy for signals from switching device via GOOSE XLNPROXY .......................................... 830
14.4.9.1 Functionality..................................................................................................................................830
14.4.9.2 Function block...............................................................................................................................830
14.4.9.3 Signals............................................................................................................................................. 831
14.4.9.4 Settings.......................................................................................................................................... 832
14.4.9.6 Position supervision.....................................................................................................................832
14.4.9.7 Command response evaluation................................................................................................. 833
14.4.10 Bay reserve QCRSV.......................................................................................................................... 834
14.4.10.1 Functionality..................................................................................................................................834
14.4.10.2 Function block...............................................................................................................................834
14.4.10.3 Signals.............................................................................................................................................835
14.4.10.4 Settings.......................................................................................................................................... 836
14.4.11 Reservation input RESIN.................................................................................................................838
14.4.11.1 Functionality..................................................................................................................................838
14.4.11.2 Function block...............................................................................................................................838
14.4.11.3 Signals.............................................................................................................................................839
14.4.11.4 Settings.......................................................................................................................................... 840
14.5 Logic rotating switch for function selection and LHMI presentation SLGAPC....................... 842
14.5.1 Identification.................................................................................................................................... 842
14.5.2 Functionality..................................................................................................................................... 842
14.5.3 Function block.................................................................................................................................. 843
14.5.4 Signals................................................................................................................................................843
14.5.5 Settings............................................................................................................................................. 844
14.5.6 Monitored data................................................................................................................................ 845
14.5.7.1 Graphical display.......................................................................................................................... 845
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14.6 Selector mini switch VSGAPC............................................................................................................ 846

14.6.1 Identification.................................................................................................................................... 846
14.6.2 Functionality..................................................................................................................................... 847
14.6.3 Function block.................................................................................................................................. 847
14.6.4 Signals................................................................................................................................................ 847
14.6.5 Settings............................................................................................................................................. 848
14.7 Generic communication function for Double Point indication DPGAPC.................................. 849
14.7.1 Identification.................................................................................................................................... 849
14.7.2 Functionality.....................................................................................................................................849
14.7.3 Function block..................................................................................................................................849
14.7.4 Signals................................................................................................................................................849
14.7.5 Settings............................................................................................................................................. 850
14.8 Single point generic control 8 signals SPC8GAPC.........................................................................850
14.8.1 Identification.................................................................................................................................... 850
14.8.2 Functionality..................................................................................................................................... 851
14.8.3 Function block.................................................................................................................................. 851
14.8.4 Signals................................................................................................................................................ 851
14.8.5 Settings..............................................................................................................................................852
14.9 AutomationBits, command function for DNP3.0 AUTOBITS....................................................... 853
14.9.1 Identification.................................................................................................................................... 853
14.9.2 Functionality..................................................................................................................................... 853
14.9.3 Function block.................................................................................................................................. 853
14.9.4 Signals................................................................................................................................................854
14.9.5 Settings..............................................................................................................................................855
14.10 Single command, 16 signals SINGLECMD........................................................................................870
14.10.1 Identification.................................................................................................................................... 870
14.10.2 Functionality..................................................................................................................................... 870
14.10.3 Function block.................................................................................................................................. 870
14.10.4 Signals................................................................................................................................................ 871
14.10.5 Settings.............................................................................................................................................. 871
Section 15 Scheme communication...................................................................................... 873

15.1 Scheme communication logic for distance or overcurrent protection ZCPSCH(85)............. 873
15.1.1 Identification.....................................................................................................................................873
15.1.2 Functionality..................................................................................................................................... 873
15.1.3 Function block.................................................................................................................................. 873
15.1.4 Signals................................................................................................................................................ 874
15.1.5 Settings..............................................................................................................................................875
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15.1.6.1 Blocking scheme........................................................................................................................... 876
15.1.6.2 Delta blocking scheme................................................................................................................ 876
15.1.6.3 Permissive underreaching scheme............................................................................................877
15.1.6.4 Permissive overreaching scheme.............................................................................................. 877
15.1.6.5 Unblocking scheme...................................................................................................................... 877
15.1.6.6 Intertrip scheme........................................................................................................................... 878
15.1.6.7 Simplified logic diagram............................................................................................................. 879
15.1.7 Technical data.................................................................................................................................. 880
15.2 Phase segregated scheme communication logic for distance protection ZC1PPSCH (85). 880
15.2.1 Identification.................................................................................................................................... 880
15.2.2 Functionality.....................................................................................................................................880
15.2.3 Function block.................................................................................................................................. 881
15.2.4 Signals................................................................................................................................................ 881
15.2.5 Settings..............................................................................................................................................883
15.2.6.1 Blocking scheme........................................................................................................................... 883
15.2.6.2 Permissive underreach scheme.................................................................................................884
15.2.6.3 Permissive overreach scheme................................................................................................... 884
15.2.6.4 Unblocking scheme......................................................................................................................884
15.2.6.5 Intertrip scheme........................................................................................................................... 885
15.2.6.6 Simplified logic diagram.............................................................................................................885
15.2.7 Technical data...................................................................................................................................887
15.3 Current reversal and Weak-end infeed logic for distance protection 3-phase
ZCRWPSCH (85).................................................................................................................................... 887
15.3.1 Identification.................................................................................................................................... 887
15.3.2 Functionality..................................................................................................................................... 887
15.3.3 Function block..................................................................................................................................888
15.3.4 Signals................................................................................................................................................888
15.3.5 Settings............................................................................................................................................. 889
15.3.6.1 Current reversal logic.................................................................................................................. 889
15.3.6.2 Weak-end infeed logic................................................................................................................. 890
15.3.7 Technical data...................................................................................................................................891
15.4 Current reversal and weak-end infeed logic for phase segregated communication
ZC1WPSCH (85).....................................................................................................................................892
15.4.1 Identification.................................................................................................................................... 892
15.4.2 Functionality..................................................................................................................................... 892
15.4.3 Function block.................................................................................................................................. 892
15.4.4 Signals................................................................................................................................................893
15.4.5 Settings............................................................................................................................................. 894
15.4.6.1 Current reversal logic ................................................................................................................. 894
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15.4.6.2 Weak-end infeed logic................................................................................................................. 895

15.4.7 Technical data.................................................................................................................................. 899
15.5 Local acceleration logic ZCLCPSCH................................................................................................. 899
15.5.1 Identification.................................................................................................................................... 899
15.5.2 Functionality..................................................................................................................................... 899
15.5.3 Function block..................................................................................................................................899
15.5.4 Signals............................................................................................................................................... 900
15.5.5 Settings............................................................................................................................................. 900
15.5.6.1 Zone extension..............................................................................................................................901
15.5.6.2 Loss-of-Load acceleration.......................................................................................................... 901
15.6 Scheme communication logic for residual overcurrent protection ECPSCH (85).................. 902
15.6.1 Identification.................................................................................................................................... 902
15.6.2 Functionality..................................................................................................................................... 902
15.6.3 Function block.................................................................................................................................. 903
15.6.4 Signals................................................................................................................................................903
15.6.5 Settings............................................................................................................................................. 904
15.6.6.1 Blocking scheme...........................................................................................................................904
15.6.6.2 Permissive under/overreaching scheme.................................................................................905
15.6.6.3 Unblocking scheme......................................................................................................................906
15.6.7 Technical data.................................................................................................................................. 907
15.7 Current reversal and weak-end infeed logic for residual overcurrent protection
ECRWPSCH (85)....................................................................................................................................908
15.7.1 Identification.................................................................................................................................... 908
15.7.2 Functionality.....................................................................................................................................908
15.7.3 Function block..................................................................................................................................909
15.7.4 Signals................................................................................................................................................909
15.7.5 Settings..............................................................................................................................................910
15.7.6.1 Directional comparison logic function.....................................................................................910
15.7.6.2 Fault current reversal logic......................................................................................................... 910
15.7.6.3 Weak-end infeed logic.................................................................................................................. 911
15.7.7 Technical data................................................................................................................................... 912
15.8 Direct transfer trip logic......................................................................................................................912
15.8.1 Introduction.......................................................................................................................................912
15.8.2 Low active power and power factor protection LAPPGAPC (37_55)..................................... 914
15.8.2.1 Identification................................................................................................................................. 914
15.8.2.2 Functionality.................................................................................................................................. 914
15.8.2.3 Function block............................................................................................................................... 915
15.8.2.4 Signals............................................................................................................................................. 915
15.8.2.5 Settings...........................................................................................................................................916
15.8.2.6 Monitored data..............................................................................................................................917
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15.8.2.8 Technical data............................................................................................................................... 919
15.8.3 Compensated over and undervoltage protection COUVGAPC (59_27).................................919
15.8.3.1 Identification................................................................................................................................. 919
15.8.3.2 Functionality..................................................................................................................................920
15.8.3.3 Function block...............................................................................................................................920
15.8.3.4 Signals............................................................................................................................................ 920
15.8.3.5 Settings...........................................................................................................................................921
15.8.3.6 Monitored data............................................................................................................................. 922
15.8.3.8 Technical data............................................................................................................................... 924
15.8.4 Sudden change in current variation SCCVPTOC (51)................................................................ 924
15.8.4.1 Identification................................................................................................................................. 925
15.8.4.2 Functionality.................................................................................................................................. 925
15.8.4.3 Function block...............................................................................................................................925
15.8.4.4 Signals.............................................................................................................................................925
15.8.4.5 Settings.......................................................................................................................................... 926
15.8.4.7 Technical data............................................................................................................................... 927
15.8.5 Carrier receive logic LCCRPTRC (94)............................................................................................ 927
15.8.5.1 Identification................................................................................................................................. 927
15.8.5.2 Functionality.................................................................................................................................. 927
15.8.5.3 Function block...............................................................................................................................928
15.8.5.4 Signals.............................................................................................................................................928
15.8.5.5 Settings.......................................................................................................................................... 929
15.8.5.7 Technical data............................................................................................................................... 929
15.8.6 Negative sequence overvoltage protection LCNSPTOV (47).................................................. 929
15.8.6.1 Identification................................................................................................................................. 929
15.8.6.2 Functionality..................................................................................................................................930
15.8.6.3 Function block...............................................................................................................................930
15.8.6.4 Signals............................................................................................................................................ 930
15.8.6.5 Settings.......................................................................................................................................... 930
15.8.6.6 Monitored data..............................................................................................................................931
15.8.6.8 Technical data................................................................................................................................931
15.8.7 Zero sequence overvoltage protection LCZSPTOV (59N)........................................................931
15.8.7.1 Identification................................................................................................................................. 931
15.8.7.2 Functionality.................................................................................................................................. 932
15.8.7.3 Function block............................................................................................................................... 932
15.8.7.4 Signals.............................................................................................................................................932
15.8.7.5 Settings.......................................................................................................................................... 932
15.8.7.6 Monitored data............................................................................................................................. 933
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15.8.7.8 Technical data............................................................................................................................... 933
15.8.8 Negative sequence overcurrent protection LCNSPTOC (46).................................................. 933
15.8.8.1 Identification................................................................................................................................. 933
15.8.8.2 Functionality..................................................................................................................................934
15.8.8.3 Function block...............................................................................................................................934
15.8.8.4 Signals............................................................................................................................................ 934
15.8.8.5 Settings.......................................................................................................................................... 934
15.8.8.6 Monitored data............................................................................................................................. 935
15.8.8.8 Technical data............................................................................................................................... 935
15.8.9 Zero sequence overcurrent protection LCZSPTOC (51N)........................................................ 935
15.8.9.1 Identification................................................................................................................................. 936
15.8.9.2 Functionality..................................................................................................................................936
15.8.9.3 Function block...............................................................................................................................936
15.8.9.4 Signals.............................................................................................................................................936
15.8.9.5 Settings...........................................................................................................................................937
15.8.9.6 Monitored data............................................................................................................................. 937
15.8.9.8 Technical data............................................................................................................................... 937
15.8.10 Three phase overcurrent LCP3PTOC (51).................................................................................... 938
15.8.10.1 Identification................................................................................................................................. 938
15.8.10.2 Functionality..................................................................................................................................938
15.8.10.3 Function block...............................................................................................................................938
15.8.10.4 Signals.............................................................................................................................................939
15.8.10.5 Settings.......................................................................................................................................... 939
15.8.10.6 Monitored data.............................................................................................................................940
15.8.10.8 Technical data...............................................................................................................................940
15.8.11 Three phase undercurrent LCP3PTUC (37)................................................................................. 940
15.8.11.1 Identification.................................................................................................................................940
15.8.11.2 Functionality.................................................................................................................................. 941
15.8.11.3 Function block............................................................................................................................... 941
15.8.11.4 Signals.............................................................................................................................................941
15.8.11.5 Settings.......................................................................................................................................... 942
15.8.11.6 Monitored data............................................................................................................................. 942
15.8.11.8 Technical data............................................................................................................................... 942
Section 16 Logic......................................................................................................................945
16.1 Tripping logic SMPPTRC (94).............................................................................................................945
16.1.1 Identification.................................................................................................................................... 945
16.1.2 Functionality..................................................................................................................................... 945
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16.1.3 Function block.................................................................................................................................. 945

16.1.4 Signals................................................................................................................................................946
16.1.5 Settings..............................................................................................................................................947
16.1.6.1 Logic diagram............................................................................................................................... 948
16.1.7 Technical data...................................................................................................................................952
16.2 Trip matrix logic TMAGAPC................................................................................................................ 952
16.2.1 Identification.................................................................................................................................... 953
16.2.2 Functionality..................................................................................................................................... 953
16.2.3 Function block.................................................................................................................................. 953
16.2.4 Signals................................................................................................................................................954
16.2.5 Settings..............................................................................................................................................955
16.2.7 Technical data.................................................................................................................................. 956
16.3 Logic for group alarm ALMCALH.......................................................................................................957
16.3.1 Identification.................................................................................................................................... 957
16.3.2 Functionality..................................................................................................................................... 957
16.3.3 Function block.................................................................................................................................. 957
16.3.4 Signals................................................................................................................................................ 957
16.3.5 Settings............................................................................................................................................. 958
16.3.7 Technical data.................................................................................................................................. 959
16.4 Logic for group warning WRNCALH................................................................................................. 959
16.4.1 Identification.................................................................................................................................... 959
16.4.2 Functionality..................................................................................................................................... 959
16.4.3 Function block.................................................................................................................................. 959
16.4.4 Signals................................................................................................................................................960
16.4.5 Settings............................................................................................................................................. 960
16.4.7 Technical data...................................................................................................................................961
16.5 Logic for group indication INDCALH................................................................................................ 961
16.5.1 Identification.....................................................................................................................................961
16.5.2 Functionality..................................................................................................................................... 961
16.5.3 Function block.................................................................................................................................. 962
16.5.4 Signals................................................................................................................................................962
16.5.5 Settings..............................................................................................................................................963
16.5.7 Technical data.................................................................................................................................. 963
16.6 Basic configurable logic blocks......................................................................................................... 963
16.6.1 AND function block AND................................................................................................................ 964
16.6.1.1 Function block...............................................................................................................................964
16.6.1.2 Signals............................................................................................................................................ 965
16.6.1.3 Technical data............................................................................................................................... 965
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16.6.2 Controllable gate function block GATE....................................................................................... 965

16.6.2.1 Function block...............................................................................................................................965
16.6.2.2 Signals............................................................................................................................................ 965
16.6.2.3 Settings.......................................................................................................................................... 966
16.6.2.4 Technical data............................................................................................................................... 966
16.6.3 Inverter function block INV............................................................................................................ 966
16.6.3.1 Function block...............................................................................................................................966
16.6.3.2 Signals............................................................................................................................................ 966
16.6.3.3 Technical data............................................................................................................................... 967
16.6.4 Loop delay function block LLD...................................................................................................... 967
16.6.4.1 Function block...............................................................................................................................967
16.6.4.2 Signals.............................................................................................................................................967
16.6.4.3 Technical data............................................................................................................................... 967
16.6.5 OR function block OR......................................................................................................................968
16.6.5.1 Function block...............................................................................................................................968
16.6.5.2 Signals............................................................................................................................................ 968
16.6.5.3 Technical data............................................................................................................................... 968
16.6.6 Pulse timer function block PULSETIMER.....................................................................................969
16.6.6.1 Function block...............................................................................................................................969
16.6.6.2 Signals............................................................................................................................................ 969
16.6.6.3 Settings.......................................................................................................................................... 969
16.6.6.4 Technical data............................................................................................................................... 969
16.6.7 Reset-set with memory function block RSMEMORY.................................................................970
16.6.7.1 Function block...............................................................................................................................970
16.6.7.2 Signals.............................................................................................................................................970
16.6.7.3 Settings...........................................................................................................................................971
16.6.7.4 Technical data................................................................................................................................971
16.6.8 Set-reset with memory function block SRMEMORY..................................................................971
16.6.8.1 Function block............................................................................................................................... 971
16.6.8.2 Signals.............................................................................................................................................972
16.6.8.3 Settings...........................................................................................................................................972
16.6.8.4 Technical data............................................................................................................................... 972
16.6.9 Settable timer function block TIMERSET.................................................................................... 972
16.6.9.1 Function block............................................................................................................................... 973
16.6.9.2 Signals.............................................................................................................................................973
16.6.9.3 Settings.......................................................................................................................................... 974
16.6.9.4 Technical data............................................................................................................................... 974
16.6.10 Exclusive OR function block XOR.................................................................................................. 974
16.6.10.1 Function block...............................................................................................................................974
16.6.10.2 Signals.............................................................................................................................................975
16.6.10.3 Technical data............................................................................................................................... 975
16.7 Configurable logic blocks Q/T...........................................................................................................975
16.7.1 ANDQT function block.................................................................................................................... 976
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16.7.1.1 Function block...............................................................................................................................976

16.7.1.2 Signals.............................................................................................................................................976
16.7.1.3 Technical data................................................................................................................................977
16.7.2 Single point indication related signals combining function block INDCOMBSPQT........... 977
16.7.2.1 Function block............................................................................................................................... 977
16.7.2.2 Signals.............................................................................................................................................978
16.7.2.3 Technical data............................................................................................................................... 978
16.7.3 Single point input signal attributes converting function block INDEXTSPQT.................... 978
16.7.3.1 Function block...............................................................................................................................979
16.7.3.2 Signals.............................................................................................................................................979
16.7.3.3 Technical data............................................................................................................................... 979
16.7.4 Invalid logic function block INVALIDQT....................................................................................... 979
16.7.4.1 Function block.............................................................................................................................. 980
16.7.4.2 Signals............................................................................................................................................ 980
16.7.4.3 Technical data............................................................................................................................... 981
16.7.5 Inverter function block INVERTERQT........................................................................................... 981
16.7.5.1 Function block............................................................................................................................... 981
16.7.5.2 Signals.............................................................................................................................................982
16.7.5.3 Technical data............................................................................................................................... 982
16.7.6 ORQT function block....................................................................................................................... 982
16.7.6.1 Function block...............................................................................................................................982
16.7.6.2 Signals.............................................................................................................................................982
16.7.6.3 Technical data............................................................................................................................... 983
16.7.7 Pulse timer function block PULSETIMERQT............................................................................... 983
16.7.7.1 Function block...............................................................................................................................984
16.7.7.2 Signals............................................................................................................................................ 984
16.7.7.3 Settings.......................................................................................................................................... 984
16.7.7.4 Technical data............................................................................................................................... 984
16.7.8 Reset/Set function block RSMEMORYQT................................................................................... 984
16.7.8.1 Function block...............................................................................................................................985
16.7.8.2 Signals............................................................................................................................................ 985
16.7.8.3 Settings.......................................................................................................................................... 985
16.7.8.4 Technical data............................................................................................................................... 986
16.7.9 Set/Reset function block SRMEMORYQT................................................................................... 986
16.7.9.1 Function block...............................................................................................................................986
16.7.9.2 Signals............................................................................................................................................ 986
16.7.9.3 Settings.......................................................................................................................................... 987
16.7.9.4 Technical data............................................................................................................................... 987
16.7.10 Settable timer function block TIMERSETQT...............................................................................987
16.7.10.1 Function block...............................................................................................................................987
16.7.10.2 Signals.............................................................................................................................................987
16.7.10.3 Settings.......................................................................................................................................... 988
16.7.10.4 Technical data............................................................................................................................... 988
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16.7.11 Exclusive OR function block XORQT............................................................................................ 988

16.7.11.1 Function block...............................................................................................................................989
16.7.11.2 Signals............................................................................................................................................ 989
16.7.11.3 Technical data............................................................................................................................... 989
16.8 Extension logic package..................................................................................................................... 989
16.9 Fixed signals FXDSIGN........................................................................................................................990
16.9.1 Identification.................................................................................................................................... 990
16.9.2 Functionality.....................................................................................................................................990
16.9.3 Function block.................................................................................................................................. 991
16.9.4 Signals................................................................................................................................................ 991
16.9.5 Settings.............................................................................................................................................. 991
16.10 Boolean 16 to Integer conversion B16I.............................................................................................992
16.10.1 Identification.................................................................................................................................... 992
16.10.2 Function block.................................................................................................................................. 992
16.10.3 Signals................................................................................................................................................992
16.10.4 Monitored data................................................................................................................................ 993
16.10.5 Settings..............................................................................................................................................993
16.10.7 Technical data.................................................................................................................................. 994
16.11 Boolean to integer conversion with logical node representation, 16 bit BTIGAPC................ 994
16.11.1 Identification.................................................................................................................................... 995
16.11.2 Functionality..................................................................................................................................... 995
16.11.3 Function block.................................................................................................................................. 995
16.11.4 Signals................................................................................................................................................995
16.11.5 Settings............................................................................................................................................. 996
16.11.6 Monitored data................................................................................................................................ 996
16.11.8 Technical data...................................................................................................................................997
16.12 Integer to boolean 16 conversion IB16............................................................................................. 997
16.12.1 Identification.................................................................................................................................... 997
16.12.2 Functionality..................................................................................................................................... 998
16.12.3 Function block..................................................................................................................................998
16.12.4 Signals................................................................................................................................................998
16.12.5 Setting parameters......................................................................................................................... 999
16.12.7 Technical data................................................................................................................................ 1000
16.13 Integer to Boolean 16 conversion with logic node representation ITBGAPC........................ 1000
16.13.1 Identification..................................................................................................................................1000
16.13.2 Functionality................................................................................................................................... 1001
16.13.3 Function block................................................................................................................................ 1001
16.13.4 Signals.............................................................................................................................................. 1001
16.13.5 Settings............................................................................................................................................1002
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16.13.6 Operation principle....................................................................................................................... 1002

16.13.7 Technical data................................................................................................................................ 1003
16.14 Elapsed time integrator with limit transgression and overflow supervision TEIGAPC.......1004
16.14.1 Identification.................................................................................................................................. 1004
16.14.2 Functionality...................................................................................................................................1004
16.14.3 Function block................................................................................................................................ 1005
16.14.4 Signals..............................................................................................................................................1005
16.14.5 Settings........................................................................................................................................... 1005
16.14.6.1 Operation accuracy.................................................................................................................... 1007
16.14.6.2 Memory storage..........................................................................................................................1007
16.14.7 Technical data.................................................................................................................................1007
16.15 Comparator for integer inputs - INTCOMP...................................................................................1008
16.15.1 Identification.................................................................................................................................. 1008
16.15.2 Functionality...................................................................................................................................1008
16.15.3 Function block................................................................................................................................1008
16.15.5 Signals..............................................................................................................................................1009
16.15.6 Settings........................................................................................................................................... 1009
16.16 Comparator for real inputs - REALCOMP...................................................................................... 1010
16.16.1 Identification...................................................................................................................................1010
16.16.2 Functionality................................................................................................................................... 1010
16.16.3 Function block................................................................................................................................ 1010
16.16.4 Signals.............................................................................................................................................. 1010
16.16.5 Settings............................................................................................................................................ 1011
16.16.6 Operation principle........................................................................................................................ 1011
16.16.7 Technical data................................................................................................................................. 1013
Section 17 Monitoring.......................................................................................................... 1015

17.1 Measurements.....................................................................................................................................1015
17.1.1 Identification...................................................................................................................................1015
17.1.2 Functionality....................................................................................................................................1015
17.1.3 Function block.................................................................................................................................1017
17.1.4 Signals.............................................................................................................................................. 1018
17.1.5 Settings............................................................................................................................................ 1022
17.1.6 Monitored data...............................................................................................................................1033
17.1.7 Operation principle........................................................................................................................1036
17.1.7.1 Measurement supervision........................................................................................................ 1036
17.1.7.2 Measurements CVMMXN.......................................................................................................... 1040
17.1.7.3 Phase current measurement CMMXU.................................................................................... 1045
17.1.7.4 Phase-phase and phase-neutral voltage measurements VMMXU, VNMMXU................ 1045
17.1.7.5 Voltage and current sequence measurements VMSQI, CMSQI.........................................1046
17.1.8 Technical data................................................................................................................................ 1046
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17.2 Gas medium supervision SSIMG (63)............................................................................................. 1048

17.2.1 Identification.................................................................................................................................. 1048
17.2.2 Functionality................................................................................................................................... 1048
17.2.3 Function block................................................................................................................................ 1048
17.2.4 Signals..............................................................................................................................................1048
17.2.5 Settings........................................................................................................................................... 1049
17.2.7 Technical data................................................................................................................................ 1050
17.3 Liquid medium supervision SSIML (71)...........................................................................................1051
17.3.1 Identification...................................................................................................................................1051
17.3.2 Functionality....................................................................................................................................1051
17.3.3 Function block.................................................................................................................................1051
17.3.4 Signals.............................................................................................................................................. 1051
17.3.5 Settings............................................................................................................................................1052
17.3.7 Technical data.................................................................................................................................1053
17.4 Breaker monitoring SSCBR...............................................................................................................1054
17.4.1 Identification.................................................................................................................................. 1054
17.4.2 Functionality................................................................................................................................... 1054
17.4.3 Function block................................................................................................................................ 1054
17.4.4 Signals.............................................................................................................................................. 1055
17.4.5 Settings............................................................................................................................................1056
17.4.6 Monitored data...............................................................................................................................1057
17.4.7.1 Circuit breaker contact travel time.........................................................................................1059
17.4.7.2 Circuit breaker status................................................................................................................1060
17.4.7.3 Remaining life of circuit breaker............................................................................................. 1060
17.4.7.4 Accumulated energy...................................................................................................................1061
17.4.7.5 Circuit breaker operation cycles..............................................................................................1063
17.4.7.6 Circuit breaker operation monitoring.................................................................................... 1063
17.4.7.7 Circuit breaker spring charge monitoring............................................................................ 1064
17.4.7.8 Circuit breaker gas pressure indication.................................................................................1065
17.4.8 Technical data................................................................................................................................ 1065
17.5 Event function EVENT....................................................................................................................... 1066
17.5.1 Identification.................................................................................................................................. 1066
17.5.2 Functionality................................................................................................................................... 1066
17.5.3 Function block................................................................................................................................ 1066
17.5.4 Signals.............................................................................................................................................. 1067
17.5.5 Settings........................................................................................................................................... 1068
17.6 Disturbance report DRPRDRE...........................................................................................................1071
17.6.1 Identification................................................................................................................................... 1071
17.6.2 Functionality....................................................................................................................................1071
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17.6.3 Function block................................................................................................................................ 1072

17.6.4 Signals.............................................................................................................................................. 1073
17.6.5 Settings............................................................................................................................................1075
17.6.6 Monitored data.............................................................................................................................. 1084
17.6.8 Technical data................................................................................................................................ 1094
17.7 Logical signal status report BINSTATREP..................................................................................... 1095
17.7.1 Identification.................................................................................................................................. 1095
17.7.2 Functionality................................................................................................................................... 1095
17.7.3 Function block................................................................................................................................ 1095
17.7.4 Signals..............................................................................................................................................1095
17.7.5 Settings........................................................................................................................................... 1096
17.8 Measured value expander block RANGE_XP..................................................................................1097
17.8.1 Identification.................................................................................................................................. 1097
17.8.2 Functionality................................................................................................................................... 1097
17.8.3 Function block................................................................................................................................ 1098
17.8.4 Signals..............................................................................................................................................1098
17.9 Fault locator LMBRFLO..................................................................................................................... 1099
17.9.1 Identification.................................................................................................................................. 1099
17.9.2 Functionality................................................................................................................................... 1099
17.9.3 Function block................................................................................................................................ 1099
17.9.4 Signals.............................................................................................................................................. 1100
17.9.5 Settings............................................................................................................................................1100
17.9.6 Monitored data............................................................................................................................... 1101
17.9.7.1 Measuring Principle.................................................................................................................... 1102
17.9.7.2 Accurate algorithm for measurement of distance to fault................................................ 1102
17.9.7.3 The non-compensated impedance model............................................................................. 1106
17.9.7.4 IEC 60870-5-103.......................................................................................................................... 1106
17.9.8 Technical data.................................................................................................................................1106
17.10 Limit counter L4UFCNT..................................................................................................................... 1107
17.10.1 Identification................................................................................................................................... 1107
17.10.1.1 Identification................................................................................................................................1107
17.10.2 Functionality....................................................................................................................................1107
17.10.3.1 Design............................................................................................................................................1107
17.10.3.2 Reporting......................................................................................................................................1109
17.10.4 Function block................................................................................................................................ 1109
17.10.5 Signals.............................................................................................................................................. 1109
17.10.6 Settings............................................................................................................................................ 1110
17.10.7 Monitored data............................................................................................................................... 1110
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17.10.8 Technical data................................................................................................................................. 1110

17.11 Running hour-meter TEILGAPC ....................................................................................................... 1110
17.11.1 Identification................................................................................................................................... 1110
17.11.2 Functionality.....................................................................................................................................1111
17.11.3 Function block..................................................................................................................................1111
17.11.4 Signals............................................................................................................................................... 1112
17.11.5 Settings.............................................................................................................................................1112
17.11.6 Operation principle.........................................................................................................................1112
17.11.6.1 Operation accuracy..................................................................................................................... 1114
17.11.6.2 Memory storage...........................................................................................................................1114
17.11.7 Technical data................................................................................................................................. 1114
Section 18 Metering.............................................................................................................. 1115

18.1 Pulse-counter logic PCFCNT............................................................................................................. 1115
18.1.1 Identification................................................................................................................................... 1115
18.1.2 Functionality.................................................................................................................................... 1115
18.1.3 Function block................................................................................................................................. 1115
18.1.4 Signals...............................................................................................................................................1116
18.1.5 Settings.............................................................................................................................................1116
18.1.6 Monitored data................................................................................................................................1117
18.1.7 Operation principle.........................................................................................................................1117
18.1.8 Technical data..................................................................................................................................1119
18.2 Function for energy calculation and demand handling ETPMMTR........................................... 1119
18.2.1 Identification................................................................................................................................... 1119
18.2.2 Functionality.................................................................................................................................... 1119
18.2.3 Function block.................................................................................................................................1120
18.2.4 Signals.............................................................................................................................................. 1120
18.2.5 Settings.............................................................................................................................................1121
18.2.6 Monitored data............................................................................................................................... 1122
18.2.8 Technical data................................................................................................................................. 1126
18.2.8.1 Technical data.............................................................................................................................. 1126
Section 19 Station communication..................................................................................... 1127

19.1 Communication protocols................................................................................................................ 1127
19.2 Communication protocol diagnostics............................................................................................ 1127
19.3 DNP3 protocol..................................................................................................................................... 1128
19.4 IEC 61850-8-1 communication protocol......................................................................................... 1128
19.4.1 Functionality....................................................................................................................................1128
19.4.2 Communication interfaces and protocols................................................................................ 1129
19.4.3 Settings............................................................................................................................................ 1129
19.4.4 Technical data................................................................................................................................. 1130
19.4.5 Generic communication function for Single Point indication SPGAPC, SP16GAPC.......... 1130
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19.4.5.1 Functionality................................................................................................................................ 1130

19.4.5.2 Function block............................................................................................................................. 1130
19.4.5.3 Signals............................................................................................................................................1131
19.4.5.4 Settings......................................................................................................................................... 1131
19.4.5.5 Monitored data............................................................................................................................ 1131
19.4.5.6 Operation principle..................................................................................................................... 1132
19.4.6 Generic communication function for Measured Value MVGAPC...........................................1132
19.4.6.1 Functionality.................................................................................................................................1133
19.4.6.2 Function block..............................................................................................................................1133
19.4.6.3 Signals........................................................................................................................................... 1133
19.4.6.4 Settings......................................................................................................................................... 1133
19.4.6.5 Monitored data............................................................................................................................1134
19.4.6.6 Operation principle.....................................................................................................................1134
19.4.7 IEC 61850-8-1 redundant station bus communication........................................................... 1134
19.4.7.1 Functionality.................................................................................................................................1135
19.4.7.2 Function block..............................................................................................................................1135
19.4.7.3 Signals........................................................................................................................................... 1135
19.4.7.4 Settings......................................................................................................................................... 1135
19.4.7.5 Monitored data............................................................................................................................1136
19.4.7.6 Principle of operation.................................................................................................................1136
19.5 IEC 61850-9-2LE communication protocol.................................................................................... 1137
19.5.1 Introduction..................................................................................................................................... 1137
19.5.2 Function block.................................................................................................................................1138
19.5.3 Signals...............................................................................................................................................1138
19.5.3.1 Output signals............................................................................................................................. 1138
19.5.4 Settings.............................................................................................................................................1141
19.5.5 Monitored data............................................................................................................................... 1144
19.5.7 Technical data................................................................................................................................. 1148
19.6 LON communication protocol..........................................................................................................1148
19.6.1 Functionality....................................................................................................................................1148
19.6.2 Settings............................................................................................................................................ 1149
19.6.4 Technical data................................................................................................................................. 1166
19.7 SPA communication protocol...........................................................................................................1166
19.7.1 Functionality....................................................................................................................................1166
19.7.2 Design...............................................................................................................................................1166
19.7.3 Settings............................................................................................................................................ 1167
19.7.4.1 Communication ports................................................................................................................ 1174
19.7.5 Technical data................................................................................................................................. 1175
19.8 IEC 60870-5-103 communication protocol.................................................................................... 1175
19.8.1 Introduction..................................................................................................................................... 1175
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19.8.2 Measurands for IEC 60870-5-103 I103MEAS..............................................................................1175

19.8.2.1 Functionality.................................................................................................................................1175
19.8.2.2 Identification................................................................................................................................1176
19.8.2.3 Function block..............................................................................................................................1176
19.8.2.4 Signals........................................................................................................................................... 1176
19.8.2.5 Settings......................................................................................................................................... 1177
19.8.3 Measurands user defined signals for IEC 60870-5-103 I103MEASUSR................................ 1177
19.8.3.1 Functionality.................................................................................................................................1177
19.8.3.2 Identification................................................................................................................................ 1177
19.8.3.3 Function block..............................................................................................................................1178
19.8.3.4 Signals........................................................................................................................................... 1178
19.8.3.5 Settings......................................................................................................................................... 1178
19.8.4 Function status auto-recloser for IEC 60870-5-103 I103AR................................................... 1179
19.8.4.1 Functionality.................................................................................................................................1179
19.8.4.2 Identification................................................................................................................................1179
19.8.4.3 Function block..............................................................................................................................1179
19.8.4.4 Signals........................................................................................................................................... 1180
19.8.4.5 Settings.........................................................................................................................................1180
19.8.5 Function status ground-fault for IEC 60870-5-103 I103EF.................................................... 1180
19.8.5.1 Functionality................................................................................................................................ 1180
19.8.5.2 Identification............................................................................................................................... 1180
19.8.5.3 Function block............................................................................................................................. 1180
19.8.5.4 Signals............................................................................................................................................1181
19.8.5.5 Settings......................................................................................................................................... 1181
19.8.6 Function status fault protection for IEC 60870-5-103 I103FLTPROT...................................1181
19.8.6.1 Functionality.................................................................................................................................1181
19.8.6.2 Identification................................................................................................................................ 1181
19.8.6.3 Function block............................................................................................................................. 1182
19.8.6.4 Signals........................................................................................................................................... 1182
19.8.6.5 Settings......................................................................................................................................... 1183
19.8.7 IED status for IEC 60870-5-103 I103IED..................................................................................... 1183
19.8.7.1 Functionality................................................................................................................................ 1183
19.8.7.2 Identification................................................................................................................................1183
19.8.7.3 Function block............................................................................................................................. 1184
19.8.7.4 Signals........................................................................................................................................... 1184
19.8.7.5 Settings.........................................................................................................................................1184
19.8.8 Supervison status for IEC 60870-5-103 I103SUPERV.............................................................. 1184
19.8.8.1 Functionality................................................................................................................................ 1184
19.8.8.2 Identification................................................................................................................................1185
19.8.8.3 Function block............................................................................................................................. 1185
19.8.8.4 Signals........................................................................................................................................... 1185
19.8.8.5 Settings.........................................................................................................................................1185
19.8.9 Status for user defined signals for IEC 60870-5-103 I103USRDEF....................................... 1186
35
Technical manual
Table of contents
19.8.9.1 Functionality................................................................................................................................ 1186

19.8.9.2 Identification............................................................................................................................... 1186
19.8.9.3 Function block............................................................................................................................. 1186
19.8.9.4 Signals........................................................................................................................................... 1186
19.8.9.5 Settings......................................................................................................................................... 1187
19.8.10 Function commands for IEC 60870-5-103 I103CMD................................................................1188
19.8.10.1 Functionality................................................................................................................................ 1188
19.8.10.2 Identification............................................................................................................................... 1188
19.8.10.3 Function block............................................................................................................................. 1189
19.8.10.4 Signals........................................................................................................................................... 1189
19.8.10.5 Settings.........................................................................................................................................1189
19.8.11 IED commands for IEC 60870-5-103 I103IEDCMD................................................................... 1189
19.8.11.1 Functionality................................................................................................................................ 1189
19.8.11.2 Identification............................................................................................................................... 1189
19.8.11.3 Function block............................................................................................................................. 1190
19.8.11.4 Signals........................................................................................................................................... 1190
19.8.11.5 Settings.........................................................................................................................................1190
19.8.12 Function commands user defined for IEC 60870-5-103 I103USRCMD................................ 1190
19.8.12.1 Functionality................................................................................................................................ 1190
19.8.12.2 Identification................................................................................................................................ 1191
19.8.12.3 Function block..............................................................................................................................1191
19.8.12.4 Signals............................................................................................................................................1191
19.8.12.5 Settings......................................................................................................................................... 1192
19.8.13 Function commands generic for IEC 60870-5-103 I103GENCMD......................................... 1192
19.8.13.1 Functionality.................................................................................................................................1192
19.8.13.2 Identification................................................................................................................................1192
19.8.13.3 Function block............................................................................................................................. 1193
19.8.13.4 Signals........................................................................................................................................... 1193
19.8.13.5 Settings......................................................................................................................................... 1193
19.8.14 IED commands with position and select for IEC 60870-5-103 I103POSCMD..................... 1193
19.8.14.1 Functionality................................................................................................................................ 1193
19.8.14.2 Identification............................................................................................................................... 1194
19.8.14.3 Function block............................................................................................................................. 1194
19.8.14.4 Signals........................................................................................................................................... 1194
19.8.14.5 Settings.........................................................................................................................................1194
19.8.15 IED commands with position for IEC 60870-5-103 I103POSCMDV...................................... 1195
19.8.15.1 Functionality................................................................................................................................ 1195
19.8.15.2 Identification................................................................................................................................1195
19.8.15.3 Function block............................................................................................................................. 1195
19.8.15.4 Signals........................................................................................................................................... 1195
19.8.15.5 Settings.........................................................................................................................................1195
19.8.16 Operation principle ....................................................................................................................... 1196
19.8.16.1 General.......................................................................................................................................... 1196
36
Technical manual
Table of contents
19.8.16.2 Communication ports................................................................................................................1205

19.8.17 Technical data.................................................................................................................................1205
19.9 Horizontal communication via GOOSE for interlocking GOOSEINTLKRCV............................ 1205
19.9.1 Functionality................................................................................................................................... 1205
19.9.2 Function block................................................................................................................................ 1206
19.9.3 Signals.............................................................................................................................................. 1206
19.9.4 Settings............................................................................................................................................1208
19.10 Goose binary receive GOOSEBINRCV..............................................................................................1210
19.10.1 Function block.................................................................................................................................1210
19.10.2 Signals.............................................................................................................................................. 1210
19.10.3 Settings.............................................................................................................................................1211
19.11 GOOSE function block to receive a double point value GOOSEDPRCV....................................1212
19.11.1 Identification................................................................................................................................... 1212
19.11.2 Functionality.................................................................................................................................... 1213
19.11.3 Function block................................................................................................................................. 1213
19.11.4 Signals...............................................................................................................................................1213
19.11.5 Settings.............................................................................................................................................1213
19.12 GOOSE function block to receive an integer value GOOSEINTRCV.......................................... 1214
19.12.1 Identification................................................................................................................................... 1214
19.12.2 Functionality....................................................................................................................................1214
19.12.3 Function block.................................................................................................................................1214
19.12.4 Signals...............................................................................................................................................1214
19.12.5 Settings............................................................................................................................................ 1215
19.13 GOOSE function block to receive a measurand value GOOSEMVRCV...................................... 1215
19.13.1 Identification................................................................................................................................... 1215
19.13.2 Functionality....................................................................................................................................1216
19.13.3 Function block.................................................................................................................................1216
19.13.4 Signals...............................................................................................................................................1216
19.13.5 Settings............................................................................................................................................ 1216
19.14 GOOSE function block to receive a single point value GOOSESPRCV...................................... 1217
19.14.1 Identification................................................................................................................................... 1217
19.14.2 Functionality.................................................................................................................................... 1217
19.14.3 Function block................................................................................................................................. 1217
19.14.4 Signals...............................................................................................................................................1217
19.14.5 Settings............................................................................................................................................ 1218
19.15 GOOSE VCTR configuration for send and receive GOOSEVCTRCONF..................................... 1218
19.15.1 Identification................................................................................................................................... 1218
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Technical manual
Table of contents
19.15.2 Functionality....................................................................................................................................1219
19.15.3 Settings............................................................................................................................................ 1219
19.16 GOOSE voltage control receiving block GOOSEVCTRRCV.......................................................... 1219
19.16.1 Identification................................................................................................................................... 1219
19.16.2 Functionality....................................................................................................................................1219
19.16.3 Function block................................................................................................................................ 1220
19.16.4 Signals.............................................................................................................................................. 1220
19.17 MULTICMDRCV and MULTICMDSND...............................................................................................1220
19.17.1 Functionality................................................................................................................................... 1220
19.17.2 Design............................................................................................................................................... 1221
19.17.2.1 General...........................................................................................................................................1221
19.17.3 Function block................................................................................................................................. 1221
19.17.4 Signals...............................................................................................................................................1222
19.17.5 Settings............................................................................................................................................ 1223
19.18 Security events on protocols SECALARM...................................................................................... 1224
19.18.1 Security alarm SECALARM............................................................................................................ 1224
19.18.1.1 Signals........................................................................................................................................... 1224
19.18.1.2 Settings.........................................................................................................................................1224
19.19 Activity logging parameters ACTIVLOG......................................................................................... 1224
19.19.1 Activity logging ACTIVLOG...........................................................................................................1224
19.19.2 Settings............................................................................................................................................ 1225
Section 20 Remote communication.................................................................................... 1227

20.1 Binary signal transfer......................................................................................................................... 1227
20.1.1 Identification................................................................................................................................... 1227
20.1.2 Functionality....................................................................................................................................1227
20.1.3 Function block.................................................................................................................................1228
20.1.4 Signals.............................................................................................................................................. 1228
20.1.5 Settings............................................................................................................................................1230
20.1.6 Monitored data............................................................................................................................... 1233
20.2 Transmission of local analog data via LDCM to remote end, function block LDCMTRN
called LDCMTransmit.........................................................................................................................1235
20.2.1 Function block.................................................................................................................................1235
20.2.2 Signals.............................................................................................................................................. 1235
Section 21 Security................................................................................................................1237
21.1 Authority check ATHCHCK................................................................................................................ 1237
21.1.1 Identification................................................................................................................................... 1237
21.1.2 Functionality....................................................................................................................................1237
21.1.3.1 Authorization with Central Account Management enabled IED....................................... 1240
21.2 Authority management AUTHMAN................................................................................................. 1242
38
Technical manual
Table of contents
21.2.1 Identification...................................................................................................................................1242
21.2.2 AUTHMAN........................................................................................................................................ 1243
21.2.3 Settings............................................................................................................................................ 1243
21.3 FTP access with password FTPACCS..............................................................................................1243
21.3.1 Identification...................................................................................................................................1243
21.3.2 FTP access with TLS, FTPACCS................................................................................................... 1243
21.3.3 Settings............................................................................................................................................1244
21.4 Authority status ATHSTAT................................................................................................................1244
21.4.1 Identification.................................................................................................................................. 1244
21.4.2 Functionality................................................................................................................................... 1244
21.4.3 Function block................................................................................................................................ 1244
21.4.4 Signals.............................................................................................................................................. 1244
21.4.5 Settings............................................................................................................................................1245
21.4.6 Operation principle .......................................................................................................................1245
21.5 Self supervision with internal event list INTERRSIG.................................................................... 1245
21.5.1 Functionality................................................................................................................................... 1245
21.5.2 Function block................................................................................................................................ 1245
21.5.3 Signals.............................................................................................................................................. 1246
21.5.4 Settings............................................................................................................................................1246
21.5.5.1 Internal signals............................................................................................................................ 1247
21.5.5.2 Supervision of analog inputs....................................................................................................1249
21.5.6 Technical data.................................................................................................................................1249
21.6 ChangeLock function CHNGLCK..................................................................................................... 1250
21.6.1 Functionality................................................................................................................................... 1250
21.6.2 Function block................................................................................................................................ 1250
21.6.3 Signals.............................................................................................................................................. 1250
21.7 Denial of service DOS......................................................................................................................... 1251
21.7.1 Functionality ................................................................................................................................... 1251
21.7.2 Function blocks...............................................................................................................................1251
21.7.3 Signals.............................................................................................................................................. 1252
21.7.4 Settings............................................................................................................................................ 1252
21.7.5 Monitored data............................................................................................................................... 1253
Section 22 Basic IED functions............................................................................................ 1255

22.1 Time synchronization.........................................................................................................................1255
22.1.1 Functionality................................................................................................................................... 1255
22.1.2 Settings............................................................................................................................................ 1255
22.1.3.1 General concepts........................................................................................................................ 1265
22.1.3.2 Real-time clock (RTC) operation.............................................................................................. 1267
39
Technical manual
Table of contents
22.1.3.3 Synchronization alternatives....................................................................................................1268

22.1.3.4 Process bus IEC 61850-9-2LE synchronization..................................................................... 1270
22.1.4 Technical data.................................................................................................................................1270
22.2 Parameter setting groups................................................................................................................. 1271
22.2.1 Functionality.................................................................................................................................... 1271
22.2.2 Function block................................................................................................................................. 1271
22.2.3 Signals...............................................................................................................................................1271
22.2.4 Settings............................................................................................................................................ 1272
22.3 Test mode functionality TEST.......................................................................................................... 1273
22.3.1 Functionality....................................................................................................................................1273
22.3.2 Function block.................................................................................................................................1274
22.3.3 Signals.............................................................................................................................................. 1274
22.3.4 Settings............................................................................................................................................ 1274
22.4 IED identifiers...................................................................................................................................... 1275
22.4.1 Functionality....................................................................................................................................1275
22.4.2 Settings ........................................................................................................................................... 1276
22.5 Product information...........................................................................................................................1276
22.5.1 Functionality....................................................................................................................................1276
22.5.2 Settings ........................................................................................................................................... 1276
22.5.3 Factory defined settings...............................................................................................................1277
22.6 Signal matrix for binary inputs SMBI.............................................................................................. 1277
22.6.1 Functionality.................................................................................................................................... 1277
22.6.2 Function block.................................................................................................................................1278
22.6.3 Signals.............................................................................................................................................. 1278
22.7 Signal matrix for binary outputs SMBO ........................................................................................ 1279
22.7.1 Functionality....................................................................................................................................1279
22.7.2 Function block.................................................................................................................................1279
22.7.3 Signals.............................................................................................................................................. 1279
22.8 Signal matrix for mA inputs SMMI.................................................................................................. 1280
22.8.1 Functionality................................................................................................................................... 1280
22.8.2 Function block................................................................................................................................ 1280
22.8.3 Signals...............................................................................................................................................1281
22.9 Signal matrix for analog inputs SMAI............................................................................................. 1281
22.9.1 Functionality....................................................................................................................................1281
22.9.2 Function block.................................................................................................................................1282
22.9.3 Signals.............................................................................................................................................. 1282
22.9.4 Settings............................................................................................................................................1284
40
Technical manual
Table of contents
22.9.5.1 Frequency values........................................................................................................................ 1286

22.10 Summation block 3 phase 3PHSUM................................................................................................ 1287
22.10.1 Functionality....................................................................................................................................1287
22.10.2 Function block.................................................................................................................................1287
22.10.3 Signals.............................................................................................................................................. 1287
22.10.4 Settings............................................................................................................................................1288
22.11 Global base values GBASVAL............................................................................................................1288
22.11.1 Identification.................................................................................................................................. 1288
22.11.2 Functionality................................................................................................................................... 1289
22.11.3 Settings............................................................................................................................................1289
22.12 Primary system values PRIMVAL......................................................................................................1289
22.12.1 Identification...................................................................................................................................1289
22.12.2 Functionality................................................................................................................................... 1289
22.12.3 Settings............................................................................................................................................1289
Section 23 IED hardware.......................................................................................................1291

23.1 Overview............................................................................................................................................... 1291
23.1.1 Variants of case size with local HMI display..............................................................................1291
23.1.2 Case from the rear side.................................................................................................................1293
23.2 Hardware modules............................................................................................................................. 1297
23.2.1 Overview...........................................................................................................................................1297
23.2.2 Numeric processing module (NUM)........................................................................................... 1298
23.2.2.1 Introduction................................................................................................................................. 1298
23.2.2.2 Functionality................................................................................................................................ 1298
23.2.2.3 Block diagram..............................................................................................................................1299
23.2.3 Power supply module (PSM)........................................................................................................ 1299
23.2.3.1 Introduction................................................................................................................................. 1299
23.2.3.2 Design........................................................................................................................................... 1300
23.2.3.3 Technical data............................................................................................................................. 1300
23.2.4 Local human-machine interface (Local HMI)............................................................................1300
23.2.5 Transformer input module (TRM)...............................................................................................1300
23.2.5.1 Introduction.................................................................................................................................1300
23.2.5.2 Design............................................................................................................................................1301
23.2.5.3 Technical data............................................................................................................................. 1302
23.2.6 Analog digital conversion module, with time synchronization (ADM) ...............................1304
23.2.6.1 Introduction.................................................................................................................................1304
23.2.6.2 Design........................................................................................................................................... 1304
23.2.7 Binary input module (BIM)............................................................................................................1306
23.2.7.1 Introduction.................................................................................................................................1306
23.2.7.2 Design........................................................................................................................................... 1306
23.2.7.3 Signals...........................................................................................................................................1309
23.2.7.4 Settings.........................................................................................................................................1310
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Technical manual
Table of contents
23.2.7.5 Monitored data............................................................................................................................1310

23.2.7.6 Technical data.............................................................................................................................. 1311
23.2.8 Binary output modules (BOM)......................................................................................................1312
23.2.8.1 Introduction..................................................................................................................................1312
23.2.8.2 Design............................................................................................................................................ 1312
23.2.8.3 Signals........................................................................................................................................... 1314
23.2.8.4 Settings......................................................................................................................................... 1315
23.2.8.5 Monitored data............................................................................................................................ 1315
23.2.8.6 Technical data..............................................................................................................................1318
23.2.9 Static binary output module (SOM)............................................................................................1319
23.2.9.1 Introduction................................................................................................................................. 1319
23.2.9.2 Design............................................................................................................................................1319
23.2.9.3 Signals...........................................................................................................................................1320
23.2.9.4 Settings......................................................................................................................................... 1321
23.2.9.5 Monitored data............................................................................................................................ 1321
23.2.9.6 Technical data..............................................................................................................................1323
23.2.10 Binary input/output module (IOM).............................................................................................1325
23.2.10.1 Introduction................................................................................................................................. 1325
23.2.10.2 Design............................................................................................................................................1325
23.2.10.3 Signals........................................................................................................................................... 1327
23.2.10.4 Settings.........................................................................................................................................1328
23.2.10.5 Monitored data............................................................................................................................1328
23.2.10.6 Technical data............................................................................................................................. 1330
23.2.11 mA input module (MIM).................................................................................................................1333
23.2.11.1 Introduction................................................................................................................................. 1333
23.2.11.2 Design............................................................................................................................................1333
23.2.11.3 Signals...........................................................................................................................................1334
23.2.11.4 Settings.........................................................................................................................................1335
23.2.11.5 Monitored data............................................................................................................................1337
23.2.11.6 Technical data..............................................................................................................................1337
23.2.12 Serial and LON communication module (SLM) ........................................................................1337
23.2.12.1 Introduction................................................................................................................................. 1337
23.2.12.2 Design........................................................................................................................................... 1338
23.2.12.3 Technical data..............................................................................................................................1339
23.2.13 Galvanic RS485 communication module................................................................................... 1339
23.2.13.1 Introduction................................................................................................................................. 1339
23.2.13.2 Design........................................................................................................................................... 1339
23.2.13.3 Technical data..............................................................................................................................1341
23.2.14 Optical ethernet module (OEM)...................................................................................................1341
23.2.14.1 Introduction................................................................................................................................. 1341
23.2.14.2 Functionality................................................................................................................................ 1341
23.2.14.3 Design............................................................................................................................................1341
23.2.14.4 Technical data..............................................................................................................................1342
42
Technical manual
Table of contents
23.2.15 Line data communication module (LDCM)............................................................................... 1342

23.2.15.1 Introduction................................................................................................................................. 1342
23.2.15.2 Design........................................................................................................................................... 1343
23.2.15.3 Technical data............................................................................................................................. 1344
23.2.16 Galvanic X.21 line data communication (X.21-LDCM)..............................................................1344
23.2.16.1 Introduction.................................................................................................................................1344
23.2.16.2 Design........................................................................................................................................... 1344
23.2.16.3 Functionality................................................................................................................................ 1346
23.2.16.4 Technical data..............................................................................................................................1347
23.2.17 GPS time synchronization module (GTM)..................................................................................1347
23.2.17.1 Introduction................................................................................................................................. 1347
23.2.17.2 Design........................................................................................................................................... 1347
23.2.17.3 Monitored data........................................................................................................................... 1348
23.2.17.4 Technical data............................................................................................................................. 1348
23.2.18 GPS antenna....................................................................................................................................1348
23.2.18.1 Introduction................................................................................................................................. 1348
23.2.18.2 Design........................................................................................................................................... 1348
23.2.18.3 Technical data............................................................................................................................. 1350
23.2.19 IRIG-B time synchronization module IRIG-B............................................................................. 1350
23.2.19.1 Introduction................................................................................................................................. 1350
23.2.19.2 Design........................................................................................................................................... 1350
23.2.19.3 Settings......................................................................................................................................... 1351
23.2.19.4 Technical data.............................................................................................................................. 1351
23.3 Dimensions.......................................................................................................................................... 1352
23.3.1 Case without rear cover................................................................................................................ 1352
23.3.2 Case with rear cover...................................................................................................................... 1354
23.3.3 Flush mounting dimensions........................................................................................................ 1356
23.3.4 Side-by-side flush mounting dimensions..................................................................................1357
23.3.5 Wall mounting dimensions...........................................................................................................1358
23.3.6 External resistor unit for high impedance differential protection...................................... 1358
23.4 Mounting alternatives....................................................................................................................... 1360
23.4.1 Flush mounting.............................................................................................................................. 1360
23.4.1.1 Overview....................................................................................................................................... 1360
23.4.1.2 Mounting procedure for flush mounting................................................................................1361
23.4.2 19” panel rack mounting............................................................................................................... 1362
23.4.2.1 Overview....................................................................................................................................... 1362
23.4.2.2 Mounting procedure for 19” panel rack mounting...............................................................1363
23.4.3 Wall mounting.................................................................................................................................1364
23.4.3.1 Overview....................................................................................................................................... 1364
23.4.3.2 Mounting procedure for wall mounting.................................................................................1364
23.4.3.3 How to reach the rear side of the IED.....................................................................................1365
23.4.4 Side-by-side 19” rack mounting.................................................................................................. 1366
23.4.4.1 Overview....................................................................................................................................... 1366
43
Technical manual
Table of contents
23.4.4.2 Mounting procedure for side-by-side rack mounting.........................................................1366

23.4.4.3 IED mounted with a RHGS6 case............................................................................................. 1367
23.4.5 Side-by-side flush mounting........................................................................................................1367
23.4.5.1 Overview....................................................................................................................................... 1367
23.4.5.2 Mounting procedure for side-by-side flush mounting........................................................1368
23.5 Technical data..................................................................................................................................... 1368
23.5.1 Enclosure......................................................................................................................................... 1368
23.5.2 Electrical safety.............................................................................................................................. 1369
23.5.3 Connection system........................................................................................................................ 1369
23.5.4 Influencing factors.........................................................................................................................1370
23.5.5 Type tests according to standard............................................................................................... 1371
Section 24 Labels...................................................................................................................1373
24.1 Labels on IED........................................................................................................................................1373
Section 25 Connection diagrams........................................................................................ 1377
Section 26 Inverse time characteristics............................................................................. 1379

26.1 Application........................................................................................................................................... 1379
26.2 Principle of operation........................................................................................................................ 1381
26.2.1 Mode of operation..........................................................................................................................1381
26.3 Inverse characteristics...................................................................................................................... 1386
Section 27 Glossary...............................................................................................................1417
44
Technical manual
1MRK 505 344-UUS B Section 1
Introduction
Section 1 Introduction
1.1 This manual GUID-AB423A30-13C2-46AF-B7FE-A73BB425EB5F v19
The technical manual contains operation principle descriptions, and lists function blocks, logic
diagrams, input and output signals, setting parameters and technical data, sorted per function.
The manual can be used as a technical reference during the engineering phase, installation and
commissioning phase, and during normal service.
1.2 Intended audience GUID-C9B8127F-5748-4BEA-9E4F-CC762FE28A3A v10
This manual addresses system engineers and installation and commissioning personnel, who use
technical data during engineering, installation and commissioning, and in normal service.
The system engineer must have a thorough knowledge of protection systems, protection
equipment, protection functions and the configured functional logic in the IEDs. The installation
and commissioning personnel must have a basic knowledge in handling electronic equipment.
45
Technical manual
Section 1 1MRK 505 344-UUS B
Introduction
1.3 Product documentation
1.3.1 Product documentation set GUID-3AA69EA6-F1D8-47C6-A8E6-562F29C67172 v15
Deinstalling & disposal

Planning & purchase
Decommissioning
Commissioning
Maintenance
Engineering
Operation
Installing
Engineering manual
Installation manual
Commissioning manual
Operation manual
Application manual
Technical manual
Communication
protocol manual
Cyber security
deployment guideline
IEC07000220-4-en.vsd
IEC07000220 V4 EN-US
Figure 1: The intended use of manuals throughout the product lifecycle

The engineering manual contains instructions on how to engineer the IEDs using the various tools
available within the PCM600 software. The manual provides instructions on how to set up a
PCM600 project and insert IEDs to the project structure. The manual also recommends a sequence
for the engineering of protection and control functions, LHMI functions as well as communication
engineering for IEC 60870-5-103, IEC 61850, DNP3, LON and SPA.
The installation manual contains instructions on how to install the IED. The manual provides
procedures for mechanical and electrical installation. The chapters are organized in the
chronological order in which the IED should be installed.
The commissioning manual contains instructions on how to commission the IED. The manual can
also be used by system engineers and maintenance personnel for assistance during the testing
phase. The manual provides procedures for the checking of external circuitry and energizing the
IED, parameter setting and configuration as well as verifying settings by secondary injection. The
manual describes the process of testing an IED in a substation which is not in service. The
chapters are organized in the chronological order in which the IED should be commissioned. The
relevant procedures may be followed also during the service and maintenance activities.
46
Technical manual
Introduction
The operation manual contains instructions on how to operate the IED once it has been
commissioned. The manual provides instructions for the monitoring, controlling and setting of the
IED. The manual also describes how to identify disturbances and how to view calculated and
measured power grid data to determine the cause of a fault.
The application manual contains application descriptions and setting guidelines sorted per
function. The manual can be used to find out when and for what purpose a typical protection
function can be used. The manual can also provide assistance for calculating settings.
The technical manual contains operation principle descriptions, and lists function blocks, logic
diagrams, input and output signals, setting parameters and technical data, sorted per function.
The manual can be used as a technical reference during the engineering phase, installation and
The communication protocol manual describes the communication protocols supported by the
IED. The manual concentrates on the vendor-specific implementations.
The point list manual describes the outlook and properties of the data points specific to the IED.
The manual should be used in conjunction with the corresponding communication protocol
manual.
The cyber security deployment guideline describes the process for handling cyber security when
communicating with the IED. Certification, Authorization with role based access control, and
product engineering for cyber security related events are described and sorted by function. The
guideline can be used as a technical reference during the engineering phase, installation and
1.3.2 Document revision history GUID-C8027F8A-D3CB-41C1-B078-F9E59BB73A6C v2
Document revision/date History

January 2016 First release
B/March 2019 Maintenance release
1.3.3 Related documents GUID-94E8A5CA-BE1B-45AF-81E7-5A41D34EE112 v4
Documents related to RED670 Document numbers

Application manual 1MRK 505 343-UUS
Commissioning manual 1MRK 505 345-UUS
Product guide 1MRK 505 346-BEN
Technical manual 1MRK 505 308-UUS
Type test certificate 1MRK 505 346-TUS
670 series manuals Document numbers

Operation manual 1MRK 500 123-UUS
Engineering manual 1MRK 511 355-UUS
Installation manual 1MRK 514 024-UUS
Communication protocol manual, DNP3 1MRK 511 348-UUS
Communication protocol manual, IEC 61850 Edition 2 1MRK 511 350-UEN
Table continues on next page
47
Technical manual
Introduction
670 series manuals Document numbers

Point list manual, DNP3 1MRK 511 354-UUS
Accessories guide 1MRK 514 012-BUS
Connection and Installation components 1MRK 513 003-BEN
Test system, COMBITEST 1MRK 512 001-BEN
1.4 Document symbols and conventions
1.4.1 Symbols GUID-2945B229-DAB0-4F15-8A0E-B9CF0C2C7B15 v12
The electrical warning icon indicates the presence of a hazard which could result in
electrical shock.
The warning icon indicates the presence of a hazard which could result in personal
injury.
The caution hot surface icon indicates important information or warning about the
temperature of product surfaces.
Class 1 Laser product. Take adequate measures to protect the eyes and do not view
directly with optical instruments.
The caution icon indicates important information or warning related to the

concept discussed in the text. It might indicate the presence of a hazard which
could result in corruption of software or damage to equipment or property.
The information icon alerts the reader of important facts and conditions.
The tip icon indicates advice on, for example, how to design your project or how to
use a certain function.
Although warning hazards are related to personal injury, it is necessary to understand that under
certain operational conditions, operation of damaged equipment may result in degraded process
performance leading to personal injury or death. It is important that the user fully complies with all
warning and cautionary notices.
48
Technical manual
Introduction
1.4.2 Document conventions GUID-96DFAB1A-98FE-4B26-8E90-F7CEB14B1AB6 v8
• Abbreviations and acronyms in this manual are spelled out in the glossary. The glossary also
contains definitions of important terms.
• Push button navigation in the LHMI menu structure is presented by using the push button
icons.
For example, to navigate between the options, use and .
• HMI menu paths are presented in bold.
For example, select Main menu/Settings.
• LHMI messages are shown in Courier font.
For example, to save the changes in non-volatile memory, select Yes and press .
• Parameter names are shown in italics.
For example, the function can be enabled and disabled with the Operation setting.
• Each function block symbol shows the available input/output signal.
• the character ^ in front of an input/output signal name indicates that the signal name
may be customized using the PCM600 software.
• the character * after an input signal name indicates that the signal must be connected
to another function block in the application configuration to achieve a valid application
configuration.
• Dimensions are provided both in inches and millimeters. If it is not specifically mentioned
then the dimension is in millimeters.
• Logic diagrams describe the signal logic of the function block and are bordered by dashed
lines.
In a logic diagram, input and output signal paths are shown as lines that touch the outer
border of the diagram. Input signals are always on the left-hand side and output signals are
on the right-hand side.
Input and output signals can be configured using PCM600. They can be connected to the
inputs and outputs of other functions and to binary inputs and outputs. Examples of input
signals are BLKTR, BLOCK, and VTSZ. Examples of output signals are TRIP, START, STL1, STL2,
and STL3.
• Frames with a shaded area on the right-hand side represent setting parameters. These
parameters can only be set via the PST or LHMI. Their values are high (1) only when the
corresponding setting parameter is set to the symbolic value specified within the frame.
Example is the signal Timer tPP=On. Their logical values correspond automatically to the
selected setting value.
• Internal signals are illustrated graphically and end approximately 2 mm from the frame
edge. If an internal signal path cannot be drawn with a continuous line, the same signal
name is used where the signal should continue, see figure 2 and figure 3. Example of the
internal signal is BLK.
• Signal paths that extend beyond the logic diagram and continue in another diagram will
be approximately 2 mm from the frame edge, see figure 3 and figure 4. Examples are
STNDL1N, STNDL2N, STNDL3N, STNDL1L2, STNDL2L3, and STNDL3L1.
Figure 2: Logic diagram example with intermediate output signals
Figure 3: Logic diagram example with intermediate input signals
Figure 4: Logic diagram example with a parameter input
49
Technical manual
Introduction
Illustrations are used as an example and might show other products than the one
the manual describes. The example that is illustrated is still valid.
1.5 IEC61850 edition 1 / edition 2 mapping GUID-C5133366-7260-4C47-A975-7DBAB3A33A96 v2
Table 1: IEC61850 edition 1 / edition 2 mapping

Function block name Edition 1 logical nodes Edition 2 logical nodes
AEGPVOC AEGGAPC AEGPVOC
AGSAL AGSAL AGSAL
SECLLN0
ALMCALH ALMCALH ALMCALH
ALTIM ALTIM
ALTMS ALTMS
ALTRK ALTRK
BCZSPDIF BCZSPDIF BCZSPDIF
BCZTPDIF BCZTPDIF BCZTPDIF
BDCGAPC SWSGGIO BBCSWI
BDCGAPC
BRCPTOC BRCPTOC BRCPTOC
BRPTOC BRPTOC BRPTOC
BTIGAPC B16IFCVI BTIGAPC
BUSPTRC_B1 BUSPTRC BUSPTRC
BBSPLLN0
50
Technical manual
Introduction

BUTPTRC_B1 BUTPTRC BUTPTRC
BBTPLLN0
BZISGGIO BZISGGIO BZISGAPC
BZITGGIO BZITGGIO BZITGAPC
BZNSPDIF_A BZNSPDIF BZASGAPC
BZASPDIF
BZNSGAPC
BZNSPDIF
BZNSPDIF_B BZNSPDIF BZBSGAPC
BZBSPDIF
BZNSGAPC
BZNSPDIF
BZNTPDIF_A BZNTPDIF BZATGAPC
BZATPDIF
BZNTGAPC
BZNTPDIF
BZNTPDIF_B BZNTPDIF BZBTGAPC
BZBTPDIF
BZNTGAPC
BZNTPDIF
CBPGAPC CBPLLN0 CBPMMXU
CBPMMXU CBPPTRC
CBPPTRC HOLPTOV
HOLPTOV HPH1PTOV
HPH1PTOV PH3PTOC
PH3PTUC PH3PTUC
PH3PTOC RP3PDOP
RP3PDOP
CCPDSC CCRPLD CCPDSC
CCRBRF CCRBRF CCRBRF
CCRWRBRF CCRWRBRF CCRWRBRF
CCSRBRF CCSRBRF CCSRBRF
CCSSPVC CCSRDIF CCSSPVC
CMMXU CMMXU CMMXU
51
Technical manual
Introduction

CMSQI CMSQI CMSQI
COUVGAPC COUVLLN0 COUVPTOV
COUVPTOV COUVPTUV
COUVPTUV
CVGAPC GF2LLN0 GF2MMXN
GF2MMXN GF2PHAR
GF2PHAR GF2PTOV
GF2PTOV GF2PTUC
GF2PTUC GF2PTUV
GF2PTUV GF2PVOC
GF2PVOC PH1PTRC
PH1PTRC
CVMMXN CVMMXN CVMMXN
D2PTOC D2LLN0 D2PTOC
D2PTOC PH1PTRC
PH1PTRC
DPGAPC DPGGIO DPGAPC
DRPRDRE DRPRDRE DRPRDRE
ECPSCH ECPSCH ECPSCH
ECRWPSCH ECRWPSCH ECRWPSCH
EF2PTOC EF2LLN0 EF2PTRC
EF2PTRC EF2RDIR
EF2RDIR GEN2PHAR
GEN2PHAR PH1PTOC
PH1PTOC
EF4PTOC EF4LLN0 EF4PTRC
EF4PTRC EF4RDIR
EF4RDIR GEN4PHAR
GEN4PHAR PH1PTOC
PH1PTOC
EFPIOC EFPIOC EFPIOC
EFRWPIOC EFRWPIOC EFRWPIOC
ETPMMTR ETPMMTR ETPMMTR
FDPSPDIS FDPSPDIS FDPSPDIS
FMPSPDIS FMPSPDIS FMPSPDIS
FRPSPDIS FPSRPDIS FPSRPDIS
FTAQFVR FTAQFVR FTAQFVR
FUFSPVC SDDRFUF FUFSPVC
SDDSPVC
GENPDIF GENPDIF GENGAPC
GENPDIF
GENPHAR
GENPTRC
GOOSEBINRCV BINGREC
GOOSEDPRCV DPGREC
GOOSEINTLKRCV INTGREC
GOOSEINTRCV INTSGREC
GOOSEMVRCV MVGREC
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Technical manual
Introduction

GOOSESPRCV BINSGREC
GOOSEVCTRRCV VCTRGREC
GOPPDOP GOPPDOP GOPPDOP
PH1PTRC
GRPTTR GRPTTR GRPTTR
GSPTTR GSPTTR GSPTTR
GUPPDUP GUPPDUP GUPPDUP
PH1PTRC
HZPDIF HZPDIF HZPDIF
INDCALCH INDCALH INDCALH
ITBGAPC IB16FCVB ITBGAPC
L3CPDIF L3CPDIF L3CGAPC
L3CPDIF
L3CPHAR
L3CPTRC
L4UFCNT L4UFCNT L4UFCNT
L6CPDIF L6CPDIF L6CGAPC
L6CPDIF
L6CPHAR
L6CPTRC
LAPPGAPC LAPPLLN0 LAPPPDUP
LAPPPDUP LAPPPUPF
LAPPPUPF
LCCRPTRC LCCRPTRC LCCRPTRC
LCNSPTOC LCNSPTOC LCNSPTOC
LCNSPTOV LCNSPTOV LCNSPTOV
LCP3PTOC LCP3PTOC LCP3PTOC
LCP3PTUC LCP3PTUC LCP3PTUC
LCPTTR LCPTTR LCPTTR
LCZSPTOC LCZSPTOC LCZSPTOC
LCZSPTOV LCZSPTOV LCZSPTOV
LD0LLN0 LLN0
LDLPSCH LDLPDIF LDLPSCH
LDRGFC STSGGIO LDRGFC
LEXPDIS LEXPDIS LEXPDIS
LEXPTRC
LFPTTR LFPTTR LFPTTR
LMBRFLO LMBRFLO LMBRFLO
LOVPTUV LOVPTUV LOVPTUV
LPHD LPHD
LPTTR LPTTR LPTTR
53
Technical manual
Introduction

LT3CPDIF LT3CPDIF LT3CGAPC
LT3CPDIF
LT3CPHAR
LT3CPTRC
LT6CPDIF LT6CPDIF LT6CGAPC
LT6CPDIF
LT6CPHAR
LT6CPTRC
MVGAPC MVGGIO MVGAPC
NS2PTOC NS2LLN0 NS2PTOC
NS2PTOC NS2PTRC
NS2PTRC
NS4PTOC EF4LLN0 EF4PTRC
EF4PTRC EF4RDIR
EF4RDIR PH1PTOC
GEN4PHAR
PH1PTOC
O2RWPTOV GEN2LLN0 O2RWPTOV
O2RWPTOV PH1PTRC
PH1PTRC
OC4PTOC OC4LLN0 GEN4PHAR
GEN4PHAR PH3PTOC
PH3PTOC PH3PTRC
PH3PTRC
OEXPVPH OEXPVPH OEXPVPH
OOSPPAM OOSPPAM OOSPPAM
OOSPTRC
OV2PTOV GEN2LLN0 OV2PTOV
OV2PTOV PH1PTRC
PH1PTRC
PAPGAPC PAPGAPC PAPGAPC
PCFCNT PCGGIO PCFCNT
PH4SPTOC GEN4PHAR GEN4PHAR
OCNDLLN0 PH1BPTOC
PH1BPTOC PH1PTRC
PH1PTRC
PHPIOC PHPIOC PHPIOC
PRPSTATUS RCHLCCH RCHLCCH
SCHLCCH
PSLPSCH ZMRPSL PSLPSCH
PSPPPAM PSPPPAM PSPPPAM
PSPPTRC
QCBAY QCBAY
QCRSV QCRSV QCRSV
REFPDIF REFPDIF REFPDIF
ROTIPHIZ ROTIPHIZ ROTIPHIZ
ROTIPTRC
ROV2PTOV GEN2LLN0 PH1PTRC
PH1PTRC ROV2PTOV
ROV2PTOV
54
Technical manual
Introduction

SAPFRC SAPFRC SAPFRC
SAPTOF SAPTOF SAPTOF
SAPTUF SAPTUF SAPTUF
SCCVPTOC SCCVPTOC SCCVPTOC
SCILO SCILO SCILO
SCSWI SCSWI SCSWI
SDEPSDE SDEPSDE SDEPSDE
SDEPTOC
SDEPTOV
SDEPTRC
SESRSYN RSY1LLN0 AUT1RSYN
AUT1RSYN MAN1RSYN
MAN1RSYN SYNRSYN
SYNRSYN
SINGLELCCH SCHLCCH
SLGAPC SLGGIO SLGAPC
SMBRREC SMBRREC SMBRREC
SMPPTRC SMPPTRC SMPPTRC
SP16GAPC SP16GGIO SP16GAPC
SPC8GAPC SPC8GGIO SPC8GAPC
SPGAPC SPGGIO SPGAPC
SSCBR SSCBR SSCBR
SSIMG SSIMG SSIMG
SSIML SSIML SSIML
STBPTOC STBPTOC BBPMSS
STBPTOC
STEFPHIZ STEFPHIZ STEFPHIZ
STTIPHIZ STTIPHIZ STTIPHIZ
SXCBR SXCBR SXCBR
SXSWI SXSWI SXSWI
T2WPDIF T2WPDIF T2WGAPC
T2WPDIF
T2WPHAR
T2WPTRC
T3WPDIF T3WPDIF T3WGAPC
T3WPDIF
T3WPHAR
T3WPTRC
TCLYLTC TCLYLTC TCLYLTC
TCSLTC
TCMYLTC TCMYLTC TCMYLTC
TEIGAPC TEIGGIO TEIGAPC
TEIGGIO
TEILGAPC TEILGGIO TEILGAPC
TMAGAPC TMAGGIO TMAGAPC
55
Technical manual
Introduction

TPPIOC TPPIOC TPPIOC
TR1ATCC TR1ATCC TR1ATCC
TR8ATCC TR8ATCC TR8ATCC
TRPTTR TRPTTR TRPTTR
U2RWPTUV GEN2LLN0 PH1PTRC
PH1PTRC U2RWPTUV
U2RWPTUV
UV2PTUV GEN2LLN0 PH1PTRC
PH1PTRC UV2PTUV
UV2PTUV
VDCPTOV VDCPTOV VDCPTOV
VDSPVC VDRFUF VDSPVC
VMMXU VMMXU VMMXU
VMSQI VMSQI VMSQI
VNMMXU VNMMXU VNMMXU
VRPVOC VRLLN0 PH1PTRC
PH1PTRC PH1PTUV
PH1PTUV VRPVOC
VRPVOC
VSGAPC VSGGIO VSGAPC
WRNCALH WRNCALH WRNCALH
ZC1PPSCH ZPCPSCH ZPCPSCH
ZC1WPSCH ZPCWPSCH ZPCWPSCH
ZCLCPSCH ZCLCPLAL ZCLCPSCH
ZCPSCH ZCPSCH ZCPSCH
ZCRWPSCH ZCRWPSCH ZCRWPSCH
ZCVPSOF ZCVPSOF ZCVPSOF
ZGVPDIS ZGVLLN0 PH1PTRC
PH1PTRC ZGVPDIS
ZGVPDIS ZGVPTUV
ZGVPTUV
ZMCAPDIS ZMCAPDIS ZMCAPDIS
ZMCPDIS ZMCPDIS ZMCPDIS
ZMFCPDIS ZMFCLLN0 PSFPDIS
PSFPDIS ZMFPDIS
ZMFPDIS ZMFPTRC
ZMFPTRC ZMMMXU
ZMMMXU
ZMFPDIS ZMFLLN0 PSFPDIS
PSFPDIS PSFPDIS
ZMFPDIS ZMFPDIS
ZMFPTRC ZMFPTRC
ZMMMXU ZMMMXU
ZMHPDIS ZMHPDIS ZMHPDIS
ZMMAPDIS ZMMAPDIS ZMMAPDIS
ZMMPDIS ZMMPDIS ZMMPDIS
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Technical manual
Introduction

ZMQAPDIS ZMQAPDIS ZMQAPDIS
ZMQPDIS ZMQPDIS ZMQPDIS
ZMRAPDIS ZMRAPDIS ZMRAPDIS
ZMRPDIS ZMRPDIS ZMRPDIS
ZMRPSB ZMRPSB ZMRPSB
ZSMGAPC ZSMGAPC ZSMGAPC
57
Technical manual
58
Available functions
Section 2 Available functions
2.1 Main protection functions GUID-66BAAD98-851D-4AAC-B386-B38B57718BD2 v12.1.1
Table 2: Example of quantities
2 = number of basic instances

0-3 = option quantities
3-A03 = optional function included in packages A03 (refer to ordering details)
IEC 61850 ANSI Function description Line Differential

RED670
(Customized)
Differential protection
HZPDIF 87 1Ph high impedance differential protection 0-3
REFPDIF 87N Restricted earth fault protection, low impedance 0–2
L3CPDIF 87L Line differential protection, 3 CT sets, 2–3 line ends 1
L6CPDIF 87L Line differential protection, 6 CT sets, 3–5 line ends 1
LT3CPDIF 87LT Line differential protection, 3 CT sets, with inzone 1
transformers, 2–3 line ends
LT6CPDIF 87LT Line differential protection, 6 CT sets, with inzone 1
transformers, 3–5 line ends
LDLPSCH 87L Line differential protection logic 1
LDRGFC 11REL Additional security logic for differential protection 0-1
Impedance protection
ZMQPDIS, 21 Distance protection zone, quadrilateral characteristic 0-5
ZMQAPDIS
ZDRDIR 21D Directional impedance quadrilateral 0-2
ZMCPDIS, 21 Distance measuring zone, quadrilateral characteristic 0-5
ZMCAPDIS for series compensated lines
ZDSRDIR 21D Directional impedance quadrilateral, including series 0-2
compensation
FDPSPDIS 21 Phase selection, quadrilateral characteristic with fixed 0-2
angle
ZMHPDIS 21 Fullscheme distance protection, mho characteristic 0-5
ZMMPDIS, 21 Fullscheme distance protection, quadrilateral for 0-5
ZMMAPDIS ground faults
ZDMRDIR 21D Directional impedance element for mho characteristic 0-2
ZDARDIR Additional distance protection directional function for 0-2
ground faults
ZSMGAPC Mho impedance supervision logic 0-1
FMPSPDIS 21 Faulty phase identification with load enchroachment 0-2
59
Technical manual
Available functions
IEC 61850 ANSI Function description Line Differential

RED670
(Customized)
ZMRPDIS, 21 Distance protection zone, quadrilateral characteristic, 0-5
ZMRAPDIS separate settings
FRPSPDIS 21 Phase selection, quadrilateral characteristic with fixed 0-2
angle
ZMFPDIS 21 High speed distance protection, quadrilateral and 0–1
mho - 6 zones
ZMFCPDIS 21 High speed distance protection for series 0–1
compensated lines, quadrilateral and mho - 6 zones
ZMRPSB 68 Power swing detection 0-1
PSLPSCH Power swing logic 0-1
PSPPPAM 78 Pole slip/out-of-step protection 0-1
OOSPPAM 78 Out-of-step protection 0–1
ZCVPSOF Automatic switch onto fault logic, voltage and current 0-1
based
PPLPHIZ Phase preference logic 0-1
2.2 Back-up protection functions GUID-A8D0852F-807F-4442-8730-E44808E194F0 v10
IEC 61850 ANSI Function description

RED670
(Customized)
Current protection
PHPIOC 50 Instantaneous phase overcurrent protection 0-3
OC4PTOC 51_671) Four step phase overcurrent protection 0-3
EFPIOC 50N Instantaneous residual overcurrent protection 0-1

EF4PTOC 51N Four step residual overcurrent protection 0-3
67N2)
NS4PTOC 46I2 Four step directional negative phase sequence 0-2
overcurrent protection
SDEPSDE 67N Sensitive directional residual overcurrent and power 0-1
protection
LCPTTR 26 Thermal overload protection, one time constant, 0–2
Celsius
LFPTTR 26 Thermal overload protection, one time constant, 0–2
Fahrenheit
CCRBRF 50BF Breaker failure protection 0-2
STBPTOC 50STB Stub protection 0-2
CCPDSC 52PD Pole discordance protection 0-2
GUPPDUP 37 Directional underpower protection 0-2
GOPPDOP 32 Directional overpower protection 0-2
BRCPTOC 46 Broken conductor check 1
60
Technical manual
Available functions
IEC 61850 ANSI Function description

RED670
(Customized)
VRPVOC 51V Voltage restrained overcurrent protection 0-3
Voltage protection
UV2PTUV 27 Two step undervoltage protection 0-2
OV2PTOV 59 Two step overvoltage protection 0-2
ROV2PTOV 59N Two step residual overvoltage protection 0-2
OEXPVPH 24 Overexcitation protection 0-1
VDCPTOV 60 Voltage differential protection 0-2
LOVPTUV 27 Loss of voltage check 1
PAPGAPC 27 Radial feeder protection 0–1
Frequency protection
SAPTUF 81 Underfrequency protection 0-6
SAPTOF 81 Overfrequency protection 0-6
SAPFRC 81 Rate-of-change frequency protection 0-2
Multipurpose protection
CVGAPC General current and voltage protection 0-4
General calculation
SMAIHPAC Multipurpose filter 0-6
1) 67 requires voltage
2) 67N requires voltage
2.3 Control and monitoring functions GUID-E3777F16-0B76-4157-A3BF-0B6B978863DE v12
IEC 61850 ANSI Function description Line

Differential
RED670
Control
SESRSYN 25 Synchrocheck, energizing check and 0-2
synchronizing
SMBRREC 79 Autorecloser 0-4
APC10 3 Apparatus control for single bay, max 10 0-1
apparatuses (1CB) incl. interlocking
APC15 3 Apparatus control for single bay, max 15 0-1
apparatuses (2CBs) incl. interlocking
QCBAY Apparatus control 1
LOCREM Handling of LRswitch positions 1
LOCREMCTRL LHMI control of PSTO 1
61
Technical manual
Available functions

Differential
RED670
SLGAPC Logic rotating switch for function selection 15
and LHMI presentation
VSGAPC Selector mini switch 20
DPGAPC Generic communication function for Double 16
Point indication
SPC8GAPC Single point generic control 8 signals 5
AUTOBITS AutomationBits, command function for 3
DNP3.0
SINGLECMD Single command, 16 signals 4
I103CMD Function commands for IEC 60870-5-103 1
I103GENCMD Function commands generic for IEC 50
60870-5-103
I103POSCMD IED commands with position and select for 50
IEC 60870-5-103
I103POSCMDV IED direct commands with position for IEC 10
60870-5-103
I103IEDCMD IED commands for IEC 60870-5-103 1
I103USRCMD Function commands user defined for IEC 1
60870-5-103
Secondary
system
supervision
CCSSPVC 87 Current circuit supervision 0-2
FUFSPVC Fuse failure supervision 0-3
VDSPVC 60 Fuse failure supervision based on voltage 0-3
difference
Logic
SMPPTRC 94 Tripping logic 6
TMAGAPC Trip matrix logic 12
ALMCALH Logic for group alarm 5
WRNCALH Logic for group warning 5
INDCALH Logic for group indication 5
AND, GATE, INV, Basic configurable logic blocks (see Table 3) 40-280
LLD, OR,
PULSETIMER,
RSMEMORY,
SRMEMORY,
TIMERSET, XOR
62
Technical manual
Available functions

Differential
RED670
ANDQT, Configurable logic blocks Q/T (see Table 4) 0–1
INDCOMBSPQT,
INDEXTSPQT,
INVALIDQT,
INVERTERQT,
ORQT,
PULSETIMERQT,
RSMEMORYQT,
SRMEMORYQT,
TIMERSETQT,
XORQT
AND, GATE, INV, Extension logic package (see Table 5) 0–1
LLD, OR,
PULSETIMER,
SLGAPC,
SRMEMORY,
TIMERSET,
VSGAPC, XOR
FXDSIGN Fixed signal function block 1
B16I Boolean 16 to Integer conversion 18
BTIGAPC Boolean 16 to Integer conversion with Logic 16
Node representation
IB16 Integer to Boolean 16 conversion 18
ITBGAPC Integer to Boolean 16 conversion with Logic 16
Node representation
TEIGAPC Elapsed time integrator with limit 12
transgression and overflow supervision
INTCOMP Comparator for integer inputs 12
REALCOMP Comparator for real inputs 12
Monitoring
CVMMXN, Measurements 6
VMMXU, CMSQI,
VMSQI, VNMMXU
CMMXU Measurements 10
AISVBAS Function block for service value presentation 1
of secondary analog inputs
EVENT Event function 20
DRPRDRE, Disturbance report 1
A1RADR-A4RADR,
B1RBDR-B8RBDR
SPGAPC Generic communication function for Single 64
Point indication
SP16GAPC Generic communication function for Single 16
Point indication 16 inputs
MVGAPC Generic communication function for 24
Measured Value
BINSTATREP Logical signal status report 3
RANGE_XP Measured value expander block 66
63
Technical manual
Available functions

Differential
RED670
SSIMG 63 Gas medium supervision 21
SSIML 71 Liquid medium supervision 3
SSCBR Circuit breaker monitoring 0-6
LMBRFLO Fault locator 1
I103MEAS Measurands for IEC 60870-5-103 1
I103MEASUSR Measurands user defined signals for IEC 3
60870-5-103
I103AR Function status auto-recloser for IEC 1
60870-5-103
I103EF Function status earth-fault for IEC 1
60870-5-103
I103FLTPROT Function status fault protection for IEC 1
60870-5-103
I103IED IED status for IEC 60870-5-103 1
I103SUPERV Supervison status for IEC 60870-5-103 1
I103USRDEF Status for user defined signals for IEC 20
60870-5-103
L4UFCNT Event counter with limit supervision 30
TEILGAPC Running hour-meter 9
Metering
PCFCNT Pulse-counter logic 16
ETPMMTR Function for energy calculation and demand 6
handling
Table 3: Total number of instances for basic configurable logic blocks

Basic configurable logic block Total number of instances
AND 280
GATE 40
INV 420
LLD 40
OR 289
PULSETIMER 40
RSMEMORY 40
SRMEMORY 40
TIMERSET 60
XOR 40
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Technical manual
Available functions
Table 4: Total number of instances for configurable logic blocks Q/T

Configurable logic blocks Q/T Total number of instances
ANDQT 120
INDCOMBSPQT 20
INDEXTSPQT 20
INVALIDQT 22
INVERTERQT 120
ORQT 120
PULSETIMERQT 40
RSMEMORYQT 40
SRMEMORYQT 40
TIMERSETQT 40
XORQT 40
Table 5: Total number of instances for extended logic package

Extended configurable logic block Total number of instances
AND 180
GATE 49
INV 180
LLD 49
OR 180
PULSETIMER 59
SLGAPC 74
SRMEMORY 110
TIMERSET 49
VSGAPC 130
XOR 49
2.4 Communication GUID-5F144B53-B9A7-4173-80CF-CD4C84579CB5 v12

Differential
RED670
(Customized)
Station communication
LONSPA, SPA SPA communication protocol 1
ADE LON communication protocol 1
HORZCOMM Network variables via LON 1
PROTOCOL Operation selection between SPA and IEC 60870-5-103 1
for SLM
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Technical manual
Available functions

Differential
RED670
(Customized)
RS485PROT Operation selection for RS485 1
RS485GEN RS485 1
DNPGEN DNP3.0 communication general protocol 1
DNPGENTCP DNP3.0 communication general TCP protocol 1
CHSERRS485 DNP3.0 for EIA-485 communication protocol 1
CH1TCP, CH2TCP, DNP3.0 for TCP/IP communication protocol 1
CH3TCP, CH4TCP
CHSEROPT DNP3.0 for TCP/IP and EIA-485 communication 1
protocol
MST1TCP, DNP3.0 for serial communication protocol 1
MST2TCP,
MST3TCP,
MST4TCP
DNPFREC DNP3.0 fault records for TCP/IP and EIA-485 1
communication protocol
IEC 61850-8-1 Parameter setting function for IEC 61850 1
GOOSEINTLKRCV Horizontal communication via GOOSE for interlocking 59
GOOSEBINRCV GOOSE binary receive 16
GOOSEDPRCV GOOSE function block to receive a double point value 64
GOOSEINTRCV GOOSE function block to receive an integer value 32
GOOSEMVRCV GOOSE function block to receive a measurand value 60
GOOSESPRCV GOOSE function block to receive a single point value 64
GOOSEVCTRRCV Horizontal communication via GOOSE for VCTR
GOOSEVCTRCONF GOOSE VCTR configuration for send and receive
MULTICMDRCV, Multiple command and transmit 60/10
MULTICMDSND
FRONT, LANABI, Ethernet configuration of links 1
LANAB, LANCDI,
LANCD
GATEWAY Ethernet configuration of link one 1
OPTICAL103 IEC 60870-5-103 Optical serial communication 1
RS485103 IEC 60870-5-103 serial communication for RS485 1
AGSAL Generic security application component 1
LD0LLN0 IEC 61850 LD0 LLN0 1
SYSLLN0 IEC 61850 SYS LLN0 1
LPHD Physical device information 1
PCMACCS IED Configuration Protocol 1
SECALARM Component for mapping security events on protocols 1
such as DNP3 and IEC103
FSTACCS Field service tool access via SPA protocol over ethernet 1
FSTACCSNA communication
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Available functions

Differential
RED670
(Customized)
ACTIVLOG Activity logging parameters 1
ALTRK Service Tracking 1
SINGLELCCH Single ethernet port link status 1
PRPSTATUS Dual ethernet port link status 1
Process bus communication IEC 61850-9-2 1)

PRP IEC 62439-3 parallel redundancy protocol 0-1
Remote communication
Binary signal transfer receive/transmit 6/36
Transmission of analog data from LDCM 1
Receive binary status from remote LDCM 6/3/3
Scheme communication
ZCPSCH 85 Scheme communication logic for distance or 0-1
ZC1PPSCH 85 Phase segregated scheme communication logic for 0-1
distance protection
ZCRWPSCH 85 Current reversal and weak-end infeed logic for distance 0-1
protection
ZC1WPSCH 85 Current reversal and weak-end infeed logic for phase 0-1
segregated communication
ZCLCPSCH Local acceleration logic 0-1
ECPSCH 85 Scheme communication logic for residual overcurrent 0-1
protection
ECRWPSCH 85 Current reversal and weak-end infeed logic for residual 0-1
DTT Direct transfer trip 0-1
1) Only included for 9-2LE products
2.5 Basic IED functions GUID-C8F0E5D2-E305-4184-9627-F6B5864216CA v9
Table 6: Basic IED functions

IEC 61850 or function Description
name
INTERRSIG
SELFSUPEVLST Self supervision with internal event list
TIMESYNCHGEN Time synchronization module
BININPUT, SYNCHCAN, Time synchronization
SYNCHGPS,
SYNCHCMPPS,
SYNCHLON,
SYNCHPPH,
SYNCHPPS, SNTP,
SYNCHSPA
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Available functions
IEC 61850 or function Description

name
TIMEZONE Time synchronization
DSTBEGIN, GPS time synchronization module
DSTENABLE, DSTEND
IRIG-B Time synchronization
SETGRPS Number of setting groups
ACTVGRP Parameter setting groups
TESTMODE Test mode functionality
CHNGLCK Change lock function
SMBI Signal matrix for binary inputs
SMBO Signal matrix for binary outputs
SMMI Signal matrix for mA inputs
SMAI1 - SMAI12 Signal matrix for analog inputs
3PHSUM Summation block 3 phase
ATHSTAT Authority status
ATHCHCK Authority check
AUTHMAN Authority management
FTPACCS FTP access with password
SPACOMMMAP SPA communication mapping
SPATD Date and time via SPA protocol
DOSFRNT Denial of service, frame rate control for front port
DOSLANAB Denial of service, frame rate control for OEM port AB
DOSLANCD Denial of service, frame rate control for OEM port CD
DOSSCKT Denial of service, socket flow control
GBASVAL Global base values for settings
PRIMVAL Primary system values
ALTMS Time master supervision
ALTIM Time management
MSTSER DNP3.0 for serial communication protocol
PRODINF Product information
RUNTIME IED Runtime Comp
CAMCONFIG Central account management configuration
CAMSTATUS Central account management status
TOOLINF Tools Information component
SAFEFILECOPY Safe file copy function
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Available functions
Table 7: Local HMI functions

IEC 61850 or function ANSI Description
name
LHMICTRL Local HMI signals
LANGUAGE Local human machine language
SCREEN Local HMI Local human machine screen behavior
FNKEYTY1–FNKEYTY5 Parameter setting function for HMI in PCM600
FNKEYMD1–
FNKEYMD5
LEDGEN General LED indication part for LHMI
OPENCLOSE_LED LHMI LEDs for open and close keys
GRP1_LED1– Basic part for CP HW LED indication module
GRP1_LED15
GRP2_LED1–
GRP2_LED15
GRP3_LED1–
GRP3_LED15
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Analog inputs
Section 3 Analog inputs SEMOD55010-1 v3
3.1 Introduction SEMOD55003-5 v10
Analog input channels must be configured and set properly in order to get correct measurement
results and correct protection operations. For power measuring and all directional and differential
functions the directions of the input currents must be defined in order to reflect the way the
current transformers are installed/connected in the field ( primary and secondary connections ).
Measuring and protection algorithms in the IED use primary system quantities. Setting values are
in primary quantities as well and it is important to set the data about the connected current and
voltage transformers properly.
A reference PhaseAngleRef can be defined to facilitate service values reading. This analog channels
phase angle will always be fixed to zero degrees and all other angle information will be shown in
relation to this analog input. During testing and commissioning of the IED the reference channel
can be changed to facilitate testing and service values reading.
The availability of VT inputs depends on the ordered transformer input module

(TRM) type.
3.2 Function block SEMOD116577-1 v4
The hardware channels appear in the signal matrix tool (SMT) and in ACT when a
TRM is included in the configuration with the hardware configuration tool. In the
SMT or the ACT they can be mapped to the desired virtual input (SMAI) of the IED
and used internally in the configuration.
3.3 Signals
PID-3920-OUTPUTSIGNALS v4
Table 8: TRM_12I Output signals

Name Type Description
STATUS BOOLEAN Analog input module status
CH1(I) STRING Analogue current input 1
CH2(I) STRING Analog current input 2
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Analog inputs

Table 9: TRM_6I_6U Output signals

CH7(V) STRING Analog voltage input 7
CH 11(V) STRING Analog voltage input 11
Table 10: TRM_6I Output signals

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Analog inputs

3.4 Settings
SEMOD129840-4 v2
Dependent on ordered IED type.
PID-4153-SETTINGS v8
Table 14: AISVBAS Non group settings (basic)

Name Values (Range) Unit Step Default Description
PhaseAngleRef TRM40-Ch1 - Ch12 - - TRM40-Ch1 Reference channel
TRM41-Ch1 - Ch12 for phase angle
MU1-IA - I0 presentation
MU1-VA - V0
MU2-IA - I0
MU2-VA - V0
MU3-IA - I0
MU3-VA - V0
MU4-IA - I0
MU4-VA - V0
MU5-IA - I0
MU5-VA - V0
MU6-IA - I0
MU6-VA - V0
MU7-IA - I0
MU7-VA - V0
MU8-IA - I0
MU8-VA - V0
MU9-IA - I0
MU9-VA - V0
MU10-IA - I0
MU10-VA - V0
MU11-IA - I0
MU11-VA - V0
MU12-IA - I0
MU12-VA - V0
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Analog inputs
Table 15: TRM_12I Non group settings (basic)

CT_WyePoint1 FromObject - - ToObject ToObject= towards protected object,
ToObject FromObject= the opposite
CTsec1 1 - 10 A 1 1 Rated CT secondary current
CTprim1 1 - 99999 A 1 3000 Rated CT primary current
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Analog inputs

Table 16: TRM_6I_6U Non group settings (basic)

VTsec7 0.001 - 999.999 V 0.001 110.000 Rated VT secondary voltage
VTprim7 0.05 - 2000.00 kV 0.05 400.00 Rated VT primary voltage
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Analog inputs

Table 17: TRM_6I Non group settings (basic)

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3.5 Monitored data

PID-4153-MONITOREDDATA v4
Table 21: AISVBAS Monitored data

Name Type Values (Range) Unit Description
Status INTEGER 0=Ok - Service value status
1=Error
2=AngRefLow
3=Uncorrelated
Table 22: TRM_12I Monitored data

STATUS BOOLEAN 0=Ok - Analog input module status
1=Error
Table 23: TRM_6I_6U Monitored data

1=Error
Table 24: TRM_6I Monitored data

1=Error
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Analog inputs

1=Error

1=Error

1=Error
3.6 Operation principle SEMOD55028-5 v8
The direction of a current depends on the connection of the CT. The main CTs are typically star
(WYE) connected and can be connected with the Star (WYE) point towards the object or away from
the object. This information must be set in the IED.
The convention of the directionality is defined as follows:
• Positive value of current or power means that the quantity has the direction into the object.
• Negative value of current or power means that the quantity has the direction out from the
object.
For directional functions the directional conventions are defined as follows (see figure 5)
• Forward means the direction is into the object.

• Reverse means the direction is out from the object.
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Analog inputs
Definition of direction Definition of direction

for directional functions for directional functions
Reverse Forward Forward Reverse
Protected Object
Line, transformer, etc
e.g. P, Q, I e.g. P, Q, I
Measured quantity is Measured quantity is
positive when flowing positive when flowing
towards the object towards the object
Set parameter Set parameter

CTStarPoint CTStarPoint
Correct Setting is Correct Setting is
"ToObject" "FromObject"
en05000456-2.vsd
ANSI05000456 V2 EN-US
Figure 5: Internal convention of the directionality in the IED

If the settings of the primary CT is correct, that is CTStarPoint set as FromObject or ToObject
according to the plant condition, then a positive quantity always flows towards the protected
object, and a Forward direction always looks towards the protected object.
The settings of the IED is performed in primary values. The ratios of the main CTs and VTs are
therefore basic data for the IED. The user has to set the rated secondary and primary currents and
voltages of the CTs and VTs to provide the IED with their rated ratios.
The CT and VT ratio and the name on respective channel is done under Main menu/Hardware/
Analog modules in the Parameter Settings tool or on the HMI.
3.7 Technical data SEMOD55412-1 v1
M16988-1 v11
Table 28: TRM - Energizing quantities, rated values and limits for protection transformer
Description Value
Frequency
Rated frequency fr 50/60 Hz
Operating range fr ± 10%
Current inputs
Rated current Ir 1 or 5 A
Operating range (0-100) x Ir
Thermal withstand 100 × Ir for 1 s *)

30 × Ir for 10 s
10 × Ir for 1 min
4 × Ir continuously
Dynamic withstand 250 × Ir one half wave
Burden < 20 mVA at Ir = 1 A

< 150 mVA at Ir = 5 A
*) max. 350 A for 1 s when COMBITEST test switch is included.

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Analog inputs
Description Value
Voltage inputs **)
Rated voltage Ur 110 or 220 V
Operating range 0 - 340 V

Thermal withstand 450 V for 10 s
420 V continuously
Burden < 20 mVA at 110 V
< 80 mVA at 220 V
**) all values for individual voltage inputs
Note! All current and voltage data are specified as RMS values at rated frequency
Table 29: TRM - Energizing quantities, rated values and limits for measuring transformer
Description Value
Frequency
Current inputs
Rated current Ir 1A 5A
Operating range (0-1.8) × Ir (0-1.6) × Ir
Thermal withstand 80 × Ir for 1 s 65 × Ir for 1 s

25 × Ir for 10 s 20 × Ir for 10 s
10 × Ir for 1 min 8 × Ir for 1 min
1.8 × Ir for 30 min 1.6 × Ir for 30 min
1.1 × Ir continuously 1.1 × Ir continuously
Burden < 200 mVA at Ir < 350 mVA at Ir
Voltage inputs *)

420 V continuously
< 80 mVA at 220 V
*) all values for individual voltage inputs
SEMOD53376-2 v6
Table 30: CT and VT circuit connectors

Connector type Rated voltage and current Maximum conductor area
Screw compression type 250 V AC, 20 A 4 mm2 (AWG12)
2 x 2.5 mm2 (2 x AWG14)
Terminal blocks suitable for ring lug terminals 250 V AC, 20 A 4 mm2 (AWG12)
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Binary input and output modules
Section 4 Binary input and output modules
4.1 Binary input
4.1.1 Binary input debounce filter GUID-AE43976C-E966-484C-AF39-89B2B12F56DC v5
The debounce filter eliminates bounces and short disturbances on a binary input.
A time counter is used for filtering. The time counter is increased once in a millisecond when a
binary input is high, or decreased when a binary input is low. A new debounced binary input signal
is forwarded when the time counter reaches the set DebounceTime value and the debounced input
value is high or when the time counter reaches 0 and the debounced input value is low. The default
setting of DebounceTime is 1 ms.
The binary input ON-event gets the time stamp of the first rising edge, after which the counter
does not reach 0 again. The same happens when the signal goes down to 0 again.
4.1.2 Oscillation filter GUID-41B89E6F-50C3-44BF-9171-3CC82EB5CA15 v4
Binary input wiring can be very long in substations and there are electromagnetic fields from for
example nearby breakers. An oscillation filter is used to reduce the disturbance from the system
when a binary input starts oscillating.
An oscillation counter counts the debounced signal state changes during 1 s. If the counter value is
greater than the set value OscBlock, the input signal is blocked. The input signal is ignored until
the oscillation counter value during 1 s is below the set value OscRelease.
4.1.3 Settings
GUID-07348953-4A72-444B-A31A-030ABEA8E0C4 v1
OscBlock must always be set to a value greater than OscRelease. If this is not done,
oscillation detection will not function correctly, and the resulting behaviour will be
undefined.
4.1.3.1 Setting parameters for binary input modules

Table 31: BIM Non group settings (basic)

Operation Disabled - - Enabled Operation Disabled/Enabled
Enabled
DebounceTime 0.001 - 0.020 s 0.001 0.001 Debounce time for binary inputs
OscBlock 1 - 40 Hz 1 40 Oscillation block limit
OscRelease 1 - 30 Hz 1 30 Oscillation release limit
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Binary input and output modules
4.1.3.2 Setting parameters for binary input/output module

Table 32: IOMIN Non group settings (basic)

Operation Disabled - - Enabled Binary input/output module in operation
Enabled (On) or not (Off)
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Local Human-Machine-Interface LHMI
Section 5 Local Human-Machine-Interface LHMI
5.1 Local HMI screen behaviour
5.1.1 Identification
GUID-84392EFF-4D3F-4A67-A6ED-34C6E98574D6 v1
Function description IEC 61850 IEC 60617 ANSI/IEEE C37.2

identification identification device number
Local HMI screen behaviour SCREEN - -
5.1.2 Settings
Table 33: SCREEN Non group settings (basic)

DisplayTimeout 1 - 120 Min 1 10 Local HMI display timeout
ContrastLevel -100 - 100 % 10 0 Contrast level for display
DefaultScreen - 0 Default screen
EvListSrtOrder Latest on top - - Latest on top Sort order of event list
Oldest on top
AutoIndicationDRP Disabled - - Disabled Automatic indication of disturbance report
Enabled
SubstIndSLD No - - No Substitute indication on single line
Yes diagram
InterlockIndSLD No - - No Interlock indication on single line diagram
Yes
BypassCommands No - - No Enable bypass of commands
Yes
5.2 Local HMI signals
GUID-03AB7AEE-87D3-4F3C-B6B9-B1EB1B538E38 v1

Local HMI signals LHMICTRL - -
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Technical manual
5.2.2 Function block GUID-A8AC51E9-5BD7-4A80-9576-4816F14DD08D v2
LHMICTRL
CLRLEDS HMI-ON
RED-S
YELLOW-S
YELLOW-F
CLRPULSE
LEDSCLRD
Figure 6: LHMICTRL function block
5.2.3 Signals
PID-3992-INPUTSIGNALS v5
Table 34: LHMICTRL Input signals

Name Type Default Description
RSTLEDS BOOLEAN 0 Input to reset the LCD-HMI LEDs
Table 35: LHMICTRL Output signals

HMI-ON BOOLEAN Backlight of the LCD display is active
RED-S BOOLEAN Red LED on the LCD-HMI is steady
YELLOW-S BOOLEAN Yellow LED on the LCD-HMI is steady
YELLOW-F BOOLEAN Yellow LED on the LCD-HMI is flashing
RSTPULSE BOOLEAN A reset pulse is provided when the LEDs on the LCD-HMI are
cleared
LEDSRST BOOLEAN Active when the LEDs on the LCD-HMI are not ON
5.3 Basic part for LED indication module
GUID-6E36C0BC-F284-4C88-A4A8-9535D3BE8B14 v2

Basic part for LED indication module LEDGEN - -
Basic part for LED indication HW GRP1_LED1 - - -
module GRP1_LED15
GRP2_LED1 -
GRP2_LED15
GRP3_LED1 -
GRP3_LED15
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5.3.2 Function block GUID-BDB5797F-F27E-4FEE-9FDB-1C9E2F572BB6 v3
LEDGEN
BLOCK NEWIND
RESET ACK
Figure 7: LEDGEN function block
GRP1_LED1
^HM1L01R
^HM1L01Y
^HM1L01G
Figure 8: GRP1_LED1 function block

The GRP1_LED1 function block is an example. The 15 LEDs in each of the three groups have a
similar function block.
5.3.3 Signals
Table 36: LEDGEN Input signals

BLOCK BOOLEAN 0 Input to block the operation of the LEDs
RESET BOOLEAN 0 Input to acknowledge/reset the indication LEDs
Table 37: LEDGEN Output signals

NEWIND BOOLEAN New indication signal if any LED indication input is set
ACK BOOLEAN A pulse is provided when the LEDs are acknowledged
Table 38: GRP1_LED1 Input signals

HM1L01R BOOLEAN 0 Red indication of LED1, local HMI alarm group 1
HM1L01Y BOOLEAN 0 Yellow indication of LED1, local HMI alarm group 1
HM1L01G BOOLEAN 0 Green indication of LED1, local HMI alarm group 1
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Technical manual
5.3.4 Settings
Table 39: LEDGEN Non group settings (basic)

Enabled
tRestart 0.0 - 100.0 s 0.1 0.0 Defines the disturbance length
t_MaxTripDelay 0.1 - 100.0 s 0.1 1.0 Maximum time for the definition of a
disturbance
Table 40: GRP1_LED1 Non group settings (basic)

SequenceType Follow-S - - Follow-S Sequence type for LED 1, local HMI alarm
Follow-F group 1
LatchedAck-F-S
LatchedAck-S-F
LatchedColl-S
LatchedReset-S
LabelOff 0 - 18 - 1 G1L01_OFF Label string shown when LED 1, alarm
group 1 is off
LabelRed 0 - 18 - 1 G1L01_RED Label string shown when LED 1, alarm
group 1 is red
LabelYellow 0 - 18 - 1 G1L01_YELLOW Label string shown when LED 1, alarm
group 1 is yellow
LabelGreen 0 - 18 - 1 G1L01_GREEN Label string shown when LED 1, alarm
group 1 is green
5.4 LCD part for HMI function keys control module GUID-EECAE7FA-7078-472C-A429-F7607DB884EB v2
GUID-E6611022-5EA3-420D-ADCD-9D1E7604EFEB v1

LCD part for HMI Function Keys FNKEYMD1 - - -
Control module FNKEYMD5
5.4.2 Function block

GUID-A803A728-5CFC-4606-98E4-793E873B99D4 v3
FNKEYMD1
^LEDCTL1 ^FKEYOUT1
Figure 9: FNKEYMD1 function block
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Technical manual
Only the function block for the first button is shown above. There is a similar block for every
function key button.
5.4.3 Signals
Table 41: FNKEYMD1 Input signals

LEDCTL1 BOOLEAN 0 LED control input for function key
Table 42: FNKEYMD1 Output signals

FKEYOUT1 BOOLEAN Output controlled by function key
5.4.4 Settings
Table 43: FNKEYMD1 Non group settings (basic)

Mode Disabled - - Disabled Output operation mode
Toggle
Pulsed
PulseTime 0.001 - 60.000 s 0.001 0.200 Pulse time for output controlled by LCDFn1
LabelOn 0 - 18 - 1 LCD_FN1_ON Label for LED on state
LabelOff 0 - 18 - 1 LCD_FN1_OFF Label for LED off state
Table 44: FNKEYTY1 Non group settings (basic)

Type Disabled - - Disabled Function key type
Menu shortcut
Control
MenuShortcut - 0 Menu shortcut for function key
GUID-BCE87D54-C836-40EE-8DA7-779B767059AB v1
MenuShortcut values are product dependent and created dynamically depending on the product
main menu.
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Technical manual
5.5 Operation principle
5.5.1 Local HMI AMU0600442 v14
ANSI13000239-2-en.vsd
Figure 10: Local human-machine interface

The LHMI of the IED contains the following elements:
• Keypad
• Display (LCD)
• LED indicators
• Communication port for PCM600
The LHMI is used for setting, monitoring and controlling.
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5.5.1.1 Keypad AMU0600428 v17
The LHMI keypad contains push-buttons which are used to navigate in different views or menus.
The push-buttons are also used to acknowledge alarms, reset indications, provide help and switch
between local and remote control mode.
The keypad also contains programmable push-buttons that can be configured either as menu
shortcut or control buttons.
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Technical manual
24
1
23
2
18
3
19
6 20
21
7 22
8 9 10 11 12 13 14 15 16 17
ANSI15000157-1-en.vsdx
Figure 11: LHMI keypad with object control, navigation and command push-buttons and
RJ-45 communication port
1...5 Function button

6 Close
7 Open
8 Escape
9 Left
10 Down
11 Up
12 Right
13 Key
14 Enter
15 Remote/Local
16 Uplink LED
17 Not in use
18 Multipage
19 Menu
20 Clear
21 Help
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Technical manual
22 Communication port
23 Programmable indication LEDs
24 IED status LEDs
5.5.1.2 Display GUID-55739D4F-1DA5-4112-B5C7-217AAF360EA5 v10
The LHMI includes a graphical monochrome liquid crystal display (LCD) with a resolution of 320 x
240 pixels. The character size can vary.
The display view is divided into four basic areas.
IEC15000270-1-en.vsdx
Figure 12: Display layout
1 Path
2 Content
3 Status
4 Scroll bar (appears when needed)
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Technical manual
• The path shows the current location in the menu structure. If the path is too long to be shown,
it is truncated from the beginning, and the truncation is indicated with three dots.
• The content area shows the menu content.
• The status area shows the current IED time, the user that is currently logged in and the object
identification string which is settable via the LHMI or with PCM600.
• If text, pictures or other items do not fit in the display, a vertical scroll bar appears on the
right. The text in content area is truncated from the beginning if it does not fit in the display
horizontally. Truncation is indicated with three dots.
Figure 13: Truncated path

The number after : (colon sign) at the end of the function instance, for example, 1 in SMAI1:1,
indicates the number of that function instance.
The function key button panel shows on request what actions are possible with the function
buttons. Each function button has a LED indication that can be used as a feedback signal for the
function button control action. The LED is connected to the required signal with PCM600.
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GUID-C98D972D-D1D8-4734-B419-161DBC0DC97B V1 EN-US
Figure 14: Function button panel

The indication LED panel shows on request the alarm text labels for the indication LEDs. Three
indication LED pages are available.
GUID-5157100F-E8C0-4FAB-B979-FD4A971475E3 V1 EN-US
Figure 15: Indication LED panel

The function button and indication LED panels are not visible at the same time. Each panel is
shown by pressing one of the function buttons or the Multipage button. Pressing the ESC button
clears the panel from the display. Both panels have a dynamic width that depends on the label
string length.
5.5.1.3 LEDs AMU0600427 v12
The LHMI includes three protection status LEDs above the display: Normal, Pickup and Trip.
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Technical manual
There are 15 programmable indication LEDs on the front of the LHMI. Each LED can indicate three
states with the colors: green, yellow and red. The texts related to each three-color LED are divided
into three panels.
There are 3 separate panels of LEDs available. The 15 physical three-color LEDs in one LED group
can indicate 45 different signals. Altogether, 135 signals can be indicated since there are three LED
groups. The LEDs are lit according to priority, with red being the highest and green the lowest
priority. For example, if on one panel there is an indication that requires the green LED to be lit,
and on another panel there is an indication that requires the red LED to be lit, the red LED takes
priority and is lit. The LEDs can be configured with PCM600 and the operation mode can be
selected with the LHMI or PCM600.
Information panels for the indication LEDs are shown by pressing the Multipage button. Pressing
that button cycles through the three pages. A lit or un-acknowledged LED is indicated with a
highlight. Such lines can be selected by using the Up/Down arrow buttons. Pressing the Enter key
shows details about the selected LED. Pressing the ESC button exits from information pop-ups as
well as from the LED panel as such.
The Multipage button has a LED. This LED is lit whenever any LED on any panel is lit. If there are un-
acknowledged indication LEDs, then the Multipage LED blinks. To acknowledge LEDs, press the
Clear button to enter the Reset menu (refer to description of this menu for details).
There are two additional LEDs which are next to the control buttons and . They can, for
example, represent the status of a circuit breaker. The LEDs are controlled by the function block
OPENCLOSE_LED which must be configured to show the status of the breaker.
5.5.2 LED configuration alternatives
5.5.2.1 Functionality GUID-1A03E0EF-C10F-4797-9D9F-5CCA86CA29EB v5
The function blocks LEDGEN and GRP1_LEDx, GRP2_LEDx and GRP3_LEDx (x=1-15) controls and
supplies information about the status of the indication LEDs. The input and output signals of the
function blocks are configured with PCM600. The input signal for each LED is selected individually
using SMT or ACT. Each LED is controlled by the GRPn_LEDx (n=1-3) function block that controls
the color and the operating mode.
Each indication LED on local HMI can be set individually to operate in 6 different sequences; two as
follow type and four as latch type. Two of the latching sequence types are intended to be used as a
protection indication system, either in collecting or restarting mode, with reset functionality. The
other two are intended to be used as signalling system in collecting mode with acknowledgment
functionality.
5.5.2.2 Status LEDs GUID-4822DF9C-E343-442B-B3F1-3FA8CD8DF234 v4
There are three status LEDs above the LCD in front of the IED: green, yellow and red.
The green LED has a fixed function that presents the healthy status of the IED. The yellow and red
LEDs are user configured. The yellow LED can be used to indicate that a disturbance report is
triggered (steady) or that the IED is in test mode (flashing). The red LED can be used to indicate a
trip command.
Here is a typical configuration of the status LEDs:
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• Green LED: unlit > no power; blinking > startup or abnormal situation (IED is not in service);
steady > IED is in service
• Yellow LED: unlit > no attention required; blinking > IED is in Testmode (IED is not in normal
service); steady > at least one of the signals configured to turn the yellow LED on has been
active
• Red LED: unlit > no attention required; blinking > user performs a common write from
PCM600; steady > at least one of the signals configured to turn the red LED on has been
active
The yellow and red status LEDs are configured in the disturbance recorder function, DRPRDRE, by
connecting a pickup or trip signal from the actual function to a BxRBDR binary input function block
using the PCM600, and configuring the setting to Off,Pickup or Trip for that particular signal.
5.5.2.3 Indication LEDs
Operating modes GUID-B67F1ED3-900B-4D34-8EEB-A3005999CE50 v4
Collecting mode
• LEDs that are used in the collecting mode of operation are accumulated continuously until the
unit is acknowledged manually. This mode is suitable when the LEDs are used as a simplified
alarm system. When all three inputs (red, yellow and green) are connected to different sources
of events for the same function block, collecting mode shows the highest priority LED color
that was activated since the latest acknowledgment was made. If a number of different
indications were made since the latest acknowledgment, it is not possible to get a clear view
of what triggered the latest event without looking at the sequence of events list. A condition
for getting the sequence of events is that the signals have been engineered in the disturbance
recorder.
Re-starting mode
• In the re-starting mode of operation each new pickup resets all previous active LEDs and
activates only those which appear during one disturbance. Only LEDs defined for re-starting
mode with the latched sequence type 6 (LatchedReset-S) will initiate a reset and a restart at a
new disturbance. A disturbance is defined to end a settable time after the reset of the
activated input signals or when the maximum time limit has elapsed. In sequence 6, the
restarting or reset mode means that upon occurrence of any new event, all previous
indications will be reset. This facilitates that only the LED indications related to the latest
event is shown.
Acknowledgment/reset GUID-E6727E8F-C28B-4295-AE21-BC5643363805 v3
• From local HMI

• The active LED indications can be acknowledged/reset manually. Manual
acknowledgment and manual reset have the same meaning and is a common signal for
all the operating sequences and LEDs. The function is positive edge triggered, not level
triggered. The acknowledgment/reset is performed via the button and menus on
the LHMI.
• From function input

• The active LED indications can also be acknowledged/reset via an input, CLRLEDS, to the
function block LHMICTRL. This input can for example be configured to a binary input
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Technical manual
operated from an external push button or a function button. The function is positive
edge triggered, not level triggered. This means that even if the button is continuously
pressed, the acknowledgment/reset only affects indications active at the moment when
the button is first pressed.
• Automatic reset
• The automatic reset can only be performed for LED indications defined for re-starting
mode with the latched sequence type 6 (LatchedReset-S). When the automatic reset of
the LEDs has been performed, still persisting indications will be indicated with a steady
light.
Operating sequence GUID-DFCA880B-308C-4334-94DF-97C7765E8C13 v5

The sequences can be of type Follow or Latched. For the Follow type, the LED follows the input
signal completely. For the Latched type, each LED latches to the corresponding input signal until it
is reset.
The figures below show the function of available sequences selectable for each LED separately.
The following 6 sequences are available:
• Sequence 1: Follow-S
• Sequence 2: Follow-F
• Sequence 3: LatchedAck-F-S
• Sequence 4: LatchedAck-S-F
• Sequence 5: LatchedColl-S
• Sequence 6: LatchedReset-S
For sequence 1 and 2, which are of the Follow type, the acknowledgment (Ack ) /reset function is
not applicable because the indication shown by the LED follows its input signal. Sequence 3 and 4,
which are of the Latched type with acknowledgement, are only working in collecting (Coll) mode.
Sequence 5 is working according to Latched type and collecting mode while Sequence 6 is working
according to Latched type and re-starting (Reset) mode. The letters S and F in the sequence
names have the meaning S = Steady and F = Flash.
At the activation of the input signal to any LED, the indication on the corresponding LED obtains a
color that corresponds to the activated input, and operates according to the selected sequence
diagrams shown below.
In the sequence diagrams the different statuses of the LEDs are shown using the following
symbols:
= No indication = Steady light = Flash
G= Green Y= Yellow R= Red

IEC09000311.vsd
Figure 16: Symbols used in the sequence diagrams
Sequence 1 (Follow-S) SEMOD56072-39 v4

This sequence follows the corresponding input signals all the time with a steady light. It does not
react on acknowledgment or reset. Every LED is independent of the other LEDs in its operation.
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Activating
signal
LED
IEC01000228_2_en.vsd
Figure 17: Operating Sequence 1 (Follow-S)

GUID-107FE952-3B4C-4C01-831A-3147E652327C v3
If inputs for two or more colors are active at the same time to the same LED, the priority color it
shows is in accordance with the color described above. An example of the operation when two
colors are activated in parallel to the same LED is shown in Figure 18.
Activating
signal GREEN
Activating
signal RED
LED G G R G
Figure 18: Operating sequence 1, two colors
Sequence 2 (Follow-F) SEMOD56072-47 v2

This sequence is the same as Sequence 1, Follow-S, but the LEDs are flashing instead of showing
steady light.
Sequence 3 LatchedAck-F-S SEMOD56072-50 v2

This sequence has a latched function and works in collecting mode. Every LED is independent of
the other LEDs in its operation. At the activation of the input signal, the indication starts flashing.
After acknowledgment the indication disappears if the signal is not present any more. If the signal
is still present after acknowledgment it gets a steady light.
Activating
signal
LED
Acknow.
en01000231.vsd
Figure 19: Operating Sequence 3 LatchedAck-F-S

GUID-CC607709-5344-4C88-AA97-6395FD335E55 v4
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The sequence described below is valid only if the same function block is used for all
three colour LEDs.
When an acknowledgment is performed, all indications that appear before the indication with
higher priority has been reset, will be acknowledged, independent of if the low priority indication
appeared before or after acknowledgment. In Figure 20 it is shown the sequence when a signal of
lower priority becomes activated after acknowledgment has been performed on a higher priority
signal. The low priority signal will be shown as acknowledged when the high priority signal resets.
Activating
signal GREEN
Activating
signal RED
R R G
LED
Acknow
Figure 20: Operating Sequence 3 (LatchedAck-F-S), 2 colors involved

GUID-A652A49D-F016-472D-8D38-6D3E75DAB1DB v2
If all three signals are activated the order of priority is still maintained. Acknowledgment of
indications with higher priority will acknowledge also low priority indications, which are not visible
according to Figure 21.
Activating
signal GREEN
Activating
signal YELLOW
Activating
signal RED
LED G Y R R Y
Acknow.
Figure 21: Operating sequence 3, three colors involved, alternative 1

GUID-071B9EB5-A1D2-49C5-9458-4D21B7E068BE v2
If an indication with higher priority appears after acknowledgment of a lower priority indication
the high priority indication will be shown as not acknowledged according to Figure 22.
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Activating
signal GREEN
Activating
signal YELLOW
Activating
signal RED
LED G G R R Y
Acknow.
Figure 22: Operating sequence 3, three colors involved, alternative 2
Sequence 4 (LatchedAck-S-F) SEMOD56072-64 v1

This sequence has the same functionality as sequence 3, but steady and flashing light have been
alternated.
Sequence 5 LatchedColl-S SEMOD56072-67 v4

This sequence has a latched function and works in collecting mode. At the activation of the input
signal, the indication will light up with a steady light. The difference to sequence 3 and 4 is that
indications that are still activated will not be affected by the reset that is, immediately after the
positive edge of the reset has been executed a new reading and storing of active signals is
performed. Every LED is independent of the other LEDs in its operation.
Activating
signal
LED
Reset
Figure 23: Operating Sequence 5 LatchedColl-S

GUID-4D52D221-F54F-4966-95B1-6ED6C536CEC9 v2
That means if an indication with higher priority has reset while an indication with lower priority
still is active at the time of reset, the LED will change color according to Figure 24.
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Activating
signal GREEN
Activating
signal RED
R G
LED
Reset
Figure 24: Operating sequence 5, two colors
Sequence 6 LatchedReset-S SEMOD56072-75 v4

In this mode all activated LEDs, which are set to Sequence 6 (LatchedReset-S), are automatically
reset at a new disturbance when activating any input signal for other LEDs set to Sequence 6
LatchedReset-S. Also in this case indications that are still activated will not be affected by manual
reset, that is, immediately after the positive edge of that the manual reset has been executed a
new reading and storing of active signals is performed. LEDs set for sequence 6 are completely
independent in its operation of LEDs set for other sequences.
Timing diagram for sequence 6 SEMOD56072-86 v3

Figure 25 shows the timing diagram for two indications within one disturbance.
Disturbance
tRestart
Activating
signal 1
Activating
signal 2
LED 1
LED 2
Automatic
reset
Manual
reset
IEC01000239_2-en.vsd
Figure 25: Operating sequence 6 (LatchedReset-S), two indications within same disturbance
Figure 26 shows the timing diagram for a new indication after tRestart time has elapsed.
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Technical manual
Disturbance Disturbance
tRestart tRestart
Activating
signal 1
Activating
signal 2
LED 1
LED 2
Automatic
reset
Manual
reset
Figure 26: Operating sequence 6 (LatchedReset-S), two different disturbances

Figure 27 shows the timing diagram when a new indication appears after the first one has reset
but before tRestart has elapsed.
Disturbance
tRestart
Activating
signal 1
Activating
signal 2
LED 1
LED 2
Automatic
reset
Manual
reset
Figure 27: Operating sequence 6 (LatchedReset-S), two indications within same disturbance
but with reset of activating signal between
Figure 28 shows the timing diagram for manual reset.
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Technical manual
Disturbance
tRestart
Activating
signal 1
Activating
signal 2
LED 1
LED 2
Automatic
reset
Manual
reset
Figure 28: Operating sequence 6 (LatchedReset-S), manual reset
5.5.3 Function keys
5.5.3.1 Functionality GUID-BED38E9A-C90D-4B7F-AA20-42821C4F6A1C v3
Local Human-Machine-Interface (LHMI) has five function buttons, directly to the left of the LCD,
that can be configured either as menu shortcut or control buttons. Each button has an indication
LED that can be configured in the application configuration.
When used as a menu shortcut, a function button provides a fast way to navigate between default
nodes in the menu tree. When used as a control, the button can control a binary signal.
5.5.3.2 Operation principle GUID-977C3829-B19B-457E-8A4D-45317226EF22 v3
Each output on the FNKEYMD1 - FNKEYMD5 function blocks can be controlled from the LHMI
function keys. By pressing a function button on the LHMI, the output status of the actual function
block will change. These binary outputs can in turn be used to control other function blocks, for
example, switch control blocks, binary I/O outputs etc.
FNKEYMD1 - FNKEYMD5 function block also has a number of settings and parameters that control
the behavior of the function block. These settings and parameters are normally set using the PST.
Operating sequence GUID-84CA7C61-4F83-4F86-A07F-BF9EC4E309BF v5

The operation mode is set individually for each output, either OFF, TOGGLE or PULSED.
Setting OFF
This mode always sets the outputs to a low value (0).
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Technical manual
Input value
Output value
Figure 29: Sequence diagram for setting OFF

Setting TOGGLE
In this mode the output toggles each time the function key has been pressed for more than
500ms. Note that the input attribute is reset each time the function block executes. The function
block execution is marked with a dotted line below.
Input value
500ms 500ms 500ms
Output value
Figure 30: Sequence diagram for setting TOGGLE

Setting PULSED
In this mode the output sets high (1) when the function key has been pressed for more than
500ms and remains high according to set pulse time. After this time the output will go back to 0.
The input attribute is reset when the function block detects it being high and there is no output
pulse.
Note that the third positive edge on the input attribute does not cause a pulse, since the edge was
applied during pulse output. A new pulse can only begin when the output is zero; else the trigger
edge is lost.
Input value
500ms 500ms 500ms 500ms
pulse time pulse time pulse time

Output value
Figure 31: Sequence diagram for setting PULSED
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Input function GUID-8EA4AE21-7A74-403A-84AE-D5CEF9292A63 v2

All function keys work the same way: When the LHMI is configured so that a certain function
button is of type CONTROL, then the corresponding input on this function block becomes active,
and will light the yellow function button LED when high. This functionality is active even if the
function block operation setting is set to off. It has been implemented this way for safety reasons;
the idea is that the function key LEDs should always reflect the actual status of any primary
equipment monitored by these LEDs.
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Technical manual
Section 6 Differential protection
6.1 High impedance differential protection, single phase

HZPDIF (87) IP14239-1 v4
6.1.1 Identification M14813-1 v4
IEC 61850 IEC 60617 ANSI/IEEE C37.2

Function description
High impedance differential

HZPDIF Id 87
protection, single phase
SYMBOL-CC V2 EN-US
6.1.2 Functionality M13071-3 v13
High impedance differential protection, single phase (HZPDIF) (87) functions can be used when
the involved CTs have the same turns ratio and similar magnetizing characteristics. It utilizes an
external CT secondary current summation by wiring. Actually all CT secondary circuits which are
involved in the differential scheme are connected in parallel. External series resistor, and a voltage
dependent resistor which are both mounted externally to the IED, are also required.
The external resistor unit shall be ordered under IED accessories in the Product Guide.
HZPDIF (87) can be used to protect tee-feeders or busbars, reactors, motors, auto-transformers,
capacitor banks and so on. One such function block is used for a high-impedance restricted earth
fault protection. Three such function blocks are used to form three-phase, phase-segregated
differential protection.
6.1.3 Function block M13737-3 v3
HZPDIF (87)
ISI* TRIP
BLOCK ALARM
BLKTR MEASVOLT
Figure 32: HZPDIF (87) function block
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Technical manual
6.1.4 Signals IP14244-1 v2
Table 45: HZPDIF (87) Input signals

ISI GROUP - Single phase current input
SIGNAL
BLOCK BOOLEAN 0 Block of function
BLKTR BOOLEAN 0 Block of trip
Table 46: HZPDIF (87) Output signals

TRIP BOOLEAN Trip signal
ALARM BOOLEAN Alarm signal
MEASVOLT REAL Measured RMS voltage on CT secondary side
6.1.5 Settings IP14245-1 v2
Table 47: HZPDIF (87) Group settings (basic)

Operation Disabled - - Disabled Operation Disabled/Enabled
Enabled
AlarmPickup 5 - 500 V 1 10 Alarm voltage level on CT secondary
tAlarm 0.000 - 60.000 s 0.001 5.000 Time delay to activate alarm
TripPickup 10 - 900 V 1 100 Pickup voltage level in volts on CT
secondary side
R series 50 - 20000 Ohm 1 250 Value of series resistor in Ohms
6.1.6 Monitored data

Table 48: HZPDIF (87) Monitored data

MEASVOLT REAL - kV Measured RMS voltage on CT secondary
side
6.1.7 Operation principle IP14242-1 v2
M13075-3 v11
High impedance protection system is a simple technique which requires that all CTs, used in the
protection scheme, have relatively high knee point voltage, similar magnetizing characteristic and
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Technical manual
the same ratio. These CTs are installed in all ends of the protected object. In order to make a
scheme all CT secondary circuits belonging to one phase are connected in parallel. From the CT
junction points a measuring branch is connected. The measuring branch is a series connection of
one variable setting resistor (or series resistor) RS with high ohmic value and an over-current
element. Thus, the high impedance differential protection responds to the current flowing
through the measuring branch. However, this current is result of a differential voltage caused by
this parallel CT connection across the measuring branch. Non-linear resistor (that is, metrosil) is
used in order to protect entire scheme from high peak voltages which may appear during internal
faults. Typical high impedance differential scheme is shown in Figure 33. Note that only one phase
is shown in this figure.
RS
3 V
I
1
I> (50) 5
GUID-C7509DA3-F6AA-4BA0-9D08-EAA376663AFA V1 EN-US
Figure 33: HZPDIF scheme

Where in the Figure:
1. shows one main CT secondary winding connected in parallel with all other CTs, from the same
phase, connected to this scheme.
2. shows the scheme earthing point.
It is of utmost importance to insure that only one earthing point exists in such
protection scheme.
3. shows the setting (stabilizing) resistor RS.

4. shows the over-current measuring element.
The series connection of stabilizing resistor and over-current element is

designated as measuring branch.
5. shows the non-linear resistor (that is, metrosil).

6. V is the voltage across the CT paralleling point (for example, across the measuring branch).
7. I is the current flowing through the measuring branch.
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Technical manual
V and I are interrelated in accordance with the following formula V=RS × I.
Due to the parallel CT connections the high impedance differential relay can only measure one
current and that is the relay operating quantity. That means that there is no any stabilizing
quantity (that is, bias) in high-impedance differential protection schemes. Therefore in order to
guaranty the stability of the differential relay during external faults the operating quantity must
not exceed the set pickup value. Thus, for external faults, even with severe saturation of some of
the current transformers, the voltage across the measuring branch shall not rise above the relay
set pickup value. To achieve that a suitable value for setting resistor RS is selected in such a way
that the saturated CT secondary winding provides a much lower impedance path for the false
differential current than the measuring branch. In case of an external fault causing current
transformer saturation, the non-saturated current transformers drive most of the spill differential
current through the secondary winding of the saturated current transformer and not through the
measuring brunch of the relay. The voltage drop across the saturated current transformer
secondary winding appears also across the measuring brunch, however it will typically be relatively
small. Therefore, the pick-up value of the relay has to be set above this false operating voltage.
See the application manual for operating voltage and sensitivity calculation.
6.1.7.1 Logic diagram M13075-9 v5
The logic diagram shows the operation principles for the 1Ph High impedance differential
protection function HZPDIF (87), see Figure 34.
The function utilizes the raw samples from the single phase current input connected to it. Thus the
twenty samples per fundamental power system cycle are available to the HZPDIF function. These
current samples are first multiplied with the set value for the used stabilizing resistor in order to
get voltage waveform across the measuring branch. The voltage waveform is then filtered in order
to get its RMS value. Note that used filtering is designed in such a way that it ensures complete
removal of the DC current component which may be present in the primary fault current. The
voltage RMS value is then compared with set Alarm and Trip thresholds. Note that the TRIP signal
is intentionally delayed on drop off for 30 ms within the function. The measured RMS voltage is
available as a service value from the function. The function has block and trip block inputs
available as well.
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Technical manual
AlarmPickup
0-tAlarm
0
AlarmPickup
0.03s
0
en05000301_ansi.vsd
Figure 34: Logic diagram for 1Ph High impedance differential protection HZPDIF (87)
6.1.8 Technical data IP14246-1 v1
M13081-1 v12
Table 49: HZPDIF (87)technical data

Function Range or value Accuracy
Trip voltage (10-900) V ±1.0% of In at I < In
I=V/R ±1.0% of I at I > In
Reset ratio >95% at (30-900) V -

Maximum continuous power V>Pickup2/SeriesResistor ≤200 W -
Trip time at 0 to 10 x Vd Min. = 5 ms

Max. = 15 ms
Reset time at 10 x Vd to 0 Min. = 75 ms
Max. = 95 ms
Critical impulse time 2 ms typically at 0 to 10 x Vd -
Trip time at 0 to 2 x Vd Min. = 25 ms

Max. = 35 ms
Reset time at 2 x Vd to 0 Min. = 50 ms
Max. = 70 ms
Critical impulse time 15 ms typically at 0 to 2 x Vd -
6.2 Low impedance restricted earth fault protection REFPDIF

(87N) IP14640-1 v6
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M14843-1 v5

Restricted earth-fault protection, REFPDIF 87N
low impedance
IdN/I
SYMBOL-AA V1 EN-US
6.2.2 Functionality IP12418-1 v2
M13047-3 v18
Restricted fault protection, low-impedance function REFPDIF (87N) can be used on all solidly or
low-impedance grounded windings. The REFPDIF (87N) function provides high sensitivity and high
speed tripping as it protects each winding separately and thus does not need inrush stabilization.
The REFPDIF function is a percentage biased function with an additional zero sequence current
directional comparison criterion. This gives excellent sensitivity and stability during through
faults.
REFPDIF can also protect autotransformers. Five currents are measured at the most complicated
configuration as shown in Figure 35.
152 252
352 452
xx05000058_ansi.vsd
Figure 35: Examples of applications of the REFPDIF (87N)
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Technical manual
REFPDIF (87N)
I3P* TRIP
I3PW1CT1* PICKUP
I3PW1CT2* DIR_INT
I3PW2CT1* BLK2H
I3PW2CT2* IRES
BLOCK IN
IBIAS
IDIFF
ANGLE
2NDHARM
Figure 36: REFPDIF (87N) function block
6.2.4 Signals IP12658-1 v2
Table 50: REFPDIF (87N) Input signals

I3P GROUP - Group signal for ground current input
SIGNAL
I3PW1CT1 GROUP - Group signal for primary CT1 current input
SIGNAL
I3PW1CT2 GROUP - Group signal for primary CT2 current input
SIGNAL
I3PW2CT1 GROUP - Group signal for secondary CT1 current input
SIGNAL
I3PW2CT2 GROUP - Group signal for secondary CT2 current input
SIGNAL
Table 51: REFPDIF (87N) Output signals

TRIP BOOLEAN Trip by restricted earth fault protection function
PICKUP BOOLEAN Pickup by restricted earth fault protection function
DIR_INT BOOLEAN Directional Criteria satisfied for internal fault
BLK2H BOOLEAN Block due to 2-nd harmonic
IRES REAL Magnitude of fundamental frequency residual current
IN REAL Magnitude of fundamental frequency ground current
IBIAS REAL Magnitude of the bias current
IDIFF REAL Magnitude of fundamental frequency differential current
ANGLE REAL Direction angle from zero sequence feature
2NDHARM REAL Second harmonic ratio
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Technical manual
Table 52: REFPDIF (87N) Group settings (basic)

Enabled
IdMin 4.0 - 100.0 %IB 0.1 10.0 Maximum sensitivity in % of IBase
CTFactorPri1 1.0 - 10.0 - 0.1 1.0 CT factor for HV side CT1 (CT1rated/
HVrated current)
CTFactorPri2 1.0 - 10.0 - 0.1 1.0 CT factor for HV side CT2 (CT2rated/
HVrated current)
CTFactorSec1 1.0 - 10.0 - 0.1 1.0 CT factor for MV side CT1 (CT1rated/
MVrated current)
CTFactorSec2 1.0 - 10.0 - 0.1 1.0 CT factor for MV side CT2 (CT2rated/
MVrated current)
Table 53: REFPDIF (87N) Group settings (advanced)

ROA 60 - 90 Deg 1 60 Relay operate angle for zero sequence
directional feature
Table 54: REFPDIF (87N) Non group settings (basic)

GlobalBaseSel 1 - 12 - 1 1 Selection of one of the Global Base Value
groups

Table 55: REFPDIF (87N) Monitored data

IRES REAL - A Magnitude of fundamental frequency
residual current
IN REAL - A Magnitude of fundamental frequency
ground current
IBIAS REAL - A Magnitude of the bias current
IDIFF REAL - A Magnitude of fundamental frequency
differential current
ANGLE REAL - deg Direction angle from zero sequence
feature
2NDHARM REAL - - Second harmonic ratio
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Technical manual
6.2.7.1 Fundamental principles of the restricted ground fault protection M5447-3 v13
Restricted fault protection, low impedance function (REFPDIF, 87N) detects ground faults on
grounded power transformer windings, most often an grounded wye winding. REFPDIF (87N) is a
unit protection of the differential type. Since REFPDIF (87N) is based on the zero sequence current,
which theoretically only exists in case of a ground fault, REFPDIF (87N) can be made very sensitive
regardless of normal load currents. It is the fastest protection a power transformer winding can
have. The high sensitivity and the high speed tend to make such a protection unstable. Special
measures must be taken to make it insensitive to conditions for which it should not operate, for
example, heavy through faults of phase-to-phase type or heavy external ground faults.
REFPDIF (87N) is a differential protection of the low impedance type. All three-phase currents, and
the neutral point current, must be fed separately to REFPDIF(87N). The fundamental frequency
components of all currents are extracted from all input currents, while other eventual zero
sequence components, such as the 3rd harmonic currents, are fully suppressed. Then the residual
current phasor is calculated from the three line current phasors. This zero sequence current
phasor is added to the neutral current vectorially, in order to obtain differential current.
The following facts may be observed from Figure 37 and Figure 38, where the three line CTs are
shown as connected together in order to measure the residual 3Io current, for the sake of
simplicity.
ROA (Relay Operate Angle)

ROA = 60 deg
REFPDIF never operates for any faults
IN external to the protected zone.
Currents 3Io and IN are theoretically

180o out of phase for any external
ground-fault.
Figure 37: Zero sequence currents at an external ground fault
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Technical manual
Uzs Uzs
IN
Figure 38: Zero sequence currents at an internal ground fault
1. For an external ground fault (Figure 37), the residual current 3Io and the neutral current IN have
equal magnitude, but they are seen within the IED as 180 degrees out-of-phase if the current
transformers are connected as in Figure 37, which is the ABB recommended connection. The
differential current becomes zero as both CTs ideally measure exactly the same component of
the ground fault current.
2. For an internal fault, the total ground fault current is composed generally of two zero
sequence currents. One zero sequence current (3IZS1) flows towards the power transformer
neutral point and into the ground, while the other zero sequence current (3IZS2) flows into the
connected power system. These two primary currents can be expected to have approximately
opposite directions (about the same zero sequence impedance angle is assumed on both
sides of the ground fault). However, on the secondary CT sides of the current transformers,
they will be approximately in phase if the current transformers are oriented as in Figure 35,
which is the orientation recommended by ABB. The magnitudes of the two currents may be
different, dependent on the magnitudes of zero sequence impedances of both sides. No
current can flow towards the power system, if the only point where the system is grounded, is
at the protected power transformer. Likewise, no current can flow into the power system, if
the winding is not connected to the power system (circuit breaker open and power
transformer energized from the other side).
3. For both internal and external ground faults, the current in the neutral connection IN always
has the same direction, which is towards the ground (except in case of autotransformers
where the direction can vary).
4. The two internally processed zero sequence currents are 3Io and IN. The vectorial sum is the
REFPDIF (87N) differential current, which is equal to Idiff = IN +3Io .
The line zero sequence (residual) current is calculated from 3 line (terminal) currents. A bias
quantity must give stability against false operations due to high through fault currents. To
stabilize REFPDIF at external faults, a fixed bias characteristic is implemented.
REFPDIF (87N) should also be stable against heavy phase-to-phase internal faults, not including
ground. These faults may also give false zero sequence currents due to saturated line CTs. Such
faults, however are without neutral current, and can thus be eliminated as a source of danger.
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Technical manual
As an additional measure against unwanted operation, a directional check is made in agreement

with the above points 1 and 2. Operation is only allowed if the currents 3Io and IN (as shown in
Figure 37 and Figure 38) are both within the operating region. By taking a smaller ROA, REFPDIF
(87N) can be made more stable under heavy external fault conditions, as well as under the complex
conditions, when external faults are cleared by other protections.
6.2.7.2 Restricted ground fault protection, low impedance differential protection M5447-20 v12
Restricted earth-fault protection, low impedance (REFPDIF, 87N) is a protection of differential

type, a unit protection, whose settings are independent of any other protection. It has some
advantages compared to the transformer differential protection. It is less complicated, as no
current phase correction or magnitude correction are needed, not even in the case of an eventual
on-load tap changer (OLTC). REFPDIF (87N) is not sensitive to inrush and overexcitation currents.
The only danger is an eventual current transformer saturation.
REFPDIF (87N) has only one operate-bias characteristic, which is described in the table 56 and
shown in Figure 39.
Table 56: Data of the operate-bias characteristic of REFPDIF(87N)

Default sensitivity Max. base Min. base End of First slope Second
Idmin (zone 1) sensitivity Idmin sensitivity Idmin zone 1 slope
(zone 1) (zone 1)
% IBase % IBase % IBase % IBase % %
30 5 100 125 70 100
The differential protection REFPDIF (87N) calculates a differential current and a bias current. In
case of internal ground faults, the differential current is theoretically equal to the total ground
fault current. The bias current is supposed to give stability to REFPDIF(87N). The bias current is a
measure of how high the currents are and how difficult the conditions are under which the CTs
operate. With a high bias, difficult conditions can be suspected, and it will be more likely that the
calculated differential current has a component of a false current, primarily due to CT saturation.
This “law” is formulated by the operate-bias characteristic. This characteristic divides the Idiff -
Ibias plane in two areas. The area above the operate-bias characteristic is the operate area, while
the one below is the block area, see Figure 39.
Figure 39: Operate - bias characteristic of the Restricted earth-fault protection, low
impedance REFPDIF (87N)
6.2.7.3 Calculation of differential current and bias current M5447-47 v11
The differential current (operate current), as a fundamental frequency phasor, is calculated as

(with designations as in Figure 37 and Figure 38):
Idiff = IN + 3 Io
EQUATION1533 V1 EN-US (Equation 1)
where:
IN is current in the power transformer neutral as a fundamental frequency phasor.
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3Io is residual current of the power transformer terminal currents as a phasor.
If there are two three-phase CT inputs, as in breaker-and-a-half configurations, see figure 10, then
their respective residual currents are added within the REFPDIF (87N) function so that:
I3PW1 = I3PW1CT1 + I3PW1CT2
where the signals are defined in the input and output signal tables for REFPDIF (87N).
The bias current is a measure (expressed internally as a true fundamental frequency current in
Amperes) of how difficult the conditions are under which the instrument current transformers
operate. Dependent on the magnitude of the bias current, the corresponding zone (section) of the
operate-bias characteristic is applied, when deciding whether to trip, or not to trip. In general, the
higher the bias current, the higher the differential current required to produce a trip.
The bias current is the highest current of all separate input currents to REFPDIF (87N), that is, of
current in phase A, phase B, phase C, and the current in the neutral point (designated as IN in
Figure 37 and in Figure 38).
If there are two feeders included in the zone of protection of REFPDIF (87N), as in case of an auto-
transformer with two feeders included on both sides, then the respective bias current is found as
the relatively highest of the following currents:
1
current[1] = max (I3PW1CT1) ×
CTFactorPri1
1
CTFactorPri2
1
CTFactorSec1
1
CTFactorSec2
current[5] = IN
The bias current is thus generally equal to none of the input currents. If all primary ratings of the
CTs were equal to IBase, then the bias current would be equal to the highest current in Amperes.
IBase shall be set equal to the rated current of the protected winding where REFPDIF (87N)
function is applied.
6.2.7.4 Detection of external ground faults M5447-75 v11
External faults are more common than internal ground faults for which the restricted ground fault
protection should operate. It is important that the restrictedground fault protection remains
stable during heavy external ground and phase-to-phase faults, and also when such a heavy
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Technical manual
external fault is cleared by some other protection such as overcurrent, or ground fault protection.
The conditions during a heavy external fault, and particularly immediately after the clearing of
such a fault may be complex. The circuit breaker’s poles may not open exactly at the same
moment, some of the CTs may still be highly saturated, and so on.
The detection of external ground faults is based on the fact that for such a fault a high neutral
current appears first, while a false differential current only appears if one or more current
transformers saturate.
An external fault is thus assumed to have occurred when a high neutral current suddenly appears,
while at the same time the differential current Idiff remains low, at least for a while. This condition
must be detected before a trip request is placed within REFPDIF. Any search for external fault is
aborted if a trip request has been placed. A condition for a successful detection is that it takes not
less than 4ms for the first CT to saturate.
For an internal fault, a true differential current develops immediately, while for an external fault it
only develops if a CT saturates. If a trip request comes first, before an external fault could be
positively detected, then it must be an internal fault.
If an external fault has been detected, then the REFPDIF is temporarily desensitized.
Directional criterion M5447-110 v11

The directional criterion is applied in order to positively distinguish between internal and external
ground faults. This check is an additional criterion, which should prevent malfunctions at heavy
external ground faults, and during the disconnection of such faults by other protections. Ground
faults on lines connecting the power transformer occur much more often than ground faults on a
power transformer winding. It is important therefore that the Restricted ground fault protection,
low impedance (REFPDIF87N) must remain stable during an external fault, and immediately after
the fault has been cleared by some other protection.
For an external ground faults with no CT saturation, the residual current in the lines (3Io) and the
neutral current (IN in Figure 37) are theoretically equal in magnitude and are 180 degrees out-of-
phase. The current in the neutral (IN) serves as a directional reference because it has the same
direction for both internal and external ground faults. The directional criterion in REFPDIF (87N)
protection makes it a current-polarized protection.
However, if one or more CTs saturate under external fault conditions, then the measured currents
3Io and IN may no longer be equal, nor will their positions in the complex plane be exactly 180
degrees apart. There is a risk that the resulting false differential current Idiff enters the operate
area of the operate-restrain characteristic under external fault conditions. If this happens, a
directional test may prevent a malfunction.
A directional check is only executed if:
1. a trip request signal has been issued (REFPDIF (87N) function PICKUP signal set to 1)
2. the residual current in lines (3Io) is at least 3% of the IBase current.
If a directional check is either unreliable or not possible to do, due to too small currents, then the
direction is cancelled as a condition for an eventual trip.
If a directional check is executed, the REFPDIF (87N) protection operation is only allowed if
currents 3Io and IN (as seen in Figure 37 and Figure 38) are both within the operating region
determined by the set value of ROA, in degrees.
ROA = 60 to 90 degrees; where ROA stands for Relay Operate Angle.
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Second harmonic analysis M5447-106 v12

When energizing a transformer a false differential current may appear in ground fault protection,
low impedance function (REFPDIF 87N). The phase CTs may saturate due to a high DC component
with a long duration, but the current through the neutral CT does not have either the same DC
component or the same magnitude and the risk for saturation of this CT is not as high. As a result,
the differential current due to the saturation may be so high that it reaches the operate
characteristic. A calculation of the content of 2nd harmonic in the neutral current is made when the
neutral current, residual current and bias current are within some windows and some timing
criteria are fulfilled. If the ratio between second and fundamental harmonic exceeds 40%, REFPDIF
(87N) is blocked.
6.2.7.5 Algorithm of the restricted ground fault protection M5447-95 v13
1. Check if current in the neutral Ineutral (IN) is less than 50% of the base sensitivity Idmin. If
yes, only service values are calculated, and rest of the REFPDIF (87N) algorithm is not
executed.
2. If current in the Ineutral (IN) is more than 50% of Idmin, then determine the bias current Ibias.
3. Determine the differential (operate) current Idiff as a phasor, and calculate its magnitude.
4. Check if the point P(Ibias, Idiff) is above the operate-bias characteristic. If yes, increment the
trip request counter by 1. If the point P(Ibias, Idiff) is found to be below the operate-bias
characteristic, then the trip request counter is reset to zero.
5. If the trip request counter is still zero, search for an eventual heavy external ground fault. The
search is only made if the neutral current is at least 50% of the Idmin current. If an external
ground fault has been detected, a flag is set which remains set until the external fault has
been cleared. The external fault flag is reset to zero when Ineutral falls below 50% of the base
sensitivity Idmin. Any search for an external fault is aborted if trip request counter is greater
than zero.
6. As long as the external fault persists, an additional temporary trip condition is introduced.
This means that REFPDIF (87N) is temporarily desensitized.
7. If point P(Ibias, Idiff) is found to be above the operate-bias characteristic), so that trip
request counter is greater than zero, a directional check can be made. The directional check is
made only if Iresidual (3Io) is more than 3% of the IBase current. If the result of the check
means “external fault”, then the internal trip request is reset. If the directional check cannot
be executed, then direction is no longer a condition for a trip.
8. When neutral current, residual current and bias current are within some windows and some
timing criteria are fulfilled, the ratio of 2nd to fundamental harmonic is calculated. If it is found
to be above 40%, the trip request counter is reset and TRIP remains zero.
9. Finally, a check is made if the trip request counter is equal to, or higher than 2. If yes, and at
the same instance of time tREFtrip, the actual bias current at this instance of time tREFtrip is at
least 50% of the highest bias current Ibiasmax (Ibiasmax is the highest recording of any of the
three phase currents measured during the disturbance), then REFPDIF (87N) sets output TRIP
to 1. If the counter is less than 2, the TRIP signal remains zero.
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M13062-1 v16.1.1
Table 57: REFPDIF (87N) technical data

Trip characteristic Adaptable ±1.0% of In at I ≤ In
±1.0% of I at I > In
Reset ratio >95% -

Minimum pickup, IdMin (4.0-100.0)% of IBase ±1.0% of In
Directional characteristic Fixed 180 degrees or ±60 to ±2.0 degrees

±90 degrees
Trip time, trip at 0 to 10 x Min. = 15 ms -
IdMin Max. = 30 ms
Reset time, trip at 10 to 0 x Min. = 15 ms -
IdMin Max. = 30 ms
Second harmonic blocking 40.0% of fundamental ±1.0% of In
6.3 Line differential protection IP13934-1 v1
M14844-1 v4

Line differential protection, 3 CT

sets, 2-3 line ends
L3CPDIF 3Id/I> 87L
SYMBOL-HH V1 EN-US
Line differential protection, 6 CT

sets, 3-5 line ends
L6CPDIF 3Id/I> 87L
SYMBOL-HH V1 EN-US
Line differential protection 3 CT

sets, with in-zone transformers, 2-3 LT3CPDIF 3Id/I> 87LT
line ends
SYMBOL-HH V1 EN-US
Line differential protection 6 CT

sets, with in-zone transformers, 3-5 LT6CPDIF 3Id/I> 87LT
line ends
SYMBOL-HH V1 EN-US
Line differential logic LDLPSCH - 87L
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6.3.2 Functionality
6.3.2.1 Line differential protection, 3 or 6 CT sets L3CPDIF, L6CPDIF M14917-3 v6
Line differential protection applies the Kirchhoff's law and compares the currents entering and
leaving the protected multi-terminal circuit, consisting of overhead power lines and cables. Under
the condition that there are no in-line or tap (shunt) power transformers within the zone of
protection, it offers a phase segregated fundamental frequency current based differential
protection with high sensitivity and provides phase selection information for single-pole tripping
The three-terminal version is used for conventional two-terminal lines with or without a breaker-
and-a-half circuit breaker arrangement in one end, as well as three-terminal lines with single
breaker arrangements at all terminals.
Protected zone
Communication Channel
IED IED
ANSI05000039_2_en.vsd
Figure 40: Example of application on a conventional two-terminal line

The six-terminal versions are used for conventional two-terminal lines with breaker-and-a-half
circuit breaker arrangements in both ends, as well as multi-terminal lines with up to five terminals.
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Protected zone
IED IED
IED
Figure 41: Example of application on a three-terminal line with breaker-and-a-half breaker

arrangements
The current differential algorithm provides high sensitivity for internal faults and it has excellent
stability for external faults. Current samples from all CTs are exchanged between the IEDs in the
line ends (master-master mode) or sent to one IED (master-slave mode) for evaluation.
A restrained dual biased slope evaluation is made where the bias current is the highest phase
current in any line end, giving a secure through-fault stability even with heavily saturated CTs. In
addition to the restrained evaluation, an unrestrained (instantaneous) high differential current
setting can be used for fast tripping of internal faults with very high currents.
A special feature with this function is that applications with small power transformers (rated
current less than 50% of the differential current setting IdMin) connected as line taps (that is, as
shunt power transformers), without measurements of currents in the tap, can be handled. The
normal load current is considered to be negligible, and special measures must be taken in the
event of a short circuit on the LV side of the transformer. In this application, the tripping of the
differential protection can be time-delayed for low differential currents to achieve coordination
with downstream overcurrent IEDs. The local protection of the small tap power transformer is
given the time needed to disconnect the faulty transformer.
A line charging current compensation provides increased sensitivity of line differential protection.
6.3.2.2 Line differential protection 3 or 6 CT sets, with in-zone transformers

LT3CPDIF , LT6CPDIF M14932-3 v8
Two two-winding power transformers or one three-winding power transformer can be included in
the line differential protection zone. In such application, the differential protection is based on the
ampere turns balance between the transformer windings. Both two- and three-winding
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Technical manual
transformers are correctly represented with phase shift compensations made in the algorithm.
The function includes 2nd and 5th harmonic restraint and zero-sequence current elimination. The
phase-segregated differential protection with single-pole tripping is usually not possible in such
applications.
Protected zone
IED IED
Communication Channel Communication Channel
IED
Figure 42: Example of application on a three-terminal line with a power transformer in the
protection zone
6.3.2.3 Analog signal transfer for line differential protection M13647-3 v7
The line differential protection function can be arranged as a master-master system or a master-
slave system alternatively. In the former, current samples are exchanged between all IEDs, and an
evaluation is made in each IED. This means that a 64 kbit/s communication channel is needed
between every IED included in the same line differential protection zone. In the latter, current
samples are sent from all slave IEDs to one master IED where the evaluation is made, and trip
signals are sent to the remote ends when needed. In this system, a 64 kbit/s communication
channel is only needed between the master, and each one of the slave IEDs. The Master-Slave
condition for the differential function appears automatically when the setting Operation for the
differential function is set to Off.
It is recommended to use the same firmware version as well as hardware version

for a specific line differential scheme.
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Technical manual
Protected zone
IED IED
IED IED IED
Figure 43: Five terminal lines with master-master system
Protected zone
RED RED
670 670
Communication Channels
RED RED RED

670 670 670
en05000044_ansi.vsd
Figure 44: Five terminal line with master-slave system

Current samples from IEDs located geographically apart from each other, must be time
coordinated so that the current differential algorithm can be executed correctly, this is done with
the echo method.For applications where transmit and receive times can differ, the optional built in
GPS receivers can be used
The communication link is continuously monitored, and an automatic switchover to a standby link
is possible after a preset time.
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6.3.3 Function block SEMOD54630-1 v1
M14921-3 v3
L3CPDIF (87L)
I3P1* TRIP
I3P2* TR_A
I3P3* TR_B
TR_C
TRIPRES
TRIPUNRE
TRIPENHA
PICKUP
PU_A
PU_B
PU_C
BLK2H
BLK2H_A
BLK2H_B
BLK2H_C
BLK5H
BLK5H_A
BLK5H_B
BLK5H_C
ALARM
OPENCT
OPENCTAL
ID_A
ID_B
ID_C
IDMAG_A
IDMAG_B
IDMAG_C
IBIAS
IDMAG_NS
Figure 45: L3CPDIF (87L) function block

M14920-3 v3
L6CPDIF (87L)
I3P1* TRIP
I3P2* TR_A
I3P3* TR_B
I3P4* TR_C
I3P5* TRIPRES
I3P6* TRIPUNRE
TRIPENHA
PICKUP
PU_A
PU_B
PU_C
BLK2H
BLK2H_A
BLK2H_B
BLK2H_C
BLK5H
BLK5H_A
BLK5H_B
BLK5H_C
ALARM
OPENCT
OPENCTAL
ID_A
ID_B
ID_C
IDMAG_A
IDMAG_B
IDMAG_C
IBIAS
IDMAG_NS
Figure 46: L6CPDIF (87L)function block
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Technical manual
M14937-3 v3
LT3CPDIF (87LT)
I3P1* TRIP
I3P2* TR_A
I3P3* TR_B
TR_C
TRIPRES
TRIPUNRE
TRIPENHA
PICKUP
PU_A
PU_B
PU_C
BLK2H
BLK2H_A
BLK2H_B
BLK2H_C
BLK5H
BLK5H_A
BLK5H_B
BLK5H_C
ALARM
OPENCT
OPENCTAL
ID_A
ID_B
ID_C
IDMAG_A
IDMAG_B
IDMAG_C
IBIAS
IDMAG_NS
Figure 47: LT3CPDIF (87LT) function block

M14936-3 v2
LT6CPDIF (87LT)
I3P1* TRIP
I3P2* TR_A
I3P3* TR_B
I3P4* TR_C
I3P5* TRIPRES
I3P6* TRIPUNRE
TRIPENHA
PICKUP
PU_A
PU_B
PU_C
BLK2H
BLK2H_A
BLK2H_B
BLK2H_C
BLK5H
BLK5H_A
BLK5H_B
BLK5H_C
ALARM
OPENCT
OPENCTAL
ID_A
ID_B
ID_C
IDMAG_A
IDMAG_B
IDMAG_C
IBIAS
IDMAG_NS
Figure 48: LT6CPDIF (87LT) function block
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Technical manual
M12591-3 v4
LDLPSCH (87L)
CTFAIL TRIP
OUTSERV TR_A
BLOCK TR_B
TR_C
TRLOCAL
TRLOC_A
TRLOC_B
TRLOC_C
TRREMOTE
DIFLBLKD
Figure 49: LDLPSCH (87L) function block
6.3.4 Signals
Table 58: L3CPDIF (87L) Input signals

I3P1 GROUP - Three phase current grp1 samples and DFT values
SIGNAL
SIGNAL
SIGNAL
Table 59: L3CPDIF (87L) Output signals

TRIP BOOLEAN Main Trip Signal
TR_A BOOLEAN Trip signal from phase A
TR_B BOOLEAN Trip signal from phase B
TR_C BOOLEAN Trip signal from phase C
PickupRES BOOLEAN Pick up of restrained differential protection
PickupUNR BOOLEAN Pick up of Unrestrained differential protection
PickupENH BOOLEAN pickup of enhanced differential protection
BFI BOOLEAN Main Pickup output signal
BFI_A BOOLEAN Pickup signal from phase A
PU_B BOOLEAN Pickup signal from phase B
BFI_C BOOLEAN Pickup signal from phase C
INTFAULT BOOLEAN Internal fault has been detected
EXTFAULT BOOLEAN External fault has been detected
BLK2H BOOLEAN Block signal due to second harmonic
BLK2H_A BOOLEAN Block signal due to second harmonic phase A
BLK2H_B BOOLEAN Block signal due to second harmonic phase B
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Technical manual

BLK2H_C BOOLEAN Block signal due to second harmonic Phase C
BLK5H BOOLEAN Block signal due to fifth harmonic
BLK5H_A BOOLEAN Block signal due to fifth harmonic phase A
BLK5H_B BOOLEAN Block signal due to fifth harmonic phase B
BLK5H_C BOOLEAN Block signal due to fifth harmonic phase C
ALARM BOOLEAN Alarm for sustained differential current
OPENCT BOOLEAN An open CT was detected
OPENCTAL BOOLEAN Open CT Alarm output signal. Issued after a delay ...
ID_A REAL Instantaneous differential current, phase A
ID_B REAL Instantaneous differential current, phase B
ID_C REAL Instantaneous differential current, phase C
IDMAG_A REAL Magnitude of fund. freq. differential current, phase A
IDMAG_B REAL Magnitude of fund. freq. differential current, phase B
IDMAG_C REAL Magnitude of fund. freq. differential current, phase C
IBIAS REAL Magnitude of the bias current, common for phase A,B.C
IDMAG_NS REAL Magnitude of the negative sequence differential current
Table 60: L6CPDIF (87L) Input signals

SIGNAL
SIGNAL
SIGNAL
SIGNAL
SIGNAL
SIGNAL
Table 61: L6CPDIF (87L) Output signals

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Technical manual

Table 62: LT3CPDIF (87LT) Input signals

SIGNAL
SIGNAL
SIGNAL
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Table 63: LT3CPDIF (87LT) Output signals

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Technical manual
Table 64: LT6CPDIF (87LT) Input signals

SIGNAL
SIGNAL
SIGNAL
SIGNAL
SIGNAL
SIGNAL
Table 65: LT6CPDIF (87LT) Output signals

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Technical manual

Table 66: LDLPSCH (87L) Input signals

CTFAIL BOOLEAN 0 CT failure indication from local CT supervision
OUTSERV BOOLEAN 0 Input for indicating that the IED is out of service
Table 67: LDLPSCH (87L) Output signals

TRIP BOOLEAN General trip from differential protection system
TRLOCAL BOOLEAN Trip from local differential function
TRLOC_A BOOLEAN Trip from local differential function in phase A
TRLOC_B BOOLEAN Trip from local differential function in phase B
TRLOC_C BOOLEAN Trip from local differential function in phase C
TRREMOTE BOOLEAN Trip from remote differential function
DIFLBLKD BOOLEAN Local line differential function blocked
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Technical manual
6.3.5 Settings
Table 68: L3CPDIF (87L) Group settings (basic)

Enabled
IdMin 0.20 - 2.00 IB 0.01 0.30 Oper - restr charact., section 1 sensitivity,
multiple IBase
IdMinHigh 0.20 - 10.00 IB 0.01 0.80 Initial lower sensitivity, as multiple of IBase
tIdMinHigh 0.000 - 60.000 s 0.001 1.000 Time interval of initial lower sensitivity, in
sec
IdUnre 1.00 - 50.00 IB 0.01 10.00 Unrestrained differential current limit,
multiple of IBase
NegSeqDiffEn Disabled - - Enabled Off/On selection for internal / external
Enabled fault discriminator
NegSeqROA 30.0 - 120.0 Deg 1.0 60.0 Internal/external fault discriminator
Operate Angle, degrees
IMinNegSeq 0.01 - 0.20 IB 0.01 0.04 Min. value of neg. seq. curr. as multiple of
IBase
CrossBlockEn No - - No Off/On selection of the cross -block logic
Yes
ChargCurEnable Disabled - - Disabled Off/On selection for compensation of
Enabled charging currents
AddDelay Disabled - - Disabled Off/On selection for delayed diff. trip
Enabled command
IMaxAddDelay 0.20 - 5.00 IB 0.01 1.00 Below limit, extra delay can be applied,
multiple of IBase
tDefTime 0.000 - 6.000 s 0.001 0.000 Definite time additional delay in seconds
tMinInv 0.001 - 6.000 s 0.001 0.010 Inverse Delay Minimum Time. In seconds
CurveType ANSI Ext. inv. - - IEC Def. Time 19 curve types. Example: 15 for definite
ANSI Very inv. time delay.
ANSI Norm. inv.
ANSI Mod. inv.
ANSI Def. Time
L.T.E. inv.
L.T.V. inv.
L.T. inv.
IEC Norm. inv.
IEC Very inv.
IEC inv.
IEC Ext. inv.
IEC S.T. inv.
IEC L.T. inv.
IEC Def. Time
Programmable
RI type
RD type
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Technical manual

k 0.05 - 1.10 - 0.01 1.00 Time Multiplier Setting (TMS) for inverse
delays
IdiffAlarm 0.05 - 1.00 IB 0.01 0.15 Sustained differential current alarm, factor
of IBase
tAlarmdelay 0.000 - 60.000 s 0.001 10.000 Delay for alarm due to sustained
differential current, in s
Table 69: L3CPDIF (87L) Group settings (advanced)

EndSection1 0.20 - 1.50 IB 0.01 1.25 End of section 1, as multiple of reference
current IBase
current IBase
SlopeSection2 10.0 - 50.0 % 0.1 40.0 Slope in section 2 of operate-restrain
characteristic, in %
SlopeSection3 30.0 - 100.0 % 0.1 80.0 Slope in section 3 of operate- restrain
I2/I1Ratio 5.0 - 100.0 % 1.0 10.0 Max. ratio of second harmonic to
fundamental harm dif. curr. in %
I5/I1Ratio 5.0 - 100.0 % 1.0 25.0 Max. ratio of fifth harmonic to
p 0.01 - 1000.00 - 0.01 0.02 Settable curve parameter, user-
programmable curve type.
a 0.01 - 1000.00 - 0.01 0.14 Settable curve parameter, user-
b 0.01 - 1000.00 - 0.01 1.00 Settable curve parameter, user-
c 0.01 - 1000.00 - 0.01 1.00 Settable curve parameter, user-
OpenCTEnable Disabled - - Enabled Open CTEnable Off/On
Enabled
tOCTAlarmDelay 0.100 - 10.000 s 0.001 1.000 Open CT: time in s to alarm after an open
CT is detected
tOCTResetDelay 0.100 - 10.000 s 0.001 0.250 Reset delay in s. After delay, diff. function
is activated
OCTBlockEn Disabled - - Enabled Enable Open CT blocking function trip
Enabled Disabled/Enabled
Table 70: L3CPDIF (87L) Non group settings (basic)

groups
NoOfUsedCTs 2 - - 2 Total number of 3-Ph CT sets connected to
3 diff protection
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Technical manual
Table 71: L6CPDIF (87L) Group settings (basic)

Enabled
multiple IBase
sec
multiple of IBase
IBase
Yes
Enabled command
multiple of IBase
ANSI Norm. inv.
ANSI Mod. inv.
ANSI Def. Time
L.T.E. inv.
L.T.V. inv.
L.T. inv.
IEC Norm. inv.
IEC Very inv.
IEC inv.
IEC Ext. inv.
IEC S.T. inv.
IEC L.T. inv.
IEC Def. Time
Programmable
RI type
RD type
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Technical manual

delays
of IBase
Table 72: L6CPDIF (87L) Group settings (advanced)

current IBase
current IBase
Enabled
CT is detected
is activated
Table 73: L6CPDIF (87L) Non group settings (basic)

groups
3 diff protection
4
5
6
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Technical manual
Table 74: LT3CPDIF (87LT) Group settings (basic)

Enabled
multiple IBase
sec
multiple of IBase
IBase
Yes
Enabled command
multiple of IBase
ANSI Norm. inv.
ANSI Mod. inv.
ANSI Def. Time
L.T.E. inv.
L.T.V. inv.
L.T. inv.
IEC Norm. inv.
IEC Very inv.
IEC inv.
IEC Ext. inv.
IEC S.T. inv.
IEC L.T. inv.
IEC Def. Time
Programmable
RI type
RD type
delays
of IBase
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Table 75: LT3CPDIF (87LT) Group settings (advanced)

current IBase
current IBase
Enabled
CT is detected
is activated
Table 76: LT3CPDIF (87LT) Non group settings (basic)

groups
3 diff protection
ZerSeqCurSubtr Disabled - - Disabled Off/On for elimination of zero seq. from
Enabled diff. and bias curr
TraAOnInpCh No Transf A - - No Transf A Power transformer A applied on input
1 channel X
2
3
RatVoltW1TraA 1.0 - 9999.9 kV 0.1 130.0 Transformer A rated voltage (kV) on
winding 1 (HV winding)
winding 2 (LV winding)
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Technical manual

ClockNumTransA 0 [0 deg] - - 0 [0 deg] Transf. A phase shift in multiples of 30
1 [30 deg lag] deg, 5 for 150 deg
2 [60 deg lag]
3 [90 deg lag]
4 [120 deg lag]
5 [150 deg lag]
6 [180 deg lag]
7 [210 deg lag]
8 [240 deg lag]
9 [270 deg lag]
10 [300 deg lag]
11 [330 deg lag]
TraBOnInpCh No Transf B - - No Transf B Power transformer B applied on input
1 channel X
2
3
RatVoltW1TraB 1.0 - 9999.9 kV 0.1 130.0 Transformer B rated voltage (kV) on
ClockNumTransB 0 [0 deg] - - 0 [0 deg] Transf. B phase shift in multiples of 30
2 [60 deg lag]
3 [90 deg lag]
4 [120 deg lag]
5 [150 deg lag]
6 [180 deg lag]
7 [210 deg lag]
8 [240 deg lag]
9 [270 deg lag]
10 [300 deg lag]
11 [330 deg lag]
Table 77: LT6CPDIF (87LT) Group settings (basic)

Enabled
multiple IBase
sec
multiple of IBase
IBase
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Yes
Enabled command
multiple of IBase
ANSI Norm. inv.
ANSI Mod. inv.
ANSI Def. Time
L.T.E. inv.
L.T.V. inv.
L.T. inv.
IEC Norm. inv.
IEC Very inv.
IEC inv.
IEC Ext. inv.
IEC S.T. inv.
IEC L.T. inv.
IEC Def. Time
Programmable
RI type
RD type
delays
of IBase
Table 78: LT6CPDIF (87LT) Group settings (advanced)

current IBase
current IBase
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Enabled
CT is detected
is activated
Table 79: LT6CPDIF (87LT) Non group settings (basic)

groups
3 diff protection
4
5
6
ZerSeqCurSubtr Disabled - - Disabled Off/On for elimination of zero seq. from
Enabled diff. and bias curr
TraAOnInpCh No Transf A - - No Transf A Power transformer A applied on input
1 channel X
2
3
4
5
6
ClockNumTransA 0 [0 deg] - - 0 [0 deg] Transf. A phase shift in multiples of 30
2 [60 deg lag]
3 [90 deg lag]
4 [120 deg lag]
5 [150 deg lag]
6 [180 deg lag]
7 [210 deg lag]
8 [240 deg lag]
9 [270 deg lag]
10 [300 deg lag]
11 [330 deg lag]
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Technical manual

TraBOnInpCh No Transf B - - No Transf B Power transformer B applied on input
1 channel X
2
3
4
5
6
ClockNumTransB 0 [0 deg] - - 0 [0 deg] Transf. B phase shift in multiples of 30
2 [60 deg lag]
3 [90 deg lag]
4 [120 deg lag]
5 [150 deg lag]
6 [180 deg lag]
7 [210 deg lag]
8 [240 deg lag]
9 [270 deg lag]
10 [300 deg lag]
11 [330 deg lag]
Table 80: LDLPSCH (87L) Non group settings (basic)

Enabled
TestModeSet Disabled - - Disabled Test mode On/Off
Enabled
ReleaseLocal Block all - - Block all Release of local terminal for trip under test
Release local mode

Table 81: L3CPDIF (87L) Monitored data

IDMAG_A REAL - A Magnitude of fund. freq. differential
current, phase A
IDMAG_B REAL - A Magnitude of fund. freq. differential
current, phase B
IDMAG_C REAL - A Magnitude of fund. freq. differential
current, phase C
IBIAS REAL - A Magnitude of the bias current, common
for phase A,B.C
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IDMAG_NS REAL - A Magnitude of the negative sequence
NSANGLE REAL - deg Angle between local and remote negative
sequence currents
ICHARGE REAL - A Amount of compensated charging current
Table 82: L6CPDIF (87L) Monitored data

current, phase A
current, phase B
current, phase C
for phase A,B.C
sequence currents
Table 83: LT3CPDIF (87LT) Monitored data

OPENCTIN INTEGER - - Open CT on Input : 1 for input 1, 2 for input
2
OPENCTPH INTEGER - - Open CT in Phase : 1 for A, 2 for B, 3 for C
current, phase A
current, phase B
current, phase C
for phase A,B.C
sequence currents
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Technical manual
Table 84: LT6CPDIF (87LT) Monitored data

OPENCTIN INTEGER - - Open CT on Input : 1 for input 1, 2 for input
2
OPENCTPH INTEGER - - Open CT in Phase : 1 for A, 2 for B, 3 for C
current, phase A
current, phase B
current, phase C
for phase A,B.C
sequence currents
6.3.7 Operation principle
6.3.7.1 Algorithm and logic M13652-3 v7
The Line differential protection function evaluates measured current values from local and remote
line ends in order to distinguish between internal or external faults or undisturbed conditions.
The local currents are fed to the IED via the analog input modules and then they pass the analog-
to-digital converter, as shown in Figure 50.
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Technical manual
Local end Remote end
Remote end RED670
LDCM
Local end RED
Current
samples from
local end
Analog Input A/D
Module Converter Current
Pre-processing
samples from
Block
remote end
LDCM
Line Diffferential Function
CH1IARE [magnitude] Trip by unrestrained differential protection
Trip commands
CH1IAIM Calculation of Differential OR TRIP
CH1IBRE fundamental and bias currents
Pickup A
CH1IBIM frequency Magnitudes of applied to
differential differential operate / bias -, Pickup B
currents Output logic: TR_A
currents (3x) and unrestrained Pickup C TR_B
Currents from
all ends as & bias current characteristics TR_C
Bias current Pu A low sens - 2nd harmonic block
phasors PickupRES
- 5th harmonic block
Pu B low sens PickupUNR
CH1IASM Pu C low sens PickupENH
- Cross block logic
CH1IBSM Calculation
CH1ICSM of [samples] 2nd h. block
- Enhanced trip for BFI
CH2IASM instantaneous internal faults BFI_A
differential Harmonic BFI_B
Instantaneous analysis - Decreased BFI_C
currents
Curr. samples differential 5th h. block sensitivity for
Information
from all ends (3x) ( 2nd and 5th)
currents external faults BLK2H
(samples) BLK2H_A
- BLK2H_B
CH1INSRE Conditional trip for BLK2H_C
CH1INSIM Calculation simultaneous external
of and internal faults BLK5H
CH1INSRE High sensitive Internal fault
negative-- BLK5H_A
CH1INSIM Two to six internal/external fault BLK5H_B
sequence contributions discriminator BLK5H_C
External fault -
differential to neg. seq. Conditional extra time
Neg. seq. current differential delay for trip signals
currents from current as INTFAULT
(1x)
all ends phasors EXTFAULT
as phasors
Figure 50: A simplified block diagram of the power line differential protection
The IED receives the remote currents as samples via a communication link. When entering the IED,
they are processed in the Line Differential Communication Module (LDCM) where they are time-
coordinated with the local current samples, and interpolated in order to be comparable with the
local samples.
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In the preprocessing block, the real and imaginary parts of the fundamental frequency phase
currents and negative sequence currents are derived by means of fundamental frequency
numerical Fourier filters. Together with the current samples, which are required to internally
estimate the 2nd and the 5th harmonic contents in the instantaneous differential currents, they are
then forwarded to the differential function block where three kinds of analyses are carried out.
The first analysis is the classical differential and bias current evaluation with the characteristic as
seen in Figure 51. Line differential protection is phase-segregated where the differential current is
the vectorial sum of all measured currents taken separately for each phase. The bias current, on
the other hand, is considered the greatest phase current in any line end and it is common for all
the tree phases. The two slopes (SlopeSection1, SlopeSection2) and breakpoints (EndSection1,
EndSection2) can be set in PCM600 or via the local human-machine interface (LHMI).
Current values found to be above the characteristic formed by IdMin and the dual slope will give a
pickup in that phase. The level IdMinHigh is a setting value that is used to temporarily decrease
the sensitivity in situations when the protected line circuit is just energized, that is, connected to
the power system at one end.
There is also an unrestrained high differential current setting that can be used for fast tripping of
internal faults with very high currents. This unrestrained protection is phase-segregated, that is, it
is known which phase(s) require a trip command.
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Technical manual
Operate current
[ in pu of IBase]
Operate
5
unconditionally
UnrestrainedLimit
4
Operate IdMinHigh
3 C
conditionally
A B
2
Section 1 Section 2 Section 3
SlopeSection3
1
IdMin
SlopeSection2 Restrain
0
0 1 2 3 4 5
EndSection1 Restrain current

EndSection2 [ in pu of IBase]
en05000300.vsd
Figure 51: Description of the restrained and the unrestrained operate characteristics
where:
slope = D Ioperate × 100%

D Irestrain
EQUATION1246 V1 EN-US
and where the restrained characteristic is defined by the

settings:
1. IdMin
2. EndSection1
3. EndSection2
4. SlopeSection2
5. SlopeSection3
The second analysis is the 2nd and 5th harmonic analysis of the three instantaneous differential
currents. Occurrence of these harmonics over a level that is set separately for each one blocks
tripping action from the biased slope evaluation. Harmonics blocking based on 2nd and 5th
harmonics is used only used if one of the following conditions are fulfilled:
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Technical manual
• When a power transformer is included in the protected zone.

• When the bias current is less than 125 % Ibase.
• When an external fault has been detected by the negative sequence internal/external fault
discriminator and 200 ms after that.
The third analysis is the negative sequence current analysis. Effectively this is a fault discriminator
that distinguishes between internal and external faults. The directional test is made so that the
end with the highest negative sequence current is found. Then, the sum of the negative sequence
currents at all other circuit ends is calculated. Finally, the relative phase angle between these two
negative sequence currents is determined. The characteristic for this fault discriminator is shown
in Figure 52, where the directional characteristic is defined by the two setting parameters
IminNegSeq and NegSeqRoa.
90 deg
120 deg
If one or the Internal/external
other of fault boundary
currents is too
low, then no
measurement
NegSeqROA
is done, and
(Relay
120 degrees
Operate
is mapped
Angle)
180 deg 0 deg
IMinNegSeq
External Internal
fault fault
region region
270 deg en05000188-3-en.vsd

Figure 52: Operate characteristic of the internal/external fault discriminator

The reference direction (that is, the positive direction) of currents in a power line is considered to
be towards the line. Thus, when both negative sequence currents to be compared have this
direction, the phase difference between them is ideally zero. In reality, the angle will usually be
greater than zero, and this because of the possible different negative sequence impedance angles
on both sides as seen from the fault location.
An internal fault can be suspected. In the opposite case, when one negative sequence current is
entering and the other is leaving the protected object, the phase difference will ideally be 180
degrees. An external fault can be suspected. If either the local or the sum of the remote negative
sequence currents or both is below the set level, the fault discriminator does not make any fault
classification and the value 120 degrees is set. This value is an indication that negative sequence
directional comparison has not been possible. In this case, neither internal nor external fault is
signalized. When an external fault is detected, the 2nd and 5th harmonic analysis is activated for
200 ms. This gives better stability against unwanted trips. Under an external fault condition, the
cross block logic algorithm is active as well.
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Technical manual
When a fault is classified as internal by the negative sequence fault discriminator, a trip command
is issued under the condition that at least one pickup signal has been issued, while all eventual
block signals (issued by the harmonic analysis of the instantaneous differential currents) are
ignored.
For all differential functions it is the common trip that shall be used to initiate a
trip of a breaker. The separate trip signals from the different parts lacks the safety
against maloperation. This does in some cases result in a 6 ms time difference
between, for example restrained trip is issued and common trip is issued. The
separate trip signals shall only be used for information purpose of which part that
has caused the trip.
With reference to Figure 50, the outputs from the three analysis blocks are fed to the output logic.
Figure 53 shows a simplified block diagram of this output logic where only trip commands and no
alarm signals are shown for simplicity.
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Technical manual
Trip unrestrained A
TRIP
Trip unrestrained B OR
Trip unrestrained C
Pickup A TR_A
AND OR
Pickup B OR AND
OR
Pickup C TR_B
AND OR
OR AND
OR
OR TR_C
AND
PU_A IdMinHigh OR AND
OR
PU_B IdMinHigh
PU_C IdMinHigh
Internal fault
AND
NegSeqDiffEn
tIdMinHigh
AND t
External fault
tIdMinHigh OR
Line energizing t
Diff curr A 2nd harm AND

OR OR
Diff curr A 5th harm
Diff curr B 2nd harm AND
OR OR
Diff curr B 5th harm
Diff curr C 2 nd
harm AND
OR OR
Diff curr C 5th harm
OR
AND
CrossBlockEn
Figure 53: Simplified block diagram

Remembering that current values plotted above the characteristic formed by IdMin and the dual
slope in Figure 52 are said to give a pickup, the output logic can be summarized as follows:
• A pickup in one phase, gives a trip under the condition that the content of the 2nd and the 5th
harmonic is below the set level for these harmonics in the phase with start, if CrossBlockEn =
OFF. If CrossBlockEn = ON, then all phases with their start signals set, must be free of their
respective harmonic block signals; otherwise no trip command is issued. Otherwise it is
blocked as long as the harmonic is above the set level. However, when a line is energized the
current setting value IdMinHigh is used. Effectively this means that the line A-B-C in Figure 51
forms the characteristic. The harmonic block scheme is generally not applied if there are no in-
line or shunt power transformers within the protection zone. In other words, if there are no in-
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Technical manual
line or tap (shunt) power transformers within the protection zone, then no harmonics can
prevent a trip command. This makes the response of the differential protection faster in
approximately 90% of all cases.
• Current values above the unrestrained limit, gives a trip irrespective of any presence of
harmonics.
• Classification of a fault as internal by the negative sequence currents based fault
discriminator, gives a trip under the condition that at least one pickup signal has been issued,
that is, set to 1 (TRUE). The negative sequence current based fault discriminator itself is not
phase-sensitive, and the pickup signals are required to determine which phases were affected
by the fault. Any harmonic blocking is then ignored. The harmonic block scheme is not applied
if there are no in-line or tap (shunt) power transformers within the protection zone. In other
words, if there are no in-line or tap power transformers within the protection zone, then
harmonics cannot prevent a trip command. This makes the response of the protection faster
in the majority of cases. If there is no power transformer within the protected circuit, then the
2nd and 5th harmonic analysis is only activated temporarily under external fault conditions, or
when the bias current is lower than 1. 25 ⅹ IBase.
• Classification of a fault as external by the negative sequence fault discriminator will cause the
harmonic logic scheme to be applied under the duration of the external fault signal, at least
for 200 ms. Even the cross block logic scheme is then active.
The compensation of charging currents can be selected active or inactive by setting

ChargCurEnable Yes or No. The compensation works so that the fundamental frequency
differential current that is measured under steady state undisturbed conditions, is identified and
then subtracted making the resulting differential current zero (or close to zero). This action is
made separately for each phase. The magnitude of the subtracted pre-fault currents in Amperes
can be read at any time as the service value ICHARGE.
Values of the pre-fault differential currents are not updated under disturbance conditions. The
updating process is resumed 50 ms after normal conditions have been restored. Normal
conditions are only assumed if there are no pickup signals, neither internal nor external fault is
declared, the power system is symmetrical.
The change in the charging current that the fault causes by decreasing the system voltage is not
considered in the algorithm. For more information, see the application manual.
Note that the subtraction of the charging current is limited to a value specified by IdMin. Observe
as well that IdMin must always be set at least 25 % - 50 % above the value of charging currents.
Note that all small pre-fault differential currents are subtracted, regardless of their origin. Besides
the true charging currents, the following currents are eliminated:
• Small false differential currents due to small errors (inequalities) of current transformers.
• Small false differential currents because of off-nominal load tap changer positions when a
power transformer is included in the protected zone.
• Load currents of tap power transformers included in the protected zone.
6.3.7.2 Time synchronization SEMOD52396-4 v5
In a numerical line differential protection, current samples from protections located

geographically apart from each other, must be time coordinated so that the currents from the
different line ends can be compared without introducing irrelevant errors. Accuracy requirements
on this time coordination are extremely high.
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Technical manual
As an example, an inaccuracy of 0.1 ms in a 50 Hz system gives a maximum magnitude error

approximately around 3% whilst an inaccuracy of 1 ms gives a maximum magnitude error of
approximately 31%. The corresponding figures for a 60 Hz system are 4% and 38% respectively.
In Line differential protection, the time coordination is made with the so-called echo method. The
echo method can be complemented with GPS synchronization as an option.
Each IED has an accurate local clock with a very small time drift. This clock makes time tagging of
telegrams, and the echo method is then used to find out the time difference between the clocks in
two ends of a power line.
Referring to Figure 54, it works such that the transmission time to send a message from station B
to station A (T1 → T2) and receive a message from A to B (T3 → T4) is measured. The time instances
T2 and T3 are taken with the local clock reference of station A, and the time instances T1 and T4 are
taken with the local clock reference of station B.
T2 T3
A
B
T1 T4
en05000293.vsd
Figure 54: Measuring time differences

Calculation of the delay time one-way Td and the time difference Δt between the clocks in A and B
is then possible to do with equation 8 and equation 9, which are only valid under the condition
that the send and receive times are equal.
(T2 - T1 ) + (T4 - T3 )
Td =
2
(T1 + T4 ) - (T2 + T3 )
Dt =
2
Δt is calculated every time a telegram is received, and the time difference is then used to adjust
and interpolate the current measurements from the remote end before the current differential
algorithm is executed.
The echo method can be used in telecommunications transmission networks with varying signal
propagation delay as long as there is delay symmetry, that is, the send and receive delays are
equal. The delay variation can depend on the signal going different routes in the network from
time to other.
When the delay symmetry is lost, the expression for Δt given above is no longer valid. Under these
conditions GPS synchronization of the local IED clocks must be used.
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Technical manual
Including the optional GPS, means that there will be one GPS receiver module in each IED,
synchronizing its local IED clock. As GPS synchronization is very accurate, in the order of 1 μs, all
IEDs in the same line differential scheme will have the same clock reference. It is then possible to
detect asymmetric transmission time delay and compensate for it.
When the IED is equipped with GPS, this hardware is integrated in the IED. Besides the GPS
receiver itself, it also consists of filters and regulators for post processing of the GPS time synch
pulse, which is necessary to achieve a reliable GPS synchronization. Especially short interruptions
and spurious out of synch GPS signals are handled securely in this way.
When GPS synchronization is used, an interruption in the GPS signal leads to freewheeling during 8
seconds that is, during this time the synchronization benefits from the stability in the local clocks.
If the interruption persists more than 8 seconds, either fall back to the echo synchronization
method or blocking of Line differential protection function is made, as selected through setting
parameter GPSSyncErr.
6.3.7.3 Analog signal communication for line differential protection SEMOD52424-1 v1
Communication principle SEMOD52415-4 v3

For a two-terminal line, the current from the local CT needs to be communicated over a 64 kbit/s
channel to the remote line end, and the remote end current communicated back on the same
channel. If there is, for example, a three terminal line another 64 kbit/s channel will be needed to
exchange the same local current with the third line end current.
In breaker-and-a-half arrangements, there are two local currents meaning two 64 kbit/s channels
to each remote substation. Alternatively, it is possible to add together the two local currents
before sending them and in that way reduce the number of communication channels needed. This
is achieved by selecting proper setting for parameter TransmCurr (CT-SUM, CT-DIFF1 or CT-
DIFF2). However, information about bias currents is reduced if the alternative option is followed.
For further information and discussions on this matter, refer to the Application manual.
The communication can be arranged as a master-master system or a master-slave system

alternatively. Figure 55 shows a master-master system for a five-terminal line. Here current
samples are exchanged between all IEDs, and an evaluation is made in each IED. This means that a
64 kbit/s communication channel is needed between every IED included in the same line
differential protection zone.
Protected zone
IED IED
Comm. Channels
IED IED IED
Figure 55: 5–terminal line with master-master system

In the master-slave system, current samples are sent from all slave IEDs to one master IED where
the evaluation is made and trip signals are sent to the remote ends when needed. In this system, a
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Technical manual
64 kbit/s communication channel is only needed between the master, and each one of the slave
IEDs, as shown in figure 56.
Protected zone
IED IED
Comm. Channels
IED IED IED
Figure 56: 5–terminal line with master-slave system

The master-slave configuration is achieved by setting parameter Operation in the slaves to
Disabled for Line differential protection function, and setting parameter ChannelMode to Enabled
for the LDCMs in the slaves.
Test mode SEMOD52415-48 v2

Line differential protection function in one IED can be set in test mode. This can block the trip
outputs on that IED, and set the remote IEDs in a remote test mode, so that injected currents can
be echoed back phase shifted and with a settable magnitude. The trip outputs in the remote IEDs
can also be blocked automatically. For further information, refer to the installation and
commissioning manual.
Communication of current sampled values SEMOD52415-22 v2

The currents are sampled twenty times per power system cycle in the protection terminals, but the
communication exchange is made only once every 5 ms. This means that at in each telegram sent,
5 consecutive current samples in a 50 Hz system and 6 consecutive current samples in a 60 Hz
system (three phases each sampling instant) are included. Figure 57 shows the principle.
Current Current Current Current Current Current Current Current

sample sample sample sample sample sample sample sample
telegram telegram telegram telegram telegram telegram telegram telegram
sent sent sent sent sent sent sent sent
Time
0 5 10 15 20 25 30 35 (ms)
en05000290.vsd
Figure 57: Communication of current sampled values.
where:
x is the current sampling moment
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Technical manual
Redundant communication channels SEMOD52415-25 v4

With redundant communication channels, as shown in figure 58, both channels are in operation
continuously but with one of them favoured as a primary channel.
52 152
Telecom. Network
L L
C C
D
D
L L
M
C M
C
D D
M Telecom. Network M
Primary Channel
Hot Standby Channel
en05000289_ansi.vsd
Figure 58: Direct fiber optical connection between two IEDs with LDOM over longer
distances.
If communication is lost on the primary channel, switchover to the secondary channel is made
after a settable time delay RedChSwTime. Return of the primary channel will cause a switchback
after another settable time delay RedChRturnTime.
For a three-, four- or five-terminals line in a master-master configuration, a loss of one

communication channel will not cause the line differential protection to be unserviceable. Instead
it will automatically revert to a partial master-slave mode with the two IEDs that have an
unserviceable communication link between them, will serve as slaves.
For more details about the remote communication see section remote communication and the
application manual.
6.3.7.4 Open CT detection feature GUID-5B7ACC4D-4EC9-40F1-B18D-561F13945FE3 v1
Line differential protection has a built-in, advanced open CT detection feature.
A sudden inadvertently opened CT circuit may cause an unexpected and unwanted operation of
the Line differential protection under normal load conditions. Damage of secondary equipment
may occur due to high voltage from open CT circuit outputs. It is always an advantage, from the
point of view of security and reliability, to have the open CT detection function to block the line
differential protection function in case of an open CT condition, and produce an alarm signal to
the operational personnel to quickly correct the open CT condition.
The built-in open CT feature can be enabled or disabled by the setting parameter OpenCTEnable
(Disabled/Enabled). When enabled, this feature tries to prevent mal-operation when a loaded main
CT connected to line differential protection is by mistake open circuited on the secondary side.
Note that this feature can only detect interruption of one CT phase current at a time. If two or
even all three-phase currents of one set of CTs are accidentally interrupted at precisely the same
time, this feature cannot operate. Line differential protection generates a trip signal if the false
differential current is sufficiently high. An open CT circuit is typically detected in 12–14 ms, and if
the load in the protected circuit is relatively high, about the nominal load, the unwanted trip
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Technical manual
cannot always be prevented. Still, the information about what was the cause of the open CT
secondary circuit, is vital.
The principle applied to detect an open CT is a simple pattern recognition method, similar to the
waveform check used by the Power transformer differential protection in order to detect the
magnetizing inrush condition. The open CT detection principle is based on the fact that for an
open CT, the current in the phase with the open CT suddenly drops to zero (that is, as seen by the
protection), while the currents of the other two phases continue as before.
The open CT function is supposed to detect an open CT under normal conditions, that is, with the
protected multi-terminal circuit under normal load (10...120% of the rated load). If the load
currents are very low or zero, the open CT condition cannot be detected. In addition to load
condition requirement, Open CT function also checks the differential current on faulty phase. If the
differential current is lower than 10% of IBase, the open CT condition cannot be detected.
Therefore, the Open CT algorithm only detects an open CT if the load on the power transformer
protected object is 10...120% of rated load and the differential current is higher than 10% of IBase
on that phase. The search for an open CT starts 60 seconds (50 seconds in 60 Hz systems) after
the bias current has entered the 10...120% range. The Open CT detection feature can also be
explicitly deactivated by setting: OpenCTEnable = 0 (Disabled ).
The open CT function can be selected to either block the differential function or issue the alarm
signal via the setting OCTBlockEn.
When the setting OCTBlockEn is set to ON and an open CT is detected, the output OPENCT is set
to 1 and all the differential functions are blocked, except the unrestrained (instantaneous)
differential. An alarm signal is also produced after a settable delay (tOCTAlarmDelay) to report to
operational personnel for quick remedy actions once the open CT is detected. When the open CT
condition is removed (that is, the previously open CT is reconnected), the functions remain
blocked for a specified interval of time, which is also defined by a setting (tOCTResetDelay). This is
to prevent an eventual mal-operation after the reconnection of the previously open CT secondary
circuit.
Otherwise when the setting OCTBlockEn is set to OFF, only an alarm signal is issued once an open
CT is detected.
The open CT algorithm provides detailed information about the location of the defective CT
secondary circuit. The algorithm clearly indicates the IED side, CT input and phase in which an
open CT condition has been detected. These indications are provided via the following outputs
from the Line differential protection function:
1. Output OPENCT provides instant information to indicate that an open CT circuit has been
detected.
2. Output OPENCTAL provides a time-delayed alarm that the open CT circuit has been detected.
Time delay is defined by the parameter tOCTAlarmDelay.
3. Integer output OPENCTIN provides information on the local HMI regarding which open CT
circuit has been detected (1=CT input No 1; 2=CT input No 2).
4. Integer output OPENCTPH provides information on the local HMI regarding in which phase an
open CT circuit has been detected (1=Phase A; 2= Phase B; 3= Phase C).
Once the open CT condition is declared, the algorithm stops to search for further open CT circuits.
It waits until the first open CT circuit has been corrected. Note that once the open CT condition
has been detected, it can be reset automatically within the differential function. It is not possible
to externally reset an open CT condition. To reset the open CT circuit alarm automatically, the
following conditions must be fulfilled:
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Technical manual
• Bias current is for at least one minute smaller than 120%

• The open CT condition in the defective CT circuit has been corrected (for example, current
asymmetry disappears)
• The above two conditions are fulfilled for a longer time than defined by the setting parameter
tOCTResetDelay
If an open CT has been detected in a separate group of three CTs, the algorithm is reset either
when the missing current returns to the normal value, or when all three currents become zero.
After the reset, the open CT detection algorithm starts again to search for open CT circuits within
the protected zone.
6.3.7.5 Binary signal transfer SEMOD52489-4 v4
There is space for eight binary signals integrated in the telegram of the line differential analog
communication.
6.3.7.6 Line differential coordination function LDLPSCH (87L) GUID-687F26CE-20EF-424A-A355-6308CED80E6C v5
Line differential coordination function (LDLPSCH, 87L) is a support function to the Line differential
protection functions. The function gathers and coordinates local IED signals and the signals from
remote IEDs between the Line differential protection functions and the LDCM communication
module.
The function acts as the interface to and from Line differential protection.
The task of LDLPSCH (87L) is to transfer the signals via LDCM between IEDs in the protection
zone. Once LDLPSCH (87L) receives a block or trip signal from one IED, this block or trip signal is
transferred to other IEDs by LDLPSCH (87L) function.
When the line differential protection function in local IED is set to test mode, LDLPSCH (87L) sets
the remote IEDs in a remote test mode and block the trip outputs in the remote IEDs. Figure 59
shows a simplified block diagram which illustrates block signal handling by LDLPSCH (87L).
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Technical manual
TestModeRemoteTerm1
TestModeRemoteTerm2
TestModeRemoteTerm3 OR
50 ms
TestModeRemoteTerm4
t
OR
BlockRemote Ter m1
BlockRemote Ter m2
BlockRemote Ter m3 OR
BlockRemote Ter m4 LocalDiffB lock
OR
50 ms
LOCAL DIFFB LOCKED
OPE N CT BLK t
TestModeInpu t CTFailOCTToRemote
(signal to L DCM)
AND
50 ms TestModeToRemote
t
AND
TestModeS et
AND
Block Remote Tri p
OR
ReleaseLo cal
OR Block Remote Tri p
TERMINALOUTOFSERVICE
100 ms BlockToRe mo te
OR OR
BLO CK t
Figure 59: Block signal logic of LDLPSCH (87L)

When LDLPSCH (87L) receives the trip signal from local IED (or remote IED), this trip signal is
transferred to remote IEDs (or local IED) in the protection zone. Figure 60 shows a simplified block
diagram which illustrates trip signal handling by LDLPSCH (87L).
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Technical manual
DiffTripA
TRL OCAL
DiffTripB
AND
DiffTripC TR_A
OR
TripAToRemote
AND
OR
TRIP
TripARemote Te rm1
TripARemote Te rm2
TripARemote Te rm3 OR
TripARemote Te rm4 AND
TRL OC_B
AND
TR_B
OR
AND
TripBToRemote
AND
TRL OCAL
TripBRemote Te rm1 OR
TripBRemote Te rm2
TripBRemote Te rm3 OR
TripBRemote Te rm4
TRL OC_C
AND
BlockLocalTrip TR_C
OR
TripCToRemote
BlockTripToRemo te AND
TripCRemote Te rm1 OR
TRREMOTE
TripCRemote Te rm2
TripCRemote Te rm3 OR
TripCRemote Te rm4 AND
BlockRemote Trip
ANSI130 00260-2-en.vsd
Figure 60: Trip signal logic of LDLPSCH (87L)

Some of the signals in the above block diagrams are used as the internal signals by LDLPSCH
(87L). Table Internal signals describes the source or destination of these internal signals.
Table 85: Internal signals

Internal signals Source of destination Description
testModeRemoteTerm1 Signal from LDCM Test mode from remote terminal 1
blockRemoteTerm1 Signal from LDCM Block from remote terminal 1
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Technical manual
Internal signals Source of destination Description

testModeInput Signal from test mode function Input for forcing the function into
test mode
diffTripA Signal from differential function Trip from local differential function
in phase A
diffTripB Signal from differential function Trip from local differential function
in phase B
diffTripC Signal from differential function Trip from local differential function
in phase C
tripARemoteTerm1 Signal from LDCM Trip from remote terminal 1 in
phase A
phase A
phase A
phase A
tripBRemoteTerm1 Signal from LDCM Trip from remote terminal 1 in
phase B
phase B
phase B
phase B
tripCRemoteTerm1 Signal from LDCM Trip from remote terminal 1 in
phase B
phase C
phase C
phase C
tripAToRemote Signal to LDCM Trip to remote terminals phase A
tripBToRemote Signal to LDCM Trip to remote terminals phase B
tripCToRemote Signal to LDCM Trip to remote terminals phase C
localDiffBlock Signal to differential function Block local line differential function
operation
blockToRemote Signal to LDCM Block to be sent to remote
terminals
testModeToRemote Signal to LDCM Test mode indication to be sent to
remote terminals
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Technical manual
M16023-1 v11
Table 86: L3CPDIF, L6CPDIF, LT3CPDIF, LT6CPDIF(87L, 87LT) single IED without communication technical data
Minimum trip current (20-200)% of IBase ±1.0% of In at I ≤ In
SlopeSection2 (10.0-50.0)% -
EndSection 1 (20–150)% of IBase -
Unrestrained limit function (100–5000)% of IBase ±1.0% of In at I ≤ In
Second harmonic blocking (5.0–100.0)% of fundamental ±1.0% of In

Note: Fundamental magnitude = 100%
of In
Fifth harmonic blocking (5.0–100.0)% of fundamental ±2.0% of In

of In
*Inverse characteristics, see table 16 curve types See table 1136,1138 and table 1140
1136,1138 and table 1140
Critical impulse time 2ms typically at 0 to 10 x IdMin -
Charging current compensation On/Off -

LT3CPDIF and LT6CPDIF (With in-zone transformer enabled and tIdMinHigh set to 0) :
*Trip time, restrained function at 0 to Min. = 25 ms -
10 x IdMin Max. = 35 ms
*Reset time, restrained function at 10 Min. = 5 ms -

x IdMinto 0 Max. = 15 ms
*Trip time, unrestrained function at Min. = 5 ms -

10 x IdUnre to 0 Max. = 15 ms
*Reset time, unrestrained function at Min. = 15 ms -

10 x IdUnreto 0 Max. = 30 ms
**Trip time, unrestrained negative Min. = 10 ms -

sequence function Max. = 25 ms
**Reset time, unrestrained negative Min. = 10 ms -
L3CPDIF and L6CPDIF (With tIdMinHigh set to 0):

*Trip time, unrestrained function at 0 Min. = 5 ms -

to 10 x IdUnre Max. = 15 ms

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Technical manual

The data in the table are valid for a single IED with two local current input groups.
*Note: Data obtained with single three-phase input current group.
**Note: Data obtained with two three-phase input current groups. The rated symmetrical currents are applied on
both sides as pre- and post-fault currents. The fault is performed by increasing one phase current to double on
one side and decreasing same phase current to zero on the other side.
Table 87: L3CPDIF, L6CPDIF, LT3CPDIF, LT6CPDIF(87L, 87LT) with 64 Kbit/s communication technical data

of In

of In
1136,1138 and table 1140
Critical impulse time 2 ms typically at 0 to 10 x IdMin -





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Technical manual



to 10 x IdUnre Max. = 25 ms


The data in the table are valid for a single IED with 64 Kbits/s communication in the loop-back mode.
*Note: Data obtained with single three-phase input current group. The operate and reset times for L3CPDIF are
valid for an static output from SOM.
Table 88: L3CPDIF, L6CPDIF, LT3CPDIF, LT6CPDIF(87L, 87LT) with 2 Mbits/s communication technical data

of In

of In
1136,1138 and table 1140
Critical impulse time 2 ms typically at 0 to 10 x IdMin -


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Technical manual





to 10 x IdUnreUnre Max. = 20 ms


The data in the table are valid for a single IED with 2 Mbits/s communication in loop-back mode.
*Note: Data obtained with single three-phase input current group.
6.4 Additional security logic for differential protection

LDRGFC (11) GUID-0E064528-0E70-4FA1-87C7-581DADC1EB55 v2
GUID-3081E62B-3E96-4615-97B8-2CCA92752658 v2

Additional security logic for LDRGFC - 11
differential protection
6.4.2 Functionality GUID-8F918A08-E50E-4E7B-BDCA-FF0B5534B289 v3
Additional security logic for differential protection (LDRGFC, 11) can help the security of the
protection especially when the communication system is in abnormal status or for example when
there is unspecified asymmetry in the communication link. It helps to reduce the probability for
mal-operation of the protection. LDRGFC (11) is more sensitive than the main protection logic to
always release operation for all faults detected by the differential function. LDRGFC (11) consists
of four sub functions:
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Technical manual
• Phase-to-phase current variation

• Zero sequence current criterion
• Low voltage criterion
• Low current criterion
Phase-to-phase current variation takes the current samples as input and it calculates the variation
using the sampling value based algorithm. Phase-to-phase current variation function is major one
to fulfill the objectives of the startup element.
Zero sequence criterion takes the zero sequence current as input. It increases the security of
protection during the high impedance fault conditions.
Low voltage criterion takes the phase voltages and phase-to-phase voltages as inputs. It increases
the security of protection when the three-phase fault occurred on the weak end side.
Low current criterion takes the phase currents as inputs and it increases the dependability during
the switch onto fault case of unloaded line.
The differential function can be allowed to trip as no load is fed through the line and protection is
not working correctly.
Features:
• Startup element is sensitive enough to detect the abnormal status of the protected system
• Startup element does not influence the operation speed of main protection
• Startup element would detect the evolving faults, high impedance faults and three phase fault
on weak side
• It is possible to block the each sub function of startup element
• Startup signal has a settable pulse time
6.4.3 Function block GUID-A205A0BB-C09E-42E2-B664-1863E1FF2A0A v2
LDRGFC (11REL)
I3P* BFI_3P
V3P* Pick Up VAB
BLOCK Pick Up VBC
BLKCV Pick Up VCA
BLUC PU_UC
BLK3I0 Pick Up 3I0
BLKUV 27 PU
REMSTEP
Figure 61: LDRGFC (11) function block
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Technical manual
6.4.4 Signals
Table 89: LDRGFC (11REL) Input signals

I3P GROUP - Group signal for current input
SIGNAL
V3P GROUP - Group signal for voltage input
SIGNAL
BLKCV BOOLEAN 0 Block of ph to ph current variation criterion
BLUC BOOLEAN 0 Block of the low current criterion
BLK3I0 BOOLEAN 0 Block of zero sequence current criterion
BLKUV BOOLEAN 0 Block of under voltage criterion
REMSTEP BOOLEAN 0 Startup signal of remote end
Table 90: LDRGFC (11REL) Output signals

BFI_3P BOOLEAN Pick Up
Pick Up VAB BOOLEAN Pickup for current variation criterion for phase AB
Pick Up VBC BOOLEAN Pickup for current variation criterion for phase BC
Pick Up VCA BOOLEAN Pickup for current variation criterion for phase CA
PU_UC BOOLEAN Pickup for low current criterion
Pick Up 3I0 BOOLEAN Pickup for zero sequence current criterion
27 PU BOOLEAN Pickup for under voltage criterion
6.4.5 Settings
Table 91: LDRGFC (11REL) Group settings (basic)

Enabled
tStUpReset 0.000 - 60.000 s 0.001 7.000 Reset delay for pickup signal
Enable CV Disabled - - Enabled Disable/Enable current variation operation
Enabled
Pick Up ICV 1 - 100 %IB 1 20 Fixed threshold for ph to ph current
variation criterion
Operation37 Disabled - - Enabled Disable/Enable low current criterion
Enabled
PU_37 1 - 100 %IB 1 5 Pickup value for low current operation in %
of IBase
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Technical manual

Enable 3I0 Disabled - - Enabled Disable/Enable zero sequence current
Enabled criterion
PU 3I0 1 - 100 %IB 1 10 Pickup value for zero sequence current
criterion in % of IBase
Operation 27 Disabled - - Enabled Disable/Enable under voltage criterion
Enabled
V_Ph-N 1 - 100 %VB 1 60 Pickup value for phase voltage criterion in
% of UBase
V_Ph-Ph 1 - 100 %VB 1 60 Pickup value for ph to ph voltage criterion
in % of UBase
Table 92: LDRGFC (11REL) Group settings (advanced)

Time Delay CV 0.000 - 0.005 s 0.001 0.002 Time delay for phase to phase current
variation
tUC 0.000 - 60.000 s 0.001 0.200 Time delay for low current criterion
t3I0 0.000 - 60.000 s 0.001 0.000 Time delay for zero sequence current
criterion
t_27 0.000 - 60.000 s 0.001 0.000 Time delay for low voltage criterion
Table 93: LDRGFC (11REL) Non group settings (basic)

groups

Table 94: LDRGFC (11REL) Monitored data

IA REAL - A Current RMS value for phase A
IB REAL - A Current RMS value for phase B
IC REAL - A Current RMS value for phase C
3I0 REAL - A Zero sequence current value
VA REAL - kV Voltage RMS value for phase A
VB REAL - kV Voltage RMS value for phase B
VC REAL - kV Voltage RMS value for phase C
VAB REAL - kV Voltage RMS value for ph to ph AB
V_BC REAL - kV Voltage RMS value for ph to ph BC
VCA REAL - kV Voltage RMS value for ph to ph CA
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Technical manual
6.4.7 Operation principle GUID-60091A2A-AC10-4E04-B4B8-C190E3E07D3E v5
Additional security logic for differential protection (LDRGFC, 11) takes the current samples, current
RMS values, phase voltage values, phase-to-phase voltage values, zero sequence current and
remote side startup signals as inputs.
Startup signal becomes activated when any one of the current variation startup signal, zero
sequence current startup signal, voltage startup signal, and current startup signal is activated.
Phase-to-phase current variation takes current samples and generates the startup signal by
comparing with the pickup value.
If the zero sequence current value is greater than the pickup value of zero sequence current then
the zero sequence current startup signal will be activated.
Voltage startup signal becomes activated when the any of phase voltage and line voltage is less
than the voltage pickup value and the remote startup signal has to be activated.
Current startup signal becomes activated when the current value in all phases is less than current
pickup value.
Phase-to-phase current variation
Phase-to-phase current variation one is main startup element. It covers most of the abnormal
status of the system. The phase-to-phase current variation fails in high impedance faults, three-
phase fault on weak side and switch onto fault on unloaded line because of low sensitivity in these
cases.
Phase-to-phase current variation takes the current samples as input and the signal is evaluated
using the sampling value based algorithm.
The phase-to-phase current variation criterion is shown below:
DiFF > 1.8DIT + DI ZD

Where:
ΔiФФ sampling value of phase-to-phase current variation
ΔIZD setting of fixed threshold, which corresponds to setting ICV>. The default value for the setting
is 0.2·IBase, where IBase is the base current.
ΔIT float threshold
It is the full-circle integral of the phase-to-phase current variation
1 2T -1
DI T = å | DiFF (t - n) |
T n =T
Where:
T count of sample values in one cycle
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Technical manual
ΔiФФ is calculated using the below formula:
Di (k ) = [i ( k ) - i (k - N )] - [i (k - N ) - i (k - 2 N )]
= i ( k ) - 2i ( k - N ) + i (k - 2 N )
N is the number of samples in one cycle.
Time Delay CV
Pick Up VAB
t
cont
I3P Current variation Time Delay CV

Pick Up VBC
subfunction t
i
Time Delay CV
Pick Up VCA
t
OR STCV
cont
Figure 62: Current variation logic diagram

Time Delay CV is the time setting for the change of current criterion. Phase current samples are
included in input signal I3P.
Zero sequence current criterion
Zero sequence criterion is mainly for detection of remote IED high resistance faults or some
gradual faults. The criterion takes the zero sequence current as input. Zero sequence current is
compared with PU 3I0 for the t3I0 time to generate the zero sequence current startup signal.
I3P a
a>b t3I0
PU 3I0 b Pick Up 3I0
AND t
BLK3I0
BLOCK OR
Figure 63: Zero sequence current criterion logic diagram

Here PU 3I0 is the setting of the maximum possible non-faulted zero sequence current for the
protected line. The default value for this setting is 0.1 · IBase where IBase is the rated current of
the CT.
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Technical manual
t3I0 is the time setting for the zero sequence current criterion.
The zero sequence current criterion can be blocked by activating the BLK3I0 input signal.
Low voltage criterion
Low voltage criterion is mainly for detection of the three phase faults occurring on weak side with
pre fault no load condition. The low voltage criterion takes the voltage phase values, voltage
phase-to-phase values and remote startup signals as inputs. The logic for low voltage criterion is
shown below:
V3P (UPhN) a
a<b
V_Ph-N b
OR
V3P (UPhPh) a
a<b
V_Ph-Ph< b
tUV
REMSTEP (Recived) 27 PU
AND t
BLKUV
BLOCK OR
Figure 64: Low voltage criterion logic diagram

Voltage phase value is compared with the pickup value of voltage phase and voltage phase-to-
phase value is compared with the pickup value of voltage phase-to-phase. If any of the phase
voltage or phase-to-phase voltages is below the set voltage levels for some time duration (tUV)
then the low voltage PICKUP signal becomes activated after receiving the remote startup signal.
Low voltage criterion can be blocked by activating BLKUV input signal.
If there are more than one remote IED, all the startup signals of the remote ends are logically OR to
obtain the REMSTEP signal from the remote side as input.
Low current criterion
The current in each phase is compared to the set current level. If all currents are below setting
PU_37, the STUC output is activated after the set delay tUC.
I3P
a
a<b tUC
PU_37 b PU_UC
AND t
BLUC
BLOCK OR
Figure 65: Low current criterion logic diagram

Security logic for differential protection
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Technical manual
The configuration for the additional security logic for differential protection is shown in Figure 66.
The function will release tripping of the line differential protection up to the end of timer
tStUpReset.
Phase-phase STCV
i
current variation
Zero sequence Pick Up 3IO

I0 > tStUpReset
current criterion BFI_3P Local side start-up
t
Send signal to
Low voltage
OR remote side
criterion 27 PU
ULOW <
Low current
criterion PU_UC
I0 <
REMSTEP
Figure 66: Additional security logic for differential protection. Logic diagram for start up
element.
6.4.8 Technical data

GUID-0BD8D3C9-620A-426C-BDB5-DAA0E4F8247F v4
Table 95: LDRGFC (11) technical data

Trip current, zero sequence current (1-100)% of lBase ±1.0% of In
Trip current, low current operation (1-100)% of lBase ±1.0% of In
Trip voltage, phase to neutral (1-100)% of VBase ±0.5% of Vn
Trip voltage, phase to phase (1-100)% of VBase ±0.5% of Vn
Independent time delay, zero sequence current (0.000-60.000) s ±0.2% or ±40 ms

at 0 to 2 x Iset whichever is
greater
Independent time delay, low current operation (0.000-60.000) s ±0.2% or ± 40 ms
at 2 x Iset to 0 whichever is
greater
Independent time delay, low voltage operation (0.000-60.000) s ±0.2% or ±40 ms
at 2 x Vset to 0 whichever is
greater
Reset time delay for startup signal at 0 to 2 x (0.000-60.000) s ±0.2% or ±40 ms
Vset whichever is
greater
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Technical manual
Section 7 Impedance protection
7.1 Distance measuring zones, quadrilateral characteristic

ZMQPDIS (21), ZMQAPDIS (21), ZDRDIR (21D) IP14498-1 v4
7.1.1 Identification M14852-1 v6

Distance protection zone, ZMQPDIS 21
quadrilateral characteristic (zone 1)
S00346 V1 EN-US
Distance protection zone, ZMQAPDIS 21

quadrilateral characteristic (zone
2-5)
S00346 V1 EN-US
Directional impedance quadrilateral ZDRDIR 21D
Z<->
The line distance protection is an up to five (depending on product variant) zone full scheme
protection function with three fault loops for phase-to-phase faults and three fault loops for
phase-to-ground faults for each of the independent zones. Individual settings for each zone in
resistive and reactive reach gives flexibility for use as back-up protection for transformer
connected to overhead lines and cables of different types and lengths.
ZMQPDIS (21) together with Phase selection with load encroachment FDPSPDIS (21) has
functionality for load encroachment, which increases the possibility to detect high resistive faults
on heavily loaded lines, as shown in figure67.
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Technical manual
Forward
operation
Reverse
operation
en05000034.vsd
Figure 67: Typical quadrilateral distance protection zone with Phase selection with load
encroachment function FDPSPDIS (21) activated
The independent measurement of impedance for each fault loop together with a sensitive and
reliable built-in phase selection makes the function suitable in applications with single-phase
autoreclosing.
Built-in adaptive load compensation algorithm prevents overreaching of zone 1 at load exporting
end at phase-to-ground faults on heavily loaded power lines.
The distance protection zones can operate independently of each other in directional (forward or
reverse) or non-directional mode. This makes them suitable, together with different
communication schemes, for the protection of power lines and cables in complex network
configurations, such as parallel lines, multi-terminal lines.
7.1.3 Function block IP12800-1 v2
SEMOD115983-4 v8
ZMQPDIS (21)
I3P* TRIP
V3P* TR_A
BLOCK TR_B
LOVBZ TR_C
BLKTR PICKUP
PHSEL PU_A
DIRCND PU_B
PU_C
PHPUND
Figure 68: ZMQPDIS (21) function block
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Technical manual
ZMQAPDIS (21)
I3P* TRIP
V3P* TR_A
BLOCK TR_B
LOVBZ TR_C
BLKTR PICKUP
PHSEL PU_A
DIRCND PU_B
PU_C
PHPUND
Figure 69: ZMQAPDIS (21) function block (zone 2 - 5)

SEMOD54537-4 v5
ZDRDI R (21D)
I3P* STDI RCND
V3P*
Figure 70: ZDRDIR (21D) function block
7.1.4 Signals
Table 96: ZMQPDIS (21) Input signals

SIGNAL
SIGNAL
LOVBZ BOOLEAN 0 Blocks all output for LOV (or fuse failure) condition
BLKTR BOOLEAN 0 Blocks all trip outputs
PHSEL INTEGER 0 Faulted phase loop selection enable from phase selector
DIRCND INTEGER 0 External directional condition
Table 97: ZMQPDIS (21) Output signals

TRIP BOOLEAN General Trip, issued from any phase or loop
PICKUP BOOLEAN General Pickup, issued from any phase or loop
PU_A BOOLEAN Pickup signal from phase A
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Technical manual

PU_C BOOLEAN Pickup signal from phase C
PHPUND BOOLEAN Non-directional pickup, issued from any selected phase or loop
Table 98: ZMQAPDIS (21) Input signals

SIGNAL
SIGNAL
Table 99: ZMQAPDIS (21) Output signals

Table 100: ZDRDIR (21D) Input signals

SIGNAL
SIGNAL
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Technical manual
Table 101: ZDRDIR (21D) Output signals

STDIRCND INTEGER Binary coded directional information per measuring loop
7.1.5 Settings
GUID-62142086-79A9-46FF-A14F-BA0CDD6B6466 v1
Signals and settings for ZMQPDIS are valid for zone 1 while signals and settings for
ZMQAPDIS are valid for zone 2 - 5
Table 102: ZMQPDIS (21) Group settings (basic)

Enabled
OperationDir Non-directional - - Forward Operation mode of directionality NonDir /
Forward Forw / Rev
Reverse
X1 0.10 - 3000.00 Ohm/p 0.01 30.00 Positive sequence reactance reach
R1 0.01 - 1000.00 Ohm/p 0.01 5.00 Positive seq. resistance for zone
characteristic angle
X0 0.10 - 9000.00 Ohm/p 0.01 100.00 Zero sequence reactance reach
R0 0.01 - 3000.00 Ohm/p 0.01 15.00 Zero seq. resistance for zone
RFPP 0.10 - 3000.00 Ohm/l 0.01 30.00 Fault resistance reach in ohm/loop, Ph-Ph
RFPG 0.10 - 9000.00 Ohm/l 0.01 100.00 Fault resistance reach in ohm/loop, Ph-G
OperationPP Disabled - - Enabled Operation mode Disable/Enable of Phase-
Enabled Phase loops
OpModetPP Disabled - - Enabled Operation mode Disable/Enable of Zone
Enabled timer, Ph-Ph
tPP 0.000 - 60.000 s 0.001 0.000 Time delay of trip, Ph-Ph
OperationPG Disabled - - Enabled Operation mode Disable/Enable of Phase-
Enabled Ground loops
OpModetPG Disabled - - Enabled Operation mode Disable/ Enable of Zone
Enabled timer, Ph-G
tPG 0.000 - 60.000 s 0.001 0.000 Time delay of trip, Ph-G
IMinPUPP 10 - 1000 %IB 1 20 Minimum operate delta current for Phase-
Phase loops
IMinPUPG 10 - 1000 %IB 1 20 Minimum pickup phase current for Phase-
to-ground loops
IMinOpIR 5 - 1000 %IB 1 5 Minimum operate residual current for
Phase-Ground loops
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Technical manual
Table 103: ZMQPDIS (21) Non group settings (basic)

groups
Table 104: ZMQAPDIS (21) Group settings (basic)

Enabled
Forward Forw / Rev
Reverse
Enabled Phase loops
Enabled timer, Ph-G
Phase loops
to-ground loops
Table 105: ZMQAPDIS (21) Non group settings (basic)

groups
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Technical manual
Table 106: ZDRDIR (21D) Group settings (basic)

IMinPUPP 5 - 30 %IB 1 10 Minimum pickup phase-phase current for
Phase-Phase loops
to-ground loops
AngNegRes 90 - 175 Deg 1 115 Angle of blinder in second quadrant for
forward direction
AngDir 5 - 45 Deg 1 15 Angle of blinder in fourth quadrant for
forward direction
Table 107: ZDRDIR (21D) Non group settings (basic)

groups

Table 108: ZDRDIR (21D) Monitored data

A_Dir INTEGER 1=Forward - Direction in phase A
2=Reverse
0=No direction
B_Dir INTEGER 1=Forward - Direction in phase B
2=Reverse
0=No direction
C_Dir INTEGER 1=Forward - Direction in phase C
2=Reverse
0=No direction
Aph_R REAL - Ohm Resistance in phase A
Aph_X REAL - Ohm Reactance in phase A
Bph_R REAL - Ohm Resistance in phase B
Bph_X REAL - Ohm Reactance in phase B
Cph_R REAL - Ohm Resistance in phase C
Cph_X REAL - Ohm Reactance in phase C
7.1.7.1 Full scheme measurement M16923-92 v4
The execution of the different fault loops within the IED are of full scheme type, which means that
each fault loop for phase-to-ground faults and phase-to-phase faults for forward and reverse
faults are executed in parallel.
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Technical manual
Figure 71 presents an outline of the different measuring loops for up to five, impedance-
measuring zones. There are 3 to 5 zones depending on product type and variant.
A-G B-G C-G A- B B-C C-A Zone 1
Figure 71: The different measuring loops at phase-to-ground fault and phase-to-phase
fault.
The use of full scheme technique gives faster operation time compared to switched schemes
which mostly uses a pickup of an overreaching element to select correct voltages and current
depending on fault type. Each distance protection zone performs like one independent distance
protection IED with six measuring elements.
7.1.7.2 Impedance characteristic M16923-100 v7
The distance measuring zone includes six impedance measuring loops; three intended for phase-
to-ground faults, and three intended for phase-to-phase as well as, three-phase faults.
The distance measuring zone will essentially operate according to the non-directional impedance
characteristics presented in figure 72 and figure 73. The phase-to-ground characteristic is
illustrated with the full loop reach while the phase-to-phase characteristic presents the per phase
reach.
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Technical manual
X (Ohm/loop)
RFPG R1+Rn RFPG
X0-X1
Xn =
3
X1+Xn R0-R1
Rn =
3
jn jn
R (Ohm/loop)
RFPG RFPG
X1+Xn
RFPG R1+Rn RFPG
Figure 72: Characteristic for phase-to-ground measuring, ohm/loop domain
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Technical manual
X (Ohm/phase)
RFPP R1 RFPP
2 2
X 0 PE - X 1RVPE
XNRV =XX00PEPG--X31XRVPE
1RVPG
XNRV =
XNRV =
3 3
XX
X00PE
0PE
PG --1X
-X 11FWPE
XFWPE
FWPG
XNFW =
=
XNFW =
XNFW
X1 3
3 3
j j
R (Ohm/phase)
RFPP RFPP
2 2
X1
RFPP R1 RFPP
2 2
Figure 73: Characteristic for phase-to-phase measuring

The fault loop reach with respect to each fault type may also be presented as in figure 74. Note in
particular the difference in definition regarding the (fault) resistive reach for phase-to-phase
faults and three-phase faults.
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Technical manual
Ip R1 + j X1
Phase-to-ground
VA
element
Phase-to-ground
fault in phase A RFPG
(Arc + tower
resistance)
0
IN (R0-R1)/3 +
j (X0-X1)/3 )
IA R1 + j X1 Phase-to-phase
VA element A-B
Phase-to-phase
fault in phase A-B RFPP
IB
VB (Arc resistance)
R1 + j X1
IA R1 + j X1 0.5·RFPP Phase-to-phase
VA element A-C
Three-phase
fault
IC
VC
R1 + j X1 0.5·RFPP
Figure 74: Fault loop model

The R1 and jX1 in figure 74 represents the positive sequence impedance from the measuring point
to the fault location. The settings RFPG and RFPP are the eventual fault resistances in the faulty
place.
Regarding the illustration of three-phase fault in figure 74, there is of course fault current flowing
also in the third phase during a three-phase fault. The illustration merely reflects the loop
measurement, which is made phase-to-phase.
The zone can be set to operate in Non-directional, Forward or Reverse direction through the
setting OperationDir. The result from respective set value is illustrated in figure 75. The impedance
reach is symmetric, in the sense that it conforms for forward and reverse direction (there are
different forward and reverse settings - Zx and ZxRev respectively, where x = 1 - 5). Therefore, all
reach settings apply to both directions.
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Technical manual
X X X
R R R
Non-directional Forward Reverse
Figure 75: Directional operating modes of the distance measuring zones
7.1.7.3 Minimum operating current M16923-127 v5
The operation of Distance measuring zones, quadrilateral characteristic (ZMQPDIS,21) is blocked if

the magnitude of input currents fall below certain threshold values.
The phase-to-ground loop AG (BG or CG) is blocked if IA (IB or IC) < IMinPUPG.
For zone 1 with load compensation feature the additional criterion applies, that all phase-to-
ground loops will be blocked when IN < IMinOpIR, regardless of the phase currents.
IA (IB or IC) is the RMS value of the current in phase IA (IB or IC). IN is the RMS value of the vector
sum of the three-phase currents, that is, residual current 3I0.
The phase-to-phase loop AB (BC or CA) is blocked if IAB (BC or CA) < IMinPUPP.
All three current limits IMinPUPG, IMinOpIR and IMinPUPP are automatically
reduced to 75% of regular set values if the zone is set to operate in reverse
direction, that is, OperationDir = Reverse.
7.1.7.4 Measuring principles M16923-4 v7
Fault loop equations use the complex values of voltage, current, and changes in the current.
Apparent impedances are calculated and compared with the set limits. The apparent impedances
at phase-to-phase faults follow equation 10 (example for a phase A to phase B fault).
VA - VB
Zapp =
IA - IB
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Technical manual
Here V and I represent the corresponding voltage and current phasors in the respective phase Ln
(n = 1, 2, 3)
The ground return compensation applies in a conventional manner to phase-to-ground faults

(example for a phase A to ground fault) according to equation 11.
V_A
Z app =
I _ A + IN × KN
Where:
V_A, I_A and IN are the phase voltage, phase current and residual current present to the IED
KN
is defined as:
Z 0 - Z1
KN =
3 × Z1
EQUATION-2105 V2 EN-US
Z 0 = R 0 + jX 0
Z 1 = R1 + jX 1
Where
R0 is setting of the resistive zero sequence reach
X0 is setting of the reactive zero sequence reach
R1 is setting of the resistive positive sequence reach
X1 is setting of the reactive positive sequence reach
Here IN is a phasor of the residual current in IED point. This results in the same reach along the line
for all types of faults.
The apparent impedance is considered as an impedance loop with resistance R and reactance X.
The formula given in equation 11 is only valid for radial feeder application without load. When load
is considered in the case of single phase-to-ground fault, conventional distance protection might
overreach at exporting end and underreach at importing end. The IED has an adaptive load
compensation which increases the security in such applications.
Measuring elements receive current and voltage information from the A/D converter. The check
sums are calculated and compared, and the information is distributed into memory locations. For
each of the six supervised fault loops, sampled values of voltage (V), current (I), and changes in
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Technical manual
current between samples (DI) are brought from the input memory and fed to a recursive Fourier
filter.
The filter provides two orthogonal values for each input. These values are related to the loop
impedance according to equation 12,
X Di
V =R× i + ×
w0 Dt
in complex notation, or:
X D Re (I )
Re (V ) = R × Re (I ) + ×
w0 Dt
X D Im (I )
Im (V ) = R × Im (I ) + ×
w0 Dt
with
w0 = 2 × p × f 0
where:
Re designates the real component of current and voltage,
Im designates the imaginary component of current and voltage and
f0 designates the rated system frequency
The algorithm calculates Rm measured resistance from the equation for the real value of the
voltage and substitutes it in the equation for the imaginary part. The equation for the Xm
measured reactance can then be solved. The final result is equal to:
Im (V) × D Re (I) - Re (V) × Dlm(I)

Rm =
D Re (I) × lm(I) - Dlm(I) × Re (I)
Re (V) × lm(I) - lm(V ) × Re (I)

X m = w0 × D t ×
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Technical manual
The calculated Rm and Xm values are updated each sample and compared with the set zone reach.
The adaptive tripping counter counts the number of permissive tripping results. This effectively
removes any influence of errors introduced by the capacitive voltage transformers or by other
factors.
The directional evaluations are performed simultaneously in both forward and reverse directions,
and in all six fault loops. Positive sequence voltage and a phase locked positive sequence memory
voltage are used as a reference. This ensures unlimited directional sensitivity for faults close to
the IED point.
7.1.7.5 Directional impedance element for quadrilateral characteristics M16923-139 v6
The evaluation of the directionality takes place in Directional impedance quadrilateral function
ZDRDIR (21D). Equation 18 and equation 19 are used to classify that the fault is in forward
direction for phase-to-ground fault and phase-to-phase fault.
0.8 × V 1L1 + 0.2 × V 1L1 M

- ArgDir < arg < ArgNeg Re s
I L1
For the AB element, the equation in forward direction is according to.
0.8 × V 1L1 L 2 + 0.2 × V 1L1 L 2 M

I L1 L 2
where:
AngDir is the setting for the lower boundary of the forward directional characteristic, by default set to 15 (=
-15 degrees) and
AngNegRes is the setting for the upper boundary of the forward directional characteristic, by default set to 115
degrees, see figure 76.
V1A is positive sequence phase voltage in phase A
V1AM is positive sequence memorized phase voltage in phase A
IA is phase current in phase A
V1AB is voltage difference between phase A and B (B lagging A)
V1ABM is memorized voltage difference between phase A and B (B lagging A)
IAB is current difference between phase A and B (B lagging A)
The setting of AngDir and AngNegRes is by default set to 15 (= -15) and 115 degrees respectively
(as shown in figure 76). It should not be changed unless system studies have shown the necessity.
ZDRDIR gives binary coded directional information per measuring loop on the output STDIRCND.
STDIR= FWD_A*1+FWD_B*2+FWD_C*4+FWD_AB*8+
+FWD_BC*16+FWD_CA*32+REV_A*64+REV_B*128+REV_C*256+
+REV_AB*512+REV_BC*1024+REV_CA*2048
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Technical manual
AngNegRes
AngDir
R
en05000722_ansi.vsd
Figure 76: Setting angles for discrimination of forward and reverse fault in Directional
impedance quadrilateral function ZDRDIR (21D)
The reverse directional characteristic is equal to the forward characteristic rotated by 180
degrees.
The polarizing voltage is available as long as the positive sequence voltage exceeds 5% of the set
base voltage VBase. So the directional element can use it for all unsymmetrical faults including
close-in faults.
For close-in three-phase faults, the V1AM memory voltage, based on the same positive sequence
voltage, ensures correct directional discrimination.
The memory voltage is used for 100 ms or until the positive sequence voltage is restored.
After 100 ms the following occurs:
• If the current is still above the set value of the minimum operating current (between 10 and
30% of the set IED rated current IBase), the condition seals in.
• If the fault has caused tripping, the trip endures.
• If the fault was detected in the reverse direction, the measuring element in the reverse
direction remains in operation.
• If the current decreases below the minimum operating value, the memory resets until the
positive sequence voltage exceeds 10% of its rated value.
7.1.7.6 Simplified logic diagrams M13841-35 v2
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Technical manual
Distance protection zones M13841-10 v9

The design of the distance protection zones are presented for all measuring loops: phase-to-
ground as well as phase-to-phase.
Phase-to-ground related signals are designated by AG, BG and CG. The phase-to-phase signals are
designated by AB, BC and CA.
Fulfillment of two different measuring conditions is necessary to obtain the one logical signal for
each separate measuring loop:
• Zone measuring condition, which follows the operating equations described above.
• Group functional input signal (PHSEL), as presented in figure 77.
Two types of function block, ZMQPDIS (21) and ZMQAPDIS (21), are used in the IED. ZMQPDIS (21)
is used for zone 1 and ZMQAPDIS (21) for zone 2 - 5.
The PHSEL input signal represents a connection of six different integer values from Phase
selection with load encroachment, quadrilateral characteristic function FDPSPDIS (21) within the
IED, which are converted within the zone measuring function into corresponding boolean
expressions for each condition separately. Input signal PHSEL is connected to FDPSPDIS or
FMPSPDIS (21) function output PHSELZ.
The input signal DIRCND is used to give condition for directionality for the distance measuring
zones. The signal contains binary coded information for both forward and reverse direction. The
zone measurement function filters out the relevant signals depending on the setting of the
parameter OperationDir. It must be configured to the STDIR output on ZDRDIR (21D) function.
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Technical manual
PUZMPP
OR
PHSEL
AND NDIR_AB
AB
NDIR_BC
BC AND
CA AND NDIR_CA
AND NDIR_A
AG
AND NDIR_B
BG
NDIR_C
CG AND
OR STNDPE
OR
LOVBZ PHPUND
OR AND
BLOCK
BLK
BLOCFUNC
Figure 77: Conditioning by a group functional input signal PHSEL, external start condition
Composition of the phase pickup signals for a case, when the zone operates in a non-directional
mode, is presented in figure 78.
NDIR_A
OR
NDIR_B
PU_A
AND 0
NIDR_C 15ms
NDIR_AB OR PU_B
AND 0
15ms
NDIR_BC
PU_C
NDIR_CA AND 0
OR 15ms
PICKUP
AND 0
OR 15ms
BLK
Figure 78: Composition of pickup signals in non-directional operating mode

Results of the directional measurement enter the logic circuits, when the zone operates in
directional (forward or reverse) mode, as shown in figure 79.
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Technical manual
NDIR_A
DIR_A AND
PU_ZMPG
OR
NDIR_B
DIR_B AND
NDIR_C OR PU_A
AND 0
DIR_C AND 15 ms
NDIR_AB
DIR_AB AND OR PU_B
AND 0
15 ms
NDIR_BC
DIR_BC AND
OR PU_C
NDIR_CA AND 0
AND 15 ms
DIR_CA
PU_ZMPP
OR
BLK
OR PICKUP
AND 0
15 ms
Figure 79: Composition of pickup signals in directional operating mode

Tripping conditions for the distance protection zone one are symbolically presented in figure 80.
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Technical manual
Timer tPP=enable
PUZMPP AND tPP
0-tPP AND
0
BLOCFUNC
OR OR
tPG
0-tPG
0 AND
Timer tPG=enable AND
PUZMPG
BLKTR AND 0 TRIP
15 ms
BLK OR
PU_A AND TR_A
PU_B AND TR_B
PU_C AND TR_C
Figure 80: Tripping logic for the distance protection zone
M13842-1 v15
Table 109: ZMQPDIS (21) Technical data

Number of zones Max 5 with selectable -
direction
Minimum trip residual current, (5-1000)% of IBase -
zone 1
Minimum trip current, phase- (10-1000)% of IBase -
to-phase and phase-to-
ground
Positive sequence reactance (0.10-3000.00) Ω/phase ±2.0% static accuracy
±2.0 degrees static angular accuracy
Positive sequence resistance (0.01-1000.00) Ω/phase Conditions:
Zero sequence reactance (0.10-9000.00) Ω/phase Voltage range: (0.1-1.1) x Vn
Current range: (0.5-30) x In
Angle: at 0 degrees and 85 degrees
Zero sequence resistance (0.01-3000.00) Ω/phase
Fault resistance, phase-to- (0.10-9000.00) Ω/loop
ground
phase-to-phase (0.10-3000.00) Ω/loop
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Technical manual

Dynamic overreach <5% at 85 degrees -
measured with CVT’s
and 0.5<SIR<30
Definite time delay phase- (0.000-60.000) s ±0.2% or ±40 ms whichever is greater
phase and phase-ground
operation
Trip time 25 ms typically IEC 60255-121
Reset ratio 105% typically -
Reset time at 0.1 x Zreach to 2 Min. = 20 ms -
x Zreach Max. = 50 ms
7.2 Phase selection, quadrilateral characteristic with fixed

angle FDPSPDIS (21) IP12400-1 v3
7.2.1.1 Identification M14850-1 v5

Phase selection with load FDPSPDIS 21
encroachment, quadrilateral
characteristic Z<phs
SYMBOL-DD V1 EN-US
The operation of transmission networks today is in many cases close to the stability limit. Due to
environmental considerations, the rate of expansion and reinforcement of the power system is
reduced, for example, difficulties to get permission to build new power lines. The ability to
accurately and reliably classify the different types of fault, so that single pole tripping and
autoreclosing can be used plays an important role in this matter. Phase selection, quadrilateral
characteristic with fixed angle FDPSPDIS is designed to accurately select the proper fault loop in
the distance function dependent on the fault type.
The heavy load transfer that is common in many transmission networks may make fault resistance
coverage difficult to achieve. Therefore, FDPSPDIS (21) has a built-in algorithm for load
encroachment, which gives the possibility to enlarge the resistive setting of both the phase
selection and the measuring zones without interfering with the load.
The extensive output signals from the phase selection gives also important information about
faulty phase(s), which can be used for fault analysis.
A current-based phase selection is also included. The measuring elements continuously measure
three phase currents and the residual current and, compare them with the set values.
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Technical manual
FDPSPDIS (21)
I3P* TRIP
V3P* BFI
BLOCK FWD_A
DIRCND FWD_B
FWD_C
FWD_G
REV_A
REV_B
REV_C
REV_G
NDIR_A
NDIR_B
NDIR_C
NDIR_G
FWD_1PH
FWD_2PH
FWD_3PH
PHG_FLT
PHPH_FLT
PHSELZ
DLECND
Figure 81: FDPSPDIS (21) function block
7.2.4 Signals
Table 110: FDPSPDIS (21) Input signals

SIGNAL
SIGNAL
Table 111: FDPSPDIS (21) Output signals

TRIP BOOLEAN Trip by pilot communication scheme logic
BFI BOOLEAN Start in any phase or loop
FWD_A BOOLEAN Fault detected in phaseA - forward direction
FWD_B BOOLEAN Fault detected in phase B - forward direction
FWD_C BOOLEAN Fault detected in phase C - forward direction
FWD_G BOOLEAN Ground fault detected in forward direction
REV_A BOOLEAN Fault detected in phase A- reverse direction
REV_B BOOLEAN Fault detected in phase B - reverse direction
REV_C BOOLEAN Fault detected in phase C - reverse direction
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Technical manual

REV_G BOOLEAN Ground fault detected in reverse direction
NDIR_A BOOLEAN Non directional fault detected in Phase A
NDIR_B BOOLEAN Non directional fault detected in Phase B
NDIR_C BOOLEAN Non directional fault detected in Phase C
NDIR_G BOOLEAN Non directional phase-to-ground fault detected
FWD_1PH BOOLEAN Single phase-to-ground fault in forward direction
FWD_2PH BOOLEAN Phase-to-phase fault in forward direction
FWD_3PH BOOLEAN Three phase fault in forward direction
PHG_FLT BOOLEAN Release condition to enable phase-ground measuring elements
PHPH_FLT BOOLEAN Release condition to enable phase-phase measuring elements
PHSELZ INTEGER 21 pickup with load encroachment and 3I0
DLECND INTEGER Pickup for load encroachment and 3I0
7.2.5 Settings
Table 112: FDPSPDIS (21) Group settings (basic)

3I0BLK_PP 10 - 100 %IPh 1 40 3I0 limit for disabling phase-to-phase
measuring loops
3I0Enable_PG 10 - 100 %IPh 1 20 3I0 pickup for releasing phase-to-ground
measuring loops
RLdFwd 1.00 - 3000.00 Ohm/p 0.01 80.00 Forward resistive reach for the load
impedance area
RldRev 1.00 - 3000.00 Ohm/p 0.01 80.00 Reverse resistive reach for the load
impedance area
LdAngle 5 - 70 Deg 1 30 Load angle determining the load
impedance area
RFltFwdPP 0.50 - 3000.00 Ohm/l 0.01 30.00 Fault resistance reach, Ph-Ph, forward
RFltRevPP 0.50 - 3000.00 Ohm/l 0.01 30.00 Fault resistance reach, Ph-Ph, reverse
RFltFwdPG 1.00 - 9000.00 Ohm/l 0.01 100.00 Fault resistance reach, Ph-G, forward
RFltRevPG 1.00 - 9000.00 Ohm/l 0.01 100.00 Fault resistance reach, Ph-G, reverse
Phase loops
to-ground loops
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Technical manual
Table 113: FDPSPDIS (21) Group settings (advanced)

21 enable Disabled - - Enabled Operation of impedance based
Enabled measurement
50/51 enable Disabled - - Disabled Operation of current based measurement
Enabled
Pickup Iph 10 - 2500 %IB 1 120 Pickup value for phase over-current
element
Pickup_N 10 - 2500 %IB 1 20 Pickup value for trip from 3I0 over-current
element
TimerPP Disabled - - Disabled Operation mode Disable/Enable of Zone
tPP 0.000 - 60.000 s 0.001 3.000 Time delay to trip, Ph-Ph
TimerPE Disabled - - Disabled Operation mode Disable/ Enable of Zone
Enabled timer, Ph-G
tPG 0.000 - 60.000 s 0.001 3.000 Time delay to trip, Ph-E
Table 114: FDPSPDIS (21) Non group settings (basic)

groups

M13140-3 v6
The basic impedance algorithm for the operation of the phase selection measuring elements is the
same as for the distance zone measuring function. Phase selection with load encroachment,
quadrilateral characteristic FDPSPDIS (21) includes six impedance measuring loops; three intended
for phase-to-ground faults, and three intended for phase-to-phase faults as well as for three-
phase faults.
The difference, compared to the distance zone measuring function, is in the combination of the
measuring quantities (currents and voltages) for different types of faults.
three phase currents and the residual current, and compare them with the set values. The current
signals are filtered by Fourier's recursive filter, and separate trip counter prevents too high
overreaching of the measuring elements.
The characteristic is basically non-directional, but FDPSPDIS (21) uses information from the
directional function to discriminate whether the fault is in forward or reverse direction.
The pickup condition PHSELZ is essentially based on the following criteria:
1. Residual current criteria, that is, separation of faults with and without ground connection
2. Regular quadrilateral impedance characteristic or current based criteria
3. Load encroachment characteristics is always active but can be switched off by selecting a
high setting.
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Technical manual
The current pickup condition DLECND is based on the following criteria:
1. Residual current criteria

2. No quadrilateral impedance characteristic. The impedance reach outside the load area is
theoretically infinite. The practical reach, however, will be determined by the minimum
operating current limits.
3. Load encroachment characteristic is always active, but can be switched off by selecting a high
setting.
The DLECND output is non-directional. The directionality is determined by the distance zones
directional function. There are outputs from FDPSPDIS (21) that indicate whether a pickup is in
forward or reverse direction or non-directional, for example FWD_A, REV_A and NDIR_A.
These directional indications are based on the sector boundaries of the directional function and
the impedance setting of FDPSPDIS (21) function. Their operating characteristics are illustrated in
figure 82.
X X X
60°
60° R
R R
60° 60°
Non-directional (ND) Forward (FWD) Reverse (REV)
en05000668_ansi.vsd
Figure 82: Characteristics for non-directional, forward and reverse operation of Phase
selection with load encroachment, quadrilateral characteristic FDPSPDIS (21)
The setting of the load encroachment function may influence the total operating characteristic,
(for more information, refer to section "Load encroachment").
The input DIRCND contains binary coded information about the directional coming from the
directional function . It shall be connected to the STDIR output on ZDRDIR, directional measuring
block. This information is also transferred to the input DIRCND on the distance measuring zones,
that is, the ZMQPDIS, distance measuring block.
The code built up for the directionality is as follows:
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Technical manual
If the binary information is 1 then it will be considered that we have pickup in forward direction in
phase A. If the binary code is 3 then we have pickup in forward direction in phase A and B, binary
code 192 means pickup in reverse direction in phase L1 and L2A and B etc.
The PHSELZ or DLECND output contains, in a similar way as DIRCND, binary coded information, in
this case information about the condition for opening correct fault loop in the distance measuring
element. It shall be connected to the PHSEL input on the ZMQPDIS, distance measuring block.
The code built up for release of the measuring fault loops is as follows:
PHSEL = AG*1+BG*2+CG*4+AB*8+BC*16+CA*32
7.2.6.1 Phase-to-ground fault M13140-22 v3
Index PHS in images and equations reference settings for Phase selection with load
encroachment function FDPSPDIS (21).
VA( B , C )
ZPHSn =
IA( B , C )
where:
n corresponds to the particular phase (n=1, 2 or 3)
The characteristic for FDPSPDIS (21) function at phase-to-ground fault is according to figure 83.
The characteristic has a fixed angle for the resistive boundary in the first quadrant of 60°.
The resistance RN and reactance XN are the impedance in the ground-return path defined
according to equation 21 and equation 22.
R0 - R1
RN =
3
X 0 - X1
XN =
3
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Technical manual
X (ohm/loop)
Kr·(X1+XN)
RFItRevPG RFItFwdPG
X1+XN
60 deg
RFItFwdPG
RFItRevPG R (Ohm/loop)
60 deg
X1+XN
1
Kr =
tan(60 deg)
RFItRevPG RFItFwdPG
Kr·(X1+XN)
en06000396_ansi.vsd
Figure 83: Characteristic of FDPSPDIS (21) for phase-to-ground fault (setting parameters in
italic), ohm/loop domain (directional lines are drawn as "line-dot-dot-line")
Besides this, the 3I0 residual current must fulfil the conditions according to equation 23 and
equation 24.
3 × I0 ³ 0.5 × IMinPUPG
EQUATION2108-ANSI V1 EN-US (Equation 23)
3I 0 Enable _ PG
3 × I0 ³ × Iph max
100
where:
IMinPUPG is the minimum operation current for forward zones
3I0Enable_PG is the setting for the minimum residual current needed to enable operation in the phase-to-ground
fault loops (in %).
Iphmax is the maximum phase current in any of three phases.
7.2.6.2 Phase-to-phase fault M13140-56 v3
For a phase-to-phase fault, the measured impedance by FDPSPDIS (21) will be according to
equation 25.
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Technical manual
Vm - Vn
ZPHS =
-2 × In
Vm is the leading phase voltage, Vn the lagging phase voltage and In the phase current in the
lagging phase n.
The operation characteristic is shown in figure 84.
X (W / phase)
0.5·RFltRevPP 0.5·RFltFwdPP
Kr·X1
X1
0.5·RFltFwdPP
60 deg
R (W / phase)
60 deg
0.5·RFltRevPP X1
1
Kr =
tan(60 deg)
Kr·X1
0.5·RFltRevPP 0.5·RFltFwdPP
Figure 84: The operation characteristics for FDPSPDIS (21) at phase-to-phase fault (setting
parameters in italic, directional lines drawn as "line-dot-dot-line"), ohm/phase
domain
In the same way as the condition for phase-to-ground fault, there are current conditions that have
to be fulfilled in order to release the phase-to-phase loop. Those are according to equation 26 or
equation 27.
3I 0 < IMinPUPG
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Technical manual
INBlockPP
3I 0 < × Iph max
100
where:
IMinPUPG is the minimum operation current for ground measuring loops,
3I0BLK_PP is 3I0 limit for blocking phase-to-phase measuring loop and
Iphmax is maximal magnitude of the phase currents.
7.2.6.3 Three-phase faults M13140-80 v4
The operation conditions for three-phase faults are the same as for phase-to-phase fault, that is
equation , equation and equation are used to release the operation of the function.
However, the reach is expanded by a factor 2/√3 (approximately 1.1547) in all directions. At the
same time the characteristic is rotated 30 degrees, counter-clockwise. The characteristic is shown
in figure 85.
X (ohm/phase)
4 × X1
3
90 deg
0.5·RFltFwdPP·K3
X1·K3 2 × RFltFwdPP
3
R (ohm/phase)
0.5·RFltRevPP·K3
2
K3 =
3 30 deg
Figure 85: The characteristic of FDPSPDIS (21) for three-phase fault (setting parameters in
italic)
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Technical manual
7.2.6.4 Load encroachment M13140-86 v6
Each of the six measuring loops has its own load encroachment characteristic based on the
corresponding loop impedance. The load encroachment functionality is always active, but can be
switched off by selecting a high setting.
The outline of the characteristic is presented in figure 86. As illustrated, the resistive blinders are
set individually in forward and reverse direction while the angle of the sector is the same in all four
quadrants.
RLdFwd
LdAngle LdAngle
R
LdAngle LdAngle
RLdRev
en05000196_ansi.vsd
Figure 86: Characteristic of load encroachment function

The influence of load encroachment function on the operation characteristic is dependent on the
chosen operation mode of FDPSPDIS (21) function. When output signal PHSELZ is selected, the
characteristic for FDPSPDIS (21) (and also zone measurement depending on settings) will be
reduced by the load encroachment characteristic (see figure 87, left illustration).
When output signal DLECND is selected, the operation characteristic will be as the right
illustration in figure 87. The reach will in this case be limit by the minimum operation current and
the distance measuring zones.
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Technical manual
X X
R R
PHSELZ DLECND
Figure 87: Difference in operating characteristic depending on operation mode when load
encroachment is activated
When FDPSPDIS (21) is set to operate together with a distance measuring zone the resultant
operate characteristic could look like in figure 88. The figure shows a distance measuring zone
operating in forward direction. Thus, the operating area is highlighted in black.
"Phase selection"
"quadrilateral" zone
Distance measuring zone
Load encroachment
characteristic
Directional line
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Figure 88: Operating characteristic in forward direction when load encroachment is

activated
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Technical manual
Figure 88 is valid for phase-to-ground. During a three-phase fault, or load, when the quadrilateral
phase-to-phase characteristic is subject to enlargement and rotation the operate area is
transformed according to figure 89. Notice in particular what happens with the resistive blinders
of the "phase selection" "quadrilateral" zone. Due to the 30-degree rotation, the angle of the
blinder in quadrant one is now 90 degrees instead of the original 60 degrees. The blinder that is
nominally located to quadrant four will at the same time tilt outwards and increase the resistive
reach around the R-axis. Consequently, it will be more or less necessary to use the load
encroachment characteristic in order to secure a margin to the load impedance.
X (W / phase)
Phase selection
”Quadrilateral” zone
R (W / phase)
Figure 89: Operating characteristic for FDPSPDIS (21) in forward direction for three-phase
fault, ohm/phase domain
The result from rotation of the load characteristic at a fault between two phases is presented in
fig 90. Since the load characteristic is based on the same measurement as the quadrilateral
characteristic, it will rotate with the quadrilateral characteristic clockwise by 30 degrees when
subject to a pure phase-to-phase fault. At the same time the characteristic will "shrink", divided by
2/√3, from the full RLdFw and RLdRv reach, which is valid at load or three-phase fault.
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Technical manual
IEC08000437.vsd
Figure 90: Rotation of load characteristic for a fault between two phases
There is a gain in selectivity by using the same measurement as for the quadrilateral characteristic
since not all phase-to-phase loops will be fully affected by a fault between two phases. It should
also provide better fault resistive coverage in quadrant one. The relative loss of fault resistive
coverage in quadrant four should not be a problem even for applications on series compensated
lines.
7.2.6.5 Minimum operate currents M13140-102 v3
The operation of the Phase selection with load encroachment function (FDPSPDIS, 21) is blocked if
the magnitude of input currents falls below certain threshold values.
The phase-to-ground loop n is blocked if In<IMinPUPG, where In is the RMS value of the current in
phase n (A or B or C).
The phase-to-phase loop mn is blocked if (2·In<IMinPUPP).
Figure 91 presents schematically the general logic diagram for phase-selection function.
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Technical manual
INMag Residual current

based PhSel.
3I0Enable_PG PHPH_FLT
PP
3I0BLK_PP PHG_FLT
PE
Imin
I3P PP
PE STZPHLmn AND
PHSLmn
X
OR
V3P STZPHLm
R,X settings R
LEPHLm AND PHSLm
OR
Binary to word
LEPHLmn
21 enable Enable
b1 – b3
word
b4 – b6
IPELm
I_A IRELPE
Set level
Pickup Iph T
IRELPP PHSELZ
Pickup_N AND 63 F
R
50/51 enable Binary to word

b1 – b3
OR
DLECND
word
Relative current AND b4 – b6
IPELm RELPHLmn AND
based PP release
detection
m = AG, BG, CG ANSI18000010-1-en.vsdx
mn = AB, BC, CA
Figure 91: General phase-selection logic diagram

Figure 92 presents schematically the creation of the phase-to-phase and phase-to-ground
operating conditions. Consider only the corresponding part of measuring and logic circuits, when
only a phase-to-ground or phase-to-phase measurement is available within the IED.
21 enable
AND
LDEblock
3I 0  0.5  IMinPUPG IRELPG
0 STPG
AND
3 I 0 Enable _ PG 15ms
3I 0   Iphmax
100 Bool to AND
DLECND
BLOCK integer
3I 0  IMinPUPG AND 0 STPP

15ms
AND 10ms 0
0 20ms IRELPP
3I 0 BLK _ PP
3I 0   Iph max
100
Figure 92: Phase-to-phase and phase-to-ground operating conditions (residual current

criteria)
A special attention is paid to correct phase selection at evolving faults. A DLECND output signal is
created as a combination of the load encroachment characteristic and current criteria, refer to
figure 92. This signal can be configured to STCND functional input signals of the distance
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Technical manual
protection zone and this way influence the operation of the phase-to-phase and phase-to-ground
zone measuring elements, residual current and the load encroachment characteristic.
Figure 93 presents schematically the composition of non-directional phase selective signals

NDIR_A (B or C). Internal signals ZMn and ZMmn (m and n change between A, B and C according to
the phase) represent the fulfilled operating criteria for each separate loop measuring element,
that is, within the impedance characteristic. These signals are released if the setting OperationZ<
is set to Enabled. Similarly, another group of internal signals ILm and ILn represent the fulfilled
phase current measurement criteria, which are released by setting the OperationI> parameter to
Enabled.
INDIR_A
INDIR_B
INDIR_C
0
PHSEL_G
OR
15 ms
IRELPG
LDEblockA
I_A AND
OR PHSEL_A
ZMA OR 0
LDEblockB 15 ms
I_B AND
OR
ZMB PHSEL_B
LDEblockC OR 0
I_C AND 15 ms
OR
ZMC
LDEblockAB PHSEL_C
I_A & I_B AND OR 0
OR 15 ms
ZMAB
LDEblockBC
I_B & I_C AND INDIR_AB
OR
ZMBC INDIR_BC
LDEblockCA
I_C & I_A AND
OR INDIR_CA
ZMCA
IRELPP
0 PHSEL_PP
OR
15 ms
Figure 93: Composition on non-directional phase selection signals

Composition of the directional (forward and reverse) phase selective signals is presented
schematically in figure 95 and figure 94. The directional criteria appears as a condition for the
correct phase selection in order to secure a high phase selectivity for simultaneous and evolving
faults on lines within the complex network configurations. Internal signals DFWn and DFWnm
present the corresponding directional signals for measuring loops with phases Ln and Lm.
Designation FW (figure 95) represents the forward direction as well as the designation RV
(figure 94) represents the reverse direction. All directional signals are derived within the
corresponding digital signal processor.
Figure 94 presents additionally a composition of a PHSELZ output signal, which is created on the
basis of the continuation of the impedance measuring conditions and the load encroachment
characteristic. This signal can be configured to PHSEL functional input signals of the distance
zone measuring elements and their phase related pickup and tripping signals.
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Technical manual
INDIR_A
AND
DRV_A
INDIR_AB
REV_A
AND OR 0
DRV_AB 15 ms
INDIR_CA
AND
DRV_CA
REV_G
OR 0
INDIR_B 15 ms
AND
DRV_B
INDIR_AB
REV_B
AND OR 0
15 ms
INDIR_BC INDIR_A
AND INDIR_B
DRV_BC
INDIR_C Bool to PHSELZ
INDIR_C INDIR_AB integer
AND INDIR_BC
DRV_C INDIR_CA
INDIR_BC
0
REV_C
AND OR
15 ms
INDIR_CA
AND REV_PP
OR 0
15 ms
Figure 94: Composition of phase selection signals for reverse direction
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Technical manual
AND
INDIR_A
AND FWD_IPH
DFW_A AND OR 15 ms 0
0 15 ms
INDIR_AB
0 FWD_A
AND OR
DFW_AB 15 ms
INDIR_CA
AND
AND
DFW_CA
0 FWD_G
INDIR_B OR
15 ms
AND
DFW_B
AND
INDIR_AB 0 FWD_B
AND OR 15 ms
INDIR_BC 15 ms 0 FWD_2PH
AND OR
AND 0 15 ms
DFW_BC
INDIR_C
AND AND
DFW_C FWD_C
0
INDIR_BC 15 ms
AND OR
INDIR_CA 0 FWD_3PH
AND
AND 15 ms
FWD_PP
OR 0
15 ms
Figure 95: Composition of phase selection signals for forward direction

Figure 96 presents the composition of output signals TRIP and PICKUP, where internal signals
NDIR_PP, FWD_PP and REV_PP are the equivalent to internal signals NDIR_G, FWD_G and REV_G,
but for the phase-to-phase loops.
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Technical manual
TimerPP=Enable
AND AND
0-tPP
0 TRIP
OR OR
TimerPG=Enable
0-tPG
AND 0 AND
NDIR_PP
FWD_PP OR
REV_PP
RI
OR
NDIR_G
FWD_G OR
REV_G
Figure 96: TRIP and PICKUP signal logic
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Technical manual

M16024-1 v11
Table 115: FDPSPDIS (21) technical data

Reactive reach, positive (0.50–3000.00) Ω/phase ±2.5% static accuracy

sequence ±2.0 degrees static angular accuracy
Conditions:
Resistive reach, positive (0.10–1000.00) Ω/phase Voltage range: (0.1-1.1) x Vn
sequence
Reactive reach, zero sequence (0.50–9000.00) Ω/phase Angle: at 0 degrees and 85 degrees
Resistive reach, zero sequence (0.50–3000.00) Ω/phase

Fault resistance, phase-to- (1.00–9000.00) Ω/loop
ground faults, forward and
reverse
phase faults, forward and
reverse
Load encroachment criteria:
Load resistance, forward and (1.00–3000.00) Ω/phase
reverse (5-70) degrees
Safety load impedance angle
7.3 Distance measuring zone, quadrilateral characteristic for

series compensated lines ZMCPDIS (21), ZMCAPDIS (21),
ZDSRDIR (21D) SEMOD168167-1 v3
SEMOD168165-2 v2

Distance measuring zone, ZMCPDIS 21
quadrilateral characteristic for series
compensated lines (zone 1)
S00346 V1 EN-US
Distance measuring zone, ZMCAPDIS 21

quadrilateral characteristic for series
compensated lines (zone 2-5)
S00346 V1 EN-US
Directional impedance quadrilateral, ZDSRDIR 21D

including series compensation
Z<->
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Technical manual
7.3.2 Functionality SEMOD168173-4 v10
protection with three fault loops for phase-to-phase faults and three fault loops for phase-to-
ground fault for each of the independent zones. Individual settings for each zone resistive and
reactive reach give flexibility for use on overhead lines and cables of different types and lengths.
Quadrilateral characteristic is available.
ZMCPDIS (21) function has functionality for load encroachment which increases the possibility to
detect high resistive faults on heavily loaded lines.
Forward
operation
Reverse
operation
en05000034.vsd
Figure 97: Typical quadrilateral distance protection zone with load encroachment function
activated
reliable built in phase selection makes the function suitable in applications with single phase auto-
reclosing.
Built-in adaptive load compensation algorithm for the quadrilateral function prevents
overreaching of zone1 at load exporting end at phase to ground-faults on heavily loaded power
lines.
The distance protection zones can operate, independent of each other, in directional (forward or
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Technical manual
SEMOD168198-4 v2
ZMCPDIS (21)
I3P* TRIP
V3P* TR_A
BLOCK TR_B
LOVBZ TR_C
BLKTR PICKUP
PHSEL PU_A
DIRCND PU_B
PU_C
PHPUND
Figure 98: ZMCPDIS (21) function block
ZMCAPDIS (21)
I3P* TRIP
V3P* TR_A
BLOCK TR_B
LOVBZ TR_C
BLKTR PICKUP
PHSEL PU_A
DIRCND PU_B
PU_C
PHPUND
Figure 99: ZMCAPDIS (21) function block

SEMOD168200-4 v2
ZDSRDIR (21D)
I3P* PUFW
V3P* PUREV
STDIRCND
Figure 100: ZDSRDIR (21D) function block
7.3.4 Signals SEMOD173074-1 v3
Input and output signals is shown for zone 1, zone 2 - 5 are equal.
Table 116: ZMCPDIS (21) Input signals

SIGNAL
SIGNAL
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Technical manual

Table 117: ZMCPDIS (21) Output signals

Table 118: ZMCAPDIS (21) Input signals

SIGNAL
SIGNAL
Table 119: ZMCAPDIS (21) Output signals

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Technical manual

Table 120: ZDSRDIR (21D) Input signals

SIGNAL
SIGNAL
Table 121: ZDSRDIR (21D) Output signals

PUFW BOOLEAN Pickup in forward direction
PUREV BOOLEAN Pickup in reverse direction
7.3.5 Settings SEMOD173077-1 v3
Settings for ZMCPDIS (21) are valid for zone 1, while settings for ZMCAPDIS (21) are
valid for zone 2 - 5
Table 122: ZMCPDIS (21) Group settings (basic)

Enabled
Forward Forw / Rev
Reverse
Enabled Phase loops
X1FwPP 0.10 - 3000.00 Ohm/p 0.01 30.00 Positive sequence reactance reach, Ph-Ph,
forward
R1PP 0.01 - 1000.00 Ohm/p 0.01 5.00 Positive seq. resistance for characteristic
angle, Ph-Ph
X1RvPP 0.10 - 3000.00 Ohm/p 0.01 30.00 Positive sequence reactance reach, Ph-Ph,
reverse
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Technical manual

X1FwPG 0.10 - 3000.00 Ohm/p 0.01 30.00 Positive sequence reactance reach, Ph-G,
forward
R1PG 0.01 - 1000.00 Ohm/p 0.01 5.00 Positive seq. resistance for characteristic
angle, Ph-G
X0PG 0.10 - 9000.00 Ohm/p 0.01 100.00 Zero sequence reactance reach, Ph-G
R0PG 0.01 - 3000.00 Ohm/p 0.01 47.00 Zero seq. resistance for zone
characteristic angle, Ph-G
X1RvPG 0.10 - 3000.00 Ohm/p 0.01 30.00 Positive sequence reactance reach, Ph-G,
reverse
Enabled timer, Ph-G
Phase loops
to-ground loops
Phase-Ground loops
Table 123: ZMCPDIS (21) Non group settings (basic)

groups
Table 124: ZMCAPDIS (21) Group settings (basic)

Enabled
Forward Forw / Rev
Reverse
Enabled Phase loops
forward
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Technical manual

angle, Ph-Ph
reverse
forward
angle, Ph-G
reverse
Enabled timer, Ph-G
Phase loops
to-ground loops
Table 125: ZMCAPDIS (21) Non group settings (basic)

groups
Table 126: ZDSRDIR (21D) Group settings (basic)

OperationSC NoSeriesComp - - SeriesComp Special directional criteria for voltage
SeriesComp reversal
to-ground loops
Phase-Phase loops
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Technical manual

forward direction
forward direction
measuring loops
measuring loops
OperationLdCh Disabled - - Enabled Operation of load discrimination
Enabled characteristic
impedance area
impedance area
impedance area
forward
angle, Ph-Ph
reverse
forward
angle, Ph-G
X0FwPG 0.50 - 9000.00 Ohm/p 0.01 120.00 Zero sequence reactance reach, Ph-G,
forward
reverse
X0RvPG 0.50 - 9000.00 Ohm/p 0.01 120.00 Zero sequence reactance reach, Ph-G,
reverse
Table 127: ZDSRDIR (21D) Non group settings (basic)

groups
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Technical manual

Table 128: ZDSRDIR (21D) Monitored data

2=Reverse
0=No direction
2=Reverse
0=No direction
2=Reverse
0=No direction
7.3.7.1 Full scheme measurement SEMOD168177-4 v2
ground fault loop for phase-to-ground faults and phase-to-phase faults for forward and reverse
Figure 101 presents an outline of the different measuring loops for the basic five, impedance-
measuring zones.
Figure 101: The different measuring loops at phase-to-ground fault and phase-to-phase fault
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Technical manual
7.3.7.2 Impedance characteristic SEMOD168177-11 v4
Distance measuring zone, quadrilateral characteristic for series compensated lines (ZMCPDIS, 21)
include six impedance measuring loops; three intended for phase-to-ground faults, and three
intended for phase-to-phase as well as, three-phase faults.
The distance measuring zone operates according to the non-directional impedance characteristics
presented in figure 102 and figure 103. The phase-to-ground characteristic is illustrated with the
full loop reach while the phase-to-phase characteristic presents the per-phase reach.
X (Ohm/loop)
R1PG+RNFw
X 0 PG - X 1FwPG
RFRvPG RFFwPG XNFw =
3
PG- -
XX00PE 1XRVPE
1RVPGX 1RvPG
XNRV ==
XNRV XNRv = XXNFw ×
33 X 1FwPG
XX0 PE - X-1X
0 PG 1FWPG
FWPE
XNFW==
XNFW
X1FwPG+XNFw 3R 3 0 PG - R1PG
RNFw =
jN jN 3
R (Ohm/loop)
RFRvPG RFFwPG
X1RvPG+XNRv
jN
RFRvPG RFFwPG
Figure 102: Characteristic for the phase-to-ground measuring loops, ohm/loop domain
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Technical manual
X (Ohm/phase)
RFRvPP R1PP RFFwPP

2 2
X 0 PE - X 1RVPE
XNRV =XX00PEPG- -
X31XRVPE
1RVPG
XNRV =
XNRV =
3 3
XX
X00
PE
0 PE
-X
PG --1X 11FWPE
XFWPE
FWPG
XNFW =
XNFW==
XNFW
X1FwPP 3
3 3
j j
jN R (Ohm/phase)
RFRvPP RFFwPP
2 2
X1RvPP
jN
RFRvPP RFFwPP
2 2
Figure 103: Characteristic for the phase-to-phase measuring loops

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Technical manual
Ip R1 + j X1
Phase-to-ground
VA
element
Phase-to-ground
(Arc + tower
resistance)
0
IN (R0-R1)/3 +
j (X0-X1)/3 )
VA element A-B
Phase-to-phase
IB
VB (Arc resistance)
R1 + j X1
VA element A-C
Three-phase
fault
IC
VC
R1 + j X1 0.5·RFPP

The R1 and jX1 in figure 104 represents the positive sequence impedance from the measuring
point to the fault location. The RFPG and RFPP is the eventual fault resistance in the fault place.
The zone may be set to operate in Non-directional, Forward or Reverse direction through the
setting OperationDir. The result from respective set value is illustrated in figure 105. It may be
convenient to once again mention that the impedance reach is symmetric, forward and reverse
direction. Therefore, all reach settings apply to both directions.
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Technical manual
X X X
R R R
Figure 105: Directional operating modes of the distance measuring zone
7.3.7.3 Minimum operating current SEMOD168177-36 v2
The operation of Distance measuring zone, quadrilateral characteristic for series compensated
lines (ZMCPDIS,ZMCAPDIS, 21) is blocked if the magnitude of input currents fall below certain
threshold values.
sum of the three phase currents, that is, residual current 3I0.
The phase-to-phase loop AB (BC or CA) is blocked if IAB (BC or CA)< IMinPUPP.
direction, that is, OperationDir=Reverse.
7.3.7.4 Measuring principles SEMOD168177-46 v3
Apparent impedances are calculated and compared with the set limits. The calculation of the
apparent impedances at ph-ph faults follows equation 28 (example for a phase A to phase B fault).
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Technical manual
VA - VB
Zapp =
IA - IB
Here V and I represent the corresponding voltage and current phasors in the respective phase.
The ground return compensation applies in a conventional manner to ph-g faults (example for a
phase A to ground fault) according to equation 29.
V_A
Z app =
I _ A + IN × KN
Where:
KN is defined as:
Z 0 - Z1
KN =
3 × Z1
Z 0 = R 0 + jX 0
Z 1 = R1 + jX 1
Where
Here IN is a phasor of the residual current at the IED point. This results in the same reach along the
line for all types of faults.
The formula given in equation 29 is only valid for no loaded radial feeder applications. When load is
considered in the case of single phase-to-ground fault, conventional distance protection might
overreach at exporting end and underreach at importing end. IED has an adaptive load
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Technical manual
filter.
X Di
V =R× i + ×
w0 Dt
X D Re (I )
Re (V ) = R × Re (I ) + ×
w0 Dt
X D Im (I )
Im (V ) = R × Im (I ) + ×
w0 Dt
with
w0 = 2 × p × f 0
where:
voltage and substitute it in the equation for the imaginary part. The equation for the Xm measured
reactance can then be solved. The final result is equal to:

Rm =
Re (V) × lm(I) - lm(V ) × Re (I)

X m = w0 × D t ×
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Technical manual
factors.
the IED point.
7.3.7.5 Directionality for series compensation SEMOD168177-97 v4
In the basic distance protection function, the control of the memory for polarizing voltage is
performed by an undervoltage control. In case of series compensated line, a voltage reversal can
occur with a relatively high voltage also when the memory must be locked. Thus, a simple
undervoltage type of voltage memory control can not be used in case of voltage reversal. In the
option for series compensated network the polarizing quantity and memory are controlled by an
impedance measurement criterion.
The polarizing voltage is a memorized positive sequence voltage. The memory is continuously
synchronized via a positive sequence filter. The memory is starting to run freely instantaneously
when a voltage change is detected in any phase. A non-directional impedance measurement is
used to detect a fault and identify the faulty phase or phases.
At a three phase fault when no positive sequence voltage remains (all three phases are
disconnected) the memory is used for direction polarization during 100 ms.
The memory predicts the phase of the positive sequence voltage with the pre-fault frequency. This
extrapolation is made with a high accuracy and it is not the accuracy of the memory that limits the
time the memory can be used. The network is at a three phase fault under way to a new
equilibrium and the post-fault condition can only be predicted accurately for a limited time from
the pre-fault condition.
In case of a three phase fault after 100 ms the phase of the memorized voltage can not be relied
upon and the directional measurement has to be blocked. The achieved direction criteria are
sealed-in when the directional measurement is blocked and kept until the impedance fault criteria
is reset (the direction is stored until the fault is cleared).
This memory control allows in the time domain unlimited correct directional measurement for all
unsymmetrical faults also at voltage reversal. Only at three phase fault within the range of the set
impedance reach of the criteria for control of the polarization voltage the memory has to be used
and the measurement is limited to 100 ms and thereafter the direction is sealed-in. The special
impedance measurement to control the polarization voltage is set separately and has only to cover
(with some margin) the impedance to fault that can cause the voltage reversal.
The evaluation of the directionality takes place in Directional impedance quadrilateral, including
series compensation (ZDSRDIR,21D) function. Equation 36 and equation 37 are used to classify
that the fault is in forward direction for phase-to-ground fault and phase-to-phase fault.
V 1AM
- AngDir < a n g < AngNeg Re s
IA
For the AB element, the equation in forward direction is according to:
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Technical manual
V 1ABM
- AngDir < a n g < AngNeg Re s
I AB
where:
-15 degrees) and
degrees, see Figure 106.
The setting of AngDir and AngNegRes is by default set to 15 (= -15) and 115 degrees respectively,
see Figure 106, and it should not be changed unless system studies have shown the necessity.
ZDSRDIR (21D) generates a binary coded signal on the output STDIR depending on the evaluation
where FWD_A=1 adds 1, REV_A=1 adds 2, FWD_B=1 adds 4.
AngNegRes
AngDir
R
en05000722_ansi.vsd
Figure 106: Setting angles for discrimination of forward and reverse fault
degrees.
7.3.7.6 Simplified logic diagrams SEMOD168192-4 v2
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Technical manual
Distance protection zones SEMOD168192-6 v5

The design of distance protection zones are presented for all measuring loops: phase-to-ground
as well as phase-to-phase.
Two types of function block, ZMCPDIS (21) and ZMCAPDIS (21), are used in the IED. ZMCPDIS (21) is
used for zone 1 and ZMCAPDIS (21) for zone 2 - 5.
The PHSEL input signal represents a connection of six different integer values from the phase
selection function within the IED, which are converted within the zone measuring function into
corresponding boolean expressions for each condition separately. It is connected to Phase
selection with load enchroachment, quadrilateral characteristic (FDPSPDIS, 21) function output
PHSELZ.
The internal input signal DIRCND is used to give condition for directionality for the distance
measuring zones. The signal contains binary coded information for both forward and reverse
direction. The zone measurement function filter out the relevant signals on the STDIR input
depending on the setting of OperationDir. It must be configured to the STDIR output on
Directional impedance quadrilateral, including series compensation (ZDSRDIR, 21D) function.
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Technical manual
PUZMPP
OR
PHSEL
AND NDIR_AB
AB
NDIR_BC
BC AND
CA AND NDIR_CA
AND NDIR_A
AG
AND NDIR_B
BG
NDIR_C
CG AND
OR STNDPE
OR
LOVBZ PHPUND
OR AND
BLOCK
BLK
BLOCFUNC
Figure 107: Conditioning by a group functional input signal PHSEL

NDIR_A
OR
NDIR_B
PU_A
AND
NIDR_C
NDIR_AB OR PU_B
AND
NDIR_BC
PU_C
NDIR_CA AND
OR
PICKUP
AND
OR
BLK
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Technical manual
NDIR_A
DIR_A AND
PU_ZMPG
OR
NDIR_B
DIR_B AND
NDIR_C OR PU_A
AND 0
DIR_C AND 15 ms
NDIR_AB
DIR_AB AND OR PU_B
AND 0
15 ms
NDIR_BC
DIR_BC AND
OR PU_C
NDIR_CA AND 0
AND 15 ms
DIR_CA
PU_ZMPP
OR
BLK
OR PICKUP
AND 0
15 ms

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Technical manual
Timer tPP=enable
PUZMPP AND tPP
0-tPP AND
0
BLOCFUNC
OR OR
tPG
0-tPG
0 AND
PUZMPG
BLKTR AND 0 TRIP
15 ms
BLK OR
PU_A AND TR_A
PU_B AND TR_B
PU_C AND TR_C
Figure 110: Tripping logic for the distance protection zone one
7.3.8 Technical data SEMOD173234-1 v1
SEMOD173239-2 v10
Table 129: ZMCPDIS, ZMCAPDIS (21)Technical data

direction
zone 1
Positive sequence reactance (0.10-3000.00) Ω/phase ±2.0% static accuracy
Zero sequence resistance (0.01-3000.00) Ω/phase Angle: at 0 degrees and 85 degrees
Fault resistance, phase- (0.10-9000.00) Ω/loop
ground
Fault resistance, phase-phase (0.10-3000.00) Ω/loop
Dynamic overreach <5% at 85 degrees measured -
with CCVT’s and 0.5<SIR<30
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Technical manual

Definite time delay phase- (0.000-60.000) s ±0.2% or ± 35 ms whichever is greater
operation
x Zreach Max. = 50 ms
7.4 Full-scheme distance measuring, Mho characteristic

ZMHPDIS (21) SEMOD154227-1 v4
SEMOD154447-2 v2
Function description IEC 61850 IEC 60617 ANSI/IEEE

identification identification C37.2 device
number
Full-scheme distance protection, ZMHPDIS 21
mho characteristic
S00346 V1 EN-US
The numerical mho line distance protection is an up to five (depending on product variant) zone
full scheme protection of short circuit and ground faults.
The zones have fully independent measuring and settings, which gives high flexibility for all types
of lines.
The IED can be used up to the highest voltage levels. It is suitable for the protection of heavily
loaded lines and multi-terminal lines where the requirement for tripping is one-, two- and/or
three-pole.
reliable phase selection makes the function suitable in applications with single phase
autoreclosing.
Built-in selectable zone timer logic is also provided in the function.
Adaptive load compensation algorithm prevents overreaching at phase-to-ground faults on

heavily loaded power lines, see Figure 111.
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Technical manual
jX
Operation area Operation area
Operation area
No operation area No operation area
Figure 111: Load encroachment influence on the offset mho characteristic

reverse) or non-directional mode (offset). This makes them suitable, together with different
configurations, such as parallel lines, multi-terminal lines and so on.
The possibility to use the phase-to-ground quadrilateral impedance characteristic together with
the mho characteristic increases the possibility to overcome eventual lack of sensitivity of the
mho element due to the shaping of the curve at remote end faults.
The integrated control and monitoring functions offer effective solutions for operating and
monitoring all types of transmission and sub-transmission lines.
ZMHPDIS (21)
I3P* TRIP
V3P* TR_A
CURR_INP* TR_B
VOLT_INP* TR_C
POL_VOLT* TRPG
BLOCK TRPP
BLKZ PICKUP
BLKZMTD PU_A
BLKHSIR PU_B
BLKTRIP PU_C
BLKPG PHG_FLT
BLKPP PHPH_FLT
EXTNST PU_TIMER
INTRNST
DIRCND
PHSEL*
LDCND
Figure 112: ZMHPDIS (21) function block
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Technical manual
Table 130: ZMHPDIS (21) Input signals

I3P GROUP - Connection for current sample signals
SIGNAL
V3P GROUP - Connection for voltage sample signals
SIGNAL
CURR_INP GROUP - Connection for current signals
SIGNAL
VOLT_INP GROUP - Connection for voltage signals
SIGNAL
POL_VOLT GROUP - Connection for polarizing voltage
SIGNAL
BLKZ BOOLEAN 0 Block due to fuse failure
BLKZMTD BOOLEAN 0 Block signal for blocking of time domaine function
BLKHSIR BOOLEAN 0 Blocks time domain function at high SIR
BLKTRIP BOOLEAN 0 Blocks all operate output signals
BLKPG BOOLEAN 0 Blocks phase-to-ground operation
BLKPP BOOLEAN 0 Blocks phase-to-phase operation
EXTNST BOOLEAN 0 External start
INTRNST BOOLEAN 0 Internal start
LDCND INTEGER 0 External load condition (loop enabler)
Table 131: ZMHPDIS (21) Output signals

TRIP BOOLEAN Trip General
TR_A BOOLEAN Trip phase A
TR_B BOOLEAN Trip phase B
TR_C BOOLEAN Trip phase C
TRPG BOOLEAN Trip phase-to-ground
TRPP BOOLEAN Trip phase-to-phase
PICKUP BOOLEAN Pickup General
PU_A BOOLEAN Pickup phase A
PU_B BOOLEAN Pickup phase B
PU_C BOOLEAN Pickup phase C
PHG_FLT BOOLEAN Pickup phase-to-ground
PHPH_FLT BOOLEAN Pickup phase-to-phase
PU_TIMER BOOLEAN Pick up timer
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Technical manual
Table 132: ZMHPDIS (21) Group settings (basic)

Enabled
DirMode Disabled - - Forward Direction mode
Offset
Forward
Reverse
LoadEncMode Disabled - - Disabled Load encroachment mode Off/On
Enabled
ReachMode Overreach - - Overreach Reach mode Over/Underreach
Underreach
ZnTimerSel Timers seperated - - Timers Zone timer selection
Timers linked seperated
Internal start
Start from PhSel
External start
OpModePG Disabled - - Enabled Operation mode Disable/Enable of Phase-
ZPG 0.005 - 3000.000 Ohm/p 0.001 30.000 Positive sequence impedance setting for
Phase-Ground loop
ZAngPG 10 - 90 Deg 1 85 Angle for positive sequence line
impedance for Phase-Ground loop
KN 0.00 - 3.00 - 0.01 0.80 Magnitude of earth return compensation
factor KN
KNAng -180 - 180 Deg 1 -15 Angle for ground return compensation
factor KN
ZRevPG 0.005 - 3000.000 Ohm/p 0.001 30.000 Reverse reach of the phase to ground
loop(magnitude)
tPG 0.000 - 60.000 s 0.001 0.000 Delay time for operation of phase to
ground elements
IMinPUPG 10 - 30 %IB 1 20 Minimum operation phase to ground
current
OpModePP Disabled - - Enabled Operation mode Disable/Enable of Phase-
Enabled Phase loops
ZPP 0.005 - 3000.000 Ohm/p 0.001 30.000 Impedance setting reach for phase to
phase elements
ZAngPP 10 - 90 Deg 1 85 Angle for positive sequence line
impedance for Phase-Phase elements
ZRevPP 0.005 - 3000.000 Ohm/p 0.001 30.000 Reverse reach of the phase to phase
loop(magnitude)
tPP 0.000 - 60.000 s 0.001 0.000 Delay time for operation of phase to phase
IMinPUPP 10 - 30 %IB 1 20 Minimum operation phase to phase
current
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Technical manual
Table 133: ZMHPDIS (21) Group settings (advanced)

OffsetMhoDir Non-directional - - Non-directional Direction mode for offset mho
Forward
Reverse
Enabled timer, Ph-G
OpModetPP Disabled - - Enabled Operation mode Off / On of Zone timer,
Enabled Ph-ph
Table 134: ZMHPDIS (21) Non group settings (basic)

groups
7.4.6 Operation principle SEMOD154230-1 v2
each fault loop for phase-to- ground faults and phase-to-phase faults are executed in parallel for
all zones.
which mostly uses a phase selector element to select correct voltages and current depending on
fault type. So each distance protection zone performs like one independent distance protection
function with six measuring elements.
Each instance can be selected to be either forward or reverse with positive sequence polarized
mho characteristic; alternatively self polarized offset mho characteristics is also available. One
example of the operating characteristic is shown in Figure 113 A) where zone 5 is selected offset
mho.
The directional mho characteristic of Figure 113 B) has a dynamic expansion due to the source
impedance. Instead of mho characteristic crossing origin, which is only valid where the source
impedance is zero, the crossing point is moved to the coordinates of the negative source
impedance giving an expansion of the circle of Figure 113 B).
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Technical manual
A B
jx X
Mho, zone4
Mho, zone3 Zs=0
Mho, zone2 R
Mho, zone1
Zs=Z1
Zs=2Z1
R
Offset mho, zone5
Figure 113: Mho, offset mho characteristic and the source impedance influence on the mho characteristic
The polarization quantities used for the mho circle are 100% memorized positive sequence
voltages. This will give a somewhat less dynamic expansion of the mho circle during faults than a
plain cross polarized characteristic. However, if the source impedance is high, the dynamic
expansion of the mho circle might lower the security of the function too much with high loading
and mild power swing conditions.
The mho distance element has a load encroachment function which cuts off a section of the
characteristic when enabled. The function is enabled by setting the setting parameter
LoadEnchMode to Enabled. Enabling of the load encroachment function increases the possibility
to detect high resistive faults without interfering with the load impedance. The algorithm for the
load encroachment is located in the Faulty phase identification with load encroachment for mho
function FMPSPDIS (21), where also the relevant settings can be found. Information about the load
encroachment from FMPSPDIS (21) to the zone measurement is given in binary format to the input
signal LDCND.
7.4.6.3 Basic operation characteristics SEMOD154224-21 v9
Each impedance zone can be switched OnEnabled and OffDisabled by the setting parameter
Operation.
Each zone can be set to Non-directional, Forward or Reverse by setting the parameter DirModeSel.
The operation for phase-to- ground and phase-to-phase fault can be individually switched Enabled
and Disabled by the setting parameter OpModePG and OpModePP.
For critical applications such as for lines with high SIRs as well as CVTs, it is possible to improve
the security by setting the parameter ReachMode to Underreach. In this mode the reach for faults
close to the zone reach is reduced by 20% and the filtering is also introduced to increase the
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Technical manual
accuracy in the measuring. If the ReachMode is set to Overreach no reduction of the reach is
introduced and no extra filtering introduced. The latter setting is recommended for overreaching
pilot zone, zone 2 or zone 3 elements and reverse zone where overreaching on transients is not a
major issue either because of less likelihood of overreach with higher settings or the fact that
these elements do not initiate tripping unconditionally.
The offset Mho characteristic can be set in Non-directional, Forward or Reverse by the setting
parameter OffsetMhoDir. When Forward or Reverse is selected a directional line is introduced.
Information about the directional line is given from the directional element and given to the
measuring element as binary coded signal to the input DIRCND.
The zone reach for phase-to- ground fault and phase-to-phase fault is set individually in polar
coordinates.
The impedance is set by the parameters ZPG and ZPP and the corresponding angles by the
parameters ZAngPG and ZAngPP.
Compensation for ground-return path for faults involving ground is done by setting the parameter
KNMag and KNAng where KNMag is the magnitude of the ground-return path and KNAng is the
difference of angles between KNMag and ZPG.
Z0-Z1
KNMag =
3 × Z1
KNAng = ang
( Z 0 - Z1
3 × Z1
)
where
Z0 is the complex zero sequence impedance of the line in Ω/phase
Z1 is the complex positive sequence impedance of the line in Ω/phase
The phase-to-ground and phase-to-phase measuring loops can be time delayed individually by
setting the parameter tPG and tPP respectively. To release the time delay, the operation mode for
the timers, OpModetPG and OpModetPP, has to be set to On. This is also the case for
instantaneous operation.
The operate timers triggering input depends on the parameter ZnTimerSel setting. The parameter
ZnTimerSel can be set to:
• Timers separated: Phase-to-ground and phase-to-phase timers are triggered by the

respective measuring loop pickup signals.
• Timers linked: Start of any of the phase-to-ground or phase-to-phase loops will trigger both
the phase-to-ground or phase-to-phase timers.
• Internal start: Phase-to-ground and phase-to-phase timers are triggered by the INTRNST
input.
• Start from PhSel: The phase-to-ground and phase-to-phase timers are triggered by the STCND
and LDCND inputs. Each of the two inputs consist binary status information related to the six
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Technical manual
measuring loops. Hence if any of the measuring loop status is high in both two inputs STCND
and LDCND, then the timers will be triggered. In case when LoadEnchMode is off then only
STCND enables the timer.
It is not recommended to use this timer setting for the Zone instance where
LoadEnchMode is off.
• External start: Phase-to-ground and phase-to-phase timers are triggered by the EXTNST input.
The function can be blocked in the following ways:
• activating of input BLOCK blocks the whole function

• activating of the input BLKZ (fuse failure) blocks all output signals
• activating of the input BLKZMTD blocks the delta based time domain algorithm
• activating of the input BLKHSIR blocks the high speed part of the algorithm for high SIR
values
• activating of the input BLKTRIP blocks all output signals
• activating the input BLKPG blocks the phase-to-ground fault loop outputs
• activating the input BLKPP blocks the phase-to-phase fault loop outputs
The activation of input signal BLKZ can be made by external fuse failure function or from the loss
of voltage check in the Mho supervision logic (ZSMGAPC). In both cases the output BLKZ in the
Mho supervision logic shall be connected to the input BLKZ in the Mho distance function block
(ZMHPDIS, 21)
The input signal BLKZMTD is activated during some ms after fault has been detected by ZSMGAPC
to avoid unwanted operations due to transients. It shall be connected to the BLKZMTD output
signal of ZSMGAPC function.
At SIR values >10, the use of electronic CVT might cause overreach due to the built-in resonance
circuit in the CVT, which reduce the secondary voltage for a while. The input BLKHSIR is connected
to the output signal HSIR on ZSMGAPC for increasing of the filtering and high SIR values. This is
valid only when permissive underreach scheme is selected by setting ReachMode=Underreach.
7.4.6.4 Theory of operation SEMOD154224-46 v6
The mho algorithm is based on the phase comparison of an operating phasor and a polarizing
phasor. When the operating phasor leads the reference polarizing phasor by 90 degrees or more,
the function operates and gives a trip output.
Phase-to-phase fault SEMOD154224-240 v2
Mho SEMOD154224-217 v5
The plain Mho circle has the characteristic as in Figure 114. The condition for deriving the angle β is
according to equation 40.
b = ang (V AB - I AB × ZPP ) - ang (V pol )

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Technical manual
where
V AB is the voltage vector difference between phases A and B

V1 EN-US
EQUATION1790-ANSI
I AB is the current vector difference between phases A and B

EQUATION1791-ANSI
V1 EN-US
ZPP is the positive sequence impedance setting for phase-to-phase fault

Vpol is the polarizing voltage
The polarized voltage consists of 100% memorized positive sequence voltage (VAB for phase A to
B fault). The memorized voltage will prevent collapse of the Mho circle for close in faults.
Operation occurs if 90≤β≤270
IAB·X
Vcomp=VAB - IAB × ZPP
I AB × ZPP
ß
V pol
V AB
IAB·R
en07000109_ansi.vsd
Figure 114: Simplified mho characteristic and vector diagram for phase A-to-B fault
Offset Mho SEMOD154224-242 v4

The characteristic for offset mho is a circle where two points on the circle are the setting
parameters ZPP and ZRevPP. The vector ZPP in the impedance plane has the settable angle
AngZPP and the angle for ZRevPP is AngZPP+180°.
The condition for operation at phase-to-phase fault is that the angle β between the two
compensated voltages Vcomp1 and Vcomp2 is greater than or equal to 90° (figure 115). The angle
will be 90° for fault location on the boundary of the circle.
The angle β for A-to-B fault can be defined according to equation 41.
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Technical manual
æ ö
V -IAB × ZPP
b = arg ç ÷
è V -(-IAB × ZRevPP) ø
where
V is the VAB voltage

ZRevPP is the positive sequence impedance setting for phase-to-phase fault in reverse direction
IABjX
V comp1 = VAB - IAB • ZPP

I AB • ZPP
V ·
Vcomp2 = V =IF·ZF =VAB
IABR
- I AB • Z Re vPP
en07000110_ansi.vsd
Figure 115: Simplified offset mho characteristic and voltage vectors for phase A-to-B fault.
Operation occurs if 90≤β≤270.
Offset mho, forward direction SEMOD154224-249 v4

When forward direction has been selected for the offset mho, an extra criteria beside the one for
offset mho (90<β<270) is introduced, that is the angle φ between the voltage and the current
must lie between the blinders in second quadrant and fourth quadrant. See figure 116. Operation
occurs if 90≤β≤270 and ArgDir≤φ≤ArgNegRes.
where
ArgDir is the setting parameter for directional line in fourth quadrant in the directional
element, ZDMRDIR (21D).
ArgNegRes is the setting parameter for directional line in second quadrant in the directional
β is calculated according to equation
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Technical manual
The directional information is brought to the mho distance measurement from the mho
directional element as binary coded information to the input DIRCND. See Directional impedance
element for mho characteristic (ZDMRDIR ,21D) for information about the mho directional
element.
IABjX
ZPP
VAB
ArgNegRes f
IAB
ArgDir
en07000111_ansi
Figure 116: Simplified offset mho characteristic in forward direction for phase A-to-B fault
Offset mho, reverse direction SEMOD154224-265 v4

The operation area for offset mho in reverse direction is according to figure 117. The operation
area in second quadrant is ArgNegRes+180°.
Operation occurs if 90≤β≤270 and 180° - ArgDir ≤φ ≤ ArgNegRes + 180°
The β is derived according to equation for the mho circle and φ is the angle between the voltage
and current.
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Technical manual
ZPP
ArgNegRes
ϕ
IAB
ArgDir R
VAB
ZRevPP
en06000469_ansi.ep
Figure 117: Operation characteristic for reverse phase A-to-B fault
Phase-to-ground fault SEMOD154224-283 v2
Mho SEMOD154224-120 v5
The measuring of ground faults uses ground-return compensation applied in a conventional way.
The compensation voltage is derived by considering the influence from the ground-return path.
For a ground fault in phase A, the compensation voltage Vcomp can be derived, as shown in Figure
118.
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Technical manual
Vcomp = V pol - I A × Z loop

where
Vpol is the polarizing voltage (memorized VA for Phase A-to- ground
fault)
Zloop is the loop impedance, which in general terms can be expressed
as
(
Z1+ZN = Z 1 × 1 + KN )
where
Z1 is the positive sequence impedance of the line (Ohm/phase)
KN is the zero-sequence compensator factor
The angle β between the Vcomp and the polarize voltage Vpol for a A-to-ground fault is
( )
b = arg é V A - I A + IN × KN × ZPE ù - arg(Vpol)
ë û
where
VA is the phase voltage in faulty phase A
IA is the phase current in faulty phase A
IN is the zero-sequence current in faulty phase A (3I0)
KN Z0-Z1
3 × Z1
the setting parameter for the zero sequence compensation
consisting of the magnitude KN and the angle KNAng.
Vpol is the 100% of positive sequence memorized voltage VA
246
Technical manual
IA·X
IA·ZN
V comp
I A • Z loop
IA·ZPE
Vpol
f
IA (Ref) IA·R
en06000472_ansi.vsd
Figure 118: Simplified offset mho characteristic and vector diagram for phase A-to-ground
fault
Offset mho SEMOD154224-309 v5

The characteristic for offset mho at ground fault is a circle containing the two vectors from the
origin ZPE and ZRevPE where ZPE and ZrevPE are the setting reach for the positive sequence
impedance in forward respective reverse direction. The vector ZPE in the impedance plane has the
settable angle AngZPE and the angle for ZRevPP is AngZPE+180°.
The condition for operation at phase-to-ground fault is that the angle β between the two
compensated voltages Vcomp1 and Vcomp2 is greater or equal to 90° see figure 119. The angle will
be 90° for fault location on the boundary of the circle.
The angle β for A-to-ground fault can be defined as
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Technical manual
IAB•jX
V comp1 = VA - IA • ZPE
IA • ZPE
VA
V comp2 = VA - (-IA • ZRevPE)
I AB • R
- IA • Z RevPe
en 06000465_ansi. vsd
Figure 119: Simplified offset mho characteristic and voltage vector for phase A-to-ground
fault
Offset mho, forward direction SEMOD154224-327 v3

In the same way as for phase-to-phase fault, selection of forward direction of offset mho will
introduce an extra criterion for operation. Beside the basic criteria for offset mho according to
equation and 90≤β≤270, also the criteria that the angle φ between the voltage and the current
must lie between the blinders in second and fourth quadrant. See figure 120. Operation occurs if
90≤β≤270 and ArgDir≤φ≤ArgNegRes.
where
ArgDir is the setting parameter for directional line in fourth quadrant in the directional
ArgNegRes is the setting parameter for directional line in second quadrant in the directional
β is calculated according to equation
248
Technical manual
IA jX
VA
ArgNegRes f
IA IA·R
ArgDir
en 06000466_ansi.vsd
Figure 120: Simplified characteristic for offset mho in forward direction for A-to-ground fault
Offset mho, reverse direction SEMOD154224-341 v4

In the same way as for offset in forward direction, the selection of offset mho in reverse direction
will introduce an extra criterion for operation compare to the normal offset mho. The extra is that
the angle between the fault voltage and the fault current shall lie between the blinders in second
and fourth quadrant. The operation area in second quadrant is limited by the blinder defined as
180° -ArgDir and in fourth quadrant ArgNegRes+180°, see figure 121.
The conditions for operation of offset mho in reverse direction for A-to-ground fault is 90≤β≤270
and 180°-Argdir≤φ≤ArgNegRes+180°.
The β is derived according to equation for the offset mho circle and φ is the angle between the
voltage and current.
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Technical manual
ZPE
ArgNegRes
ϕ
IA
ArgDir R
VA
ZRevPE
en06000470_ansi.ep
Figure 121: Simplified characteristic for offset mho in reverse direction for A-to-ground fault
7.4.6.5 Simplified logic diagrams GUID-22B4A410-6F8E-4569-A354-51A1F4951F79 v3
Distance protection zones

The ZMHPDIS (21) function block is used in the IED for each zone.
selection with load encroachment function FMPSPDIS (21) within the IED, which are converted
within the zone measuring function into corresponding boolean expressions for each condition
separately. Input signal PHSEL is connected from FMPSPDIS (21) function output signal PHSCND.
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Technical manual
zone measurement function filters out the relevant signals depending on the setting of the
parameter DirMode. Input signal DIRCND must be configured to the STDIRCND output signal on
ZDMRDIR (21D) function.
OffsetMhoDir=
Non-directional
AND AND
DirMode=Offset
PHSEL T
AND F
AND
LoadEnchMode=
On/Off
LDCND
T
True F
AND Release
DIRCND
OffsetMhoDir=
Forward/Reverse
AND
DirMode=
Forward/Reverse
BLKZ
BLOCK OR
Figure 122: Simplified logic for release start signal

When load encroachment mode is switched on (LoadEnchMode=On), start signal PHSEL is also
checked against LDCND signal.
Results of the directional measurement enter the logic circuits when the zone operates in
Composition of the phase pickup signals is presented in figure 123.
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Technical manual
Release PHG_FLT
OR
AND
PU_AG PU_A
OR
AND
PU_BG
AND
PU_CG
PU_B
OR
AND
PU_AB
AND
PU_BC
PU_C
OR
AND
PU_CA
PICKUP
OR
PHPH_FLT
OR
Figure 123: Composition of pickup signals

Timer tPP=On
AND 0-tPP
PHPH_FLT 0
OR
Timer tPG=On
AND 0-tPG
PHG_FLT 0
BLKTRIP AND 0 TRIP

15 ms
TR_A
PU_A AND
TR_B
PU_B AND
TR_C
PU_C AND
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Technical manual
Zone timer logic for the distance protection is symbolically presented in figure 125.
STPE
BLOCK
TRPE
&
tON
& ³1 t
Internal
a
a=b
start b STTIMER
&
Internal
a
a<b
start b
tON
³1 t && TRPP
&
STPP
ZnTimerSel
FALSE 1 timers seperated
³1 2 timers linked
internalCommonStart
3 internal start
phSelStart 4 start from phSel
externalCommonStart
5 external start
Figure 125: Zone timer logic
SEMOD173242-2 v13
Table 135: ZMHPDIS (21) technical data

Number of zones, phase-to- Max 5 with selectable -
ground direction
Minimum trip current (10–30)% of IBase -
Positive sequence impedance, (0.005–3000.000) W/phase ±2.0% static accuracy
phase-to-ground loop Conditions:
Voltage range: (0.1-1.1) x Vn
Positive sequence impedance (10–90) degrees
angle, phase-to-ground loop
Angle: 85 degrees
Reverse reach, phase-to- (0.005–3000.000) Ω/phase
ground loop (Magnitude)
Magnitude of ground return (0.00–3.00)
compensation factor KN
Angle for ground (-180–180) degrees
compensation factor KN
measured with CVT’s and
0.5<SIR<30
operation
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Technical manual

Reset time at 0.5 to 1.5 x Min. = 30 ms -
Zreach Max. = 45 ms
7.5 Full-scheme distance protection, quadrilateral for earth

faults ZMMPDIS (21), ZMMAPDIS (21) SEMOD154561-1 v2
SEMOD154542-2 v2

Fullscheme distance protection, ZMMPDIS 21
quadrilateral for earth faults (zone 1)
S00346 V1 EN-US
Fullscheme distance protection, ZMMAPDIS 21

quadrilateral for earth faults (zone
2-5)
S00346 V1 EN-US
protection function with three fault loops for phase-to-ground fault for each of the independent
zones. Individual settings for each zone resistive and reactive reach give flexibility for use on
overhead lines and cables of different types and lengths.
The Full-scheme distance protection, quadrilateral for earth fault functions have functionality for
load encroachment, which increases the possibility to detect high resistive faults on heavily loaded
lines , see Figure 126.
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Technical manual
Forward
operation
Reverse
operation
en05000034.vsd
Figure 126: Typical quadrilateral distance protection zone with Phase selection, quadrilateral
characteristic with settable angle function FRPSPDIS (21) activated
reliable built in phase selection makes the function suitable in applications with single phase auto-
reclosing.
Built-in adaptive load compensation algorithm prevents overreaching of zone1 at load exporting
end at phase to ground faults on heavily loaded power lines.
ZMMPDIS (21)
I3P* TRIP
V3P* TR_A
BLOCK TR_B
BLKZ TR_C
BLKTR PICKUP
PHSEL PU_A
DIRCND PU_B
PU_C
PHPUND
Figure 127: ZMMPDIS (21) function block
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Technical manual
ZMMAPDIS (21)
I3P* TRIP
V3P* TR_A
BLOCK TR_B
BLKZ TR_C
BLKTR PICKUP
PHSEL PU_A
DIRCND PU_B
PU_C
PHPUND
Figure 128: ZMMAPDIS (21) function block
7.5.4 Signals
Table 136: ZMMPDIS (21) Input signals

SIGNAL
SIGNAL
BLKZ BOOLEAN 0 Blocks all output for LOV (or fuse failure) condition
Table 137: ZMMPDIS (21) Output signals

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Technical manual
Table 138: ZMMAPDIS (21) Input signals

SIGNAL
SIGNAL
Table 139: ZMMAPDIS (21) Output signals

7.5.5 Settings
Table 140: ZMMPDIS (21) Group settings (basic)

Enabled
Forward Forw / Rev
Reverse
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Technical manual

Enabled timer, Ph-G
to-ground loops
Phase-Ground loops
Table 141: ZMMPDIS (21) Non group settings (basic)

groups
Table 142: ZMMAPDIS (21) Group settings (basic)

Enabled
Forward Forw / Rev
Reverse
Enabled timer, Ph-G
to-ground loops
Table 143: ZMMAPDIS (21) Non group settings (basic)

groups
258
Technical manual
The different fault loops within the IED are operating in parallel in the same principle as a full
scheme measurement.
Figure 129 presents an outline of the different measuring loops for the basic five, impedance-
measuring zones l.
A-G B-G C-G Zone 1
A-G B-G C-G Zone 2
A-G B-G C-G Zone 3
A-G B-G C-G Zone 4
A-G B-G C-G Zone 5
en07000080_ansi.vsd
Figure 129: The different measuring loops at line-ground fault and phase-phase fault.
The distance measuring zone include three impedance measuring loops; one fault loop for each
phase.
characteristics presented in Figure 130. The characteristic is illustrated with the full loop reach.
259
Technical manual
X (Ohm/loop)
RFPG R1+Rn RFPG
X0-X1
Xn =
3
X1+Xn R0-R1
Rn =
3
jn jn
R (Ohm/loop)
RFPG RFPG
X1+Xn
RFPG R1+Rn RFPG
Figure 130: Characteristic for the phase-to-ground measuring loops, ohm/loop domain.
The fault loop reach may also be presented as in Figure 131.
IA R1 + j X1
Phase-to-ground
VA
element
Phase-to-ground
(Arc + tower
resistance)
0
IN (R0-R1)/3 +
j (X0-X1)/3 ) en06000412_ansi.vsd

The R1 and jX1 in Figure 131 represent the positive sequence impedance from the measuring point
to the fault location. The RFPG is presented in order to “convey” the fault resistance reach.
The zone may be set to operate in , , Disabled or direction through the setting OperationDir. The
result from respective set value is illustrated in Figure 132. The impedance reach is symmetric, in
the sense that it is conform for forward and reverse direction. Therefore, all reach settings apply
to both directions.
260
Technical manual
X X X
R R R
Figure 132: Directional operating modes of the distance measuring zone
7.5.6.3 Minimum operating current SEMOD154546-36 v2
The operation of the distance measuring zone is blocked if the magnitude of input currents fall
below certain threshold values.
sum of the three phase currents, that is, residual current 3I0.
Both current limits IMinPUPG and IMinOpIR are automatically reduced to 75% of
regular set values if the zone is set to operate in reverse direction, that is, =.
7.5.6.4 Measuring principles SEMOD154546-46 v3
Apparent impedances are calculated and compared with the set limits.
Here V and I represent the corresponding voltage and current phasors in the respective phase A, B
or C.
The calculation of the apparant impedances at phase-to-ground fault follow equation 45
The ground return compensation applies in a conventional manner.
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Technical manual
VA
Z app =
IA + I N × KN
Where:
VA, IA and IN are the phase voltage, phase current and residual current present to the IED
KN is defined as:
Z 0 - Z1
KN =
3 × Z1
Z 0 = R 0 + jX 0
Z 1 = R1 + jX 1
Where
The formula given in equation 45 is only valid for no loaded radial feeder applications. When load is
considered in the case of single phase-to-ground fault, conventional distance protection might
overreach at exporting end and underreach at importing end. IED has an adaptive load
filter.
262
Technical manual
X Di
V =R× i + ×
w0 Dt
X D Re (I )
Re (V ) = R × Re (I ) + ×
w0 Dt
X D Im (I )
Im (V ) = R × Im (I ) + ×
w0 Dt
with
w0 = 2 × p × f 0
where:
voltage and substitute it in the equation for the imaginary part. The equation for the Xm measured
reactance can then be solved. The final result is equal to:

Rm =
Re (V) × lm(I) - lm(V ) × Re (I)

X m = w0 × D t ×
factors.
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Technical manual
the IED point.
7.5.6.5 Directionality SEMOD154546-97 v3
The evaluation of the directionality takes place in the Directional impedance element for mho
characteristic ZDMRDIR (21D) function. Equation 52 is used to classify that the fault is in forward
direction for line-to-ground fault.
0.85 × V 1A + 0.15 × V 1 AM
- AngDir < Ang < AngNeg Re s
IA
where:
-15 degrees) and
(see figure 133) and it should not be changed unless system studies have shown the necessity.
ZDMRDIR (21D) gives a binary coded signal on the output STDIRCND depending on the evaluation
where FWD_A=1 adds 1, REV_A=1 adds 2, FWD_B=1 adds 4 etc.
264
Technical manual
AngNegRes
AngDir
R
en05000722_ansi.vsd
Figure 133: Setting angles for discrimination of forward and reverse fault
degrees.
The polarizing voltage is available as long as the positive-sequence voltage exceeds 5% of the set
close-in faults.
After 100 ms, the following occurs:
7.5.6.6 Simplified logic diagrams SEMOD154548-4 v1
Distance protection zones SEMOD154548-6 v3

The design of distance protection zone 1 is presented for all measuring phase-to-ground loops.
Phase-to-ground related signals are designated by AG, BG and CG.
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Technical manual
The PHSEL input signal represents a connection of six different integer values from the phase
selection function within the IED, which are converted within the zone measuring function into
corresponding boolean expressions for each condition separately. It is connected to the Phase
selection with load enchroachment, quadrilateral characteristic (FDPSPDIS,21) function output
STCNDZ.
zone measurement function filter out the relevant signals on the DIRCND input depending on the
setting of the parameter OperationDir. It shall be configured to the DIRCND output on the
Directional impedance element for mho characteristic (ZDMRDIR,21D) function.
PHSEL
AND NDIR_A
AG
AND NDIR_B
BG
NDIR_C
CG AND
OR NDIR_G
OR
LOVBZ PHPUND
OR AND
BLOCK
BLK
en06000408_ansi.vsd
Figure 134: Conditioning by a group functional input signal PHSEL

266
Technical manual
NDIR_A PU_A
AND 0
15 ms
NDIR_B
PU_B
AND 0
15 ms
NDIR_C PU_C
AND 0
15 ms
AND 0 PICKUP
OR 15 ms
BLK
en06000409_ansi.vsd

directional (forward or reverse) mode, see figure 136.
NDIR_A
DIR_A AND
OR PU_2MPG
NDIR_B &
DIR_B AND
NDIR_C PU_A
& 0
DIR_C AND 15 ms
0
PU_B
&
15 ms
PU_C
& 0
15 ms
BLK
OR 0
PICKUP
&
15 ms
en07000081_ansi.vsd

267
Technical manual
Timer tPG=Enable
AND 0-tPG
PUZMPG 0
TRIP
BLKTR AND 0
15 ms
TR_A
PU_A AND
TR_B
PU_B AND
TR_C
PU_C AND
en07000082_ansi.vsd
Figure 137: Tripping logic for the distance protection zone one

SEMOD173249-2 v7
Table 144: ZMMPDIS (21) technical data

direction
Minimum trip current (10-30)% of IBase -
Positive sequence reactance (0.50-3000.00) W/phase ±2.0% static accuracy
Zero sequence resistance (0.50-3000.00) Ω/phase Angle: at 0 degrees and 85 degrees
Fault resistance, phase- (1.00-9000.00) W/loop
ground
Dynamic overreach <5% at 85 degrees measured -
with CCVT’s and 0.5<SIR<30
operation
Reset time at 0.1 to 2 x Zreach Min. = 20 ms -
Max. = 35 ms
268
Technical manual
7.6 Directional impedance element for mho characteristic

and additional distance protection directional function
for earth faults ZDMRDIR (21D), ZDARDIR SEMOD154813-1 v3
SEMOD155886-2 v2

Directional impedance element for ZDMRDIR 21D
mho characteristic
S00346 V1 EN-US
GUID-39299546-12A2-4D9D-86D0-A33F423944E4 v2

Additional distance protection ZDARDIR -
directional function for earth faults
S00346 V1 EN-US
The phase-to-ground impedance elements can be supervised by a phase unselective directional

function based on symmetrical components (option).
ZDMRDIR (21D)
I3P* DIR_CURR
V3P* DIR_VOLT
DIR_POL
PUFW
PUREV
STDIRCND
Figure 138: ZDMRDIR (21D) function block

SEMOD155560-4 v3
ZDARDIR
I3P* FWD_G
V3P* REV_G
I3PPOL* DIREFCND
DIRCND
Figure 139: ZDARDIR function block
269
Technical manual
7.6.4 Signals
Table 145: ZDMRDIR (21D) Input signals

SIGNAL
SIGNAL
Table 146: ZDMRDIR (21D) Output signals

CURR GROUP SIGNAL Group signal for current signals to Mho function
VOLT GROUP SIGNAL Group signal for voltage signals to Mho function
POL GROUP SIGNAL Group signal for polarization voltage signals to Mho function
PUFW BOOLEAN Pickup in forward direction
PUREV BOOLEAN Pickup in reverse direction
Table 147: ZDARDIR Input signals

I3P GROUP - Current signals
SIGNAL
V3P GROUP - Voltage signals
SIGNAL
I3PPOL GROUP - Polarisation current signals
SIGNAL
DIRCND INTEGER 0 Binary coded directional signal
Table 148: ZDARDIR Output signals

FWD_G BOOLEAN Forward start signal from phase-to-ground directional element
REV_G BOOLEAN Reverse start signal from phase-to-ground directional element
DIREFCND INTEGER Pickuo direction Binary coded
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Technical manual
7.6.5 Settings
Table 149: ZDMRDIR (21D) Group settings (basic)

DirEvalType Impedance - - Comparator Directional evaluation mode Impedance /
Comparator Comparator
Imp/Comp
forward direction
forward direction
to-ground loops
Phase-Phase loops
Table 150: ZDMRDIR (21D) Non group settings (basic)

groups
Table 151: ZDARDIR Group settings (basic)

PolMode -3U0 - - -3U0 Polarization quantity for opt dir function
-V2 for P-G faults
IPol
Dual
-3U0Comp
-V2comp
AngleRCA -90 - 90 Deg 1 75 Characteristic relay angle (= MTA or base
angle)
IPickup 5 - 200 %IB 1 5 Minimum operation current in % of IBase
VPolPU 4 - 100 %VB 1 4 Minimum polarizing voltage in % of VBase
IPolPU 5 - 100 %IB 1 10 Minimum polarizing current in % of IBase
Table 152: ZDARDIR Group settings (advanced)

AngleOp 90 - 180 Deg 1 160 Operation sector angle
Kmag 0.50 - 3000.00 Ohm 0.01 40.00 Boost-factor in -V0comp and -V2comp
polarization
271
Technical manual
Table 153: ZDARDIR Non group settings (basic)

groups

Table 154: ZDMRDIR (21D) Monitored data

2=Reverse
0=No direction
2=Reverse
0=No direction
2=Reverse
0=No direction
7.6.7.1 Directional impedance element for mho characteristic ZDMRDIR (21D) SEMOD154817-5 v7
The evaluation of the directionality takes place in Directional impedance element for mho
characteristic (ZDMRDIR ,21D). Equation 53 and equation 54 are used to classify that the fault is in
the forward direction for phase-to-ground fault and phase-to-phase fault respectively.
0.85 × V 1A + 0.15 × V 1 AM
IA
0.85 × V 1 AB + 0.15 × V 1 ABM

IAB
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Technical manual
Where:
AngDir Setting for the lower boundary of the forward directional characteristic, by
default set to 15 (= -15 degrees)
AngNegRes Setting for the upper boundary of the forward directional characteristic, by
default set to 115 degrees, see figure 140 for mho characteristics.
V1A Positive sequence phase voltage in phase A
V1AM Positive sequence memorized phase voltage in phase A
IA Phase current in phase A
V1AB Voltage difference between phase A and B (B lagging A)
V1ABM Memorized voltage difference between phase A and B (B lagging A)
IAB Current difference between phase A and B (B lagging A)
The default settings for AngDir and AngNegRes are 15 (= -15) and 115 degrees respectively (see
figure 140) and they should not be changed unless system studies show the necessity.
If one sets DirEvalType to Comparator (which is recommended when using the mho characteristic)
then the directional lines are computed by means of a comparator-type calculation, meaning that
the directional lines are based on mho-circles (of infinite radius). The default setting value
Impedance otherwise means that the directional lines are implemented based on an impedance
calculation equivalent to the one used for the quadrilateral impedance characteristics.
When Directional impedance element for mho characteristic (ZDMRDIR) is used

together with Fullscheme distance protection, mho characteristic (ZMHPDIS) the
following settings for parameter DirEvalType is vital:
• alternative Comparator is strongly recommended

• alternative Imp/Comp should generally not be used
• alternative Impedanceshould not be used. This altenative is intended for use
together with Distance protection zone, quadrilateral characteristic
(ZMQPDIS)
X
Zset reach point
AngNegRes
-AngDir R
-Zs
en06000416_ansi.vsd
Figure 140: Setting angles for discrimination of forward fault
273
Technical manual
degrees.
The code built up for release of the measuring fault loops is as follows: STDIRCND = AN*1 + BN*2 +
CN*4 + AB*8 + BC*16 + CA*32
Example: If only ANpickup, the value is 1, if pickup in AN and CN are detected, the value is 1+4=5.
base voltage VBase, thus the directional element can use it for all unsymmetrical faults including
close-in faults.
The memory voltage is used for 100ms or until the positive sequence voltage is restored. After
100ms, the following occurs:
• If the current is still above the set value of the minimum operating current the condition seals
in.
• If the fault has caused tripping, the trip continues.
• If the current decreases below the minimum operate value, no directional indications will be
given until the positive sequence voltage exceeds 10% of its rated value.
The Directional impedance element for mho characteristic (ZDMRDIR ,21D) function has the
following output signals:
The STDIRCND output provides an integer signal that depends on the evaluation and is derived
from a binary coded signal as follows:
bit 11 bit 10 bit 9 bit 8 bit 7 bit 6

(2048) (1024) (512) (256) (128) (64)
REV_CA1=1 REV_BC=1 REV_AB=1 REV_C=1 REV_B=1 REV_A=1
bit 5 bit 4 bit 3 bit 2 bit 1 bit 0
(32) (16) (8) (4) (2) (1)
FWD_CA=1 FWD_BC=1 FWD_AB=1 FWD_C=1 FWD_B=1 FWD_A=1
The PUFW output is a logical signal with value 1 or 0. It is made up as an OR-function of all the
forward starting conditions, that is, FWD_A, FWD_B, FWD_C, FWD_AB, FWD_BC and RWD_CA. The
PUREV output is similar to the PUFW output, the only difference being that it is made up as an OR-
function of all the reverse starting conditions, that is, REV_A, REV_B, REV_C. REV_AB, REV_BC and
REV_CA.
7.6.7.2 Additional distance protection directional function for ground faults

ZDARDIR SEMOD154933-95 v5
A Mho element needs a polarizing voltage to operate. The positive-sequence memory-polarized

elements are generally preferred. The benefits include:
274
Technical manual
• The greatest amount of expansion for improved resistive coverage. These elements always
expand back to the source.
• Memory action for all fault types. This is very important for close-in three-phase faults.
• A common polarizing reference for all six distance-measuring loops. This is important for
single-pole tripping, during a pole-open period.
There are however some situations that can cause security problems like reverse phase to phase
faults and double phase-to-ground faults during high load periods. To solve these, additional
directional element is used.
For phase-to-ground faults, directional elements using sequence components are very reliable for
directional discrimination. The directional element can be based on one of following types of
polarization:
• Zero-sequence voltage
• Negative-sequence voltage
• Zero-sequence current
These additional directional criteria are evaluated in the Additional distance protection directional
function for ground faults (ZDARDIR).
Zero-sequence voltage polarization is utilizing the phase relation between the zero-sequence
voltage and the zero-sequence current at the location of the protection. The measurement
principle is illustrated in figure 141.
- 3V 0
AngleOp
AngleRCA
3I0
en06000417_ansi.vsd
Figure 141: Principle for zero-sequence voltage polarized additional directional element
Negative-sequence voltage polarization is utilizing the phase relation between the negative-
sequence voltage and the negative-sequence current at the location of the protection.
Zero-sequence current polarization is utilizing the phase relation between the zero-sequence
current at the location of the protection and some reference zero-sequence current, for example,
the current in the neutral of a power transformer.
The principle of zero-sequence voltage polarization with zero-sequence current compensation is

described in figure 142. The same also applies for the negative-sequence function.
275
Technical manual
Z0 SA I0 I0
Z0 Line Z0SB
Characteristic
angle
V0 V0
K*I0
V0 + K*I0
IF
en06000418_ansi.vsd
Figure 142: Principle for zero sequence compensation

Note that the sequence based additional directional element cannot give per phase information
about direction to fault. This is why it is an AND-function with the normal directional element that
works on a per phase base. The enable signals are per phase and to enable the measuring element
in a specific phase, both the additional directional element and the normal directional element, for
that phase must indicate correct direction.
These polarization quantities, voltage and current, are stabilized against minimum polarizing
voltage (UPOL>) and current (IPOL>). That means if polarizing voltage is greater than UPOL>
setting, and if polarizing current is greater than IPol>, then only they are used for direction
determination.
Normal
directional Release of distance
element measuring element
A, B, C A, B, C
AND
Additional
directional AND per
element phase
en06000419_ansi.vsd
Figure 143: Ground distance element directional supervision
7.7 Mho impedance supervision logic ZSMGAPC SEMOD153841-1 v3
GUID-030C086A-8301-481E-BA0A-6550A9C1482E v2

Mho Impedance supervision logic ZSMGAPC - -
276
Technical manual
The Mho impedance supervision logic (ZSMGAPC) includes features for fault inception detection
and high SIR detection. It also includes the functionality for loss of potential logic as well as for the
pilot channel blocking scheme.
ZSMGAPC can mainly be decomposed in two different parts:
1. A fault inception detection logic

2. High SIR detection logic
ZSMGAPC
I3P* BLKZMTD
V3P* BLKCHST
BLOCK CHSTOP
REVSTART HSIR
BLOCKCS
CBOPEN
Figure 144: ZSMGAPC function block
7.7.4 Signals
Table 155: ZSMGAPC Input signals

I3P GROUP - Three phase current samples and DFT magnitude
SIGNAL
V3P GROUP - Three phase phase-neutral voltage samples and DFT magnitude
SIGNAL
BLOCK BOOLEAN 0 Block of the function
REVSTART BOOLEAN 0 Indication of reverse start
BLOCKCS BOOLEAN 0 Blocks the blocking carrier signal to remote end
CBOPEN BOOLEAN 0 Indicates that the breaker is open
Table 156: ZSMGAPC Output signals

BLKZMTD BOOLEAN Block signal for blocking of time domain high speed mho
BLKCHST BOOLEAN Blocking signal to remote end to block overreaching zone
CHSTOP BOOLEAN Stops the blocking signal to remote end
HSIR BOOLEAN Indication of source impedance ratio above set limit
277
Technical manual
7.7.5 Settings
Table 157: ZSMGAPC Group settings (basic)

PilotMode Disabled - - Disabled Pilot mode Disable / Enable
Enabled
Zreach 0.1 - 3000.0 Ohm 0.1 38.0 Line impedance
IMinOp 10 - 30 %IB 1 20 Minimum operating current for SIR
measurement
Table 158: ZSMGAPC Group settings (advanced)

DeltaI 0 - 200 %IB 1 10 Current change level in % of IBase for fault
inception detection
Delta3I0 0 - 200 %IB 1 10 Zero seq current change level in % of IBase
DeltaV 0 - 100 %VB 1 5 Voltage change level in % of VBase for
fault inception detection
Delta3V0 0 - 100 %VB 1 5 Zero seq voltage change level in % of
UBase
SIRLevel 5 - 15 - 1 10 Settable level for source impedance ratio
Table 159: ZSMGAPC Non group settings (basic)

groups
7.7.6.1 Fault inception detection SEMOD153847-4 v5
The aim for the fault inception detector is to quickly detect that a fault has occurred in the system.
The fault detector detects a fault when there is a sufficient change in at least one current and at
the same time there is a sufficient change in at least one voltage. A change is defined roughly by
the difference between the present instantaneous value and the one from one power system cycle
before. The change is sufficient if it exceeds the related threshold value. DeltaI and DeltaV for
phase currents and voltages. Delta3I0 and Delta3V0 for residual current and voltage.
If the setting is set to Enabled in blocking scheme and the fault inception function has detected a
system fault, a block signal BLKCHST is issued and send to remote end in order to block the
overreaching zones. Different criteria has to be fulfilled for sending the BLKCHST signal:
278
Technical manual
1. The setting has to be set to Enabled

2. The breaker has to be closed, that is, the input signal CBOPEN should not be actived
3. A reverse fault should have been detected while the carrier send signal is not blocked, that is,
input signal REVSTART is activated and input signal BLOCKCS is not activated or a fault
inception is detected and input signal CSBLOCK is not activated.
If it is later detected that it was an internal fault that made the function issue the BLKCHST signal,
the function issues a CHSTOP signal to unblock the remote end. The criteria that have to be fulfilled
for this are:
1. The function has to be in pilot mode, that is, the setting has to be set to Enabled
2. The carrier send signal should be blocked, that is, input signal BLOCKCS is On and,
3. A reverse fault should not have been detected while the carrier send signal was not blocked,
that is, input REVSTART should not have been activated before BLOCKCS.
If loss of voltage is detected, but not a fault inception, the distance protection function is blocked.
This is also the case if a fuse failure is detected by the external fuse failure function and activate
the input FUSEFAIL. Those blocks are generated by activating the output BLKZ, which are
connected to the input BLKZ on the distance Mho function block.
During fault inception a lot of transients are developed which in turn might cause the distance
function to overreach. The Mho supervision logic (ZSMGAPC) increases the filtering during the
most transient period of the fault. This is done by activating the output BLKZMTD, which is
connected to the input BLKZMTD on mho distance function block.
High SIR detection SEMOD153847-22 v3

High SIR values increases the likelihood that CVT will introduce a prolonged and distorted
transient, increasing the risk for overreach of the distance function.
The SIR function calculates the SIR value as the source impedance divided by the setting Zreach
and activates the output signal HSIR if the calculated value for any of the six basic shunt faults
exceed the setting . The HSIR signal is intended to block the delta based mho impedance function.
7.8 Faulty phase identification with load encroachment

FMPSPDIS (21) SEMOD153819-1 v5
SEMOD155879-2 v3

Faulty phase identification with load FMPSPDIS 21
encroachment for mho
S00346 V1 EN-US
279
Technical manual
The ability to accurately and reliably classify different types of fault so that single phase tripping
and autoreclosing can be used plays an important roll in today's power systems.
The phase selection function is design to accurately select the proper fault loop(s) in the distance
function dependent on the fault type.
The heavy load transfer that is common in many transmission networks may in some cases
interfere with the distance protection zone reach and cause unwanted operation. Therefore the
function has a built in algorithm for load encroachment, which gives the possibility to enlarge the
resistive setting of the measuring zones without interfering with the load.
The output signals from the phase selection function produce important information about faulty
phase(s), which can be used for fault analysis as well.
FMPSPDIS
I3P* PU_A
V3P* PU_B
BLOCK PU_C
ZSTART PHG_FLT
TR3PH PHSCND
1POLEAR PLECND
DLECND
PICKUP
Figure 145: FMPSPDIS (21) function block
7.8.4 Signals
Table 160: FMPSPDIS (21) Input signals

I3P GROUP - Group signal for current
SIGNAL
V3P GROUP - Group signal for voltage
SIGNAL
Z_PICKUP BOOLEAN 0 Start from underimpdeance function
TR3PH BOOLEAN 0 Three phase tripping initiated
1POLEAR BOOLEAN 0 Single pole autoreclosing in progress
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Technical manual
Table 161: FMPSPDIS (21) Output signals

PU_A BOOLEAN Fault detected in phase A
PU_B BOOLEAN Fault detected in phase B
PU_C BOOLEAN Fault detected in phase C
PHG_FLT BOOLEAN Ground fault detected
PHSCND INTEGER Binary coded starts from phase selection
PLECND INTEGER Binary coded starts from ph sel with load encroachment
DLECND INTEGER Binary coded starts from load encroachment only
PICKUP BOOLEAN Indicates that something has picked up
7.8.5 Settings
Table 162: FMPSPDIS (21) Group settings (basic)

IMaxLoad 10 - 5000 %IB 1 200 Maximum load for identification of three
phase fault in % of IBase
RLd 1.00 - 3000.00 Ohm/p 0.01 80.00 Load encroachment resistive reach in
ohm/phase
LdAngle 5 - 70 Deg 1 20 Load encroachment inclination of load
angular sector
Table 163: FMPSPDIS (21) Group settings (advanced)

DeltaIMinOp 5 - 100 %IB 1 10 Delta current level in % of IBase
DeltaVMinOp 5 - 100 %VB 1 20 Delta voltage level in % of Vbase
V1Level 5 - 100 %VB 1 80 Pos seq voltage limit for identification of
3-ph fault
I1LowLevel 5 - 200 %IB 1 10 Pos seq current level for identification of 3-
ph fault in % of IBase
V1MinOp 5 - 100 %VB 1 20 Minimum operate positive sequence
voltage for ph sel
V2MinOp 1 - 100 %VB 1 5 Minimum operate negative sequence
voltage for ph sel
INRelPG 10 - 100 %IB 1 20 3I0 limit for release ph-g measuring loops
in % of max phase current
3I0BLK_PP 10 - 100 %IB 1 40 3I0 limit for blocking phase-to-phase
measuring loops in % of max phase
current
281
Technical manual
Table 164: FMPSPDIS (21) Non group settings (basic)

groups
7.8.6.1 The phase selection function SEMOD153832-4 v3
Faulty phase identification with load encroachment for mho (FMPSPDIS, 21) function can be
decomposed into six different parts:
1. A high speed delta based current phase selector

2. A high speed delta based voltage phase selector
3. A symmetrical components based phase selector
4. Fault evaluation and selection logic
5. A load encroachment logic
6. A blinder logic
The total function can be blocked by activating the input BLOCK.
Delta based current and voltages SEMOD153832-14 v5

The delta based fault detection function uses adaptive technique and is based on patent
US4409636.
The aim of the delta based phase selector is to provide very fast and reliable phase selection for
releasing of tripping from the high speed Mho measuring element and is essential to Directional
Comparison Blocking scheme (DCB), which uses Power Line Carrier (PLC) communication system
along the protected line.
The current and voltage samples for each phase passes through a notch filter that filters out the
fundamental components. Under steady state load conditions or when no fault is present, the
output of the filter is zero or close to zero. When a fault occurs, currents and voltages change
resulting in sudden changes in the currents and voltages resulting in non-fundamental waveforms
being introduced on the line. At this point the notch filter produces significant non-zero output.
The filter output is processed by the delta function. The algorithm uses an adaptive relationship
between phases to determine if a fault has occurred, and determines the faulty phases.
The current and voltage delta based phase selector gives a real output signal if the following
criterion is fulfilled (only phase A shown):
Max(ΔVA,ΔVB,ΔVC)>DeltaVMinOp
Max(ΔIA,ΔIB,ΔIC)>DeltaIMinOp
where:
ΔVA, ΔVB and ΔVC are the voltage change between sample t and sample t-1
DeltaVMinOp and are the minimum harmonic level settings for the voltage and
DeltaIMinOp current filters to decide that a fault has occurred. A slow evolving
fault may not produce sufficient harmonics to detect the fault;
however, in such a case speed is no longer the issue and the
sequence components phase selector will operate.
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Technical manual
The delta voltages ΔVA(B,C) and delta current ΔIA(B,C) are the voltage and current between
sample t and sample t-1.
The delta phase selector employs adaptive techniques to determine the fault type. The logic
determines the fault type by summing up all phase values and dividing by the largest value. Both
voltages and currents are filtered out and evaluated. The condition for fault type classification for
the voltages and currents can be expressed as:
å ( DVA, DVB , DVC )

FaultType =
Max ( DIA, DIB , DIC )
å ( DIA, DIB , DIC )

FaultType =
Max ( DIA, DIB , DIC )
The value of FaultType for different shunt faults are as follows:
Under ideal conditions: (Patent pending)

Single phase-to-ground; FaultType=1
Phase-to-phase fault FaultType=2
Three-phase fault; FaultType=3
The output signal is 1 for single phase-to-ground fault, 2 for phase-to-phase fault and 3 for three-
phase fault. At this point the filter does not know if ground was involved or not.
Typically there are induced harmonics in the non-faulted lines that will affect the result. This
method allows for a significant tolerance in the evaluation of FaultType over its entire range.
When a single phase-to-ground fault has been detected, the logic determines the largest quantity,
and asserts that phase. If phase-to-phase fault is detected, the two largest phase quantities will
be detected and asserted as outputs.
The faults detected by the delta based phase selector are coordinated in a separate block.
Different phases of faults may be detected at slightly different times due to differences in the
angles of incidence of fault on the wave shape. Therefore the output is forced to wait a certain
time by means of a timer. If the timer expires, and a fault is detected in one phase only, the fault is
deemed as phase-to-ground. This way a premature single phase-to-ground fault detection is not
released for a phase-to-phase fault. If, however, ground current is detected before the timer
expires, the phase-to-ground fault is released sooner.
If another phase picks up during the time delay, the wait time is reduced by a certain amount. Each
detection of either phase-to-ground or additional phases further reduce the initial time delay and
allow the delta phase selector output to be faster. There is no time delay if all three phases are
faulty.
The delta function is released if the input DELTAREL is activated at the same time as input
DELTABLK is not activated. Activating the DELTABLK input blocks the delta function. The release
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Technical manual
signal has an internal pulse timer of 100 ms. When the DELTAREL signal has disappeared the delta
logic is reset. In order not to get too abrupt change, the reset is decayed in pre-defined steps.
Symmetrical component based phase selector SEMOD153832-58 v3

The symmetrical component phase selector uses preprocessed calculated sequence voltages and
currents as inputs. It also uses sampled values of the phase currents. All the symmetrical
quantities mentioned further in this section are with reference to phase A.
The function is made up of four main parts:
A Detection of the presence of ground fault

B A phase-to-phase logic block based on V2/V1 angle relationship
C A phase-to-ground component based on patent US5390067 where the angle relationships

between V2/I0 and V2/V1 is evaluated to determine ground fault or phase- to-phase to
ground fault
D Logic for detection of three-phase fault
Presence of ground-fault detection SEMOD153832-70 v8

This detection of ground fault is performed in two levels, first by evaluation of the magnitude of
zero sequence current, and secondly by the evaluation of the zero and negative sequence voltage.
It is a complement to the ground-fault signal built-in in the Symmetrical component based phase
selector.
The complementary based zero-sequence current function evaluates the presence of ground fault
by calculating the 3I0 and comparing the result with the setting parameter INRelPE. The output
signal is used to release the ground-fault loop. It is a complement to the ground-fault signal built-
in in the sequence based phase selector. The condition for releasing the phase-to-ground loop is
as follows:
The output from this detection is used to release the ground-fault loop.
|3I0|>maxIph × INRelPE
where:
|3I0| is the magnitude of the zero sequence current 3I0
maxIph is the maximum magnitude of the phase currents

INRelPE is a setting parameter for the relation between the magnitude of 3I0 and the
maximum phase current
The ground-fault loop is also released if the evaluation of the zero sequence current by the main
sequence function meets the following conditions:
|3I0|>IBase × 0.5
|3I0|>maxIph ×INRelPG
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Technical manual
where:
maxIph is the maximal current magnitude found in any of the three phases
INRelPG is the setting of 3I0 limit for release of phase-to-ground measuring loop in % of
IBase
IBase is the global setting of the base current (A)
In systems where the source impedance for zero sequence is high the change of zero sequence
current may not be significant and the above detection may fail. In those cases the detection
enters the second level, with evaluation of zero and negative sequence voltage. The release of the
ground-fault loops can then be achieved if all of the following conditions are fulfilled:
|3V0|>|V2| × 0.5
|3V0|>V1| × 0.2
|V1|> VBase × 0.2/√(3)
and
3I0<0.1 × IBase
or
3I0<maxIph × INRelPG
where:
3V0 is the magnitude of the zero sequence voltage
V2 is the magnitude of the negative sequence voltage at the relay measuring point
k5 is design parameter
ILmax is the maximal phase current
IMinOp is the setting of minimum operate phase current in % of IBase
Phase-to-phase fault detection SEMOD153832-119 v2

The detection of phase-to-phase fault is performed by evaluation of the angle difference between
the sequence voltages V2 and V1.
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Technical manual
Figure 146: Definition of fault sectors for phase-to-phase fault

The phase-to-phase loop for the faulty phases will be determined if the angle between the
sequence voltages V2 and V1 lies within the sector defined according to figure 146 and the
following conditions are fulfilled:
|V1|>V1MinOP
|V2|>V2MinOp
where:
V1MinOP and V2MinOp are the setting parameters for positive sequence and negative
sequence minimum operate voltages
The positive sequence voltage V1A in figure 146 above is reference.
If there is a three-phase fault, there will not be any release of the individual phase signals, even if
the general conditions for V2 and V1 are fulfilled.
Phase-to-ground and phase-to-phase-to-ground-fault detection SEMOD153832-135 v5

The detection of phase-to-ground and phase-to-phase-to-ground fault (US patent 5390067) is
based on two conditions:
1. Angle relationship between V2 and I0
2. Angle relationship between V2 and V1
The condition 1 determines faulty phase at single phase-to-ground fault by evaluating the angle
between V2 and I0.
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Technical manual
80°
BG sector CG sector
V2A
(Ref)
200°
AG sector
320°
en06000384_ansi.vsd
Figure 147: Condition 1: Definition of faulty phase sector as angle between V2 and I0
The angle is calculated in a directional function block and gives the angle in radians as input to the
V2 and I0 function block. The input angle is released only if the fault is in forward direction. This is
done by the directional element. The fault is classified as forward direction if the angle between V0
and I0 lies between 20 to 200 degrees, see figure 148.
Forward 20°
200° Reverse
en06000385.vsd
Figure 148: Directional element used to release the measured angle between Vo and I0
The input radians are summarized with an offset angle and the result evaluated. If the angle is
within the boundaries for a specific sector, the phase indication for that sector will be active see
figure 147. Only one sector signal is allowed to be activated at the same time.
The sector function for condition 1 has an internal release signal which is active if the main
sequence function has classified the angle between V0 and I0 as valid. The following conditions
must be fulfilled for activating the release signals:
|V2|>V2MinOp
|3I0|> 0.05 · IBase
|3I0|>maxIph · INRelPG
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Technical manual
where:
V2 and IN are the magnitude of the negative sequence voltage and zero-
sequence current (3I0)
V2MinOp is the setting parameter for minimum operating negative

sequence voltage
maxIph is the maximum phase current
The angle difference is phase shifted by 180 degrees if the fault is in reverse direction.
The condition 2 looks at the angle relationship between the negative sequence voltage V2 and the
positive sequence voltage V1. Since this is a phase-to-phase voltage relationship, there is no need
for shifting phases if the fault is in reverse direction. A phase shift is introduced so that the fault
sectors will have the same angle boarders as for condition 1. If the calculated angle between V2
and V1 lies within one sector, the corresponding phase for that sector will be activated. The
condition 2 is released if both the following conditions are fulfilled:
|V2|>V2MinOp
|V1|>V1MinOp
where:
|V1| and |V2| are the magnitude of the positive and negative sequence voltages.
V1MinOP and V2MinOP are the setting parameters for positive sequence and negative sequence
minimum operating voltages.
140°
CG sector
20°
V1A
(Ref)
AG sector
BG sector
260° en06000413_ansi.vsd
Figure 149: Condition 2: V2 and V1 angle relationship

If both conditions are true and there is sector match, the fault is deemed as single phase-to-
ground. If the sectors, however, do not match the fault is determined to be the complement of the
second condition, that is, a phase-to-phase-to- ground fault.
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Technical manual
Condition 1 and Condition 2 ⇒ Fault type

CG CG CG
BG AG BCG
The sequence phase selector is blocked when ground is not involved or if a three-phase fault is
detected.
Three-phase fault detection SEMOD153832-174 v4

Unless it has been categorized as a single or two-phase fault, the function classifies it as a three-
phase fault if the following conditions are fulfilled:
|V1|V1Level
and
|I1|>I1LowLevel
or
|I1|>IMaxLoad
where:
V1| and |I1| are the positive sequence voltage and current magnitude
V1Level , are the setting of limits for positive sequence voltage and current
I1LowLevel
IMaxLoad is the setting of the maximum load current
The output signal for detection of three-phase fault is only released if not ground fault and phase-
to-phase fault in the main sequence function is detected.
The conditions for not detecting ground fault are the inverse of equation 5 to 10.
The condition for not detecting phase-to-phase faults is determined by three conditions. Each of
them gives condition for not detecting phase-to-phase fault. Those are:
1:
ground fault is detected
or
|3I0|> 0.05 · IBase
and
|3I0|>maxIph ·INRelPG
2:
phase-to-ground and phase-to-phase faults are not fulfilled
and
maxIph<0.1 · IBase
and
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Technical manual
|I2|<0.1 · maxIph
3:
|3I0|>maxIph · 3I0BLK_PP
or
|I2|<maxIph · I2ILmax
where:
maxIph is the maximum of the phase currents IA, IB and IC
INRelPG is the setting parameter for 3I0 limit for release of phase-to-ground
fault loops
|I2| is the magnitude of the negative sequence current
I2ILmax is the setting parameter for the relation between negative sequence
current to the maximum phase current in percent of IBase
3I0BLK_PP is the setting parameter for 3I0 limit for blocking phase to phase
measuring loops
Fault evaluation and selection logic SEMOD153832-307 v3

The phase selection logic has an evaluation procedure that can be simplified according to figure
150. Only phase A is shown in the figure. If the internal signal 3 Phase fault is activated, all four
outputs PICKUP, PU_A, PU_B and PU_C gets activated.
a a>b FaultPriority
DeltaIA then c=a c Adaptive release
b else c=a dependent on result
from Delta logic
DeltaVA
Sequence based
function a<b
a
AB fault
then c=b c
OR b else c=a OR
AG fault
3 Phase fault
PU_A
IA Valid &
BLOCK
en06000386_ansi.vsd
Figure 150: Simplified diagram for fault evaluation, phase A
Load encroachment logic SEMOD153832-312 v3

Each of the six measuring loops has its own load (encroachment) characteristic based on the
corresponding loop impedance. The load encroachment functionality is always activated in faulty
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Technical manual
phase identification with load encroachment for mho (FMPSPDIS, 21) function but the influence on
the zone measurement can be switched Enabled/Disabledin the respective impedance measuring
function.
The outline of the characteristic is presented in figure 151. As illustrated, the resistive reach in
forward and reverse direction and the angle of the sector is the same in all four quadrants. The
reach for the phase selector will be reduced by the load encroachment function, as shown in figure
151.
Blinder
Blinder provides a mean to discriminate high load from a fault. The operating characteristic is
illustrated in figure 151. There are six individual measuring loops with the blinder functionality.
Three phase-to-ground loops which estimate the impedance according to
Zn = Vph / Iph
and three phase-to-phase loops according to
Zph-ph = Vph-ph / Iph-ph
The start operations from respective loop are binary coded into one word and provides an output
signal PLECND.
X jX
Operation area Operation area
RLd
LdAngle LdAngle
R
LdAngle LdAngle R
RLd
Operation area
No operation area No operation area
en06000414_ansi.vsd
Figure 151: Influence on the characteristic by load encroachment logic
Outputs SEMOD153832-327 v7
The output of the sequence components based phase selector and the delta logic phase selector
activates the output signals PU_A, PU_B and PU_C. If a ground fault is detected the signal
PHG_FLT gets activated.
The phase selector also gives binary coded signals that are connected to the zone measuring
element for opening the correct measuring loop(s). This is done by the signal PHSCND. If only one
phase is started (A, B or C), the corresponding phase-to-ground element is enabled. PHG_FLT is
expected to be made available for two-phase and three-phase faults for the correct output to be
selected. The fault loop is indicated by one of the decimal numbers below.
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Technical manual
The output PHSCND provides release information from the phase selection part only. DLECND
provides release information from the load encroachment part only. PLECND provides release
information from the phase selection part and the load encroachment part combined, that is, both
parts have to issue a release at the same time (this signal is normally not used in the zone
measuring element). In these signals, each fault type has an associated value, which represents
the corresponding zone measuring loop to be released. The values are presented in table 164.
0= no faulted phases
1= AG
2= BG
3= CG
4= -ABG
5= -BCG
6= -CAG
7= -ABCG
8= -AB
9= -BC
10= -CA
11= ABC
An additional logic is applied to handle the cases when phase-to-ground outputs are to be
asserted when the ground input G is not asserted.
The output signal PLECND is activated when the load encroachment is operating.
PLECNDis connected to the input STCND for selected quadrilateral impedance measuring zones to
be blocked. The signal must be connected to the input LDCND for selected mho impedance
measuring zones .
The load encroachment at the measuring zone must be activated to release the
blocking from the load encroachment function.

SEMOD153649-2 v7
Table 165: FMPSPDIS (21) technical data

Load encroachment criteria: (1.00–3000.00) W/phase ±2.0% static accuracy
Load resistance, forward and (5–70) degrees Conditions:
reverse Voltage range: (0.1–1.1) x Vn
Current range: (0.5–30) x In
Angle: at 0 degrees and 85
degrees
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Technical manual
7.9 Distance protection zone, quadrilateral characteristic,

separate settings ZMRPDIS (21), ZMRAPDIS (21) and
ZDRDIR (21D) GUID-7308DB86-32CE-4615-95DC-92BEEF69E184 v1
GUID-420DD49A-C65B-4F04-B317-9558DCCE7A52 v1

Distance protection zone, ZMRPDIS 21
quadrilateral characteristic, separate
settings (zone 1)
S00346 V1 EN-US
Distance protection zone, ZMRAPDIS 21

quadrilateral characteristic, separate
settings (zone 2-5)
S00346 V1 EN-US
GUID-119120A5-8600-44C6-9C85-81136DBBE280 v1

Directional impedance quadrilateral ZDRDIR Z<-> 21D
7.9.2 Functionality GUID-014501E7-EE0D-440F-8DC8-C44B848E49D3 v2
The line distance protection is up to five zone full scheme protection with three fault loops for
phase-to-phase faults and three fault loops for phase-to-ground fault for each of the independent
zones. Individual settings for each zone in resistive and reactive reach gives flexibility for use as
back-up protection for transformer connected to overhead lines and cables of different types and
lengths.
Mho alternative quadrilateral characteristic is available.
ZMRPDIS (21) together with Phase selection, quadrilateral characteristic with settable angle
FRPSPDIS (21) has functionality for load encroachment, which increases the possibility to detect
high resistive faults on heavily loaded lines, as shown in figure 152.
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Technical manual
Forward
operation
Reverse
operation
en05000034.vsd
Figure 152: Typical quadrilateral distance protection zone with Phase selection, quadrilateral
characteristic with settable angle function FRPSPDIS (21) activated
reliable built-in phase selection makes the function suitable in applications with single pole
tripping and autoreclosing.
Built-in adaptive load compensation algorithm prevents overreaching of zone 1 at load exporting
end at phase-to-ground faults on heavily loaded power lines.
configurations, such as parallel lines, multi-terminal lines and so on.

GUID-8DF1E00C-8404-4B1C-AE2F-5702269B699A v2
ZMRPDIS (21)
I3P* TRIP
V3P* TR_A
BLOCK TR_B
BLKZ TR_C
BLKTR RI
PHSEL BFI_A
DIRCND BFI_B
PU_C
PHPUND
Figure 153: ZMRPDIS (21) function block
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Technical manual
ZMRAPDIS (21)
I3P* TRIP
V3P* TR_A
BLOCK TR_B
BLKZ TR_C
BLKTR BFI
PHSEL PU_A
DIRCND BFI_B
PU_C
PHPUND
Figure 154: ZMRAPDIS (21) function block

GUID-3BB8A08A-3199-42E3-B161-B11F4FF8C65F v2
ZDRDI R (21D)
I3P* STDI RCND
V3P*
7.9.4 Signals
Table 166: ZMRPDIS (21) Input signals

SIGNAL
SIGNAL
Table 167: ZMRPDIS (21) Output signals

RI BOOLEAN General Pickup, issued from any phase or loop
BFI_B BOOLEAN Pickup signal from phase B
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Technical manual
Table 168: ZMRAPDIS (21) Input signals

SIGNAL
SIGNAL
Table 169: ZMRAPDIS (21) Output signals

BFI BOOLEAN General Pickup, issued from any phase or loop
BFI_B BOOLEAN Pickup signal from phase B
Table 170: ZDRDIR (21D) Input signals

I3P GROUP - group connection for current abs 2
SIGNAL
V3P GROUP - group connection for voltage abs 2
SIGNAL
Table 171: ZDRDIR (21D) Output signals

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Technical manual
7.9.5 Settings
Table 172: ZMRPDIS (21) Group settings (basic)

Enabled
Forward Forw / Rev
Reverse
X1PP 0.10 - 3000.00 Ohm/p 0.01 30.00 Positive sequence reactance reach Ph-Ph
angle, Ph-Ph
X1PG 0.10 - 3000.00 Ohm/p 0.01 30.00 Positive sequence reactance reach Ph-G
angle, Ph-G
Enabled Phase loops
Enabled timer, Ph-G
Phase loops
to-ground loops
Phase-Ground loops
Table 173: ZMRPDIS (21) Non group settings (basic)

groups
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Technical manual
Table 174: ZMRAPDIS (21) Group settings (basic)

Enabled
Forward Forw / Rev
Reverse
X1PP 0.10 - 3000.00 Ohm/p 0.01 30.00 Positive sequence reactance reach Ph-Ph
angle, Ph-Ph
X1PG 0.10 - 3000.00 Ohm/p 0.01 30.00 Positive sequence reactance reach Ph-G
angle, Ph-G
Enabled Phase loops
Enabled timer, Ph-G
Phase loops
to-ground loops
Table 175: ZMRAPDIS (21) Non group settings (basic)

groups
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Technical manual
Table 176: ZDRDIR (21D) Group settings (basic)

Phase-Phase loops
to-ground loops
forward direction
forward direction
Table 177: ZDRDIR (21D) Non group settings (basic)

groups
7.9.6.1 Full scheme measurement GUID-4519D9AD-4446-48FC-86CC-140E5299AFB7 v1
each fault loop for phase-to-ground faults and phase-to-phase faults for forward and reverse
Figure 155 presents an outline of the different measuring loops for up to five, impedance-
measuring zones. There are 3 to 5 zones depending on product type and variant.
Figure 155: The different measuring loops at phase-to-ground fault and phase-to-phase
fault.
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Technical manual
7.9.6.2 Impedance characteristic GUID-0DC94F08-9B3A-424D-9615-BD5C577344ED v1
The distance measuring zone includes six impedance measuring loops; three intended for phase-
to-ground faults, and three intended for phase-to-phase as well as, three-phase faults.
characteristics presented in figure 156 and figure 157. The phase-to-ground characteristic is
illustrated with the full loop reach while the phase-to-phase characteristic presents the per phase
reach.
X (Ohm/loop)
RFPG R1+Rn RFPG
X0-X1
Xn =
3
X1+Xn R0-R1
Rn =
3
jn jn
R (Ohm/loop)
RFPG RFPG
X1+Xn
RFPG R1+Rn RFPG
Figure 156: Characteristic for phase-to-ground measuring , ohm/loop domain
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Technical manual
X (Ohm/phase)
RFPP R1PP RFPP

2 2
X 0 PE - X 1RVPE
XNRV =XX00PEPG- -
X31XRVPE
1RVPG
XNRV =
XNRV =
3 3
XX
X00
PE
0 PE
-X
PG --1X 11FWPE
XFWPE
FWPG
XNFW =
XNFW==
XNFW
X1PP 3
3 3
j j
R (Ohm/phase)
RFPP RFPP
2 2
X1PP
RFPP R1PP RFPP

2 2
en07000062.vsd
Figure 157: Characteristic for phase-to-phase measuring

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Technical manual
Ip R1 + j X1
Phase-to-ground
VA
element
Phase-to-ground
(Arc + tower
resistance)
0
IN (R0-R1)/3 +
j (X0-X1)/3 )
VA element A-B
Phase-to-phase
IB
VB (Arc resistance)
R1 + j X1
VA element A-C
Three-phase
fault
IC
VC
R1 + j X1 0.5·RFPP

The R1 and jX1 in figure 158 represents the positive sequence impedance from the measuring point
to the fault location. The settings RFPG and RFPP are the eventual fault resistances in the faulty
place.
The zone can be set to operate in Non-directional, Forward or Reverse direction through the
setting OperationDir. The result from respective set value is illustrated in figure 159. The
impedance reach is symmetric, in the sense that it conforms for forward and reverse direction.
Therefore, all reach settings apply to both directions.
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Technical manual
X X X
R R R
Figure 159: Directional operating modes of the distance measuring zones
7.9.6.3 Minimum operating current GUID-BFD07CBE-F322-4602-A3BC-B6E8D72DB92B v1
The operation of Distance measuring zones, quadrilateral characteristic (ZMRPDIS, 21) is blocked if
the magnitude of input currents fall below certain threshold values.
ground loops can be blocked when IN < IMinOpIR, regardless of the phase currents.
sum of the three-phase currents, that is residual current 3I0.
The phase-to-phase loop AB (BC or CA) is blocked if IAB (BC or CA)< IMinPUPP.
direction, that is OperationDir=Reverse
7.9.6.4 Measuring principles M16923-4 v7
Apparent impedances are calculated and compared with the set limits. The apparent impedances
at phase-to-phase faults follow equation 57 (example for a phase A to phase B fault).
VA - VB
Zapp =
IA - IB
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Technical manual
Here V and I represent the corresponding voltage and current phasors in the respective phase Ln
(n = 1, 2, 3)
The ground return compensation applies in a conventional manner to phase-to-ground faults

(example for a phase A to ground fault) according to equation 58.
V_A
Z app =
I _ A + IN × KN
Where:
KN
is defined as:
Z 0 - Z1
KN =
3 × Z1
Z 0 = R 0 + jX 0
Z 1 = R1 + jX 1
Where
The formula given in equation 58 is only valid for radial feeder application without load. When load
is considered in the case of single phase-to-ground fault, conventional distance protection might
overreach at exporting end and underreach at importing end. The IED has an adaptive load
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Technical manual
filter.
X Di
V =R× i + ×
w0 Dt
X D Re (I )
Re (V ) = R × Re (I ) + ×
w0 Dt
X D Im (I )
Im (V ) = R × Im (I ) + ×
w0 Dt
with
w0 = 2 × p × f 0
where:
voltage and substitutes it in the equation for the imaginary part. The equation for the Xm
measured reactance can then be solved. The final result is equal to:

Rm =
Re (V) × lm(I) - lm(V ) × Re (I)

X m = w0 × D t ×
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Technical manual
factors.
the IED point.
7.9.6.5 Directional impedance element for quadrilateral characteristics M16923-139 v6
The evaluation of the directionality takes place in Directional impedance quadrilateral function
ZDRDIR (21D). Equation 65 and equation 66 are used to classify that the fault is in forward
direction for phase-to-ground fault and phase-to-phase fault.
0.8 × V 1L1 + 0.2 × V 1L1 M

I L1
For the AB element, the equation in forward direction is according to.
0.8 × V 1L1 L 2 + 0.2 × V 1L1 L 2 M

I L1 L 2
where:
-15 degrees) and
V1AB is voltage difference between phase A and B (B lagging A)
(as shown in figure 160). It should not be changed unless system studies have shown the
necessity.
ZDRDIR gives binary coded directional information per measuring loop on the output STDIRCND.
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Technical manual
AngNegRes
AngDir
R
en05000722_ansi.vsd
Figure 160: Setting angles for discrimination of forward and reverse fault in Directional
impedance quadrilateral function ZDRDIR (21D)
degrees.
The polarizing voltage is available as long as the positive sequence voltage exceeds 5% of the set
close-in faults.
After 100 ms the following occurs:
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Technical manual
Distance protection zones GUID-CBBD5D22-7372-4C0A-B941-44A5D21EC328 v2

Phase-to-ground related signals are designated by AG, BG and CG.. The phase-to-phase signals are
selection with load encroachment, quadrilateral characteristic function FRPSPDIS (21) within the
IED, which are converted within the zone measuring function into corresponding boolean
expressions for each condition separately. Input signal PHSEL is connected to FRPSPDIS (21)
function output STCNDZ.
zone measurement function filter out the relevant signals depending on the setting of the
parameter OperationDir. It must be configured to the STDIRCND output on directional function
ZDRDIR (21D) function.
PUZMPP
OR
PHSEL
AND NDIR_AB
AB
NDIR_BC
BC AND
CA AND NDIR_CA
AND NDIR_A
AG
AND NDIR_B
BG
NDIR_C
CG AND
OR STNDPE
OR
LOVBZ PHPUND
OR AND
BLOCK
BLK
BLOCFUNC
Figure 161: Conditioning by a group functional input signal PHSEL, external start condition
308
Technical manual
NDIR_A
OR
NDIR_B
PU_A
AND 0
NIDR_C 15ms
NDIR_AB OR PU_B
AND 0
15ms
NDIR_BC
PU_C
NDIR_CA AND 0
OR 15ms
PICKUP
AND 0
OR 15ms
BLK

NDIR_A
DIR_A AND
PU_ZMPG
OR
NDIR_B
DIR_B AND
NDIR_C OR PU_A
AND 0
DIR_C AND 15 ms
NDIR_AB
DIR_AB AND OR PU_B
AND 0
15 ms
NDIR_BC
DIR_BC AND
OR PU_C
NDIR_CA AND 0
AND 15 ms
DIR_CA
PU_ZMPP
OR
BLK
OR PICKUP
AND 0
15 ms

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Technical manual
Timer tPP=enable
PUZMPP AND tPP
0-tPP AND
0
BLOCFUNC
OR OR
tPG
0-tPG
0 AND
PUZMPG
BLKTR AND 0 TRIP
15 ms
BLK OR
PU_A AND TR_A
PU_B AND TR_B
PU_C AND TR_C

GUID-7617A215-AE7C-47CC-B189-4914F530F717 v7
Table 178: ZMRPDIS, ZMRAPDIS (21) technical data

Number of zones Max 5 with -
selectable direction
zone 1
to-phase and phase-to-ground
Positive sequence reactance (0.10-3000.00) Ω/ ±2.0% static accuracy
phase ±2.0 degrees static angular accuracy
Conditions:
Positive sequence resistance (0.01-1000.00) Ω/ Voltage range: (0.1-1.1) x Vn
phase
Zero sequence reactance (0.10-9000.00) Ω/ Angle: at 0 degrees and 85 degrees
phase
Zero sequence resistance (0.01-3000.00) Ω/
phase
Fault resistance, phase-to- (0.10-9000.00) Ω/
ground loop
Fault resistance, phase-to- (0.10-3000.00) Ω/
phase loop
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measured with
CVT’s and
0.5<SIR<30
operation
x Zreach Max. =50 ms
7.10 Phase selection, quadrilateral characteristic with

settable angle FRPSPDIS (21) GUID-29E9C424-5AF7-40EE-89D9-F6BB4F0A0836 v2
GUID-07DB9506-656C-4E5F-A043-3DAA624313C7 v2

Phase selection, quadrilateral FRPSPDIS 21
characteristic with settable angle
Z<phs
SYMBOL-DD V1 EN-US
7.10.2 Functionality GUID-A15350C8-CFA9-4BD9-9DE1-5D5814290F61 v3
The ability to accurately and reliably classify the different types of fault, so that single pole
tripping and autoreclosing can be used plays an important role in today's power systems. Phase
selection, quadrilateral characteristic with settable angle FRPSPDIS (21) is designed to accurately
select the proper fault loop in the distance function dependent on the fault type.
The heavy load transfer that is common in many transmission networks may make fault resistance
coverage difficult to achieve. Therefore, FRPSPDIS (21) has a built-in algorithm for load
encroachment, which gives the possibility to enlarge the resistive setting of both the phase
selection and the measuring zones without interfering with the load.
The extensive output signals from the phase selection gives also important information about
faulty phase(s) which can be used for fault analysis.
three phase currents and the residual current and, compare them with the set values.
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Technical manual
7.10.3 Function block GUID-4AE8EAC6-5231-4646-9215-33DBBA039B65 v2
FRPSPDIS (21)
I3P* TRIP
V3P* BFI
BLOCK FWD_A
DIRCND FWD_B
FWD_C
FWD_G
REV_A
REV_B
REV_C
REV_G
NDIR_A
NDIR_B
NDIR_C
NDIR_G
FWD_1PH
FWD_2PH
FWD_3PH
PHG_FLT
PHPH_FLT
PHSELZ
DLECND
Figure 165: FRPSPDIS (21) function block
7.10.4 Signals
Table 179: FRPSPDIS (21) Input signals

SIGNAL
SIGNAL
Table 180: FRPSPDIS (21) Output signals

BFI BOOLEAN Start in any phase or loop
FWD_G BOOLEAN Ground fault detected in forward direction
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Technical manual

REV_G BOOLEAN Ground fault detected in reverse direction
NDIR_A BOOLEAN Non directional fault detected in Phase A
NDIR_B BOOLEAN Non directional fault detected in Phase B
NDIR_C BOOLEAN Non directional fault detected in Phase C
NDIR_G BOOLEAN Non directional phase-to-ground fault detected
FWD_1PH BOOLEAN Single phase-to-ground fault in forward direction
FWD_2PH BOOLEAN Phase-to-phase fault in forward direction
FWD_3PH BOOLEAN Three phase fault in forward direction
PHG_FLT BOOLEAN Release condition to enable phase-ground measuring elements
PHPH_FLT BOOLEAN Release condition to enable phase-phase measuring elements
PHSELZ INTEGER 21 pickup with load encroachment and 3I0
DLECND INTEGER Pickup for load encroachment and 3I0
7.10.5 Settings
Table 181: FRPSPDIS (21) Group settings (basic)

measuring loops
measuring loops
impedance area
impedance area
impedance area
angle, Ph-Ph
angle, Ph-G
Phase loops
to-ground loops
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Technical manual
Table 182: FRPSPDIS (21) Group settings (advanced)

TimerPP Disabled - - Disabled Operation mode Disable/Enable of Zone
tPP 0.000 - 60.000 s 0.001 3.000 Time delay to trip, Ph-Ph
TimerPE Disabled - - Disabled Operation mode Disable/ Enable of Zone
Enabled timer, Ph-G
tPG 0.000 - 60.000 s 0.001 3.000 Time delay to trip, Ph-E
Table 183: FRPSPDIS (21) Non group settings (basic)

groups
7.10.6 Operation principle GUID-163B55DE-056F-4CB9-A401-78F9F4897903 v2
The basic impedance algorithm for the operation of the phase selection measuring elements is the
same as for the distance zone measuring function. Phase selection, quadrilateral characteristic
with settable angle (FRPSPDIS, 21) includes six impedance measuring loops; three intended for
phase-to-ground faults, and three intended for phase-to-phase as well as for three-phase faults.
The difference, compared to the distance zone measuring function, is in the combination of the
measuring quantities (currents and voltages) for different types of faults.
The characteristic is basically non-directional, but FRPSPDIS (21) uses information from the
directional function ZDRDIR to discriminate whether the fault is in forward or reverse direction.
The pickup condition PHSELZ is essentially based on the following criteria:
• Residual current criteria, that is, separation of faults with and without ground connection
• Regular quadrilateral impedance characteristic
• Load encroachment characteristics is always active but can be switched off by selecting a
high setting.
The current pickup condition PHSELI is based on the following criteria:
• Residual current criteria

• No quadrilateral impedance characteristic. The impedance reach outside the load area is
theoretically infinite. The practical reach, however, will be determined by the minimum
operating current limits.
• Load encroachment characteristic is always active, but can be switched off by selecting a high
setting.
The PHSELI output is non-directional. The directionality is determined by the distance zones
directional function ZDRDIR.
There are output from FRPSPDIS (21) that indicate whether a pickup is in forward or reverse
direction or non-directional, for example FWD_A, REV_A and NDIR_A.
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Technical manual
These directional indications are based on the sector boundaries of the directional function and
the impedance setting of FRPSPDIS (21) function. Their operating characteristics are illustrated in
figure 166.
X X X
60°
60° R
R R
60° 60°
Non-directional (ND) Forward (FWD) Reverse (REV)
en05000668_ansi.vsd
Figure 166: Characteristics for non-directional, forward and reverse operation of Phase
selection, quadrilateral characteristic with settable angle (FRPSPDIS, 21)
The setting of the load encroachment function may influence the total operating characteristic,
for more information, refer to section "Load encroachment".
The input DIRCND contains binary coded information about the directional coming from the
directional function ZDRDIR (21D). It shall be connected to the STDIR output on ZDRDIR (21D). This
information is also transferred to the input DIRCND on the distance measuring zones, that is, the
ZMRPDIS (21) block.
The code built up for the directionality is as follows:
If the binary information is 1 then it will be considered that we have pickup in forward direction in
phase A. If the binary code is 3 then we have pickup in forward direction in phase A and B etc.
The or PHSEL output contains, in a similar way as DIRCND, binary coded information, in this case
information about the condition for opening correct fault loop in the distance measuring element.
It shall be connected to the PHSEL input on the ZMRPDIS distance measuring zones (21) block.
The code built up for release of the measuring fault loops is as follows:
PHSEL = AG*1+BG*2+CG*4+AB*8+BC*16+CA*32
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Technical manual
7.10.6.1 Phase-to-ground fault GUID-37AF6C9C-852E-48D9-A307-A23F2BF6884A v1
Index PHS in images and equations reference settings for Phase selection,
quadrilateral characteristic with settable angle (FRPSPDIS, 21).
VA( B , C )
ZPHSn =
IA( B , C )
where:
n corresponds to the particular phase (n=1, 2 or 3)
The characteristic for FRPSPDIS (21) function at phase-to-ground fault is according to figure 167.
The characteristic has a settable angle for the resistive boundary in the first quadrant of 70°.
The resistance RN and reactance XN are the impedance in the ground-return path defined
according to equation 70 and equation 71.
R 0 PE - R1PE
RN =
3
EQUATION-2125 V1 EN-US (Equation 68)
R0 - R1
RN =
3
X 0 - X1
XN =
3
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Technical manual
X (ohm/loop)
R1PE+RN
RFRvPE RFFwPE
X1+XN
RFFwPE
RFRvPE R (Ohm/loop)
X1+XN
RFRvPE RFFwPE
R1PE+RN
Figure 167: Characteristic of FRPSPDIS (21) for phase to fault (directional lines are drawn as
"line-dot-dot-line")
Besides this, the 3I0 residual current must fulfil the conditions according to equation 70 and
equation 71.
3 × I0 ³ 0.5 × IMinOpPE
3I 0 Enable _ PG
3 × I0 ³ × Iph max
100
where:
IMinOpPE is the minimum operation current for forward zones
3I0Enable_PG is the setting for the minimum residual current needed to enable operation in the phase-to-ground
fault loops (in %).
Iphmax is the maximum phase current in any of three phases.
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Technical manual
7.10.6.2 Phase-to-phase fault GUID-8C41B037-72E8-42EB-A5BA-9FA20BD830DB v1
For a phase-to-phase fault, the measured impedance by FRPSPDIS (21) is according to equation 72.
Vm - Vn
ZPHS =
-2 × In
Vm is the leading phase voltage, Vn the lagging phase voltage and In the phase current in the
lagging phase n.
The operation characteristic is shown in figure 168.
X (ohm/phase)
0.5·FRvPP
R1PP 0.5·RFFwPP
X1
0.5·RFFwPP
R (ohm/phase)
0.5·RFRvPP
X1
R1PP
0.5·RFRvPP 0.5·RFFwPP
Figure 168: The operation characteristic for FRPSPDIS (21) at phase-to-phase fault
(directional lines are drawn as "line-dot-dot-line")
In the same way as the condition for phase-to-ground fault, there are current conditions that have
to be fulfilled in order to release the phase-to-phase loop. Those are according to equation 73 or
equation 74.
3I 0 < 3I 0Enable _ PG
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Technical manual
3I 0 < 3I 0BLK _ PP
where:
3I0Enable_PG is the minimum operation current for forward ground measuring loops,
3I0BLK_PP is 3I0 limit for blocking phase-to-phase measuring loop and
Iphmax is maximal magnitude of the phase currents.
7.10.6.3 Three-phase faults GUID-0CB276AE-1700-4ACB-8F90-E8E1FD670365 v1
The operation conditions for three-phase faults are the same as for phase-to-phase fault, that is
equation 72, equation 73 and equation 74 are used to release the operation of the function.
However, the reach is expanded by a factor 2/√3 (approximately 1.1547) in all directions. At the
same time the characteristic is rotated 30 degrees, counter-clockwise. The characteristic is shown
in figure 169.
X (ohm/phase)
4 × X1PP
3
0.5·RFFwPP·K3
X1·K3 30 deg 2
RFwPP ×
3
R (ohm/phase)
0.5·RFRvPP·K3
K3 = 2 / sqrt(3)
30 deg
Figure 169: The characteristic of FRPSPDIS (21) for three-phase fault (set angle 70°)
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Technical manual
7.10.6.4 Load encroachment GUID-ABD74C3B-FF0F-45B3-BF34-D7C5FEAD62D3 v1
Each of the six measuring loops has its own load encroachment characteristic based on the
corresponding loop impedance. The load encroachment functionality is always active, but can be
switched off by selecting a high setting.
The outline of the characteristic is presented in figure 171. As illustrated, the resistive blinders are
set individually in forward and reverse direction while the angle of the sector is the same in all four
quadrants.
RLdFwd
LdAngle LdAngle
R
LdAngle LdAngle
RLdRev
en05000196_ansi.vsd
Figure 170: Characteristic of load encroachment function

The influence of load encroachment function on the operation characteristic is dependent on the
chosen operation mode of FRPSPDIS (21) function. When output signal PHSELZ is selected, the
characteristic for FRPSPDIS (21) (and also zone measurement depending on settings) will be
reduced by the load encroachment characteristic, see figure 172.
When output signal PHSELI is selected, the operation characteristic will be as in figure 171. The
reach will in this case be limit by the minimum operation current and the distance measuring
zones.
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Technical manual
X X
R R
PHSELZ DLECND
Figure 171: Difference in operating characteristic depending on operation mode when load
encroachment is activated
When FRPSPDIS (21) is set to operate together with a distance measuring zone the resultant
operate characteristic could look like in figure 172. The figure shows a distance measuring zone
operating in forward direction. Thus, the operating area of the zone together with the load
encroachment is highlighted in black.
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Technical manual
"Phase selection"
"quadrilateral" zone
Load encroachment
characteristic
Directional line
en05000673.vsd
Figure 172: Operating characteristic in forward direction when load encroachment is

activated
Figure 172 is valid for phase-to-ground. During a three-phase fault, or load, when the quadrilateral
phase-to-phase characteristic is subject to enlargement and rotation the operate area is
transformed according to figure 173. Notice in particular what happens with the resistive blinders
of the "phase selection" "quadrilateral" zone. Due to the 30-degree rotation, the angle of the
blinder in quadrant one is now 100 degrees instead of the original 70 degrees (if the angle setting
is 70 degrees). The blinder that is nominally located to quadrant four will at the same time tilt
outwards and increase the resistive reach around the R-axis. Consequently, it will be more or less
necessary to use the load encroachment characteristic in order to secure a margin to the load
impedance.
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Technical manual
X (W / phase)
Phase selection
”Quadrilateral” zone
R (W / phase)
Figure 173: Operating characteristic for FRPSPDIS (21) in forward direction for three-phase
fault, ohm/phase domain
The result from rotation of the load characteristic at a fault between two phases is presented in
fig 174. Since the load characteristic is based on the same measurement as the quadrilateral
characteristic, it will rotate with the quadrilateral characteristic clockwise by 30 degrees when
subject to a pure phase-to-phase fault. At the same time the characteristic will "shrink" by 2/√3,
from the full RLdFw and RLdRv reach, which is valid at load or three-phase fault.
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Technical manual
IEC08000437.vsd
Figure 174: Rotation of load characteristic for a fault between two phases
There is a gain in selectivity by using the same measurement as for the quadrilateral characteristic
since not all phase-to-phase loops will be fully affected by a fault between two phases. It should
also provide better fault resistive coverage in quadrant one. The relative loss of fault resistive
coverage in quadrant four should not be a problem even for applications on series compensated
lines.
7.10.6.5 Minimum operate currents GUID-7F780AC7-36AB-4704-843D-C1EA3F5B2D6A v1
The operation of Phase selection, quadrilateral characteristic with settable angle (FRPSPDIS, 21) is
blocked if the magnitude of input currents falls below certain threshold values.
The phase-to-ground loop n is blocked if In<IMinPUPG, where In is the RMS value of the current in
phase n (A or B or C).
The phase-to-phase loop mn is blocked if (2·In<IMinOpPPIMinPUPP).
7.10.6.6 Simplified logic diagrams GUID-95AD1A91-86F0-4854-A12B-99C504BFBC6C v1
Figure 175 presents schematically the creation of the phase-to-phase and phase-to-ground
operating conditions. Consider only the corresponding part of measuring and logic circuits, when
only a phase-to-ground or phase-to-phase measurement is available within the IED.
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Technical manual
21 enable
AND
LDEblock
3I 0  0.5  IMinPUPG IRELPG
0 STPG
AND
3 I 0 Enable _ PG 15ms
3I 0   Iphmax
100 Bool to AND
DLECND
BLOCK integer
3I 0  IMinPUPG AND 0 STPP

15ms
AND 10ms 0
0 20ms IRELPP
3I 0 BLK _ PP
3I 0   Iph max
100
Figure 175: Phase-to-phase and phase-to-ground operating conditions (residual current

criteria)
A special attention is paid to correct phase selection at evolving faults. A PHSEL output signal is
created as a combination of the load encroachment characteristic and current criteria, refer to
figure 175. This signal can be configured to STCND functional input signals of the distance
zone measuring elements and their phase related pickup and tripping signals.
Figure 176 presents schematically the composition of non-directional phase selective signals
NDIR_A (B or C). Internal signals ZMn and ZMmn (m and n change between A, B and C according to
the phase) represent the fulfilled operating criteria for each separate loop measuring element,
that is within the characteristic.
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Technical manual
INDIR_A
INDIR_B
INDIR_C
0
PHSEL_G
OR
15 ms
IRELPG
LDEblockA
I_A AND
OR PHSEL_A
ZMA OR 0
LDEblockB 15 ms
I_B AND
OR
ZMB PHSEL_B
LDEblockC OR 0
I_C AND 15 ms
OR
ZMC
LDEblockAB PHSEL_C
I_A & I_B AND OR 0
OR 15 ms
ZMAB
LDEblockBC
I_B & I_C AND INDIR_AB
OR
ZMBC INDIR_BC
LDEblockCA
I_C & I_A AND
OR INDIR_CA
ZMCA
IRELPP
0 PHSEL_PP
OR
15 ms
Figure 176: Composition on non-directional phase selection signals

Composition of the directional (forward and reverse) phase selective signals is presented
schematically in figure 177 and figure 178. The directional criteria appears as a condition for the
correct phase selection in order to secure a high phase selectivity for simultaneous and evolving
faults on lines within the complex network configurations. Internal signals DFWLn and DFWLnLm
present the corresponding directional signals for measuring loops with phases Ln and Lm.
Designation FW (figure 178) represents the forward direction as well as the designation RV
(figure 177) represents the reverse direction. All directional signals are derived within the
corresponding digital signal processor.
Figure 177 presents additionally a composition of a PHSELZ output signal, which is created on the
basis of impedance measuring conditions. This signal can be configured to PHSEL functional input
signals of the distance protection zone and this way influence the operation of the phase-to-phase
and phase-to-ground zone measuring elements and their phase related pickup and tripping
signals.
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Technical manual
INDIR_A
AND
DRV_A
INDIR_AB
REV_A
AND OR 0
DRV_AB 15 ms
INDIR_CA
AND
DRV_CA
REV_G
OR 0
INDIR_B 15 ms
AND
DRV_B
INDIR_AB
REV_B
AND OR 0
15 ms
INDIR_BC INDIR_A
AND INDIR_B
DRV_BC
INDIR_C Bool to PHSELZ
INDIR_C INDIR_AB integer
AND INDIR_BC
DRV_C INDIR_CA
INDIR_BC
0
REV_C
AND OR
15 ms
INDIR_CA
AND REV_PP
OR 0
15 ms
Figure 177: Composition of phase selection signals for reverse direction
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Technical manual
AND
INDIR_A
AND FWD_IPH
DFW_A AND OR 15 ms 0
0 15 ms
INDIR_AB
0 FWD_A
AND OR
DFW_AB 15 ms
INDIR_CA
AND
AND
DFW_CA
0 FWD_G
INDIR_B OR
15 ms
AND
DFW_B
AND
INDIR_AB 0 FWD_B
AND OR 15 ms
INDIR_BC 15 ms 0 FWD_2PH
AND OR
AND 0 15 ms
DFW_BC
INDIR_C
AND AND
DFW_C FWD_C
0
INDIR_BC 15 ms
AND OR
INDIR_CA 0 FWD_3PH
AND
AND 15 ms
FWD_PP
OR 0
15 ms
Figure 178: Composition of phase selection signals for forward direction

Figure179 presents the composition of output signals TRIP and START, where internal signals
STNDPP, STFWPP and STRVPP are the equivalent to internal signals STNDPE, STFWPE and STRVPE,
but for the phase-to-phase loops.
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Technical manual
TimerPP=Disabled
tPP
AND AND
t
TRIP
OR OR
tPE
TimerPE=Disabled
t
AND AND
STNDPP
STFWPP OR
STRVPP
RI
OR
STNDPE
STFWPE OR
STRVPE
ANSI08000441 1-1-en.vsd
ANSI08000441-1 V1 EN-US
Figure 179: TRIP and START signal logic
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Technical manual

GUID-9E13C38A-3B6D-402B-98A6-6CDA20632CE7 v4
Table 184: FRPSPDIS (21) technical data

(5-500)% of IBase ±1.0% of In at I ≤ In
Reactive reach, positive (0.50–3000.00) Ω/phase ±2.0% static accuracy

sequence ±2.0 degrees static angular accuracy
Conditions:
Resistive reach, positive (0.10–1000.00) Ω/phase Voltage range: (0.1-1.1) x Vn
sequence
Reactive reach, zero sequence (0.50–9000.00) Ω/phase Angle: at 0 degrees and 85 degrees
Resistive reach, zero sequence (0.50–3000.00) Ω/phase

ground faults, forward and
reverse
Fault resistance, Ph-Ph faults, (0.50–3000.00) Ω/loop
forward and reverse
Load encroachment criteria:
Load resistance, forward and (1.00–3000.00) Ω/phase
reverse (5-70) degrees
Safety load impedance angle
7.11 High speed distance protection ZMFPDIS (21) GUID-CC4F7338-2281-411D-B55A-67BF03F31681 v3
7.11.1 Identification GUID-8ACD3565-C607-4399-89D2-A05657840E6D v3

High speed distance protection zone ZMFPDIS 21
S00346 V1 EN-US
7.11.2 Functionality GUID-2E34AB7F-886E-499F-8984-09041A89238D v6
The ZMFPDIS function is a six zone full scheme protection with three fault loops for phase-to-
phase faults and three fault loops for phase-to-ground faults for each of the independent zones,
which makes the function suitable in applications with single-phase autoreclosing.
In each measurement zone, ZMFPDIS function is designed with the flexibility to operate in either
quadrilateral or mho characteristic mode for separate phase-to-earth or phase-to-phase loops.
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Technical manual
The zones can operate independently of each other. Zones 3 to 5 in directional (forward or reverse)
or non-directional mode. Zone1 and zone2 are designed to measure in forward direction only,
while one zone (ZRV) is designed to measure in the reverse direction. This makes them suitable,
together with a communication scheme, for protection of power lines and cables in complex
network configurations, such as parallel lines, multi-terminal lines, and so on.
A built-in adaptive load compensation algorithm prevents overreaching of the distance zones in
the load exporting end during phase-to-ground faults on heavily loaded power lines. It also
reduces underreach in the importing end.
The ZMFPDIS function block itself incorporates a phase-selection element and a directional
element, contrary to previous designs in the 600-series, where these elements were represented
with separate function-blocks.
The operation of the phase-selection element is primarily based on current change criteria (i.e.
delta quantities), with significantly increased dependability. Naturally, there is also a phase
selection criterion operating in parallel which bases its operation only on voltage and current
phasors.
The directional element utilizes a set of well-established quantities to provide fast and correct
directional decision during various power system operating conditions, including close-in three-
phase faults, simultaneous faults and faults with only zero-sequence in-feed.
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Technical manual
7.11.3 Function block GUID-322E158B-C2A1-4F0D-A749-01C7942875ED v1
ZMFPDIS (21)
I3P* TRIP
V3P* TRZ1
BLOCK TR_A_Z1
LOVBZ TR_B_Z1
BLKZ1 TR_C_Z1
BLKZ2 TRZ2
BLKZ3 TR_A_Z2
BLKZ4 TR_B_Z2
BLKZ5 TR_C_Z2
BLKZRV TRZ3
BLKTRZ1 TRZ4
BLKTRZ2 TRZ5
BLKTRZ3 TRZRV
BLKTRZ4 BFI_3P
BLKTRZ5 PU_Z1
BLKTRZRV PU_ND_Z1
PU_Z2
PU_A_Z2
PU_B_Z2
PU_C_Z2
PU_ND_Z2
PU_Z3
PU_ND_Z3
PU_Z4
PU_ND_Z4
PU_Z5
STND_Z5
PU_ZRV
PU_A_RV
PU_B_RV
PU_C_RV
STNDRV
PHPUN D
NDIR_A
NDIR_B
NDIR_C
FWD_A
FWD_B
FWD_C
FWD_G
REV_A
REV_B
REV_C
REV_G
FWD_1PH
FWD_2PH
FWD_3PH
PHG_FLT
PHPH_FLT
Figure 180: ZMFPDIS (21) function block
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Technical manual
7.11.4 Signals
Table 185: ZMFPDIS (21) Input signals

SIGNAL
SIGNAL
BLOCK BOOLEAN 0 Blocks and resets timers and outputs of entire function
LOVBZ BOOLEAN 0 Blocks and resets timers and outputs of entire function
BLKZ1 BOOLEAN 0 Blocks and resets zone 1 timers and outputs
BLKZRV BOOLEAN 0 Blocks and resets reverse zone timers and outputs
BLKTRZ1 BOOLEAN 0 Blocks and resets zone 1 timers and trip outputs
BLKTRZRV BOOLEAN 0 Blocks and resets reverse zone timers and trip outputs
Table 186: ZMFPDIS (21) Output signals

TRIP BOOLEAN Trip in any phase or phases from any zone or zones
TRZ1 BOOLEAN Trip in any phase or phases from zone 1 - forward direction
TR_A_Z1 BOOLEAN Trip in phase A from zone 1 foward direction
TR_B_Z1 BOOLEAN Trip in phase B from zone 1 forward direction
TR_C_Z1 BOOLEAN Trip in phase C from zone 1 forward direction
TR_A_Z2 BOOLEAN Trip in phase A from a zone 2 forward direction
TRZ3 BOOLEAN Trip in any phase or phases from zone 3 - zone direction
TRZRV BOOLEAN Trip in any phase or phases from zone RV - reverse dir.
BFI_3P BOOLEAN Pickup in any phase or phases from any zone or zones
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Technical manual

PU_Z1 BOOLEAN Pick up of any phase or phases from a Zone 1 fault in the forward
direction
PU_ND_Z1 BOOLEAN Pick up any phase or phases from zone 1 - any direction
direction
PU_A_Z2 BOOLEAN Pick up of phase A for a zone 2 fault in forward direction
PU_B_Z2 BOOLEAN Pick up for phase B fault in forward direction
PU_C_Z2 BOOLEAN Pick up in phase C for a zone 2 fault in the forward direction
PU_ND_Z2 BOOLEAN Pick uo in any phase or phases for a zone 2 fault in any direction
direction
PU_ND_Z3 BOOLEAN Pick up any phase or phases from zone 3- any direction
PU_Z4 BOOLEAN Pick up in any pjase or phases for a zone 4 fault - zone direction
PU_ND_Z4 BOOLEAN Pick up any phase or phases from zone -4 any direction
PU_Z5 BOOLEAN Pick up in any phase or phase for Zone 5 - Zone direction
STND_Z5 BOOLEAN Pick up in any phase or phases from a zone 5 fault in any direction
PU_ZRV BOOLEAN Pick up in any phase or phase for a reverse fault
PU_A_RV BOOLEAN Pick up for a phase A reverse fault
PU_B_RV BOOLEAN Pick up for a phase B revers fault
PU_C_RV BOOLEAN Pick up for a phase C reverse fault
STNDRV BOOLEAN Pick up for a reverse zone for a fauult in nay direction
PHPUND BOOLEAN Fault detected in any phase or phases - any direction
NDIR_A BOOLEAN Fault detected in phase A - any direction
NDIR_B BOOLEAN Fault detected in phase B - any direction
NDIR_C BOOLEAN Fault detected in phase C - any direction
FWD_G BOOLEAN forward fault involving ground
REV_G BOOLEAN Fault in reverse direction involving ground
FWD_1PH BOOLEAN Single-phase fault detected - forward direction
FWD_2PH BOOLEAN Two-phase fault detected - forward direction
FWD_3PH BOOLEAN Three-phase fault detected - forward direction
PHG_FLT BOOLEAN Ph-G zone measurement enabled - any direction
PHPH_FLT BOOLEAN Ph-Ph zone measurement enabled - any direction
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Technical manual
7.11.5 Settings
Table 187: ZMFPDIS (21) Group settings (basic)

Operation Disabled - - Disabled Disable/Enable operation of the function
Enabled
RLdFwd 0.01 - 5000.00 Ohm/p 0.01 60.00 Resistance determining the load
impedance area - forward
RLdRvFactor 1 - 1000 %RLdF 1 100 Resistance factor determining the load
w impedance area - reverse
XLd 0.01 - 10000.00 Ohm/p 0.01 400.00 Resistance determining the load
LdAngle 5 - 70 Deg 1 30 Angle determining the load impedance
area
CVTType Any - - Passive type CVT selection determining filtering of the
Passive type function
None (Magnetic)
OpModePPZ1 Disabled - - Quadrilateral Enabled/Disabled and characteristic
Quadrilateral setting for Ph-Ph loops, zone 1
Mho
MhoOffset
OpModePGZ1 Disabled - - Quadrilateral Enabled/Disabled and characteristic
Quadrilateral setting for Ph-G loops, zone 1
Mho
MhoOffset
X1PPZ1 0.01 - 3000.00 Ohm/p 0.01 30.00 Positive sequence reactance reach, Ph-Ph,
zone 1
R1PPZ1 0.00 - 1000.00 Ohm/p 0.01 5.00 Positive sequence resistive reach, Ph-Ph,
zone 1
X1PGZ1 0.01 - 3000.00 Ohm/p 0.01 30.00 positive sequence reactance reach, Ph-G,
zone 1
R1PZG1 0.00 - 1000.00 Ohm/p 0.01 5.00 Positive sequence resistive reach, Ph-G,
zone 1
X0Z1 0.01 - 9000.00 Ohm/p 0.01 100.00 Zero sequence reactance reach, zone 1
R0Z1 0.00 - 3000.00 Ohm/p 0.01 15.00 Zero sequence resistive reach, zone 1
RFPPZ1 0.01 - 9000.00 Ohm/l 0.01 30.00 Fault resistance reach, Ph-Ph, zone 1
RFPGZ1 0.01 - 9000.00 Ohm/l 0.01 100.00 Fault resistance reach, Ph-G, zone 1
tPPZ1 0.000 - 60.000 s 0.001 0.000 Time delay to trip, Phase-Phase, zone 1
tPGZ1 0.000 - 60.000 s 0.001 0.000 Time delay to trip, Ground-Earth, zone 1
IMinOpPPZ1 10 - 6000 %IB 1 10 Minimum operate ph-ph current for Phase-
Phase loops, zone 1
IMinOpPGZ1 5 - 6000 %IB 1 10 minimum operate phase current for phase-
ground loops. zone 1
Mho
MhoOffset
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Technical manual

Mho
MhoOffset
X1Z2 0.01 - 3000.00 Ohm/p 0.01 40.00 Positive sequence reactance reach, zone 2
R1Z2 0.00 - 1000.00 Ohm/p 0.01 5.00 Positive sequence reactance reach, zone 2
R0Z2 0.00 - 3000.00 Ohm/p 0.01 15.00 Zero sequence reactance reach, zone 2
RFPPZ2 0.01 - 9000.00 Ohm/l 0.01 30.00 Zero sequence reactance reach, zone 2
RFPGZ2 0.01 - 9000.00 Ohm/l 0.01 100.00 Fault resistance reach, Ph-g, Zone 2
tPGZ2 0.000 - 60.000 s 0.001 0.400 Time delay to trip, Phase-Ground, zone 2
IMinOpPPZ2 10 - 6000 %IB 1 10 Time delay to trip, Phase-Phase, zone 2
IMinOpPGZ2 5 - 6000 %IB 1 10 Minimum operate phase current for phase
- ground loops, zone 2
Mho
MhoOffset
Mho
MhoOffset
DirModeZ3 Non-directional - - Forward Time delay to trip, Phase-Phase, zone 2
Forward
Reverse
R1Z3 0.00 - 1000.00 Ohm/p 0.01 5.00 Positive sequence resistive reach, zone 3
Phase loops, zone 3
IMinOpPGZ3 5 - 6000 %IB 1 10 Minimum operate phase current for phase-
ground loops, zone 3
Mho
MhoOffset
Mho
MhoOffset
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Technical manual

DirModeZ4 Non-directional - - Forward Direction of zone 4 (which will be the Fw
Forward direction of zone 4)
Reverse
X0Z4 0.01 - 9000.00 Ohm/p 0.01 120.00 Positive sequence resistive reach, zone 4
RFPEZ4 0.01 - 9000.00 Ohm/l 0.01 100.00 Fault resistance reach, Ph-G, zone 4
tPGZ4 0.000 - 60.000 s 0.001 1.200 Time delay to trip, Phase-ground, zone 4
IMinOpPPZ4 10 - 6000 %IB 1 10 How start of trip delay timers should be
linked for zone 4
Mho
MhoOffset
Mho
MhoOffset
Reverse
RFPEZ5 0.01 - 9000.00 Ohm/l 0.01 100.00 Fault resistance reach, Ph-G, zone 5
Phase loops, zone 5
OpModePPZRV Disabled - - Quadrilateral Enabled/Disabled and characteristic
Quadrilateral setting for Ph-Ph loops, zone RV
Mho
MhoOffset
OpModePGZRV Disabled - - Quadrilateral Enabled/Disabled and characteristic
Quadrilateral setting for Ph-G loops, zone RV
Mho
MhoOffset
tPPZRV 0.000 - 60.000 s 0.001 0.000 Time delay to trip, Phase-Phase, zone RV
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Technical manual

tPEZRV 0.000 - 60.000 s 0.001 0.000 Time delay to trip, Phase -Ground, zone RV
IMinOpPPZRV 10 - 6000 %IB 1 10 Minimum operate ph-ph current for Phase-
Phase loops, zone RV
IMinOpPGZRV 5 - 6000 %IB 1 10 Minimum operate phase current for phase-
ground loops, zone RV
X1ZRV 0.01 - 3000.00 Ohm/p 0.01 40.00 Positive sequence reactance reach, zone
RV
R1ZRV 0.00 - 1000.00 Ohm/p 0.01 5.00 Positive sequence resistive reach, zone RV
X0ZRV 0.01 - 9000.00 Ohm/p 0.01 120.00 Zero sequence reactance reach, zone RV
R0ZRV 0.00 - 3000.00 Ohm/p 0.01 15.00 Zero sequence resistive reach, zone RV
RFPPZRV 0.01 - 9000.00 Ohm/l 0.01 30.00 Fault resistance reach, Ph-Ph, zone RV
RFPGZRV 0.01 - 9000.00 Ohm/l 0.01 100.00 Fault resistance reach Ph-G. zone RV
Table 188: ZMFPDIS (21) Group settings (advanced)

ZoneLinkPU Phase Selection - - Phase Selection Select. of start source for all ZoneLinked
1st starting zone trip delay timers
3I0Enable_PG 5 - 400 %MaxIP 1 400 3I0 limit for releasing Phase-to-Ground
h measuring loops
TimerModeZ1 Disable all - - Enable Ph-G On/Off setting for Ph-Ph and Ph-G trip
Enable Ph-G PhPH output, zone 1
Enable PhPh
Enable Ph-G PhPH
TimerLinksZ1 LoopLink (tPP & - - LoopLink (tPP & How start of trip delay timers should be
tPG) tPG) linked for zone 1
LoopLink &
ZoneLink
no links
TimerModeZ2 Disable all - - Enable Ph-G On/off setting for Ph-Ph and Ph-G trip
Enable PhPh
Enable Ph-G PhPH
LoopLink &
ZoneLink
no links
Enable Ph-G PhPH output, Zone 3
Enable PhPh
Enable Ph-G PhPH
LoopLink &
ZoneLink
no links
TimerLinksZ4 Disable all - - Enable Ph-G On/off setting for Ph-Ph and Ph-G trip
Enable Ph-G PhPH output Zone 4
Enable PhPh
Enable Ph-G PhPH
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Technical manual

LoopLink &
ZoneLink
no links
Enable PhPh
Enable Ph-G PhPH
LoopLink &
ZoneLink
no links
TimerModeZRV Disable all - - Enable Ph-G On/off setting for Ph-Ph and Ph-G trip
Enable Ph-G PhPH outout, zone RV
Enable PhPh
Enable Ph-G PhPH
TimerLinksZRV LoopLink (tPP & - - LoopLink (tPP & How start of trip delay timers should be
tPG) tPG) linked for zone RV
LoopLink &
ZoneLink
no links
Table 189: ZMFPDIS (21) Non group settings (basic)

groups
ZDbRepInt 1 - 300 Type 1 10 Cycl: Report interval (s), Db: In % of range,
Int Db: In %s
ZMax 0.0 - 5000.0 Ohm 0.1 1500.0 Maximum value in ohm
ZRepTyp Cyclic - - Cyclic Reporting type
Dead band
Int deadband
ZAngDbRepInt 1 - 300 Type 1 10 Cycl: Report interval (s), Db: In % of range,
Int Db: In %s
Table 190: ZMFPDIS (21) Non group settings (advanced)

ZZeroDb 0 - 100000 m% 1 100 Zero point clamping
ZHiHiLim 0.0 - 5000.0 Ohm 0.1 1350.0 High High limit in ohm
ZHiLim 0.0 - 5000.0 Ohm 0.1 1200.0 High limit in ohm
ZLowLim 0.0 - 5000.0 Ohm 0.1 300.0 Low limit in ohm
ZLowLowLim 0.0 - 5000.0 Ohm 0.1 150.0 Low Low limit in ohm
ZMin 0.000 - 5000.000 Ohm 0.001 0.005 Minimum value in ohm
ZLimHys 0.000 - 100.000 % 0.001 5.000 Hysteresis value in % of range and is
common for all limits
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Technical manual

ArgLdMinEd2 5 - 70 Deg 1 5 Minimum settable angle determining the
load impedance area, for 61850 Ed.2
settings
ArgLdMaxEd2 5 - 70 Deg 1 70 Maximum settable angle determining the
settings
RLdFwMinEd2 0.01 - 5000.00 Ohm/p 0.01 0.01 Minimum settable resistance determining
the load impedance area, for 61850 Ed.2
settings
RLdFwMaxEd2 0.01 - 5000.00 Ohm/p 0.01 5000.00 Maximum settable resistance determining
settings

Table 191: ZMFPDIS (21) Monitored data

2=Reverse
0=No direction
2=Reverse
0=No direction
2=Reverse
0=No direction
ABDir INTEGER 1=Forward - Direction in loop AB
2=Reverse
0=No direction
BCDIR INTEGER 1=Forward - Direction in looop BC
2=Reverse
0=No direction
CADir INTEGER 1=Forward - Direction in loop CA
2=Reverse
0=No direction
ZAIMAG REAL - Ohm ZA Amplitude, magnitude of
instantaneous value
ZAANGIM REAL - deg ZA Angle, magnitude of instantaneous
value
ZBIMAG REAL - Ohm ZB Amplitude, magnitude of
instantaneous value
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Technical manual

ZBANGIM REAL - deg ZB Angle, magnitude of instantaneous
value
ZCIMAG REAL - Ohm ZC Amplitude, magnitude of
instantaneous value
ZCANGIM REAL - deg ZC Angle, magnitude of instantaneous
value
7.11.7 Operation principle GUID-2432C04F-62E4-4817-9900-C830306FB4B0 v3
Settings, input and output names are sometimes mentioned in the following text
without its zone suffix (i.e. BLKZx instead of BLKZ3) when the description is equally
valid for all zones.
7.11.7.1 Filtering GUID-16B5060B-101C-402A-BF25-06E70FDD7836 v2
Practically all voltage, current and impedance quantities used within the ZMFPDIS function are
derived from fundamental frequency phasors filtered by a half cycle filter.
The phasor filter is frequency adaptive in the sense that its coefficients are changed based on the
estimated power system frequency.
A half cycle filter will not be able to reject both even and odd harmonics. So, while odd harmonics
will be completely attenuated, accuracy will be affected by even harmonics. Even harmonics will
not cause the distance zones to overreach however; instead there will be a slightly variable
underreach, on average in the same order as the magnitude ratio between the harmonic and
fundamental component.
7.11.7.2 Distance measuring zones GUID-74B12BB1-FE0A-4DE4-BDBE-159A438D396B v4
Figure 181 presents an outline of the different measuring loops for the six distance zones.
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Technical manual
Each distance protection zone performs like one independent distance protection function with
six measuring elements.
Transients from CVTs may have a significant impact on the transient overreach of a distance
protection. At the same time these transients can be very diverse in nature from one type to the
other; in fact, more diverse than can be distinguished by the algorithm itself in the course of a few
milliseconds. So, a setting (CVTtype) is introduced in order to inform the algorithm about the type
of CVT applied and thus providing the advantage of knowing how performance should be
optimized, even during the first turbulent milliseconds of the fault period.
There are two types of CVTs from the function point of view, the passive and the active type,
which refers to the type of ferro-resonance suppression device that is employed. The active type
requires more rigorous filtering which will have a negative impact on operate times. However, this
will be evident primarily at higher source impedance ratios (SIRs), SIR 5 and above, or close to the
reach limit.
The IEC 60044-5 transient classification is of little or no use in relation to this. It is not primarily
the damping of transients that is important; it is the frequency content of the transients that is
decisive, i.e. how difficult it is to filter out the specific frequency. So, even if two CVTs, one passive
and the other active type, comply with the same transient class, the active type requires more
extensive filtering in order to avoid transient overreach.
To avoid overreach and at the same time achieve fast operate times, a supplementary circular
characteristic is implemented. A circular characteristic exists for every measuring loop and
quadrilateral/mho characteristic. There are no specific reach settings for this circular zone. It uses
the normal quadrilateral/mho zone settings to determine a reach that will be appropriate. This
implies that the circular characteristic will always have somewhat shorter reach than the
quadrilateral/mho zone.
7.11.7.3 Phase-selection element GUID-1E718907-C321-4041-B0ED-D55104B2C9B4 v6
The operation of the phase-selection element is primarily based on current change criteria (i.e.
delta quantities) with significantly increased dependability. To handle this, there is also a phase
selection criterion operating in parallel which bases its operation only on voltage and current
phasors.
This continuous criteria will, in the vast majority of cases, operate in parallel and carry on the fault
indication after the current change phase has ended. Only in some particularly difficult faults on
heavily loaded lines, the continuous criteria might not be sufficient, for example, when the
estimated fault impedance resides within the load area defined by the load encroachment
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Technical manual
characteristic. In this case, the indication will be restricted to a pulse lasting for one or two power
system cycles.
The phase-selection element can, owing to the current change criteria, distinguish faults with
minimum influence from load and fault impedance. In other words, it is not restricted by a load
encroachment characteristic during the current change phase. This significantly improves
performance for remote phase-to-ground faults on heavily loaded lines. One exception, however,
are three-phase faults to which the load encroachment characteristic always has to be applied in
order to distinguish fault from load.
Phase-to-phase-ground faults (also called double ground faults) will practically always activate
phase-to-phase zone measurements. Measurement in two phase-to-ground loops at the same
time is associated with so-called simultaneous faults: two ground faults at the same time, one
each on the two circuits of a double line, or when the zero sequence current is relatively high due
to a source with low Z0/Z1 ratio. In these situations zone measurement will be released both for
the related phase-to-ground loops and the phase-to-phase loop simultaneously. On the other
hand, simultaneous faults closer to the remote bus will gradually take on the properties of a
phase-to-phase-ground fault and the function will eventually use phase-to-phase zone
measurements also here.
In cases where the fault current infeed is more or less completely of zero sequence nature (all
phase currents in phase), the measurement will be performed in the phase-to-ground loops only
for a phase-to-phase-ground fault.
AND
2-phase Fault
I3P detected by
Impedance/ current
2-phase fault
V3P PHSLy
based Phase AND
selection
PHSLxLy
AND
a
b
a>b
250%
OR
a
b a>b
50% AND OR
a
b
a<b
INMag
IAMag IN / Imax
IBMag
MAX
ICMag a ForcePE
b
a<b
INReleasePE
Figure 182: Phase-selection logic
Figure 182 explains the release of two-phase faults (including simultaneous faults
as well as cross-country faults for high impedance grounded networks. This is not
valid for single-phase faults.
However, should it be desirable to use phase-to-ground (and only phase-to-ground) zone

measurement for phase-to-phase-ground faults, there is a setting 3I0Enable_PG that can be
lowered from its excessive default value to the level above which phase-to-ground measurement
should be activated.
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Technical manual
7.11.7.4 Directional element GUID-24431EEC-5037-41CD-BC4A-7AC196F158F3 v4
Several criteria are employed when making the directional decision. The basis is provided by
comparing a positive sequence based polarizing voltage with phase currents. For extra security,
especially in making a very fast decision, this method is complemented with an equivalent
comparison where, instead of the phase current, the change in phase current is used. Moreover, a
basic negative sequence directional evaluation is taken into account as a reliable reference during
high load condition. Finally, zero sequence directional evaluation is used whenever there is more or
less exclusive zero sequence in-feed.
Fundamentally, the directional sectors that represent forward direction, one per measuring loop,
are defined by the following equations.
V
PolA
-15°<arg < 120°
I
A
ANSIEQUATION15059 V1 EN-US (Equation 75)
V
PolAB
-15°<arg < 120°
I
AB
Where:
VPolA is the polarizing voltage for phase A.
IA is the phase current in phase A.
VPolAB is the polarizing voltage difference between phase A and B (B lagging A).
IAB is the current difference between phase A and B (B lagging A).
The corresponding reverse directional sectors range from 165 to -60 degrees.
Since the polarizing voltage is also used for the Mho distance characteristics, the magnitude of
the voltage is just as interesting as the phase. If there are symmetrical conditions and the
measured per phase positive sequence voltage magnitude is above 75% of the base voltage
before the fault, the pre-fault magnitude will be memorized and used as long as there is a fault.
The phase angle however will only be memorized (locked) for 75 ms at a time, not to lose
synchronism with the real system voltage.
Should the positive sequence voltage drop below 2% of the base voltage, it will be considered
invalid. In this situation, directional signals and pickups from Mho elements will be sealed-in and
kept static as long as there is a fault.
For ZMFCPDIS, when option SeriesComp is chosen for OperationSC, the voltages of faulty phases
will be discarded in order not to affect the polarizing voltage with voltage reversal.
7.11.7.5 Fuse failure GUID-FA7B94D6-8BAF-4D05-8DC0-7FEBF0967D16 v3
The ZMFPDIS function has to be blocked by an additional function like the Fuse failure supervision
(FUFSPVC) or an equivalent external device. Typically, the binary input VTSZ is used for this
purpose.
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Technical manual
A built-in supervision feature within high-speed distance protection itself, based on phase current
change, will ensure that the FUFSPVC blocking signal is received in time. Namely, an intentional
time delay will be introduced if no current magnitude change greater than 5% of IBase has been
detected for any of the three phase currents.
7.11.7.6 Power swings GUID-4DFED278-014F-46C2-B124-2E0809D12FC3 v2
There is need for external blocking of the ZMFPDIS function during power swings, either from the
Power Swing Blocking function (ZMRPSB) or an external device.
7.11.7.7 Measuring principles
Quadrilateral characteristic GUID-32E76D16-41ED-4CEF-B081-8413211AA783 v5

ZMFPDIS implements quadrilateral and mho characteristic in all the six zones separately. Set
OpModePEZx or OpModePPZx to Quadrilateral, to choose particular measuring loop in a zone to
work as quadrilateral distance protection.
All ZMFPDIS zones operate according to the non-directional impedance characteristics presented
in figure 184 and figure 183. The phase-to-ground characteristic is given in ohms-per-loop domain
while the phase-to-phase characteristic is given in ohms-per-phase domain.
X (Ohm/phase)
RFPP R1PP RFPP

2 2
X 0 PE - X 1RVPE
XNRV =XX00PE PG- -
X31XRVPE
1RVPG
XNRV ==
XNRV
33
XNFW = XX
X00
PE
0 --
PE
PG X-1X 11FWPE
XFWPE
FWPG
XNFW==
XNFW
3
X1PP 3 3
j j
R (Ohm/phase)
RFPP RFPP
2 2
X1PP
RFPP R1PP RFPP

2 2
Figure 183: ZMFPDIS Characteristic for phase-to-phase measuring
345
Technical manual
X (Ohm/loop)
ϕN ϕN
(Ohm/loop)
Figure 184: ZMFPDIS Characteristic for phase-to-ground measuring, ohm/loop domain

The faulty loop in relation to the fault type can be presented as in figure 185. The main intention
with this illustration is to make clear how the fault resistive reach should be interpreted and set.
Note in particular that the setting RFPP always represents the total fault resistance of the loop,
regardless the fact that the fault resistance (arc) may be divided into parts like for three-phase or
phase-to-phase faults. The R1 + jX1 represent the positive sequence impedance from the
measuring point to the fault location.
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Technical manual
IA R1 + j X1
Phase-to-ground
VA
element
Phase-to-ground
RFPG
fault in phase A
(Arc + tower
resistance)
N
IG (R0-R1)/3 +
j (X0-X1)/3 )
VA element A-B
Phase-to-phase
fault in phase RFPP
A-B IB
VB (Arc resistance)
R1 + j X1
VA element A-C
Three-phase
fault or Phase-to-
phase-ground fault IC
VC
R1 + j X1 0.5·RFPP
Mho characteristic GUID-9269239B-3A04-44CD-BE00-FD850D42836B v2

ZMFPDIS implements quadrilateral and mho characteristic in all the six zones separately. Set
OpModePEZx or OpModePPZx setting to Mho or Offset, to choose a particular measuring loop in a
zone to work as mho (or Offset Mho) distance protection.
Zones 3 to 5 can be selected to be either forward or reverse with positive sequence polarized mho
characteristic; alternatively self polarized offset mho characteristics. The operating characteristic
is in accordance to figure 186 where zone 5 is selected offset mho.
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Technical manual
X
X
Z4
Z3
ZS=0
Z2
Z1 R
Z5 R
ZS=Z1
ZRV
ZS=2Z1
Figure 186: Mho, offset mho characteristics and the source impedance influence on the mho
characteristic
The mho characteristic has a dynamic expansion due to the source impedance. Instead of crossing
the origin, as for the mho to the left of figure 186, which is only valid where the source impedance
(Zs) is zero, the crossing point is moved to the coordinates of the negative source impedance
given an expansion of the circle shown to the right of figure 186. Z1 denotes the complex positive
sequence impedance.
The magnitude of the polarizing voltage is determined completely by the positive sequence
voltage magnitude from before the fault. This will give a somewhat less dynamic expansion of the
mho circle during faults. However, if the source impedance is high, the dynamic expansion of the
mho circle might lower the security of the function too much with high loading and mild power
swing conditions.
Basic operation characteristics GUID-E6CC3CA7-72BE-40FC-A557-7BDB62F7BC1E v2

In ZMFPDIS, each zone measurement loop characteristic can be set to mho characteristic or offset
mho characteristic by setting OpModePEZx or OpModePPZx (where x is 1-5 depending on selected
zone).
ZMFPDIS fixes zone 1 and 2 in Forward mode and zone RV in Reverse mode. Zone 3-5 can be set to
Non-directional, Forward or Reverse by setting the parameter DirModeZx (where x is 3-5
depending on selected zone).
If DirModeZx (where x is 3-5 depending on selected zone) is selected as Non-directional, the

directional element will not have any effect on the measurement loop and operation of the
function. When DirModeZx (where x is 3-5 depending on selected zone) is selected as Forward or
Reverse, directional lines are introduced. Information about the directional lines is given from the
directional element. Basic Mho and offset Mho characteristics with different mode settings are
indicated in figure 187.
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Technical manual
X X X
(a) Rset (b) (c) Rset
Xset Xset
R R R
Xset
(a)-(f)
Rset For phase-to-phase fault
Rset  R1Zx
Forward Reverse Non-directional
Xset  X 1Zx
Mho Characteristics For phase-to-earth fault
Rset  R1Zx  RNZx
Xset  X 1Zx  XNZx
(d) X
(e) X (f) X X 0 Zx  X 1Zx
XNZx 
3
R 0 Zx  R1Zx
RNZx 
Rset 3
Rset Rset
Xset Xset Xset
R R R
Xset Xset Xset
Rset Rset Rset
Forward Reverse Non-directional

Offset Mho Characteristics
(a) and (c) are for Zone 1, Zone 2 and Zone 3-5 when DirModeZ3-5 = Forward.
(b) and (d) are for ZoneRV and Zone 3-5 when DirModeZ3-5 = Reverse
(c) and (f) are for Zone 3-5 when DirModeZ3-5 = Non-Directional
Figure 187: Mho and offset Mho characteristics

For each zone, the impedance is set in cartesian coordinates (resistance and reactance) which is
the same as for quadrilateral characteristic.
The ZMFPDIS function has only one set of reach setting so the reverse will be the same as for the
forward reach, meaning that the non-directional offset mho characteristic will always be centered
around the origin. In detail, for Zone 1, the resistive and reactance reaches for phase-to-earth fault
and phase-to-phase fault are set individually using the settings R1PPZ1, X1PPZ1, R1PEZ1, X1PEZ1,
X0Z1 and R0Z1. In Zone 2-5 and Zone RV, the same zone reach settings are used for phase-to-earth
fault and phase-to-phase (R1Zx, X1Zx, X0Zx and R0Zx, x=2-5 or RV).
Theory of operation SEMOD154224-46 v6

Phase-to-phase fault SEMOD154224-240 v2

Mho GUID-D162893C-918A-4DDA-AAC2-0D0A814D85C1 v1
The plain Mho circle has the characteristic as in figure 188. The condition for deriving the angle β is
349
Technical manual
(
b = arg VAB - I AB × Z 1set - arg V pol ) ( )
where

ANSI V1 EN-US
EQUATION1790-

ANSI V1 EN-US
EQUATION1791-
is the positive sequence impedance setting for phase-to-phase fault in zone direction
Z 1set
For Zone 1,
Z 1set = R1PPZ 1 + j ⋅ X 1PPZ 1

IECEQUATION15011 V1 EN-US (Equation 78)
where
R1PPZ1 is the positive sequence resistive reach for phase-to-phase fault for zone 1
X1PPZ1 is the positive sequence reactance reach for phase-to-phase fault for zone 1
For Zone 2-5 and RV
Z 1set = R1Zx + j ⋅ X 1Zx

where
R1Zx is the positive sequence resistive reach for zone x (x=2-5 and RV)
X1Zx is the positive sequence reactance reach for zone x (x=2-5 and RV)
is the polarizing voltage
Vpol
Operation occurs if 90°≤β≤270°
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Technical manual
I AB  jX
I L1L 2  Z1set
Vcomp  VAB  I AB  Z1set
VAB
V pol
I AB  R
Offset Mho GUID-3E13E6D5-0832-4386-9677-9A40BFF42F8F v1
The characteristic for offset mho is a circle where two points on the circle are given by the two
vectors Z 1set and Z 1RVset where Z 1set and Z 1RVset are settable through the resistance and
reactance settings in forward and reverse directions.
compensated voltages is greater than or equal to 90° (figure 189). The angle will be 90° for fault
location on the boundary of the circle.
The angle β for A to B fault can be defined according to equation below.
 V − I ⋅ Z1 
AB AB set
β = arg  
 (
 VAB − − I AB ⋅ Z 1RVset ) 

where
is the positive sequence impedance setting for phase-to-phase fault opposite to zone
Z 1RVset direction and is defined as
351
Technical manual
For Zone 1,
Z 1RVset = R1PPZ 1 + j ⋅ X 1PPZ 1
For Zone 2-5 and RV,
Z 1RVset = R1Zx + j ⋅ X 1Zx
I AB  jX
Vcomp1  VAB  I AB  Z 1set
I AB  Z 1set
VAB
Vcomp 2  VAB  (  I AB  Z 1RVset )
I AB  Z 1RVset
I AB  R
Figure 189: Simplified offset mho characteristic and voltage vector for phase A to B fault
Operation occurs if 90°≤β≤270 °.
Phase-to-ground fault GUID-DB8CF641-0D3F-4F7A-A628-829F3DB0AC5B

SEMOD154224-283 v2
v1
The measuring of earth faults uses earth return compensation applied in a conventional way. The
compensation voltage is derived by considering the influence from the earth return path.
Compensation for earth return path for faults involving earth is done by setting the positive and
zero sequence impedance of the line. It is known that the ground compensation factor KN is,
352
Technical manual
Z 0set − Z 1set
KN =
3 ⋅ Z 1set
IECEQUATION15017 V1 EN-US
Z 0set = R 0Zx + j ⋅ X 0 Zx
For Zone 1,
Z 1set = R1PEZ 1 + j ⋅ X 1PEZ 1

Z 1set = R1Zx + j ⋅ X 1Zx
where
is the complex zero sequence impedance of the line in Ω/phase
Z 0set
is the complex positive sequence impedance of the line in Ω/
Z 1set phase
R1PEZ1 is the positive sequence resistive reach of the line in Ω/phase
for phase-to-ground fault for zone 1
X1PEZ1 is the positive sequence reactance reach of the line in Ω/phase
for phase-to-ground fault for zone 1
R0Zx is the zero sequence resistive reach of the line in Ω/phase for
zone x (x=2-5, or RV)
X0Zx is the zero sequence reactance reach of the line in Ω/phase for
zone x (x=2-5, or RV)
For an earth fault in phase A, the angle β between the compensation voltage and the polarizing
voltage Vpol is,
β = arg [VA − ( I A + 3I 0 ⋅ K N ) ⋅ Z 1set ] − arg(V pol )

where
is the phase voltage in faulty phase A
VA
is the phase current in faulty phase A
IA
3I0 is the zero-sequence current in faulty phase A

Z 1set phase for phase-to-ground fault in zone direction
is the polarizing voltage for phase A

Vpol
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Technical manual
IA•jX
Vcomp  VA  ( I A  3I 0  K N )  Z1set
3I 0  K N  Z1set
VA
I A  Z1set
V pol
IA•R
fault
Operation occurs if 90°≤β≤270°.
Offset mho GUID-B1EF3931-7B86-4C7B-BCEA-3034482BA240 v1

The condition for operation of offset mho at phase-to-earth fault is that the angle β between the
two compensated voltages is equal to or greater than 90°, see figure 191. The angle will be 90° for
fault location on the boundary of the circle.
( ) {
β = arg VA − ( I A + 3I 0 ⋅ K N ) ⋅ Z 1set − arg VA −  −( I A + 3I 0 ⋅ K N ⋅ Z 1RVset ] ) }
where
Z 1RVset phase for phase-to-ground fault opposite to zone direction and
is defined as,
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Technical manual
For Zone 1,
Z 1RVset = R1PEZ 1 + j ⋅ X 1PEZ 1
Z 1RVset = R1Zx + j ⋅ X 1Zx
IA• jX
Vcomp1  VA  ( I A  3I 0  K N )  Z1set

( I A  3I 0  K N )  Z1set
VA
Vcomp 2  VA   ( I A  3I 0  K N )  Z1RVset )
( I A  3I 0  K N )  Z1RVset
IA• R
fault
Operation occurs if 90 °≤β≤270 °.
7.11.7.8 Load encroachment GUID-6785BF05-2775-4422-8077-A663D01C6C07 v4
In some cases the measured load impedance might enter the set zone characteristic without any
fault on the protected line. This phenomenon is called load encroachment and it might occur when
an external fault is cleared and high emergency load is transferred onto the protected line. The
effect of load encroachment is illustrated on the left in figure192. The entrance of the load
impedance inside the characteristic is of course not desirable and the way to handle this with
conventional distance protection is to consider this with the resistive reach settings, that is, to
have a security margin between the distance zone characteristic and the minimum load
impedance. Such a solution has the drawback that it will reduce the sensitivity of the distance
protection, that is, the ability to detect resistive faults.
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Technical manual
The IED has a built in feature which shapes the characteristic according to the characteristic
shown in figure192. The load encroachment algorithm will increase the possibility to detect high
fault resistances, especially for phase-to-ground faults at remote line end. For example, for a given
setting of the load angle LdAngle, the resistive blinder for the zone measurement can be set
according to figure192 affording higher fault resistance coverage without risk for unwanted
operation due to load encroachment. Separate resistive blinder settings are available in forward
and reverse direction.
The use of the load encroachment feature is essential for long heavily loaded lines, where there
might be a conflict between the necessary emergency load transfer and necessary sensitivity of
the distance protection. The function can also preferably be used on heavy loaded, medium long
lines. For short lines, the major concern is to get sufficient fault resistance coverage. Load
encroachment is not a major problem. See section "".
Zm Zm
ZL
Load impedance area in LdAngle

forward direction LdAngle
R R
LdAngle
LdAngle
RldRev RLdFwd
Figure 192: Load encroachment phenomena and shaped load encroachment characteristic
[1]
7.11.7.9 Simplified logic schemes GUID-B43F2F0B-C8A2-4CFD-A9DD-51E167A90B56 v5
PHSA, PHSB,...PHSCA are internal binary logical signals from the Phase-selection element. They
correspond directly to the six loops of the distance zones and determine which loops should be
released to possibly issue a pickup or a trip.
FWA, FWB,...FWCA and RVA, RVB,...RVCA are the internal binary signals from the Directional
element. An FW signal is activated if the criteria for a forward fault or load is fulfilled for its
particular loop. The equivalent applies to the reverse (RV) signals.
The internal input 'IN present' is activated if the residual current (3I0) exceeds 10% of the
maximum phase current magnitude and at the same time is above 5% of IBase. However, if current
transformer saturation is detected, this criterion is changed to residual voltage (3V0) exceeding
5% of VBase/sqrt(3) instead.
[1] RLdRv=RLdRvFactor*RLdFw
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Technical manual
FWD(n & mn) DIR(n & mn)Z1
REV(n & mn) DIR(n & mn)ZRV
DirModeZ3-5
TRUE (1) Non-directional
FWD(n & mn) Forward DIR(n & mn)Z3-5
REV(n & mn) Reverse
Figure 193: Connection of directional signals to Zones
PGZx
OR
ZMAZx
PHSA AND
DIRAZx AND
ZMBZx
PHSB AND
DIRBZx AND
ZMCZx AZx
OR
PHSC AND
DIRCZx AND
ZMABZx BZx
OR
PHSAB AND
DIRABZx AND
ZMLBCZx CZx
PHSBC AND OR
DIRBCZx AND
ZMCAZx
PHSCA AND
DIRCAZx AND
PPZx
OR
NDZx
OR
Figure 194: Intermediate logic
357
Technical manual
TimerModeZx =
Enable Ph-Ph,
Ph-G
PPZx AND
OR AND
AND tPPZx
0
TZx
PGZx AND OR
OR
AND tPPZx
0 AND
BLOCK
LOVBZ
BLKZx OR
BLKTRZx
OR TimerLinksZx
LoopLink (tPP-tPG)
ZoneLinkStart LoopLink & ZoneLink
OR
PUPHS Phase Selection no links
1st pickup zone
LNKZ1 FALSE (0)
LNKZ2
LNKZRV LNKZx
AND
LNKZ3 OR
TimerLinksZx =
LNKZ4 LoopLink & ZoneLink
LNKZ5
Figure 195: Logic for linking of timers
358
Technical manual
TZx 0 TRIPZx
15 ms AND
BLKTRZx
TR_A_Zx
OR AND
BLOCK
LOVBZ TR_B_Zx
OR AND
BLKZx
TR_B_Zx
AND
AZx 0 PU_A_Zx
15 ms AND
BZx 0 PU_B_Zx
15 ms AND
CZx 0 PU_C_Zx
15 ms AND
PPZx
PGZx OR 0 PU_Zx
15 ms AND
NDZx 0 PU_ND_Zx
15 ms AND
Figure 196: Pickup and trip outputs
359
Technical manual
OR 0 PHG_FLT
15 ms AND
PHSA
PHSB OR 0
15 ms AND
PHSC
OR 0
PHSAB 15 ms AND
PHSBC
OR 0
15 ms AND
PHSCA
OR 0 PHPH_FLT
15 ms AND
BLOCK PU_ND
OR
LOVBZ OR
PU_PHS
Figure 197: Additional pickup outputs 1
360
Technical manual
PHSA
FWA AND
PHSB
OR 0 FWD_A
FWB AND
15 ms AND
PHSC
FWC AND
OR 0 FWD_B
PHSAB 15 ms AND
FWAB AND
PHSBC
FWBC AND OR 0 FWD_C
PHSCA 15 ms AND
FWCA AND
OR
FWD_G
IN present AND
FWD_1PH
=1
BLOCK
LOVBZ OR
FWD_2PH
=2
FWD_3PH
=3
PHSA
RVA AND
PHSB
OR 0 REV_A
RVB AND
15 ms AND
PHSC
RVC AND
OR 0 REV_B
PHSAB 15 ms AND
RVAB AND
PHSBC
RVBC AND OR 0 REV_C
PHSCA 15 ms AND
RVCA AND
OR
REV_G
IN present AND
BLOCK
LOVBZ OR
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Technical manual
7.11.7.10 Measurement
Measurement supervision SEMOD54417-130 v3

The protection, control, and monitoring IEDs have functionality to measure and further process
information for currents and voltages obtained from the pre-processing blocks. The number of
processed alternate measuring quantities depends on the type of IED and built-in options.
The information on measured quantities is available for the user at different locations:
• Locally by means of the local HMI

• Remotely using the monitoring tool within PCM600 or over the station bus
• Internally by connecting the analog output signals to the Disturbance Report function
GUID-8568A19F-0100-4A1A-B3C3-444FD7D6F00B v1
X equals Z in the name of the below mentioned settings.
Zero point clamping GUID-4894EF16-3376-48EB-863F-9CE14487ACAB v1

Measured value below zero point clamping limit is forced to zero. This allows the noise in the input
signal to be ignored. The zero point clamping limit is a setting (XZeroDb where X equals Z).
Continuous monitoring of the measured quantity SEMOD54417-140 v4

Users can continuously monitor the measured quantity available in the function block by means of
four defined operating thresholds, see figure 200. The monitoring has two different modes of
operating:
• Overfunction, when the measured current exceeds the High limit (XHiLim) or High-high limit
(XHiHiLim) pre-set values
• Underfunction, when the measured current decreases under the Low limit (XLowLim) or Low-
low limit (XLowLowLim) pre-set values.
X_RANGE is illustrated in figure 200.
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Technical manual
X_RANGE = 3
High-high limit
X_RANGE= 1 Hysteresis
High limit
X_RANGE=0
X_RANGE=0 t
Low limit
X_RANGE=2
Low-low limit
X_RANGE=4
Figure 200: Presentation of operating limits

Each analog output has one corresponding supervision level output (X_RANGE). The output signal
is an integer in the interval 0-4 (0: Normal, 1: High limit exceeded, 3: High-high limit exceeded, 2:
below Low limit and 4: below Low-low limit). The output may be connected to a measurement
expander block (XP (RANGE_XP)) to get measurement supervision as binary signals.
The logical value of the functional output signals changes according to figure 200.
The user can set the hysteresis (XLimHyst), which determines the difference between the
operating and reset value at each operating point, in wide range for each measuring channel
separately. The hysteresis is common for all operating values within one channel.
Actual value of the measured quantity SEMOD54417-150 v3

The actual value of the measured quantity is available locally and remotely. The measurement is
continuous for each measured quantity separately, but the reporting of the value to the higher
levels depends on the selected reporting mode. The following basic reporting modes are available:
• Cyclic reporting (Cyclic)

• Magnitude dead-band supervision (Dead band)
• Integral dead-band supervision (Int deadband)
Cyclic reporting SEMOD54417-158 v3

The cyclic reporting of measured value is performed according to chosen setting (XRepTyp). The
measuring channel reports the value independent of magnitude or integral dead-band reporting.
In addition to the normal cyclic reporting the IED also report spontaneously when measured value
passes any of the defined threshold limits.
363
Technical manual
Y
Value Reported Value Reported
(1st)
Y3 Value Reported
Y2 Y4
Y1 Y5
t (*) t (*) t (*) t (*)
t
Value 1
Value 2
Value 3
Value 4
Value 5
(*)Set value for t: XDbRepInt IEC05000500-2-en.vsdx
Figure 201: Periodic reporting
Magnitude dead-band supervision SEMOD54417-163 v5

If a measuring value is changed, compared to the last reported value, and the change is larger than
the ±ΔY pre-defined limits that are set by user (UDbRepIn), then the measuring channel reports
the new value to a higher level. This limits the information flow to a minimum necessary.
Figure 202 shows an example with the magnitude dead-band supervision. The picture is
simplified: the process is not continuous but the values are evaluated with a time interval of one
execution cycle from each other.
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Technical manual
Value Reported
Y

Value Reported
(1st)
Y3 Y
Y
Y2 Y
Y
Y
Y
Y1
Figure 202: Magnitude dead-band supervision reporting

After the new value is reported, the ±ΔY limits for dead-band are automatically set around it. The
new value is reported only if the measured quantity changes more than defined by the ±ΔY set
limits.
Integral dead-band reporting SEMOD54417-167 v4

The measured value is reported if the time integral of all changes exceeds the pre-set limit
(XDbRepInt), figure 203, where an example of reporting with integral dead-band supervision is
shown. The picture is simplified: the process is not continuous but the values are evaluated with a
time interval of one execution cycle from each other.
The last value reported, Y1 in figure 203 serves as a basic value for further measurement. A
difference is calculated between the last reported and the newly measured value and is multiplied
by the time increment (discrete integral). The absolute values of these integral values are added
until the pre-set value is exceeded. This occurs with the value Y2 that is reported and set as a new
base for the following measurements (as well as for the values Y3, Y4 and Y5).
The integral dead-band supervision is particularly suitable for monitoring signals with small
variations that can last for relatively long periods.
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Technical manual
Y A1 >=
A >= pre-set value
A2 >=
pre-set value pre-set value
Y3 A3 + A4 + A5 + A6 + A7 >=
pre-set value
Y2 A1 A2
A4 A6
Value Reported Y4 A3 A5 A7
Value
(1st) Value
A Reported Y5
Reported Value
Reported Value
Y1 Reported
t
Figure 203: Reporting with integral dead-band supervision
Measurement ZMMXU GUID-2DB6F5A4-A3C2-4BBA-8327-393B7F89EDC6 v1

The magnitude and angle of the impedance for each phase are available on the outputs (ZLxMAG
and ZLxANGL (x=1,2,3)). Each analogue output has a corresponding supervision level output
(ZLxRANG, ZLxANGR). The supervision output signal is an integer in the interval 0-4, see section
“Measurement supervision”.
Impedance measurement is calculated based on VA / IA , VB / IB , VC / IC , where VX and IX are

phase-to-ground voltage and phase-to-ground current.
When the operating current is too low, the impedance measurement can be erroneous. In order to
avoid such error, minimum operating current will be checked. For phase currents lower than 3% of
IBase, the magnitude of impedance is force to 9999999 and the angle is forced to 0 degree.
Inside the function, to ensure the readability of the output for the users, ZLxMAG and ZLxANGL
(x=1,2,3) will not change more often than a certain time period, for example, every 100 ms.
366
Technical manual

GUID-6C2EF52A-8166-4A23-9861-38931682AA7D v7
Table 192: ZMFPDIS, ZMFCPDIS (21) technical data

Number of zones 3 selectable -
directions, 3 fixed
directions
Minimum operate current, (5-6000)% of IBase ±1.0% of In
phase-to-phase and phase-to-
ground
Positive sequence reactance (0.01 - 3000.00) Pseudo continuous ramp:
reach, phase-to-ground and ohm/p ±2.0% of set value
phase-to-phase loop Conditions:
Positive sequence resistance (0.00 - 1000.00) Ramp of shots:
reach, phase-to-ground and ohm/p ±2.0% of set value
Angle: At 0 degrees and 85
phase-to-phase loop Conditions:
degrees
Zero sequence reactance (0.01 - 9000.00) IEC 60255-121 points IEC 60255-121 point B
reach ohm/p A,B,C,D,E
Zero sequence resistive reach (0.00 - 3000.00)

ohm/p
Fault resistance reach, phase- (0.01 -9000.00)
to-ground and phase-to-phase ohm/l
Dynamic overreach < 5% at 85 degrees -
measured with CVTs
and 0.5 < SIR < 30,
IEC 60255-121
Directional blinders Forward: -15 – 120 Pseudo continuous ramp:
degrees ±2.0 degrees, IEC 60255-121
Reverse: 165 – -60
degrees
Resistance determining the (0.01 - 5000.00) Pseudo continuous ramp: Ramp of shots:
load impedance area - forward ohm/p ±2.0% of set value ±5.0% of set value
Conditions: Conditions:
Tested at ArgLd = 30 Tested at ArgLd = 30
degrees degrees
Angle determining the load 5 - 70 degrees Pseudo continuous ramp:
impedance area ±2.0 degrees
Conditions:
Tested at RLdFw = 20 ohm/p
Definite time delay to trip, (0.000-60.000) s ±0.2% of set value or ±35 ms whichever is greater
phase-to-ground and phase-
to-phase operation
Operate time 16 ms typically, IEC -
60255-121
Reset time at 0.1 to 2 x Zreach Min. = 20 ms -
Max. = 35 ms
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Technical manual
7.12 High speed distance protection for series compensated

lines ZMFCPDIS (21) GUID-ED71CF5A-1453-4F2F-9C64-3A73C59EA948 v3
7.12.1 Identification GUID-0F03DA72-0687-4762-91CB-EC8E59B86E06 v2

High speed distance protection zone ZMFCPDIS 21
(zone 1-6)
S00346 V1 EN-US
7.12.2 Functionality GUID-C5C1ADD8-50A5-4485-848C-77D2222B56DC v6
High speed distance protection (ZMFCPDIS, 21) provides sub-cycle, down towards half-cycle,
operate time for basic faults within 60% of the line length and up to around SIR 5. At the same
time, it is specifically designed for extra care during difficult conditions in high voltage
transmission networks, like faults on long heavily loaded lines and faults generating heavily
distorted signals. These faults are handled with utmost security and dependability, although
sometimes with reduced operating speed.
High speed distance protection ZMFCPDIS is fundamentally the same function as ZMFPDIS but
provides more flexibility in zone settings to suit more complex applications, such as series
compensated lines. In operation for series compensated networks, the parameters of the
directional function are altered to handle voltage reversal.
The ZMFCPDIS function is a six-zone full scheme protection with three fault loops for phase-to-
phase faults and three fault loops for phase-to-ground faults for each of the independent zones,
which makes the function suitable in applications with single-phase autoreclosing.
In each measurement zone, ZMFCPDIS function is designed with the flexibility to operate in either
quadrilateral or mho characteristic mode for separate phase-to-earth or phase-to-phase loops.
The zones can operate independently of each other. Zones 3 to 5 in directional (forward or reverse)
or non-directional mode. Zone1 and zone2 are designed to measure in forward direction only,
while one zone (ZRV) is designed to measure in the reverse direction. This makes them suitable,
together with a communication scheme, for protection of power lines and cables in complex
network configurations, such as parallel lines, multi-terminal lines, and so on.
A new built-in adaptive load compensation algorithm prevents overreaching of the distance zones
in the load exporting end during phase-to-ground faults on heavily loaded power lines. It also
reduces underreach in the importing end.
The ZMFCPDIS function block incorporates a phase-selection element and a directional element,
contrary to previous designs in the IED series, where these elements were represented with
separate function blocks.
The operation of the phase-selection element is primarily based on current change criteria, with
significant increased dependability. Naturally, there is also a part operating with continuous
criteria that operates in parallel
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Technical manual
The directional element utilizes a set of well-established quantities to provide fast and correct
directional evaluation during various conditions, including close-in three-phase faults,
simultaneous faults and faults with only zero-sequence in-feed.
7.12.3 Function block GUID-CBB51E18-15E5-4BC5-A002-6371A6DC725A v1
ZMFCPDIS (21)
I3P* TRIP
V3P* TRZ1
BLOCK TR_A_Z1
LOVBZ TR_B_Z1
BLKZ1 TR_C_Z1
BLKZ2 TRZ2
BLKZ3 TR_A_Z2
BLKZ4 TR_B_Z2
BLKZ5 TR_C_Z2
BLKZRV TRZ3
BLKTRZ1 TRZ4
BLKTRZ2 TRZ5
BLKTRZ3 TRZRV
BLKTRZ4 BFI_3P
BLKTRZ5 PU_Z1
BLKTRZRV PU_ND_Z1
PU_Z2
PU_A_Z2
PU_B_Z2
PU_C_Z2
PU_ND_Z2
PU_Z3
PU_ND_Z3
PU_Z4
PU_ND_Z4
PU_Z5
STND_Z5
PU_ZRV
PU_A_RV
PU_B_RV
PU_C_RV
STNDRV
PHPUN D
NDIR_A
NDIR_B
NDIR_C
FWD_A
FWD_B
FWD_C
FWD_G
REV_A
REV_B
REV_C
REV_G
FWD_1PH
FWD_2PH
FWD_3PH
PHG_FLT
PHPH_FLT
Figure 204: ZMFCPDIS (40) function block
369
Technical manual
7.12.4 Signals
Table 193: ZMFCPDIS (21) Input signals

SIGNAL
SIGNAL
BLOCK BOOLEAN 0 Blocks and resets timers and outputs of entire function
LOVBZ BOOLEAN 0 Blocks and resets timers and outputs of entire function
BLKZRV BOOLEAN 0 Blocks and resets reverse zone timers and outputs
BLKTRZRV BOOLEAN 0 Blocks and resets reverse zone timers and trip outputs
Table 194: ZMFCPDIS (21) Output signals

TRIP BOOLEAN Trip in any phase or phases from any zone or zones
TR_A_Z1 BOOLEAN Trip in phase A from zone 1 foward direction
TR_A_Z2 BOOLEAN Trip in phase A from a zone 2 forward direction
TRZRV BOOLEAN Trip in any phase or phases from zone RV - reverse dir.
BFI_3P BOOLEAN Pickup in any phase or phases from any zone or zones
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Technical manual

direction
PU_ND_Z1 BOOLEAN Pick up any phase or phases from zone 1 - any direction
direction
PU_A_Z2 BOOLEAN Pick up of phase A for a zone 2 fault in forward direction
PU_B_Z2 BOOLEAN Pick up for phase B fault in forward direction
PU_C_Z2 BOOLEAN Pick up in phase C for a zone 2 fault in the forward direction
PU_ND_Z2 BOOLEAN Pick uo in any phase or phases for a zone 2 fault in any direction
direction
PU_ND_Z3 BOOLEAN Pick up any phase or phases from zone 3- any direction
PU_Z4 BOOLEAN Pick up in any pjase or phases for a zone 4 fault - zone direction
PU_ND_Z4 BOOLEAN Pick up any phase or phases from zone -4 any direction
PU_Z5 BOOLEAN Pick up in any phase or phase for Zone 5 - Zone direction
STND_Z5 BOOLEAN Pick up in any phase or phases from a zone 5 fault in any direction
PU_ZRV BOOLEAN Pick up in any phase or phase for a reverse fault
PU_A_RV BOOLEAN Pick up for a phase A reverse fault
PU_B_RV BOOLEAN Pick up for a phase B revers fault
PU_C_RV BOOLEAN Pick up for a phase C reverse fault
STNDRV BOOLEAN Pick up for a reverse zone for a fauult in nay direction
PHPUND BOOLEAN Fault detected in any phase or phases - any direction
NDIR_A BOOLEAN Fault detected in phase A - any direction
NDIR_B BOOLEAN Fault detected in phase B - any direction
NDIR_C BOOLEAN Fault detected in phase C - any direction
FWD_G BOOLEAN forward fault involving ground
REV_G BOOLEAN Fault in reverse direction involving ground
FWD_1PH BOOLEAN Single-phase fault detected - forward direction
FWD_2PH BOOLEAN Two-phase fault detected - forward direction
FWD_3PH BOOLEAN Three-phase fault detected - forward direction
PHG_FLT BOOLEAN Ph-G zone measurement enabled - any direction
PHPH_FLT BOOLEAN Ph-Ph zone measurement enabled - any direction
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Technical manual
7.12.5 Settings
Table 195: ZMFCPDIS (21) Group settings (basic)

Enabled
OperationSC NoSeriesComp - - NoSeriesComp Selection of series compensation
SeriesComp operation Off / On
RLdFwd 0.01 - 5000.00 Ohm/p 0.01 60.00 Resistance determining the load
RLdRvFactor 1 - 1000 %RLdF 1 100 Resistance factor determining the load
w impedance area - reverse
XLd 0.01 - 10000.00 Ohm/p 0.01 400.00 Resistance determining the load
LdAngle 5 - 70 Deg 1 30 Angle determining the load impedance
area
CVTType Any - - Passive type CVT selection determining the filtering of
Passive type the function
None (Magnetic)
Mho
MhoOffset
Mho
MhoOffset
X1FwPPZ1 0.01 - 3000.00 Ohm/p 0.01 30.00 Positive seq. reactance reach, Ph-Ph, zone
1, forward dir.
R1FwPPZ1 0.00 - 1000.00 Ohm/p 0.01 5.00 Positive seq. resistive reach, Ph-Ph, zone 1,
forward dir.
X1RvPPZ1 0.01 - 3000.00 Ohm/p 0.01 30.00 Pos. seq. react. reach, Ph-Ph, zone 1,
reverse direction
X1FwPGZ1 0.01 - 3000.00 Ohm/p 0.01 30.00 Positive seq. reactance reach, Ph-G, zone 1,
forward dir.
R1FwPGZ1 0.00 - 1000.00 Ohm/p 0.01 5.00 Positive seq. resistive reach, Ph-G, zone 1,
forward dir.
X0FwPGZ1 0.01 - 9000.00 Ohm/p 0.01 100.00 Zero seq. reactance reach, Ph-G, zone 1,
forward direction
R0FwPGZ1 0.00 - 3000.00 Ohm/p 0.01 15.00 Zero seq. resistive reach, Ph-G, zone 1,
forward direction
X1RvPgZ1 0.01 - 3000.00 Ohm/p 0.01 30.00 Pos. seq. react. reach, Ph-G, zone 1, reverse
direction
tPGZ1 0.000 - 60.000 s 0.001 0.000 Time delay to trip, Ground-Earth, zone 1
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Technical manual

Phase loops, zone 1
IMinOpPGZ1 5 - 6000 %IB 1 10 minimum operate phase current for phase-
ground loops. zone 1
Mho
MhoOffset
Mho
MhoOffset
2, forward dir.
forward dir.
reverse direction
forward dir.
forward dir.
forward direction
forward direction
X1RvPGZ2 0.01 - 3000.00 Ohm/p 0.01 40.00 Pos. seq. react. reach, Ph-G, zone 2, reverse
direction
RFPPZ2 0.01 - 9000.00 Ohm/l 0.01 30.00 Zero sequence reactance reach, zone 2
RFPGZ2 0.01 - 9000.00 Ohm/l 0.01 100.00 Fault resistance reach, Ph-g, Zone 2
IMinOpPPZ2 10 - 6000 %IB 1 10 Time delay to trip, Phase-Phase, zone 2
IMinOpPGZ2 5 - 6000 %IB 1 10 Minimum operate phase current for phase
- ground loops, zone 2
Mho
MhoOffset
Mho
MhoOffset
DirModeZ3 Non-directional - - Forward Time delay to trip, Phase-Phase, zone 2
Forward
Reverse
3, zone direction
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Technical manual

zone direction
RFFwPPZ3 0.01 - 9000.00 Ohm/l 0.01 30.00 Positive seq. resistive reach, Ph-Ph, zone 3,
zone direction
opposite to zone dir
RFRvPPZ3 0.01 - 9000.00 Ohm/l 0.01 30.00 Positive seq. resistive reach, Ph-Ph, zone 3,
zone direction
X1FwPGZ3 0.01 - 3000.00 Ohm/p 0.01 40.00 Positive seq. resistive reach, Ph-G, zone 3,
zone direction
zone direction
zone direction
zone direction
RFFwPGZ3 0.01 - 9000.00 Ohm/l 0.01 100.00 Fault resistance reach, Ph-G, zone 3, zone
direction
X1RvPGZ3 0.01 - 3000.00 Ohm/p 0.01 40.00 Pos. seq. react. reach, Ph-G, zone 3,
RFRvPGZ3 0.01 - 9000.00 Ohm/l 0.01 100.00 Fault resistance reach, Ph-G, zone 3,
opposite to zone dir.
Phase loops, zone 3
Mho
MhoOffset
Mho
MhoOffset
Reverse
4, zone direction
zone direction
RFFwPPZ4 0.01 - 9000.00 Ohm/l 0.01 30.00 Fault resistance reach, Ph-Ph, zone 4, zone
direction
RFRvPPZ4 0.01 - 9000.00 Ohm/l 0.01 30.00 Fault resistance reach, Ph-Ph, zone 4,
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Technical manual

zone direction
zone direction
zone direction
zone direction
direction
IMinOpPPZ4 10 - 6000 %IB 1 10 How start of trip delay timers should be
linked for zone 4
Mho
MhoOffset
Mho
MhoOffset
Reverse
5, zone direction
zone direction
RFFwPPZ5 0.01 - 9000.00 Ohm/l 0.01 30.00 Fault resistance reach, Ph-Ph, zone 5, zone
direction
RFRvPPZ5 0.01 - 9000.00 Ohm/l 0.01 30.00 Fault resistance reach, Ph-Ph, zone 5,
zone direction
zone direction
zone direction
zone direction
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Technical manual

direction
Phase loops, zone 5
OpModePPZRV Disabled - - Quadrilateral Enabled/Disabled and characteristic
Quadrilateral setting for Ph-Ph loops, zone RV
Mho
MhoOffset
OpModePGZRV Disabled - - Quadrilateral Enabled/Disabled and characteristic
Quadrilateral setting for Ph-G loops, zone RV
Mho
MhoOffset
X1FwPPZRV 0.01 - 3000.00 Ohm/p 0.01 40.00 Positive seq. reactance reach, Ph-Ph, zone
RV, reverse dir.
R1FwPPZRV 0.00 - 1000.00 Ohm/p 0.01 5.00 Positive seq. resistive reach, Ph-Ph, zone
RV, reverse dir.
X1RvPPZRV 0.01 - 3000.00 Ohm/p 0.01 40.00 Pos. seq. react, reach, Ph-Ph, zone RV,
forward direction
X1FwPGZRV 0.01 - 3000.00 Ohm/p 0.01 40.00 Pos. seq. react, reach, Ph-G, zone RV,
reverse direction
R1FwPGZRV 0.00 - 1000.00 Ohm/p 0.01 5.00 Positive seq. resistive reach, Ph-G, zone RV,
reverse dir.
X0FwPGZRV 0.01 - 9000.00 Ohm/p 0.01 120.00 Zero seq. reactance reach, Ph-G, zone RV,
reverse direction
R0FwPGZRV 0.00 - 3000.00 Ohm/p 0.01 15.00 Zero seq. resistive reach, Ph-G, zone RV,
reverse direction
X1RvPGZRV 0.01 - 3000.00 Ohm/p 0.01 40.00 Pos. seq. react. reach, Ph-G, zone RV,
forward direction
tPPZRV 0.000 - 60.000 s 0.001 0.000 Time delay to trip, Phase-Phase, zone RV
tPEZRV 0.000 - 60.000 s 0.001 0.000 Time delay to trip, Phase -Ground, zone RV
IMinOpPPZRV 10 - 6000 %IB 1 10 Minimum operate ph-ph current for Phase-
Phase loops, zone RV
IMinOpPGZRV 5 - 6000 %IB 1 10 Minimum operate phase current for phase-
ground loops, zone RV
RFPPZRV 0.01 - 9000.00 Ohm/l 0.01 30.00 Fault resistance reach, Ph-Ph, zone RV
RFPGZRV 0.01 - 9000.00 Ohm/l 0.01 100.00 Fault resistance reach Ph-G. zone RV
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Technical manual
Table 196: ZMFCPDIS (21) Group settings (advanced)

ZoneLinkPU Phase Selection - - Phase Selection Select. of start source for all ZoneLinked
1st starting zone trip delay timers
3I0Enable_PG 5 - 400 %MaxIP 1 400 3I0 limit for releasing Phase-to-Ground
h measuring loops
TimerModeZ1 Disable all - - Enable Ph-G On/Off setting for Ph-Ph and Ph-G trip
Enable PhPh
Enable Ph-G PhPH
LoopLink &
ZoneLink
no links
Enable PhPh
Enable Ph-G PhPH
LoopLink &
ZoneLink
no links
Enable Ph-G PhPH output, Zone 3
Enable PhPh
Enable Ph-G PhPH
LoopLink &
ZoneLink
no links
TimerLinksZ4 Disable all - - Enable Ph-G On/off setting for Ph-Ph and Ph-G trip
Enable Ph-G PhPH output Zone 4
Enable PhPh
Enable Ph-G PhPH
LoopLink &
ZoneLink
no links
Enable PhPh
Enable Ph-G PhPH
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Technical manual

LoopLink &
ZoneLink
no links
TimerModeZRV Disable all - - Enable Ph-G On/off setting for Ph-Ph and Ph-G trip
Enable Ph-G PhPH outout, zone RV
Enable PhPh
Enable Ph-G PhPH
TimerLinksZRV LoopLink (tPP & - - LoopLink (tPP & How start of trip delay timers should be
tPG) tPG) linked for zone RV
LoopLink &
ZoneLink
no links
Table 197: ZMFCPDIS (21) Non group settings (basic)

groups
ZDbRepInt 1 - 300 Type 1 10 Cycl: Report interval (s), Db: In % of range,
Int Db: In %s
ZMax 0.0 - 5000.0 Ohm 0.1 1500.0 Maximum value in ohm
ZRepTyp Cyclic - - Cyclic Reporting type
Dead band
Int deadband
ZAngDbRepInt 1 - 300 Type 1 10 Cycl: Report interval (s), Db: In % of range,
Int Db: In %s
Table 198: ZMFCPDIS (21) Non group settings (advanced)

ZZeroDb 0 - 100000 m% 1 100 Zero point clamping
ZHiHiLim 0.0 - 5000.0 Ohm 0.1 1350.0 High High limit in ohm
ZHiLim 0.0 - 5000.0 Ohm 0.1 1200.0 High limit in ohm
ZLowLim 0.0 - 5000.0 Ohm 0.1 300.0 Low limit in ohm
ZLowLowLim 0.0 - 5000.0 Ohm 0.1 150.0 Low Low limit in ohm
ZMin 0.000 - 5000.000 Ohm 0.001 0.005 Minimum value in ohm
ZLimHys 0.000 - 100.000 % 0.001 5.000 Hysteresis value in % of range and is
ArgLdMinEd2 5 - 70 Deg 1 5 Minimum settable angle determining the
settings
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Technical manual

ArgLdMaxEd2 5 - 70 Deg 1 70 Maximum settable angle determining the
settings
RLdFwMinEd2 0.01 - 5000.00 Ohm/p 0.01 0.01 Minimum settable resistance determining
settings
RLdFwMaxEd2 0.01 - 5000.00 Ohm/p 0.01 5000.00 Maximum settable resistance determining
settings

Table 199: ZMFCPDIS (21) Monitored data

2=Reverse
0=No direction
2=Reverse
0=No direction
2=Reverse
0=No direction
ABDir INTEGER 1=Forward - Direction in loop AB
2=Reverse
0=No direction
BCDIR INTEGER 1=Forward - Direction in looop BC
2=Reverse
0=No direction
CADir INTEGER 1=Forward - Direction in loop CA
2=Reverse
0=No direction
ZAIMAG REAL - Ohm ZA Amplitude, magnitude of
instantaneous value
ZAANGIM REAL - deg ZA Angle, magnitude of instantaneous
value
ZBIMAG REAL - Ohm ZB Amplitude, magnitude of
instantaneous value
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Technical manual

ZBANGIM REAL - deg ZB Angle, magnitude of instantaneous
value
ZCIMAG REAL - Ohm ZC Amplitude, magnitude of
instantaneous value
ZCANGIM REAL - deg ZC Angle, magnitude of instantaneous
value
7.12.7 Operation principle GUID-913A0692-F0A7-4B4B-83B4-AC2A96B3A989 v2
Settings, input and output names are sometimes mentioned in the following text without its zone
suffix (i.e. BLKZx instead of BLKZ3) when the description is equally valid for all zones.
7.12.7.1 Filtering GUID-0EA39CA3-6CDA-41B0-A178-E5800868A0C5 v1
Practically all voltage, current and impedance quantities used within the ZMFCPDIS function are
derived from fundamental frequency phasors filtered by a half-cycle filter.
The phasor filter is frequency adaptive in the sense that its coefficients are changed based on the
estimated power system frequency.
A half-cycle filter will not be able to reject both even and odd harmonics. So, while odd harmonics
will be completely attenuated, accuracy will be affected by even harmonics. Even harmonics will
not cause the distance zones to overreach; instead there will be a slightly variable underreach, on
average in the same order as the magnitude ratio between the harmonic and the fundamental
component.
7.12.7.2 Distance measuring zones GUID-674FC410-9BA3-437E-8358-62E9B81D7B65 v2
Figure 205 presents an outline of the different measuring loops for the six distance zones.
380
Technical manual
protection function with six measuring elements.
Transients from CVTs may have a significant impact on the transient overreach of a distance
protection. At the same time these transients can be very diverse in nature from one type to the
other; in fact, more diverse than can be distinguished by the algorithm itself in the course of a few
milliseconds. So, a setting is introduced in order to inform the algorithm about the type of CVT
applied and thus providing the advantage of knowing how performance should be optimized, even
during the first turbulent milliseconds of the fault period.
There are two types of CVTs from the function point of view, the passive and the active type,
which refers to the type of ferro-resonance suppression device that is employed. The active type
requires more rigorous filtering which will have a negative impact on operate times. However, this
will be evident primarily at higher source impedance ratios (SIRs), SIR 5 and above, or close to the
reach limit.
The IEC 60044-5 transient classification is of little or no use in relation to this. It is not primarily
the damping of transients that is important; it is the frequency content of the transients that is
decisive, i.e. how difficult it is to filter out the specific frequency. So, even if two CVTs, one passive
and the other active type, comply with the same transient class, the active type requires more
extensive filtering in order to avoid transient overreach.
To avoid overreach and at the same time achieve fast operate times, a supplementary circular
characteristic that includes some alternative processing (retained from REL 531) is implemented.
One such circular characteristic exists for every measuring loop and quadrilateral/mho
characteristic. There are no specific reach settings for this circular zone. It uses the normal
quadrilateral/mho zone settings to determine a reach that will be appropriate. This implies that
the circular characteristic will always have somewhat shorter reach than the quadrilateral/mho
zone.
7.12.7.3 Phase-selection element GUID-2BCDB96F-39EE-4C14-9856-D23A4A1B6115 v3
The operation of the phase-selection element is primarily based on current change criteria. The
current change criteria itself can however only be relied on for a short period following the fault
inception (during what we will call the current change phase). Subsequent switching in the
network may render the change in current invalid. So, naturally, the phase-selection element also
operates on continuous criteria.
The phase-selection element can, owing to the current change criteria, distinguish faults with
minimum influence from load and fault impedance. In other words, it is not restricted by a load
encroachment characteristic during the current change phase. This significantly improves
performance for remote phase-to-ground faults on heavily loaded lines. One exception, however,
is three-phase faults, for which the load encroachment characteristic always has to be applied, in
order to distinguish fault from load.
The continuous criteria will in the vast majority of cases operate in parallel and carry on the fault
indication after the current change phase has ended. Only in some particularly difficult faults on
heavily loaded lines the continuous criteria might not be sufficient, for example, when the
estimated fault impedance resides within the load area defined by the load encroachment
characteristic. In this case, the indication will be restricted to a pulse lasting for one or two power
system cycles.
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Technical manual
Phase-to-phase-ground faults (also called double ground faults) will practically always activate
phase-to-phase zone measurements. This is a substantial difference compared to the previous
phase selection function in the 500- and 600-series (that is, FDPSPDIS). Measurement in two
phase-to-ground loops at the same time is associated with so-called simultaneous faults: two
ground faults at the same time, one each on the two circuits of a double line, or when the zero
sequence current is relatively high due to a source with low Z0/Z1 ratio.In fact, in these situations
zone measurement will be released both for the related phase-to-ground loops and the phase-to-
phase loop simultaneously. On the other hand, simultaneous faults closer to the remote bus will
gradually take on the properties of a phase-to-phase-ground fault and the function will eventually
use phase-to-phase zone measurements also here.
In cases where the fault current infeed is more or less completely lack of zero sequence nature (all
phase currents in phase), the measurement will be performed in the phase-to-ground loops only
for a phase-to-phase-ground fault.
However, should it be desirable to use phase-to-ground (and only phase-to-ground) zone

measurement for phase-to-phase-ground faults, the setting INReleasePE can be lowered from its
excessive default value to the level above which phase-to-ground measurement should be
activated.
7.12.7.4 Directional element GUID-24431EEC-5037-41CD-BC4A-7AC196F158F3 v4
Several criteria are employed when making the directional decision. The basis is provided by
comparing a positive sequence based polarizing voltage with phase currents. For extra security,
especially in making a very fast decision, this method is complemented with an equivalent
comparison where, instead of the phase current, the change in phase current is used. Moreover, a
basic negative sequence directional evaluation is taken into account as a reliable reference during
high load condition. Finally, zero sequence directional evaluation is used whenever there is more or
less exclusive zero sequence in-feed.
Fundamentally, the directional sectors that represent forward direction, one per measuring loop,
are defined by the following equations.
V
PolA
-15°<arg < 120°
I
A
V
PolAB
-15°<arg < 120°
I
AB
Where:
VPolA is the polarizing voltage for phase A.
IA is the phase current in phase A.
VPolAB is the polarizing voltage difference between phase A and B (B lagging A).
IAB is the current difference between phase A and B (B lagging A).
The corresponding reverse directional sectors range from 165 to -60 degrees.
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Technical manual
Since the polarizing voltage is also used for the Mho distance characteristics, the magnitude of
the voltage is just as interesting as the phase. If there are symmetrical conditions and the
measured per phase positive sequence voltage magnitude is above 75% of the base voltage
before the fault, the pre-fault magnitude will be memorized and used as long as there is a fault.
The phase angle however will only be memorized (locked) for 75 ms at a time, not to lose
synchronism with the real system voltage.
Should the positive sequence voltage drop below 2% of the base voltage, it will be considered
invalid. In this situation, directional signals and pickups from Mho elements will be sealed-in and
kept static as long as there is a fault.
For ZMFCPDIS, when option SeriesComp is chosen for OperationSC, the voltages of faulty phases
will be discarded in order not to affect the polarizing voltage with voltage reversal.
7.12.7.5 Fuse failure GUID-AB0D0D20-EF27-4475-8EC5-A3BF69FC5802 v2
The ZMFCPDIS function has to be blocked by an additional function like the Fuse failure
supervision (FUFSPVC) or an equivalent external device. Typically, the binary input VTSZ is used for
this purpose.
However, to guarantee that also very fast operation is blocked in a fuse failure situation, there is a
built-in supervision based on change in current that will delay operation before the FUFSPVC
blocking signal is received. The delay will be introduced if no (vector) magnitude change greater
than 5% of IBase has been detected in any of the phase currents.
7.12.7.6 Power swings GUID-66627E0F-33AA-4570-9C27-4217EEECC2CE v1
There is need for external blocking of the ZMFCPDIS function during power swings, either from the
Power Swing Blocking function (ZMRPSB) or an external device.
7.12.7.7 Measurement principles
Quadrilateral characteristic GUID-E1366EA0-B04E-4180-BC4C-F042CC8FA8E2 v6

ZMFCPDIS implements quadrilateral and mho characteristic in all the six zones separately. Set
OpModePEZx or OpModePPZx to Quadrilateral, to choose particular measuring loop in a zone to
work as quadrilateral distance protection.
All ZMFCPDIS zones operate according to the non-directional impedance characteristics

presented in figure 206 and figure 207. The phase-to-ground characteristic is illustrated with the
full loop reach while the phase-to-phase characteristic presents the per-phase reach.
The voltage and current phasors after the half-cycle filter are used in fault loop equations.
For phase-to-phase faults (Figure 208, lower part), the calculated impedances from the relay to
the fault Z calc  Rcalc  j  X calc follow Equation 90 (example is given for a phase L1 to phase L2 fault).
 
U L1  U L 2  I L1  I L 2  Z calc 
Where and represents the corresponding voltage and current phasors in the respective
phase Ln (n = 1, 2, 3).
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Technical manual
The calculated Rcalc and Xcalc are compared with the non-directional phase-to-phase quadrilateral
characteristics defined by the reactance reaches (X1FwPPZx and X1RvPPZx, where x = 1 to 5 or RV),
resistance reaches (R1FwPPZx, where x = 1 to 5 or RV) for the zones, as well as the fault resistance
reach setting for phase-to-phase loops ((RFPPZx, where x = 1, 2 or RV), (RFFwPPZx and RFRvPPZx,
where x = 3 to 5 or RV)), as shown in Figure 207. If is inside the non-directional phase-to-phase
characteristic, the STNDZx output is set to TRUE.
For phase-to-ground faults (Figure 208, upper part), the ground return compensation applies
according to Equation 91 (example for a phase L1 to ground fault).
 
U L1  I L1  K N  3I 0  p  Z1  I F  RF
Where,
p is the fault location and RF is the calculated fault resistance. p and RF are unknown and needs to
be solved.
is the zero-sequence current.
is the ground compensation factor and it is defined as:
Z 0  Z1
KN 
3  Z1
Z 0  R0 FwPEZx  j  X 0 FwPEZx
Z1  R1FwPEZx  j  X 1FwPEZx
Where,
is the set complex zero sequence impedance of the line in Ω/phase.
is the set complex positive sequence impedance of the line in Ω/phase.
R1FwPEZx is the positive sequence resistive reach of the line in Ω/phase for phase-to-ground fault
in zone direction for zone x (x = 1 to 5 or RV).
X1FwPEZx is the positive sequence reactance reach of the line in Ω/phase for phase-to-ground
fault in zone direction for zone x (x = 1 to 5 or RV).
R0FwPEZx is the zero sequence resistive reach of the line in Ω/phase for phase-to-ground fault in
zone direction for zone x (x = 1 to 5 or RV).
X0FwPEZx is the zero sequence reactance reach of the line in Ω/phase for phase-to-ground fault in
zone direction for zone x (x = 1 to 5 or RV).
is the fault current. It is chosen among phase, zero or negative sequence currents automatically
by the built-in adaptive load compensation algorithm.
The calculated impedances from the relay to the fault Z calc  Rcalc  j  X calc can be represented as:
X calc  p  X 1FwPEZx
Rcalc  p  R1FwPEZx  RF
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Technical manual
The calculated Rcalc and Xcalc are compared with the non-directional phase-to-ground quadrilateral
characteristics defined by the reactance reaches (X1FwPEZx or X1RvPEZx, where x = 1 to 5 or RV),
resistance reaches (R1RwPEZx, where x = 1 to 5 or RV) for the zones, as well as the fault resistance
reach setting for phase-to-ground loops ((RFPEZx, where x = 1, 2 or RV), (RFFwPEZx and RFRvPEZx,
where x = 3 to 5)), as shown in Figure 206. If is inside the non-directional phase-to-ground
characteristic, the STNDZx output is set to TRUE.
X (Ohm/loop)
X0FwPGZx , X1FwPGZx
XNFwZx <
R1FwPGZx+RNFwZx 3
X1RvPGZx
XNRvZx < XNFwZx √
RFRvPGZx RFFwPGZx X1FwPGZx
R0FwPGZx,R1FwPGZx
RNFwZx <
3
X1RvPGZx
RNRvZx < RNFwZx √
X1FwPGZx
X1RvPGZx
X1FwPGZx+XNFwZx R1RvPGZx < R1FwPGZx √
X1FwPGZx
ιN ιN
R (Ohm/loop)
1) 1)
RFRvPGZx RFFwPGZx
X1RvPGZx+XNRvZx
ιN
RFRvPGZx RFFwPGZx
R1RvPGZx + RNRvZx ANSI11000417-2-en.vsd
Settings RFRvPGZx and RFFwPGZx exists for Zones 3 to 5.

1)
For Zone 1, 2 and RV, setting RFPGZx is applicable for both forward and reverse direction.
Figure 206: ZMFCPDIS Characteristic for phase-to-ground measuring loops, ohm/loop

domain
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Technical manual
R1FwPPZx
X (Ohm/phase)
RFRvPPZx RFFwPPZx
2 2
X1FwPPZx
ιN
R (Ohm/phase)
1) 1)
RFRvPPZx RFFwPPZx
2 2
X1RvPPZx
ιN
RFRvPPZx RFFwPPZx
2 2
X1RvPPZx IEC11000418-3-en.vsd
R1FwPPZx √
X1FwPPZx
Settings RFRvPPZx and RFFwPPZx exist for Zones 3 to 5.

1)
For Zone 1, 2 and RV, setting RFPPZx is applicable for both forward and reverse direction.
Figure 207: ZMFCPDIS Characteristic for the phase-to-phase measuring loops, ohm/phase
domain
Note that for ZMFCPDIS, the reverse zone ZRV, as well as any of zones 3-5, that are
set to DirMode=Reverse will get their operating impedances inverted (rotated 180
degrees) internally in order to make use of the main settings, which are the
settings designated ‘Fw’. Therefore, a reverse zone will have its Fw-settings
(RFFwPPZRV, X1FwPGZ3, and so on) applied in the third quadrant, that is, towards
the busbar instead of the line.
The fault loop reach in relation to each fault type may also be presented as in figure 208. The main
intension with this illustration is to make clear how the fault resistive reach should be interpreted.
Note in particular that the setting RFPP always represents the total fault resistance of the loop,
even while the fault resistance (arc) may be divided into parts like for three-phase or phase-to-
phase-to-ground faults. R1Zx and jX1Zx represent the positive sequence impedance from the
measuring point to the fault location.
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Technical manual
IA R1 + j X1
Phase-to-ground
VA
element
Phase-to-ground
RFPG
fault in phase A
(Arc + tower
resistance)
N
IG (R0-R1)/3 +
j (X0-X1)/3 )
VA element A-B
Phase-to-phase
fault in phase RFPP
A-B IB
VB (Arc resistance)
R1 + j X1
VA element A-C
Three-phase
fault or Phase-to-
phase-ground fault IC
VC
R1 + j X1 0.5·RFPP
Mho characteristic GUID-DA87F1BC-8037-4E14-96E0-03BCD98ED6F2 v1

ZMFCPDIS implements quadrilateral and mho characteristic in all the six zones separately. Set
OpModePEZx or OpModePPZx setting to Mho or Offset, to choose a particular measuring loop in a
zone to work as mho (or Offset Mho) distance protection.
Zones 3 to 5 can be selected to be either forward or reverse with positive sequence polarized mho
characteristic; alternatively self polarized offset mho characteristics. The operating characteristic
is in accordance to figure 209 where zone 5 is selected offset mho.
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Technical manual
X
X
Z4
Z3
ZS=0
Z2
Z1 R
Z5 R
ZS=Z1
ZRV
ZS=2Z1
Figure 209: Mho, offset mho characteristics and the source impedance influence on the mho
characteristic
The mho characteristic has a dynamic expansion due to the source impedance. Instead of crossing
the origin, as for the mho to the left of figure 209, which is only valid where the source impedance
(Zs) is zero, the crossing point is moved to the coordinates of the negative source impedance
given an expansion of the circle shown to the right of figure 209. Z1 denotes the complex positive
sequence impedance.
The magnitude of the polarized voltage is determined completely by the positive sequence voltage
magnitude from before the fault. This will give a somewhat less dynamic expansion of the mho
circle during faults. However, if the source impedance is high, the dynamic expansion of the mho
circle might lower the security of the function too much with high loading and mild power swing
conditions.
Basic operation characteristics GUID-B9D7C3D8-811A-419B-8373-712EC122EB08 v1

In ZMFPDIS, each zone measurement loop characteristic can be set to mho characteristic or offset
mho characteristic by setting zxOpModePE or zxOpModePP (where x is 1-5 depending on selected
zone).
ZMFPDIS fixes zone 1 and 2 in Forward mode and zone RV in Reverse mode. Zone 3-5 can be set to
Non-directional, Forward or Reverse by setting the parameter DirModeZx (where x is 3-5
depending on selected zone).
If DirModeZx (where x is 3-5 depending on selected zone) is selected as Non-directional, the

directional element will not have any effect on the measurement loop and operation of the
function. When DirModeZx (where x is 3-5 depending on selected zone) is selected as Forward or
Reverse, directional lines are introduced. Information about the directional lines is given from the
directional element. Basic Mho characteristics with different mode settings are indicated in figure
210.
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Technical manual
X X X
R R R
OpModePP/PEZx = Mho OpModePP/PEZx = Mho OpModePP/PEZx = Mho

Zone 1, Zone 2 and Zone RV and Only Zone 3-5
DirModeZ3-5 = Forward DirModeZ3-5 = Reverse DirModeZ3-5 = Non-directional
X X X
R R R
OpModePP/PEZx = Offset OpModePP/PEZx = Offset OpModePP/PEZx = Offset

Zone 1, Zone 2 and Zone RV and Only Zone 3-5
DirModeZ3-5 = Forward DirModeZ3-5 = Reverse DirModeZ3-5 = Non-directional
IEC15000065.vsdx
Figure 210: Mho characteristics

For each zone, the impedance is set in cartesian coordinates (resistance and reactance) which is
the same as for quadrilateral characteristic.
ZMFCPDIS function uses separate sets of reach settings in forward and reverse directions for
phase-to-earth fault and phase-to-phase fault. These settings are R1FwPPZx, X1FwPPZx,
X1RvPPZx, R1FwPEZx, X1FwPEZx, X1RvPEZx, R0FWPEZx, X0FwPPZx (x=1-5 or RV). Thus, the center
of the Non-directional offset mho circle can be arbitrary located in the circle (figure 210).
Note that the reverse ZoneRV, as well as any of zones 3-5, that are set to DirModeZx=Reverse will
get their operating impedances inverted (rotated 180 degrees) internally in order to make use of
the main settings, which are the settings designated ‘Fw’. Therefore, a reverse zone will have its
Fw-settings (R1FwPPZRV, X1FwPEZ3, and so on) applied in the third quadrant, that is, towards the
busbar instead of the line.
In Non-directional mode, for both Mho and Quad, the reach settings are equal to Forward mode in
this respect. The ‘Fw’ settings apply in the first quadrant and the ‘Rv’ settings apply in the third
quadrant.
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Technical manual
Theory of operation SEMOD154224-46 v6

Phase-to-phase fault GUID-46762EB9-50CA-4045-9D39-80B604C66E0F

SEMOD154224-240 v2
v1
The plain Mho circle has the characteristic as in figure 211. The condition for deriving the angle β is
(
b = arg VAB - I AB × Z 1set - arg V pol ) ( )
where

ANSI V1 EN-US
EQUATION1790-

ANSI V1 EN-US
EQUATION1791-
is the positive sequence impedance setting for phase-to-phase fault in zone direction
Z 1set
is the polarizing voltage
Vpol
Z 1set = R1FwPPZx + j ⋅ X 1FwPPZx

where
R1FwPPZ is the positive sequence resistive reach for phase-to-phase fault in zone direction for zone x
x (x=1-5 and RV)
X1FwPPZ is the positive sequence reactance reach for phase-to-phase fault in zone direction for zone
x x (x=1-5 and RV)
The polarized voltage consists of 100% memorized positive sequence voltage (VAB for phase A to B
fault). The memorized voltage will prevent collapse of the mho circle for close in faults.
Operation occurs if 90°≤β≤270°.
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Technical manual
I AB  jX
I L1L 2  Z1set
Vcomp  VAB  I AB  Z1set
VAB
V pol
I AB  R
Offset Mho GUID-2E84AD28-CA5F-4D19-B189-57354C8F7CF9 v1
The characteristic for offset mho is a circle where two points on the circle are given by the two
vectors Z 1set and Z 1RVset where Z 1set and Z 1RVset are settable through the resistance and
reactance settings in forward and reverse directions.
compensated voltages is greater than or equal to 90° (figure 212). The angle will be 90° for fault
location on the boundary of the circle.
The angle β for A to B fault can be defined according to equation 95.
 V − I ⋅ Z1 
AB AB set
β = arg  
 (
 VAB − − I AB ⋅ Z 1RVset ) 

where
is the positive sequence impedance setting for phase-to-phase
Z 1RVset fault opposite to zone direction and is defined as
Z 1RVset = R1RvPPZx + j ⋅ X 1RvPPZx

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Technical manual
where
X1RvPPZx is the positive sequence reactance reach for phase-to-phase
fault opposite to zone direction for zone x (x=1-5 and RV)
R1RvPPZx is the positive sequence resistive reach for phase-to-phase
fault opposite to zone direction for zone x (x=1-5 and RV) and is
internally calculated according to the equation below,
 R1FwPPZx 
R1RvPPZx = X 1RvPPZx ⋅  
 X 1FwPPZx 
I AB  jX
Vcomp1  VAB  I AB  Z 1set
I AB  Z 1set
VAB
Vcomp 2  VAB  (  I AB  Z 1RVset )
I AB  Z 1RVset
I AB  R
Figure 212: Simplified offset mho characteristic and voltage vector for phase A to B fault
Operation occurs if 90°≤β≤270 °.
Phase-to-ground fault GUID-8A79E50E-9DC0-45DA-A3A7-DF3DBF59618C

SEMOD154224-283 v2
v1
The measuring of earth faults uses earth return compensation applied in a conventional way. The
compensation voltage is derived by considering the influence from the earth return path.
Compensation for earth return path for faults involving earth is done by setting the positive and
zero sequence impedance of the line. It is known that the ground compensation factor KN is,
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Technical manual
Z 0set − Z 1set
KN =
3 ⋅ Z 1set
Z 0set = R 0 FwPEZx + j ⋅ X 0 FwPEZx

Z 1set = R1FwPEZx + j ⋅ X 1FwPEZx

where
is the complex zero sequence impedance of the line in Ω/phase
Z 0set
Z 1set
phase
R0FwPEZx is the zero sequence resistive reach of the line in Ω/phase for
phase-to-ground fault in zone direction for zone x (x=1-5, or RV)
X0FwPEZx is the zero sequence reactance reach of the line in Ω/phase for
phase-to-ground fault in zone direction for zone x (x=1-5, or RV)
R1FwPEZx is the positive sequence resistive reach of the line in Ω/phase
for phase-to-ground fault in zone direction for zone x (x=1-5, or
RV)
X1FwPEZx is the positive sequence reactance reach of the line in Ω/phase
for phase-to-ground fault in zone direction for zone x (x=1-5, or
RV)
For an earth fault in phase A, the angle β between the compensation voltage and the polarizing
voltage Vpol is,
β = arg [VA − ( I A + 3I 0 ⋅ K N ) ⋅ Z 1set ] − arg(V pol )

where
is the phase voltage in faulty phase A
VA
is the phase current in faulty phase A
IA
3I0 is the zero-sequence current in faulty phase A

Z 1set phase for phase-to-ground fault in zone direction
is the polarizing voltage in phase A

Vpol
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Technical manual
IA•jX
Vcomp  VA  ( I A  3I 0  K N )  Z1set
3I 0  K N  Z1set
VA
I A  Z1set
V pol
IA•R
fault
Offset mho GUID-1CD62635-A76A-41F7-A814-8BB493F5B051 v1

The condition for operation of offset mho at phase-to-earth fault is that the angle β between the
two compensated voltages is equal to or greater than 90°, see figure 214. The angle will be 90° for
fault location on the boundary of the circle.
( ) {
β = arg VA − ( I A + 3I 0 ⋅ K N ) ⋅ Z 1set − arg VA −  −( I A + 3I 0 ⋅ K N ⋅ Z 1RVset ] ) }
where
Z 1RVset phase for phase-to-ground fault opposite to zone direction and
is defined as,
Z 1RVset = R1RvPEZx + j ⋅ X 1RvPEZx

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Technical manual
where
X1RvPEZx is the positive sequence reactance reach for phase-to-ground
fault opposite to zone direction for zone x (x=1-5 and RV)
R1RvPEZx is the positive sequence resistive reach for phase-to-ground
fault opposite to zone direction for zone x (x=1-5 and RV) and
expressed by,
 R1FwPEZx 
R1RvPEZx = X 1RvPEZx ⋅  
 X 1FwPEZx 
IA• jX
Vcomp1  VA  ( I A  3I 0  K N )  Z1set

( I A  3I 0  K N )  Z1set
VA
Vcomp 2  VA   ( I A  3I 0  K N )  Z1RVset )
( I A  3I 0  K N )  Z1RVset
IA• R
fault
7.12.7.8 Load encroachment GUID-D846C3D9-4C79-40B5-9ED2-23934214AADB v5
In some cases the load impedance might enter the zone characteristic without any fault on the
protected line. The phenomenon is called load encroachment and it might occur when an external
fault is cleared and high emergency load is transferred on the protected line. The effect of load
encroachment is illustrated in the left part of figure 215. The entrance of the load impedance
inside the characteristic is not allowed and the previous way of handling this was to consider it
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Technical manual
with the settings, that is, with a security margin between the distance zone and the minimum load
impedance. This has the drawback that it will reduce the sensitivity of the protection, that is, the
ability to detect resistive faults.
The IED has a built-in function which shapes the characteristic according to the right part of figure
215. The load encroachment algorithm will increase the possibility to detect high fault resistances,
especially for phase-to-ground faults at remote line end.For example, for a given setting of the
load angle LdAngle the resistive blinder for the zone measurement can be expanded according to
the right part of the figure 215, given higher fault resistance coverage without risk for unwanted
operation due to load encroachment. This is valid in both directions.
The use of the load encroachment feature is essential for long heavily loaded lines, where there
might be a conflict between the necessary emergency load transfer and necessary sensitivity of
the distance protection. The function can also preferably be used on heavy loaded medium long
lines. For short lines, the major concern is to get sufficient fault resistance coverage. Load
encroachment is not a major problem. Nevertheless, always set RLdFwd, RldRev and
LdAngleaccording to the expected maximum load since these settings are used internally in the
function as reference points to improve the performance of the phase selection.
Zm Zm
ZL
Load impedance area in LdAngle

forward direction LdAngle
R R
LdAngle
LdAngle
RldRev RLdFwd
Figure 215: Load encroachment phenomena and shaped load encroachment characteristic
7.12.7.9 Simplified logic schemes GUID-486BDAF6-6AE2-4671-91AF-4D2F8EBE71AC v3
PHSA, PHSB,...PHSCA are internal binary logical signals from the Phase-selection element. They
correspond directly to the six loops of the distance zones and determine which loops should be
released to possibly issue a pickup or a trip.
FWA, FWB,...FWCA and RVA, RVB,...RVCA are the internal binary signals from the Directional
element. An FW signal is set true if the criteria for a forward fault or load is fulfilled for its
particular loop. The equivalent applies to the reverse (RV) signals.
The internal input 'IN present' is true if the residual current (3I0) exceeds 7% of IBase. However, if
current transformer saturation is detected, this criterion is changed to residual voltage (3V0)
exceeding 5% of VBase/sqrt(3) instead.
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Technical manual
OR 0 PHG_FLT
15 ms AND
PHSA
PHSB OR 0
15 ms AND
PHSC
OR 0
PHSAB 15 ms AND
PHSBC
OR 0
15 ms AND
PHSCA
OR 0 PHPH_FLT
15 ms AND
BLOCK PU_ND
OR
LOVBZ OR
PU_PHS
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Technical manual
PHSA
FWA AND
PHSB
OR 0 FWD_A
FWB AND
15 ms AND
PHSC
FWC AND
OR 0 FWD_B
PHSAB 15 ms AND
FWAB AND
PHSBC
FWBC AND OR 0 FWD_C
PHSCA 15 ms AND
FWCA AND
OR
FWD_G
IN present AND
FWD_1PH
=1
BLOCK
LOVBZ OR
FWD_2PH
=2
FWD_3PH
=3
REV(n & mn) DIR(n & mn)ZRV
DirModeZ3-5
TRUE (1) Non-directional
FWD(n & mn) Forward DIR(n & mn)Z3-5
REV(n & mn) Reverse
Figure 218: Connection of directional signals to zones
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Technical manual
TZx 0 TRIPZx
15 ms AND
BLKTRZx
TR_A_Zx
OR AND
BLOCK
LOVBZ TR_B_Zx
OR AND
BLKZx
TR_B_Zx
AND
AZx 0 PU_A_Zx
15 ms AND
BZx 0 PU_B_Zx
15 ms AND
CZx 0 PU_C_Zx
15 ms AND
PPZx
PGZx OR 0 PU_Zx
15 ms AND
NDZx 0 PU_ND_Zx
15 ms AND
Figure 219: Pickup and trip outputs
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Technical manual
TimerModeZx =
Enable Ph-Ph,
Ph-G
PPZx AND
OR AND
AND tPPZx
0
TZx
PGZx AND OR
OR
AND tPPZx
0 AND
BLOCK
LOVBZ
BLKZx OR
BLKTRZx
OR TimerLinksZx
LoopLink (tPP-tPG)
ZoneLinkStart LoopLink & ZoneLink
OR
PUPHS Phase Selection no links
1st pickup zone
LNKZ1 FALSE (0)
LNKZ2
LNKZRV LNKZx
AND
LNKZ3 OR
TimerLinksZx =
LNKZ4 LoopLink & ZoneLink
LNKZ5
Figure 220: Logic for linking of timers
PHSA
RVA AND
PHSB
OR 0 REV_A
RVB AND
15 ms AND
PHSC
RVC AND
OR 0 REV_B
PHSAB 15 ms AND
RVAB AND
PHSBC
RVBC AND OR 0 REV_C
PHSCA 15 ms AND
RVCA AND
OR
REV_G
IN present AND
BLOCK
LOVBZ OR
400
Technical manual
PGZx
OR
ZMAZx
PHSA AND
DIRAZx AND
ZMBZx
PHSB AND
DIRBZx AND
ZMCZx AZx
OR
PHSC AND
DIRCZx AND
ZMABZx BZx
OR
PHSAB AND
DIRABZx AND
ZMLBCZx CZx
PHSBC AND OR
DIRBCZx AND
ZMCAZx
PHSCA AND
DIRCAZx AND
PPZx
OR
NDZx
OR
Figure 222: Intermediate logic
7.12.7.10 Measurement
Measurement supervision SEMOD54417-130 v3


Zero point clamping GUID-4894EF16-3376-48EB-863F-9CE14487ACAB v1

signal to be ignored. The zero point clamping limit is a setting (XZeroDb where X equals Z).
401
Technical manual

operating:
X_RANGE = 3
High-high limit
High limit
X_RANGE=0
X_RANGE=0 t
Low limit
X_RANGE=2
Low-low limit
X_RANGE=4



402
Technical manual

Y
(1st)
Y3 Value Reported
Y2 Y4
Y1 Y5
t (*) t (*) t (*) t (*)
t
Value 1
Value 2
Value 3
Value 4
Value 5

Figure 225 shows an example with the magnitude dead-band supervision. The picture is simplified:
the process is not continuous but the values are evaluated with a time interval of one execution
cycle from each other.
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Technical manual
Value Reported
Y

Value Reported
(1st)
Y3 Y
Y
Y2 Y
Y
Y
Y
Y1

limits.

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Technical manual
Y A1 >=
A >= pre-set value
A2 >=
Y3 A3 + A4 + A5 + A6 + A7 >=
pre-set value
Y2 A1 A2
A4 A6
Value
(1st) Value
A Reported Y5
Reported Value
Reported Value
Y1 Reported
t
Measurement ZMMXU GUID-2DB6F5A4-A3C2-4BBA-8327-393B7F89EDC6 v1

The magnitude and angle of the impedance for each phase are available on the outputs (ZLxMAG
and ZLxANGL (x=1,2,3)). Each analogue output has a corresponding supervision level output
(ZLxRANG, ZLxANGR). The supervision output signal is an integer in the interval 0-4, see section
“Measurement supervision”.
Impedance measurement is calculated based on VA / IA , VB / IB , VC / IC , where VX and IX are

phase-to-ground voltage and phase-to-ground current.
When the operating current is too low, the impedance measurement can be erroneous. In order to
avoid such error, minimum operating current will be checked. For phase currents lower than 3% of
IBase, the magnitude of impedance is force to 9999999 and the angle is forced to 0 degree.
Inside the function, to ensure the readability of the output for the users, ZLxMAG and ZLxANGL
(x=1,2,3) will not change more often than a certain time period, for example, every 100 ms.
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Technical manual

GUID-16656307-6B43-47B5-8817-48638FFB5999 v3
Table 200: ZMFCPDIS (21) technical data

Number of zones 3 selectable -
directions, 3 fixed
directions
Minimum operate current, Ph- (5 - 6000)% of IBase ±1.0% of Ir
Ph and Ph-E
Positive sequence reactance (30 - 3000) Ω/phase
reach, Ph-E and Ph-Ph loop
Positive sequence resistance (30 - 3000) Ω/phase
reach, Ph-E and Ph-Ph loop
Zero sequence reactance (100.00 - 9000.00)
reach Ω/p
" +- 2.0% static accuracy +- 2.0 deg static angular
Zero sequence resistive reach (15.00 - 3000.00) accuracy Conditions: Voltage range: (0.1 - 1.1) x Ur
Ω/p Current range: (0.5 - 30) x Ir Angle: At 0 deg and 85 deg"
Fault resistance reach, Ph-E (1.00 - 9000.00) Ω/l
and Ph-Ph
Dynamic overreach < 5% at 85 deg
measured with
CVT's and 0.5 < SIR
<30
Definite time delay to trip, Ph- (0.000 - 60.000) s
±0.2% or ±35 ms whichever is greater
E and Ph-Ph operation
Operate time 16 ms typically IEC 60255-121
Reset time at 0.1 to 2 x Zreach Min = 20 ms
-
Max = 35 ms
7.13 Power swing detection ZMRPSB (68) IP14499-1 v3
M14853-1 v3

Power swing detection ZMRPSB 68
Zpsb
SYMBOL-EE V1 EN-US
Power swings may occur after disconnection of heavy loads or trip of big generation plants.
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Technical manual
Power swing detection function ZMRPSB (68) is used to detect power swings and initiate block of
all distance protection zones. Occurrence of ground-fault currents during a power swing inhibits
the ZMRPSB (68) function, to allow fault clearance.
ZMRPSB (68)
I3P* PICKUP
V3P* ZOUT
BLOCK ZIN
BLK_SS
BLK_I0
BLK1PH
REL1PH
BLK2PH
REL2PH
I0CHECK
TRSP
EXT_PSD
Figure 227: ZMRPSB (68) function block
7.13.4 Signals
Table 201: ZMRPSB (68) Input signals

SIGNAL
SIGNAL
BLK_SS BOOLEAN 0 Block inhibit of start output for slow swing condition
BLK_I0 BOOLEAN 0 Block inhibit of start output for subsequent residual current
detection
BLK1PH BOOLEAN 0 Block one-out-of-three-phase operating mode
REL1PH BOOLEAN 0 Release one-out-of-three-phase operating mode
BLK2PH BOOLEAN 0 Block two-out-of-three-phase operating mode
REL2PH BOOLEAN 0 Release two-out-of-three-phase operating mode
I0CHECK BOOLEAN 0 Residual current (3I0) detection used to inhibit power swing
detection output
TRSP BOOLEAN 0 Single-pole tripping command issued by tripping function
EXT_PSD BOOLEAN 0 Input for external detection of power swing
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Technical manual
Table 202: ZMRPSB (68) Output signals

PICKUP BOOLEAN Power swing detected
ZOUT BOOLEAN Measured impedance within outer impedance boundary
ZIN BOOLEAN Measured impedance within inner impedance boundary
7.13.5 Settings
Table 203: ZMRPSB (68) Group settings (basic)

Operation Disabled - - Disabled Disbled/Enabled operation
Enabled
X1InFw 0.01 - 3000.00 Ohm/p 0.01 30.00 Inner reactive boundary, forward
R1LIn 0.01 - 1000.00 Ohm/p 0.01 30.00 Line resistance for inner characteristic
angle
R1FInFw 0.01 - 1000.00 Ohm/l 0.01 30.00 Fault resistance coverage to inner resistive
line, forward
X1InRv 0.01 - 3000.00 Ohm/p 0.01 30.00 Inner reactive boundary, reverse
R1FInRv 0.01 - 1000.00 Ohm/l 0.01 30.00 Fault resistance line to inner resistive
boundary, reverse
OperationLdCh Disabled - - Enabled Operation of load discrimination
Enabled characteristic
RLdOutFw 0.01 - 3000.00 Ohm/p 0.01 30.00 Outer resistive load boundary, forward
LdAngle 5 - 70 Deg 1 25 Load angle determining load impedance
area
RLdOutRv 0.01 - 3000.00 Ohm/p 0.01 30.00 Outer resistive load boundary, reverse
kLdRFw 0.50 - 0.90 Mult 0.01 0.75 Multiplication factor for inner resistive
load boundary, forward
kLdRRv 0.50 - 0.90 Mult 0.01 0.75 Multiplication factor for inner resistive
load boundary, reverse
tGF 0.000 - 60.000 s 0.001 3.000 Timer for overcoming single-pole reclosing
dead time
IMinPUPG 5 - 30 %IB 1 10 Minimum operate current in % of IBase
Table 204: ZMRPSB (68) Group settings (advanced)

tP1 0.000 - 60.000 s 0.001 0.045 Timer for detection of initial power swing
tP2 0.000 - 60.000 s 0.001 0.015 Timer for detection of subsequent power
swings
tW 0.000 - 60.000 s 0.001 0.250 Waiting timer for activation of tP2 timer
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Technical manual

tH 0.000 - 60.000 s 0.001 0.500 Timer for holding power swing PICKUP
output
tR1 0.000 - 60.000 s 0.001 0.300 Timer giving delay to inhibit by the
residual current
tR2 0.000 - 60.000 s 0.001 2.000 Timer giving delay to inhibit at very slow
swing
Table 205: ZMRPSB (68) Non group settings (basic)

groups

M13877-4 v4
Power swing detection (ZMRPSB ,68) function comprises an inner and an outer quadrilateral
measurement characteristic with load encroachment, as shown in figure 228.
Its principle of operation is based on the measurement of the time it takes for a power swing
transient impedance to pass through the impedance area between the outer and the inner
characteristics. Power swings are identified by transition times longer than a transition time set
on corresponding timers. The impedance measuring principle is the same as that used for the
distance protection zones. The impedance and the characteristic passing times are measured in
all three phases separately.
One-out-of-three or two-out-of-three operating modes can be selected according to the specific

system operating conditions.
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Technical manual
X1OutFw jX ZL R1LIn
X1InFw D Fw
j
DRv
R1FInRv R1FInFw
D Fw
LdAngle j
LdAngle
DRv
D Fw
D Fw
R
D Fw
DRv
RLdInRv RLdInFw
D Fw
DRv
RLdOutRv RLdOutFw
j D Rv X1InRv
X1OutRv
Figure 228: Operating characteristic for ZMRPSB (68) function (setting parameters in italic)
The impedance measurement within ZMRPSB (68) function is performed by solving equation 103
and equation 104 (Typical equations are for phase A, similar equations are applicable for phases B
and C).
æVAö
Re ç ÷ £ Rset
è IA ø
æVAö
Im ç ÷ £ Xset
è IA ø
The Rset and Xset are R and X boundaries.
7.13.6.1 Resistive reach in forward direction M13877-6 v3
To avoid load encroachment, the resistive reach is limited in forward direction by setting the
parameter RLdOutFw which is the outer resistive load boundary value while the inner resistive
boundary is calculated according to equation 105.
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Technical manual
RLdInFw = kLdRFw·RLdOutFw
where:
kLdRFw is a settable multiplication factor less than 1
The slope of the load encroachment inner and outer boundary is defined by setting the parameter
LdAngle.
The load encroachment in the fourth quadrant uses the same settings as in the first quadrant
(same LdAngle and RLdOutFw and calculated value RLdInFw).
The quadrilateral characteristic in the first quadrant is tilted to get a better adaptation to the
distance measuring zones. The angle is the same as the line angle and derived from the setting of
the reactive reach inner boundary X1InFw and the line resistance for the inner boundary R1LIn. The
fault resistance coverage for the inner boundary is set by the parameter R1FInFw.
From the setting parameter RLdOutFw and the calculated value RLdInFw a distance between the
inner and outer boundary, DFw, is calculated. This value is valid for R direction in first and fourth
quadrant and for X direction in first and second quadrant.
7.13.6.2 Resistive reach in reverse direction M13877-15 v3
To avoid load encroachment in reverse direction, the resistive reach is limited by setting the
parameter RLdOutRv for the outer boundary of the load encroachment zone. The distance to the
inner resistive load boundary RLdInRv is determined by using the setting parameter kLdRRv in
equation 106.
RLdInRv = kLdRRv·RLdOutRv
where:
kLdRRv is a settable multiplication factor less than 1
From the setting parameter RLdOutRv and the calculated value RLdInRv, a distance between the
inner and outer boundary, DRv, is calculated. This value is valid for R direction in second and third
quadrant and for X direction in third and fourth quadrant.
The inner resistive characteristic in the second quadrant outside the load encroachment part
corresponds to the setting parameter R1FInRv for the inner boundary. The outer boundary is
internally calculated as the sum of DRv+R1FInRv.
The inner resistive characteristic in the third quadrant outside the load encroachment zone
consist of the sum of the settings R1FInRv and the line resistance R1LIn. The angle of the tilted
lines outside the load encroachment is the same as the tilted lines in the first quadrant. The
distance between the inner and outer boundary is the same as for the load encroachment in
reverse direction, that is DRv.
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Technical manual
7.13.6.3 Reactive reach in forward and reverse direction M13877-20 v3
The inner characteristic for the reactive reach in forward direction correspond to the setting
parameter X1InFw and the outer boundary is defined as X1InFw + DFw,
where:
DFw = RLdOutFw - KLdRFw · RLdOutFw
The inner characteristic for the reactive reach in reverse direction correspond to the setting
parameter X1InRv for the inner boundary and the outer boundary is defined as X1InRv + DRv.
where:
DRv = RLdOutRv - KLdRRv · RLdOutRv
7.13.6.4 Basic detection logic M13877-24 v7
The operation of the Power swing detection ZMRPSB (68) is only released if the magnitude of the
current is above the setting of the min operating current, IMinPUPG.
ZMRPSB (68) function can operate in two operating modes:
• The 1 out of 3 operating mode is based on detection of power swing in any of the three
phases. Figure 229 presents a composition of an internal detection signal DET-A in this
particular phase.
• The 2 out of 3 operating mode is based on detection of power swing in at least two out of
three phases. Figure 230 presents a composition of the detection signals DET1of3 and
DET2of3.
Signals ZOUT_n (outer boundary) and ZIN_n (inner boundary) in figure 229 are related to the
operation of the impedance measuring elements in each phase separately (n represents the
corresponding A, B and C). They are internal signals, calculated by ZMRPSB (68) function.
The tP1 timer in figure 229 serve as detection of initial power swings, which are usually not as fast
as the later swings are. The tP2 timer become activated for the detection of the consecutive
swings, if the measured impedance exit the operate area and returns within the time delay, set on
the tW waiting timer. The upper part of figure 229 (internal input signal ZOUT_A, ZIN_A, AND-gates
and tP-timers) are duplicated for phase B and C. All tP1 and tP2 timers in the figure have the same
settings.
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Technical manual
ZOUTA AND
0-tP1
ZINA 0 OR
-loop
0-tP2
-loop
AND
0
OR DET-A
AND AND
ZOUTB OR
ZOUTC
detected 0
0-tW
Figure 229: Detection of power swing in phase A
DET-A
DET-B DET1of3 - int.
OR
DET-C
AND
DET2of3 - int.
AND OR
AND
Figure 230: Detection of power swing for 1-of-3 and 2-of-3 operating mode
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Technical manual
ZOUT_A ZOUT
OR
ZOUT_B ZIN_A
ZIN
ZOUT_C AND ZIN_B OR
ZIN_C
TRSP 0 AND
0-tGF
I0CHECK
AND 10ms
BLK_I0 0 OR
AND 0-tR1 INHIBIT

0 OR
-loop
BLK_SS AND 0-tR2

0
BLOCK
-loop
DET1of3 - int.
REL1PH
AND
BLK1PH
DET2of3 - int. OR 0
0-tH
REL2PH
AND
BLK2PH OR PICKUP
AND
EXT_PSD
en05000114-1-ansi.vsd
Figure 231: Simplified block diagram for ZMRPSB (68) function
7.13.6.5 Operating and inhibit conditions M13877-38 v4
Figure 231 presents a simplified logic diagram for the Power swing detection function ZMRPSB
(68). The internal signals DET1of3 and DET2of3 relate to the detailed logic diagrams in figure 229
and figure 230 respectively.
Selection of the operating mode is possible by the proper configuration of the functional input
signals REL1PH, BLK1PH, REL2PH, and BLK2PH.
The load encroachment characteristic can be switched off by setting the parameter
OperationLdCh = Disabled, but notice that the DFw and DRv will still be calculated from RLdOutFw
and RLdOutRv. The characteristic will in this case be only quadrilateral.
There are four different ways to form the internal INHIBIT signal:
• Logical 1 on functional input BLOCK inhibits the output PICKUP signal instantaneously.
• The INHIBIT internal signal is activated, if the power swing has been detected and the
measured impedance remains within its operate characteristic for the time, which is longer
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Technical manual
than the time delay set on tR2 timer. It is possible to disable this condition by connecting the
logical 1 signal to the BLK_SS functional input.
• The INHIBIT internal signal is activated after the time delay, set on tR1 timer, if an ground-fault
appears during the power swing (input IOCHECK is high) and the power swing has been
detected before the ground-fault (activation of the signal I0CHECK). It is possible to disable
this condition by connecting the logical 1 signal to the BLK_I0 functional input.
• The INHIBIT logical signals becomes logical 1, if the functional input I0CHECK appears within
the time delay, set on tGF timer and the impedance has been seen within the outer
characteristic of ZMRPSB (68) operate characteristic in all three phases. This function
prevents the operation of ZMRPSB (68) function in cases, when the circuit breaker closes onto
persistent single-pole fault after single-pole autoreclosing dead time, if the initial single-pole
fault and single-pole opening of the circuit breaker causes the power swing in the remaining
two phases.

M16036-1 v10
Table 206: ZMRPSB (68) technical data

Reactive reach (0.10-3000.00) W/phase ±2.0% static accuracy
Conditions:
Angle: at 0 degrees and 85 degrees
Resistive reach (0.10–1000.00) W/loop
Power swing detection trip (0.000-60.000) s ±0.2% or ±10 ms whichever is greater
time
Second swing reclaim trip (0.000-60.000) s ±0.2% or ±20 ms whichever is greater
time
Minimum trip current (5-30)% of IBase ±1.0% of In
7.14 Automatic switch onto fault logic ZCVPSOF SEMOD153633-1 v3
SEMOD155890-2 v4

Automatic switch onto fault logic ZCVPSOF - -
Automatic switch onto fault logic ZCVPSOF is a function that gives an instantaneous trip at the
closing of breaker onto a fault. A dead-line detection check is provided to activate ZCVPSOF when
the line is dead.
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Technical manual
Mho distance protections cannot operate for switch onto fault condition when the phase voltages
are close to zero. An additional logic based on VI Level is used for this purpose.
ZCVPSOF is a complementary function to the distance protection function. It is enabled for

operation either by the closing command to the circuit breaker (normally closed auxiliary contact
of the circuit breaker) or automatically by the dead-line detection. Once enabled, it remains active
for tSOTF duration after the enabling signal is reset. The protection function can be enabled for
tripping during the activated time, freely selected from the functions included in the terminal. The
pickup of any of the selected protection functions during the enabled condition results in an
immediate TRIP output from the function.
ZCVPSOF
I3P* TRIP
V3P*
BLOCK
START_DLYD
BC
ZACC
Figure 232: ZCVPSOF function block
Table 207: ZCVPSOF Input signals

I3P GROUP - Current DFT
SIGNAL
V3P GROUP - Voltage DFT
SIGNAL
START_DLYD BOOLEAN 0 Start from function to be accelerated with delay by SOTF
BC BOOLEAN 0 External enabling of SOTF
ZACC BOOLEAN 0 Distance zone to be accelerated by SOTF
Table 208: ZCVPSOF Output signals

7.14.5 Settings IP15016-1 v2
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Technical manual
Table 209: ZCVPSOF Group settings (basic)

Enabled
AutoInitMode DLD disabled - - DLD disabled Automatic switch onto fault initialization
Voltage
Current
Current & Voltage
Mode Impedance - - VILevel Mode of operation of SOTF Function
VILevel
VILvl&Imp
IphPickup 1 - 100 %IB 1 20 Current level for detection of dead line in
% of IBase
UVPickup 1 - 100 %VB 1 70 Voltage level for detection of dead line in
% of VBase
tDuration 0.000 - 60.000 s 0.001 0.020 Time delay for VI detection (s)
tSOTF 0.000 - 60.000 s 0.001 1.000 Drop off delay time of switch onto fault
function
tDLD 0.000 - 60.000 s 0.001 0.200 Delay time for activation of dead line
detection
tOperate 0.03 - 120.00 s 0.01 0.03 Time delay to operate of switch onto fault
function
Table 210: ZCVPSOF Non group settings (basic)

groups

Table 211: ZCVPSOF Monitored data

IA REAL - A Current in phase A
IB REAL - A Current in phase B
IC REAL - A Current in phase C
VA REAL - kV Voltage in phase A
VB REAL - kV Voltage in phase B
VC REAL - kV Voltage in phase C
The automatic switch onto fault logic ZCVPSOF can be activated externally (by the breaker-closed
input) or internally (automatically) with the dead-line detection using the VI level-based logic.
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Technical manual
When the setting AutoInitMode is DLD disabled, ZCVPSOF is activated by an external binary input
BC.
When the setting AutoInitMode is set to either Voltage, Current or Current & Voltage modes,
ZCVPSOF is activated by the dead-line detection.
The activation from the dead-line detection function is released if the internal signal DeadLine
from the UlLevel Detector function is activated at the same time as the inputs ZACC and
START_DLYD are not activated at least for the duration of tDLD. The internal signal DeadLine from
the UlLevel Detector function is activated under any of the following conditions:
• If all three-phase currents are below the setting IPh< and the AutoInitMode setting is set to
Current
• If all three-phase voltages are below the setting UPh< and the AutoInitMode setting is set to
Voltage
• If all three-phase currents and voltages are below the settings IPh< and UPh< and the
AutoInitMode setting is set to Current & Voltage
The activated signal is extended for the duration of tSOTF.
To get the TRIP signal, one of the different operate modes must also be selected with the Mode
parameter.
• Mode = Impedance; TRIP is released if the input ZACC is activated (connected normally to the
nondirectional distance protection zone) or the START_DLYD input is activated with a set time
delay of tOperate
• Mode = UlLevel; TRIP is released if UlLevel detector is activated
• Mode = UlLvl&Imp; TRIP is released based either on the impedance-measured criteria or
UlLevel detection
The SOTF UlLevel Detector logic is based on current and voltage levels. The internal signal
SOTFUILevel is activated if the phase voltage is below the set UPh< and the corresponding phase
current is above the set IPh< for a time longer than the duration set by tDuration.
The function can be blocked by activating the input BLOCK.
The measured phase voltages and currents are provided as service values.
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Technical manual
BLOCK
AND 0 TRIP
15
BC
AutiInit=On
OR 0
ZACC AND 200
0 1000
IL1
deadLine
IL2
IL3
VA VILevel detector
VB
VC
IphPickup
SOTFVILevel
VphPickup
AND
Mode = Impedance
AND OR
Mode = UILevel
OR
AND
Mode = UILvl&Imp
en07000084_ansi.vsd
Figure 233: Simplified logic diagram for Automatic switch onto fault logic
M16043-1 v11
Table 212: ZCVPSOF technical data

Parameter Range or value Accuracy
Trip voltage, detection of dead line (1–100)% of ±0.5% of Vn
VBase
Trip current, detection of dead line (1–100)% of ±1.0% of In
IBase
Time delay to trip for the switch onto fault (0.03-120.00) s ±0.2% or ±20 ms whichever is greater
function
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Technical manual
Parameter Range or value Accuracy

Time delay for VI detection (0.000-60.000) s ±0.2% or ±20 ms whichever is greater
Delay time for activation of dead line detection (0.000-60.000) s ±0.2% or ±20 ms whichever is greater
Drop-off delay time of switch onto fault function (0.000-60.000) s ±0.2% or ±30 ms whichever is greater
7.15 Power swing logic PSLPSCH SEMOD153597-1 v3
SEMOD175682-2 v3

Power swing logic PSLPSCH - -
Power Swing Logic (PSLPSCH) is a complementary function to Power Swing Detection

(ZMRPSB,68) function. It provides possibility for selective tripping of faults on power lines during
system oscillations (power swings or pole slips), when the distance protection function should
normally be blocked. The complete logic consists of two different parts:
• Communication and tripping part: provides selective tripping on the basis of special distance
protection zones and a scheme communication logic, which are not blocked during the
system oscillations.
• Blocking part: blocks unwanted operation of instantaneous distance protection zone 1 for
oscillations, which are initiated by faults and their clearing on the adjacent power lines and
other primary elements.
PSLPSCH
BLOCK TRIP
STZMUR STZMURPS
STZMOR BLKZMUR
STPSD BLKZMOR
STDEF CS
STZMPSD
CACC
AR1P1
CSUR
CR
Figure 234: PSLPSCH function block
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Technical manual
7.15.4 Signals
Table 213: PSLPSCH Input signals

PUZMUR BOOLEAN 0 Pickup of the underreaching zone
PUZMOR BOOLEAN 0 Pickup of the overreaching zone
PUPSD BOOLEAN 0 Power swing detected
PUDOG BOOLEAN 0 Pickup from ground Fault Protection in forward or reverse
direction
PUZMPSD BOOLEAN 0 Operation of Power Swing Detection external characteristic
PLTR_CRD BOOLEAN 0 Overreaching ZM zone to be accelerated
AR1P1 BOOLEAN 0 Single pole auto-reclosing in progress
CSUR BOOLEAN 0 Carrier send by the underreaching power-swing zone
CR BOOLEAN 0 Carrier receive signal during power swing detection operation
Table 214: PSLPSCH Output signals

TRIP BOOLEAN Trip through Power Swing Logic
PUZMURPS BOOLEAN Pickup of Underreaching zone controlled by PSL to be used in
configuration
BLKZMUR BOOLEAN Block trip of underreaching impedance zone
BLKZMOR BOOLEAN Block trip of overreaching distance protection zones
CS BOOLEAN Carrier send signal controlled by the power swing
7.15.5 Settings
Table 215: PSLPSCH Group settings (basic)

Enabled
tDZ 0.000 - 60.000 s 0.001 0.050 Permitted max oper time diff between
higher and lower zone
tDZMUR 0.000 - 60.000 s 0.001 0.200 Delay for oper of underreach zone with
detected diff in oper time
tCS 0.000 - 60.000 s 0.001 0.100 Conditional timer for sending the CS at
power swings
tTrip 0.000 - 60.000 s 0.001 0.100 Conditional timer for tripping at power
swings
tBlkTr 0.000 - 60.000 s 0.001 0.300 Timer for blocking the overreaching zones
trip
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Technical manual
7.15.6.1 Communication and tripping logic SEMOD131352-4 v2
Communication and tripping logic as used by the power swing distance protection zones is
schematically presented in figure 235.
PUDOG
AR1P1 AND
PUPSD
CS
BLOCK AND 0-tCS AND
0
CSUR
BLKZMUR
AND
0
0-tTrip 0-tBlkTr
0
PLTR_CRD TRIP
OR
CR AND
en06000236_ansi.en
Figure 235: Simplified logic diagram – power swing communication and tripping logic
The complete logic remains blocked as long as there is a logical one on the BLOCK functional input
signal. Presence of the logical one on the PUDOG functional input signal also blocks the logic as
long as this block is not released by the logical one on the AR1P1 functional input signal. The
functional output signal BLKZMUR remains logical one as long as the function is not blocked
externally (BLOCK is logical zero) and the ground-fault is detected on protected line (PUDOG is
logical one), which is connected in three-phase mode (AR1P1 is logical zero). Timer tBlkTr prolongs
the duration of this blocking condition, if the measured impedance remains within the operate
area of the Power Swing Detection (ZMRPSB, 68) function (PUPSD input active). The BLKZMUR can
be used to block the operation of the power-swing zones.
Logical one on functional input CSUR, which is normally connected to the TRIP functional output of
a power swing carrier sending zone, activates functional output CS, if the function is not blocked
by one of the above conditions. It also activates the TRIP functional output.
Initiation of the CS functional output is possible only, if the PUPSD input has been active longer
than the time delay set on the security timer tCS.
Simultaneous presence of the functional input signals CACC and CR (local trip condition) also
activates the TRIP functional output, if the function is not blocked by one of the above conditions
and the PUPSD signal has been present longer then the time delay set on the trip timer tTrip.
7.15.6.2 Blocking logic SEMOD131352-14 v2
Figure 236 presents the logical circuits, which control the operation of the underreaching zone
(zone 1) at power swings, caused by the faults and their clearance on the remote power lines.
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Technical manual
AND
BLKZMOR
AND
PUZMUR
PUZMURPS
BLOCK AND 0-tZL OR
0 AND
PUZMOR
PUZMPSD AND 0-tDZ
0 OR
PUPSD
AND
-loop
en06000237_ansi.vsd
Figure 236: Control of underreaching distance protection (Zone 1) at power swings caused by
the faults and their clearance on adjacent lines and other system elements
The logic is disabled by a logical one on functional input BLOCK. It can start only if the following
conditions are simultaneously fulfilled:
• PUPSD functional input signal must be a logical zero. This means, that Power swing detection
(ZMRPSB, 68) function must not detect power swinging over the protected power line.
• PUZMPSD functional input must be a logical one. This means that the impedance must be
detected within the external boundary of ZMRPSB (68) function.
• PUZMOR functional input must be a logical one. This means that the fault must be detected
by the overreaching distance protection zone, for example zone 2.
The PUZMURPS functional output, which can be used in complete terminal logic instead of a
normal distance protection zone 1, becomes active under the following conditions:
• If the PUZMUR signal appears at the same time as the PUZMOR or if it appears with a time
delay, which is shorter than the time delay set on timer tDZ.
• If the PUZMUR signal appears after the PUZMOR signal with a time delay longer than the delay
set on the tDZ timer, and remains active longer than the time delay set on the tZL timer.
The functional output signal can be used to block the operation of the higher distance protection
zone, if the fault has moved into the zone 1 operate area after tDZ time delay.
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Technical manual
SEMOD171935-5 v5
Table 216: PSLPSCH technical data

Permitted maximum (0.000 — 60.0000) s ±0,2% or ±15 ms whichever is greater
operating time difference
between higher and lower
zone
Delay for operation of (0.000 — 60.0000) s ±0,2% or ±15 ms whichever is greater
underreach zone with
detected difference in
operating time
Conditional timer for (0.000 — 60.0000) s ±0,2% or ±15 ms whichever is greater
sending the CS at power
swings
Conditional timer for (0.000 — 60.0000) s ±0,2% or ±15 ms whichever is greater
tripping at power swings
Timer for blocking the (0.000 — 60.0000) s ±0,2% or ±15 ms whichever is greater
overreaching zones trip
7.16 Pole slip protection PSPPPAM (78) SEMOD156709-1 v2
SEMOD158949-2 v4

Pole slip protection PSPPPAM Ucos 78
7.16.2 Functionality
SEMOD143246-17 v7
Sudden events in an electric power system such as large changes in load, fault occurrence or fault
clearance, can cause power oscillations referred to as power swings. In a non-recoverable
situation, the power swings become so severe that the synchronism is lost, a condition referred to
as pole slipping. The main purpose of the pole slip protection (PSPPPAM ,78) is to detect, evaluate,
and take the required action for pole slipping occurrences in the power system.
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Technical manual
PSPPPAM (78)
I3P* TRIP
V3P* TRIP1
BLOCK TRIP2
BLKGEN PICKUP
BLKMOTOR ZONE1
EXTZONE1 ZONE2
GEN
MOTOR
SFREQ
SLIPZOHM
SLIPZPER
VCOS
VCOSPER
Figure 237: PSPPPAM (78) function block
7.16.4 Signals
Table 217: PSPPPAM (78) Input signals

I3P GROUP - Current group connection
SIGNAL
V3P GROUP - Voltage group connection
SIGNAL
BLKGEN BOOLEAN 0 Block operation in generating direction
BLKMOTOR BOOLEAN 0 Block operation in motor direction
EXTZONE1 BOOLEAN 0 Extension of zone1 with zone2 region
Table 218: PSPPPAM (78) Output signals

TRIP BOOLEAN Common trip signal
TRIP1 BOOLEAN Trip1 after the N1Limit slip in zone1
TRIP2 BOOLEAN Trip2 after the N2Limit slip in zone2
PICKUP BOOLEAN Common start signal
ZONE1 BOOLEAN First slip in zone1 region
ZONE2 BOOLEAN First slip in zone2 region
GEN BOOLEAN Generator is faster than the system
MOTOR BOOLEAN Generator is slower than the system
SFREQ REAL Slip frequency
SLIPZOHM REAL Slip impedance in ohms
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Technical manual

SLIPZPER REAL Slip impedance in percent of ZBase
VCOS REAL UCosPhi voltage
VCOSPER REAL VCosPhi voltage in percent of VBase
7.16.5 Settings
Table 219: PSPPPAM (78) Group settings (basic)

Operation Disabled - - Disabled Operation Enable / Disable
Enabled
OperationZ1 Disabled - - Enabled Operation Enable/Disable zone Z1
Enabled
OperationZ2 Disabled - - Enabled Operation Enable/Disable zone Z2
Enabled
ImpedanceZA 0.00 - 1000.00 % 0.01 10.00 Forward impedance in % of Zbase
ImpedanceZB 0.00 - 1000.00 % 0.01 10.00 Reverse impedance in % of Zbase
ImpedanceZC 0.00 - 1000.00 % 0.01 10.00 Impedance of zone1 limit in % of Zbase
AnglePhi 72.00 - 90.00 Deg 0.01 85.00 Angle of the slip impedance line
pick up Angle 0.0 - 180.0 Deg 0.1 110.0 Rotor angle for the pickup signal
TripAngle 0.0 - 180.0 Deg 0.1 90.0 Rotor angle for the trip1 and trip2 signals
N1Limit 1 - 20 - 1 1 Count limit for the trip1 signal
N2Limit 1 - 20 - 1 3 Count limit for the trip2 signal
Table 220: PSPPPAM (78) Group settings (advanced)

ResetTime 0.000 - 60.000 s 0.001 5.000 Time without slip to reset all signals
Table 221: PSPPPAM (78) Non group settings (basic)

MeasureMode PosSeq - - PosSeq Measuring mode (PosSeq, AB, BC, CA)
AB
BC
CA
InvertCTcurr No - - No Invert current direction
Yes
groups
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Technical manual

Table 222: PSPPPAM (78) Monitored data

SFREQ REAL - Hz Slip frequency
SLIPZOHM REAL - Ohm Slip impedance in ohms
SLIPZPER REAL - % Slip impedance in percent of ZBase
VCOS REAL - kV UCosPhi voltage
VCOSPER REAL - % VCosPhi voltage in percent of VBase
If the generator is faster than the power system, the rotor movement in the impedance and
voltage diagram is from right to left and generating is signaled. If the generator is slower than the
power system, the rotor movement is from left to right and motoring is signaled (the power
system drives the generator as if it were a motor).
The movements in the impedance plane can be seen in Figure 238. The transient behavior is
described by the transient EMF's EA and EB, and by X'd, XT and the transient system impedance ZS.
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Technical manual
Zone 1 Zone 2
EB X’d XT XS EA
IED
B A
jX
XS
Pole slip
impedance XT
d Apparent generator
movement impedance R
X’d
Figure 238: Movements in the impedance plain
where:
X'd = transient reactance of the generator
XT = short-circuit reactance of the step-up transformer
ZS = impedance of the power system A
The detection of rotor angle is enabled when:
• the minimum current exceeds 0.10 IN (IN is IBase parameter set under general setting).
• the maximum voltage falls below 0.92 VBase
• the voltage Ucosφ (the voltage in phase with the generator current) has an angular velocity of
0.2...8 Hz and
• the corresponding direction is not blocked.
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Technical manual
en07000004.vsd
Figure 239: Different generator quantities as function of the angle between the equivalent
generators
An alarm is given when movement of the rotor is detected and the rotor angle exceeds the angle
set for 'WarnAngle'.
Slipping is detected when:
• a change of rotor angle of min. 50 ms is recognized

• the slip line is crossed between ZA and ZB.
When the impedance crosses the slip line between ZB and ZC it counts as being in zone 1 and
between ZC and ZA in zone 2. The entire distance ZA-ZB becomes zone 1 when signal EXTZONE1 is
high (external device detects the direction of the centre of slipping).
After the first slip, the signals ZONE1 or ZONE2 and – depending on the direction of slip - either
GEN or MOTOR are issued.
Every time pole slipping is detected, the impedance of the point where the slip line is crossed and
the instantaneous slip frequency are displayed as measurements.
Further slips are only detected, if they are in the same direction and if the rate of rotor movement
has reduced in relation to the preceding slip or the slip line is crossed in the opposite direction
outside ZA-ZB. A further slip in the opposite direction within ZA-ZB resets all the signals and is
then signalled itself as a first slip.
The TRIP1 tripping command and signal are generated after N1 slips in zone 1, providing the rotor
angle is less than TripAngle. The TRIP2 signal is generated after N2 slips in zone 2, providing the
rotor angle is less than TripAngle.
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Technical manual
All signals are reset if:
• the direction of movement reverses

• the rotor angle detector resets without a slip being counted or
• no rotor relative movement was detected during the time ResetTime.
Imin > 0.10 IBase
Vcos< 0.92 VBase AND
PICKUP
AND
0.2  Slip.Freq.  8 Hz
  startAngle
ZONE1
AND
Z cross line ZC - ZB
ZONE2
AND
Z cross line ZA - ZC
Counter
a
ab
N1Limit b TRIP1
AND
  tripAngle OR
TRIP
Counter
a
ab
N2Limit b TRIP2
AND
ANSI07000005.vsd
Figure 240: Simplified logic diagram for pole slip protection PSPPPAM (78)
GUID-88E02516-1BFE-4075-BEEB-027484814697 v2
Table 223: PSPPPAM (78) technical data

Impedance reach (0.00 - 1000.00)% of Zbase ±2.0% of Vn/In
Zone 1 and Zone 2 trip (1 - 20) -

counters
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Technical manual
7.17 Out-of-step protection OOSPPAM (78) GUID-667DAF85-B87B-47AA-9EAA-CD349E66F22F v3
GUID-BF2F1533-BA39-48F0-A55C-0B13A393F780 v2

Out-of-step protection OOSPPAM 78
<
7.17.2 Functionality GUID-BF2F7D4C-F579-4EBD-9AFC-7C03296BD5D4 v7
The out-of-step protection OOSPPAM (78) function in the IED can be used for both generator
protection and as well for line protection applications.
The main purpose of the OOSPPAM (78) function is to detect, evaluate, and take the required
action during pole slipping occurrences in the power system.
The OOSPPAM (78) function detects pole slip conditions and trips the generator as fast as
possible, after the first pole-slip if the center of oscillation is found to be in zone 1, which normally
includes the generator and its step-up power transformer. If the center of oscillation is found to
be further out in the power system, in zone 2, more than one pole-slip is usually allowed before the
generator-transformer unit is disconnected. A parameter setting is available to take into account
the circuit breaker opening time. If there are several out-of-step relays in the power system, then
the one which finds the center of oscillation in its zone 1 should operate first.
Two current channels I3P1 and I3P2 are available in OOSPPAM function to allow the direct
connection of two groups of three-phase currents; that may be needed for very powerful
generators, with stator windings split into two groups per phase, when each group is equipped
with current transformers. The protection function performs a simple summation of the currents
of the two channels I3P1 and I3P2.
7.17.3 Function block GUID-CB98C615-8A93-438D-9DF0-542F333198AC v4
OOSPPAM (78)
I3P1* TRIP
I3P2* TRIPZ1
V3P* TRIPZ2
BLOCK PICKUP
BLKGEN GENMODE
BLKMOT MOTMODE
EXTZ1 R
X
SLIPFREQ
ROTORANG
VCOSPHI
Figure 241: OOSPPAM (78) function block
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Technical manual
7.17.4 Signals
Table 224: OOSPPAM (78) Input signals

I3P1 GROUP - Group connection for three-phase current input 1
SIGNAL
I3P2 GROUP - Group connection for three-phase current input 2
SIGNAL
V3P GROUP - Group connection for three-phase voltage input
SIGNAL
BLKGEN BOOLEAN 0 Block operation in generating direction
BLKMOT BOOLEAN 0 Block operation in motor direction
EXTZ1 BOOLEAN 0 Extension of zone1 reach to zone2 settings
Table 225: OOSPPAM (78) Output signals

TRIP BOOLEAN Common trip, issued when either zone 1 or zone 2 trip
TRIPZ1 BOOLEAN Zone 1 trip
TRIPZ2 BOOLEAN Zone 2 trip
PICKUP BOOLEAN Set when measured impedance enters lens characteristic
GENMODE BOOLEAN Generator rotates faster than the system during pole slip
MOTMODE BOOLEAN Generator rotates slower than the system during pole slip
R REAL Real part of measured positive-sequence impedance % of VBase/
(sqrt(3)*IBase)
X REAL Imaginary part of measured positive-seq impedance % of VBase/
(sqrt(3)*IBase)
SLIPFREQ REAL Slip frequency in Hz
ROTORANG REAL Rotor angle as estimated by the out-of-step function
VCOSPHI REAL Estimated Ucos(Phi) voltage during pole slip, in V
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Technical manual
7.17.5 Settings
Table 226: OOSPPAM (78) Group settings (basic)

Enabled
OperationZ1 Disabled - - Enabled Operation Zone1 Enable/Disable
Enabled
ReachZ1 1.00 - 100.00 % ZFw 0.01 50.00 Percentage part of total forward
impedance; defines Z1 reach
OperationZ2 Disabled - - Enabled Operation Z2 Enable/Disable
Enabled
tBreaker 0.000 - 1.000 s 0.001 0.040 Breaker opening time; use default 0s value
if it is unknown
Table 227: OOSPPAM (78) Group settings (advanced)

NoOfSlipsZ1 1 - 20 - 1 1 Number of pole-slips in zone 1 required for
zone 1 trip
NoOfSlipsZ2 1 - 60 - 1 3 Number of pole-slips in zone 2 required for
zone 2 trip
tReset 1.000 - 60.000 s 0.001 6.000 Time without any slip required to
completely reset function
Table 228: OOSPPAM (78) Non group settings (basic)

groups
ForwardR 0.00 - 1000.00 %ZB 0.01 1.00 Real part of total forward impedance for
Z2, in % of VBase/(sqrt(3)*IBase)
ForwardX 0.00 - 1000.00 %ZB 0.01 10.00 Imag. part of total forward impedance for
Z2, in % of VBase/(sqrt(3)*IBase)
ReverseR 0.00 - 1000.00 %ZB 0.01 1.00 Real part of source impedance behind
relay, in % of VBase/(sqrt(3)*IBase)
ReverseX 0.00 - 1000.00 %ZB 0.01 10.00 Imag. part of source impedance behind
relay, in % of VBase/(sqrt(3)*IBase)
InvertCTCurr No - - No Invert current direction
Yes
Table 229: OOSPPAM (78) Non group settings (advanced)

pick up Angle 90.0 - 130.0 Deg 0.1 110.0 Angle between two rotors to get the pick
up signal, in deg
TripAngle 15.0 - 90.0 Deg 0.1 60.0 Maximum rotor angle to allow trip signals,
in deg
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Technical manual

Table 230: OOSPPAM (78) Monitored data

CURRENT REAL - A Magnitude of the measured positive-
sequence current, in A
VOLTAGE REAL - kV Magnitude of the measured positive-
sequence voltage, in V
R REAL - % Real part of measured positive-sequence
impedance % of VBase/(sqrt(3)*IBase)
X REAL - % Imaginary part of measured positive-seq
impedance % of VBase/(sqrt(3)*IBase)
SLIPFREQ REAL - Hz Slip frequency in Hz
ROTORANG REAL - deg Rotor angle as estimated by the out-of-
step function
VCOSPHI REAL - kV Estimated Ucos(Phi) voltage during pole
slip, in V

GUID-787EEB01-B760-4D4B-AB4E-1DCD6ABFFF5E v6
General
Under balanced and stable conditions, a generator operates with a constant rotor angle (power
angle), delivering active electrical power to the power system, which is approximately equal to the
input mechanical power on the generator axis.The currents and voltages are constant and stable.
An out-of-step condition is characterized by periodic changes in the rotor angle, that leads to a
wild flow of the synchronizing power; so there are also periodic changes of rotational speed,
currents and voltages. When displayed in the complex impedance plane, these changes are
characterized by a cyclic change in the complex load impedance Z(R, X) as measured at the
terminals of the generator, or at the location of the instrument transformers of a power line
connecting two power subsystems. This is shown in Figure 242.
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Technical manual
1.5 ¬ trajectory
of Z(R, X)
to the 3rd
The 2nd pole-slip
1 The 1st X in Ohms
pole slip
pole slip
occurred Pre-disturbance
occurred
RE normal load
- - -- -
Imaginary part (X) of Z in Ohms
- - - - ----------- - - - - Z(R, X)
0.5 - 3 ---- - --- --
Zone 2 -- -- 1 ---- -
- - 2 -- - 0
- --- - -
^ --^ ^ ^ ^----^ ^ ^ ^ ^ ^ ^ ---- -
- - ^ -^- ^ ^ ^ --^
Zone 1 - ---- - -
0 - -- relay ---- -
- - - -
limit of reach® -
- ---
--- -
- R in Ohms
- -- -
- -
-- -- - -
- --
lens determined - - ®----- ------ -
0- -® pre-disturbance Z(R, X)
- -
-0.5 by the setting - - - - -------- - - - - -
1 ® Z(R, X) under 3-phase fault
Pickup Angle = 120° SE
2 ® Z(R, X) when fault cleared
3® Z when pole-slip declared
-1
-1.5 -1 -0.5 0 0.5 1 1.5
Real part (R) of Z in Ohms
Figure 242: Loci of the complex impedance Z(R, X) for a typical case of generator losing step
after a short circuit that was not cleared fast enough
Under typical, normal load conditions, when the protected generator supplies the active and the
reactive power to the power system, the complex impedance Z(R, X) is in the 1st quadrant, point 0
in Figure 242. One can see that under a three-phase fault conditions, the centre of oscillation is at
the point of fault, point 1, which is logical, as all three voltages are zero or near zero at that point.
Under the fault conditions the generator accelerated and when the fault was finally cleared, the
complex impedance Z(R, X) jumped to the point 2. By that time, the generator has already lost its
step, Z(R, X) continues its way from the right-hand side to the left-hand side, and the 1st pole-slip
cannot be avoided. If the generator is not immediately disconnected, it will continue pole-slipping
— see Figure 242, where two pole-slips (two pole-slip cycles) are shown. Under out-of-step
conditions, the centre of oscillation is where the locus of the complex impedance Z(R, X) crosses
the (impedance) line connecting the points SE (Sending End), and RE (Receiving End). The point on
the SE – RE line where the trajectory of Z(R, X) crosses the impedance line can change with time
and is mainly a function of the internal induced voltages at both ends of the equivalent two-
machine system, that is, at points SE and RE.
Measurement of the magnitude, direction and rate-of-change of load impedance relative to a

generator’s terminals provides a convenient and generally reliable means of detecting whether
machines are out-of-step and pole-slipping is taking place. Measurement of the rotor (power)
angle δ is important as well.
Rotor (power) angle δ can be thought of as the angle between the two lines, connecting point 0 in
Figure 242, that is, Z(R, X) under normal load, with the points SE and RE, respectively. These two
lines are not shown in Figure 242. Normal values of the power angle, that is, under stable, steady-
state, load conditions, are from 30 to 60 electrical degrees. It can be observed in Figure 243 that
the angle reaches 180 degrees when the complex impedance Z(R, X) crosses the impedance line SE
– RE. It then changes the sign, and continues from -180 degrees to 0 degrees, and so on. Figure
243 shows the rotor (power) angle and the magnitude of Z(R, X) against time for the case from
Figure 242.
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Technical manual
4
|Z| in Ohms
rotor (power)
3 normal angle in rad
angle
Impe dance Z in Ohm and rotor a ngle in radian ® load
Z(R, X) unde r fa ult lies |Z|
2
on the impe dance line
or nea r (for 3-ph faults )
1
0
0
fault 500 ms
-1 fa ult
occ urrs
Unde r 3-pha s e fa ult
condition rotor a ngle 3
-2
of a pp. ±180 de gre e s
is m e a s ure d ...
2
-3 Z(R,X) cros s e d
1 1 the im pe da nce line , Z-line ,
conne cting points S E - RE
-4
0 200 400 600 800 1000 1200 1400
Time in millis econds ®
Figure 243: Rotor (power) angle and magnitude of the complex impedance Z(R, X) against the
time
In order to be able to fully understand the principles of OOSPPAM (78), a stable case, that is, a case
where the disturbance does not make a generator to go out-of-step, must be shown.
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Technical manual
1
SE RE
G X [Ohm]
0.8 Z(R,X) 20 ms
fault
relay after line out
- - - RE - - -
0.6 - - --
-- ----------- - pre-fault
Imaginary part (X) of Z in Ohms → - ---- - - 4 -
zone 2 -
-- -- ---
- - Z(R,X)
0.4 - -- - --- 2 -
- -
- --- -1 5
- --- fault→
- -- -
0.2 X-line → ^ -^ ^ ^ ^ ---^ ^ 3 -- -
- -
- ^ ^ ^ ^ ^ ^ --^- ^ ^ -
- -- Z-line→ -- ^ -^ 0
-- --
- -- -- - 6
0 - -- - - -
- -
- -
- -
limit of -- - R
- -- relay lens → --- -
-- -
-0.2 reach - -- 110° ---- -
zone 1- - --- -
-- -
-
--- -
- --- --- -
-0.4 -- --- ------ --
-- ------ -
- - - - -
-0.6 SE - - -
0 → pre-fault Z(R, X)
this circle forms 3 → Z(R, X) under fault
-0.8 the right-hand side 5 → Z 20 ms after line out
edge of the lens 6 → pow er line reclosed
-1
-1 -0.5 0 0.5 1 1.5
Real part (R) of Z in Ohms → ANSI10000111-1-en.vsd
Figure 244: A stable case where the disturbance does not make the generator to go out-of-
step
It shall be observed that for a stable case, as shown in Figure 244, where the disturbance does not
cause the generator to lose step, the complex impedance Z(R, X) exits the lens characteristic on
the same side (point 4) it entered it (point 2), and never re-enters the lens. In a stable case, where
the protected generator remains in synchronism, the complex impedance returns to quadrant 1,
and, after the oscillations fade, it returns to the initial normal load position (point 0), or near.
7.17.7.1 Lens characteristic GUID-F9BD3225-C87F-4FA6-A267-2248F0A4E707 v6
A precondition in order to be able to construct a suitable lens characteristic is that the power
system in which OOSPPAM (78) is installed, is modeled as a two-machine equivalent system, or as
a single machine – infinite bus equivalent power system. Then the impedances from the position
of OOSPPAM (78) in the direction of the normal load flow (that is from the measurement point to
the remote system) can be taken as forward. The lens characteristic, as shown in Figure242 and
Figure244, is obtained so that two equal in size but differently offset Mho characteristics are set
to overlap. The resultant lens characteristic is the loci of complex impedance Z(R, X) for which the
rotor (power) angle is constant, for example 110 degrees or 120 degrees; if the rotor (power) angle
approaches this value, then there is a high risk to have an out of step condition. The limit-of- reach
circle is constructed automatically by the algorithm; it is about 10% wider than the the circle that
has the line SE-RE as diameter (that is the out-of-step characteristic which corresponds to the
rotor (power) angle of 90 degrees). Figure 245 illustrates construction of the lens characteristic
for a power system.
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Technical manual
X
Position of the OOS
- - RE - - -
0.6 - - - --- - relay is the origin of
- - -- --- - the R - X plane
- -- - -- -
- --- Ze -- -
- Zone 2 -- -- -
0.4 X-line - - - -- -
-- --
determined - -- Zline -- -
- -- -- -
by the ® ^ ^- ^ --- -- -
0.2 ^ ^ ^- ^ --
setting - ^ ^ ^ ^
Imaginary part (X) of Z in Ohms
- ^ ^ ^ --- ^ -
---
ReachZ1 - -- - ^ ^ ^-
Ztr -
- --
- -- - R
0 - Zone 1 -- --- -
-- relay -
- -- 120° -- Z(R,X) -
- -- --- -
- -- ¬ Z-line -- -
-0.2 - Zgen -
- -- -- -
limit-of-reach® - -- --
-¬ -the locus
-- - Lens is
circle depends on- -- -- -
- -- -- of constant rotor (power)
-0.4
the position of the - -- ---- -
-
- - -- - -- angle,
- e.g. 120°.
-
points SE and RE - - -- - - - - - - Lens' width determined
SE
-0.6 by the setting Pickup Angle
-0.8 -0.6 -0.4 -0.2 0 0.2 0.4 0.6 0.8 1

Real part (R) of Z in Ohms
Figure 245: Construction of the lens characteristic for a power system
ReverseZ(ReverseR, ReverseX) ForwardZ(ForwardR, ForwardX)
Zgen(Rgen, Xgen) Ztr(Rtr, Xtr) Zline(Rline, Xline) Zeq(Req, Xeq)
Generator Transformer Infinite power

13.8 kV 13.8 / 220 kV system
Power line System
13.8 kV d Y 220 kV equivalent
SE RE
Out-Of-Step ReverseR = Rg ForwardR = Rtr + Rline + Req

REG protection ReverseX = Xd’ For wardX = Xtr + Xline + Xeq
OOSPPAM
All impedances must be referred to the generator voltage 13.8 kV
Figure 246: Example of an actual power system

To be able to automatically construct the lens characteristic for a system shown in Figure 246, the
actual power system must be modeled as a two-machine equivalent system, or as a single
machine – infinite bus equivalent system, the following information is necessary: Zgen(Rgen,
Xgen), Ztr(Rtr, Xtr), Zline(Rline, Xline), Zeq(Req, Xeq), and the setting PickupAngle, for example 120
degrees. All impedances must be referred to the voltage level where the out-of-step protection
relay is placed; in the case shown in Figure 246 the relay is connected to the terminals of the
generator and, therefore, the previous quantities shall be referred to the generator nominal
voltage and nominal current. The impedances from the position of the out-of-step protection in
the direction of the normal load flow can be taken as forward.
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Technical manual
The out-of-step relay, as in Figure 246 looks into the system and the impedances in that direction
are forward impedances:
• ForwardX = Xtr + Xline + Xeq (All values referred to generator voltage)

• ForwardR = Rtr + Rline + Req (All values referred to generator voltage)
The impedances that can be measured in the reverse direction are:
• ReverseX = Xd' (Generator transient reactance suitable for this protection)

• ReverseR = Rg (Relatively very small, can often be neglected)
Resistances are much smaller than reactances, but in general can not be neglected. The ratio
(ForwardX + ReverseX) / (ForwardR + ReverseR) determines the inclination of the Z-line,
connecting the point SE (Sending End) and RE (Receiving End), and is typically approximately 85
degrees. While the length of the Z-line depends on the values of ForwardX, ReverseX, ForwardR,
and ReverseR, the width of the lens is a function of the setting PickupAngle.The lens is broader for
smaller values of the PickupAngle, and becomes a circle for PickupAngle = 90 degrees.
When the complex impedance Z(R, X) enters the lens, pole slipping is imminent, and a pickup
signal is issued. The angle recommended to form the lens is 110 or 120 degrees, because it is this
rotor (power) angle where problems with dynamic stability usually begin. Rotor (power) angle 120
degrees is sometimes called “the angle of no return” because if this angle is reached under
generator power swings, the generator is most likely to lose step.
7.17.7.2 Detecting an out-of-step condition GUID-5BBAE253-3D01-4C97-A7CF-A12084FD1810 v4
An out-of-step condition is characterized by periodic changes of the rotor angle, that leads to a
wild flow of the synchronizing power; so there are also periodic changes of rotational speed,
currents and voltages. When displayed in the complex impedance plane, these changes are
characterized by a cyclic change in the complex load impedance Z(R, X) as measured at the
terminals of the generator, or at the location of the instrument transformers of a power line
connecting two power sub-systems. This was shown in Figure 242. When a synchronous machine
is out-of-step, pole-slips occur. To recognize a pole-slip, the complex impedance Z(R,X) must
traverse the lens from right to left in case of a generator and in the opposite direction in case of a
motor. Another requirement is that the travel across the lens takes no less than a specific
minimum traverse time, typically 40...60 milliseconds. The above timing is used to discriminate a
fault from an out-of-step condition. In Figure 242, some important points on the trajectory of Z(R,
X) are designated. Point 0: the pre-fault, normal load Z(R, X). Point 1: impedance Z under a three-
phase fault with low fault resistance: Z lies practically on, or very near, the Z-line. Transition of the
measured Z from point 0 to point 1 takes app. 20 ms, due to Fourier filters. Point 2: Z immediately
after the fault has been cleared. Transition of the measured Z from point 1 to point 2 takes
approximately 20 ms, due to Fourier filters. The complex impedance then travels in the direction
from the right to the left, and exits the lens on the opposite side. When the complex impedance
exits the lens on the side opposite to its entrance, the 1st pole-slip has already occurred and more
pole-slips can be expected if the generator is not disconnected. Figure 242 shows two pole-slips.
Figures like Figure 242 and Figure 244 are always possible to draw by means of the analog output
data from the pole-slip function, and are of great help with eventual investigations of the
performance of the out-of-step function.
7.17.7.3 Maximum slip frequency GUID-1311529F-21F8-40A0-8D01-0296BD9B4F00 v5
A pole-slip may be detected if it has a slip frequency lower than a maximum value fsMax. The
specific value of fsMax depends on the setting (parameter) PickupAngle (which determines the
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Technical manual
width of the lens characteristic). A parameter in this calculation routine is the value of the
minimum traverse time, traverseTimeMin. The minimum traverse time is the minimum time that
the travel of the complex impedance Z(R, X) through the lens, from one side to the other, must last
in order to recognize that a pole-slip has occurred. The value of the internal constant
traverseTimeMin is a function of the set PickupAngle.For values of PickupAngle <= 110°,
traverseTimeMin = 50 ms. For values PickupAngle > 110°, traverseTimeMin = 40 ms. The expression
which relates the maximum slip frequency fsMax and the traverseTimeMin is as follows:
1000  PickupAngle [°] 

fsMax [ Hz ] ≅ ⋅  1.000 - 
traverseTimeMin [ ms ]  180 [°] 
The maximum slip frequency fsMax for traverseTimeMin = 50 ms is:
PickupAngle = 90° → fsMax = 20 × 0.500 = 10.000 Hz

PickupAngle = 110° → fsMax = 20 × 0.388 = 7.777 Hz (default 110°)
The maximum slip frequency fsMax for traverseTimeMin = 40 ms is:

The minimum value of fsMax is 6.994 Hz. When PickupAngle = 110 degrees, fsMax = 7.777 Hz. This
implies, that the default PickupAngle = 110 degrees covers 90% of cases as, the typical final slip
frequency is between 2 - 5Hz. In practice, however, before the slip frequency, for example 7.777 Hz,
is reached, at least three pole-slips have occurred. In other words, if we consider a linear increase
of frequency from 50 Hz to 57.777 Hz, at least three pole-slips will occur (in fact: (57.777 - 50) / 2 =
3.889). The exact instantaneous slip-frequency expressed in Hz (corresponding to number of pole
slips per second) is difficult to calculate. The easiest and most exact method is to measure time
between two successive pole slips. This means that, the instantaneous slip-frequency is measured
only after the second pole-slip, if the protected machine is not already disconnected after the first
pole-slip. The measured value of slipsPerSecond (SLIPFREQ) is equal to the average slip-frequency
of the machine between the last two successive pole-slips.
7.17.7.4 Taking care of the circuit breaker GUID-35B49D7D-80AF-4DB0-A3C5-0CA0E54A9CA1 v4
Although out-of-step events are relatively rare, the out-of-step protection should take care of the
circuit breaker health. The electromechanical stress to which the breaker is exposed shall be
minimized. The maximum currents flowing under out-of-step conditions can be even greater that
those for a three-phase short circuit on generator terminals; see Figure 248. The currents flowing
are highest at rotor angle 180 degrees, and smallest at 0 degrees, where relatively small currents
flow. To open the circuit breaker at 180 degrees, when not only the currents are highest, but the
two internal (that is, induced) voltages at both ends are in opposition, could be fatal for the circuit
breaker. There are two methods available in order to minimize the stress; the second method is
more advanced than the first one.
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Technical manual
The first method

The circuit breaker is only allowed to break the current when the rotor angle has become less than
the set value TripAngle, on its way to 0 electrical degrees. A recommended value for the setting
TripAngle is 90 degrees or less, for example 60 degrees. Figure 247 illustrates the case with
TripAngle = 90 degrees. The offset Mho circle represents loci of the complex impedance Z(R, X) for
which the rotor (power) angle is 90 degrees. If the circuit breaker must not open before the rotor
angle has reached 90 degrees on its way towards 0 degrees, then it is clear that the circle delimits
the R – X plane into a “no trip” and a “trip” region. For TripAngle = 90 degrees, the trip command
will be issued at point 3 when the complex impedance Z(R, X) exits the circle. By that time the relay
logic had already ascertained the loss of step, and the general decision to trip the generator has
already been taken.
The second method

This method is more exact. If the break-time of the circuit breaker is known, (and specified as the
setting tBreaker) than it is possible to initiate a trip (break) command almost exactly tBreaker
milliseconds before the rotor (power) angle reaches 0 degrees, where the currents are at their
minimum possible values. The breaker contacts open at almost exactly 0 degrees, as illustrated in
Figure 248 for tBreaker = 0.060 s. The point in time when the breaker opening process must be
initiated is estimated by solving on-line the so called “synchronizer” differential equation. Note
that if tBreaker is left on the initial (default) value, which is zero (0), then the alternative setting
TripAngle decides when the trip command is given. If specified tBreaker > 0, for example tBreaker
= 0.040 second, then automatically, the TripAngle is ignored and the second, more exact method
applied.
X[Ohm]
0.6 trip RE - Receiving End (infinite bus)
region
loci of Z(R, X)
0.4 3
Imaginary part (X) of Z in Ohms →
no trip
region 1
here rotor here
0.2 2
angle rotor angle
is -90° no trip is +90°
rotor angle
region
= ±180°
0 no trip
relay
region R[Ohm]
inside ← Z - line connects
points SE & RE
-0.2 circle
← this circle
is loci of
outside the
the rotor
-0.4 circle is the trip
angle = 90°
region for
TripAngle <= 90° SE - Sending End (generator)
-0.6 -0.4 -0.2 0 0.2 0.4 0.6 0.8

Real part (R) of Z in Ohms →
Figure 247: The imaginary offset Mho circle represents loci of the impedance Z(R, X) for
which the rotor angle is 90 degrees
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Technical manual
35
very high currents due
Current in kA, trip command to CB, rotor angle in rad →

pos. seq. current in kA
to out-of-step condition
30 trip command to CB
rotor angle in radian
← after 1st
fault cleared → pole slip
25
← 2nd
20 current increases under

fault conditions
current decreases
15
fault
occurs
10 ← min. current
trip command →
normal load current issued here
← → ← tBreaker = 60 ms
5
← rotor angle
0
angle towards 0°
-5
0 200 400 600 800 1000 1200
Time in milliseconds →
Figure 248: Trip initiation when the break-time of the circuit breaker is known
7.17.7.5 Design GUID-1615F014-3529-45D0-813B-153754DED1C7 v3
At every execution of the function the following is calculated: active power P, reactive power Q,
rotor angle ROTORANG, quantity UCOSPHI, the positive-sequence current CURRENT and voltage
VOLTAGE. All other quantities, that can as well be read as outputs, are only calculated if the Z(R, X)
enters the limit of reach zone, which is a circle in the complex (R – X) plane. When the complex
impedance Z(R, X) enters the limit-of-reach region, the algorithm:
• determines in which direction the impedance Z moves, that is, the direction the lens is
traversed
• measures the time taken to traverse the lens from one side to the other one
If the traverse time is more than the limit 40 or 50 ms, a pole-slip is declared. If the complex
impedance Z(R, X) exits the lens on the same side it entered, then it is a stable case and the
protected machine is still in synchronism. If a pole-slip has been detected, then it is determined in
which zone the centre of oscillation is located. If the number of actual pole-slips exceeds the
maximum number of allowed pole-slips in either of the zones, a trip command is issued taking
care of the circuit breaker safety.
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Technical manual
R R
UPSRE Calculation of X X
UPSIM R and X parts
of the complex Z(R,X)
UPSMAG
positive-
IPSRE
sequence Z(R,X) NO
IPSIM
impedance within limit of Return
Z(R, X) reach?
YES UCOSPHI
Z(R,X) ROTORANG
within lens NO
Function alert
characteristic?
SLIPFREQ
YES GENMODE
Z(R,X) MOTMODE
LEFT Z(R,X) RIGHT NO
exited lens
entered lens
on the left- hand
from?
Motor losing Generator losing side?
step ? step ?
YES
Was
traverse time NO
more than
Calculation of 50 ms?
P
positive- sequence YES (pole- slip!)
active power P, Q TRIP
>= 1
reactive power Q, Number
ZONE 2 NO
rotor angle UCOSPHI
of pole- slips
ROTORANG exceeded in TRIPZ1
a zone? Open
and
ROTORANG circuit
UCOSPHI ZONE 1 TRIPZ2
breaker
safely
Figure 249: OOSPPAM (78) Simplified function block

SEMOD175136-2 v8
Table 231: OOSPPAM (78) technical data

Impedance reach (0.00 - 1000.00)% of Zbase ±2.0% of Vn/(√3 ⋅ In)
Rotor pickup angle (90.0 - 130.0) degrees ±5.0 degrees

Rotor trip angle (15.0 - 90.0) degrees ±5.0 degrees
Zone 1 and Zone 2 trip (1 - 20) -
counters
7.18 Phase preference logic PPLPHIZ SEMOD151920-1 v2
SEMOD151937-2 v2

Phase preference logic PPLPHIZ - -
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Technical manual
The Phase preference logic function PPLPHIZ is intended to be used in isolated or high impedance
grounded networks where there is a requirement to trip on only one of the faulty lines during a
cross-country fault. It can be used without preference to restrain trip for single ground faults with
a delayed zero-sequence current release.
For cross-country faults, the logic selects either the leading or lagging phase-ground loop for
measurement. It initiates trip on the preferred fault based on the selected phase preference. A
number of different phase preference combinations are available for selection.
PPLPHIZ provides an additional phase selection criteria, namely under voltage criteria, suitable for
cross-country faults. In radial networks, where there is no fault current in the phase with the
external fault, current or impedance based phase selection methods become ineffective. Hence,
only voltage can be used for phase selection. The phase selection result will be the same for all
bays on a bus since the voltage is the same, which is an important condition for tripping with
phase preference.
In meshed and stronger networks, it is difficult to find appropriate under-voltage or phase

selection settings. If PPLPHIZ is unable to detect both faulty phases, then it is not possible to
provide preference. The distance protection will still be released however, without preference. The
final result might be that both faulty feeders are tripped. In other words, operation is prioritized
over strict adherence to preference.
PPLPHIZ
I3P* BFI_3P
V3P* ZREL
BLOCK
RELAG
RELBG
RELCG
PHSEL
Figure 250: PPLPHIZ function block
Table 232: PPLPHIZ Input signals

SIGNAL
SIGNAL
RELAG BOOLEAN 0 Release condition for the A to ground loop
RELBG BOOLEAN 0 Release condition for the B to ground loop
RELCG BOOLEAN 0 Release condition for the C to ground loop
PHSEL INTEGER 0 Integer coded external release signals
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Technical manual
Table 233: PPLPHIZ Output signals

BFI_3P BOOLEAN Indicates pick up for ground fault(s), regardless of direction
ZREL INTEGER Integer coded output release signal
Table 234: PPLPHIZ Group settings (basic)

OperMode No Filter - - No Filter Operating mode (c=cyclic,a=acyclic)
NoPref
1231c
1321c
123a
132a
213a
231a
312a
321a
PU27PN 0 - 100 %VBase 1 70 Operate value of 27P in % of VBase/sqrt(3)
/sq3
PU27PP 0 - 100 %VB 1 50 Pickup value of line to line undervoltage (%
of VBase)
3V0PU 5 - 300 %VBase 1 20 Operate value of residual voltage in %
/sq3 VBase/sqrt(3)
Pickup_N 10 - 200 %IB 1 20 Pickup value of residual current (% of
IBase)
tVN 0.000 - 60.000 s 0.001 0.100 Pickup-delay for residual voltage
tOffVN 0.000 - 60.000 s 0.001 0.100 Dropoff-delay for residual voltage
tIN 0.000 - 60.000 s 0.001 0.150 Pickup-delay for residual current
Table 235: PPLPHIZ Non group settings (basic)

groups
PPLPHIZ is connected between the Distance protection zones ZMQPDIS and ZMQAPDIS and Phase
selection FDPSPDIS, see Figure 251. Depending on the setting, the original phase selection will be
supplemented with an additional voltage based phase selection inside PPLPHIZ and then filtered
through the phase preference logic in order to release only the preferred phases of the distance
zones.
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Technical manual
ZMQAPDIS (21)
FDPSPDIS (21)
W2_CT_B_I3P I3P* TRIP
I3P* TRIP
W2_VT_B_v3P V3P* TR_A
V3P* BFI
FALSE BLOCK TR_B
BLOCK FWD_A PHS_L1 W2_FSD1-BLKZ LOVBZ TR_C
DIRCND FWD_B PHS_L2 FALSE BLKTR PICKUP
FWD_C PHS_L3 PHSEL PU_A
FWD_G
DIRCND PU_B
REV_A
PU_C
REV_B
PHPUND
REV_C
REV_G
NDIR_A ZMQPDIS (21)
NDIR_B
W2_CT_B_I3P I3P* TRIP
NDIR_C
W2_VT_B_v3P V3P* TR_A
NDIR_G FALSE BLOCK TR_B
FWD_1PH TR_C
W2_FSD1-BLKZ LOVBZ
FWD_2PH PICKUP
FALSE BLKTR
FWD_3PH
PHSEL PU_A
PHG_FLT
DIRCND PU_B
PHPH_FLT
PU_C
PHSELZ PHPUND
DLECND
PPLPHIZ
W2_CT_B_I3P I3P* BFI_3P
W2_VT_B_V3P V3P* ZREL
FALSE BLOCK
FALSE RELAG
FALSE RELBG
FALSE RELCG
PHSEL
Figure 251: Phase preference logic overview
PPLPHIZ can be divided into three main parts:
• Residual current criteria

• Phase selection
• Preference logic
7.18.6.1 Residual current criteria GUID-982F5BF4-CB45-4404-94F5-9A24B891056B v1
The fundamental pickup criterion for a cross-country fault is a continuous residual current (3I0)
above setting level IN>.
Transient residual currents associated with single phase fault inception are not allowed to release
the distance protection. This is taken care of by a time-on-delay tIN, which should be set longer
than the expected duration of the transient.
If a single phase fault remains for some time, it is possible to bypass the tIN time delay, since the
next fault event is expected to be a two-phase fault. The criterion for this bypass is that the
residual voltage is greater than setting level 3U0> for a time longer than setting tUN. The time-off-
delay tOffUN is used to make sure that the bypass is steady during the cross-country fault.
The time delay for residual current pickup is also bypassed as soon as two low voltages are
detected during the cross-country fault (startUPP). See Figure 252.
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Technical manual
Pick Up UPP
OR
tUN tOffUN
3V0 > 3V0> t t
(Non delayed IN start)
AND
tIN Pick UP IN
OR
3I0>IN> t
Figure 252: Residual current criteria
7.18.6.2 Phase selection GUID-975FB3BE-A7FE-4CD8-8954-6542870DF482 v1
During a cross-country fault, the phase with an external fault typically does not carry any fault
current, which will make it difficult for a conventional phase selection function to detect the fault.
Therefore, PPLPHIZ function provides an additional phase selection based on voltage.
PPLPHIZ is designed to detect two-phase faults based on under-voltage in two phases or between
two phases.
Vx < PU27PN
A
B OR Pickup V
AND
C
3V0PU
AND Pickup VAB

OR
AND Pickup VBC

OR
OR Pickup VA
AND Pickup VCA
Vxy < PU27PP OR
OR Pickup VB
AB
BC
OR Pickup VC
CA
Figure 253: Phase selection

The voltage phase selection can be complemented with external phase selection through inputs
RELAG-CG.
Voltage phase selection is disabled in No Filter and NoPref operating modes.
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Technical manual
startUL1
AND
startUL2
startUPP
AND OR
startUL3
AND
OperMode = No Filter
OR
AND
OperMode = NoPref
OR
RELL1N startL1
OR
OR
RELL2N startL2
OR
OR
RELL3N startL3
OR
OR
L1N
L2N
L3N
STCND Integer L1L2 zrelL1L2
to Bool
L2L3 zrelL2L3
L3L1 zrelL3L1
Figure 254: Pick up
7.18.6.3 Preference logic GUID-A7FCCE03-C841-4BAD-98F8-EB9497D53687 v1
The different operating modes (selected with OperMode setting) determine how the internal
status is used to release the phases of the connected distance protection.
No Filter mode GUID-2D585104-E319-4B6D-82C7-3373CA7E87F7 v1

In No Filter mode, all phase starts of the phase selection will be passed through without any
preference or requirement on residual current or voltage.
No Filter mode is equivalent to connecting the phase selection directly to the distance protection.
startL1 zrelL1
startL2 zrelL2
startL3 zrelL3
Figure 255: No Filter mode
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Technical manual
No Preference mode GUID-DA373F35-2082-4347-9A35-B34E23C03B01 v1

The ‘NoPref’ mode uses only the residual current criteria (startIN). There is no preference provided
in this mode. All three phase-to-earth loops of the distance protection may be released when a
residual current start has occurred.
startL1
zrelL1
AND
startL2
zrelL2
AND
startL3
zrelL3
AND
startIN
Figure 256: No Preference mode
Preference modes GUID-BE61A451-E389-4136-8C0B-2C04888EEACE v1

In the preference modes (for example, ‘1231c’), the internal under-voltage phase selection status is
filtered with the selected preference scheme to achieve the desired phase preference. Only the
preferred phase-to-earth loop of the distance protection is released to operate. In addition to the
voltage phase selection, a residual current start is required.
A logic is also included to handle the special case where only one start (startL1-3) is present.
The internal under-voltage phase selection always issues a release in at least two phases, but the
inputs RELL1-3N can be activated with some time apart. If no measures are taken, the phase
activated first will pass through the preference scheme and release the distance protection. Since
it could a be non-preferred phase, a time delay of 40 ms is provided to release if only one phase is
detected, in order to wait for the second phase to be activated. If no second phase is detected
within 40 ms, the single phase is released without preference.
Additionaly, there are some cases where no release would be issued:
• All three phases are involved in the fault and a cyclic scheme is selected
• No faulty phase can be detected due to an insufficient voltage drop
In both cases, no release signals come from the phase preference scheme. For these cases, an
additional logic is provided that releases all phases if there is no output from the preference
scheme after 40 ms from the activation of the residual current start.
Hence, if there is a residual current start, it is guaranteed that the distance protection is released
in at least one phase. This is valid for all phase preference schemes.
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Technical manual
Preference
OperMode Scheme
Sheme
startL1 prefL1
INL1 OUTL1
startL2 prefL2
INL2 OUTL2
startL3 INL3 OUTL3
prefL3
More
than
one stIN
AND
true
startIN
40 ms
stIN40ms
t
Figure 257: Phase preference 1
prefL1
OR zrelL1
AND
prefL2
OR zrelL2
AND
prefL3
OR zrelL3
AND
OR
AND
stIN40ms
stIN OR
Figure 258: Phase preference 2

Table 236 shows the preferred phase for each detected cross-country fault type and operating
mode (OperMode).
Table 236: Preferred phase for each cross-country fault type and operating mode
Operating mode start in L1 & L2 start in L2 & L3 start in L3 & L1
1231c L1 L2 L3
1321c L2 L3 L1
123a L1 L2 L1
132a L1 L3 L1
213a L2 L2 L1
231a L2 L2 L3
312a L1 L3 L3
321a L2 L3 L3
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Technical manual
7.18.6.4 Output GUID-3D64237F-8D45-4CAE-8F2E-31F6741842C2 v1
All loop releasing signals are gathered in the binary coded integer output ZREL. The value of ZREL
can be calculated according to Equation 108.
ZREL L1N *1 L2N *2  L3N *4  L1L2*8  L2L3*16  L3L1*32

For example, if only L1N is active, then the value is 1. If both start L1N and L3N are active, then the
value is 1+4=5.
The BLOCK input will only block the enabling signals for phase-to-earth loops,
phase-to-phase loops are still released. The PPLPHIZ is designed not to have any
influence on the phase-to-phase loops of the distance protection.
startU
AND
zrelL1
AND
zrelL2
AND L1N
zrelL3 L2N
AND L3N
Bool to ZREL
zrelL1L2 L1L2 Integer
zrelL2L3 L2L3
BLOCK zrelL3L1 L3L1
Figure 259: Output

GUID-BACA37F7-E945-40BC-BF9D-A65BFC96CA91 v8
Table 237: PPLPHIZ technical data

Trip value, phase-to-phase and (10.0 - 100.0)% of VBase ±0.5% of Vn
phase-to-neutral undervoltage
Reset ratio, undervoltage < 105% -
Trip value, residual voltage (5.0 - 300.0)% of VBase ±0.5% of Vn at V < Vn
±0.5% of Vn at V > Vn
Reset ratio, residual voltage > 95% -

Trip value, residual current (10 - 200)% of IBase ±1.0% of In at I ≤ In
Reset ratio, residual current > 95% -

Independent time delay for (0.000 - 60.000) s ±0.2% or ±25 ms whichever is
residual current at 0 to 2 x Iset greater
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Technical manual

Independent time delay for (0.000 - 60.000) s ±0.2% or ±25 ms, whichever is
residual voltage at 0.8 x Vset to greater at 0.8 x Vset to 1.2 x Vset
1.2 x Vset
Independent dropoff-delay for (0.000 - 60.000) s ±0.2% or ±25 ms whichever is

residual voltage at 1.2 x Vset to greater at 1.2 x Vset to 0.8 x Vset
0.8 x Vset
Operating mode No Filter, NoPref

Cyclic: 1231c, 1321c
Acyclic: 123a, 132a, 213a, 231a, 312a, 321a
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Technical manual
Current protection
Section 8 Current protection
8.1 Instantaneous phase overcurrent protection PHPIOC (50) IP14506-1 v6
M14880-1 v4

Instantaneous phase overcurrent PHPIOC 50
protection 3-phase output
3I>>
SYMBOL-Z V1 EN-US
The instantaneous three phase overcurrent function has a low transient overreach and short
tripping time to allow use as a high set short-circuit protection function.
PHPIOC (50)
I3P* TRIP
BLOCK TR_A
MULTPU TR_B
TR_C
Figure 260: PHPIOC (50) function block
8.1.4 Signals IP11433-1 v2
Table 238: PHPIOC (50) Input signals

I3P GROUP - Three phase current
SIGNAL
MULTPU BOOLEAN 0 Enable current pickup value multiplier
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Technical manual
Current protection
Table 239: PHPIOC (50) Output signals

TRIP BOOLEAN Trip signal from any phase
Table 240: PHPIOC (50) Group settings (basic)

Enabled
OpModeSel 2 out of 3 - - 1 out of 3 Select operation mode (2 of 3 / 1 of 3)
1 out of 3
Pickup 5 - 2500 %IB 1 200 Phase current pickup in % of IBase
Table 241: PHPIOC (50) Group settings (advanced)

MultPU 0.5 - 5.0 - 0.1 1.0 Multiplier for operate current level
Table 242: PHPIOC (50) Non group settings (basic)

groups
Table 243: PHPIOC (50) Non group settings (advanced)

PU_MinEd2Set 5 - 2500 %IB 1 5 Minimum settable operate phase current
level in % of IBase, for 61850 Ed.2 settings
PU_MaxEd2Set 5 - 2500 %IB 1 2500 Maximum settable operate phase current
level in % of IBase, for 61850 Ed.2 settings
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Technical manual
Current protection

Table 244: PHPIOC (50) Monitored data

8.1.7 Operation principle M12913-3 v7
The sampled analog phase currents are pre-processed in a discrete Fourier filter (DFT) block. The
RMS value of each phase current is derived from the fundamental frequency components, as well
as sampled values of each phase current. These phase current values are fed to the instantaneous
phase overcurrent protection 3-phase output function PHPIOC (50). In a comparator the RMS
values are compared to the set operation current value of the function Pickup. If a phase current is
larger than the set operation current a signal from the comparator for this phase is set to true.
This signal will, without delay, activate the output signal TR_x(x=A, B or C) for this phase and the
TRIP signal that is common for all three phases.
There is an operation mode (OpModeSel) setting: 1 out of 3 or 2 out of 3. If the parameter is set to
1 out of 3 any phase trip signal will be activated. If the parameter is set to 2 out of 3 at least two
phase signals must be activated for trip.
There is also a possibility to activate a preset change of the set operation current (MultPU) via a
binary input (MULTPU). In some applications the operation value needs to be changed, for
example due to transformer inrush currents.
PHPIOC (50) can be blocked from the binary input BLOCK.
M12336-1 v11
Table 245: PHPIOC (50) technical data

Trip current (5-2500)% of lBase ±1.0% of In at I ≤ In
Reset ratio > 95% at (50–2500)% of IBase -

Trip time at 0 to 2 x Iset Min. = 15 ms -
Max. = 25 ms
Reset time at 2 to 0 x Iset Min. = 15 ms -
Max. = 25 ms
Critical impulse time 10 ms typically at 0 to 2 x Iset -
Trip time at 0 to 10 x Iset Min. = 5ms -

Max. = 15ms
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Technical manual
Current protection

Reset time at 10 to 0 x Iset Min. = 25ms -
Max. = 40 ms
Dynamic overreach < 5% at t = 100 ms -
8.2 Four step phase overcurrent protection

OC4PTOC(51/67) SEMOD129998-1 v7
M14885-1 v5

Four step phase overcurrent OC4PTOC 51_67
protection 3-phase output
TOC-REVA V2 EN-US
The four step three-phase overcurrent protection function OC4PTOC (51/67) has independent
inverse time delay settings for steps 1 to 4.
All IEC and ANSI inverse time characteristics are available together with an optional user defined
time characteristic.
The directional function needs voltage as it is voltage polarized with memory. The function can be
set to be directional or non-directional independently for each of the steps.
A second harmonic blocking level can be set for the function and can be used to block each step
individually.
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Technical manual
Current protection
OC4PTOC (51_67)
I3P* TRIP
V3P* TRST1
BLOCK TRST2
BLKTR TRST3
BLK1 TRST4
BLK2 TR_A
BLK3 TR_B
BLK4 TR_C
MULTPU1 TRST1_A
MULTPU2 TRST1_B
MULTPU3 TRST1_C
MULTPU4 TRST2_A
TRST2_B
TRST2_C
TRST3_A
TRST3_B
TRST3_C
TRST4_A
TRST4_B
TRST4_C
PICKUP
PU_ST1
PU_ST2
PU_ST3
PU_ST4
PU_A
PU_B
PU_C
PU_ST1_A
PU_ST1_B
PU_ST1_C
PU_ST2_A
PU_ST2_B
PU_ST2_C
PU_ST3_A
PU_ST3_B
PU_ST3_C
PU_ST4_A
PU_ST4_B
PU_ST4_C
2NDHARM
DIR_A
DIR_B
DIR_C
Figure 261: OC4PTOC (51_67) function block
8.2.4 Signals
Table 246: OC4PTOC (51_67) Input signals

SIGNAL
SIGNAL
BLK1 BOOLEAN 0 Block of Step1
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Technical manual
Current protection

MULTPU1 BOOLEAN 0 When activated, the pickup multiplier is in use for step1
Table 247: OC4PTOC (51_67) Output signals

TRIP BOOLEAN Trip
TRST1 BOOLEAN Common trip signal from step1
TRST1_A BOOLEAN Trip signal from step1 phase A
TRST1_B BOOLEAN Trip signal from step1 phase B
TRST1_C BOOLEAN Trip signal from step1 phase C
PICKUP BOOLEAN Common pickup signal
PU_ST1 BOOLEAN Common pickup signal from step1
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Technical manual
Current protection

PU_ST1_A BOOLEAN Pickup signal from step1 phase A
PU_ST1_B BOOLEAN Pickup signal from step1 phase B
PU_ST1_C BOOLEAN Pickup signal from step1 phase C
PU2NDHARM BOOLEAN Second harmonic detected
DIR_A INTEGER Direction for phase A
DIR_B INTEGER Direction for phase B
DIR_C INTEGER Direction for phase C
8.2.5 Settings
Table 248: OC4PTOC (51_67) Group settings (basic)

Enabled
AngleRCA 40 - 65 Deg 1 55 Relay characteristic angle (RCA)
AngleROA 40 - 89 Deg 1 80 Relay operation angle (ROA)
NumPhSel 1 out of 3 - - 1 out of 3 Number of phases required for phase
2 out of 3 selection (1 of 3, 2 of 3, 3 of 3)
3 out of 3
DirModeSel1 Disabled - - Non-directional Directional mode of step 1 (Disabled,
Non-directional Nondir, Forward, Reverse)
Forward
Reverse
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Technical manual
Current protection

Characterist1 ANSI Ext. inv. - - ANSI Def. Time Selection of time delay curve type for step
ANSI Very inv. 1
ANSI Norm. inv.
ANSI Mod. inv.
ANSI Def. Time
L.T.E. inv.
L.T.V. inv.
L.T. inv.
IEC Norm. inv.
IEC Very inv.
IEC inv.
IEC Ext. inv.
IEC S.T. inv.
IEC L.T. inv.
IEC Def. Time
Reserved
Programmable
RI type
RD type
Pickup1 5 - 2500 %IB 1 1000 Operating phase current level for step 1 in
% of IBase
t1 0.000 - 60.000 s 0.001 0.000 Def time delay or add time delay for
inverse char of step 1
TD1 0.05 - 999.00 - 0.01 0.05 Time dial multiplier for the inverse time
delay for step 1
IMin1 1 - 10000 %IB 1 100 Minimum operate current for step1 in % of
IBase
t1Min 0.000 - 60.000 s 0.001 0.000 Minimum operate time for inverse curves
for step 1
MultPU1 1.0 - 10.0 - 0.1 2.0 Multiplier for current operate level for step
1
Forward
Reverse
ANSI Very inv. 2
ANSI Norm. inv.
ANSI Mod. inv.
ANSI Def. Time
L.T.E. inv.
L.T.V. inv.
L.T. inv.
IEC Norm. inv.
IEC Very inv.
IEC inv.
IEC Ext. inv.
IEC S.T. inv.
IEC L.T. inv.
IEC Def. Time
Reserved
Programmable
RI type
RD type
% of IBase
460
Technical manual
Current protection

TD2 0.05 - 999.00 - 0.01 0.05 Time multiplier for the inverse time delay
for step 2
IBase
for step 2
2
Forward
Reverse
ANSI Very inv. 3
ANSI Norm. inv.
ANSI Mod. inv.
ANSI Def. Time
L.T.E. inv.
L.T.V. inv.
L.T. inv.
IEC Norm. inv.
IEC Very inv.
IEC inv.
IEC Ext. inv.
IEC S.T. inv.
IEC L.T. inv.
IEC Def. Time
Reserved
Programmable
RI type
RD type
% of IBase
for step 3
IBase
for step 3
3
Forward
Reverse
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Technical manual
Current protection

ANSI Very inv. 4
ANSI Norm. inv.
ANSI Def. Time
L.T.E. inv.
L.T.V. inv.
L.T. inv.
IEC Norm. inv.
IEC Very inv.
IEC inv.
IEC Ext. inv.
IEC S.T. inv.
IEC L.T. inv.
IEC Def. Time
Reserved
Programmable
RI type
RD type
% of IBase
delay for step 4
IBase
for step 4
4
Table 249: OC4PTOC (51_67) Group settings (advanced)

PUMinOpPhSel 1 - 100 %IB 1 7 Minimum current for phase selection in %
of IBase
2ndHarmStab 5 - 100 %IB 1 20 Operate level of 2nd harmonic curr in % of
fundamental curr
ResetTypeCrv1 Instantaneous - - Instantaneous Selection of reset curve type for step 1
IEC Reset
ANSI reset
tReset1 0.000 - 60.000 s 0.001 0.020 Constant reset time for step 1
tPCrv1 0.005 - 3.000 - 0.001 1.000 Parameter P for customer programmable
curve for step 1
tACrv1 0.005 - 200.000 - 0.001 13.500 Parameter A for customer programmable
curve for step 1
tBCrv1 0.00 - 20.00 - 0.01 0.00 Parameter B for customer programmable
curve for step 1
tCCrv1 0.1 - 10.0 - 0.1 1.0 Parameter C for customer programmable
curve for step 1
tPRCrv1 0.005 - 3.000 - 0.001 0.500 Parameter PR for customer programmable
curve for step 1
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Technical manual
Current protection

tTRCrv1 0.005 - 100.000 - 0.001 13.500 Parameter TR for customer programmable
curve for step 1
tCRCrv1 0.1 - 10.0 - 0.1 1.0 Parameter CR for customer programmable
curve for step 1
HarmBlock1 Disabled - - Disabled Enable block of step 1 for harmonic
Enabled restraint
IEC Reset
ANSI reset
curve for step 2
curve for step 2
curve for step 2
curve for step 2
curve for step 2
curve for step 2
curve for step 2
Enabled restraint
IEC Reset
ANSI reset
curve for step 3
curve for step 3
curve for step 3
curve for step 3
curve for step 3
curve for step 3
curve for step 3
Enabled restraint
IEC Reset
ANSI reset
463
Technical manual
Current protection

curve for step 4
curve for step 4
curve for step 4
curve for step 4
curve for step 4
curve for step 4
curve for step 4
HarmBlock4 Disabled - - Disabled Enable block of step 4 from harmonic
Enabled restrain
Table 250: OC4PTOC (51_67) Non group settings (basic)

MeasType DFT - - DFT Selection between DFT and RMS
RMS measurement
groups
Table 251: OC4PTOC (51_67) Non group settings (advanced)

PU1_MinEd2Set 5 - 2500 %IB 1 5 Minimum settable operating phase current
level for step 1 in % of IBase, for 61850 Ed.2
settings
PU1_MaxEd2Set 5 - 2500 %IB 1 2500 Maximum settable operating phase
current level for step 1 in % of IBase, for
61850 Ed.2 settings
level for step 2 in % of IBase, for 61850
Ed.2 settings
61850 Ed.2 settings
Ed.2 settings
464
Technical manual
Current protection

61850 Ed.2 settings
Ed.2 settings
61850 Ed.2 settings

Table 252: OC4PTOC (51_67) Monitored data

DIR_A INTEGER 1=Forward - Direction for phase A
2=Reverse
0=No direction
DIR_B INTEGER 1=Forward - Direction for phase B
2=Reverse
0=No direction
DIR_C INTEGER 1=Forward - Direction for phase C
2=Reverse
0=No direction
The Four step phase overcurrent protection OC4PTOC (51_67) is divided into four different sub-
functions, one for each step. For each step x , where x is step 1, 2, 3 and 4, an operation mode is set
by DirModeSelx: Disable/Non-directional/Forward/Reverse.
The protection design can be divided into four parts:
• The direction element

• The harmonic restraint blocking function
• The four step over current function
• The mode selection
If VT inputs are not available or not connected, setting parameter DirModeSelx

shall be left to default value, Non-directional.
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Technical manual
Current protection
4 step over current

Direction dirPhAFlt element faultState
faultState
Element One element for each
dirPhBFlt step
I3P dirPhCFlt PICKUP
V3P
TRIP
Harmonic harmRestrBlock
Restraint
Element
enableDir
Mode Selection
enableStep1-4
DirectionalMode1-4
Figure 262: Functional overview of OC4PTOC (51/67)

M12883-16 v10
A common setting for all steps, NumPhSel, is used to specify the number of phase currents to be
high to enable operation. The settings can be chosen: 1 out of 3, 2 out of 3 or 3 out of 3.
The sampled analog phase currents are processed in a pre-processing function block. Using a
parameter setting MeasType within the general settings for the four step phase overcurrent
protection 1 and 3-phase output function OC4PTOC (51/67), it is possible to select the type of the
measurement used for all overcurrent stages. It is possible to select either discrete Fourier filter
(DFT) or true RMS filter (RMS).
If DFT option is selected then only the RMS value of the fundamental frequency components of
each phase current is derived. Influence of DC current component and higher harmonic current
components are almost completely suppressed. If RMS option is selected then the true RMS values
is used. The true RMS value in addition to the fundamental frequency component includes the
contribution from the current DC component as well as from higher current harmonic. The
selected current values are fed to OC4PTOC (51/67).
In a comparator, the DFT or RMS values are compared to the set operation current value of the
function (Pickup1, Pickup2, Pickup3, Pickup4) for each phase current. If a phase current is larger
than the set operation current, outputs PICKUP, PU_STx, PU_A, PU_B and PU_C are activated
without delay. Output signals PU_A, PU_B and PU_C are common for all steps. This means that the
lowest set step will initiate the activation. The PICKUP signal is common for all three phases and all
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steps. It shall be noted that the selection of measured value (DFT or RMS) do not influence the
operation of directional part of OC4PTOC (51/67) .
Service value for individually measured phase currents are also available on the local HMI for
OC4PTOC (51/67) function, which simplifies testing, commissioning and in service operational
checking of the function.
A harmonic restrain of the function can be chosen. A set 2nd harmonic current in relation to the
fundamental current is used. The 2nd harmonic current is taken from the pre-processing of the
phase currents and the relation is compared to a set restrain current level.
The function can be directional. The direction of the fault current is given as current angle in
relation to the voltage angle. The fault current and fault voltage for the directional function is
dependent of the fault type. To enable directional measurement at close in faults, causing low
measured voltage, the polarization voltage is a combination of the apparent voltage (85%) and a
memory voltage (15%). The following combinations are used.
Phase-phase short circuit:
Vref _ AB = VA - VB I dir _ AB = I A - I B
GUID-4F361BC7-6D91-47B5-8119-A27009C0AD6A V1 EN-US (Equation 109)
Vref _ BC = VB - VC I dir _ BC = I B - I C
Vref _ CA = VC - VA I dir _ CA = IC - I A
Phase-ground short circuit:
Vref _ A = VA I dir _ A = I A
Vref _ B = VB I dir _ B = I B
Vref _ C = VC I dir _ C = I C
close-in faults.
After 100 ms, the following occurs:
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30% of the set terminal rated current IBase), the condition seals in.
The directional setting is given as a characteristic angle AngleRCA for the function and an angle
window ROADir.
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Reverse
Uref
RCA
ROA
ROA Forward
Idir
en05000745.vsd
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Reverse
Vref
RCA
ROA
ROA Forward
Idir
en05000745_ansi.vsd
Figure 263: Directional characteristic of the phase overcurrent protection

The default value of AngleRCA is –65°. The parameters AngleROA gives the angle sector from
AngleRCA for directional borders.
A minimum current for directional phase pickup current signal can be set. PUMinOpPhSel is the
pickup level for directional evaluation of IA, IB and IC. The directional signals release the
overcurrent measurement in respective phases if their current amplitudes are higher than the
pickup level (PUMinOpPhSel) and the direction of the current is according to the set direction of
the step.
If no blockings are given, the pickup signals will start the timers of the step. The time
characteristic for each step can be chosen as definite time delay or inverse time characteristic. A
wide range of standardized inverse time characteristics is available.It is also possible to create a
tailor made time characteristic.
The possibilities for inverse time characteristics are described in section "Inverse characteristics".
All four steps in OC4PTOC (51/67) can be blocked from the binary input BLOCK. The binary input
BLKx (x=1, 2, 3 or 4) blocks the operation of respective step.
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Characteristx=DefTime
|IOP| AND
a
a>b
OR 0-tx
Pickupx b
0
PUx
STx
AND
0-txMin
0 AND
Inve rse
Characteristx=Inve rse
DirModeSelx=Disa bled OR STAGE x_DIR_Int
DirModeSelx=Non-dire ctional
DirModeSelx=Forward
AND OR
FORWARD_Int
DirModeSelx=Reverse
AND
REVERSE_Int
Figure 264: Simplified logic diagram for OC4PTOC
I3P
DFWDLx
V3P DFWDLxx
DREVLx
Directional
Element
AngleRCA DREVLxx FORWARD_int
Directional
AngleROA Release REVERSE_int
Block
STLx
Greater
PUminOpPhSel Comparator
x- means three phases 1,2 and 3
xx – means phase to phase 12,23,31
Figure 265: OC4 directional release block diagram
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Different types of reset time can be selected as described in section "Inverse characteristics".
There is a possibility to activate a preset change (MultiPUx, x= 1, 2, 3 or 4) of the set operation

current via a binary input (enable multiplier). In some applications the operation value needs to be
changed, for example due to changed network switching state.
The function can be blocked from the binary input BLOCK. The pickup signals from the function
can be blocked from the binary input BLK.The trip signals from the function can be blocked from
the binary input BLKTR.
GUID-E3980B2D-EEDA-4BF1-A07D-E7B721130554 v6
A harmonic restrain of the directional phase overcurrent protection function OC4PTOC 51_67 can
be chosen. If the ratio of the 2nd harmonic component in relation to the fundamental frequency
component in a phase current exceeds the preset level defined by the parameter 2ndHarmStab
setting, any of the four overcurrent stages can be selectively blocked by the parameter
HarmBlockx setting. When the 2nd harmonic restraint feature is active, the OC4PTOC 51_67
function output signal ST2NDHRM will be set to the logical value one.
BLOCK
a
a>b
0.07*IBase b
a
a>b
b
Extract second AND
IOP
harmonic current a
a>b
component b
2ndH_BLOCK_Int
Extract
fundamental
current component
X
2ndHarmStab
Figure 266: Second harmonic blocking
When DirModex is set to Forward/Reverse and Ix> is set at its minimum value, that
is, 5.0% of IBase, the operation from the respective overcurrent step takes place at
20.0% of IBase. This is done to avoid unintentional maloperations during
unbalanced loading conditions that might appear in power systems and the
unbalanced loading condition might lead to a neutral current in the range of 10.0%
to 15.0% of IBase.
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M12342-1 v21
Table 253: OC4PTOC (51/67) technical data

Trip current, step 1-4 (5-2500)% of lBase ±1.0% of In at I ≤ In
Reset ratio > 95% at (50–2500)% of -

lBase
Minimum operate current, step 1-4 (1-10000)% of lBase ±1.0% of In at I ≤ In
Relay characteristic angle (RCA) (40.0–65.0) degrees ±2.0 degrees

Relay operating angle (ROA) (40.0–89.0) degrees ±2.0 degrees
Second harmonic blocking (5–100)% of fundamental ±2.0% of In
Independent time delay at 0 to 2 x Iset, step (0.000-60.000) s ±0.2% or ±35 ms whichever is greater
1-4
Minimum trip time for inverse curves , step (0.000-60.000) s ±0.2% or ±35 ms whichever is
1-4 greater
Inverse time characteristics, see table 1135, 16 curve types See table 1135, table 1137 and table
table 1137 and table 1139 1139
Trip time, pickup non-directional at 0 to 2 x Min. = 15 ms -
Iset
Max. = 30 ms
Reset time, pickup non-directional at 2 x Min. = 15 ms -
Iset to 0
Max. = 30 ms
Operate time, start non-directional at 0 to Min. = 5 ms -
10 x Iset Max. = 20 ms
Reset time, start non-directional at 10 x Iset Min. = 20 ms -

to 0 Max. = 35 ms
Impulse margin time 15 ms typically -

Operate frequency, directional overcurrent 38-83 Hz -
Operate frequency, non-directional 10-90 Hz -
overcurrent
8.3 Instantaneous residual overcurrent protection EFPIOC

(50N) IP14508-1 v3
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M14887-1 v4

Instantaneous residual overcurrent EFPIOC 50N
protection
IN>>
IEF V1 EN-US
The Instantaneous residual overcurrent protection EFPIOC (50N) has a low transient overreach
and short tripping times to allow the use for instantaneous ground-fault protection, with the
reach limited to less than the typical eighty percent of the line at minimum source impedance.
EFPIOC (50N) is configured to measure the residual current from the three-phase current inputs
and can be configured to measure the current from a separate current input.
EFPIOC (50N)
I3P* TRIP
BLOCK
BLKAR
MULTPU
Figure 267: EFPIOC (50N) function block
8.3.4 Signals IP11448-1 v2
Table 254: EFPIOC (50N) Input signals

I3P GROUP - Three phase currents
SIGNAL
BLKAR BOOLEAN 0 Block from auto recloser
MULTPU BOOLEAN 0 Enable current multiplier
Table 255: EFPIOC (50N) Output signals

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Table 256: EFPIOC (50N) Group settings (basic)

Enabled
Pickup 5 - 2500 %IB 1 200 Operate residual current level in % of IBase
Table 257: EFPIOC (50N) Group settings (advanced)

MultPU 0.5 - 5.0 - 0.1 1.0 Multiplier for operate current level
Table 258: EFPIOC (50N) Non group settings (basic)

groups

Table 259: EFPIOC (50N) Monitored data

IN REAL - A Residual current
The sampled analog residual currents are pre-processed in a discrete Fourier filter (DFT) block.
From the fundamental frequency components of the residual current, as well as from the sample
values the equivalent RMS value is derived. This current value is fed to the Instantaneous residual
overcurrent protection (EFPIOC,50N). In a comparator the RMS value is compared to the set
operation current value of the function (Pickup). If the residual current is larger than the set
operation current a signal from the comparator is set to true. This signal will, without delay,
activate the output signal TRIP.
There is also a possibility to activate a preset change of the set operation current via a binary
input (enable multiplier MULTPU). In some applications the operation value needs to be changed,
for example due to transformer inrush currents.
EFPIOC (50N) function can be blocked from the binary input BLOCK. The trip signals from the
function can be blocked from the binary input BLKAR, that can be activated during single pole trip
and autoreclosing sequences.
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M12340-2 v8
Table 260: EFPIOC (50N) technical data

Trip current (5-2500)% of lBase ±1.0% of In at I ≤ In
±1.0% of In at I > In
Reset ratio > 95% at (50–2500)% of lBase -

Max. = 25 ms
Max. = 25 ms

Max. = 15 ms
Max. = 35 ms
Dynamic overreach < 5% at t = 100 ms -
8.4 Four step residual overcurrent protection, (Zero

sequence or negative sequence directionality) EF4PTOC
(51N/67N) IP14509-1 v6
M14881-1 v5

Four step residual overcurrent EF4PTOC 51N_67N
4(IN>)
protection
4
alt
4
TEF-REVA V2 EN-US
The four step residual overcurrent protection EF4PTOC (51N/67N) has an inverse or definite time
delay independent for each step.
All IEC and ANSI time-delayed characteristics are available together with an optional user defined
characteristic.
EF4PTOC (51N/67N) can be set directional or non-directional independently for each of the steps.
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IDir, VPol and IPol can be independently selected to be either zero sequence or negative sequence.
Second harmonic blocking can be set individually for each step.
EF4PTOC (51N/67N) can be used as main protection for phase-to-ground faults.
EF4PTOC (51N/67N) can also be used to provide a system back-up for example, in the case of the
primary protection being out of service due to communication or voltage transformer circuit
failure.
Directional operation can be combined together with corresponding communication logic in

permissive or blocking teleprotection scheme. Current reversal and weak-end infeed functionality
are available as well.
Residual current can be calculated by summing the three phase currents or taking the input from
neutral CT
EF4PTOC (51N_67N)
I3P* TRIP
V3P* TRST1
I3PPOL* TRST2
I3PDIR* TRST3
BLOCK TRST4
BLKTR TRSOTF
BLK1 PICK UP
BLK2 PUST1
BLK3 PUST2
BLK4 PUST3
MULTPU1 PUST4
MULTPU2 PUSOTF
MULTPU3 PUFW
MULTPU4 PUREV
52A 2NDHARMD
CLOSECMD
OPENCMD
Figure 268: EF4PTOC (51N/67N) function block
8.4.4 Signals IP11453-1 v2
Table 261: EF4PTOC (51N_67N) Input signals

I3P GROUP - Group connection for operate current
SIGNAL
V3P GROUP - Group connection for polarizing voltage
SIGNAL
I3PPOL GROUP - Group connection for polarizing current
SIGNAL
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I3PDIR GROUP - Group connection for directional current
SIGNAL
BLOCK BOOLEAN 0 General block
BLK1 BOOLEAN 0 Block of step 1 (Pickup and trip)
52a BOOLEAN 0 Breaker position
CLOSECMD BOOLEAN 0 Breaker close command
OPENCMD BOOLEAN 0 Breaker open command
Table 262: EF4PTOC (51N_67N) Output signals

TRIP BOOLEAN General trip signal
TRST1 BOOLEAN Trip signal from step 1
TRSOTF BOOLEAN Trip signal from switch onto fault function
PUST1 BOOLEAN Pickup signal step 1
PUSOTF BOOLEAN Pickup signal from switch onto fault function
PUFW BOOLEAN Pick up foward direction
PUREV BOOLEAN Pick up reverse direction
2NDHARMD BOOLEAN 2nd harmonic block signal
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Table 263: EF4PTOC (51N_67N) Group settings (basic)

Enabled
EnDir Disable - - Enable Enabling the Directional calculation
Enable
AngleRCA -180 - 180 Deg 1 65 Relay Characteristic Angle (RCA)
polMethod Voltage - - Voltage Type of polarization
Current
Dual
VPolMin 1 - 100 %VB 1 1 Minimum voltage level for polarization in
% of VBase
IPolMin 2 - 100 %IB 1 5 Minimum current level for polarization in %
of IBase
RNPol 0.50 - 1000.00 Ohm 0.01 5.00 Real part of source impedance used for
current polarisation
XNPol 0.50 - 3000.00 Ohm 0.01 40.00 Imaginary part of source imp. used for
current polarisation
INDirPU 1 - 100 %IB 1 10 Residual current level in % of IBase for
Direction release
2ndHarmStab 5 - 100 % 1 20 Operate level of 2nd harmonic curr in % of
fundamental curr
BlkParTransf Disabled - - Disabled Enable blocking at energizing of parallel
Enabled transformers
Use_PUValue ST1 - - ST4 Current pickup blocking at parallel transf
ST2 (step1, 2, 3 or 4)
ST3
ST4
SOTF Disabled - - Disabled SOTF operation mode (Off/SOTF/
SOTF Undertime/SOTF&Undertime)
UnderTime
SOTF&UnderTime
SOTFSel Open - - Open Select signal to activate SOTF: CB-Open/ -
Closed Closed/ -Close cmd
CloseCommand
StepForSOTF Step 2 - - Step 2 Select start from step 2 or 3 to start SOTF
Step 3
HarmBlkSOTF Disabled - - Disabled Enable harmonic restrain function in SOTF
Enabled
tSOTF 0.000 - 60.000 s 0.001 0.200 Time delay for SOTF
t4U 0.000 - 60.000 s 0.001 1.000 Switch-onto-fault active time
ActUndrTimeSel CB position - - CB position Select signal to activate under time (CB
CB command Pos / CB Command)
tUnderTime 0.000 - 60.000 s 0.001 0.300 Time delay for under time
DirModeSel1 Disabled - - Non-directional Directional mode of step 1 (Off, Non-dir,
Non-directional Forward, Reverse)
Forward
Reverse
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Characterist1 ANSI Ext. inv. - - ANSI Def. Time Time delay characteristic for step 1
ANSI Very inv.
ANSI Norm. inv.
ANSI Mod. inv.
ANSI Def. Time
L.T.E. inv.
L.T.V. inv.
L.T. inv.
IEC Norm. inv.
IEC Very inv.
IEC inv.
IEC Ext. inv.
IEC S.T. inv.
IEC L.T. inv.
IEC Def. Time
Reserved
Programmable
RI type
RD type
Pickup1 1 - 2500 %IB 1 100 Residual current operate level for step 1 in
% of IBase
TD1 0.05 - 999.00 - 0.01 0.05 Time multiplier for the step 1 selected time
characteristic
IMin1 1.00 - 10000.00 %IB 1.00 100.00 Minimum operate residual current for step
1 in % of IBase
t1Min 0.000 - 60.000 s 0.001 0.000 Minimum operate time for inverse time
characteristic step 1
MultPU1 1.0 - 10.0 - 0.1 2.0 Multiplier for the residual current setting
value for step 1
HarmBlock1 Disabled - - Enabled Enable block of step 1 for harmonic
Enabled restraint
Forward
Reverse
ANSI Very inv.
ANSI Norm. inv.
ANSI Mod. inv.
ANSI Def. Time
L.T.E. inv.
L.T.V. inv.
L.T. inv.
IEC Norm. inv.
IEC Very inv.
IEC inv.
IEC Ext. inv.
IEC S.T. inv.
IEC L.T. inv.
IEC Def. Time
Reserved
Programmable
RI type
RD type
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% of IBase
characteristic
IMin2 1.00 - 10000.00 %IB 1.00 50 Minimum operate residual current for step
2 in % of IBase
value for step 2
Enabled restraint
Forward
Reverse
ANSI Very inv.
ANSI Norm. inv.
ANSI Mod. inv.
ANSI Def. Time
L.T.E. inv.
L.T.V. inv.
L.T. inv.
IEC Norm. inv.
IEC Very inv.
IEC inv.
IEC Ext. inv.
IEC S.T. inv.
IEC L.T. inv.
IEC Def. Time
Reserved
Programmable
RI type
RD type
% of IBase
TD3 0.05 - 999.00 - 0.01 0.05 Time multiplier for the step 3 selected
time characteristic
3 in % of IBase
value for step 3
Enabled restraint
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Forward
Reverse
ANSI Very inv.
ANSI Norm. inv.
ANSI Mod. inv.
ANSI Def. Time
L.T.E. inv.
L.T.V. inv.
L.T. inv.
IEC Norm. inv.
IEC Very inv.
IEC inv.
IEC Ext. inv.
IEC S.T. inv.
IEC L.T. inv.
IEC Def. Time
Reserved
Programmable
RI type
RD type
% of IBase
time characteristic
4 in % of IBase
value for step 4
Enabled restraint
Table 264: EF4PTOC (51N_67N) Group settings (advanced)

ResetTypeCrv1 Instantaneous - - Instantaneous Reset curve type for step1
IEC Reset (Instantaneous / IEC / ANSI)
ANSI reset
tReset1 0.000 - 60.000 s 0.001 0.020 Reset time delay for step 1
tPCrv1 0.005 - 3.000 - 0.001 1.000 Param P for customized inverse trip time
curve for step 1
tACrv1 0.005 - 200.000 - 0.001 13.500 Param A for customized inverse trip time
curve for step 1
tBCrv1 0.00 - 20.00 - 0.01 0.00 Param B for customized inverse trip time
curve for step 1
tCCrv1 0.1 - 10.0 - 0.1 1.0 Param C for customized inverse trip time
curve for step 1
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tPRCrv1 0.005 - 3.000 - 0.001 0.500 Param PR for customized inverse reset
time curve for step 1
tTRCrv1 0.005 - 100.000 - 0.001 13.500 Param TR for customized inverse reset
tCRCrv1 0.1 - 10.0 - 0.1 1.0 Param CR for customized inverse reset
ANSI reset
curve for step 2
curve for step 2
curve for step 2
curve for step 2
ANSI reset
curve for step 3
curve for step 3
curve for step 3
curve for step 3
ANSI reset
curve for step 4
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curve for step 4
curve for step 4
curve for step 4
Table 265: EF4PTOC (51N_67N) Non group settings (basic)

groups
SeqTypeIDir Zero seq - - Zero seq Choice of measurand for directional
Neg seq current
SeqTypeIPol Zero seq - - Zero seq Choice of measurand for polarizing current
Neg seq
SeqTypeVPol Zero seq - - Zero seq Choice of measurand for polarizing
Neg seq voltage
Table 266: EF4PTOC (51N_67N) Non group settings (advanced)

PU1_MinEd2Set 1 - 2500 %IB 1 1 Minimum settable operate residual current
level for step 1 in % of IBase, for 61850 Ed.2
settings
PU1_MaxEd2Set 1 - 2500 %IB 1 2500 Maximum settable operate residual
61850 Ed.2 settings
Ed.2 settings
61850 Ed.2 settings
Ed.2 settings
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61850 Ed.2 settings
Ed.2 settings
61850 Ed.2 settings

Table 267: EF4PTOC (51N_67N) Monitored data

IOp REAL - A Operating current level
VPol REAL - kV Polarizing voltage level
IPol REAL - A Polarizing current level
VPOLIANG REAL - deg Polarizing angle between voltage and
current
IPOLIANG REAL - deg Polarizing current angle
M13941-51 v6
This function has the following three “Analog Inputs” on its function block in the configuration
tool:
1. I3P, input used for “Operating Quantity”. Supply the zero-sequence magnitude measuring
functionality.
2. V3P, input used for “Voltage Polarizing Quantity”. Supply either zero or negative sequence
voltage to the directional functionality
3. I3PPOL, input used for “Current Polarizing Quantity”. Provide polarizing current to the
directional functionality. This current is normally taken from the grounding of a power
transformer.
4. I3PDIR, input used for “Directional detection”. Supply either zero or negative sequence current
to the directional functionality.
These inputs are connected from the corresponding pre-processing function blocks in the
Configuration Tool within PCM600.
8.4.7.1 Operating quantity within the function M13941-58 v7
The function always uses Residual Current (3I0) for its operating quantity. The residual current can
be:
1. directly measured (when a dedicated CT input of the IED is connected in PCM600 to the
fourth analog input of the pre-processing block connected to EF4PTOC (51N/67N) function
input I3P). This dedicated IED CT input can be for example, connected to:
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• parallel connection of current instrument transformers in all three phases (Holm-Green

connection).
• one single core balance, current instrument transformer (cable CT).
• one single current instrument transformer located between power system WYE point
and ground (that is, current transformer located in the neutral grounding of a WYE
connected transformer winding).
• one single current instrument transformer located between two parts of a protected
object (that is, current transformer located between two WYE points of double WYE
shunt capacitor bank).
2. calculated from three-phase current input within the IED (when the fourth analog input into
the pre-processing block connected to EF4PTOC (51N/67N) function Analog Input I3P is not
connected to a dedicated CT input of the IED in PCM600). In such case the pre-processing
block will calculate 3I0 from the first three inputs into the pre-processing block by using the
following formula (will take I2 from SMAI AI3P connected to I3PDIR input which was connected
to I3P input also):
If zero sequence current is selected,
I op = 3 × Io = IA + IB + IC
where:
IA, IB, IC are fundamental frequency phasors of three individual phase currents.
The residual current is pre-processed by a discrete Fourier filter. Thus the phasor of the
fundamental frequency component of the residual current is derived. The phasor magnitude is
used within the EF4PTOC (51N/67N) protection to compare it with the set operation current value
of the four steps (Pickup1, Pickup2, Pickup3 or Pickup4). If the residual current is larger than the
set operation current and the step is used in non-directional mode a signal from the comparator
for this step is set to true. This signal will, without delay, activate the output signal PUSTx (x=step
1-4) for this step and a common PICKUP signal.
8.4.7.2 Internal polarizing M13941-82 v10
A polarizing quantity is used within the protection in order to determine the direction to the
ground fault (Forward/Reverse).
The function can be set to use voltage polarizing, current polarizing or dual polarizing.
Voltage polarizing
When voltage polarizing is selected the protection will use the residual voltage -3V0 as polarizing
quantity V3P.
This voltage can be:
1. directly measured (when a dedicated VT input of the IED is connected in PCM600 to the fourth
analog input of the pre-processing block connected to EF4PTOC (51N/67N) function input
V3P). This dedicated IED VT input shall be then connected to open delta winding of a three
phase main VT.
2. calculated from three phase voltage input within the IED (when the fourth analog input into
the pre-processing block connected to EF4PTOC (51N/67N) analog function input V3P is NOT
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connected to a dedicated VT input of the IED in PCM600). In such case the pre-processing
block will calculate -3V2 from the first three inputs into the pre-processing block by using the
following formula:
VPol=3V0=(VA +VB +VC)

where:
VA, VB, VC are fundamental frequency phasors of three individual phase voltages.
In order to use this, all three phase-to-ground voltages must be connected to three
IED VT inputs.
The residual voltage is pre-processed by a discrete fourier filter. Thus, the phasor of the
fundamental frequency component of the residual voltage is derived.
This phasor is used together with the phasor of the operating directional current, in order to
determine the direction to the ground fault (Forward/Reverse). In order to enable voltage
polarizing the magnitude of polarizing voltage shall be bigger than a minimum level defined by
setting parameter VpolMin.
It shall be noted that residual voltage (-3V0) or negative sequence voltage (-3V2) is used to
determine the location of the ground fault. This insures the required inversion of the polarizing
voltage within the ground-fault function.
Current polarizing
When current polarizing is selected the function will use an external residual current (3I0) as
polarizing quantity IPol. This current can be:
1. directly measured (when a dedicated CT input of the IED is connected in PCM600 to the
fourth analog input of the pre-processing block connected to EF4PTOC (51N/67N) function
input I3PPOL). This dedicated IED CT input is then typically connected to one single current
transformer located between power system WYE point and ground (current transformer
located in the WYE point of a WYE connected transformer winding).
• For some special line protection applications this dedicated IED CT input can be
connected to parallel connection of current transformers in all three phases (Holm-
Green connection).
2. calculated from three phase current input within the IED (when the fourth analog input into
the pre-processing block connected to EF4PTOC (51N/67N) function analog input I3PPOL is
NOT connected to a dedicated CT input of the IED in PCM600). In such case the pre-
processing block will calculate 3I0 from the first three inputs into the pre-processing block by
using the following formula:
I Pol = 3 × Io = IA + IB + IC
where:
IA, IB and IC are fundamental frequency phasors of three individual phase currents.
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The residual current is pre-processed by a discrete fourier filter. Thus the phasor of the
fundamental frequency component of the polarizing current is derived. This phasor is then
multiplied with pre-set equivalent zero-sequence source Impedance in order to calculate
equivalent polarizing voltage VIPol in accordance with the following formula:
VIPol = Zo S × I Pol = ( RNPol + j × XNPOL ) × I Pol

which will be then used, together with the phasor of the operating current, in order to determine
the direction to the ground fault (Forward/Reverse).
In order to enable current polarizing the magnitude of polarizing current shall be bigger than a
minimum level defined by setting parameter IPolMin.
Dual polarizing
When dual polarizing is selected the function will use the vectorial sum of the voltage based and
current based polarizing in accordance with the following formula:
VTotPol = VVPol + VIPol = -3V0 + Z 0 s × IPol = -3V0 + ( RNPol + jXNPol ) × IPol

Vpol and Ipol can be either zero sequence component or negative sequence component depending
upon the user selection.
Then the phasor of the total polarizing voltage VTotPol will be used, together with the phasor of
the operating current, to determine the direction of the ground fault (Forward/Reverse).
8.4.7.3 External polarizing for ground-fault function M13941-144 v4
The individual steps within the protection can be set as non-directional. When this setting is
selected it is then possible via function binary input BLKx to provide external directional control
(that is, torque control) by for example using one of the following functions if available in the IED:
1. Distance protection directional function.

2. Negative sequence polarized General current and voltage multi purpose protection function.
8.4.7.4 Directional detection for ground fault function GUID-FC382DD3-E2C8-455E-8CD5-1DE1793DD178 v4
Zero sequence components will be used for detecting directionality for ground fault function. In
some cases zero sequence quantities might detect directionality wrong. Negative sequence
quantities will be used in such scenario. The user can select either zero sequence components or
negative sequence components for detecting directionality with the parameter SeqTypeIPol.
I3PDIR input always connected to the same source as I3P input.
8.4.7.5 Base quantities within the protection M13941-152 v5
The base quantities are entered as global settings for all functions in the IED. Base current (IBase)
shall be entered as rated phase current of the protected object in primary amperes. Base voltage
(VBase) shall be entered as rated phase-to-phase voltage of the protected object in primary kV.
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8.4.7.6 Internal ground-fault protection structure M13941-157 v3
The protection is internally divided into the following parts:
1. Four residual overcurrent steps.

2. Directional supervision element for residual overcurrent steps with integrated directional
comparison step for communication based ground-fault protection schemes (permissive or
blocking).
3. Second harmonic blocking element with additional feature for sealed-in blocking during
switching of parallel transformers.
4. Switch on to fault feature with integrated Under-Time logic for detection of breaker problems
during breaker opening or closing sequence.
8.4.7.7 Four residual overcurrent steps M13941-166 v7
Each overcurrent step uses operating quantity Iop (residual current) as measuring quantity. Each
of the four residual overcurrent steps has the following built-in facilities:
• Directional mode can be set to Disabled/Non-directional/Forward/Reverse. By this parameter

setting the directional mode of the step is selected. It shall be noted that the directional
decision (Forward/Reverse) is not made within the residual overcurrent step itself. The
direction of the fault is determined in common “directional supervision element”.
• Residual current pickup value.
• Type of operating characteristic (inverse or definite time). By this parameter setting it is
possible to select inverse or definite time delay for the ground-fault protection. Most of the
standard IEC and ANSI inverse characteristics are available. For the complete list of available
inverse curves please refer to section "Inverse characteristics".
• Type of reset characteristic (Instantaneous / IEC Reset / ANSI Reset). By this parameter
setting it is possible to select the reset characteristic of the step. For the complete list of
available reset curves please refer to section "".
• Time delay related settings. By these parameter settings the properties like definite time
delay, minimum operating time for inverse curves, reset time delay and parameters to define
user programmable inverse curve are defined.
• Supervision by second harmonic blocking feature (Enabled/Disabled). By this parameter
setting it is possible to prevent operation of the step if the second harmonic content in the
residual current exceeds the preset level.
• Multiplier for scaling of the set residual current pickup value by external binary signal. By this
parameter setting it is possible to increase residual current pickup value when function binary
input MULTPUx has logical value 1.
Simplified logic diagram for one residual overcurrent step is shown in figure 269.
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BLKTR
EMULTX
IMinx Characteristx=DefTime
X T b
a>b
F a
TRSTx
tx AND
|IOP|
a OR
a>b
b
PUSTx
MultPUx AND
X T
Pickupx F tMin
AND Inverse
BLKx
BLOCK Characteristx=Inverse
2ndHarm_BLOCK_Int
OR
HarmRestrainx=Disabled
DirModex=Off OR STEPx_DIR_Int
DirModex=Non-directional
DirModex=Forward
AND OR
FORWARD_Int
DirModex=Reverse
AND
REVERSE_Int
Figure 269: Simplified logic diagram for residual overcurrent step x, where x = step 1, 2, 3 or 4
The protection can be completely blocked from the binary input BLOCK. Output signals for
respective step, and PUSTx and TRSTx, can be blocked from the binary input BLKx. The trip signals
from the function can be blocked from the binary input BLKTR.
8.4.7.8 Directional supervision element with integrated directional comparison

function M13941-179 v9
It shall be noted that at least one of the four residual overcurrent steps shall be set
as directional in order to enable execution of the directional supervision element
and the integrated directional comparison function.
The protection has integrated directional feature. As the operating quantity current lop is always
used. The polarizing method is determined by the parameter setting polMethod. The polarizing
quantity will be selected by the function in one of the following three ways:
1. When polMethod = Voltage, VPol will be used as polarizing quantity.

2. When polMethod = Current, IPol will be used as polarizing quantity.
3. WhenpolMethod = Dual, VPol + IPol · ZNPol will be used as polarizing quantity.
The operating and polarizing quantity are then used inside the directional element, as shown in
figure 270, in order to determine the direction of the ground fault.
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Operating area
PUREV
0.6 * INDirPU
Characteristic for reverse
release of measuring steps
-RCA -85 deg
Characteristic
for PUREV 40% of
INDirPU RCA +85 deg
RCA
65° VPol = -3V0
-RCA +85 deg
RCA -85 deg

Characteristic for forward
release of measuring steps
INDirPU
PUFW
I op = 3I0
Operating area
Characteristic
for PUFW ANSI11000243-1-en.ai
Figure 270: Operating characteristic for ground-fault directional element using the zero
sequence components
Two relevant setting parameters for directional supervision element are:
• Directional element will be internally enabled to trip as soon as Iop is bigger than 40% of
IDirPU and directional condition is fulfilled in set direction.
• Relay characteristic angle AngleRCA, which defines the position of forward and reverse areas
in the operating characteristic.
Directional comparison step, built-in within directional supervision element, will set EF4PTOC
(51N/67N) function output binary signals:
1. PUFW=1 when operating quantity magnitude Iop x cos(φ - AngleRCA) is bigger than setting
parameter IDirPU and directional supervision element detects fault in forward direction.
2. PUREV=1 when operating quantity magnitude Iop x cos(φ - AngleRCA) is bigger than 60% of
setting parameter IDirPU and directional supervision element detects fault in reverse
direction.
These signals shall be used for communication based ground-fault teleprotection communication
schemes (permissive or blocking).
Simplified logic diagram for directional supervision element with integrated directional
comparison step is shown in figure 271:
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|IopDir|
a
a>b PUREV
b AND
REVERSE_Int
0.6
X
a
a>b
AND PUFW
IDirPU b
FORWARD_Int
X
0.4
FWD
AND FORWARD_Int
AngleRCA
polMethod=Voltage
OR
VPolMin
Characteristic
Directional
polMethod=Dual IPolMin
VPol T
I3PDIR
polMethod=Current 0.0 F
OR
VTPol
IPol AND REVERSE_Int
T RVS
0.0 F
VIPol
RNPol X STAGE1_DIR_Int
Complex T
STAGE2_DIR_Int
XNPol Number 0.0 F STAGE3_DIR_Int OR
STAGE4_DIR_Int
BLOCK AND
Figure 271: Simplified logic diagram for directional supervision element with integrated directional
comparison step
8.4.7.9 Second harmonic blocking element M13941-200 v6
A harmonic restrain of four step residual overcurrent protection function EF4PTOC can be chosen
for each step by a parameter setting HarmRestrainx. If the ratio of the 2nd harmonic component in
relation to the fundamental frequency component in the residual current exceeds the preset level
(defined by parameter 2ndHarmStab) then ST2NDHRM function output signal is set to logical
value one and harmonic restraining feature to the function block will be applicable.
Blocking from 2nd harmonic element activates if all three criteria are satisfied:
1. Current fundamental frequency component > IMinOpHarmBlk

2. Current second harmonic component > IMinOpHarmBlk
3. Ratio of the 2nd harmoinc component in relation to the fundamental frequency component in
the residual current exceeds the preset level defined parameter 2ndHarmStab setting
If all the above three conditions are fulfilled then ST2NDHRM function output signal is set to
logical value one and harmonic restraining feature to the function block is applicable.
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In addition to the basic functionality explained above the 2nd harmonic blocking can be set in such
way to seal-in until residual current disappears. This feature might be required to stabilize
EF4PTOC (51N67N) during switching of parallel transformers in the station. In case of parallel
transformers there is a risk of sympathetic inrush current. If one of the transformers is in
operation, and the parallel transformer is switched in, the asymmetric inrush current of the
switched in transformer will cause partial saturation of the transformer already in service. This is
called transferred saturation. The 2nd harmonic of the inrush currents of the two transformers is in
phase opposition. The summation of the two currents thus gives a small 2nd harmonic current. The
residual fundamental current is however significant. The inrush current of the transformer in
service before the parallel transformer energizing, is a little delayed compared to the first
transformer. Therefore we have high 2nd harmonic current component initially. After a short period
this current is however small and the normal 2nd harmonic blocking resets. If the BlkParTransf
function is activated the 2nd harmonic restrain signal is latched as long as the residual current
measured by the relay is larger than a selected step current level by using setting UseStartValue.
This feature has been called Block for Parallel Transformers. This 2nd harmonic seal-in feature is
activated when all of the following three conditions are simultaneously fulfilled:
1. Feature is enabled by entering setting parameter BlkParTransf = On.

2. Basic 2nd harmonic restraint feature has been active for at least 70ms.
3. Residual current magnitude is higher than the set pickup value for one of the four residual
overcurrent stages. By a parameter setting Use_PUValue it is possible to select which one of
the four pickup values that will be used (Pickup1 or Pickup2 or Pickup3 or Pickup4).
Once Block for Parallel Transformers is activated the basic 2nd harmonic blocking signal is sealed-
in until the residual current magnitude falls below a value defined by parameter setting
Use_PUValue (see condition 3 above).
Simplified logic diagram for 2nd harmonic blocking feature is shown in figure 272.
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BLOCK
a
a>b
0.07*IBase b
a
a>b
b
Extract second 2NDHARMD
IOP AND
harmonic current a
a>b
component b
Extract
fundamental
current component
X
2ndHarmStab
q-1
0-70ms OR
0 AND OR 2ndH_BLOCK_Int
BlkParTransf=On
|IOP|
a
a>b
b
Use_PUValue
Pickup1>
Pickup2>
Pickup3>
Pickup4>
Figure 272: Simplified logic diagram for 2nd harmonic blocking feature and Block for Parallel Transformers
feature
8.4.7.10 Switch on to fault feature M13941-211 v4
Integrated in the four step residual overcurrent protection are Switch on to fault logic (SOTF) and
Under-Time logic. The setting parameter SOTF is set to activate either SOTF or Under-Time logic
or both. When the circuit breaker is closing there is a risk to close it onto a permanent fault, for
example during an autoreclosing sequence. The SOTF logic will enable fast fault clearance during
such situations. The time during which SOTF and Under-Time logics will be active after activation
is defined by the setting parameter t4U.
The SOTF logic uses the pickup signal from step 2 or step 3 for its operation, selected by setting
parameter StepForSOTF. The SOTF logic can be activated either from change in circuit breaker
position or from circuit breaker close command pulse. The setting parameter SOTFSel can be set
for activation of CB position open change, CB position closed change or CB close command. In
case of a residual current pickup from step 2 or 3 (dependent on setting) the function will give a
trip after a set delay tSOTF. This delay is normally set to a short time (default 200 ms).
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The Under-Time logic always uses the pickup signal from the step 4. The Under-Time logic will
normally be set to operate for a lower current level than the SOTF function. The Under-Time logic
can also be blocked by the 2nd harmonic restraint feature. This enables high sensitivity even if
power transformer inrush currents can occur at breaker closing. This logic is typically used to
detect asymmetry of CB poles immediately after switching of the circuit breaker. The Under-Time
logic is activated either from change in circuit breaker position or from circuit breaker close and
open command pulses. This selection is done by setting parameter ActUnderTime. In case of a
pickup from step 4 this logic will give a trip after a set delay tUnderTime. This delay is normally set
to a relatively short time (default 300 ms). Practically the Under-Time logic acts as circuit breaker
pole-discrepancy protection, but it is only active immediately after breaker switching. The Under-
Time logic can only be used in solidly or low impedance grounded systems.
SOTF
200 ms
Open
t
t4U
200 ms
Closed
t ActivationSOTF
tSOTF
Close command AND
AND t
STIN2
StepForSOTF
STIN3
SOTF
BLOCK
OFF
SOTF
UNDERTIME TRIP
UnderTime
tUnderTime
SOTF or
2nd Harmonic AND
HarmResSOFT t UnderTime
OR
Open
Close OR
t4U
Close command
ActUnderTime
AND
STIN4
Figure 273: Simplified logic diagram for SOTF and Under-Time features
M13941-3 v4
EF4PTOC (51N/67N) Logic Diagram Simplified logic diagram for the complete EF4PTOC (51N/67N)
function is shown in figure 274:
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signal to communication scheme

Directional Check
Element
4 step over current

INPol Direction
operatingCurrent element
Element
3V0 One element for each
earthFaultDirection step
3I0
angleValid
I3PDIR
DirModeSel
enableDir
harmRestrBlock
3I0 Harmonic
Restraint 1
Element TRIP

start step 2, 3 and 4
Blocking at parallel
transformers
SwitchOnToFault
TRSOTF
CB
DirModeSel pos
or cmd
enableDir
Mode
Selection enableStep1-4
DirectionalMode1-4
Figure 274: Functional overview of EF4PTOC (51N/67N)
M15223-1 v18
Table 268: EF4PTOC (51N/67N) technical data

Trip current, step 1-4 (1-2500)% of IBase ±1.0% of In at I ≤ In
Reset ratio > 95% at (10-2500)% of -

IBase
Relay characteristic angle (-180 to 180) degrees ±2.0 degrees
(RCA)
Trip current for directional release (1–100)% of IBase For RCA ±60 degrees:
±2.5% of In at I ≤ In
Independent time delay at 0 to 2 x Iset, (0.000-60.000) s ±0.2% or ±35 ms whichever is greater

step 1-4
Minimum operate time for inverse curves, (0.000 - 60.000) s ±0.2% or ±35 ms whichever is greater
step 1-4
Inverse time characteristics, see Table 16 curve types See Table 1135, Table 1137 and Table
1135, Table 1137 and Table 1139 1139
Second harmonic blocking (5–100)% of fundamental ±2.0% of In
Minimum polarizing voltage (1–100)% of VBase ±0.5% of Vn
Minimum polarizing current (2-100)% of IBase ±1.0% of In
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Real part of source Z used for current (0.50-1000.00) W/phase -
polarization
Imaginary part of source Z used for (0.50–3000.00) W/phase -
current polarization
Trip time, pickup non-directional at 0 to 2 Min. = 15 ms -
x Iset Max. = 30 ms
*Reset time, pickup non-directional at 2 x Min. = 15 ms -

Iset to 0 Max. = 30 ms
Trip time, pickup non-directional at 0 to Min. = 5 ms -

*Reset time, pickup non-directional at 10 x Min. = 20 ms -

Iset to 0 Max. = 35 ms

*Note: Operate time and reset time are only valid if harmonic blocking is turned off for a step.
8.5 Four step directional negative phase sequence

overcurrent protection NS4PTOC (46I2) GUID-E8CF8AA2-AF54-4FD1-A379-3E55DCA2FA3A v1
GUID-E1720ADA-7F80-4F2C-82A1-EF2C9EF6A4B4 v1

Four step negative sequence NS4PTOC 46I2
overcurrent protection I2
4
alt
4
8.5.2 Functionality GUID-485E9D36-0032-4559-9204-101539A32F47 v5
Four step negative sequence overcurrent protection (NS4PTOC, (4612) ) has an inverse or definite
time delay independent for each step separately.
All IEC and ANSI time delayed characteristics are available together with an optional user defined
characteristic.
The directional function is voltage polarized.
NS4PTOC (4612) can be set directional or non-directional independently for each of the steps.
NS4PTOC (4612) can be used as main protection for unsymmetrical fault; phase-phase short
circuits, phase-phase-ground short circuits and single phase ground faults.
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NS4PTOC (4612) can also be used to provide a system backup for example, in the case of the
primary protection being out of service due to communication or voltage transformer circuit
failure.
Directional operation can be combined together with corresponding communication logic in

permissive or blocking teleprotection scheme. The same logic as for directional zero sequence
current can be used. Current reversal and weak-end infeed functionality are available.
8.5.3 Function block GUID-8EDB8B12-0D86-4F6B-A1FB-F5D0C72AA545 v2
NS4PTOC (46I2)
I3P* TRIP
I3PDIR* TRST1
V3P* TRST2
BLOCK TRST3
BLKTR TRST4
BLK1 PICK UP
BLK2 PU_ST1
BLK3 PU_ST2
BLK4 PU_ST3
MULTPU1 PU_ST4
MULTPU2 PUFW
MULTPU3 PUREV
MULTPU4
Figure 275: NS4PTOC (4612) function block
8.5.4 Signals
Table 269: NS4PTOC (46I2) Input signals

I3P GROUP - Group connection for operate current
SIGNAL
I3PDIR GROUP - Group connection for directional current
SIGNAL
V3P GROUP - Group connection for polarizing voltage
SIGNAL
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Table 270: NS4PTOC (46I2) Output signals

TRIP BOOLEAN General trip signal
PU_ST1 BOOLEAN Pickup signal step 1
PUFW BOOLEAN Forward directional pickup signal
PUREV BOOLEAN Reverse directional pickup signal
8.5.5 Settings
Table 271: NS4PTOC (46I2) Group settings (basic)

Enabled
EnDir Disable - - Enable Enabling the Directional calculation
Enable
AngleRCA -180 - 180 Deg 1 65 Relay characteristic angle (RCA)
VPolMin 1 - 100 %VB 1 5 Minimum voltage level for polarization in
% of VBase
I2>Dir 1 - 100 %IB 1 10 Residual current level in % of IBase for
Direction release
Forward
Reverse
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ANSI Very inv.
ANSI Norm. inv.
ANSI Mod. inv.
ANSI Def. Time
L.T.E. inv.
L.T.V. inv.
L.T. inv.
IEC Norm. inv.
IEC Very inv.
IEC inv.
IEC Ext. inv.
IEC S.T. inv.
IEC L.T. inv.
IEC Def. Time
Reserved
Programmable
RI type
RD type
I2-1> 1 - 2500 %IB 1 100 Negative sequence current op level for
step 1 in % of IBase
characteristic
IMin1 1.00 - 10000.00 %IB 1.00 100.00 Minimum current for step 1
MultPU1 1.0 - 10.0 - 0.1 2.0 Multiplier for scaling the current setting
value for step 1
Forward
Reverse
ANSI Very inv.
ANSI Norm. inv.
ANSI Mod. inv.
ANSI Def. Time
L.T.E. inv.
L.T.V. inv.
L.T. inv.
IEC Norm. inv.
IEC Very inv.
IEC inv.
IEC Ext. inv.
IEC S.T. inv.
IEC L.T. inv.
IEC Def. Time
Reserved
Programmable
RI type
RD type
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Technical manual
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characteristic
IMin2 1.00 - 10000.00 %IB 1.00 50 Minimum current for step 2
value for step 2
Forward
Reverse
ANSI Very inv.
ANSI Norm. inv.
ANSI Mod. inv.
ANSI Def. Time
L.T.E. inv.
L.T.V. inv.
L.T. inv.
IEC Norm. inv.
IEC Very inv.
IEC inv.
IEC Ext. inv.
IEC S.T. inv.
IEC L.T. inv.
IEC Def. Time
Reserved
Programmable
RI type
RD type
time characteristic
value for step 3
Forward
Reverse
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Technical manual
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ANSI Very inv.
ANSI Norm. inv.
ANSI Mod. inv.
ANSI Def. Time
L.T.E. inv.
L.T.V. inv.
L.T. inv.
IEC Norm. inv.
IEC Very inv.
IEC inv.
IEC Ext. inv.
IEC S.T. inv.
IEC L.T. inv.
IEC Def. Time
Reserved
Programmable
RI type
RD type
time characteristic
value for step 4
Table 272: NS4PTOC (46I2) Group settings (advanced)

ANSI reset
curve for step 1
curve for step 1
curve for step 1
curve for step 1
time curve for step
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ANSI reset
curve for step 2
curve for step 2
curve for step 2
curve for step 2
tCRCrv2 0.1 - 10.0 - 0.1 1.0 Param C for customized inverse reset time
curve for step 2
ANSI reset
curve for step 3
curve for step 3
curve for step 3
curve for step 3
ANSI reset
curve for step 4
curve for step 4
curve for step 4
curve for step 4
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Table 273: NS4PTOC (46I2) Non group settings (basic)

groups

Table 274: NS4PTOC (46I2) Monitored data

IOp REAL - A Operating current level
VPol REAL - kV Polarizing voltage level
VPOLIANG REAL - deg Polarizing angle between voltage and
current
8.5.7 Operation principle GUID-8923EC0B-A5BA-431B-9699-EB67E2637560 v3
Four step negative sequence overcurrent protection NS4PTOC (4612) function has the following
three “Analog Inputs” on its function block in the configuration tool:
1. I3P, input used for “Operating Quantity”.

2. V3P, input used for “Polarizing Quantity”.
3. I3PDIR, input used for "Directional finding"
These inputs are connected from the corresponding pre-processing function blocks in the
Configuration Tool within PCM600.
8.5.7.1 Operating quantity within the function GUID-8F0A5BDE-AC98-4188-9085-42A8DF00C476 v3
Four step negative sequence overcurrent protection NS4PTOC (46I2) function always uses
negative sequence current (I2) for its operating quantity. The negative sequence current is
calculated from three-phase current input within the IED. The pre-processing block calculates I2
from the first three inputs into the pre-processing block by using the following formula:
1
I2 =
3
(
× IA + a × IB + a × IC
2
)
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where:
IA, IB, IC are fundamental frequency phasors of three individual phase currents.
a is so called operator which gives a phase shift of 120 deg, that is, a = 1∠120
deg
a2 similarly gives a phase shift of 240 deg, that is, a2 = 1∠240 deg
The phasor magnitude is used within the NS4PTOC (4612) protection to compare it with the set
operation current value of the four steps (Pickup1, Pickup2, Pickup3 or Pickup4). If the negative
sequence current is larger than the set operation current and the step is used in non-directional
mode a signal from the comparator for this step is set to true. This signal, without delay, activates
the output signal PU_STx (x=1 - 4) for this step and a common PICKUP signal.
8.5.7.2 Internal polarizing facility of the function GUID-B00FE98B-F269-4F1B-AC03-68250798851B v3
A polarizing quantity is used within the protection to determine the direction to the fault
(Forward/Reverse).
Four step negative sequence overcurrent protection NS4PTOC (4612) function uses the voltage
polarizing method.
NS4PTOC (4612) uses the negative sequence voltage -V2 as polarizing quantity V3P. This voltage is
calculated from three phase voltage input within the IED. The pre-processing block calculates -V2
from the first three inputs into the pre-processing block by using the following formula:
1
V2 = (
× VA + a × VB + a × VC
2
)
3
ANSIEQUATION00024 V1 EN-US
where:
VA, VB, VC are fundamental frequency phasors of three individual phase voltages.
To use this all three phase-to-ground voltages must be connected to three IED VT
inputs.
This phasor is used together with the phasor of the operating current, in order to determine the
direction to the fault (Forward/Reverse).To enable voltage polarizing the magnitude of polarizing
voltage must be bigger than a minimum level defined by setting VpolMin.
Note that –V2 is used to determine the location of the fault. This ensures the required inversion of
the polarizing voltage within the function.
8.5.7.3 External polarizing for negative sequence function GUID-21930E81-1B40-4BA4-B1D8-3B365327AEF6 v1
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The individual steps within the protection can be set as non-directional. When this setting is
selected it is then possible via function binary input BLKx (where x indicates the relevant step
within the protection) to provide external directional control (that is, torque control) by for
example using one of the following functions if available in the IED:
• Distance protection directional function

• Negative sequence polarized general current and voltage multi purpose protection function
8.5.7.4 Internal negative sequence protection structure GUID-A6B9B3F1-A1FE-4653-A8AF-61FCCF19CE95 v1
The protection is internally divided into the following parts:
• Four negative sequence overcurrent steps

• Directional supervision element for negative sequence overcurrent steps with integrated
directional comparison step for communication based negative sequence protection schemes
(permissive or blocking)
Each part is described separately in the following sections.
8.5.7.5 Four negative sequence overcurrent stages GUID-D8ACB136-2BA6-4ADA-A096-5C38BD12DB72 v1
Each overcurrent stage uses Operating Quantity I2 (negative sequence current) as measuring
quantity. Every of the four overcurrent stage has the following built-in facilities:
• Operating mode (Disabled/ Non-directional /Forward / Reverse). By this parameter setting

the operating mode of the stage is selected. Note that the directional decision (Forward/
Reverse) is not made within the overcurrent stage itself. The direction of the fault is
determined in common “Directional Supervision Element” described in the next paragraph.
• Negative sequence current pickup value.
• Type of operating characteristic (Inverse or Definite Time). By this parameter setting it is
possible to select Inverse or definite time delay for negative sequence overcurrent function.
Most of the standard IEC and ANSI inverse characteristics are available. For the complete list
of available inverse curves, refer to Chapter ""
• Type of reset characteristic (Instantaneous / IEC Reset /ANSI reset).By this parameter setting
it is possible to select the reset characteristic of the stage. For the complete list of available
reset curves, refer to Chapter ""
• Time delay related settings. By these parameter settings the properties like definite time
delay, minimum operating time for inverse curves, reset time delay and parameters to define
user programmable inverse curve are defined.
• Multiplier for scaling of the set negative sequence current pickup value by external binary
signal. By this parameter setting it is possible to increase negative sequence current pickup
value when function binary input MULTPUx has logical value 1.
Simplified logic diagram for one negative sequence overcurrent stage is shown in the following
figure:
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Figure 276: Simplified logic diagram for negative sequence overcurrent stage x , where x=1, 2, 3 or 4
NS4PTOC (4612) can be completely blocked from the binary input BLOCK. The pickup signals from
NS4PTOC (4612) for each stage can be blocked from the binary input BLKx. The trip signals from
NS4PTOC (4612) can be blocked from the binary input BLKTR.
8.5.7.6 Directional supervision element with integrated directional comparison

function GUID-F54E21F7-7C99-41D6-BEC6-2D6EC6D2B2A3 v3
At least one of the four negative sequence overcurrent steps must be set as
directional in order to enable execution of the directional supervision element and
the integrated directional comparison function.
The operating and polarizing quantity are then used inside the directional element, as shown in
figure 277, to determine the direction of the fault.
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Reverse
Area
AngleRCA Vpol=-V2
Forward
Area
Iop = I2
Figure 277: Operating characteristic for fault directional element
Two relevant setting parameters for directional supervision element are:
• Directional element is internally enable to trip as soon as Iop is bigger than 40% of INDirPU
and the directional condition is fulfilled in set direction.
• Relay characteristic angle AngleRCA which defines the position of forward and reverse areas
in the operating characteristic.
Directional comparison step, built-in within directional supervision element, set NS4PTOC (4612)
output binary signals:
1. PUFW=1 when tip of I2 phasor (operating quantity magnitude) is in forward area, see fig 277
(Operating quantity magnitude is bigger than setting INDirPU)
2. PUREV=1 when tip of I2 phasor (operating quantity magnitude) is in the reverse area, see fig
277. (Operating quantity magnitude is bigger than 60% of setting INDirPU)
These signals must be used for communication based fault teleprotection communication
schemes (permissive or blocking).
Simplified logic diagram for directional supervision element with integrated directional
comparison step is shown in figure 278:
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|IopDir|
a
a>b PUREV
b AND
REVERSE_Int
0.6
X
a
a>b
AND PUFW
IDirPU b
FORWARD_Int
X
0.4
FWD
AND FORWARD_Int
AngleRCA
polMethod=Voltage
OR
VPolMin
Characteristic
Directional
polMethod=Dual IPolMin
VPol T
I3PDIR
polMethod=Current 0.0 F
OR
VTPol
IPol AND REVERSE_Int
T RVS
0.0 F
VIPol
RNPol X STAGE1_DIR_Int
Complex T
STAGE2_DIR_Int
XNPol Number 0.0 F STAGE3_DIR_Int OR
STAGE4_DIR_Int
BLOCK AND
Figure 278: Simplified logic diagram for directional supervision element with integrated directional
comparison step
8.5.8 Technical data GUID-10E9194D-3AE9-4D0F-867E-473E6F4BF443 v1
GUID-E83AD807-8FE0-4244-A50E-86B9AF92469E v5
Table 275: NS4PTOC (46I2) technical data

Trip value, step 1 - 4 (1-2500)% of lBase ±1.0% of In at I £ In
Reset ratio > 95% at (10-2500)% of IBase -

Independent time delay at 0 (0.000-60.000) s ±0.2% or ±35 ms whichever is
to 2 x Iset, step 1 - 4 greater
Minimum operate time for (0.000 - 60.000) s ±0.2% or ±35 ms whichever is

inverse curves, step 1 - 4 greater
Inverse time characteristics, 16 curve types See table 1135, table 1137 and
see table 1135, table 1137 and table 1139
table 1139
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Minimum trip current, step 1 (1.00 - 10000.00)% of IBase ±1.0% of In at I ≤ In
-4 ±1.0% of I at I > In

(RCA)
Trip current for directional (1–100)% of IBase For RCA ±60 degrees:
release ±2.5% of In at I ≤ In
Minimum polarizing voltage (1–100)% of VBase ±0.5% of Vn
Minimum polarizing current (2-100)% of IBase ±1.0% of In
Real part of negative (0.50-1000.00) W/phase -

sequence source impedance
used for current polarization
Imaginary part of negative (0.50–3000.00) W/phase -
sequence source impedance
used for current polarization
Trip time, pickup non- Min. = 15 ms -
directional at 0 to 2 x Iset Max. = 30 ms
Reset time, pickup non- Min. = 15 ms -

Trip time, pickup non- Min. = 5 ms -

Reset time, pickup non- Min. = 20 ms -


Transient overreach <10% at τ = 100 ms -
8.6 Sensitive directional residual overcurrent and power

protection SDEPSDE (67N) SEMOD171436-1 v4
SEMOD172025-2 v4

Sensitive directional residual over SDEPSDE - 67N
current and power protection
In networks with high impedance grounding, the phase-to-ground fault current is significantly
smaller than the short circuit currents. Another difficulty for ground fault protection is that the
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magnitude of the phase-to-ground fault current is almost independent of the fault location in the
network.
Directional residual current can be used to detect and give selective trip of phase-to-ground faults
in high impedance grounded networks. The protection uses the residual current component 3I0 ·
cos φ, where φ is the angle between the residual current and the residual voltage (-3V0),
compensated with a characteristic angle. Alternatively, the function can be set to strict 3I0 level
with a check of angle φ.
Directional residual power can also be used to detect and give selective trip of phase-to-ground
faults in high impedance grounded networks. The protection uses the residual power component
3I0 · 3V0 · cos φ, where φ is the angle between the residual current and the reference residual
voltage, compensated with a characteristic angle.
A normal non-directional residual current function can also be used with definite or inverse time
delay.
A backup neutral point voltage function is also available for non-directional residual overvoltage
protection.
In an isolated network, that is, the network is only coupled to ground via the capacitances
between the phase conductors and ground, the residual current always has -90º phase shift
compared to the residual voltage (3V0). The characteristic angle is chosen to -90º in such a
network.
In resistance grounded networks or in Petersen coil grounded, with a parallel resistor, the active
residual current component (in phase with the residual voltage) should be used for the ground
fault detection. In such networks, the characteristic angle is chosen to 0º.
As the magnitude of the residual current is independent of the fault location, the selectivity of the
ground fault protection is achieved by time selectivity.
When should the sensitive directional residual overcurrent protection be used and when should
the sensitive directional residual power protection be used? Consider the following:
• Sensitive directional residual overcurrent protection gives possibility for better sensitivity.
The setting possibilities of this function are down to 0.25 % of IBase, 1 A or 5 A. This
sensitivity is in most cases sufficient in high impedance network applications, if the
measuring CT ratio is not too high.
• Sensitive directional residual power protection gives possibility to use inverse time
characteristics. This is applicable in large high impedance grounded networks, with large
capacitive ground fault currents. In such networks, the active fault current would be small and
by using sensitive directional residual power protection, the operating quantity is elevated.
Therefore, better possibility to detect ground faults. In addition, in low impedance grounded
networks, the inverse time characteristic gives better time-selectivity in case of high zero-
resistive fault currents.
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Phase
currents
IN
Phase
ground
voltages
VN
Figure 279: Connection of SDEPSDE to analog preprocessing function block
Overcurrent functionality uses true 3I0, i.e. sum of GRPxA, GRPxB and GRPxC. For 3I0 to be
calculated, connection is needed to all three phase inputs.
Directional and power functionality uses IN and VN. If a connection is made to GRPxN this signal is
used, else if connection is made to all inputs GRPxA, GRPxB and GRPxC the internally calculated
sum of these inputs (3I0 and 3V0) will be used.
SDEPSDE (67N)
I3P* TRIP
V3P* TRDIRIN
BLOCK TRNDIN
BLKTR TRVN
BLKTRDIR PICKUP
BLKNDN PUDIRIN
BLKVN PUNDIN
PUVN
PUFW
PUREV
CND
VNREL
Figure 280: SDEPSDE (67N) function block
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8.6.4 Signals
Table 276: SDEPSDE (67N) Input signals

I3P GROUP - Group signal for current
SIGNAL
V3P GROUP - Group signal for voltage
SIGNAL
BLOCK BOOLEAN 0 Blocks all the outputs of the function
BLKTR BOOLEAN 0 Blocks the trip outputs of the function
BLKTRDIR BOOLEAN 0 Blocks the directional operate outputs of the function
BLKNDN BOOLEAN 0 Blocks the Non directional current residual outputs
BLKVN BOOLEAN 0 Blocks the Non directional voltage residual outputs
Table 277: SDEPSDE (67N) Output signals

TRIP BOOLEAN General trip of the function
TRDIRIN BOOLEAN Trip of the directional residual over current function
TRNDIN BOOLEAN Trip of non directional residual over current
TRVN BOOLEAN Trip of non directional residual over voltage
PICKUP BOOLEAN General pickup of the function
PUDIRIN BOOLEAN Pickup of the directional residual over current function
PUNDIN BOOLEAN Pickup of non directional residual over current
PUVN BOOLEAN Pickup of non directional residual over voltage
PUFW BOOLEAN Pickup of directional function for a fault in forward direction
PUREV BOOLEAN Pickup of directional function for a fault in reverse direction
CND INTEGER Direction of fault. A general signal common to all three mode of
residual over current protection
VNREL BOOLEAN Residual voltage release of operation of all directional modes
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8.6.5 Settings
Table 278: SDEPSDE (67N) Group settings (basic)

Enabled
OpModeSel 3I0Cosfi - - 3I0Cosfi Selection of operation mode for
3I03V0Cosfi protection
3I0 and fi
DirMode Forward - - Forward Direction of operation forward or reverse
Reverse
RCADir -179 - 180 Deg 1 -90 Relay characteristic angle RCA, in deg
RCAComp -10.0 - 10.0 Deg 0.1 0.0 Relay characteristic angle compensation
ROADir 0 - 90 Deg 1 90 Relay open angle ROA used as release in
phase mode, in deg
INCosPhiPU 0.25 - 200.00 %IB 0.01 1.00 Set level for 3I0cosFi, directional res over
current in % of IBase
SN_PU 0.25 - 200.00 %SB 0.01 10.00 Set level for 3I03U0cosFi, starting inv time
count in % of SBase
INDirPU 0.25 - 200.00 %IB 0.01 5.00 Set level for directional residual over
current prot in % of IBase
tDef 0.000 - 60.000 s 0.001 0.100 Definite time delay directional residual
overcurrent, in sec
SRef 0.03 - 200.00 %SB 0.01 10.00 Reference value of res power for inverse
time count in % of SBase
TDSN 0.00 - 2.00 - 0.01 0.10 Time multiplier setting for directional
residual power mode
OpINNonDir Disabled - - Disabled Operation of non-directional residual
Enabled overcurrent protection
INNonDirPU 1.00 - 400.00 %IB 0.01 10.00 Set level for non directional residual over
current in % of IBase
tINNonDir 0.000 - 60.000 s 0.001 1.000 Time delay for non-directional residual
over current, in sec
TimeChar ANSI Ext. inv. - - IEC Norm. inv. Operation curve selection for IDMT
ANSI Very inv. operation
ANSI Norm. inv.
ANSI Mod. inv.
ANSI Def. Time
L.T.E. inv.
L.T.V. inv.
L.T. inv.
IEC Norm. inv.
IEC Very inv.
IEC inv.
IEC Ext. inv.
IEC S.T. inv.
IEC L.T. inv.
IEC Def. Time
Reserved
Programmable
RI type
RD type
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t_MinTripDelay 0.000 - 60.000 s 0.001 0.040 Minimum operate time for IEC IDMT
curves, in sec
TDIN 0.05 - 2.00 - 0.01 1.00 IDMT time mult for non-dir res over current
protection
OpVN Disabled - - Disabled Operation of non-directional residual
Enabled overvoltage protection
VN_PU 1.00 - 200.00 %VB 0.01 20.00 Set level for non-directional residual over
voltage in % of VBase
tVN 0.000 - 60.000 s 0.001 0.100 Time delay for non-directional residual
over voltage, in sec
INRelPU 0.25 - 200.00 %IB 0.01 1.00 Residual release current for all directional
modes in % of IBase
VNRelPU 1.00 - 300.00 %VB 0.01 3.00 Residual release voltage for all direction
modes in % of UBase
Table 279: SDEPSDE (67N) Group settings (advanced)

tReset 0.000 - 60.000 s 0.001 0.040 Time delay used for reset of definite
timers, in sec
tPCrv 0.005 - 3.000 - 0.001 1.000 Setting P for customer programmable
curve
tACrv 0.005 - 200.000 - 0.001 13.500 Setting A for customer programmable
curve
tBCrv 0.00 - 20.00 - 0.01 0.00 Setting B for customer programmable
curve
tCCrv 0.1 - 10.0 - 0.1 1.0 Setting C for customer programmable
curve
ResetTypeCrv Immediate - - IEC Reset Reset mode when current drops off.
IEC Reset
ANSI reset
tPRCrv 0.005 - 3.000 - 0.001 0.500 Setting PR for customer programmable
curve
tTRCrv 0.005 - 100.000 - 0.001 13.500 Setting TR for customer programmable
curve
tCRCrv 0.1 - 10.0 - 0.1 1.0 Setting CR for customer programmable
curve
Table 280: SDEPSDE (67N) Non group settings (basic)

GlobalBaseSel 1 - 12 - 1 1 Global base selection for function groups
Table 281: SDEPSDE (67N) Non group settings (advanced)

RotResV 0 deg - - 180 deg Setting for rotating polarizing quantity if
180 deg necessary
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Table 282: SDEPSDE (67N) Monitored data

INCOSPHI REAL - A Magnitude of residual current along the
polarizing quantity 3I0cos(Fi-RCA)
IN REAL - A Measured magnitude of the residual
current 3I0
VN REAL - kV Measured magnitude of the residual
voltage 3V0
SN REAL - MVA Measured magnitude of residual power
3I03V0cos(Fi-RCA)
ANG FI-RCA REAL - deg Angle between 3V0 and 3I0 minus RCA (Fi-
RCA)
8.6.7.1 Function inputs SEMOD171963-4 v4
The function is using phasors of the residual current and voltage. Group signals I3P and V3P
containing phasors of residual current and voltage are taken from pre-processor blocks.
The sensitive directional ground fault protection has the following sub-functions included:
Directional residual current protection measuring 3I0·cos φ

SEMOD171963-8 v7
φ is defined as the angle between the residual current 3I0 and the reference voltage (|φ=ang(3I0)-
ang(Vref)|). The reference voltage (Vref) is the polarizing quantity which is used for directionality
and is defined as Vref = -3V0 e—jRCADir, that is -3V0 inversely rotated by the set characteristic angle
RCADir. RCADir is normally set equal to 0 in a high impedance grounded network with a neutral
point resistor as the active current component is appearing out on the faulted feeder only. RCADir
is set equal to -90° in an isolated network as all currents are mainly capacitive. The function
operates when 3I0·cos φ gets larger than the set value.
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Vref RCA = 0°, ROA = 90°
3I0
= ang(3I0) - ang(3Vref)
-3V0=Vref
3I0 cos
en06000648_ansi.vsd
Figure 281: RCADir set to 0°
RCA = -90°, ROA = 90°

Vref
3I0
3I0 cos
= ang(3I0) – ang(Vref)
-3V0
en06000649_ansi.vsd
Figure 282: RCADir set to -90°

For trip, the operating quantity 3I0 cos φ, the residual current 3I0, and the residual voltage 3V0
must be larger than the set levels : INCosPhiPU, INRelPU and VNRelPU. Refer to the simplified
logical diagram in Figure 286.
Trip from this function can be blocked from the binary input BLKTRDIR.
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When the function picks up, binary output signals PICKUP and PUDIRIN are activated. If the output
signals PICKUP and PUDIRIN remain active for the set delay tDef the binary output signals TRIP
and TRDIRIN get activated. The trip from this sub-function has definite time delay.
ROADir is Relay Operating Angle. ROADir is identifying a window around the reference direction in
order to detect directionality. Figure 283 shows the restrictions made by the ROADir.
RCADir  0
3I0
Trip area

3V0  Vref
3I0  cos 
ROADir
Figure 283: Characteristic with ROADir restriction

The function indicates forward/reverse direction to the fault. Reverse direction is defined as
3I0·cos (φ + 180°) ≥ the set value.
It is also possible to tilt the characteristic to compensate for current transformer angle error with
a setting RCAComp as shown in the Figure 284:
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RCADir = 0º
Trip area
-3V0 =Vref
Instrument
transformer
angle error 
RCAcomp
Characteristic after
angle compensation
3I0 (prim) 3I0 (to prot)
Figure 284: Explanation of RCAComp
Directional residual power protection measuring 3I0 · 3V0 · cos φ

SEMOD171963-32 v6
φ is defined as the angle between the residual current 3I0 and the reference voltage (Vref = -3V0 e-
jRCA) compensated with the set characteristic angle RCADir (|φ=ang(3I )—ang(V )|). The function
0 ref
operates when 3I0 · 3V0 · cos φ gets larger than the set value SN>. Refer to the simplified logical
diagram in Figure 286.
For trip, the residual power 3I0 · 3V0 · cos φ, the residual current 3I0 and the release voltage 3V0,
shall be larger than the set levels (SN_PU, INRelPU and VNRelPU).
signals PICKUP and PUDIRIN remain active for the set delay tDef or after the inverse time delay
(setting TDSN) the binary output signals TRIP and TRDIRIN get activated.
The function shall indicate forward/reverse direction to the fault. Reverse direction is defined as
3I0 · 3V0·cos (φ + 180°) ³ the set value.
This variant has the possibility of choice between definite time delay and inverse time delay.
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The inverse time delay is defined as:
TDSN ⋅ (3I 0 ⋅ 3V0 ⋅ cos ϕ (reference))

tinv =
3I 0 ⋅ 3V0 ⋅ cos ϕ (measured )
Directional residual current protection measuring 3I0 and φ

SEMOD171963-48 v4
The function will operate if the residual current is larger than the set value and the angle |φ =
ang(3I0)-ang(Vref)| is within the sector RCADir ± ROADir
RCA = 0º
ROA = 80º
Operate area
3I0
Vref=-3V0
Figure 285: Example of characteristic

For trip, Residual current 3I0 shall be larger than both INRelPU and INDirPU, and residual voltage
3V0 shall be larger than the VNRelPU. In addition, the angle φ shall be in the set area defined by
ROADir and RCADir. Refer to the simplified logical diagram in Figure 286.
signals PICKUP and PUDIRIN remain active for the set delay tDef the binary output signals TRIP
and TRDIRIN get activated.
The function indicates forward/reverse direction to the fault. Reverse direction is defined as φ is
within the angle sector: RCADir + 180° ± ROADir
This variant has definite time delay.
Directional functions SEMOD171963-60 v4

For all the directional functions there are directional pickup signals PUFW: fault in the forward
direction, and PUREV: fault in the reverse direction. Even if the directional function is set to
operate for faults in the forward direction, a fault in the reverse direction will give the pickup
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signal PUREV. Also if the directional function is set to operate for faults in the reverse direction, a
fault in the forward direction will give the pickup signal PUFW.
Non-directional ground fault current protection SEMOD171963-63 v6

This function will measure the residual current without checking the phase angle. The function will
be used to detect cross-country faults. This function can serve as alternative or backup to distance
protection with phase preference logic. To assure selectivity the distance protection can block the
non-directional ground fault current function via the input BLKNDN.
The non-directional function is using the calculated residual current, derived as sum of the phase
currents. This will give a better ability to detect cross-country faults with high residual current,
also when dedicated core balance CT for the sensitive ground fault protection will saturate.
This variant has the possibility of choice between definite time delay and inverse time delay
(TimeChar parameter). The inverse time delay shall be according to IEC 60255-3.
For trip, the residual current 3I0 shall be larger than the set level (INNonDirPU).
Trip from this function can be blocked from the binary input BLKNDN.
When the function picks up, binary output signal PUNDIN is activated. If the output signal PUNDIN
remains active for the set delay tINNonDir or after the inverse time delay the binary output signals
TRIP and TRNDIN get activated.
Residual overvoltage release and protection SEMOD171963-72 v7

All the directional functions shall be released when the residual voltage gets higher than a set level
VNRelPU.
In addition, there is also a separate non-directional residual over voltage protection, with its own
definite time delay tVN and set level VN_PU.
For trip, the residual voltage 3V0 shall be larger than the set level (VN_PU).
Trip from this function can be blocked from the binary input BLKVN.
When the function picks up, binary output signal PUVN is activated. If the output signal PUVN is
active for the set delay tVNNonDir, the binary output signals TRIP and TRUN get activated. A
simplified logical diagram of the total function is shown in Figure 286.
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INNonDirPU PUNDIN
0-t TRNDIN
0
PUVN
UN_PU
0-t TRVN
0
OpMODE=INcosPhi
Pickup_N
AND
INCosPhiPU
OpMODE=INVNCosPhi
AND OR AND PUDIRIN
INVNCosPhiPU t
SN
AND TRDIRIN
Phi in RCA +- ROA
TimeChar = InvTime
AND
OpMODE=IN and Phi
AND
TimeChar = DefTime
DirMode = Forw
AND OR
PUFW
Forw
DirMode = Rev
AND
Rev PUREV
en06000653_ansi.vsd
Figure 286: Simplified logical diagram of the sensitive ground fault current protection
SEMOD173350-2 v13
Table 283: SDEPSDE (67N) technical data

Trip level for 3I0·cosj (0.25-200.00)% of lBase ±1.0% of In at I £ In
directional residual ±1.0% of I at I > In
overcurrent
Trip level for 3I0·3V0·cosj (0.25-200.00)% of SBase ±1.0% of Sn at S £ Sn

directional residual power ±1.0% of S at S > Sn
Trip level for 3I0 and j (0.25-200.00)% of lBase ±1.0% of In at £ In

residual overcurrent ±1.0% of I at I > In
Trip level for non- (1.00-400.00)% of lBase ±1.0% of In at I £ In

directional overcurrent ±1.0% of I at I > In
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Trip level for non- (1.00-200.00)% of VBase ±0.5% of Vn at V £ Vn
directional residual ±0.5% of V at V > Vn
overvoltage
Residual release current for (0.25-200.00)% of lBase ±1.0% of In at I £ In
all directional modes ±1.0% of I at I > In
Residual release voltage for (1.00-300.00)% of VBase ±0.5% of Vn at V £ Vn

all directional modes ±0.5% of V at V > Vn
Trip time for non- Min. = 40 ms

directional residual
overcurrent at 0 to 2 x Iset Max. = 65 ms
Reset time for non- Min. = 40 ms

directional residual
overcurrent at 2 to 0 x Iset Max. = 65 ms
Trip time for directional Min. = 110 ms

residual overcurrent at 0 to
Reset time for directional Min. = 20 ms

residual overcurrent at 2 to
Independent time delay for (0.000 – 60.000) s ±0.2% or ± 75 ms whichever is

non-directional residual greater
overvoltage at 0.8 to 1.2 x
Vset
non-directional residual greater
overcurrent at 0 to 2 x Iset
directional residual greater
overcurrent at 0 to 2 x Iset
Inverse characteristics, see 16 curve types See table 1141, table 1142 and
table 1141, table 1142 and table 1143
table 1143
(RCADir)
Relay operate angle (0 to 90) degrees ±2.0 degrees
(ROADir)
8.7 Thermal overload protection, one time constant

Fahrenheit/Celsius LFPTTR/LCPTTR (26) IP14512-1 v7
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M17106-1 v7

Thermal overload protection, one LFPTTR 26
time constant, Fahrenheit
Thermal overload protection, one LCPTTR 26

time constant, Celsius
The increasing utilization of the power system closer to the thermal limits has generated a need of
a thermal overload protection for power lines.
A thermal overload will often not be detected by other protection functions and the introduction
of the thermal overload protection can allow the protected circuit to trip closer to the thermal
limits.
The three-phase current measuring protection has an I2t characteristic with settable time
constant and a thermal memory. The temperature is displayed in either Celsius or Fahrenheit,
depending on whether the function used is Fahrenheit LFPTTR (26) or Celsius LCPTTR.
An alarm pickup gives early warning to allow operators to take action well before the line is
tripped.
Estimated time to trip before operation, and estimated time to reclose after operation are
presented.
LCPTTR (26)
I3P* TRIP
BLOCK BFI_3P
BLKTR ALARM
MULTPU LOCKOUT
AMBTEMP
SENSFLT
RESET
LFPTTR (26)
I3P* TRIP
BLOCK BFI_3P
BLKTR ALARM
MULTPU LOCKOUT
AMBTEMP
SENSFLT
RESET
Figure 287: LFPTTR/LCPTTR (26) function block
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8.7.4 Signals
Table 284: LCPTTR (26) Input signals

SIGNAL
MULTPU BOOLEAN 0 Current multiplyer used when THOL is for two or more lines
AMBTEMP REAL 0 Ambient temperature from external temperature sensor
SENSFLT BOOLEAN 0 Validity status of ambient temperature sensor
RESET BOOLEAN 0 Reset of internal thermal load counter
Table 285: LFPTTR (26) Input signals

SIGNAL
MULTPU BOOLEAN 0 Current multiplyer used when THOL is for two or more lines
AMBTEMP REAL 0 Ambient temperature from external temperature sensor
SENSFLT BOOLEAN 0 Validity status of ambient temperature sensor
RESET BOOLEAN 0 Reset of internal thermal load counter
Table 286: LCPTTR (26) Output signals

TRIP BOOLEAN Trip
BFI_3P BOOLEAN Pickup Signal
LOCKOUT BOOLEAN Lockout signal
Table 287: LFPTTR (26) Output signals

TRIP BOOLEAN Trip
BFI_3P BOOLEAN Pickup Signal
LOCKOUT BOOLEAN Lockout signal
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8.7.5 Settings
Table 288: LCPTTR (26) Group settings (basic)

Enabled
TRef 0 - 300 Deg C 1 90 Final temperature rise above ambient of
the line when loaded with IRef
IRef 0 - 400 %IB 1 100 The load current (in % of IBase) leading to
TRef temperature
IMult 1-5 - 1 1 Current multiplier when function is used
for two or more lines
Tau 1 - 1000 Min 1 45 Time constant of the line in minutes.
AlarmTemp 0 - 200 Deg C 1 80 Temperature level for pickup (alarm)
TripTemp 0 - 300 Deg C 1 90 Temperature level for trip
ReclTemp 0 - 300 Deg C 1 75 Temperature for reset of lockout after trip
tPulse 0.05 - 0.30 s 0.01 0.10 Operate pulse length. Minimum one
execution cycle
AmbiSens Disabled - - Disabled External temperature sensor available
Enabled
DefaultAmbTemp -50 - 100 Deg C 1 20 Ambient temperature used when
AmbiSens is set to Off.
DefaultTemp -50 - 300 Deg C 1 50 Temperature rise above ambient
temperature at pickup
Table 289: LCPTTR (26) Non group settings (basic)

groups
Table 290: LFPTTR (26) Group settings (basic)

Enabled
TRef 0 - 600 Deg F 1 160 Final temperature rise above ambient of
the line when loaded with IRef
IRef 0 - 400 %IB 1 100 The load current (in % of IBase) leading to
TRef temperature
IMult 1-5 - 1 1 Current multiplier when function is used
for two or more lines
Tau 1 - 1000 Min 1 45 Time constant of the line in minutes.
AlarmTemp 0 - 400 Deg F 1 175 Temperature level for pickup (alarm)
TripTemp 0 - 600 Deg F 1 195 Temperature level for trip
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ReclTemp 0 - 600 Deg F 1 170 Temperature for reset of lockout after trip
tPulse 0.05 - 0.30 s 0.01 0.10 Operate pulse length. Minimum one
execution cycle
AmbiSens Disabled - - Disabled External temperature sensor available
Enabled
DefaultAmbTemp -50 - 250 Deg F 1 60 Ambient temperature used when
AmbiSens is set to Off.
DefaultTemp -50 - 600 Deg F 1 100 Temperature rise above ambient
temperature at pickup
Table 291: LFPTTR (26) Non group settings (basic)

groups

Table 292: LCPTTR (26) Monitored data

TTRIP INTEGER - - Estimated time to trip (in min)
TENRECL REAL - - Estimated time to reset of lockout (in min)
TEMP REAL - deg Calculated temperature of the device
TEMPAMB REAL - deg Ambient temperature used in the
calculations
TERMLOAD REAL - - Temperature relative to operate
temperature
Table 293: LFPTTR (26) Monitored data

TTRIP INTEGER - - Estimated time to trip (in min)
TENRECL REAL - - Estimated time to reset of lockout (in min)
TEMP REAL - Temperatur Calculated temperature of the device
e
Fahrenheit
TEMPAMB REAL - Temperatur Ambient temperature used in the
e calculations
Fahrenheit
TERMLOAD REAL - - Temperature relative to operate
temperature
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The sampled analog phase currents are pre-processed and for each phase current the RMS value is
derived. These phase current values are fed to the thermal overload protection, one time constant
LFPTTR/LCPTTR (26) function. The temperature is displayed either in Celsius or Fahrenheit,
depending on whether LFPTTR/LCPTTR (26) function is selected.
From the largest of the three-phase currents a final temperature is calculated according to the
expression:
2
æ I ö
Q final =ç ÷÷ × Tref
ç I ref
è ø
where:
I is the largest phase current,
Iref is a given reference current and
Tref is steady state temperature rise corresponding to Iref
The ambient temperature is added to the calculated final temperature. If this temperature is
larger than the set trip temperature level, TripTemp, a PICKUP output signal is activated.
The actual temperature at the actual execution cycle is calculated as:
æ Dt
ö
Qn = Qn -1 + ( Q final - Q n-1 ) × ç1 - e t ÷
-
è ø
where:
Qn is the calculated present temperature,
Qn-1 is the calculated temperature at the previous time step,
Qfinal is the calculated final temperature with the actual current,
Dt is the time step between calculation of the actual temperature and

t is the set thermal time constant for the protected device (line or cable)
The actual temperature of the protected component (line or cable) is calculated by adding the
ambient temperature to the calculated temperature, as shown above. The ambient temperature
can be taken from a separate sensor or can be given a constant value. The calculated component
temperature is available as a real figure signal, TEMP.
When the component temperature reaches the set alarm level AlarmTemp the output signal
ALARM is set. When the component temperature reaches the set trip level TripTemp the output
signal TRIP is set.
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There is also a calculation of the present time to trip with the present current. This calculation is
only performed if the final temperature is calculated to be above the operation temperature:
  final  trip 
ttrip    ln  
 
 final  n 
The calculated time to trip is available as a real figure signal, TTRIP.
After a trip, caused by the thermal overload protection, there can be a lockout to reconnect the
tripped circuit. The output lockout signal LOCKOUT is activated when the device temperature is
above the set lockout release temperature setting ReclTemp.
The time to lockout release is calculated by the following cooling time calculation. The thermal
content of the function can be reset with input RESET.
æQ - Qlockout _ release ö
tlockout _ release = -t × ln ç final ÷÷
ç Q - Q
è final n ø
In the above equation, the final temperature is equal to the set or measured ambient temperature.
The calculated time to reset of lockout is available as a real figure signal, TENRECL. This signal is
enabled when the LOCKOUT output is activated.
In some applications the measured current can involve a number of parallel lines. This is often
used where one bay connects several parallel cables. By setting the parameter IMult to the number
of parallel lines (cables) the actual current on one line is used in the protection algorithm by
dividing the measured current by the total number of cables. To activate this option the input
MULTPU must be activated.
The protection has a reset input: RESET. By activating this input the calculated temperature is
reset to its default initial value. This is useful during testing when secondary injected current has
given a calculated “false” temperature level.
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Current protection
PICKUP
Final Temp > Trip Temp
TEMP
Calculation of actual
temperature
AMBTEMP ALARM
Actual Temp > Alarm Temp
I3P
Calculation of final
temperature
ENMULT
TRIP
Actual Temp > Trip Temp

SENSFLT
LOCKOUT
Lockout logic
Actual Temp < Recl Temp

BLOCK
TTRIP
Calculation of time to trip
BLKTR
TENRECL
Calculation of time to reset
of lockout
Figure 288: Functional overview of LFPTTR/LCPTTR (26)
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M12352-1 v15
Table 294: LFPTTR/LCPTTR (26)technical data

Reference current (2-400)% of IBase ±1.0% of In
Reference temperature (0-600)°F, 0 - 300)°C ±2.0°F, ±2.0°C

Trip time: Time constant t = (1–1000) IEC 60255-149, ±5.0% or ±200 ms
minutes whichever is greater
 
 I , Ip
2 2 
t < σ ln  
 2 TTrip , TAmb 2 
I , T √ I ref

 ref 
TTrip= set trip temperature

TAmb = ambient temperature
Tref = temperature rise above ambient at Iref
Iref = reference load current
I = actual measured current
Ip = load current before overload occurs
Alarm temperature (0-400)°F, (0-200)°C ±4.0°F, ±2.0°C

Trip temperature (0-300)°C, (0-600)°F ±4.0°F, ±2.0°C
Reset level temperature (0-300)°C, (0-600)°F ±4.0°F, ±2.0°C
8.8 Breaker failure protection CCRBRF(50BF) IP14514-1 v6
M14878-1 v5

Breaker failure protection, 3-phase CCRBRF 50BF
activation and output
3I>BF
SYMBOL-U V1 EN-US
Breaker failure protection (CCRBRF) ensures a fast backup tripping of the surrounding breakers in
case the own breaker fails to open. CCRBRF (50BF) can be current-based, contact-based or an
adaptive combination of these two conditions.
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A current check with extremely short reset time is used as check criterion to achieve high security
against inadvertent operation.
Contact check criteria can be used where the fault current through the breaker is small.
CCRBRF (50BF) can be single- or three-phase initiated to allow use with single pole tripping
applications. For the three-phase version of CCRBRF (50BF) the current criteria can be set to trip
only if two out of four for example, two phases or one phase plus the residual current pickups. This
gives a higher security to the back-up trip command.
CCRBRF (50BF) function can be programmed to give a single- or three-phase re-trip of its own
breaker to avoid unnecessary tripping of surrounding breakers at an incorrect initiation due to
mistakes during testing.
CCRBRF (50BF)
I3P* TRBU
BLOCK TRBU2
BFI_3P TRRET
BFI_A TRRET_A
BFI_B TRRET_B
BFI_C TRRET_C
52A_A CBALARM
52A_B
52A_C
52FAIL
Figure 289: CCRBRF (50BF) function block
8.8.4 Signals
Table 295: CCRBRF (50BF) Input signals

I3P GROUP - Three phase group signal for current inputs
SIGNAL
BFI_3P BOOLEAN 0 Three phase breaker failure initiation
BFI_A BOOLEAN 0 Phase A breaker failure initiation
BFI_B BOOLEAN 0 Phase B breaker failure initiation
BFI_C BOOLEAN 0 Phase C breaker failure initiation
52a_A BOOLEAN 0 Circuit breaker closed in phase A
52a_B BOOLEAN 0 Circuit breaker closed in phase B
52a_C BOOLEAN 0 Circuit breaker closed in phase C
52FAIL BOOLEAN 0 CB faulty, unable to trip. Back-up trip instantaneously
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Table 296: CCRBRF (50BF) Output signals

TRBU BOOLEAN Back-up trip by breaker failure protection function
TRBU2 BOOLEAN Second back-up trip by breaker failure protection function
TRRET BOOLEAN Retrip by breaker failure protection function
TRRET_A BOOLEAN Retrip by breaker failure protection function phase A
TRRET_B BOOLEAN Retrip by breaker failure protection function phase B
TRRET_C BOOLEAN Retrip by breaker failure protection function phase C
CBALARM BOOLEAN Alarm for faulty circuit breaker
8.8.5 Settings
Table 297: CCRBRF (50BF) Group settings (basic)

Enabled
FunctionMode Current - - Current Detection for trip based on Current/
Contact Contact/Current&Contact
Current/Contact
BuTripMode 2 out of 4 - - 1 out of 3 Back-up trip modes: 2 out of 4 or 1 out of 3
1 out of 3 or 1 out of 4
1 out of 4
RetripMode Retrip Off - - Retrip Off Oper mode of re-trip logic: OFF/CB Pos
CB Pos Check Check/No CB Pos Check
No CBPos Check
Pickup_PH 5 - 200 %IB 1 10 Phase current pickup in % of IBase
Pickup_N 2 - 200 %IB 1 10 Operate residual current level in % of IBase
t1 0.000 - 60.000 s 0.001 0.000 Time delay of re-trip
t2 0.000 - 60.000 s 0.001 0.150 Time delay of back-up trip
t2MPh 0.000 - 60.000 s 0.001 0.150 Time delay of back-up trip at multi-phase
pickup
tPulse 0.000 - 60.000 s 0.001 0.200 Trip pulse duration
Table 298: CCRBRF (50BF) Group settings (advanced)

Pickup_BlkCont 5 - 200 %IB 1 20 I> in % of IBase block operation using
Function Mode Contact
t3 0.000 - 60.000 s 0.001 0.030 Additional time delay to 27P2TDLY for a
second back-up trip
tCBAlarm 0.000 - 60.000 s 0.001 5.000 Time delay for alarm when faulty circuit
breaker indicated
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Table 299: CCRBRF (50BF) Non group settings (basic)

groups

Table 300: CCRBRF (50BF) Monitored data

IA REAL - A Measured current in phase A
IB REAL - A Measured current in phase B
IC REAL - A Measured current in phase C
IN REAL - A Measured residual current
Breaker failure protection CCRBRF (50BF) is initiated from the protection trip command, either
from protection functions within the IED or from external protection devices.
To this function the three-phase current input and/or change to: the breaker normally open
auxiliary contact (i.e. "52a" or "closed") shall be connected. On OHL feeders where single pole auto-
reclosing is used, auxiliary contact from each CB pole shall be connected separately
The input START signal (i.e. initiate signal) can be phase selective or common (for all three phases).
Phase selective start signals enable single pole retrip functionality. This means that a second
attempt to open the same breaker can be done phase-selective. The retrip attempt is made after a
set time delay t1. For transmission lines, single pole trip and auto-reclosing is often used. The
retrip function can be phase selective if it is initiated from the phase selective line protection.
The re-trip function can be done with or without FunctionMode check. With this check, the re-trip
is only performed if the circuit breaker is still seen as closed when t1 timer has elapsed.
The INITIATE signal will also start the backup trip timer. The function detects the successful
breaker opening, either by detection of low current through RMS evaluation and a special adapted
current algorithm or by monitoring the circuit breaker status using normally open auxiliary contact
from the breaker. The special algorithm enables a very fast detection of successful breaker
opening, which is, fast resetting of the current measurement. If the function has not detected
breaker opening before the backup timer has run-out its time a backup trip is initiated.
Further the following possibilities are available:
• Three phase (i.e. common) start/initiation via input INITIATE or individual start/initiation per
phase by using phase segregated inputs STLx.
• The minimum length of the retrip pulse, the backup trip pulse and the second backup trip
pulse are settable. This pulse duration is defined by a parameter setting tPulse. The retrip
pulse, the backup trip pulse and the second backup trip pulse will however sustain as long as
there is an indication of closed breaker.
• If the current detection is used it is possible to use three different options: 1 out of 3 where it
is sufficient to detect failure to open (high current) in one pole, 1 out of 4 where it is sufficient
to detect failure to open (high current) in one pole or high residual current and 2 out of 4
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where at least two currents (phase current and/or residual current) shall be high for breaker
failure detection.
• The current detection level for the residual current can be set different from the setting of
phase current detection.
• It is possible to have different backup time delays for single-phase faults and for multi-phase
faults.
• It is possible to have instantaneous back-up trip function if the circuit breaker is incapable to
clear faults, for example, at low gas pressure. This will happen when input signal 52FAIL has
logical value one and timer tCBAlarm has expired. This situation will be indicated via output
signal CBALARM.
The selection of measurement criterion is done with setting parameter FunctionMode, to

determine if the breaker has opened or not:
• Option1 - Current: Compares the measured phase current magnitude to setting IPPU(operate
phase current level in % of IBase), and the measured residual current magnitude to setting IN>
(Operate residual current level in % of IBase). Criterion is active (i.e. breaker did not open yet)
if the measured current magnitudes are higher than the set values.
• Option 2 - CB Pos: This criterion is active (i.e. breaker did not open yet in phase Lx) if the
binary input CBCLDLx has logical value one. Thus function simply follows the status of CB pole
normally open auxiliary contact (i.e. "52a" or "closed") which shall be connected to this input.
• Option 3 - Current or CB Pos: It uses a combination of Current or CB Pos criteria. Note that
Current criterion will be then always used, while the CB Pos criterion will be only enabled and
used if current is smaller than set value I>BlkCBPos at the moment when external INITIATE
signal has been received. It is recommended to set value for I>BlkCBPos higher than the set
value for IPPU.
By the setting StartMode it is possible to select how t1 and t2 timers are run and consequently
how output commands are given from the function:
• Option 1 - LatchedStart: “By external start signals which is internally latched”.

When function is once started by external INITIATE signal, the timers t1 and t2 will always
elapse and then measurement criterion defined by parameter FunctionMode will be always
checked in order to verify if the appropriate command shall be given out from the function.
Timers cannot be stopped by removing the external INITIATE signal. Function can be started
again only when all of the following three timers t1, t2 and fixed timer of 150 ms in function
internal design has expired and the measurement criterion defined by parameter
FunctionMode has been deactivated, see Figure 290.
• Option 2 - FollowStart: “Follow the external start signal only”.

The timers t1 and t2 will run while external INITIATE signal is present. If they elapse then
measurement criterion defined by parameter FunctionMode will be checked in order to verify
if the appropriate command shall be given out from the function. Timers can be always
stopped by resetting the external INITIATE signal, see Figure 291.
• Option 3- FollowStart&Mode: “Follow external start signal and selected FunctionMode”.

The timers t1 and t2 will run while external INITIATE signal is present and in the same time the
measurement criterion defined by parameter FunctionMode is active. If they elapse then the
appropriate command will be given out from the function. Timers can be stopped by resetting
the external INITIATE signal or if the measurement criterion de-activates, see Figure 292.
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When one of the two “follow modes” is used, there is a settable timer tStartTimeout which will
block the external INITIATE input signal when it times-out. This will automatically also reset the t1
and t2 timers and consequently prevent any backup trip command. At the same time the STALARM
output from the function will have logical value one. To reset this signal external INITIATE signal
shall be removed. This is done in order to prevent unwanted operation of the breaker failure
function for cases where a permanent INITIATE signal is given by mistake (e.g. due to a fault in the
station battery system). Note that any backup trip command will inhibit running of tStartTimeout
timer.
The BLOCK signal overrides any StartMode condition and resets INITIATE signal, running of t1 and
t2 timers and all function outputs.
30ms t1 30ms
PICKUP OR TRRET
S Q t AND
t2 30ms
OR TRBU
t AND
Current Check
CB Position Check OR
150ms
AND
t
NOT
ANSI 18001002-1-en.vsdx
Figure 290: Simplified overall logic for LatchedStart
t1
PICKUP OR TRRET
t AND
Current Check
t2
TRBU
t AND
OR
Figure 291: Simplified overall logic for FollowStart
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PICKUP t1 TRRET
AND t
Current Check
CB Position Check OR t2 TRBU
t
Figure 292: Simplified overall logic for FollowStart&Mode

The BuTripMode setting defines how many measurement elements must operate, when current
criterion is used, to determine if the CB is opened or not:
• 2 elements operate out of three phases and neutral

• 1 element operates out of three phases
• 1 element operates out of three phases and neutral
Note that it is possible to set several timers for the backup trip as described below:
1. Timer t2 is used when function is started in one phase only (i.e. for single-phase to ground
fault on an OHL (Over Head Lines) when single-pole auto-reclosing is used).
2. Timer t2MPh is used when function is started in at least two phases. This will allow to have
shorter backup trip times for a multi-phase fault on an OHL Note that for a protected object
which are always tripped three-phase (e.g. transformers, generators, reactors, cables, etc.)
this timer shall always be set to the same value as t2 timer.
3. Timer t3 can be used to give a second backup trip command. It can be used in stations having
small DC battery which is not capable to trip all surrounding breakers at once. Note that t3
timer will only start when t2 timer expires.
The RetripMode defines how re-trip feature will behave:
• Off: The re-trip command to the own circuit breaker is permanently disabled.
• UseFunctionMode: Retrip command to the own circuit breaker is given only if measurement
criterion defined by setting parameter FunctionMode is still active when set timer t1 expires
(e.g. if FunctionMode=Current and current magnitude is higher than set value IPPU when t1
expires, the retrip command will be issued).
• Always: Retrip command to the own circuit breaker is given always when set timer t1 expires
without any further checks.
The simplified logic for the function is given in the following figures.
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StartMode
LatchedStart
FollowStart
1 FollowStart&Mode OR
PICKUP 30ms
int startA
BFI_A OR AND S Q
BLOCK
NOT
int reset
OR R
NOT
TRBU
NOT int startAlarmA
tStartTimeout
AND t NOT
AND AND int startAlarmB STALARM
From other OR
phases int startAlarmC
Figure 293: Start logic for all three Function Modes of operation
IA
a
a>b NOT
IPPU b
FunctionMode
Current
CB Pos OR AND int reset
OR
1
Current or CB Pos 150 ms
int startA
t
OR AND
t1
t
t2
t OR
t2MPh
t
AND
52A_A
NOT
Figure 294: Reset logic in latched mode
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StartMode
LatchedStart
FollowStart
1 FollowStart&Mode OR AND
int retrip
currPh1Check
CB Position Check OR 30ms
AND t1 OR AND
int startA t OR
t1
t
RetripMode
Off tPulse
TRRETA
UseFunctionMode AND OR
1
Always
TRRETB TRRET
TRRETC
OR
tPulse From other

AND phases
Figure 295: Simplified re-trip logic
StartMode
LatchedStart
1 FollowStart
FollowStart&Mode OR AND
currCheck
backupTripA
t2
AND t 30ms
OR AND
OR OR
int startA
t2MPh tPulse TRBU

int startB From backupTripB OR
2 of 3 OR
int startC t other backupTripC
phases
t3
t TRBU2
OR
AND
tPulse
CBFLT tCBAlarm CBALARM

t
Figure 296: Simplified backup trip logic
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M12353-1 v13
Table 301: CCRBRF (50BF) technical data

Trip phase current (5-200)% of lBase ±1.0% of In at I £ In
Reset ratio, phase current > 95% -

Trip residual current (2-200)% of lBase ±1.0% of In at I £ In
Reset ratio, residual current > 95% -

Phase current pickup for blocking of contact (5-200)% of lBase ±1.0% of In at I £ In
function ±1.0% of I at I > In
Reset ratio > 95% -

Trip time for current detection 10 ms typically -
Reset time for current detection 15 ms maximum -
Time delay for re-trip at 0 to 2 x Iset (0.000-60.000) s ±0.2% or ±15 ms whichever is greater
Time delay for back-up trip at 0 to 2 x Iset (0.000-60.000) s ±0.2% or ±15 ms whichever is greater
Time delay for back-up trip at multi-phase (0.000-60.000) s ±0.2% or ±20 ms whichever is greater
pickup at 0 to 2 x Iset
Additional time delay for a second back-up (0.000-60.000) s ±0.2% or ±20 ms whichever is greater
trip at 0 to 2 x Iset
Time delay for alarm for faulty circuit breaker (0.000-60.000) s ±0.2% or ±15 ms whichever is greater
8.9 Stub protection STBPTOC (50STB) IP14515-1 v3
M17108-1 v2

Stub protection STBPTOC 50STB
3I>STUB
SYMBOL-T V1 EN-US
When a power line is taken out of service for maintenance and the line disconnector is opened in
multi-breaker arrangements the voltage transformers will mostly be outside on the disconnected
part. The primary line distance protection will thus not be able to trip and must be blocked.
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Current protection
The stub protection STBPTOC (50STB) covers the zone between the current transformers and the
open disconnector. The three-phase instantaneous overcurrent function is released from a
normally open, 89b auxiliary contact on the line disconnector.
STBPTOC (50STB)
I3P* TRIP
BLOCK PICKUP
BLKTR
ENABLE
Figure 297: STBPTOC (50STB) function block
8.9.4 Signals
Table 302: STBPTOC (50STB) Input signals

SIGNAL
ENABLE BOOLEAN 0 Enable stub protection usually with open disconnect switch (89b)
Table 303: STBPTOC (50STB) Output signals

TRIP BOOLEAN General trip
PICKUP BOOLEAN Pickup
8.9.5 Settings
Table 304: STBPTOC (50STB) Group settings (basic)

Enabled
EnableMode Release - - Release Enable stub protection usually with open
Continuous disconnect switch (89b)
IPickup 5 - 2500 %IB 1 200 Pickup current level in % of IBase
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Table 305: STBPTOC (50STB) Group settings (advanced)

tDelay 0.000 - 60.000 s 0.001 0.000 Time delay
Table 306: STBPTOC (50STB) Non group settings (basic)

groups

Table 307: STBPTOC (50STB) Monitored data

The sampled analog phase currents are pre-processed in a discrete Fourier filter (DFT) block. From
the fundamental frequency components of each phase current the RMS value of each phase
current is derived. These phase current values are fed to a comparator in the stub protection
function STBPTOC (50STB). In a comparator the RMS values are compared to the set operating
current value of the function IPickup.
If a phase current is larger than the set operating current the signal from the comparator for this
phase is activated. This signal will, in combination with the release signal from line disconnection
(RELEASE input), activate the timer for the TRIP signal. If the fault current remains during the timer
delay t, the TRIP output signal is activated. The function can be blocked by activation of the BLOCK
input.
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Current protection
STUB PROTECTION FUNCTION
BLOCK
TRIP
PU_A AND
PU_B OR
PU_C
ENABLE
en05000731_ansi.vsd
Figure 298: Simplified logic diagram for Stub protection (50STB)

M12350-1 v11
Table 308: STBPTOC (50STB) technical data

Operating current (5-2500)% of IBase ±1.0% of In at I ≤ In
Reset ratio > 95% at (50-2500)% of IBase -

Independent time delay at 0 to 2 x Iset (0.000-60.000) s ±0.2% or ±30 ms
whichever is greater
Trip time, pickup at 0 to 2 x Iset Min. = 10 ms -
Max. = 20 ms
Reset time, pickup at 2 to 0 x Iset Min. = 10 ms -
Max. = 20 ms
8.10 Pole discrepancy protection CCPDSC(52PD) IP14516-1 v5
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M14888-1 v4

Pole discrepancy protection CCPDSC 52PD
PD
SYMBOL-S V1 EN-US
An open phase can cause negative and zero sequence currents which cause thermal stress on
rotating machines and can cause unwanted operation of zero sequence or negative sequence
current functions.
Normally the own breaker is tripped to correct such a situation. If the situation warrants the
surrounding breakers should be tripped to clear the unsymmetrical load situation.
The Pole discrepancy protection function CCPDSC (52PD) operates based on information from
auxiliary contacts of the circuit breaker for the three phases with additional criteria from
unsymmetrical phase currents when required.
CCPDSC (52PD)
I3P* TRIP
BLOCK PICK UP
BLKDBYAR
CLOSECMD
OPENCMD
EXTPDIND
52B_A
52A_A
52B_B
52A_B
52B_C
52A_C
Figure 299: CCPDSC (52PD) function block
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8.10.4 Signals
Table 309: CCPDSC (52PD) Input signals

SIGNAL
BLKDBYAR BOOLEAN 0 Block of function at CB single phase auto re-closing cycle
CLOSECMD BOOLEAN 0 Close command to CB
OPENCMD BOOLEAN 0 Open command to CB
EXTPDIND BOOLEAN 0 Pole discrepancy signal from CB logic
52b_A BOOLEAN 1 Phase A Pole opened indication from CB
52a_A BOOLEAN 0 Phase A Pole closed indication from CB
52b_B BOOLEAN 1 Phase B Pole opened indication from CB
52a_B BOOLEAN 0 Phase B Pole closed indication from CB
52b_C BOOLEAN 1 Phase C Pole opened indication from CB
52a_C BOOLEAN 0 Phase C Pole closed indication from CB
Table 310: CCPDSC (52PD) Output signals

TRIP BOOLEAN Trip signal to CB
PICKUP BOOLEAN Trip condition TRUE, waiting for time delay
8.10.5 Settings
Table 311: CCPDSC (52PD) Group settings (basic)

Enabled
tTrip 0.000 - 60.000 s 0.001 0.300 Time delay between trip condition and trip
signal
ContactSel Disabled - - Disabled Contact function selection
PD signal from CB
Pole pos aux cont.
CurrentSel Disabled - - Disabled Current function selection
CB oper monitor
Continuous
monitor
CurrUnsymPU 0 - 100 % 1 80 Unsym magn of lowest phase current
compared to the highest.
CurrRelPU 0 - 100 %IB 1 10 Current magnitude for release of the
function in % of IBase
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Table 312: CCPDSC (52PD) Non group settings (basic)

groups

Table 313: CCPDSC (52PD) Monitored data

IMin REAL - A Lowest phase current
IMax REAL - A Highest phase current

M13273-3 v6
The detection of pole discrepancy can be made in two different ways. If the contact based
function is used an external logic can be made by connecting the auxiliary contacts of the circuit
breaker so that a pole discrepancy is indicated, see figure 300.
C.B.
52a
52a
+
52a
52b
52b poleDiscrepancy Signal from C.B.

52b
ANSI_en05000287.vsd
Figure 300: Pole discrepancy external detection logic

This binary signal is connected to a binary input of the IED. The appearance of this signal will
pickup a timer that will give a trip signal after the set time delay.
There is also a possibility to connect all phase selective auxiliary contacts (phase contact open and
phase contact closed) to binary inputs of the IED, see figure 301.
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C.B.
52a poleOneClosed from C.B.

52a poleTwoClosed from C.B.
52a poleThreeClosed from C.B.
+ 52b
poleOneOpened from C.B.
52b poleTwoOpened from C.B.
52b poleThreeOpened from C.B.
en05000288_ansi.vsd
Figure 301: Pole discrepancy signals for internal logic

In this case the logic is realized within the function. If the inputs are indicating pole discrepancy
the trip timer is started. This timer will give a trip signal after the set delay.
Pole discrepancy can also be detected by means of phase selective current measurement. The
sampled analog phase currents are pre-processed in a discrete Fourier filter (DFT) block. From the
fundamental frequency components of each phase current the RMS value of each phase current is
derived. The smallest and the largest phase current are derived. If the smallest phase current is
lower than the setting CurrUnsymPU times the largest phase current the settable trip timer (tTrip)
is started. The tTrip timer gives a trip signal after the set delay. The TRIP signal is a pulse 150 ms
long. The current based pole discrepancy function can be set to be active either continuously or
only directly in connection to breaker open or close command.
The function also has a binary input that can be configured from the autoreclosing function, so
that the pole discrepancy function can be blocked during sequences with a single pole open if
single pole autoreclosing is used.
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M13946-3 v7
BLOCK
OR
BLKDBYAR
PolPosAuxCont
AND
52b_A
52a_A
52b_B Pole
52a_B Disc repancy
52b_C detection
52a_C 150 ms
0- t TRIP
AND
0
OR
PD signal from CB
AND
EXTPDIND
CLOSECMD t+ 200 ms
OR
OPENCMD
AND
Unsymmetry current
detection
en 05000747_ansi.vsd
Figure 302: Simplified block diagram of pole discrepancy function CCPDSC (52PD) - contact
and current based
CCPDSC (52PD) is disabled if:
• The IED is in TEST mode and CCPDSC (52PD) has been blocked from the local HMI
• The input signal BLOCK is high
• The input signal BLKDBYAR is high
The BLOCK signal is a general purpose blocking signal of the pole discrepancy protection. It can be
connected to a binary input in the IED in order to receive a block command from external devices
or can be software connected to other internal functions in the IED itself in order to receive a block
command from internal functions. Through OR gate it can be connected to both binary inputs and
internal function outputs.
The BLKDBYAR signal blocks the pole discrepancy operation when a single phase autoreclosing
cycle is in progress. It can be connected to the output signal 1PT1 on SMBRREC (79) function block.
If the autoreclosing function is an external device, then BLKDBYAR has to be connected to a binary
input in the IED and this binary input is connected to a signalization “1phase autoreclosing in
progress” from the external autoreclosing device.
If the pole discrepancy protection is enabled, then two different criteria can generate a trip signal
TRIP:
• Pole discrepancy signaling from the circuit breaker.

• Unsymmetrical current detection.
8.10.7.1 Pole discrepancy signaling from circuit breaker M13946-18 v4
If one or two poles of the circuit breaker have failed to open or to close the pole discrepancy
status, then the function input EXTPDIND is activated from the pole discrepancy signal derived
from the circuit breaker auxiliary contacts (one NO contact for each phase connected in parallel,
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and in series with one NC contact for each phase connected in parallel) and, after a settable time
interval tTrip (0-60 s), a 150 ms trip pulse command TRIP is generated by the Polediscrepancy
function (52PD).
8.10.7.2 Unsymmetrical current detection M13946-21 v4
Unsymmetrical current indicated if:
• any phase current is lower than CurrUnsymPU of the highest current in the three phases.
• the highest phase current is greater than CurrRelPU of IBase.
If these conditions are true, an unsymmetrical condition is detected and the internal signal INPS is
turned high. This detection is enabled to generate a trip after a set time delay tTrip if the
detection occurs in the next 200 ms after the circuit breaker has received a command to open trip
or close and if the unbalance persists. The 200 ms limitation is for avoiding unwanted operation
during unsymmetrical load conditions.
The pole discrepancy protection is informed that a trip or close command has been given to the
circuit breaker through the inputs CLOSECMD (for closing command information) and OPENCMD
(for opening command information). These inputs can be connected to terminal binary inputs if
the information are generated from the field (that is from auxiliary contacts of the close and open
push buttons) or may be software connected to the outputs of other integrated functions (that is
close command from a control function or a general trip from integrated protections).

M13279-1 v9
Table 314: CCPDSC (52PD) technical data

Trip current (0–100)% of IBase ±1.0% of In
Independent time delay (0.000-60.000) s ±0.2% or ± 25 ms whichever is greater

between trip condition and
trip signal
8.11 Directional underpower protection GUPPDUP (37) SEMOD156693-1 v4
SEMOD158941-2 v4

Directional underpower protection GUPPDUP 37
P<
2
SYMBOL-LL V2 EN-US
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The task of a generator in a power plant is to convert mechanical energy available as a torque on a
rotating shaft to electric energy.
Sometimes, the mechanical power from a prime mover may decrease so much that it does not
cover bearing losses and ventilation losses. Then, the synchronous generator becomes a
synchronous motor and starts to take electric power from the rest of the power system. This
operating state, where individual synchronous machines operate as motors, implies no risk for the
machine itself. If the generator under consideration is very large and if it consumes lots of electric
power, it may be desirable to disconnect it to ease the task for the rest of the power system.
Often, the motoring condition may imply that the turbine is in a very dangerous state. The task of
the low forward power protection is to protect the turbine and not to protect the generator itself.
Figure 303 illustrates the low forward power and reverse power protection with underpower and
overpower functions respectively. The underpower IED gives a higher margin and should provide
better dependability. On the other hand, the risk for unwanted operation immediately after
synchronization may be higher. One should set the underpower IED to trip if the active power from
the generator is less than about 2%. One should set the overpower IED to trip if the power flow
from the network to the generator is higher than 1% depending on the type of turbine.
When IED with a metering class input CTs is used pickup can be set to more sensitive value
(e.g.0,5% or even to 0,2%).
Underpower IED Overpower IED
Trip
Q Q
Trip
Line Line
Margin Margin
P P
Tripping point Tripping point

without without
turbine torque turbine torque
Figure 303: Protection with underpower IED and overpower IED
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GUPPDUP (37)
I3P* TRIP
V3P* TRIP1
BLOCK TRIP2
BLOCK1 PICKUP
BLOCK2 PICKUP1
PICKUP2
P
PPERCENT
Q
QPERCENT
Figure 304: GUPPDUP (37) function block
8.11.4 Signals
Table 315: GUPPDUP (37) Input signals

SIGNAL
SIGNAL
BLOCK1 BOOLEAN 0 Block of stage 1
Table 316: GUPPDUP (37) Output signals

TRIP1 BOOLEAN Trip of stage 1
PICKUP BOOLEAN Common pickup
PICKUP1 BOOLEAN Pickup of stage 1
P REAL Active Power in MW
PPERCENT REAL Active power in % of SBase
Q REAL Reactive power in MVAr
QPERCENT REAL Reactive power in % of SBase
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8.11.5 Settings
Table 317: GUPPDUP (37) Group settings (basic)

Enabled
OpMode1 Disabled - - UnderPower Operation mode for stage 1 Off / On
UnderPower
Power1 0.0 - 500.0 %SB 0.1 1.0 Stage 1 underpower setting in Angle1
direction in % of SBase
Angle1 -180.0 - 180.0 Deg 0.1 0.0 Characteristic angle for max power
senistivity stage 1
TripDelay1 0.01 - 6000.00 s 0.01 1.00 Trip delay for stage 1
DropDelay1 0.01 - 6000.00 s 0.01 0.06 Drop-off delay for stage 1
OpMode2 Disabled - - UnderPower Operation mode for stage 2 Off / On
UnderPower
Power2 0.0 - 500.0 %SB 0.1 1.0 Power setting for stage 2 in % of SBase
senistivity stage 2
Table 318: GUPPDUP (37) Group settings (advanced)

TD 0.000 - 0.999 - 0.001 0.000 Low pass filter coefficient for power
measurement, P and Q
Hysteresis1 0.2 - 5.0 %SB 0.1 0.5 Absolute hysteresis of stage 1 in % SBase
Hysteresis2 0.2 - 5.0 %SB 0.1 0.5 Absolute hysteresis of stage 2 in % SBase
IMagComp5 -10.000 - 10.000 % 0.001 0.000 Amplitude correction compensates current
error at 5% of Ir
error at 30% of Ir
error at 100% of Ir
VMagComp5 -10.000 - 10.000 % 0.001 0.000 Amplitude correction compensates
voltage error at 5% of Ur
IAngComp5 -10.000 - 10.000 Deg 0.001 0.000 Corr of error betw current and voltage
angles at 5% of Ir
angles at 30% of Ir
angles at 100% of Ir
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Table 319: GUPPDUP (37) Non group settings (basic)

groups
Mode A, B, C - - Pos Seq Selection of measured current and voltage
Arone
Pos Seq
AB
BC
CA
A
B
C

Table 320: GUPPDUP (37) Monitored data

P REAL - MW Active Power in MW
PPERCENT REAL - % Active power in % of SBase
Q REAL - MVAr Reactive power in MVAr
QPERCENT REAL - % Reactive power in % of SBase

SEMOD172136-4 v4
A simplified scheme showing the principle of the power protection function is shown in figure 305.
The function has two stages with individual settings.
Chosen current
phasors P
Complex Derivation of S( angle)

S( angle ) < t TRIP1
power S( composant)
Chosen voltage Power1 0
calculation in Char angle
phasors Q
PICKUP1
S( angle ) < t TRIP2

Power2 0
PICKUP2
P = POWRE
Q = POWIM
Figure 305: Simplified logic diagram of the power protection function
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The function will use voltage and current phasors calculated in the pre-processing blocks. The
apparent complex power is calculated according to chosen formula as shown in table 321.
Table 321: Complex power calculation

Set value: Mode Formula used for complex power calculation
A, B, C
S = V A × I A* + VB × I B* + VC × I C *
Arone
S = V AB × I A* - VBC × IC *
PosSeq
S = 3 × VPosSeq × I PosSeq*
AB
S = VAB × ( I A* - I B* )
BC
S = VBC × ( I B* - IC * )
CA
S = VCA × ( I C * - I A* )
A
S = 3 × VA × I A*
B
S = 3 × VB × I B*
C
S = 3 × VC × I C *
The active and reactive power is available from the function and can be used for monitoring and
fault recording.
The component of the complex power S = P + jQ in the direction Angle1(2) is calculated. If this
angle is 0° the active power component P is calculated. If this angle is 90° the reactive power
component Q is calculated.
The calculated power component is compared to the power pick up setting Power1(2). For
directional underpower protection, a pickup signal PICKUP1(2) is activated if the calculated power
component is smaller than the pick up value. For directional overpower protection, a pickup signal
PICKUP1(2) is activated if the calculated power component is larger than the pick up value. After a
set time delay TripDelay1(2) a trip TRIP1(2) signal is activated if the pickup signal is still active. At
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activation of any of the two stages a common signal PICKUP will be activated. At trip from any of
the two stages also a common signal TRIP will be activated.
To avoid instability there is a settable hysteresis in the power function. The absolute hysteresis of
the stage1(2) is Hysteresis1(2) = abs (Power1(2) + drop-power1(2)). For generator low forward
power protection the power setting is very low, normally down to 0.02 p.u. of rated generator
power. The hysteresis should therefore be set to a smaller value. The drop-power value of stage1
can be calculated with the Power1(2), Hysteresis1(2): drop-power1(2) = Power1(2) + Hysteresis1(2)
For small power1 values the hysteresis1 may not be too big, because the drop-power1(2) would be
too small. In such cases, the hysteresis1 greater than (0.5 · Power1(2)) is corrected to the minimal
value.
If the measured power drops under the drop-power1(2) value, the function will reset after a set
time DropDelay1(2). The reset means that the pickup signal will drop out and that the timer of the
stage will reset.
8.11.7.1 Low pass filtering SEMOD172136-39 v3
In order to minimize the influence of the noise signal on the measurement it is possible to
introduce the recursive, low pass filtering of the measured values for S (P, Q). This will make slower
measurement response to the step changes in the measured quantity. Filtering is performed in
accordance with the following recursive formula:
S = TD ⋅ SOld + (1 − TD ) ⋅ SCalculated
Where
S is a new measured value to be used for the protection function
Sold is the measured value given from the function in previous execution cycle
SCalculated is the new calculated value in the present execution cycle
TD is settable parameter by the end user which influence the filter properties
Default value for parameter TD is 0.00. With this value the new calculated value is immediately
given out without any filtering (that is without any additional delay). When TD is set to value
bigger than 0, the filtering is enabled. A typical value for TD=0.92 in case of slow operating
functions.
8.11.7.2 Calibration of analog inputs SEMOD172136-57 v3
Measured currents and voltages used in the Power function can be calibrated to get class 0.5
measuring accuracy. This is achieved by amplitude and angle compensation at 5, 30 and 100% of
rated current and voltage. The compensation below 5% and above 100% is constant and linear in
between, see example in figure 306.
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Magnitude
% of In compensation
+10
IMagComp5 Measured
IMagComp30 current
IMagComp100
5 30 100 % of In
0-5%: Constant
-10 5-30-100%: Linear
>100%: Constant
Degrees Angle
compensation
+10
IAngComp30 Measured
current
IAngComp5
IAngComp100
5 30 100 % of In
-10
Figure 306: Calibration curves

The first current and voltage phase in the group signals will be used as reference and the
amplitude and angle compensation will be used for related input signals.
Analog outputs (Monitored data) from the function can be used for service values or in the
disturbance report. The active power is provided as MW value: P, or in percent of base power:
PPERCENT. The reactive power is provided as Mvar value: Q, or in percent of base power:
QPERCENT.
SEMOD175152-2 v10
Table 322: GUPPDUP (37) technical data

Power level (0.0–500.0)% of SBase ±1.0% of Sn at S ≤ Sn
for Step 1 and Step 2 ±1.0% of S at S > Sn
where
Sr= 1,732*Vn*In
Characteristic angle (-180.0–180.0) degrees ±2.0 degrees

for Step 1 and Step 2
Independent time delay to trip for (0.01-6000.00) s ±0.2% or ±40 ms whichever is
Step 1 and Step 2 at 2 to 0.5 x Sn and greater
k=0.000
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8.12 Directional overpower protection GOPPDOP (32) SEMOD172360-1 v4
SEMOD176574-2 v4

Directional overpower protection GOPPDOP 32
P>
2
DOCUMENT172362-IMG158942
V2 EN-US
The task of a generator in a power plant is to convert mechanical energy available as a torque on a
rotating shaft to electric energy.
Sometimes, the mechanical power from a prime mover may decrease so much that it does not
cover bearing losses and ventilation losses. Then, the synchronous generator becomes a
synchronous motor and starts to take electric power from the rest of the power system. This
operating state, where individual synchronous machines operate as motors, implies no risk for the
machine itself. If the generator under consideration is very large and if it consumes lots of electric
power, it may be desirable to disconnect it to ease the task for the rest of the power system.
Often, the motoring condition may imply that the turbine is in a very dangerous state. The task of
the reverse power protection is to protect the turbine and not to protect the generator itself.
Figure 307 illustrates the low forward power and reverse power protection with underpower and
overpower functions respectively. The underpower IED gives a higher margin and should provide
better dependability. On the other hand, the risk for unwanted operation immediately after
synchronization may be higher. One should set the underpower IED to trip if the active power from
the generator is less than about 2%. One should set the overpower IED to trip if the power flow
from the network to the generator is higher than 1%.
When IED with a metering class input CTs is used pickup can be set to more sensitive value
(e.g.0,5% or even to 0,2%).
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Underpower IED Overpower IED
Trip
Q Q
Trip
Line Line
Margin Margin
P P
Tripping point Tripping point

without without
turbine torque turbine torque
Figure 307: Reverse power protection with underpower IED and overpower IED
GOPPDOP (32)
I3P* TRIP
V3P* TRIP1
BLOCK TRIP2
BLOCK1 PICKUP
BLOCK2 PICKUP1
PICKUP2
P
PPERCENT
Q
QPERCENT
Figure 308: GOPPDOP (32) function block
8.12.4 Signals
Table 323: GOPPDOP (32) Input signals

SIGNAL
SIGNAL
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Table 324: GOPPDOP (32) Output signals

PICKUP BOOLEAN Common pickup
P REAL Active power P in MW
PPERCENT REAL Active power P in % of SBase
Q REAL Reactive power Q in MVAr
QPERCENT REAL Reactive power Q in % of SBase
8.12.5 Settings
Table 325: GOPPDOP (32) Group settings (basic)

Enabled
OpMode1 Disabled - - OverPower Operation mode for stage 1 Off / On
OverPower
Power1 0.0 - 500.0 %SB 0.1 120.0 Stage 1 overpower setting in Angle1
senistivity stage 1
OpMode2 Disabled - - OverPower Operation mode for stage 2 Off / On
OverPower
Power2 0.0 - 500.0 %SB 0.1 120.0 Stage 2 overpower setting in Angle2
senistivity stage 2
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Table 326: GOPPDOP (32) Group settings (advanced)

k 0.000 - 0.999 - 0.001 0.000 Low pass filter coefficient for power
measurement, P and Q
Hysteresis1 0.2 - 5.0 %SB 0.1 0.5 Absolute hysteresis of stage 1 in % of
SBase
Hysteresis2 0.2 - 5.0 %SB 0.1 0.5 Absolute hysteresis of stage 2 in % of
SBase
error at 5% of Ir
error at 30% of Ir
error at 100% of Ir
angles at 5% of Ir
angles at 30% of Ir
angles at 100% of Ir
Table 327: GOPPDOP (32) Non group settings (basic)

groups
Mode A, B, C - - Pos Seq Selection of measured current and voltage
Arone
Pos Seq
AB
BC
CA
A
B
C
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Table 328: GOPPDOP (32) Monitored data

P REAL - MW Active power P in MW
PPERCENT REAL - % Active power P in % of SBase
Q REAL - MVAr Reactive power Q in MVAr
QPERCENT REAL - % Reactive power Q in % of SBase

SEMOD172154-4 v3
A simplified scheme showing the principle of the power protection function is shown in figure 309.
The function has two stages with individual settings.
Chosen current
phasors P
Complex Derivation of S(angle)

S(angle) > t TRIP1
power S(composant)
Chosen voltage Power1
calculation in Char angle
phasors Q
PICKUP1
S(angle) > t TRIP2

Power2
PICKUP2
P = POWRE
Q = POWIM
Figure 309: Simplified logic diagram of the power protection function

The function will use voltage and current phasors calculated in the pre-processing blocks. The
apparent complex power is calculated according to chosen formula as shown in table 329.
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Table 329: Complex power calculation

Set value: Mode Formula used for complex power calculation
A,B,C * * *
S = V A × I A + V B × I B + V C × IC
Arone * *
S = V AB × I A - V BC × I C
PosSeq *
S = 3 × V PosSeq × I PosSeq
A,B * *
S = V AB × (I A - I B )
B,C * *
S = V BC × (I B - I C )
C,A * *
S = V CA × (I C - I A )
A *
S = 3 × V A × IA
B *
S = 3 × V B × IB
C *
S = 3 × V C × IC
The active and reactive power is available from the function and can be used for monitoring and
fault recording.
The component of the complex power S = P + jQ in the direction Angle1(2) is calculated. If this
angle is 0° the active power component P is calculated. If this angle is 90° the reactive power
component Q is calculated.
The calculated power component is compared to the power pick up setting Power1(2). A pickup
signal PICKUP1(2) is activated if the calculated power component is larger than the pick up value.
After a set time delay TripDelay1(2) a trip TRIP1(2) signal is activated if the pickup signal is still
active. At activation of any of the two stages a common signal PICKUP will be activated. At trip
from any of the two stages also a common signal TRIP will be activated.
To avoid instability there is a settable hysteresis in the power function. The absolute hysteresis of
the stage1(2) is Hysteresis1(2) = abs (Power1(2) – drop-power1(2)). For generator reverse power
protection the power setting is very low, normally down to 0.02 p.u. of rated generator power. The
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hysteresis should therefore be set to a smaller value. The drop-power value of stage1 can be
calculated with the Power1(2), Hysteresis1(2): drop-power1(2) = Power1(2) – Hysteresis1(2)
For small power1 values the hysteresis1 may not be too big, because the drop-power1(2) would be
too small. In such cases, the hysteresis1 greater than (0.5 · Power1(2)) is corrected to the minimal
value.
If the measured power drops under the drop-power1(2) value the function will reset after a set
time DropDelay1(2). The reset means that the pickup signal will drop out ant that the timer of the
stage will reset.
8.12.7.1 Low pass filtering SEMOD172154-37 v4
introduce the recursive, low pass filtering of the measured values for S (P, Q). This will make slower
measurement response to the step changes in the measured quantity. Filtering is performed in
accordance with the following recursive formula:
S = k × SOld + (1 - k ) × SCalculated
Where
S is a new measured value to be used for the protection function
Sold is the measured value given from the function in previous execution cycle
SCalculated is the new calculated value in the present execution cycle
k is settable parameter by the end user which influence the filter properties
Default value for parameter k is 0.00. With this value the new calculated value is immediately given
out without any filtering (that is, without any additional delay). When k is set to value bigger than
0, the filtering is enabled. A typical value for k = 0.92 in case of slow operating functions.
8.12.7.2 Calibration of analog inputs SEMOD172154-55 v2
Measured currents and voltages used in the Power function can be calibrated to get class 0.5
measuring accuracy. This is achieved by amplitude and angle compensation at 5, 30 and 100% of
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Magnitude
+10
IMagComp5 Measured
IMagComp30 current
IMagComp100
5 30 100 % of In
0-5%: Constant
-10 5-30-100%: Linear
>100%: Constant
Degrees Angle
compensation
+10
IAngComp30 Measured
current
IAngComp5
IAngComp100
5 30 100 % of In
-10

amplitude and angle compensation will be used for related input signals.
Analog outputs from the function can be used for service values or in the disturbance report. The
active power is provided as MW value: P, or in percent of base power: PPERCENT. The reactive
power is provided as Mvar value: Q, or in percent of base power: QPERCENT.
SEMOD175159-2 v8
Table 330: GOPPDOP (32) technical data

Power level (0.0–500.0)% of SBase ±1.0% of Sn at S ≤ Sn
for Step 1 and Step 2 ±1.0% of S at S > Sn
Characteristic angle (-180.0–180.0) degrees ±2.0 degrees

for Step 1 and Step 2
Trip time, pickup at 0.5 to 2 x Sr and Min. =10 ms
k=0.000
Max. = 25 ms
Reset time, pickup at 2 to 0.5 x Sr Min. = 35 ms
and k=0.000
Max. = 55 ms
Independent time delay to trip for (0.01-6000.00) s ±0.2% or ±40 ms whichever is
Step 1 and Step 2 at 0.5 to 2 x Sn and greater
k=0.000
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8.13 Broken conductor check BRCPTOC (46) SEMOD171761-1 v3
SEMOD172362-2 v2

Broken conductor check BRCPTOC - 46
Conventional protection functions cannot detect the broken conductor condition. Broken
conductor check BRCPTOC (46) function, consisting of continuous phase selective current
unsymmetrical check on the line where the IED is connected, gives an alarm or trip at detecting
broken conductors.
BRCPTOC (46)
I3P* TRIP
BLOCK PICKUP
BLKTR
Figure 311: BRCPTOC (46) function block
8.13.4 Signals
Table 331: BRCPTOC (46) Input signals

SIGNAL
Table 332: BRCPTOC (46) Output signals

TRIP BOOLEAN Operate signal of the protection logic
PICKUP BOOLEAN Pickup signal of the protection logic
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8.13.5 Settings
Table 333: BRCPTOC (46) Group settings (basic)

Enabled
Pickup_ub 50 - 90 %IM 1 50 Highest and lowest phase currents
difference in % of highest phase current
Pickup_PH 5 - 100 %IB 1 20 Minimum phase current for operation of
Iub> in % of IBase
tOper 0.000 - 60.000 s 0.001 5.000 Operate time delay
Table 334: BRCPTOC (46) Group settings (advanced)

tReset 0.010 - 60.000 s 0.001 0.100 Time delay in reset
Table 335: BRCPTOC (46) Non group settings (basic)

groups

Table 336: BRCPTOC (46) Monitored data

IUNBAL REAL - - Measured unbalance of phase currents
Broken conductor check (BRCPTOC, 46) detects a broken conductor condition by detecting the
asymmetry between currents in the three phases. The current-measuring elements continuously
measure the three-phase currents.
The current asymmetry signal output PICKUP is set on if:
• The difference in currents between the phase with the lowest current and the phase with the
highest current is greater than set percentage Pickup_ub of the highest phase current
• The lowest phase current is below 50% of the minimum setting value Pickup_PH
The third condition is included to avoid problems in systems involving parallel lines. If a conductor
breaks in one phase on one line, the parallel line will experience an increase in current in the same
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phase. This might result in the first two conditions being satisfied. If the unsymmetrical detection
lasts for a period longer than the set time tOper the TRIP output is activated.
The simplified logic diagram of the broken conductor check function is shown in figure 312
BRCPTOC (46) is disabled (blocked) if:
• The IED is in TEST status and the function has been blocked from the local HMI test menu
(BlockBRC=Yes).
• The input signal BLOCK is high.
The BLOCK input can be connected to a binary input of the IED in order to receive a block
command from external devices, or can be software connected to other internal functions of the
IED itself to receive a block command from internal functions.
The output trip signal TRIP is a three-phase trip. It can be used to command a trip to the circuit
breaker or for alarm purpose only.
TEST
TEST-ACTIVE
AND
BlockBRC = Yes
BRC--PICKUP
Function Enable
BRC--BLOCK OR
0-t BRC--TRIP
AND
Unsymmetrical 0
Current Detection
PU_ub
IA<50%Pickup_PN
IB<50%Pickup_PN OR
IC<50%Pickup_PN
en07000123.vsd
Figure 312: Simplified logic diagram for Broken conductor check BRCPTOC (46)
SEMOD175200-2 v7
Table 337: BRCPTOC (46) technical data

Minimum phase current for operation (5–100)% of IBase ±1.0% of In
Unbalance current operation (50–90)% of maximum current ±1.0% of In
Independent trip time delay (0.000-60.000) s ±0.2% or ±45 ms whichever is greater

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Independent reset time delay (0.010-60.000) s ±0.2% or ±30 ms whichever is greater
Pickup time at current change from In Min. = 25 ms -
to 0 Max. = 35 ms
Reset time at current change from 0 to Min. = 5 ms -

In Max. = 20 ms
8.14 Voltage-restrained time overcurrent protection VRPVOC

(51V) GUID-613620B1-4092-4FB6-901D-6810CDD5C615 v4
8.14.1 Identification GUID-7835D582-3FF4-4587-81CE-3B40D543E287 v4

Voltage-restrained time overcurrent VRPVOC I>/U< 51V
protection
8.14.2 Functionality GUID-935E1CE8-601F-40E2-8D22-2FF68420FADF v6
Voltage-restrained time overcurrent protection (VRPVOC, 51V) function can be used as generator
backup protection against short-circuits.
The overcurrent protection feature has a settable current level that can be used either with
definite time or inverse time characteristic. Additionally, it can be voltage controlled/restrained.
One undervoltage step with definite time characteristic is also available within the function in
order to provide functionality for overcurrent protection with undervoltage seal-in.
8.14.3 Function block GUID-6B4EB1A4-2226-4397-A6FD-14F9DD02B12E v4
VRPVOC (51V)
I3P* TRIP
V3P* TROC
BLOCK 27 Trip
BLKOC PICKUP
BLKUV PU_OC
27 PU
Figure 313: VRPVOC (51V) function block
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8.14.4 Signals
Table 338: VRPVOC (51V) Input signals

SIGNAL
V3P GROUP - Three phase group signal for voltage inputs
SIGNAL
BLOCK BOOLEAN 0 Block of function both stages
BLKOC BOOLEAN 0 Block of voltage restraint overcurrent stage (ANSI 51V)
BLKUV BOOLEAN 0 Block of under voltage function
Table 339: VRPVOC (51V) Output signals

TROC BOOLEAN Trip signal from voltage restrained overcurrent stage
27 Trip BOOLEAN Trip signal from undervoltage function
PU_OC BOOLEAN Pickup signal from voltage restrained overcurrent stage
27 PU BOOLEAN Pick up signal from undervoltage function
8.14.5 Settings
Table 340: VRPVOC (51V) Group settings (basic)

Enabled
Pickup_Curr 2.0 - 5000.0 %IB 1.0 120.0 Pick up current level in % of IBase
Characterist ANSI Ext. inv. - - IEC Norm. inv. Time delay curve type for 51V Voltage
ANSI Very inv. restrained overcurrent
ANSI Norm. inv.
ANSI Mod. inv.
ANSI Def. Time
L.T.E. inv.
L.T.V. inv.
L.T. inv.
IEC Norm. inv.
IEC Very inv.
IEC inv.
IEC Ext. inv.
IEC S.T. inv.
IEC L.T. inv.
IEC Def. Time
tDef_OC 0.00 - 6000.00 s 0.01 0.50 Definite time delay for Over Current
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k 0.05 - 999.00 - 0.01 1.00 Time multiplier for Inverse Definite
Minimum Time curves
t_MinTripDelay 0.00 - 60.00 s 0.01 0.05 Minimum operate time for Inverse Definite
Minimum Time curve
Operation_UV Disabled - - Disabled Operation of under-voltage stage (ANSI 27)
Enabled Off / On
PickUp_Volt 2.0 - 100.0 %VB 0.1 50.0 Voltage for pickup of under-voltage stage
in % of UBase
tDef_UV 0.00 - 6000.00 s 0.01 1.00 Definite time time delay when used for
Under-Voltage
EnBlkLowV Disabled - - Disabled Enable internal low voltage level blocking
Enabled for Under-Voltage
BlkLowVolt 0.0 - 5.0 %VB 0.1 3.0 Internal low voltage level for blocking of
UV in % of VBase
Table 341: VRPVOC (51V) Group settings (advanced)

VDepMode Step - - Slope Voltage dependent mode OC (step, slope)
Slope
VDepFact 5.0 - 100.0 % 0.1 25.0 Pick up current level in % of pickup when
V< 25% of VBase
VHighLimit 30.0 - 100.0 %VB 0.1 100.0 Voltage high limit setting in % of VBase
Table 342: VRPVOC (51V) Non group settings (basic)

groups

Table 343: VRPVOC (51V) Monitored data

IMAX REAL - A Maximum phase current magnitude
VUMIN REAL - kV Minimum ph-to-ph voltage magnitude
8.14.7.1 Measured quantities GUID-0D511C03-3750-4F61-9555-69DAD96CDC21 v5
The voltage-restrained time overcurrent protection VRPVOC (51V) function is always connected to
three-phase current and three-phase voltage input in the configuration tool (ACT), but it will
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always measure the maximum of the three-phase currents and the minimum of the three phase-
to-phase voltages. If frequency tracking mode for preprocessing blocks is used, then the function
operates properly in wide frequency range (e.g. 10-90 Hz).
8.14.7.2 Base quantities GUID-08944177-73CF-4FB4-818E-3B7AC4F625EE v4
GlobalBaseSel defines the particular Global Base Values Group where the base quantities of the
function are set. In that Global Base Values Group:
IBase shall be entered as rated phase current of the protected object in primary amperes.
VBase shall be entered as rated phase-to-phase voltage of the protected object in primary kV.
8.14.7.3 Overcurrent protection GUID-7BB29872-EBC1-4628-AFB5-7A15E2EC41A8 v2
The overcurrent step simply compares the magnitude of the measured current quantity with the
set pickup level. The overcurrent step picks up if the magnitude of the measured current quantity
is higher than the set level.
Voltage restraint/control feature GUID-E7C59BAD-47A1-46C2-8929-7E589548045C v3

The overcurrent protection operation is made dependent of a measured voltage quantity. This
means that the pickup level of the overcurrent step is not constant but decreases with the
decrease in magnitude of the measured voltage quantity. This feature affects the pickup current
value of both definite time and inverse time IDMT overcurrent protection; in particular the
overcurrent with IDMT curve operates faster during low voltage conditions. Two different types of
dependencies are available:
• Voltage restrained overcurrent (when setting parameter VDepMode = Slope); the pickup level
of the overcurrent stage changes according to the Figure 314. The voltage restrained
characteristic is defined by the two points: (0.25*VBase ; VDepFact *Pickup_Curr/100*IBase)
and (VHighLimit/100*VBase; Pickup_Curr/100*IBase). In the first point the factor 0.25 that
multiply VBase cannot be changed.
Pickup level of the current
PickupCurr
VDepFact * PickupCurr
0,25 VHighLimit
VBase
Figure 314: Example for pickup level of the current variation as function of measured voltage
magnitude in Slope mode of operation
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• Voltage controlled overcurrent (when setting parameter VDepMode = Step); the pickup level
of the overcurrent stage changes according to the Figure 315.
Pickup level of the current
PickupCurr
VDepFact * PickupCurr
VHighLimit VBase
Figure 315: Example for pickup level of the current variation as function of measured voltage
magnitude in Step mode of operation
8.14.7.4 Logic diagram GUID-0A1565A4-74E1-4171-968B-50529AABF192 v2
DEF time
selected 0-tDef_OC
0 TROC
OR
MaxPhCurr
a PU_OC
a>b
b
PickupCurr
X Inverse
Inverse
time
Voltage selected
control or
restraint
feature
MinPh-Ph Voltage
Figure 316: Simplified internal logic diagram for overcurrent function
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Current protection
DEF time
selected 0-tDef_UV TRUV
0
MinPh-PhVoltage a
b>a
b PU_UV
AND
PickupVolt
Operation_UV=Disabled
BLKUV
Figure 317: Simplified internal logic diagram for undervoltage function
8.14.7.5 Undervoltage protection GUID-96171DC7-9F8E-47B4-BE0D-E1B9EE214612 v5
The undervoltage step simply compares the magnitude of the measured voltage quantity with the
set pickup level. The undervoltage step picks up if the magnitude of the measured voltage
quantity is lower than the set level.
The pickup signal starts a definite time delay. If the value of the pickup signal is one for longer
than the set time delay, the undervoltage step sets its trip signal to one.
This undervoltage functionality together with additional ACT logic can be used to provide
functionality for overcurrent protection with undervoltage seal-in.

GUID-7EA9731A-8D56-4689-9072-D72D9CDFD795 v7
Table 344: VRPVOC (51V) technical data

Pickup overcurrent (2.0 - 5000.0)% of IBase ±1.0% of Ir at I ≤ Ir
±1.0% of I at I > Ir
Reset ratio, overcurrent > 95% -

Trip time, pickup overcurrent at 0 to 2 x Min. = 15 ms -
Iset
Max. = 30 ms
Reset time, pickup overcurrent at 2 to 0 Min. = 15 ms -
x Iset
Max. = 30 ms
Trip time, pickup overcurrent at 0 to 10 Min. = 5 ms -
x Iset Max. = 20 ms
Reset time, pickup overcurrent at 10 to Min. = 20 ms -

Independent time delay to trip at 0 to 2 (0.00 - 6000.00) s ±0.2% or ±35 ms whichever is

x Iset greater
Inverse time characteristics, 13 curve types See tables 1135 and 1137
see tables 1135 and 1137
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Minimum trip time for inverse time (0.00 - 60.00) s ±0.2% or ±35 ms whichever is
characteristics greater
High voltage limit, voltage dependent (30.0 - 100.0)% of VBase ±1.0% of Vr
operation
Pickup undervoltage (2.0 - 100.0)% of VBase ±0.5% of Vr

Trip time pickup undervoltage at 2 to 0 Min. = 15 ms -
x Vset
Max. = 30 ms
Reset time pickup undervoltage at 0 to Min. = 15 ms -
2 x Vset
Max. = 30 ms
Independent time delay to trip, (0.00 - 6000.00) s ±0.2% or ±35 ms whichever is
undervoltage at 2 to 0 x Vset greater
Internal low voltage blocking (0.0 - 5.0)% of VBase ±0.25% of Vn
Overcurrent: -
Critical impulse time 10 ms typically at 0 to 2 x Iset
Impulse margin time 15 ms typically
Undervoltage: -
Critical impulse time 10ms typically at 2 to 0 x Vset
Impulse margin time 15 ms typically
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Section 9 Voltage protection
9.1 Two step undervoltage protection UV2PTUV (27) IP14544-1 v3
M16876-1 v6

Two step undervoltage protection UV2PTUV 27
3U<
V2 EN-US
SYMBOL-R-2U-GREATER-THAN
Undervoltages can occur in the power system during faults or abnormal conditions. Two step
undervoltage protection (UV2PTUV, 27) function can be used to open circuit breakers to prepare
for system restoration at power outages or as long-time delayed back-up to primary protection.
UV2PTUV (27) has two voltage steps, each with inverse or definite time delay.
UV2PTUV (27) has a high reset ratio to allow settings close to system service voltage.
UV2PTUV (27)
V3P* TRIP
BLOCK TRST1
BLKTR1 TRST1_A
BLK1 TRST1_B
BLKTR2 TRST1_C
BLK2 TRST2
TRST2_A
TRST2_B
TRST2_C
PICKUP
PU_ST1
PU_ST1_A
PU_ST1_B
PU_ST1_C
PU_ST2
PU_ST2_A
PU_ST2_B
PU_ST2_C
Figure 318: UV2PTUV (27) function block
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9.1.4 Signals
Table 345: UV2PTUV (27) Input signals

V3P GROUP - Three phase voltages
SIGNAL
BLKTR1 BOOLEAN 0 Block of trip signal, step 1
BLK1 BOOLEAN 0 Block of step 1
Table 346: UV2PTUV (27) Output signals

TRIP BOOLEAN Trip
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9.1.5 Settings
Table 347: UV2PTUV (27) Group settings (basic)

Enabled
OperationStep1 Disabled - - Enabled Enable execution of step 1
Enabled
Characterist1 Definite time - - Definite time Selection of time delay curve type for step
Inverse curve A 1
Inverse curve B
Prog. inv. curve
OpMode1 1 out of 3 - - 1 out of 3 Number of phases required for op (1 of 3, 2
2 out of 3 of 3, 3 of 3) from step 1
3 out of 3
Pickup1 1.0 - 100.0 %VB 0.1 70.0 Voltage pickup value (Definite-Time &
Inverse-Time curve) in % of VBase, step 1
t1 0.00 - 6000.00 s 0.01 5.00 Definitive time delay of step 1
for step 1
delay for step 1
IntBlkSel1 Disabled - - Disabled Internal (low level) blocking mode, step 1
Block of trip
Block all
IntBlkStVal1 1 - 50 %VB 1 20 Voltage setting for internal blocking in %
of VBase, step 1
tBlkUV1 0.000 - 60.000 s 0.001 0.000 Time delay of internal (low level) blocking
for step 1
HystAbs1 0.0 - 50.0 %VB 0.1 0.5 Absolute hysteresis in % of VBase, step 1
Enabled
Inverse curve A 2
Inverse curve B
Prog. inv. curve
3 out of 3
for step 2
for step 2
IntBlkSel2 Disabled - - Disabled Internal (low level) blocking mode, step 2
Block of trip
Block all
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IntBlkStVal2 1 - 50 %VB 1 20 Voltage setting for internal blocking in %
of VBase, step 2
tBlkUV2 0.000 - 60.000 s 0.001 0.000 Time delay of internal (low level) blocking
for step 2
Table 348: UV2PTUV (27) Group settings (advanced)

tReset1 0.000 - 60.000 s 0.001 0.025 Reset time delay used in IEC Definite Time
curve step 1
ResetTypeCrv1 Instantaneous - - Instantaneous Selection of used IDMT reset curve type for
Frozen timer step 1
Linearly
decreased
tIReset1 0.000 - 60.000 s 0.001 0.025 Time delay in Inverse-Time reset (s), step 1
ACrv1 0.005 - 200.000 - 0.001 1.000 Parameter A for customer programmable
curve for step 1
BCrv1 0.50 - 100.00 - 0.01 1.00 Parameter B for customer programmable
curve for step 1
CCrv1 0.0 - 1.0 - 0.1 0.0 Parameter C for customer programmable
curve for step 1
DCrv1 0.000 - 60.000 - 0.001 0.000 Parameter D for customer programmable
curve for step 1
PCrv1 0.000 - 3.000 - 0.001 1.000 Parameter P for customer programmable
curve for step 1
CrvSat1 0 - 100 % 1 0 Tuning param for prog. under voltage
Inverse-Time curve, step 1
curve step 2
ResetTypeCrv2 Instantaneous - - Instantaneous Selection of Time Delay reset curve for
Frozen timer step 2
Linearly
decreased
curve for step 2
curve for step 2
curve for step 2
curve for step 2
curve for step 2
CrvSat2 0 - 100 % 1 0 Tuning param for prog. under voltage
Inverse-Time curve, step 2
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Table 349: UV2PTUV (27) Non group settings (basic)

ConnType PhN DFT - - PhN DFT Group selector for connection type
PhPh RMS
PhN RMS
PhPh DFT
groups

Table 350: UV2PTUV (27) Monitored data

Two-step undervoltage protection (UV2PTUV ,27) is used to detect low power system voltage.
UV2PTUV (27) has two voltage measuring steps with separate time delays. If one, two or three
phase voltages decrease below the set value, a corresponding PICKUP signal is generated.
UV2PTUV (27) can be set to PICKUP/TRIP based on 1 out of 3, 2 out of 3 or 3 out of 3 of the
measured voltages, being below the set point. If the voltage remains below the set value for a time
period corresponding to the chosen time delay, the corresponding trip signal is issued. To avoid
an unwanted trip due to disconnection of the related high voltage equipment, a voltage controlled
blocking of the function is available, that is, if the voltage is lower than the set blocking level the
function is blocked and no PICKUP or TRIP signal is generated.The time delay characteristic is
individually chosen for each step and can be either definite time delay or inverse time delay.
UV2PTUV (27) can be set to measure phase-to-ground fundamental value, phase-to-phase

fundamental value, phase-to-ground true RMS value or phase-to-phase true RMS value. The choice
of the measuring is done by the parameter ConnType. The voltage related settings are made in
percent of base voltage which is set in kV phase-to-phase voltage. This means operation for
phase-to-ground voltage under:
Vpickup < (%) ×VBase(kV )

3
and operation for phase-to-phase voltage under:
Vpickup < (%) × VBase(kV)

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When phase-to-ground voltage measurement is selected the function

automatically introduces division of the base value by the square root of three.
9.1.7.1 Measurement principle M15326-6 v6
Depending on the set ConnType value, UV2PTUV (27) measures phase-to-ground or phase-to-
phase voltages and compare against set values, Pickup1 and Pickup2. The parameters OpMode1
and OpMode2 influence the requirements to activate the PICKUP outputs. Either 1 out of 3, 2 out
of 3, or 3 out of 3 measured voltages have to be lower than the corresponding set point to issue
the corresponding PICKUP signal.
To avoid oscillations of the output PICKUP signal, a hysteresis has been included.
9.1.7.2 Time delay M15326-10 v12
The time delay for the two steps can be either definite time delay (DT) or inverse time
undervoltage (TUV). For the inverse time delay three different modes are available:
• inverse curve A
• inverse curve B
• customer programmable inverse curve
The type A curve is described as:
TD
t=
Vpickup < -V
Vpickup <
where:
Vpickup< Set value for step 1 and step 2
V Measured voltage
The type B curve is described as:
TD × 480
t= 2.0
+ 0.055
æ Vpickup < -V ö
ç 32 × - 0.5 ÷
è Vpickup < ø
The customer programmable curve can be created as:
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Technical manual
Voltage protection
é ù
ê ú
TD × A
t=ê ú+D
ê æ Vpickup < -V ö ú
P
êç B × -C÷ ú
ëè Vpickup ø û
When the denominator in the expression is equal to zero the time delay will be infinity. There will
be an undesired discontinuity. Therefore a tuning parameter CrvSatn is set to compensate for this
phenomenon. In the voltage interval Vpickup< down to Vpickup< · (1.0 – CrvSatn/100) the used
voltage will be: Vpickup< · (1.0 – CrvSatn/100). If the programmable curve is used this parameter
must be calculated so that:
CrvSatn
B× -C > 0
100
The lowest voltage is always used for the inverse time delay integration. The details of the
different inverse time characteristics are shown in section "Inverse characteristics".
Voltage
VA
VB
VC
IDMT Voltage
Time
Figure 319: Voltage used for the inverse time characteristic integration
Trip signal issuing requires that the undervoltage condition continues for at least the user set
time delay. This time delay is set by the parameter t1 and t2 for definite time mode (DT) and by
some special voltage level dependent time curves for the inverse time mode (TUV). If the pickup
condition, with respect to the measured voltage, ceases during the delay time, and is not fulfilled
again within a user-defined reset time (tReset1 and tReset2 for the definite time and tIReset1 and
tIReset2 pickup for the inverse time) the corresponding pickup output is reset. After leaving the
hysteresis area, the pickup condition must be fulfilled again and it is not sufficient for the signal to
only return back to the hysteresis area. For the undervoltage function the TUV reset time is
constant and does not depend on the voltage fluctuations during the drop-off period. However,
there are three ways to reset the timer: the timer is reset instantaneously, the timer value is frozen
during the reset time, or the timer value is linearly decreased during the reset time. See figure 320
and figure 321.
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tIReset1
Voltage Measured
PICKUP Voltage
HystAbs1
TRIP
PICKUP1
Time
PICKUP
TRIP
Time
Integrator Frozen Timer
Time
Linearly
Instantaneous
decreased
ANSI055000010‐4‐en.vsdx
Figure 320: Voltage profile not causing a reset of the pickup signal for step 1, and inverse time delay at
different reset types
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Voltage tIReset1
PICKUP
PICKUP
HystAbs1 Measured Voltage
TRIP
PICKUP 1
Time
PICKUP t
TRIP
Time
Time
Linearly
Instantaneous
decreased ANSI05000011-3-en.vsdx
Figure 321: Voltage profile causing a reset of the pickup signal for step 1, and inverse time delay at different
reset types
Definite timer delay
When definite time delay is selected the function will trip as shown in figure 322. Detailed
information about individual stage reset/operation behavior is shown in figure 323 and figure 324
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Technical manual
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respectively. Note that by setting tResetn = 0.0s, instantaneous reset of the definite time delayed
stage is ensured.
PU_ST1
V
a
a<b 0 t1 TRST1
Pickup1
b R tReset1 0
AND
Figure 322: Logic diagram for step 1, DT operation
Pickup1
PU_ST1
TRST1
tReset1
t1
Figure 323: Example for Definite Time Delay stage1 reset
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Pickup1
PU_ST1
TRST1
tReset1
t1
Figure 324: Example for Definite Time Delay stage1 operation
9.1.7.3 Blocking M15326-20 v7
It is possible to block Two step undervoltage protection UV2PTUV (27) partially or completely, by
binary input signals or by parameter settings, where:
BLOCK: blocks all outputs

BLKTR1: blocks all trip outputs of step 1
BLK1: blocks all pickup and trip outputs related to step 1
If the measured voltage level decreases below the setting of IntBlkStVal1, either the trip output of
step 1, or both the trip and the PICKUP outputs of step 1, are blocked. The characteristic of the
blocking is set by the IntBlkSel1 parameter. This internal blocking can also be set to Disabled
resulting in no voltage based blocking. Corresponding settings and functionality are valid also for
step 2.
In case of disconnection of the high voltage component the measured voltage will get very low.
The event will PICKUP both the under voltage function and the blocking function, as seen in figure
325. The delay of the blocking function must be set less than the time delay of under voltage
function.
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Technical manual
Voltage protection
V Disconnection
Normal voltage
Pickup1
Pickup2
tBlkUV1 <
t1,t1Min
IntBlkStVal1
tBlkUV2 <
t2,t2Min
IntBlkStVal2
Time
Block step 1
Block step 2
en05000466_ansi.vsd
Figure 325: Blocking function
9.1.7.4 Design M15326-35 v7
The voltage measuring elements continuously measure the three phase-to-neutral voltages or the
three phase-to-phase voltages. Recursive fourier filters or true RMS filters of input voltage signals
are used. The voltages are individually compared to the set value, and the lowest voltage is used
for the inverse time characteristic integration. A special logic is included to achieve the 1 out of 3, 2
out of 3 and 3 out of 3 criteria to fulfill the PICKUP condition. The design of Two step undervoltage
protection UV2PTUV (27) is schematically shown in Figure 326.
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VA Comparator PU_ST1_A
VA < V1< Voltage Phase Phase 1
Selector
PU_ST1_B
VB Comparator OpMode1 Phase 2
VB < V1< 1 out of 3
2 out of 3 Pickup PU_ST1_C
3 out of 3 Phase 3 t1
VC Comparator t1Reset
VC < V1< IntBlkStVal1 & PU_ST1
Trip OR
Output
PICKUP Logic TRST1_A
Step 1 TRST1_B
Time integrator
tIReset1 TRIP
MinVoltSelector
ResetTypeCrv1 TRST1_C
TRST1
OR
Comparator PU_ST2_A
VA < V2< Voltage Phase Phase 1
Selector
PU_ST2_B
Comparator OpMode2 Phase 2
VB < V2< 1 out of 3 Pickup
2 out of 3 t2 PU_ST2_C
3 out of 3 Phase 3 t2Reset
Comparator IntBlkStVal2 &
VC < V2< Trip PU_ST2
Output OR
Logic
PICKUP TRST2_A
Step 2
TRST2_B
Time integrator
tIReset2 TRIP
MinVoltSelector
TRST2
OR
PICKUP
OR
TRIP
OR
Figure 326: Schematic design of Two step undervoltage protection UV2PTUV (27)
M13290-1 v14
Table 351: UV2PTUV (27) technical data

Trip voltage, low and high step (1.0–100.0)% of VBase ±0.5% of Vn
Absolute hysteresis (0.0–50.0)% of VBase ±0.5% of Vn
Internal blocking level, step 1 and step (1.0–50.0)% of VBase ±0.5% of Vn

2
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Technical manual
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Inverse time characteristics for step 1 - See table 1147
and step 2, see table 1147
Definite time delay, step 1 at 1.2 to 0 x (0.00-6000.00) s less than 40 ms
Vset
Definite time delay, step 2 at 1.2 to 0 x (0.000-60.000) s less than 40 ms

Vset
Minimum trip time, inverse (0.000–60.000) s ±0.5% or ±40ms whichever is

Trip time, pickup at 2 to 0 x Vset Min. = 15 ms -
Max. = 30 ms
Reset time, pickup at 0 to 2 x Vset Min. = 15 ms -
Max. = 30 ms
Trip time, pickup at 1.2 to 0 x Vset Min. = 5 ms -
Max. = 25 ms
Reset time, pickup at 0 to 1.2 x Vset Min. = 15 ms -
Max. = 35 ms
Critical impulse time 5 ms typically at 1.2 to 0 x Vset -
9.2 Two step overvoltage protection OV2PTOV (59) IP14545-1 v3
M17002-1 v7

Two step overvoltage protection OV2PTOV 59
3U>
SYMBOL-C-2U-SMALLER-THAN V2 EN-US
9.2.2 Functionality OV2PTOV M13798-3 v14
Overvoltages may occur in the power system during abnormal conditions such as sudden power
loss, tap changer regulating failures, and open line ends on long lines.
Two step overvoltage protection (OV2PTOV, 59) function can be used to detect open line ends,
normally then combined with a directional reactive over-power function to supervise the system
voltage. When triggered, the function will cause an alarm, switch in reactors, or switch out
capacitor banks.
OV2PTOV (59) has two voltage steps, each of them with inverse or definite time delayed.
OV2PTOV (59) has a high reset ratio to allow settings close to system service voltage.
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OV2PTOV (59)
V3P* TRIP
BLOCK TRST1
BLKTR1 TRST1_A
BLK1 TRST1_B
BLKTR2 TRST1_C
BLK2 TRST2
TRST2_A
TRST2_B
TRST2_C
PICKUP
PU_ST1
PU_ST1_A
PU_ST1_B
PU_ST1_C
PU_ST2
PU_ST2_A
PU_ST2_B
PU_ST2_C
Figure 327: OV2PTOV (59) function block
9.2.4 Signals
Table 352: OV2PTOV (59) Input signals

V3P GROUP - Group signal for three phase voltage input
SIGNAL
Table 353: OV2PTOV (59) Output signals

TRIP BOOLEAN Trip
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9.2.5 Settings
Table 354: OV2PTOV (59) Group settings (basic)

Enabled
Enabled
Inverse curve A 1
Inverse curve B
Inverse curve C
Prog. inv. curve
3 out of 3
for step 1
delay for step 1
Enabled
Inverse curve A 2
Inverse curve B
Inverse curve C
Prog. inv. curve
3 out of 3
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for step 2
for step 2
Table 355: OV2PTOV (59) Group settings (advanced)

curve step 1
Frozen timer step 1
Linearly
decreased
curve for step 1
curve for step 1
curve for step 1
curve for step 1
curve for step 1
CrvSat1 0 - 100 % 1 0 Tuning param for programmable over
voltage TOV curve, step 1
curve step 2
Frozen timer step 2
Linearly
decreased
curve for step 2
curve for step 2
curve for step 2
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curve for step 2
curve for step 2
Table 356: OV2PTOV (59) Non group settings (basic)

ConnType PhN DFT - - PhN DFT Group selector for connection type
PhPh DFT
PhN RMS
PhPh RMS
groups

Table 357: OV2PTOV (59) Monitored data

Two step overvoltage protection OV2PTOV (59) is used to detect high power system voltage.
OV2PTOV (59) has two steps with separate time delays. If one-, two- or three-phase voltages
increase above the set value, a corresponding PICKUP signal is issued. OV2PTOV (59) can be set to
PICKUP/TRIP, based on 1 out of 3, 2 out of 3 or 3 out of 3 of the measured voltages, being above
the set point. If the voltage remains above the set value for a time period corresponding to the
chosen time delay, the corresponding trip signal is issued.
The time delay characteristic is individually chosen for the two steps, and can be either definite
time or inverse time delayed.
The voltage related settings are made in percent of the global set base voltage VBase, which is set
in kV, phase-to-phase.
OV2PTOV (59) can be set to measure phase-to-ground fundamental value, phase-to-phase

fundamental value, phase-to-ground RMS value or phase-to-phase RMS value. The choice of
measuring is done by the parameter ConnType.
The setting of the analog inputs are given as primary phase-to-ground or phase-to-phase voltage.
OV2PTOV (59) will trip if the voltage gets higher than the set percentage of the set base voltage
VBase. This means operation for phase-to-ground voltage over:
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Vpickup > (%) ⋅ VBase(kV ) / 3

and operation for phase-to-phase voltage over:
Vpickup > (%) × VBase(kV)

When phase-to-ground voltage measurement is selected the function

automatically introduces division of the base value by the square root of three.
All the three voltages are measured continuously, and compared with the set values, Pickup1 for
Step 1 and Pickup2 for Step 2. The parameters OpMode1 and OpMode2 influence the requirements
to activate the PICKUP outputs. Either 1 out of 3, 2 out of 3 or 3 out of 3 measured voltages have to
be higher than the corresponding set point to issue the corresponding PICKUP signal.
To avoid oscillations of the output PICKUP signal, a hysteresis is included.
9.2.7.2 Time delay M15330-10 v9
The time delay for the two steps can be either definite time delay (DT) or inverse time delay (TOV).
For the inverse time delay four different modes are available:
• inverse curve A
• inverse curve B
• inverse curve C
TD
t=
V − Vpickup >
Vpickup >
where:
Vpickup> Set value for step 1 and step 2
V Measured voltage
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TD ⋅ 480
t= + 0.035
V − Vpickup >
32 ⋅ − 0.5
Vpickup >
The type C curve is described as:
TD ⋅ 480
t= + 0.035
V − Vpickup >
32 ⋅ − 0.5
Vpickup >
The customer programmable curve is defined by the below equation, where A, B, C, D, k and p are
settings:
TD × A
t= P
+D
æ V - Vpickup ö
çB× -C÷
è Vpickup ø
be an undesired discontinuity. Therefore, a tuning parameter CrvSatn is set to compensate for this
phenomenon. In the voltage interval Vpickup up to Vpickup · (1.0 + CrvSatn/100) the used voltage
will be: Vpickup · (1.0 + CrvSatn/100). If the programmable curve is used this parameter must be
calculated so that:
CrvSatn
B× -C > 0
100
The highest phase (or phase-to-phase) voltage is always used for the inverse time delay
integration, see figure 328. The details of the different inverse time characteristics are shown in
section "Inverse characteristics".
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Voltage
IDMT Voltage
VA
VB
VC
Time
Figure 328: Voltage used for the inverse time characteristic integration
Operation of the trip signal requires that the overvoltage condition continues for at least the user
set time delay. This time delay is set by the parameter t1 and t2 for definite time mode (DT) and by
selected voltage level dependent time curves for the inverse time mode (TOV). If the PICKUP
condition, with respect to the measured voltage ceases during the delay time, and is not fulfilled
again within a user defined reset time (tReset1 and tReset2 for the definite time and tIReset1 and
tIReset2 for the inverse time) the corresponding PICKUP output is reset, after that the defined
reset time has elapsed. Here it should be noted that after leaving the hysteresis area, the PICKUP
condition must be fulfilled again and it is not sufficient for the signal to only return back to the
hysteresis area. The hysteresis value for each step is settable HystAbsn (where n means either 1 or
2 respectively) to allow a high and accurate reset of the function. For OV2PTOV (59) the TOV reset
time is constant and does not depend on the voltage fluctuations during the drop-off period.
However, there are three ways to reset the timer: either the timer is reset instantaneously, or the
timer value is frozen during the reset time, or the timer value is linearly decreased during the reset
time.
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tIReset1
tIReset1
Voltage
PICKUP
TRIP
PU_Overvolt1
HystAbs1
Measured
Voltage
Time
PICKUP t
TRIP
Time Linearly
Integrator
decreased
Frozen Timer
t
Time
Instantaneous
Figure 329: Voltage profile not causing a reset of the PICKUP signal for step 1, and inverse time delay at
different reset types
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tIReset1
Voltage
PICKUP TRIP
PICKUP
HystAbs1
Pickup1
Measured
Voltage
Time
PICKUP t
TRIP
Time
Time
Instantaneous Linearly decreased

Figure 330: Voltage profile causing a reset of the PICKUP signal for step 1, and inverse time delay at different
reset types
Definite time delay
When definite time delay is selected, the function will trip as shown in figure 331. Detailed
respectively. Note that by setting tResetn = 0.0s (where n means either 1 or 2 respectively),
instantaneous reset of the definite time delayed stage is ensured.
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PU_ST1
V tReset1 t1
a
a>b t t
TRST1
Vpickup>
b AND
OFF ON
Delay Delay
Figure 331: Detailed logic diagram for step 1, definite time delay, DT operation
Pickup1
PICKUP
TRIP
tReset1
t1
Figure 332: Example for step 1, Definite Time Delay stage 1 reset
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Pickup1
PICKUP
TRIP
tReset1
t1
Figure 333: Example for Definite Time Delay stage 1 operation
9.2.7.3 Blocking M15330-20 v7
It is possible to block Two step overvoltage protection OV2PTOV, (59) partially or completely, by
binary input signals where:

9.2.7.4 Design M15330-34 v7
The voltage measuring elements continuously measure the three phase-to-ground voltages or the
three phase-to-phase voltages. Recursive Fourier filters or true RMS filters of input voltage signals
are used. The phase voltages are individually compared to the set value, and the highest voltage is
used for the inverse time characteristic integration. A special logic is included to achieve the 1 out
of 3, 2 out of 3 or 3 out of 3 criteria to fulfill the PICKUP condition. The design of Two step
overvoltage protection (OV2PTOV, 59) is schematically described in figure 334.
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VA Comparator PU_ST1_A
VA > Phase A
Pickup 1 Voltage Phase
Selector PU_ST1_B
VB Comparator
OpMode1 Phase B
VB >
Pickup 1 1 out of 3 Pickup
2 out of 3 t1 PU_ ST1_C
3 out of 3 Phase C
VC Comparator t1Reset
VC > &
Pickup 1 Phase C Trip PU_ST1
OR
Output
Logic
PICKUP TRST1-A
Step1
TRST1_B
Time integrator TRIP
MaxVoltSelect
tIReset1
TRST1
OR
Comparator
VA > PU_ST2_A
Pickup 2 Voltage Phase Phase A
Selector
PU_ST2_B
Comparator OpMode2 Phase B
VB >
Pickup 2 1 out of 3
2 out of 3 PU_ST2_C
3 out of 3 Pickup
Phase C
Comparator t2
VC > t2Reset
Pickup 2 & PU_ST2
OR
Trip
Output
PICKUP Logic TRST2-A
Step 2 TRST2-B
Time integrator TRIP
MaxVoltSelect tIReset2
ResetTypeCrv2 TRST2-C
TRST2
OR
OR PICKUP
TRIP
OR
_ .
Figure 334: Schematic design of Two step overvoltage protection OV2PTOV (59)
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M13304-1 v12
Table 358: OV2PTOV (59) technical data

Trip voltage, step 1 and 2 (1.0-200.0)% of VBase ±0.5% of Vn at V ≤ Vn
±0.5% of V at V > Vn
Absolute hysteresis (0.0–50.0)% of VBase ±0.5% of Vn at V ≤ Vn

Inverse time characteristics for - See table 1146

steps 1 and 2, see table 1146
Definite time delay, low step (step (0.00 - 6000.00) s ±0.2% or ±45 ms whichever is
1) at 0 to 1.2 x Vset greater
Definite time delay, high step (0.000-60.000) s ±0.2% or ±45 ms whichever is

(step 2) at 0 to 1.2 x Vset greater
Minimum trip time, Inverse (0.000-60.000) s ±0.2% or ±45 ms whichever is

Max. = 30 ms
Max. = 30 ms
Trip time, pickup at 0 to 1.2 x Vset Min. = 20 ms -
Max. = 35 ms
Reset time, , pickup at 1.2 to 0 x Min. = 5 ms -
Vset Max. = 25 ms
Critical impulse time 10 ms typically at 0 to 2 x Vset -
9.3 Two step residual overvoltage protection ROV2PTOV

(59N) IP14546-1 v4
SEMOD54295-2 v5

Two step residual overvoltage ROV2PTOV 59N
protection
3U0
TRV V1 EN-US
Residual voltages may occur in the power system during ground faults.
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Two step residual overvoltage protection ROV2PTOV (59N) function calculates the residual voltage
from the three-phase voltage input transformers or measures it from a single voltage input
transformer fed from a broken delta or neutral point voltage transformer.
ROV2PTOV (59N) has two voltage steps, each with inverse or definite time delay.
Reset delay ensures operation for intermittent ground faults.
ROV2PTOV (59N)
V3P* TRIP
BLOCK TRST1
BLKTR1 TRST2
BLK1 PICKUP
BLKTR2 PU_ST1
BLK2 PU_ST2
Figure 335: ROV2PTOV (59N) function block
9.3.4 Signals
Table 359: ROV2PTOV (59N) Input signals

V3P GROUP - Three phase voltages
SIGNAL
Table 360: ROV2PTOV (59N) Output signals

TRIP BOOLEAN Trip
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9.3.5 Settings
Table 361: ROV2PTOV (59N) Group settings (basic)

Enabled
Enabled
Inverse curve A 1
Inverse curve B
Inverse curve C
Prog. inv. curve
Pickup1 1.0 - 200.0 %VB 0.1 30.0 Voltage setting/pickup value (DT & TOV),
step 1 in % of VBase
for step 1
delay for step 1
Enabled
Inverse curve A 2
Inverse curve B
Inverse curve C
Prog. inv. curve
Pickup2 1.0 - 100.0 %VB 0.1 45.0 Voltage setting/pickup value (DT & TOV),
step 2 in % of VBase
for step 2
for step 2
Table 362: ROV2PTOV (59N) Group settings (advanced)

curve step 1
Frozen timer step 1
Linearly
decreased
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curve for step 1
curve for step 1
curve for step 1
curve for step 1
curve for step 1
tReset2 0.000 - 60.000 s 0.001 0.025 Time delay in Definite-Time reset (s), step
2
Frozen timer step 2
Linearly
decreased
curve for step 2
curve for step 2
curve for step 2
curve for step 2
curve for step 2
Table 363: ROV2PTOV (59N) Non group settings (basic)

groups

Table 364: ROV2PTOV (59N) Monitored data

VLevel REAL - kV Magnitude of measured voltage
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Two step residual overvoltage protection ROV2PTOV (59N) is used to detect high single-phase
voltage, such as high residual voltage, also called 3V0. The residual voltage can be measured
directly from a voltage transformer in the neutral of a power transformer or from a three-phase
voltage transformer, where the secondary windings are connected in an open delta. Another
possibility is to measure the three-phase voltages and internally in the IED calculate the
corresponding residual voltage and connect this calculated residual voltage to ROV2PTOV (59N).
ROV2PTOV (59N) has two steps with separate time delays. If the single-phase (residual) voltage
remains above the set value for a time period corresponding to the chosen time delay, the
corresponding TRIP signal is issued.
The time delay characteristic is individually chosen for the two steps and can be either, definite
time delay or inverse time delay.
The voltage related settings are made in percent of the base voltage, which is set in kV, phase-
phase.
The residual voltage is measured continuously, and compared with the set values, Pickup1 and
Pickup2.
9.3.7.2 Time delay M15331-10 v9
The time delay for the two steps can be either definite time delay (DT) or inverse time delay (TOV).
For the inverse time delay four different modes are available:
• inverse curve A
• inverse curve B
• inverse curve C
TD
t=
æ V - Vpickup > ö
ç ÷
è Vpickup > ø
where:
Vn> Set value for step 1 and step 2
V Measured voltage
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TD × 480
t= 2.0
- 0.035
æ V - Vpickup > ö
ç 32 × - 0.5 ÷
è Vpickup > ø
The type C curve is described as:
TD × 480
t= 3.0
+ 0.035
æ V - Vpickup > ö
ç 32 × - 0.5 ÷
è Vpickup > ø
The customer programmable curve can be created as:
TD × A
t= P
+D
æ V - Vpickup ö
çB× -C÷
è Vpickup ø
be an undesired discontinuity. Therefore a tuning parameter CrvSatn is set to compensate for this
phenomenon. In the voltage interval Vpickup up to Vpickup · (1.0 + CrvSatn/100) the used voltage
will be: Vpickup · (1.0 + CrvSatn/100). If the programmable curve is used this parameter must be
calculated so that:
CrvSatn
B× -C > 0
100
The details of the different inverse time characteristics are shown in section "Inverse
characteristics".
TRIP signal issuing requires that the residual overvoltage condition continues for at least the user
set time delay. This time delay is set by the parameter t1 and t2 for definite time mode (DT) and by
some special voltage level dependent time curves for the inverse time mode (TOV).
If the PICKUP condition, with respect to the measured voltage ceases during the delay time, and is
not fulfilled again within a user defined reset time (tReset1 and tReset2 for the definite time and
tIReset1 and tIReset2 for the inverse time) the corresponding PICKUP output is reset, after the
defined reset time has elapsed.
Here it should be noted that after leaving the hysteresis area, the PICKUP condition must be
fulfilled again and it is not sufficient for the signal to only return back to the hysteresis area. Also
notice that for the overvoltage function TOV reset time is constant and does not depend on the
voltage fluctuations during the drop-off period. However, there are three ways to reset the timer,
either the timer is reset instantaneously, or the timer value is frozen during the reset time, or the
timer value is linearly decreased during the reset time. See figure 336 and figure 337.
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tIReset1
tIReset1
Voltage
PICKUP
TRIP
PU_Overvolt1
HystAbs1
Measured
Voltage
Time
PICKUP t
TRIP
Time Linearly
Integrator
decreased
Frozen Timer
t
Time
Instantaneous
Figure 336: Voltage profile not causing a reset of the PICKUP signal for step 1, and inverse time delay
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tIReset1
Voltage
PICKUP TRIP
PICKUP
HystAbs1
Pickup1
Measured
Voltage
Time
PICKUP t
TRIP
Time
Time
Instantaneous Linearly decreased

Figure 337: Voltage profile causing a reset of the PICKUP signal for step 1, and inverse time delay
Definite timer delay
When definite time delay is selected, the function will trip as shown in figure 338. Detailed
respectively. Note that by setting tResetn = 0.0s, instantaneous reset of the definite time delayed
stage is ensured.
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PU_ST1
V tReset1 t1
a
a>b t t
TRST1
Vpickup>
b AND
OFF ON
Delay Delay
Figure 338: Detailed logic diagram for step 1, Definite time delay, DT operation
Pickup1
PICKUP
TRIP
tReset1
t1
Figure 339: Example for Definite Time Delay stage 1 reset
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Pickup1
PICKUP
TRIP
tReset1
t1
Figure 340: Example for Definite Time Delay stage 1 operation
9.3.7.3 Blocking M15331-18 v6
It is possible to block Two step residual overvoltage protection ROV2PTOV (59N) partially or
completely, by binary input signals where:

BLK2: blocks all pickup and trip inputs related to step 2
9.3.7.4 Design M15331-32 v6
The voltage measuring elements continuously measure the residual voltage. Recursive Fourier
filters filter the input voltage signal for the rated frequency. The single input voltage is compared
to the set value, and is also used for the inverse time characteristic integration. The design of Two
step residual overvoltage protection (ROV2PTOV, 59N) is schematically described in figure 341.
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Comparator Phase 1
VN PU_ ST1
VN >
Pickup 1
Pickup TRST1
PICKUP t1
tReset1
&
Trip
Time integrator Output
tIReset1 TRIP Logic
ResetTypeCrv1 Step 1
Comparator PU_ST2
Phase 1
VN >
TRST2
Pickup2 Pickup
t2
PICKUP tReset2
& PICKUP
Trip OR
Time integrator Output
tIReset2 TRIP Logic
ResetTypeCrv2 Step 2 TRIP
OR
Figure 341: Schematic design of Two step residual overvoltage protection ROV2PTOV (59N)

M13317-2 v12
Table 365: ROV2PTOV (59N) technical data

Trip voltage, step 1 and step 2 (1.0-200.0)% of VBase ± 0.5% of Vn at V < Vn
± 0.5% of Vn at V > Vn
Absolute hysteresis (0.0–50.0)% of VBase ± 0.5% of Vn at V < Vn

± 0.5% of Vn at V > Vn
Inverse time characteristics for low - See table 1148

and high step, see table 1148
Definite time delay low step (step 1) (0.00–6000.00) s ± 0.2% or ± 45 ms whichever is
at 0 to 1.2 x Vset greater
Definite time delay high step (step (0.000–60.000) s ± 0.2% or ± 45 ms whichever is

2) at 0 to 1.2 x Vset greater
Minimum trip time (0.000-60.000) s ± 0.2% or ± 45 ms whichever is

greater
Max. = 30 ms
Max. = 30 ms
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Trip time, pickup at 0 to 1.2 x Vset Min. = 20 ms -
Max. = 35 ms
Reset time, pickup at 1.2 to 0 x Vset Min. = 5 ms -
Max. = 25 ms
Critical impulse time 10 ms typically at 0 to 2 x Vset -
9.4 Overexcitation protection OEXPVPH (24) IP14547-1 v3
M14867-1 v3

Overexcitation protection OEXPVPH 24
U/f >
SYMBOL-Q V1 EN-US
When the laminated core of a power transformer or generator is subjected to a magnetic flux
density beyond its design limits, stray flux will flow into non-laminated components that are not
designed to carry flux. This will cause eddy currents to flow. These eddy currents can cause
excessive heating and severe damage to insulation and adjacent parts in a relatively short time.
The function has settable inverse operating curves and independent alarm stages.
OEXPVPH (24)
I3P* TRIP
V3P* PICKUP
BLOCK ALARM
RESET
Figure 342: OEXPVPH (24) function block
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9.4.4 Signals
Table 366: OEXPVPH (24) Input signals

I3P GROUP - Current connection
SIGNAL
V3P GROUP - Voltage connection
SIGNAL
RESET BOOLEAN 0 Reset operation
Table 367: OEXPVPH (24) Output signals

TRIP BOOLEAN Trip from overexcitation function
PICKUP BOOLEAN Overexcitation above set trip pickup (instantaneous)
ALARM BOOLEAN Overexcitation above set alarm pickup (delayed)
9.4.5 Settings
Table 368: OEXPVPH (24) Group settings (basic)

Enabled
Pickup1 100.0 - 180.0 %VB/f 0.1 110.0 Operate level of V/Hz at no load and rated
freq in % of (UBase/frated)
Pickup2 100.0 - 200.0 %VB/f 0.1 140.0 High level of V/Hz above which tMin is
used, in % of (VBase/frated)
XLeakage 0.000 - 200.000 Ohm 0.001 0.000 Winding leakage reactance in primary
ohms
t_TripPulse 0.000 - 60.000 s 0.001 0.100 Length of the pulse for trip signal (in sec)
t_MinTripDelay 0.000 - 60.000 s 0.001 7.000 Minimum trip delay for V/Hz inverse curve,
in sec
t_MaxTripDelay 0.00 - 9000.00 s 0.01 1800.00 Maximum trip delay for V/Hz inverse curve,
in sec
t_CoolingK 0.10 - 9000.00 s 0.01 1200.00 Transformer magnetic core cooling time
constant, in sec
CurveType IEEE - - IEEE Inverse time curve selection, IEEE/Tailor
Tailor made made
TDForIEEECurve 1 - 60 - 1 1 Time multiplier for IEEE inverse type curve
AlarmPickup 50.0 - 120.0 % 0.1 100.0 Alarm pickup level as % of Step1 trip
pickup level
tAlarm 0.00 - 9000.00 s 0.01 5.00 Alarm time delay, in sec
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Table 369: OEXPVPH (24) Group settings (advanced)

t1_UserCurve 0.00 - 9000.00 s 0.01 7200.00 Time delay t1 (longest) for tailor made
curve, in sec
t2_UserCurve 0.00 - 9000.00 s 0.01 3600.00 Time delay t2 for tailor made curve, in sec
t6_UserCurve 0.00 - 9000.00 s 0.01 225.00 Time delay t6 (shortest) for tailor made
curve, in sec
Table 370: OEXPVPH (24) Non group settings (basic)

MeasuredV PosSeq - - AB Selection of measured voltage
AB
BC
CA
MeasuredI AB - - AB Selection of measured current
BC
CA
PosSeq
groups

Table 371: OEXPVPH (24) Monitored data

TMTOTRIP REAL - s Calculated time to trip for overexcitation,
in sec
VPERHZ REAL - V/Hz Voltage to frequency ratio in per-unit
THERMSTA REAL - % Overexcitation thermal status in % of trip
pickup

M5854-3 v8
The importance of Overexcitation protection (OEXPVPH, 24) function is growing as the power
transformers as well as other power system elements today operate near their designated limits
most of the time.
Modern design transformers are more sensitive to overexcitation than earlier types. This is a result
of the more efficient designs and designs which rely on the improvement in the uniformity of the
excitation level of modern systems. If an emergency that causes overexcitation does occur,
transformers may be damaged unless corrective action is taken. Transformer manufacturers
recommend an overexcitation protection as a part of the transformer protection system.
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Overexcitation results from excessive applied voltage, possibly in combination with below-normal
frequency. Such conditions may occur when a transformer unit is loaded, but are more likely to
arise when the transformer is unloaded, or when loss of load occurs. Transformers directly
connected to generators are in particular danger to experience overexcitation conditions. It
follows from the fundamental transformer equation, see equation 167, that the peak flux density
Bmax is directly proportional to induced voltage E, and inversely proportional to frequency f and
turns n.
E = 4.44 × f × n × B max× A
The relative excitation M is therefore according to equation 168.
E f
M ( p.u.) =
( Vr ) ( fn )
Disproportional variations in quantities E and f may give rise to core overfluxing. If the core flux
density Bmax increases to a point above saturation level (typically 1.9 Tesla), the flux will no longer
be contained within the core, but will extend into other (non-laminated) parts of the power
transformer and give rise to eddy current circulations.
Overexcitation will result in:
• overheating of the non-laminated metal parts

• a large increase in magnetizing currents
• an increase in core and winding temperature
• an increase in transformer vibration and noise
Protection against overexcitation is based on calculation of the relative volt per hertz (V/Hz) ratio.
Protection initiates a reduction of excitation, and if this fails, or if this is not possible, the TRIP
signal will disconnect the transformer from the source after a delay ranging from seconds to
minutes, typically 5-10 seconds.
Overexcitation protection may be of particular concern on directly connected generator unit

transformers. Directly connected generator-transformers are subjected to a wide range of
frequencies during the acceleration and deceleration of the turbine. In such cases, OEXPVPH (24)
may trip the field breaker during a start-up of a machine, by means of the overexcitation ALARM
signal. If this is not possible, the power transformer can be disconnected from the source, after a
delay, by the TRIP signal.
The IEC 60076 - 1 standard requires that transformers operate continuously at not more than 10%
above rated voltage at no load, and rated frequency. At no load, the ratio of the actual generator
terminal voltage to the actual frequency should not exceed 1.1 times the ratio of transformer rated
voltage to the rated frequency on a sustained basis, see equation 169.
E Vn
£ 1.1 ×
f fn
or equivalently, with 1.1 · Vn = Pickup1 according to equation 170.
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E Pickup1
£
f fn
where:
Pickup1 is the maximum continuously allowed voltage at no load, and rated frequency.
Pickup1 is a setting parameter. The setting range is 100% to 180%. If the user does not know
exactly what to set, then the default value for Pickup1 = 110 % given by the IEC 60076-1 standard
shall be used.
In OEXPVPH (24), the relative excitation M is expressed according to equation 171.
E f
M ( p.u.) =
Vn fn
It is clear from the above formula that, for an unloaded power transformer, M = 1 for any E and f,
where the ratio E/f is equal to Vn/fn. A power transformer is not overexcited as long as the
relative excitation is M ≤ Pickup1, Pickup1 expressed in % of Vn/fn.
The overexcitation protection algorithm is fed with an input voltage V which is in general not the
induced voltage E from the fundamental transformer equation. For no load condition, these two
voltages are the same, but for a loaded power transformer the internally induced voltage E may be
lower or higher than the voltage V which is measured and fed to OEXPVPH (24), depending on the
direction of the power flow through the power transformer, the power transformer side where
OEXPVPH (24) is applied, and the power transformer leakage reactance of the winding. It is
important to specify in the application configuration on which side of the power transformer
OEXPVPH (24) is placed.
As an example, at a transformer with a 15% short circuit impedance Xsc, the full load, 0.8 power
factor, 105% voltage on the load side, the actual flux level in the transformer core, will not be
significantly different from that at the 110% voltage, no load, rated frequency, provided that the
short circuit impedance X can be equally divided between the primary and the secondary winding:
XLeakage = XLeakage1 = XLeakage2 = Xsc / 2 = 0.075 pu.
OEXPVPH (24) calculates the internal induced voltage E if XLeakage (meaning the leakage
reactance of the winding where OEXPVPH (24) is connected) is known to the user. The assumption
taken for two-winding power transformers that XLeakage = Xsc / 2 is unfortunately most often
not true. For a two-winding power transformer the leakage reactances of the two windings
depend on how the windings are located on the core with respect to each other. In the case of
three-winding power transformers the situation is still more complex. If a user has the knowledge
on the leakage reactance, then it should applied. If a user has no idea about it, XLeakage can be set
to Xc/2. OEXPVPH (24) protection will then take the given measured voltage V, as the induced
voltage E.
It is assumed that overexcitation is a symmetrical phenomenon, caused by events such as loss-of-

load, etc. A high phase-to-ground voltage does not mean overexcitation. For example, in an
ungrounded power system, a single phase-to-ground fault means high voltages of the “healthy”
two phases-to-ground, but no overexcitation on any winding. The phase-to-phase voltages will
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remain essentially unchanged. The important voltage is the voltage between the two ends of each
winding.
9.4.7.1 Measured voltage M5854-39 v8
If one phase-to-phase voltage is available from the side where overexcitation protection is
applied, then Overexcitation protection OEXPVPH (24) shall be set to measure this voltage,
MeasuredV. The particular voltage which is used determines the two currents that must be used.
This must be chosen with the setting MeasuredI.
It is extremely important that MeasuredV and MeasuredI are set to same value.
If, for example, voltage Vab is fed to OEXPVPH(24), then currents Ia, and Ib must be applied. From
these two input currents, current Iab = Ia - Ib is calculated internally by the OEXPVPH (24)
algorithm. The phase-to-phase voltage must be higher than 70% of the rated value, otherwise the
protection algorithm exits without calculating the excitation. ERROR output is set to 1, and the
displayed value of relative excitation V/Hz shows 0.000.
If three phase-to-ground voltages are available from the side where overexcitation is connected,
then OEXPVPH (24) shall be set to measure positive sequence voltage and current. In this case the
positive sequence voltage and the positive sequence current are used by OEXPVPH (24). A check is
made if the positive sequence voltage is higher than 70% of rated phase-to-ground voltage, when
below this value, OEXPVPH (24) exits immediately, and no excitation is calculated. ERROR output is
set to 1, and the displayed value of relative excitation V/Hz shows 0.000.
• OEXPVPH (24) can be connected to any power transformer side, independent from the power
flow.
• The side with a possible load tap changer must not be used.
9.4.7.2 Operate time of the overexcitation protection M5854-52 v8
The operate time of OEXPVPH (24) is a function of the relative overexcitation.
Basically there are two different delay laws available to choose between:
• the so called IEEE law, and

• a tailor-made law.
The so called IEEE law approximates a square law and has been chosen based on analysis of the
various transformers’ overexcitation capability characteristics. They can match the transformer
core capability well.
The square law is according to equation 172.
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0.18 × TD 0.18 × TD
top = 2
= 2
æ M ö overexcitation
ç PUV Hz - 1 ÷
è ø
where:
M the relative excitation
Pickup1 is maximum continuously allowed voltage at no load, and rated frequency, in pu and
TD is time multiplier for inverse time functions, see figure 344.
Parameter TD (“time delay multiplier setting”) selects one delay curve from the family of curves.
The relative excitation M is calculated using equation173
æ Vmeasured ö
ç ÷ Vmeasured frated
M =
è fmeasured ø = ×
æ VBase ö VBase fmeasured
ç ÷
è frated ø
An analog overexcitation relay would have to evaluate the following integral expression, which
means to look for the instant of time t = top according to equation 174.
top
ò ( M ( t ) - Pickup1)
2
dt ³ 0.18 × TD
0
A digital, numerical relay will instead look for the lowest j (that is, j = n) where it becomes true that:
å ( M( j) - PUV / Hz )
2
Dt × ³ 0.18 × TD
j=k
where:
Dt is the time interval between two successive executions of OEXPVPH (24) and
M(j) - Pickup1 is the relative excitation at (time j) in excess of the normal (rated) excitation which is given as
Vn/fn.
As long as M > Pickup1 (that is, overexcitation condition), the above sum can only be larger with
time, and if the overexcitation persists, the protected transformer will be tripped at j = n.
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Inverse delays as per figure 344, can be modified (limited) by two special definite delay settings,
namely t_MaxTripDelay and t_MinTripDelay, see figure 343.
delay in s
t_MaxTrip
Delay
under - inverse delay law

excitation
overexcitation
t_MinTripDelay
0 Mmax – Pickup1 Overexcitation M-Pickup1

M=Pickup1 Mmax Excitation M
Pickup1 Emax E (only if f = fn = const)
ANSI99001067-2-
en.vsd
Figure 343: Restrictions imposed on inverse delays by t_MaxTripDelay and t_MinTripDelay

A definite maximum time, t_MaxTripDelay, can be used to limit the operate time at low degrees of
overexcitation. Inverse delays longer than t_MaxTripDelay will not be allowed. In case the inverse
delay is longer than t_MaxTripDelay, OEXPVPH (24) trips after t_MaxTripDelay seconds.
A definite minimum time, t_MinTripDelay, can be used to limit the operate time at high degrees of
overexcitation. In case the inverse delay is shorter than t_MinTripDelay, OEXPVPH (24) function
trips after t_MinTripDelay seconds. The inverse delay law is not valid for values exceeding Mmax.
The delay will be tMin, irrespective of the overexcitation level, when values exceed Mmax (that is,
M>Pickup1).
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Time (s) IEEE OVEREXCITATION CURVES
1000
100
TD = 60
TD = 20
TD = 10
10 TD = 9
TD = 8
TD = 7
TD = 6
TD = 5
TD = 4
TD = 3
TD = 2
TD = 1
1
1 2 3 4 5 10 20 30 40
OVEREXCITATION IN % (M-Emaxcont)*100)
en01000373_ansi.vsd
Figure 344: Delays inversely proportional to the square of the overexcitation

The critical value of excitation M is determined indirectly via OEXPVPH (24) setting Pickup2.
Pickup2 can be thought of as a no-load voltage at rated frequency, where the inverse law should be
replaced by a short definite delay, t_MinTripDelay. If, for example, Pickup2 = 140 %, then M is
( Pickup2 f )
M= = 1.40
Vn/fn
The Tailor-Made law allows a user to design an arbitrary delay characteristic. In this case the
interval between M = Pickup1, and M = Mmax is automatically divided into five equal subintervals,
with six delays. (settings t1, t2, t3, t4, t5 and t6) as shown in figure 345. These times should be set
so that t1 => t2 => t3 => t4 => t5 => t6.
The lower V/Hz limit is always the set value Pickup1 in %.
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The upper V/Hz limit for the Tailor-Made characteristic is always the greater value among the
following two values in %:
• 1.10 x Pickup1
• Pickup2
The reason is to prevent the loss of accuracy of the Tailor-Made characteristic when small set value
for Pickup2 is used.
delay in s
t_MaxTripDelay
under- t_MinTripDelay
excitation Overexcitation M-E maxcont
0 M max - E maxcont Excitation M
Emaxcont M max
99001068_ansi.vsd
Figure 345: An example of a Tailor-Made delay characteristic

Delays between two consecutive points, for example t3 and t4, are obtained by linear
interpolation.
Should it happen that t_MaxTripDelay be lower than, for example, delays t1, and t2, the actual
delay would be t_MaxTripDelay. Above Mmax, the delay can only be t_MinTripDelay.
9.4.7.3 Cooling M5854-92 v6
Overexcitation protection OEXPVPH (24) is basically a thermal protection; therefore a cooling

process has been introduced. Exponential cooling process is applied. Parameter Setting tool is an
OEXPVPH (24) setting, with a default time constant t_CoolingK of 20 minutes. This means that if
the voltage and frequency return to their previous normal values (no more overexcitation), the
normal temperature is assumed to be reached not before approximately 5 times t_CoolingK
minutes. If an overexcitation condition would return before that, the time to trip will be shorter
than it would be otherwise.
9.4.7.4 Overexcitation protection function measurands M5854-95 v7
A monitored data value, TMTOTRIP, is available on the local HMI and in PCM600. This value is an
estimation of the remaining time to trip (in seconds), if the overexcitation remained on the level it
had when the estimation was done. This information can be useful during small or moderate
overexcitation situations.
If the overexcitation is so low that the valid delay is t_MaxTripDelay, then the estimation of the
remaining time to trip is done against t_MaxTripDelay.
The relative excitation M, shown on the local HMI and in PCM600 has a monitored data value
VPERHZ and is calculated from the expression:
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E f
M ( p.u.) =
Vn fn
If VPERHZ value is less than setting Pickup1 (in %), the power transformer is underexcited. If
VPERHZ is equal to Pickup1 (in %), the excitation is exactly equal to the power transformer
continuous capability. If VPERHZ is higher than Pickup1, the protected power transformer is
overexcited. For example, if VPERHZ = 1.100, while Pickup1 = 110 %, then the power transformer is
exactly on its maximum continuous excitation limit.
The monitored data value THERMSTA shows the thermal status of the protected power
transformer iron core. THERMSTA gives the thermal status in % of the trip value which
corresponds to 100%. THERMSTA should reach 100% at the same time, as TMTOTRIP reaches 0
seconds. If the protected power transformer is then for some reason not switched off, THERMSTA
shall go over 100%.
If the delay as per IEEE law, or Tailor-made Law, is limited by t_MaxTripDelay, and/or
t_MinTripDelay, then the Thermal status will generally not reach 100% at the same time, when
tTRIP reaches 0 seconds. For example, if, at low degrees of overexcitation, the very long delay is
limited by t_MaxTripDelay, then the OEXPVPH (24) TRIP output signal will be set to 1 before the
Thermal status reaches 100%.
9.4.7.5 Overexcitation alarm M5854-123 v6
A separate step, AlarmPickup, is provided for alarming purpose. It is normally set 2% lower than
(Pickup1) and has a definite time delay, tAlarm. This will give the operator an early warning.
BLOCK
AlarmPickup
ALARM
0-tMax
t>tAlarm &
0
tAlarm
M>Pickup1
TRIP
&
Pickup1
V3P
Calculation
of internal
Ei TD
M
M=
I3P
induced (Ei / f) M IEEE law &
voltage Ei (Vn / fn)
OR
0-tMax
M
0
Tailor-made law
t_MaxTripDelay
M>Pickup2
Xleakage 0-tMin
0 t>tMin
Pickup2 t_MinTripDelay
M = relative Pickup as service value
Figure 346: A simplified logic diagram of the Overexcitation protection OEXPVPH (24)
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Simplification of the diagram is in the way the IEEE and Tailor-made delays are calculated. The
cooling process is not shown. It is not shown that voltage and frequency are separately checked
against their respective limit values.

M13338-2 v11
Table 372: OEXPVPH (24) technical data

Trip value, pickup (100–180)% of (VBase/fn) ±0.5% of V
Trip value, alarm (50–120)% of pickup level ±0.5% of Vn at V ≤ Vn

Trip value, high level (100–200)% of (VBase/fn) ±0.5% of V
Curve type IEEE or customer defined ±5.0 % or ±45 ms, whichever is greater
(0.18 × TD)
IEEE : t =
( M - 1) 2
where M = (E/f)/(Vn/fn)
Minimum time delay for inverse (0.000–60.000) s ±1.0% or ±45 ms, whichever is greater
function
Maximum time delay for inverse (0.00–9000.00) s ±1.0% or ±45 ms, whichever is greater
function
Alarm time delay (0.00–9000.00) ±1.0% or ±45 ms, whichever is greater
9.5 Voltage differential protection VDCPTOV (60) SEMOD153860-1 v2
SEMOD167723-2 v2

Voltage differential protection VDCPTOV - 60
A voltage differential monitoring function is available. It compares the voltages from two three
phase sets of voltage transformers and has one sensitive alarm step and one trip step.
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VDCPTOV (60)
V3P1* TRIP
V3P2* PICKUP
BLOCK ALARM
V1LOW
V2LOW
VDIFF_A
VDIFF_B
VDIFF_C
Figure 347: VDCPTOV (60) function block
9.5.4 Signals
Table 373: VDCPTOV (60) Input signals

V3P1 GROUP - Bus voltage
SIGNAL
V3P2 GROUP - Capacitor voltage
SIGNAL
Table 374: VDCPTOV (60) Output signals

TRIP BOOLEAN Voltage differential protection operated
PICKUP BOOLEAN Pickup of voltage differential protection
ALARM BOOLEAN Voltage differential protection alarm
V1LOW BOOLEAN Loss of V1 voltage
V2LOW BOOLEAN Loss of V2 voltage
VDIFF_A REAL Differential Voltage phase A
VDIFF_B REAL Differential Voltage phase B
VDIFF_C REAL Differential Voltage phase C
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9.5.5 Settings
Table 375: VDCPTOV (60) Group settings (basic)

Enabled
BlkDiffAtVLow No - - Yes Block operation at low voltage
Yes
VDTrip 2.0 - 100.0 %VB 0.1 5.0 Operate level, in % of VBase
tTrip 0.000 - 60.000 s 0.001 1.000 Time delay for voltage differential operate,
in seconds
tReset 0.000 - 60.000 s 0.001 0.000 Time delay for voltage differential reset, in
seconds
VDAlarm 2.0 - 100.0 %VB 0.1 2.0 Alarm level, in % of VBase
tAlarm 0.000 - 60.000 s 0.001 2.000 Time delay for voltage differential alarm, in
seconds
V1Low 1.0 - 100.0 %VB 0.1 70.0 Input 1 undervoltage level, in % of VBase
V2Low 1.0 - 100.0 %VB 0.1 70.0 Input 2 undervoltage level, in % of VBase
tBlock 0.000 - 60.000 s 0.001 0.000 Reset time for undervoltage block
Table 376: VDCPTOV (60) Group settings (advanced)

RF_A 0.000 - 3.000 - 0.001 1.000 Ratio compensation factor phase L1
U2L1*RFL1=U1L1
RF_B 0.000 - 3.000 - 0.001 1.000 Ratio compensation factor phase L2
U2L2*RFL2=U1L2
RF_C 0.000 - 3.000 - 0.001 1.000 Ratio compensation factor phase L3
U2L3*RFL3=U1L3
Table 377: VDCPTOV (60) Non group settings (basic)

groups

Table 378: VDCPTOV (60) Monitored data

VDIFF_A REAL - kV Differential Voltage phase A
VDIFF_B REAL - kV Differential Voltage phase B
VDIFF_C REAL - kV Differential Voltage phase C
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The Voltage differential protection function VDCPTOV (60) is based on comparison of the
magnitudes of the two voltages connected in each phase. Possible differences between the ratios
of the two Voltage/Capacitive voltage transformers can be compensated for with a ratio
correction factors RF_X. The voltage difference is evaluated and if it exceeds the alarm level
VDAlarm or trip level VDTrip signals for alarm (ALARM output) or trip (TRIP output) is given after
definite time delay tAlarm respectively tTrip. The two three phase voltage supplies are also
supervised with undervoltage settings V1Low and V2Low. The outputs for loss of voltage V1LOW
resp V2LOW will be activated. The V1 voltage is supervised for loss of individual phases whereas
the V2 voltage is supervised for loss of all three phases.
Loss of all V1 or all V2 voltages will block the differential measurement. This blocking can be
switched off with setting BlkDiffAtULow = No.
VDCPTOV (60) function can be blocked from an external condition with the binary BLOCK input. It
can, for example, be activated from Fuse failure supervision function FUFSPVC.
To allow easy commissioning the measured differential voltage is available as service value. This
allows simple setting of the ratio correction factor to achieve full balance in normal service.
The principle logic diagram is shown in figure 348.
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VDTrip_A
AND
VDTrip_B O
AND 0 0-tTrip TRIP
R 0-tReset 0 AND
VDTrip_C
AND
AND PICKUP
VDAlarm_A
AND
VDAlarm_B O 0-tAlarm
AND ALARM
R 0 AND
VDAlarm_C
AND
V1Low_A
V1Low_B AND 0-tAlarm

AND V1LOW
0
V1Low_C AND
OR
BlkDiffAtULow
V2Low_A
V2Low_B AND 0-t1 V2LOW

0 AND
V2Low_C
BLOCK
en06000382_2_ansi.vsd
Figure 348: Principle logic for Voltage differential function VDCPTOV (60)

SEMOD166919-2 v6
Table 379: VDCPTOV (60) technical data

Voltage difference for alarm (2.0–100.0) % of VBase ±0.5% of Vn
and trip
Under voltage level (1.0–100.0) % of VBase ±0.5% of Vn
Independent time delay for (0.000–60.000)s ±0.2% or ±40 ms whichever is greater

voltage differential alarm at
0.8 to 1.2 x VDAlarm
voltage differential trip at 0.8
to 1.2 x VDTrip
voltage differential reset at 1.2
to 0.8 x VDTrip
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9.6 Loss of voltage check LOVPTUV (27) SEMOD171453-1 v3
SEMOD171954-2 v2

Loss of voltage check LOVPTUV - 27
Loss of voltage check LOVPTUV (27) is suitable for use in networks with an automatic system
restoration function. LOVPTUV (27) issues a three-pole trip command to the circuit breaker, if all
three phase voltages fall below the set value for a time longer than the set time and the circuit
breaker remains closed.
The operation of LOVPTUV (27) is supervised by the fuse failure supervision FUFSPVC.
LOVPTUV (27)
V3P* TRIP
BLOCK PICKUP
CBOPEN
VTSU
Figure 349: LOVPTUV (27) function block
9.6.4 Signals
Table 380: LOVPTUV (27) Input signals

SIGNAL
BLOCK BOOLEAN 0 Block the all outputs
CBOPEN BOOLEAN 0 Circuit breaker open
VTSU BOOLEAN 0 Block from voltage circuit supervision
Table 381: LOVPTUV (27) Output signals

PICKUP BOOLEAN Pickup signal
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9.6.5 Settings
Table 382: LOVPTUV (27) Group settings (basic)

Enabled
VPG 1 - 100 %VB 1 70 Operate voltage in % of base voltage
VBase
tTrip 0.000 - 60.000 s 0.001 7.000 Operate time delay
Table 383: LOVPTUV (27) Group settings (advanced)

tPulse 0.050 - 60.000 s 0.001 0.150 Duration of TRIP pulse
tBlock 0.000 - 60.000 s 0.001 5.000 Time delay to block when all 3ph voltages
are not low
tRestore 0.000 - 60.000 s 0.001 3.000 Time delay for enable the function after
restoration
Table 384: LOVPTUV (27) Non group settings (basic)

groups
The operation of Loss of voltage check LOVPTUV (27) is based on line voltage measurement.
LOVPTUV (27) is provided with a logic, which automatically recognizes if the line was restored for
at least tRestore before starting the tTrip timer. All three phases are required to be low before the
output TRIP is activated. The PICKUP output signal indicates pickup.
Additionally, LOVPTUV (27) is automatically blocked if only one or two phase voltages have been
detected low for more than tBlock.
LOVPTUV (27) operates again only if the line has been restored to full voltage for at least tRestore.
Operation of the function is also inhibited by fuse failure and open circuit breaker information
signals, by their connection to dedicated inputs of the function block.
Due to undervoltage conditions being continuous the trip pulse is limited to a length set by
setting tPulse.
The operation of LOVPTUV (27) is supervised by the fuse-failure function (BLKV input) and the
information about the open position (CBOPEN) of the associated circuit breaker.
The BLOCK input can be connected to a binary input of the IED in order to receive a block
command from external devices or can be software connected to other internal functions of the
IED itself in order to receive a block command from internal functions. LOVPTUV (27) is also
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blocked when the IED is in TEST status and the function has been blocked from the HMI test menu.
(Blocked=Yes).
TEST
TEST-ACTIVE
AND
Blocked = Yes
PICKUP
BLOCK OR
Function Enable tPulse TRIP

PU_V_A AND 0-tTrip
0
PU_V_B AND
only 1 or 2 phases are low for
Latched at least 10 s (not three)
PU_V_C Enable
AND
OR 0-tBlock
0
CBOPEN Reset Enable

OR
AND
VTSU
OR 0-tRestore
Set Enable
0 OR
Line restored for

at least 3 s
Figure 350: Simplified diagram of Loss of voltage check LOVPTUV (27)
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SEMOD175210-2 v6
Table 385: LOVPTUV (27) technical data

Trip voltage (1–100)% of VBase ±0.5% of Vn
Pulse timer when (0.050–60.000) s ±0.2% or ±15 ms whichever is greater

disconnecting all three phases
Time delay for enabling the (0.000–60.000) s ±0.2% or ±35 ms whichever is greater
functions after restoration
Trip time delay when (0.000–60.000) s ±0.2% or ±35 ms whichever is greater
disconnecting all three phases
Time delay to block when all (0.000–60.000) s ±0.2% or ±35 ms whichever is greater
three phase voltages are not
low
9.7 Radial feeder protection PAPGAPC (27) GUID-831891A3-B5AB-4532-8901-311C541F0ABB v1
9.7.1 Identification GUID-1B7B3DC5-DD7B-4017-928D-0C41768E94D9 v1
Function description IEC 61850 identification IEC 60617 identification ANSI/IEEE C37.2 device
number
Radial feeder protection PAPGAPC U< 27
9.7.2 Functionality GUID-82856D0B-5C5E-499A-9A62-CC511E4F047A v2
The PAPGAPC (27) function is used to provide protection of radial feeders having passive loads or
weak end in-feed sources. It is possible to achieve fast tripping using communication system with
remote end or delayed tripping not requiring communication or upon communication system
failure. For fast tripping, scheme communication is required. Delayed tripping does not require
scheme communication.
The PAPGAPC (27) function performs phase selection using measured voltages. Each phase
voltage is compared to the opposite phase-phase voltage. A phase is deemed to have a fault if its
phase voltage drops below a settable percentage of the opposite phase-phase voltage. The phase
- phase voltages include memory. This memory function has a settable time constant.
The voltage-based phase selection is used for both fast and delayed tripping. To achieve fast
tripping, scheme communication is required. Delayed tripping does not require scheme
communication. It is possible to permit delayed tripping only upon failure of the communications
channel by blocking the delayed tripping logic with a communications channel healthy input signal.
On receipt of the communications signal, phase selective outputs for fast tripping are set based
on the phase(s) in which the phase selection function has operated.
For delayed tripping, single pole and three pole delays are separately and independently settable.
Furthermore, it is possible to enable or disable single pole and three pole delayed tripping. For
single phase faults, it is possible to include a residual current check in the tripping logic. Three
pole tripping is always selected for phase selection on more than one phase. Three pole tripping
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will also occur if the residual current exceeds the set level during fuse failure for a time longer than
the three pole trip delay time.
9.7.3 Function block GUID-017455D7-C7F7-42F1-9CAA-53D785A1F4E7 v1
PAPGAPC (27)
I3P* TRIP
V3P* TRINP_3P
BLOCK TR_A
BLKTR TR_B
BLKST TR_C
BLKDLFLT ARST
FUSEFAIL ARST3PH
COMOK ARST_A
CR ARST_B
52A ARST_C
POLEDISC
Figure 351: PAPGAPC (27) function block
9.7.4 Signals GUID-AE032A57-2479-443A-89B8-4F107AE012FA v1
Table 386: PAPGAPC (27) Input signals

I3P GROUP - Group parameter for current signals
SIGNAL
V3P GROUP - Group parameter for voltage signals
SIGNAL
BLKTR BOOLEAN 0 Block trip
BLKST BOOLEAN 0 Block Start
BLKDLFLT BOOLEAN 0 Blocks the delayed fault clear functionality
FUSEFAIL BOOLEAN 0 Block from fuse failure function
COMOK BOOLEAN 0 Telecommunication link healthy
CR BOOLEAN 0 Received communication signal
52a BOOLEAN 0 Circuit breaker is closed
POLEDISC BOOLEAN 0 The position of CB poles differs (pole discordance)
Table 387: PAPGAPC (27) Output signals

TRIP BOOLEAN General trip
TRINP_3P BOOLEAN Trip caused by residual current detection
TR_A BOOLEAN Trip phase A
TR_C BOOLEAN Trip phase C
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Voltage protection

ARST BOOLEAN Start signal to the autorecloser function
ARST3PH BOOLEAN Three phase reclosing to be performed
ARST_A BOOLEAN Autoreclosing start phase A
ARST_B BOOLEAN Autoreclosing start phase B
ARST_C BOOLEAN Autoreclosing start phase C
9.7.5 Settings GUID-841D8428-5335-484B-9ED8-89ED86A33E03 v1
Table 388: PAPGAPC (27) Group settings (basic)

On
VPhSel 30 - 100 % 1 60 Faulted phase voltage in % of quadrilateral
phase-phase voltage divided by sqrt (3)
Tau 1 - 60 sec 1 5 Time constant for reference voltage
FastOperation Disabled - - Disabled Enable fast fault clearing function
Enabled
t3Ph 0.000 - 60.000 s 0.001 1.000 Time delay for three phase operation
Pickup_N 10 - 150 %IB 1 50 Residual current detection level in % of
IBase
ResCurrCheck Disabled - - Disabled Enable residual current check for delayed
Enabled operation at single-phase faults
Del1PhOp 3Ph - - 3Ph Enable delayed operation for single phase
1Ph faults
t1Ph 0.000 - 60.000 s 0.001 1.000 Time delay for single phase operation
Del3PhOp Disabled - - Disabled Enable delayed 3-phase operation
Enabled
ResCurrOper Disabled - - Disabled Enabling signal for residual current
Enabled operation
tResCurr 0.000 - 60.000 s 0.001 0.200 Time delay for residual current indication
Table 389: PAPGAPC (27) Non group settings (basic)

groups
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Voltage protection

Table 390: PAPGAPC (27) Monitored data

VA REAL - kV Voltage DFT amplitude in Phase A
VB REAL - kV Voltage DFT amplitude in Phase B
VC REAL - kV Voltage DFT amplitude in Phase C
IN REAL - A Residual current DFT amplitude
9.7.7 Principle of operation GUID-C8CBC104-7CCD-46CD-A01C-5FEDDC0F55AF v1
9.7.7.1 Faulted phase selection GUID-5FE347E6-8A02-4B87-B515-3CEB25232AFA v1
The faulted phase selection is based on voltage measurement. Each phase voltage magnitude
(rms) is compared with the quadrature phase – phase voltage, which is obtained by passing full
wave rectified signal through an exponential filter.
The filter updates the output if the output magnitude is lower than input voltage. However, when
the input voltage is lower than output magnitude, the output decreases with a settable time
constant of Tau. The desired filter response is depicted in Figure352.
Time constant=Tau Output from

filter
Rectified
input signal
en01000140.vsd
Figure 352: Desired filter response

Phase x is deemed to have faulted if the phase x voltage is lower than filtered quadrature phase –
phase voltage times VPhSel< set value. The phase selection for remaining phases can be
performed in the similar way. The logic diagram for faulted phase selection is shown in Figure 353.
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Technical manual
Voltage protection
Z-1
V3P* ABS
MAX
-t ×
EXP
×
Tau ÷
× a PHSx
a<b
3 ÷ × b
VPhSel <
Figure 353: Simplified logic diagram for faulted phase selection
9.7.7.2 Residual current detection GUID-98B7BF77-6658-4603-BD3F-19A419551BC7 v1
PAPGAPC (27) detects the presence of residual current if the residual current exceeds the set
Pickup_N value and lasts for a period of 600 ms.
The output TRIN is high after a set time of tResCurr if the setting ResCurrOper is enabled.
The output TRIN is blocked by enabling either of BLOCK or BLKTR inputs.
I3P*
a STIN
a>b 0
b 600 ms
Pickup_N tResCurr
0 TRIN
ResCurrOper &
BLOCK
BLKTR &
Figure 354: Simplified logic diagram for residual current detection
9.7.7.3 Fast fault clearance GUID-B1E84A31-7733-4CB8-AB8C-51B723B8335D v2
Operation at the remote end of the line with passive loads or weak sources is obtained as follows.
The fault clearing at remote end is initiated by CR signal received from the other end of the feeder.
Fast fault clearing can be enabled by the FastOperation setting. The function is enabled for 650
ms upon receiving the carrier signal from the other end. It generates the pickup signal PUx
depending on the status of the faulty phase(s). The presence of FUSEFAIL inhibits the operation
of fault clearance on faulty phase(s) and the corresponding logic diagram is depicted in Figure
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Technical manual
Voltage protection
355. The fast fault clearance operation is blocked upon failure of the communication channel input
COMOK.
650 ms
CR
&
FUSEFAIL
COMOK
& & PUA
FastOperation
PHSA
& PUB
PHSB
& PUC
PHSC
Figure 355: Simplified logic diagram for fast fault clearance
9.7.7.4 Delayed fault clearance GUID-40D30808-EA85-431D-AA7F-E9F5529DDD3B v2
Delayed fault clearance does not require scheme communication. It is possible to permit delayed
tripping upon the failure of the communication channel input COMOK.
It is possible to select delayed single- and three pole tripping by choosing the appropriate settings
Del1PhOp and Del3PhOp. Furthermore, time delays for single- and three pole tripping can
independently be set by t1Ph and t3Ph.
For single phase faults, ResCurrCheck is included in the tripping logic. It is also possible to select
either single- or three pole tripping for single phase faults occurring in the system. Three pole
tripping is always selected for phase selection of more than one phase.
In case of a fuse failure condition, that is FUSEFAIL is high, single- and three pole tripping are
inhibited, however, three pole tripping occurs if the residual current exceeds the set level during
fuse failure for a time longer than the three pole trip delay time of t3Ph.
The inputs BLKDLFLT and COMOK inhibit the delayed operation for faulty phase(s).
Pickup signal PUx is enabled as soon as the fault is detected in any phase(s).
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Technical manual
Voltage protection
COMOK
&
FastOperation
BLKDLFLT &
FUSEFAIL
STIN
≥1 &
ResCurrCheck
Del1PhOp
t1Ph PUA
PHSA & &
0 ≥1
PUB
PHSB & t1Ph &
0 ≥1
PUC
PHSC & t1Ph &
0 ≥1
≥1 &
&
Del3PhOp
≥2 & ≥1 t3Ph
0
&
Figure 356: Simplified logic diagram for delayed fault clearance
9.7.7.5 Trip and autoreclose logic GUID-FBEFA5C3-6313-4D3F-8C85-E67C1689D110 v1
The pickup signals for each phase are generated from both the fast fault clearance and delayed
fault clearance. Upon receiving the pickup signal PUx in phase(s), the corresponding phase trip
signal TRLx is issued. A general trip signal, TRIP is also generated.
The single or three phase operation of autorecloser depends on the status of CBCLD and the
existence of pole discrepancy, indicated by the input POLEDISC. If conditions for reclosing are
fulfilled, a pickup signal ARSTLx is issued for the faulty phase(s).
A general pickup signal, ARST is also generated. If more than one phase seems to be detected
faulty, three phase autoreclosing signal ARST3PH is issued.
The binary input BLOCK can be used to block the function. The activation of the BLOCK input
deactivates all outputs.
Pickup output signals ARSTLx, ARST and ARST3PH are blocked by enabling BLKST input and the
activation of the BLKTR input deactivates all trip outputs.
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Technical manual
Voltage protection
PUA
TR_A
&
PUB
TR_B
&
PUC
TR_C
&
≥1 TRIP
&
BLOCK
BLKTR ≥1
BLKST ≥1
& ARST_A
&
& ARST_B
&
& ARST_C
&
POLEDISC
CBCLD &
0 ≥1
100 ms ≥1 ARST
&
≥1 ARST3PH
&
Figure 357: Simplified logic diagram for trip and autoreclose logic
9.7.8 Technical data GUID-C172D5EB-51E8-4FC9-B2E7-EF976872FD7E v5
Table 391: 27 technical data

Residual current detection (10 - 150)% of IBase ±1.0% of Ir at I ≤ Ir
±1.0% of I at I > Ir
Reset ratio >95% at (50 - 150)% of IBase -
Trip time, residual current detection Min. = 15 ms -
at 0 to 2 x Iset
Max. = 30 ms
Independent time delay to trip, (0.000 - 60.000) s ±0.2% or ±40 ms whichever is
residual current detection at 0 to 2 x greater
Iset
Voltage based phase selection (30 -100)% of VBase ±1.0% of Vn
Reset ratio <115% -

Trip time, voltage based phase Min. = 15 ms -
selection at 1.2 to 0.8 x Vset
Max. = 30 ms
Independent time delay to trip, (0.000 – 60.000) s ±0.2% or ±40 ms whichever is
voltage based phase selection at 1.2 greater
to 0.8 x Vset
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Technical manual
Section 10 Frequency protection
10.1 Underfrequency protection SAPTUF (81) IP15746-1 v3
M14865-1 v5

Underfrequency protection SAPTUF 81
f<
SYMBOL-P V1 EN-US
Underfrequency occurs as a result of a lack of generation in the network.
Underfrequency protection SAPTUF (81) measures frequency with high accuracy, and is used for
load shedding systems, remedial action schemes, gas turbine startup and so on. Separate definite
time delays are provided for trip and restore.
SAPTUF (81) is provided with undervoltage blocking.
The operation is based on positive sequence voltage measurement and requires two phase-phase
or three phase-neutral voltages to be connected. For information about how to connect analog
inputs, refer to Application manual/IED application/Analog inputs/Setting guidelines
SAPTUF (81)
V3P* TRIP
BLOCK PICKUP
BLKTRIP RESTORE
BLKREST BLKDMAGN
FREQ
Figure 358: SAPTUF (81) function block
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Technical manual
10.1.4 Signals
Table 392: SAPTUF (81L) Input signals

SIGNAL
BLKTRIP BOOLEAN 0 Blocking operate output
BLKREST BOOLEAN 0 Blocking restore output
Table 393: SAPTUF (81L) Output signals

RESTORE BOOLEAN Restore signal for load restoring purposes
BLKDMAGN BOOLEAN Measurement blocked due to low voltage amplitude
FREQ REAL Measured frequency
10.1.5 Settings
Table 394: SAPTUF (81L) Group settings (basic)

Enabled
PUFrequency 35.00 - 75.00 Hz 0.01 48.80 Frequency set value
tDelay 0.000 - 60.000 s 0.001 0.200 Operate time delay
tReset 0.000 - 60.000 s 0.001 0.000 Time delay for reset
tRestore 0.000 - 60.000 s 0.001 0.000 Restore time delay
RestoreFreq 45.00 - 65.00 Hz 0.01 50.10 Restore frequency value
TimerMode Definite timer - - Definite timer Setting for choosing timer mode
Volt based timer
VNom 50.0 - 150.0 %VB 1.0 100.0 Nominal voltage for voltage based timer in
% of UBase
VMin 50.0 - 150.0 %VB 1.0 90.0 Lower operation limit for voltage based
timer in % of VBase
Exponent 0.0 - 5.0 - 0.1 1.0 For calculation of the curve form for
voltage based timer
t_MaxTripDelay 0.010 - 60.000 s 0.001 1.000 Maximum time operation limit for voltage
based timer
t_MinTripDelay 0.010 - 60.000 s 0.001 1.000 Minimum time operation limit for voltage
based timer
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Technical manual
Table 395: SAPTUF (81L) Non group settings (basic)

groups

Table 396: SAPTUF (81L) Monitored data

VLevel REAL - kV Level of measured voltage
FREQ REAL - Hz Measured frequency
Underfrequency protection SAPTUF (81) is used to detect low power system frequency. SAPTUF
(81) can either have a definite time delay or a voltage magnitude dependent time delay. If the
voltage magnitude dependent time delay is applied, the time delay will be longer if the voltage is
higher, and the delay will be shorter if the voltage is lower. If the frequency remains below the set
value for a time period corresponding to the chosen time delay, the corresponding trip signal is
issued. To avoid an unwanted trip due to uncertain frequency measurement at low voltage
magnitude, a voltage controlled blocking of the function is available from the preprocessing
function, that is, if the voltage is lower than the set blocking voltage in the preprocessing function,
the function is blocked and no PICKUP or TRIP signal is issued.
The fundamental frequency of the measured input voltage is measured continuously, and
compared with the set value, PUFrequency. The frequency function is dependent on the voltage
magnitude. If the voltage magnitude decreases below the setting MinValFreqMeas in the SMAI
preprocessing function, which is described in the Basic IED Functions chapter and is set as a
percentage of a global base voltage parameter, SAPTUF (81) gets blocked, and the output
BLKDMAGN is issued. All voltage settings are made in percent of the setting VBase, which should
be set as a phase-phase voltage in kV.
10.1.7.2 Time delay M13354-10 v8
The time delay for underfrequency protection SAPTUF (81) can be either a settable definite time
delay or a voltage magnitude dependent time delay, where the time delay depends on the voltage
level; a high voltage level gives a longer time delay and a low voltage level causes a short time
delay. For the definite time delay, the setting tDelay sets the time delay.
For the voltage dependent time delay the measured voltage level and the settings VNom, VMin,
Exponent, t_MaxTripDelay and t_MinTripDelay set the time delay according to figure 359 and
equation . The setting TimerOperation is used to decide what type of time delay to apply.
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Technical manual
Trip signal issuing requires that the underfrequency condition continues for at least the user set
time delay tDelay. If the PICKUP condition, with respect to the measured frequency ceases during
this user set delay time, and is not fulfilled again within a user defined reset time, tReset, the
PICKUP output is reset, after that the defined reset time has elapsed. Here it should be noted that
after leaving the hysteresis area, the PICKUP condition must be fulfilled again and it is not
sufficient for the signal to only return back to the hysteresis area.
On the RESTORE output of SAPTUF (81) a 100ms pulse is issued, after a time delay corresponding
to the setting of tRestore, when the measured frequency returns to the level corresponding to the
setting RestoreFreq.
10.1.7.3 Voltage dependent time delay M13354-19 v5
Since the fundamental frequency in a power system is the same all over the system, except some
deviations during power oscillations, another criterion is needed to decide, where to take actions,
based on low frequency. In many applications the voltage level is very suitable, and in most cases
is load shedding preferable in areas with low voltage. Therefore, a voltage dependent time delay
has been introduced, to make sure that load shedding, or other actions, take place at the right
location. At constant voltage, V, the voltage dependent time delay is calculated according to
equation 179. At non-constant voltage, the actual time delay is integrated in a similar way as for
the inverse time characteristic for the undervoltage and overvoltage functions.
Exponent
é V - VMin ù
t=ê × ( t _ MaxTripDelay - t _ MinTripDelay ) + t _ MinTripDelay
ëVNom - VMin úû
where:
t is the voltage dependent time delay (at constant voltage),
V is the measured voltage
Exponent is a setting,
VMin, VNom are voltage settings corresponding to
t_MaxTripDelay, t_MinTripDelay are time settings.
The inverse time characteristics are shown in figure 359, for:
VMin = 90%
= 100%
t_MaxTrip = 1.0 s
Delay
t_MinTrip = 0.0 s
Delay
Exponent = 0, 1, 2, 3 and 4
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Technical manual
1
0
1
Exponenent
TimeDlyOperate [s]
2
3
0.5 4
0
90 95 100
V [% of VBase]
en05000075_ansi.vsd
Figure 359: Voltage dependent inverse time characteristics for underfrequency protection
SAPTUF (81). The time delay to trip is plotted as a function of the measured
voltage, for the Exponent = 0, 1, 2, 3, 4 respectively.
10.1.7.4 Blocking M13354-50 v6
It is possible to block underfrequency protection SAPTUF (81) partially or completely, by binary

input signals or by parameter settings, where:

BLKTRIP: blocks the TRIP output
BLKREST: blocks the RESTORE output
If the measured voltage level decreases below the setting of MinValFreqMeas in the preprocessing
function both the PICKUP and the TRIP outputs are blocked.
10.1.7.5 Design M13354-63 v9
The frequency measuring element continuously measures the frequency of the positive sequence
voltage and compares it to the setting PUFrequency. The frequency signal is filtered to avoid
transients due to switchings and faults. The time integrator can trip either due to a definite delay
time or to the special voltage dependent delay time. When the frequency has returned back to the
setting of RestoreFreq, the RESTORE output is issued after the time delay tRestore. The design of
underfrequency protection SAPTUF (81) is schematically described in figure 360.
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Technical manual
Block
BLOCK BLKDMAGN
OR
Comparator
V < IntBlockLevel
Voltage Time integrator

Pickup
TimerOperation Mode & PICKUP
Selector PICKUP
Frequency Comparator Trip
f < PuFrequency Output
TimeDlyOperate TRIP Logic
TimeDlyReset TRIP
100 ms
Comparator RESTORE
TimeDlyRestore
f > RestoreFreq
en05000726_ansi.vsd
Figure 360: Simplified logic diagram for SAPTUF (81)

M13360-1 v13
Table 397: SAPTUF (81) technical data

Trip value, pickup function, at symmetrical three (35.00-75.00) Hz ±2.0 mHz
phase voltage
Trip time, pickup at fset + 0.02 Hz to fset - 0.02 Min. = 80 ms
Hz fn = 50 Hz
Max. = 95 ms
-
Min. = 65 ms
fn = 60 Hz
Max. = 80 ms
Reset time, pickup at fset - 0.02 Hz to fset + 0.02 Min. = 15 ms
-
Hz Max. = 30 ms
Trip time, definite time function at fset + 0.02 Hz (0.000-60.000)s ±0.2% or ±100 ms whichever is
to fset - 0.02 Hz greater
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Technical manual

Reset time, definite time function at fset - 0.02 (0.000-60.000)s ±0.2% or ±120 ms whichever is
Hz to fset + 0.02 Hz greater
Voltage dependent time delay Settings: ±1.0% or ±120 ms whichever is

VNom=(50-150)% of Vbase greater
VMin=(50-150)% of Vbase
Exponent=0.0-5.0
t_MaxTripDelay=(0.010–
60.000)s
t_MinTripDelay=(0.010–
60.000)s
Exponent
é V - VMin ù
t=ê × ( t _ MaxTripDelay - t _ MinTripDelay ) + t _ MinTripDelay
ëVNom - VMin úû
V=Vmeasured
10.2 Overfrequency protection SAPTOF (81) IP15747-1 v3
M14866-1 v4

Overfrequency protection SAPTOF 81
f>
SYMBOL-O V1 EN-US
Overfrequency protection function SAPTOF (81) is applicable in all situations, where reliable
detection of high fundamental power system frequency is needed.
Overfrequency occurs because of sudden load drops or shunt faults in the power network. Close
to the generating plant, generator governor problems can also cause over frequency.
SAPTOF (81) measures frequency with high accuracy, and is used mainly for generation shedding
and remedial action schemes. It is also used as a frequency stage initiating load restoring. A
definite time delay is provided for trip.
SAPTOF (81) is provided with an undervoltage blocking.
The operation is based on positive sequence voltage measurement and requires two phase-phase
or three phase-neutral voltages to be connected. For information about how to connect analog
inputs, refer to Application manual/IED application/Analog inputs/Setting guidelines
645
Technical manual
SAPTOF (81)
V3P* TRIP
BLOCK PICKUP
BLKTRIP BLKDMAGN
FREQ
Figure 361: SAPTOF (81) function block
10.2.4 Signals
Table 398: SAPTOF (81H) Input signals

SIGNAL
Table 399: SAPTOF (81H) Output signals

BLKDMAGN BOOLEAN Measurement blocked due to low amplitude
FREQ REAL Measured frequency
10.2.5 Settings
Table 400: SAPTOF (81H) Group settings (basic)

Enabled
PUFrequency 35.00 - 90.00 Hz 0.01 51.20 Frequency set value
tDelay 0.000 - 60.000 s 0.001 0.000 Operate time delay
Table 401: SAPTOF (81H) Non group settings (basic)

groups
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Technical manual

Table 402: SAPTOF (81H) Monitored data

VLevel REAL - kV Level of measured voltage
FREQ REAL - Hz Measured frequency
Overfrequency protection SAPTOF (81) is used to detect high power system frequency. SAPTOF
(81) has a settable definite time delay. If the frequency remains above the set value for a time
period corresponding to the chosen time delay, the corresponding TRIP signal is issued. To avoid
an unwanted TRIP due to uncertain frequency measurement at low voltage magnitude, a voltage
controlled blocking of the function is available from the preprocessing function, that is, if the
voltage is lower than the set blocking voltage in the preprocessing function, the function is
blocked and no PICKUP or TRIP signal is issued.
The fundamental frequency of the positive sequence voltage is measured continuously, and
compared with the set value, PUFrequency. Overfrequency protection SAPTOF (81) is dependent
on the voltage magnitude. If the voltage magnitude decreases below the setting MinValFreqMeas
in the SMAI preprocessing function, which is discussed in the Basic IED Functions chapter and is
set as a percentage of a global base voltage parameter VBase, SAPTOF (81) is blocked and the
output BLKDMAGN is issued. All voltage settings are made in percent of the VBase, which should
be set as a phase-phase voltage in kV. To avoid oscillations of the output PICKUP signal, a
hysteresis has been included.
10.2.7.2 Time delay M14958-9 v7
The time delay for Overfrequency protection SAPTOF (81) is a settable definite time delay,
specified by the setting tDelay.
TRIP signal issuing requires that the overfrequency condition continues for at least the user set
time delay, tReset. If the PICKUP condition, with respect to the measured frequency ceases during
this user set delay time, and is not fulfilled again within a user defined reset time, tReset, the
PICKUP output is reset, after that the defined reset time has elapsed. It is to be noted that after
leaving the hysteresis area, the PICKUP condition must be fulfilled again and it is not sufficient for
the signal to only return back to the hysteresis area.
The total time delay consists of the set value for time delay plus minimum trip time
of the pickup function (80 - 90 ms).
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Technical manual
10.2.7.3 Blocking M14958-13 v6
It is possible to block overfrequency protection SAPTOF (81) partially or completely, by binary


function both the PICKUP and the TRIP outputs are blocked.
10.2.7.4 Design M14958-24 v8
The frequency measuring element continuously measures the frequency of the positive sequence
voltage and compares it to the setting PUFrequency. The frequency signal is filtered to avoid
transients due to switchings and faults in the power system. The time integrator operates due to
a definite delay time. The design of overfrequency protection SAPTOF (81) is schematically
described in figure 362.
BLOCK
BLKTRIP BLOCK
OR BLKDMAGN
Comparator
V < IntBlockLevel
Pickup
&
Trip
Voltage Time integrator Output
Logic
Definite Time Delay PICKUP PICKUP
Frequency Comparator
f > PuFrequency TimeDlyOperate
TRIP
TimeDlyReset
TRIP
en05000735_ansi.vsd
Figure 362: Simplified logic diagram for SAPTOF (81)
648
Technical manual

M14964-1 v12
Table 403: SAPTOF (81) technical data

Trip value, pickup function at symmetrical (35.00-90.00) Hz ±2.0 mHz
three-phase voltage
Trip time, pickup at fset -0.02 Hz to fset +0.02 Min. = 80 ms -
fn = 50Hz
Hz Max. = 95 ms
Min. = 65 ms
fn = 60 Hz
Max. = 80 ms
Reset time, pickup at fset +0.02 Hz to fset -0.02 Min. = 15 ms -
Hz Max. = 30 ms
Trip time, definite time function at fset -0.02 (0.000-60.000)s ±0.2% ±100 ms
Hz to fset +0.02 Hz whichever is
greater
Reset time, definite time function at fset +0.02 (0.000-60.000)s ±0.2% ±120 ms,
Hz to fset -0.02 Hz whichever is
greater
10.3 Rate-of-change frequency protection SAPFRC (81) IP15748-1 v3
M14868-1 v3

Rate-of-change frequency protection SAPFRC 81
df/dt >
<
SYMBOL-N V1 EN-US
The rate-of-change frequency protection function SAPFRC (81) gives an early indication of a main
disturbance in the system. SAPFRC (81) measures frequency with high accuracy, and can be used
for generation shedding, load shedding and remedial action schemes. SAPFRC (81) can
discriminate between a positive or negative change of frequency. A definite time delay is provided
for trip.
SAPFRC (81) is provided with an undervoltage blocking. The operation is based on positive
sequence voltage measurement and requires two phase-phase or three phase-neutral voltages to
be connected. For information about how to connect analog inputs, refer to Application
manual/IED application/Analog inputs/Setting guidelines.
649
Technical manual
SAPFRC (81)
V3P* TRIP
BLOCK PICKUP
BLKTRIP RESTORE
BLKREST BLKDMAGN
Figure 363: SAPFRC (81) function block
10.3.4 Signals
Table 404: SAPFRC (81R) Input signals

SIGNAL
BLKREST BOOLEAN 0 Blocking restore output
Table 405: SAPFRC (81R) Output signals

TRIP BOOLEAN Operate/trip signal for frequency gradient
PICKUP BOOLEAN Start/pick-up signal for frequency gradient
RESTORE BOOLEAN Restore signal for load restoring purposes
BLKDMAGN BOOLEAN Blocking indication due to low magnitude
10.3.5 Settings
Table 406: SAPFRC (81R) Group settings (basic)

Enabled
PUFreqGrad -10.00 - 10.00 Hz/s 0.01 0.50 Frequency gradient pick up value, the sign
defines direction
tTrip 0.000 - 60.000 s 0.001 0.200 Operate time delay in positive / negative
frequency gradient mode
RestoreFreq 45.00 - 65.00 Hz 0.01 49.90 Restore frequency value
tRestore 0.000 - 60.000 s 0.001 0.000 Restore time delay
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Technical manual

Table 407: SAPFRC (81R) Monitored data

STARTDUR REAL - % Start duration in percents of the total
operation time
Rate-of-change frequency protection SAPFRC (81) is used to detect fast power system frequency
changes at an early stage. SAPFRC (81) has a settable definite time delay. If the rate-of-change of
frequency remains below the set value, for negative rate-of-change, for a time period equal to the
chosen time delay, the TRIP signal is issued. If the rate-of-change of frequency remains above the
set value, for positive rate-of-change, for a time period equal to the chosen time delay, the TRIP
signal is issued. To avoid an unwanted trip due to uncertain frequency measurement at low
voltage magnitude a voltage controlled blocking of the function is available from the
preprocessing function. If the voltage is lower than the set blocking voltage in the preprocessing
function the function is blocked and no PICKUP or TRIP signal is issued. If the frequency recovers,
after a frequency decrease, a restore signal is issued.
The rate-of-change of the fundamental frequency of the selected voltage is measured

continuously, and compared with the set value, PUFreqGrad. Rate-of-change frequency protection
SAPFRC (81) is also dependent on the voltage magnitude. If the voltage magnitude decreases
below the setting MinValFreqMeas in the preprocessing function, which is set as a percentage of a
global base voltage parameter, SAPFRC (81) is blocked, and the output BLKDMAGN is issued. The
sign of the setting PUFreqGrad, controls if SAPFRC (81) reacts on a positive or on a negative
change in frequency. If SAPFRC (81) is used for decreasing frequency that is, the setting
PUFreqGrad has been given a negative value, and a trip signal has been issued, then a 100 ms
pulse is issued on the RESTORE output, when the frequency recovers to a value higher than the
setting RestoreFreq. A positive setting of PUFreqGrad, sets SAPFRC (81) to PICKUP and TRIP for
frequency increases.
10.3.7.2 Time delay M14970-10 v6
Rate-of-change frequency protection SAPFRC (81) has a settable definite time delay, tTrip. .
Trip signal issuing requires that the rate-of-change of frequency condition continues for at least
the user set time delay, tTrip. If the PICKUP condition, with respect to the measured frequency
ceases during the delay time, and is not fulfilled again within a user defined reset time, tReset, the
PICKUP output is reset, after that the defined reset time has elapsed. Here it should be noted that
after leaving the hysteresis area, the PICKUP condition must be fulfilled again and it is not
sufficient for the signal to only return back into the hysteresis area.
The RESTORE output of SAPFRC (81) is set, after a time delay equal to the setting of tRestore,
when the measured frequency has returned to the level corresponding to RestoreFreq, after an
issue of the TRIP output signal. If tRestore is set to 0.000 s the restore functionality is disabled,
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Technical manual
and no output will be given. The restore functionality is only active for lowering frequency
conditions and the restore sequence is disabled if a new negative frequency gradient is detected
during the restore period, defined by the settings RestoreFreq and tRestore.
10.3.7.3 Blocking M14970-23 v5
Rate-of-change frequency protection (SAPFRC, 81) can be partially or totally blocked, by binary

BLKREST: blocks the RESTORE output
function, both the PICKUP and the TRIP outputs are blocked.
10.3.7.4 Design M14970-34 v6
Rate-of-change frequency protection (SAPFRC, 81) measuring element continuously measures the
frequency of the selected voltage and compares it to the setting PUFreqGrad. The frequency
signal is filtered to avoid transients due to power system switchings and faults. The time
integrator operates with a definite delay time. When the frequency has returned back to the
setting of RestoreFreq, the RESTORE output is issued after the time delay tRestore, if the TRIP
signal has earlier been issued. The sign of the setting PUFreqGrad is essential, and controls if the
function is used for raising or lowering frequency conditions. The design of SAPFRC (81) is
schematically described in figure 364.
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Technical manual
BLOCK
BLKTRIP
BLKRESET BLOCK
OR
Voltage Comparator BLKDMAGN

V < IntBlockLevel
Pickup
Rate-of-Change Time integrator &
Comparator
of Frequency Trip
If
Definite Time Delay Output
[PickupFreqGrad<0 PICKUP Logic PICKUP
AND
TimeDlyOperate
df/dt < PickupFreqGrad]
OR
TimeDlyReset
[PickupFreqGrad>0
AND
TRIP
df/dt > PickupFreqGrad]
Then
PICKUP
100 ms
Frequency Comparator RESTORE

TimeDlyRestore
f > RestoreFreq
en05000835_ansi.vsd
Figure 364: Simplified logic diagram for SAPFRC (81)

M14976-1 v10
Table 408: SAPFRC (81) Technical data

Trip value, pickup function (-10.00-10.00) Hz/s ±10.0 mHz/s
Trip value, restore enable frequency (45.00-65.00) Hz ±2.0 mHz
Definite restore time delay (0.000-60.000) s ±0.2% or ±100 ms whichever is
greater
Definite time delay for frequency gradient trip (0.000-60.000) s ±0.2% or ±120 ms whichever is
greater
Definite reset time delay (0.000-60.000) s ±0.2% or ±250 ms whichever is
greater
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Technical manual
654
Section 11 Multipurpose protection
11.1 General current and voltage protection CVGAPC IP14552-1 v2
M14886-2 v3

General current and voltage CVGAPC 2(I>/U<) -
protection
M13083-11 v9
The General current and voltage protection (CVGAPC) can be utilized as a negative sequence
current protection detecting unsymmetrical conditions such as open phase or unsymmetrical
faults.
CVGAPC can also be used to improve phase selection for high resistive ground faults, outside the
distance protection reach, for the transmission line. Three functions are used, which measures the
neutral current and each of the three phase voltages. This will give an independence from load
currents and this phase selection will be used in conjunction with the detection of the ground fault
from the directional ground fault protection function.
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Technical manual
CVGAPC
I3P* TRIP
V3P* TROC1
BLOCK TROC2
BLKOC1 TRUC1
BLKOC1TR TRUC2
ENMLTOC1 TROV1
BLKOC2 TROV2
BLKOC2TR TRUV1
ENMLTOC2 TRUV2
BLKUC1 PICKUP
BLKUC1TR PU_OC1
BLKUC2 PU_OC2
BLKUC2TR PU_UC1
BLKOV1 PU_UC2
BLKOV1TR PU_OV1
BLKOV2 PU_OV2
BLKOV2TR PU_UV1
BLKUV1 PU_UV2
BLKUV1TR BLK2ND
BLKUV2 DIROC1
BLKUV2TR DIROC2
VDIRLOW
CURRENT
ICOSFI
VOLTAGE
VIANGLE
Figure 365: CVGAPC function block
11.1.4 Signals
Table 409: CVGAPC Input signals

SIGNAL
SIGNAL
BLKOC1 BOOLEAN 0 Block of over current function OC1
BLKOC1TR BOOLEAN 0 Block of trip for over current function OC1
ENMLTOC1 BOOLEAN 0 When activated, the current multiplier is in use for OC1
BLKOC2 BOOLEAN 0 Block of over current function OC2
BLKOC2TR BOOLEAN 0 Block of trip for over current function OC2
ENMLTOC2 BOOLEAN 0 When activated, the current multiplier is in use for OC2
BLKUC1 BOOLEAN 0 Block of under current function UC1
BLKUC1TR BOOLEAN 0 Block of trip for under current function UC1
BLKUC2 BOOLEAN 0 Block of under current function UC2
BLKUC2TR BOOLEAN 0 Block of trip for under current function UC2
BLKOV1 BOOLEAN 0 Block of over voltage function OV1
BLKOV1TR BOOLEAN 0 Block of trip for over voltage function OV1
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BLKOV2 BOOLEAN 0 Block of over voltage function OV2
BLKOV2TR BOOLEAN 0 Block of trip for over voltage function OV2
BLKUV1 BOOLEAN 0 Block of under voltage function UV1
BLKUV1TR BOOLEAN 0 Block of trip for under voltage function UV1
BLKUV2 BOOLEAN 0 Block of under voltage function UV2
BLKUV2TR BOOLEAN 0 Block of trip for under voltage function UV2
Table 410: CVGAPC Output signals

TROC1 BOOLEAN Trip signal from overcurrent function OC1
TROC2 BOOLEAN Trip signal from overcurrent function OC2
TRUC1 BOOLEAN Trip signal from undercurrent function UC1
TRUC2 BOOLEAN Trip signal from undercurrent function UC2
TROV1 BOOLEAN Trip signal from overvoltage function OV1
TROV2 BOOLEAN Trip signal from overvoltage function OV2
TRUV1 BOOLEAN Trip signal from undervoltage function UV1
TRUV2 BOOLEAN Trip signal from undervoltage function UV2
PU_OC1 BOOLEAN Pickup signal from overcurrent function OC1
PU_OC2 BOOLEAN Pickup signal from overcurrent function OC2
PU_UC1 BOOLEAN Pickup signal from undercurrent function UC1
PU_UC2 BOOLEAN Pickup signal from undercurrent function UC2
PU_OV1 BOOLEAN Pickup signal from overvoltage function OV1
PU_OV2 BOOLEAN Pickup signal from overvoltage function OV2
PU_UV1 BOOLEAN Pickup signal from undervoltage function UV1
PU_UV2 BOOLEAN Pickup signal from undervoltage function UV2
BLK2ND BOOLEAN Second harmonic block signal
DIROC1 INTEGER Directional mode of OC1 (nondir, forward,reverse)
DIROC2 INTEGER Directional mode of OC2 (nondir, forward,reverse)
VDIRLOW BOOLEAN Low voltage for directional polarization
CURRENT REAL Measured current value
ICOSFI REAL Measured current multiplied with cos (Phi)
VOLTAGE REAL Measured voltage value
VIANGLE REAL Angle between voltage and current
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Technical manual
11.1.5 Settings
Table 411: CVGAPC Group settings (basic)

Enabled
CurrentInput Phase A - - MaxPh Select current signal which will be
Phase B measured inside function
Phase C
PosSeq
NegSeq
3*ZeroSeq
MaxPh
MinPh
UnbalancePh
Phase AB
Phase BC
Phase CA
MaxPh-Ph
MinPh-Ph
UnbalancePh-Ph
VoltageInput Phase A - - MaxPh Select voltage signal which will be
Phase B measured inside function
Phase C
PosSeq
-NegSeq
-3*ZeroSeq
MaxPh
MinPh
UnbalancePh
Phase AB
Phase BC
Phase CA
MaxPh-Ph
MinPh-Ph
UnbalancePh-Ph
OperHarmRestr Disabled - - Disabled Disable/Enable operation of 2nd harmonic
Enabled restrain
l_2nd/l_fund 10.0 - 50.0 % 1.0 20.0 Ratio of second to fundamental current
harmonic in %
BlkLevel2nd 10 - 5000 %IB 1 5000 Harm analyse disabled above this current
level in % of fundamental current
EnRestrainCurr Disabled - - Disabled Disable/Enable current restrain function
Enabled
RestrCurrInput PosSeq - - PosSeq Select current signal which will be used for
NegSeq current restrain
3*ZeroSeq
Max
RestrCurrCoeff 0.00 - 5.00 - 0.01 0.00 Restraining current coefficient
RCADir -180 - 180 Deg 1 -75 Relay Characteristic Angle
ROADir 1 - 90 Deg 1 75 Relay Operate Angle
LowVolt_VM 0.0 - 5.0 %VB 0.1 0.5 Below this level in % of VBase setting
ActLowVolt takes over
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Technical manual

Operation_OC1 Disabled - - Disabled Disable/Enable Operation of OC1
Enabled
PickupCurr_OC1 2.0 - 5000.0 %IB 1.0 120.0 Operate current level for OC1 in % of IBase
CurveType_OC1 ANSI Ext. inv. - - ANSI Def. Time Selection of time delay curve type for OC1
ANSI Very inv.
ANSI Norm. inv.
ANSI Mod. inv.
ANSI Def. Time
L.T.E. inv.
L.T.V. inv.
L.T. inv.
IEC Norm. inv.
IEC Very inv.
IEC inv.
IEC Ext. inv.
IEC S.T. inv.
IEC L.T. inv.
IEC Def. Time
Programmable
RI type
RD type
tDef_OC1 0.00 - 6000.00 s 0.01 0.50 Definite time delay OC1
TD_OC1 0.05 - 999.00 - 0.01 0.30 Time multiplier for the dependent time
delay for OC1
IBase
tMin_OC1 0.00 - 6000.00 s 0.01 0.05 Minimum operate time for IEC IDMT curves
for OC1
VCntrlMode_OC1 Voltage control - - Disabled Control mode for voltage controlled OC1
Disabled function
VDepMode_OC1 Step - - Step Voltage dependent mode OC1 (step, slope)
Slope
VDepFact_OC1 0.02 - 5.00 - 0.01 1.00 Multiplying factor for current pickup when
OC1 is voltage dependent
VLowLimit_OC1 1.0 - 200.0 %VB 0.1 50.0 Voltage low limit setting OC1 in % of
UBase
VHighLimit_OC1 1.0 - 200.0 %VB 0.1 100.0 Voltage high limit setting OC1 in % of
UBase
HarmRestr_OC1 Disabled - - Disabled Enable block of OC1 by 2nd harmonic
Enabled restrain
DirMode_OC1 Non-directional - - Non-directional Directional mode of OC1 (nondir, forward,
Forward reverse)
Reverse
DirPrinc_OC1 I&V - - I&V Measuring on IandV or IcosPhiandV for
IcosPhi&V OC1
ActLowVolt1_VM Non-directional - - Non-directional Low voltage level action for Dir_OC1
Block (Nodir, Blk, Mem)
Memory
Operation_OC2 Disabled - - Disabled Disable/Enable Operation od OC2
Enabled
PickupCurr_OC2 2.0 - 5000.0 %IB 1.0 120.0 Operate current level for OC2 in % of IBase
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Technical manual

CurveType_OC2 ANSI Ext. inv. - - ANSI Def. Time Selection of time delay curve type for OC2
ANSI Very inv.
ANSI Norm. inv.
ANSI Mod. inv.
ANSI Def. Time
L.T.E. inv.
L.T.V. inv.
L.T. inv.
IEC Norm. inv.
IEC Very inv.
IEC inv.
IEC Ext. inv.
IEC S.T. inv.
IEC L.T. inv.
IEC Def. Time
Programmable
RI type
RD type
tDef_OC2 0.00 - 6000.00 s 0.01 0.50 Definite time delay OC2
TD_OC2 0.05 - 999.00 - 0.01 0.30 Time multiplier for the dependent time
delay for OC2
IBase
tMin_OC2 0.00 - 6000.00 s 0.01 0.05 Minimum operate time for IEC IDMT curves
for OC2
VCntrlMode_OC2 Voltage control - - Disabled Control mode for voltage controlled OC2
Disabled function
VDepMode_OC2 Step - - Step Voltage dependent mode OC2 (step, slope)
Slope
VDepFact_OC2 0.02 - 5.00 - 0.01 1.00 Multiplying factor for current pickup when
OC2 is voltage dependent
VLowLimit_OC2 1.0 - 200.0 %VB 0.1 50.0 Voltage low limit setting OC2 in % of
UBase
VHighLimit_OC2 1.0 - 200.0 %VB 0.1 100.0 Voltage high limit setting OC2 in % of
UBase
HarmRestr_OC2 Disabled - - Disabled Enable block of OC2 by 2nd harmonic
Enabled restrain
DirMode_OC2 Non-directional - - Non-directional Directional mode of OC2 (nondir, forward,
Forward reverse)
Reverse
DirPrinc_OC2 I&V - - I&V Measuring on IandV or IcosPhiandV for
IcosPhi&V OC2
ActLowVolt2_VM Non-directional - - Non-directional Low voltage level action for Dir_OC2
Block (Nodir, Blk, Mem)
Memory
Operation_UC1 Disabled - - Disabled Disable/Enable operation of UC1
Enabled
EnBlkLowI_UC1 Disabled - - Disabled Enable internal low current level blocking
Enabled for UC1
BlkLowCurr_UC1 0 - 150 %IB 1 20 Internal low current blocking level for UC1
in % of IBase
PickupCurr_UC1 2.0 - 150.0 %IB 1.0 70.0 Operate undercurrent level for UC1 in % of
IBase
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Technical manual

tDef_UC1 0.00 - 6000.00 s 0.01 0.50 Definite time delay of UC1
tResetDef_UC1 0.00 - 6000.00 s 0.01 0.00 Reset time delay used in IEC Definite Time
curve UC1
HarmRestr_UC1 Disabled - - Disabled Enable block of UC1 by 2nd harmonic
Enabled restrain
Operation_UC2 Disabled - - Disabled Disable/Enable operation of UC2
Enabled
EnBlkLowI_UC2 Disabled - - Disabled Enable internal low current level blocking
Enabled for UC2
BlkLowCurr_UC2 0 - 150 %IB 1 20 Internal low current blocking level for UC2
in % of IBase
PickupCurr_UC2 2.0 - 150.0 %IB 1.0 70.0 Operate undercurrent level for UC2 in % of
IBase
tDef_UC2 0.00 - 6000.00 s 0.01 0.50 Definite time delay of UC2
HarmRestr_UC2 Disabled - - Disabled Enable block of UC2 by 2nd harmonic
Enabled restrain
Operation_OV1 Disabled - - Disabled Disable/Enable operation of OV1
Enabled
PickupVolt_OV1 2.0 - 200.0 %VB 0.1 150.0 Operate voltage level for OV1 in % of
VBase
CurveType_OV1 Definite time - - Definite time Selection of time delay curve type for OV1
Inverse curve A
Inverse curve B
Inverse curve C
Prog. inv. curve
tDef_OV1 0.00 - 6000.00 s 0.01 1.00 Operate time delay in sec for definite time
use of OV1
tMin_OV1 0.00 - 6000.00 s 0.01 0.05 Minimum operate time for Inverse-Time
curves for OV1
TD_OV1 0.05 - 999.00 - 0.01 0.30 Time multiplier for the dependent time
delay for OV1
Operation_OV2 Disabled - - Disabled Disable/Enable operation of OV2
Enabled
PickupVolt_OV2 2.0 - 200.0 %VB 0.1 150.0 Operate voltage level for OV2 in % of
VBase
CurveType_OV2 Definite time - - Definite time Selection of time delay curve type for OV2
Inverse curve A
Inverse curve B
Inverse curve C
Prog. inv. curve
tDef_OV2 0.00 - 6000.00 s 0.01 1.00 Operate time delay in sec for definite time
use of OV2
tMin_OV2 0.00 - 6000.00 s 0.01 0.05 Minimum operate time for Inverse-Time
curves for OV2
TD_OV2 0.05 - 999.00 - 0.01 0.30 Time multiplier for the dependent time
delay for OV2
Operation_UV1 Disabled - - Disabled Disable/Enable operation of UV1
Enabled
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Technical manual

PickupVolt_UV1 2.0 - 150.0 %VB 0.1 50.0 Operate undervoltage level for UV1 in % of
VBase
CurveType_UV1 Definite time - - Definite time Selection of time delay curve type for UV1
Inverse curve A
Inverse curve B
Prog. inv. curve
tDef_UV1 0.00 - 6000.00 s 0.01 1.00 Operate time delay in sec for definite time
use of UV1
tMin_UV1 0.00 - 6000.00 s 0.01 0.05 Minimum operate time for Inverse-Time
curves for UV1
TD_UV1 0.05 - 999.00 - 0.01 0.30 Time multiplier for the dependent time
delay for UV1
EnBlkLowV_UV1 Disabled - - Enabled Enable internal low voltage level blocking
Enabled for UV1
BlkLowVolt_UV1 0.0 - 5.0 %VB 0.1 0.5 Internal low voltage blocking level for UV1
in % of VBase
Operation_UV2 Disabled - - Disabled Disable/Enable operation of UV2
Enabled
PickupVolt_UV2 2.0 - 150.0 %VB 0.1 50.0 Operate undervoltage level for UV2 in % of
VBase
CurveType_UV2 Definite time - - Definite time Selection of time delay curve type for UV2
Inverse curve A
Inverse curve B
Prog. inv. curve
tDef_UV2 0.00 - 6000.00 s 0.01 1.00 Operate time delay in sec for definite time
use of UV2
tMin_UV2 0.00 - 6000.00 s 0.01 0.05 Minimum operate time for Inverse-Time
curves for UV2
TD_UV2 0.05 - 999.00 - 0.01 0.30 Time multiplier for the dependent time
delay for UV2
EnBlkLowV_UV2 Disabled - - Enabled Enable internal low voltage level blocking
Enabled for UV2
BlkLowVolt_UV2 0.0 - 5.0 %VB 0.1 0.5 Internal low voltage blocking level for UV2
in % of VBase
Table 412: CVGAPC Group settings (advanced)

MultPU_OC1 1.0 - 10.0 - 0.1 2.0 Multiplier for scaling the current setting
value for OC1
ResCrvType_OC1 Instantaneous - - Instantaneous Selection of reset curve type for OC1
IEC Reset
ANSI reset
tResetDef_OC1 0.00 - 6000.00 s 0.01 0.00 Reset time delay used in IEC Definite Time
curve OC1
P_OC1 0.001 - 10.000 - 0.001 0.020 Parameter P for customer programmable
curve for OC1
A_OC1 0.000 - 999.000 - 0.001 0.140 Parameter A for customer programmable
curve for OC1
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Technical manual

B_OC1 0.000 - 99.000 - 0.001 0.000 Parameter B for customer programmable
curve for OC1
C_OC1 0.000 - 1.000 - 0.001 1.000 Parameter C for customer programmable
curve for OC1
PR_OC1 0.005 - 3.000 - 0.001 0.500 Parameter PR for customer programmable
curve for OC1
TR_OC1 0.005 - 600.000 - 0.001 13.500 Parameter TR for customer programmable
curve for OC1
CR_OC1 0.1 - 10.0 - 0.1 1.0 Parameter CR for customer programmable
curve for OC1
MultPU_OC2 1.0 - 10.0 - 0.1 2.0 Multiplier for scaling the current setting
value for OC2
ResCrvType_OC2 Instantaneous - - Instantaneous Selection of reset curve type for OC2
IEC Reset
ANSI reset
tResetDef_OC2 0.00 - 6000.00 s 0.01 0.00 Reset time delay used in IEC Definite Time
curve OC2
P_OC2 0.001 - 10.000 - 0.001 0.020 Parameter P for customer programmable
curve for OC2
A_OC2 0.000 - 999.000 - 0.001 0.140 Parameter A for customer programmable
curve for OC2
B_OC2 0.000 - 99.000 - 0.001 0.000 Parameter B for customer programmable
curve for OC2
C_OC2 0.000 - 1.000 - 0.001 1.000 Parameter C for customer programmable
curve for OC2
PR_OC2 0.005 - 3.000 - 0.001 0.500 Parameter PR for customer programmable
curve for OC2
TR_OC2 0.005 - 600.000 - 0.001 13.500 Parameter TR for customer programmable
curve for OC2
CR_OC2 0.1 - 10.0 - 0.1 1.0 Parameter CR for customer programmable
curve for OC2
tResetDef_UC2 0.00 - 6000.00 s 0.01 0.00 Reset time delay used in IEC Definite Time
curve UC2
ResCrvType_OV1 Instantaneous - - Instantaneous Selection of reset curve type for OV1
Frozen timer
Linearly
decreased
tResetDef_OV1 0.00 - 6000.00 s 0.01 0.00 Reset time delay in sec for definite time
use of OV1
tResetIDMT_OV1 0.00 - 6000.00 s 0.01 0.00 Reset time delay in sec for Inverse-Time
curves for OV1
A_OV1 0.005 - 999.000 - 0.001 0.140 Parameter A for customer programmable
curve for OV1
B_OV1 0.500 - 99.000 - 0.001 1.000 Parameter B for customer programmable
curve for OV1
C_OV1 0.000 - 1.000 - 0.001 1.000 Parameter C for customer programmable
curve for OV1
D_OV1 0.000 - 10.000 - 0.001 0.000 Parameter D for customer programmable
curve for OV1
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Technical manual

P_OV1 0.001 - 10.000 - 0.001 0.020 Parameter P for customer programmable
curve for OV1
ResCrvType_OV2 Instantaneous - - Instantaneous Selection of reset curve type for OV2
Frozen timer
Linearly
decreased
tResetDef_OV2 0.00 - 6000.00 s 0.01 0.00 Reset time delay in sec for definite time
use of OV2
tResetIDMT_OV2 0.00 - 6000.00 s 0.01 0.00 Reset time delay in sec for Inverse-Time
curves for OV2
A_OV2 0.005 - 999.000 - 0.001 0.140 Parameter A for customer programmable
curve for OV2
B_OV2 0.500 - 99.000 - 0.001 1.000 Parameter B for customer programmable
curve for OV2
C_OV2 0.000 - 1.000 - 0.001 1.000 Parameter C for customer programmable
curve for OV2
D_OV2 0.000 - 10.000 - 0.001 0.000 Parameter D for customer programmable
curve for OV2
P_OV2 0.001 - 10.000 - 0.001 0.020 Parameter P for customer programmable
curve for OV2
ResCrvType_UV1 Instantaneous - - Instantaneous Selection of reset curve type for UV1
Frozen timer
Linearly
decreased
tResetDef_UV1 0.00 - 6000.00 s 0.01 0.00 Reset time delay in sec for definite time
use of UV1
tResetIDMT_UV1 0.00 - 6000.00 s 0.01 0.00 Reset time delay in sec for Inverse-Time
curves for UV1
A_UV1 0.005 - 999.000 - 0.001 0.140 Parameter A for customer programmable
curve for UV1
B_UV1 0.500 - 99.000 - 0.001 1.000 Parameter B for customer programmable
curve for UV1
C_UV1 0.000 - 1.000 - 0.001 1.000 Parameter C for customer programmable
curve for UV1
D_UV1 0.000 - 10.000 - 0.001 0.000 Parameter D for customer programmable
curve for UV1
P_UV1 0.001 - 10.000 - 0.001 0.020 Parameter P for customer programmable
curve for UV1
ResCrvType_UV2 Instantaneous - - Instantaneous Selection of reset curve type for UV2
Frozen timer
Linearly
decreased
tResetDef_UV2 0.00 - 6000.00 s 0.01 0.00 Reset time delay in sec for definite time
use of UV2
tResetIDMT_UV2 0.00 - 6000.00 s 0.01 0.00 Reset time delay in sec for Inverse-Time
curves for UV2
A_UV2 0.005 - 999.000 - 0.001 0.140 Parameter A for customer programmable
curve for UV2
B_UV2 0.500 - 99.000 - 0.001 1.000 Parameter B for customer programmable
curve for UV2
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Technical manual

C_UV2 0.000 - 1.000 - 0.001 1.000 Parameter C for customer programmable
curve for UV2
D_UV2 0.000 - 10.000 - 0.001 0.000 Parameter D for customer programmable
curve for UV2
P_UV2 0.001 - 10.000 - 0.001 0.020 Parameter P for customer programmable
curve for UV2
Table 413: CVGAPC Non group settings (basic)

groups

Table 414: CVGAPC Monitored data

DIROC1 INTEGER 1=Forward - Directional mode of OC1 (nondir,
0=Non- forward,reverse)
directional
2=Reverse
DIROC2 INTEGER 1=Forward - Directional mode of OC2 (nondir,
0=Non- forward,reverse)
directional
2=Reverse
CURRENT REAL - A Measured current value
ICOSFI REAL - A Measured current multiplied with cos (Phi)
VOLTAGE REAL - kV Measured voltage value
VIANGLE REAL - deg Angle between voltage and current
11.1.7.1 Measured quantities within CVGAPC M13751-3 v3
General current and voltage protection (CVGAPC) function is always connected to three-phase
current and three-phase voltage input in the configuration tool, but it will always measure only one
current and one voltage quantity selected by the end user in the setting tool.
The user can select to measure one of the current quantities shown in table 415.
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Technical manual
Table 415: Current selection for CVGAPC function

Set value for the
parameter Comment
CurrentInput
1 PhaseA CVGAPC function will measure the phase A current phasor
2 PhaseB CVGAPC function will measure the phase B current phasor
3 PhaseC CVGAPC function will measure the phase C current phasor
4 PosSeq CVGAPC function will measure internally calculated positive sequence current phasor
5 NegSeq CVGAPC function will measure internally calculated negative sequence current phasor
6 3ZeroSeq CVGAPC function will measure internally calculated zero sequence current phasor
multiplied by factor 3
7 MaxPh CVGAPC function will measure current phasor of the phase with maximum magnitude
8 MinPh CVGAPC function will measure current phasor of the phase with minimum magnitude
9 UnbalancePh CVGAPC function will measure magnitude of unbalance current, which is internally
calculated as the algebraic magnitude difference between the current phasor of the
phase with maximum magnitude and current phasor of the phase with minimum
magnitude. Phase angle will be set to 0° all the time
10 PhaseA-PhaseB CVGAPC function will measure the current phasor internally calculated as the vector
difference between the phase A current phasor and phase B current phasor (IA-IB)
11 PhaseB-PhaseC CVGAPC function will measure the current phasor internally calculated as the vector
difference between the phase B current phasor and phase C current phasor (IB-IC)
12 PhaseC-PhaseA CVGAPC function will measure the current phasor internally calculated as the vector
difference between the phase C current phasor and phase A current phasor ( IC-IA)
13 MaxPh-Ph CVGAPC function will measure ph-ph current phasor with the maximum magnitude
14 MinPh-Ph CVGAPC function will measure ph-ph current phasor with the minimum magnitude
15 UnbalancePh-Ph CVGAPC function will measure magnitude of unbalance current, which is internally
calculated as the algebraic magnitude difference between the ph-ph current phasor
with maximum magnitude and ph-ph current phasor with minimum magnitude.
Phase angle will be set to 0° all the time
The user can select to measure one of the voltage quantities shown in table 416:
Table 416: Voltage selection for CVGAPC function

Set value for the
parameter Comment
VoltageInput
1 PhaseA CVGAPC function will measure the phase A voltage phasor
2 PhaseB CVGAPC function will measure the phase B voltage phasor
3 PhaseC CVGAPC function will measure the phase C voltage phasor
4 PosSeq CVGAPC function will measure internally calculated positive sequence voltage phasor
5 -NegSeq CVGAPC function will measure internally calculated negative sequence voltage
phasor. This voltage phasor will be intentionally rotated for 180° in order to enable
easier settings for the directional feature when used.
6 -3ZeroSeq CVGAPC function will measure internally calculated zero sequence voltage phasor
multiplied by factor 3. This voltage phasor will be intentionally rotated for 180° in
order to enable easier settings for the directional feature when used.
7 MaxPh CVGAPC function will measure voltage phasor of the phase with maximum magnitude
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Set value for the

parameter Comment
VoltageInput
8 MinPh CVGAPC function will measure voltage phasor of the phase with minimum magnitude
9 UnbalancePh CVGAPC function will measure magnitude of unbalance voltage, which is internally
calculated as the algebraic magnitude difference between the voltage phasor of the
phase with maximum magnitude and voltage phasor of the phase with minimum
magnitude. Phase angle will be set to 0° all the time
10 PhaseA-PhaseB CVGAPC function will measure the voltage phasor internally calculated as the vector
difference between the phase A voltage phasor and phase B voltage phasor (VA-VB)
11 PhaseB-PhaseC CVGAPC function will measure the voltage phasor internally calculated as the vector
difference between the phase B voltage phasor and phase C voltage phasor (VB-VC)
12 PhaseC-PhaseA CVGAPC function will measure the voltage phasor internally calculated as the vector
difference between the phase C voltage phasor and phase A voltage phasor ( VC-VA)
13 MaxPh-Ph CVGAPC function will measure ph-ph voltage phasor with the maximum magnitude
14 MinPh-Ph CVGAPC function will measure ph-ph voltage phasor with the minimum magnitude
15 UnbalancePh-Ph CVGAPC function will measure magnitude of unbalance voltage, which is internally
calculated as the algebraic magnitude difference between the ph-ph voltage phasor
with maximum magnitude and ph-ph voltage phasor with minimum magnitude.
Phase angle will be set to 0° all the time
It is important to notice that the voltage selection from table 416 is always applicable regardless
the actual external VT connections. The three-phase VT inputs can be connected to IED as either
three phase-to-ground voltages VA, VB & VC or three phase-to-phase voltages VAB, VBC & VCA). This
information about actual VT connection is entered as a setting parameter for the pre-processing
block, which will then take automatic care about it.
The user can select one of the current quantities shown in table 417 for built-in current restraint
feature:
Table 417: Restraint current selection for CVGAPC function

Set value for the
parameter RestrCurr Comment
1 PosSeq CVGAPC function will measure internally calculated positive sequence current phasor
2 NegSeq CVGAPC function will measure internally calculated negative sequence current phasor
3 3ZeroSeq CVGAPC function will measure internally calculated zero sequence current phasor
multiplied by factor 3
4 MaxPh CVGAPC function will measure current phasor of the phase with maximum magnitude
11.1.7.2 Base quantities for CVGAPC function M13751-133 v3
The parameter settings for the base quantities, which represent the base (100%) for pickup levels
of all measuring stages, shall be entered as setting parameters for every CVGAPC function.
Base current shall be entered as:
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Technical manual
1. rated phase current of the protected object in primary amperes, when the measured Current
Quantity is selected from 1 to 9, as shown in table 415.
2. rated phase current of the protected object in primary amperes multiplied by √3
(1.732*Iphase), when the measured Current Quantity is selected from 10 to 15, as shown in
table 415.
Base voltage shall be entered as:
1. rated phase-to-ground voltage of the protected object in primary kV, when the measured
Voltage Quantity is selected from 1 to 9, as shown in table 416.
2. rated phase-to-phase voltage of the protected object in primary kV, when the measured
Voltage Quantity is selected from 10 to 15, as shown in table 416.
11.1.7.3 Built-in overcurrent protection steps M13751-136 v3
Two overcurrent protection steps are available. They are absolutely identical and therefore only
one will be explained here.
Overcurrent step simply compares the magnitude of the measured current quantity (see table 415)
with the set pickup level. Non-directional overcurrent step will pickup if the magnitude of the
measured current quantity is bigger than this set level. However depending on other enabled built-
in features this overcurrent pickup might not cause the overcurrent step pickup signal. Pickup
signal will only come if all of the enabled built-in features in the overcurrent step are fulfilled at the
same time.
Second harmonic feature M13751-254 v2

The overcurrent protection step can be restrained by a second harmonic component in the
measured current quantity (see table 415). However it shall be noted that this feature is not
applicable when one of the following measured currents is selected:
• PosSeq (positive sequence current)

• NegSeq (negative sequence current)
• UnbalancePh (unbalance phase current)
• UnbalancePh-Ph (unbalance ph-ph current)
This feature will simple prevent overcurrent step pickup if the second-to-first harmonic ratio in the
measured current exceeds the set level.
Directional feature M13751-263 v5

The overcurrent protection step operation can be made dependent on the relevant phase angle
between measured current phasor (see table 415) and measured voltage phasor (see table 416). In
protection terminology it means that the General currrent and voltage protection (CVGAPC)
function can be made directional by enabling this built-in feature. In that case overcurrent
protection step will only trip if the current flow is in accordance with the set direction (Forward,
which means towards the protected object, or Reverse, which means from the protected object).
For this feature it is of the outmost importance to understand that the measured voltage phasor
(see table 416) and measured current phasor (see table 415) will be used for directional decision.
Therefore it is the sole responsibility of the end user to select the appropriate current and voltage
signals in order to get a proper directional decision. CVGAPC function will NOT do this
automatically. It will simply use the current and voltage phasors selected by the end user to check
for the directional criteria.
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Table 418 gives an overview of the typical choices (but not the only possible ones) for these two
quantities from traditional directional relays.
Table 418: Typical current and voltage choices for directional feature
Set value for the Set value for the
parameter parameter Comment
CurrentInput VoltageInput
PosSeq PosSeq Directional positive sequence overcurrent function is obtained.
Typical setting for RCADir is from 45° to 90° depending on the power
system voltage level (X/R ratio)
NegSeq -NegSeq Directional negative sequence overcurrent function is obtained.
Typical setting for RCADir is from 45° to 90° depending on the power
system voltage level (X/R ratio)
3ZeroSeq -3ZeroSeq Directional zero sequence overcurrent function is obtained. Typical
setting for RCADir is from 0° to 90° depending on the power system
grounding (that is, solidly grounding, grounding via resistor)
Phase1 Phase2-Phase3 Directional overcurrent function for the first phase is obtained.
Typical setting for RCADir is +30° or +45°
Phase2 Phase3-Phase1 Directional overcurrent function for the second phase is obtained.
Phase3 Phase1-Phase2 Directional overcurrent function for the third phase is obtained.
Unbalance current or voltage measurement shall not be used when the directional feature is
enabled.
Two types of directional measurement principles are available, I & V and IcosPhi&V. The first
principle, referred to as "I & V" in the parameter setting tool, checks that:
• the magnitude of the measured current is bigger than the set pick-up level
• the phasor of the measured current is within the operating region (defined by the relay trip
angle, ROADir parameter setting; see figure 366).
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V=-3V0
RCADir
Ipickup ROADir I=3Io
Operate region
mta line
en05000252_anis.vsd
IEC05000252-ANIS V1 EN-US
Figure 366: I & V directional operating principle for CVGAPC function
where:
RCADir is 75°
ROADir is 50°
The second principle, referred to as "IcosPhi&V" in the parameter setting tool, checks that:
• that the product I·cos(Φ) is bigger than the set pick-up level, where Φ is angle between the
current phasor and the mta line
• that the phasor of the measured current is within the operating region (defined by the
I·cos(Φ) straight line and the relay trip angle, ROADir parameter setting; see figure 366).
V=-3V0
RCADir
Ipickup ROADir F I=3Io
Operate region
mta line
en05000253_ansi.vsd
Figure 367: CVGAPC, IcosPhi&V directional operating principle
where:
RCADir is 75°
ROADir is 50°
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Technical manual
Note that it is possible to decide by a parameter setting how the directional feature shall behave
when the magnitude of the measured voltage phasor falls below the pre-set value. User can select
one of the following three options:
• Non-directional (operation allowed for low magnitude of the reference voltage)

• Block (operation prevented for low magnitude of the reference voltage)
• Memory (memory voltage shall be used to determine direction of the current)
It shall also be noted that the memory duration is limited in the algorithm to 100 ms. After that
time the current direction will be locked to the one determined during memory time and it will re-
set only if the current fails below set pickup level or voltage goes above set voltage memory limit.
Voltage restraint/control feature M13751-326 v4

The overcurrent protection step operation can be made dependent of a measured voltage
quantity (see table 416). Practically then the pickup level of the overcurrent step is not constant
but instead decreases with the decrease in the magnitude of the measured voltage quantity. Two
different types of dependencies are available:
• Voltage restraint overcurrent (when setting parameter VDepMode_OC1=Slope)
OC1 Stage Pickup Level
PickupCurr_OC1
VDepFact_OC1 * PickupCurr_OC1
VLowLimit_OC1 VHighLimit_OC1
Selected Voltage
Magnitude
en05000324_ansi.vsd
Figure 368: Example for OC1 step current pickup level variation as function of measured
voltage magnitude in Slope mode of operation
• Voltage controlled overcurrent (when setting parameter VDepMode_OC1=Step)
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OC1 Stage Pickup Level
PickupCurr_OC1
VDepFact_OC1 *
PickupCurr_OC1
VHighLimit_OC1 Selected Voltage Magnitude
en05000323_ansi.vsd
Figure 369: Example for OC1 step current pickup level variation as function of measured
voltage magnitude in Step mode of operation
This feature will simply change the set overcurrent pickup level in accordance with magnitude
variations of the measured voltage. It shall be noted that this feature will as well affect the pickup
current value for calculation of trip times for IDMT curves (overcurrent with IDMT curve will trip
faster during low voltage conditions).
Current restraint feature M13751-338 v3

The overcurrent protection step operation can be made dependent of a restraining current
quantity (see table 417). Practically then the pickup level of the overcurrent step is not constant
but instead increases with the increase in the magnitude of the restraining current.
IMeasured
ea ain
ar str
te re
e ra ff *I
Op oe
s trC
e
I>R
IsetHigh
IsetLow
atan(RestrCoeff)
Restraint
en05000255.vsd
Figure 370: Current pickup variation with restraint current magnitude

This feature will simply prevent overcurrent step to pickup if the magnitude of the measured
current quantity is smaller than the set percentage of the restrain current magnitude. However
this feature will not affect the pickup current value for calculation of trip times for IDMT curves.
This means that the IDMT curve trip time will not be influenced by the restrain current magnitude.
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Technical manual
When set, the pickup signal will start definite time delay or inverse (IDMT) time delay in accordance
with the end user setting. If the pickup signal has value one for longer time than the set time delay,
the overcurrent step will set its trip signal to one. Reset of the pickup and trip signal can be
instantaneous or time delay in accordance with the end user setting.
11.1.7.4 Built-in undercurrent protection steps M13751-231 v2
Two undercurrent protection steps are available. They are absolutely identical and therefore only
one will be explained here. Undercurrent step simply compares the magnitude of the measured
current quantity (see table 415) with the set pickup level. The undercurrent step will pickup and set
its pickup signal to one if the magnitude of the measured current quantity is smaller than this set
level. The pickup signal will start definite time delay with set time delay. If the pickup signal has
value one for longer time than the set time delay the undercurrent step will set its trip signal to
one. Reset of the pickup and trip signal can be instantaneous or time delay in accordance with the
setting.
11.1.7.5 Built-in overvoltage protection steps M13751-234 v3
Two overvoltage protection steps are available. They are absolutely identical and therefore only
Overvoltage step simply compares the magnitude of the measured voltage quantity (see
table 416) with the set pickup level. The overvoltage step will pickup if the magnitude of the
measured voltage quantity is bigger than this set level.
The pickup signal will start definite time delay or inverse (IDMT) time delay in accordance with the
end user setting. If the pickup signal has value one for longer time than the set time delay, the
overvoltage step will set its trip signal to one. Reset of the pickup and trip signal can be
11.1.7.6 Built-in undervoltage protection steps M13751-239 v3
Two undervoltage protection steps are available. They are absolutely identical and therefore only
Undervoltage step simply compares the magnitude of the measured voltage quantity (see
table 416) with the set pickup level. The undervoltage step will pickup if the magnitude of the
measured voltage quantity is smaller than this set level.
The pickup signal will start definite time delay or inverse (IDMT) time delay in accordance with the
end user setting. If the pickup signal has value one for longer time than the set time delay, the
undervoltage step will set its trip signal to one. Reset of the pickup and trip signal can be
The simplified internal logics, for CVGAPC function are shown in the following figures.
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IED
ADM CVGAPC function
Current and voltage selection

settings
Phasor calculation of
scaling with CT ratio
individual currents
52
A/D conversion
Selection of which current Selected current
and voltage shall be given to
Phasors &
samples
the built-in protection Selected voltage
elements
Restraint current selection
Selected restraint current

A/D conversion scaling
Selection of restraint current
Phasor calculation of
individual voltages
with CT ratio
Phasors &
samples
Figure 371: Treatment of measured currents and voltages within IED for CVGAPC function
Figure 371 shows how internal treatment of measured currents is done for multipurpose
protection function
The following currents and voltages are inputs to the multipurpose protection function. They must
all be expressed in true power system (primary) Amperes and kilovolts.
1. Instantaneous values (samples) of currents & voltages from one three-phase current and one
three-phase voltage input.
2. Fundamental frequency phasors from one three-phase current and one three-phase voltage
input calculated by the pre-processing modules.
3. Sequence currents & voltages from one three-phase current and one three-phase voltage
input calculated by the pre-processing modules.
The multipurpose protection function:
1. Selects one current from the three-phase input system (see table 415) for internally measured
current.
2. Selects one voltage from the three-phase input system (see table 416) for internally measured
voltage.
3. Selects one current from the three-phase input system (see table 417) for internally measured
restraint current.
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CURRENT
UC1
nd TRUC1
2 Harmonic
Selected current restraint
PU_UC2
UC2
TRUC2
2nd Harmonic
restraint
PU_OC1
OC1 TROC1
nd
2 Harmonic BLK2ND
restraint OR
Selected restraint current
Current restraint
DIROC1
Directionality
Voltage control /
restraint
PU_OC2
OC2 TROC2
2nd Harmonic
restraint
Current restraint OR
VDIRLOW
Directionality DIROC2
Voltage control /
restraint
PU_OV1
OV1 TROV1
PU_OV2
OV2 TROV2
PU_UV1
Selected voltage
UV1 TRUV1
PU_UV2
UV2 TRUV2
VOLTAGE
en05000170_ansi.vsd
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Technical manual
Figure 372: CVGAPC function main logic diagram for built-in protection elements
Logic in figure 372 can be summarized as follows:
1. The selected currents and voltage are given to built-in protection elements. Each protection
element and step makes independent decision about status of its PICKUP and TRIP output
signals.
2. More detailed internal logic for every protection element is given in the following four figures
3. Common PICKUP and TRIP signals from all built-in protection elements & steps (internal OR
logic) are available from multipurpose function as well.
Enable
second
harmonic Second
NOT
harmonic check DEF time BLKTROC1
selected 0-DEF TROC1
AND
0 OR
Selected current a
a>b
b
OC1=On PU_OC1
AND
PickupCurr_OC1 BLKOC1
X
Inverse
Voltage Directionality DIR_OK Inverse

control or time
check selected
restraint
feature
Selected voltage
Current
Restraint
Feature
Selected restrain current Imeasured > k Irestraint
en05000831_ansi.vsd
Figure 373: Simplified internal logic diagram for built-in first overcurrent step that is, OC1 (step OC2 has the
same internal logic)
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Technical manual
Bin input: BLKUC1TR
Selected current a TRUC1

b>a
0-DEF
AND
b
PickupCurr_UC1
AND 0
Operation_UC1=On
PU_UC1
Bin input: BLKUC1
en05000750_ansi.vsd
Figure 374: Simplified internal logic diagram for built-in first undercurrent step that is, UC1 (step UC2 has
the same internal logic)
DEF time BLKTROV1

selected 0-DEF TROV1
AND
0 OR
Selected voltage a
a>b
b PU_OV1
PickupVolt_OV1
AND
Inverse
Operation_OV1=On
Inverse time
BLKOV1 selected
en05000751_ansi.vsd
Figure 375: Simplified internal logic diagram for built-in first overvoltage step OV1 (step OV2 has the same
internal logic)
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Technical manual
DEF time BLKTRUV1

selected 0-DEF TRUV1
AND
0 OR
Selected voltage a
b>a
b PU_UV1
AND
PickupVolt_UV1
Inverse
Operation_UV1=On
Inverse time
BLKUV1 selected
en05000752_ansi.vsd
Figure 376: Simplified internal logic diagram for built-in first undervoltage step UV1 (step UV2 has the same
internal logic)

M13095-2 v7
Table 419: CVGAPC technical data

Measuring current input Phase A, Phase B, Phase C, PosSeq, - -
NegSeq, -3*ZeroSeq, MaxPh, MinPh,
UnbalancePh, Phase A-Phase B, Phase
B-Phase C, Phase C-Phase A, MaxPh-
Ph, MinPh-Ph, UnbalancePh-Ph
Measuring voltage input Phase A, Phase B, Phase C, PosSeq, - -
NegSeq, -3*ZeroSeq, MaxPh, MinPh,
UnbalancePh, Phase A-Phase B, Phase
B-Phase C, Phase C-Phase A, MaxPh-
Ph, MinPh-Ph, UnbalancePh-Ph
Pickup overcurrent, step 1 - 2 (2 - 5000)% of IBase ±1.0% of In at I ≤ In
Pickup undercurrent, step 1-2 (2 - 150)% of IBase ±1.0% of In at I ≤ In

Independent time delay, overcurrent at (0.00 - 6000.00) s ±0.2% or ±35 ms whichever is

0 to 2 x Iset, step 1 - 2 greater
Independent time delay, undercurrent (0.00 - 6000.00) s ±0.2% or ±35 ms whichever is

at 2 to 0 x Iset, step 1 - 2 greater
Overcurrent (non-directional):
Pickup time at 0 to 2 x Iset Min. = 15 ms -
Max. = 30 ms
Max. = 30 ms
Max. = 20 ms
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Max. = 35 ms
Undercurrent:
Max. = 30 ms
Max. = 30 ms
Overcurrent:
Inverse time characteristics, see table 16 curve types See table 1135, 1137 and table
1135, 1137 and table 1139 1139
Overcurrent:
Minimum operate time for inverse (0.00 - 6000.00) s ±0.2% or ±35 ms whichever is
curves, step 1 - 2 greater
Voltage level where voltage memory (0.0 - 5.0)% of VBase ±0.5% of Vn
takes over
Pickup overvoltage, step 1 - 2 (2.0 - 200.0)% of VBase ±0.5% of Vn at V ≤ Vn
Pickup undervoltage, step 1 - 2 (2.0 - 150.0)% of VBase ±0.5% of Vn at V ≤ Vn

Independent time delay, overvoltage at (0.00 - 6000.00) s ±0.2% or ±35 ms whichever is

0.8 to 1.2 x Vset, step 1 - 2 greater
Independent time delay, undervoltage (0.00 - 6000.00) s ±0.2% or ±35 ms whichever is

at 1.2 to 0.8 x Vset, step 1 - 2 greater
Overvoltage:
Pickup time at 0.8 to 1.2 x Vset Min. = 15 ms -
Max. = 30 ms
Reset time at 1.2 to 0.8 x Vset Min. = 15 ms -
Max. = 30 ms
Undervoltage:
Pickup time at 1.2 to 0.8 x Vset Min. = 15 ms -
Max. = 30 ms
Reset time at 1.2 to 0.8 x Vset Min. = 15 ms -
Max. = 30 ms
Overvoltage:
Inverse time characteristics, see table 4 curve types See table 1146
1146
Undervoltage:
Inverse time characteristics, see table 3 curve types See table 1147
1147
High and low voltage limit, voltage (1.0 - 200.0)% of VBase ±1.0% of Vn at V ≤ Vn
dependent operation, step 1 - 2 ±1.0% of V at V > Vn
Directional function Settable: NonDir, forward and reverse -

Relay characteristic angle (-180 to +180) degrees ±2.0 degrees
Relay trip angle (1 to 90) degrees ±2.0 degrees
Reset ratio, overcurrent > 95% -
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Reset ratio, undercurrent < 105% -
Reset ratio, overvoltage > 95% -
Overcurrent:

Undercurrent:

Overvoltage:
Critical impulse time 10 ms typically at 0.8 to 1.2 x Vset -

Undervoltage:
Critical impulse time 10 ms typically at 1.2 to 0.8 x Vset -
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Technical manual
System protection and control
Section 12 System protection and control
12.1 Multipurpose filter SMAIHPAC GUID-6B541154-D56B-452F-B143-4C2A1B2D3A1F v1
12.1.1 Identification GUID-8224B870-3DAA-44BF-B790-6600F2AD7C5D v1

Multipurpose filter SMAIHPAC - -
12.1.2 Functionality GUID-EB0B11C3-FF79-4B8D-A335-649623E832F9 v2
The multi-purpose filter function block, SMAIHPAC, is arranged as a three-phase filter. It has very
much the same user interface (e.g. inputs and outputs) as the standard pre-processing function
block SMAI. However the main difference is that it can be used to extract any frequency
component from the input signal. Thus it can, for example, be used to build sub-synchronous
resonance protection for synchronous generator.
12.1.3 Function block GUID-FA590757-0DB1-4605-9DE2-20FA8304795F v1
SMAIHPAC
BLOCK AI3P
G3P* AI1
AI2
AI3
AI4
12.1.4 Signals GUID-DF7C833A-9AB9-40CA-867B-950AC1F662B5 v1
Table 420: SMAIHPAC Input signals

G3P GROUP - Analog input group from SMAI
SIGNAL
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Table 421: SMAIHPAC Output signals

AI3P GROUP SIGNAL Analog input 3-phase group
AI1 GROUP SIGNAL Analog input 1
12.1.5 Settings GUID-5EA398AD-66E2-4240-8918-4332995CED11 v1
Table 422: SMAIHPAC Non group settings (basic)

ConnectionType Ph - Ph - - Ph - N Analogue input connection type
Ph - N
SetFrequency 2.0 - 500.0 Hz 0.1 50.0 Desired frequency to be extracted by the
filter
FreqBandWidth 0.0 - 60.0 Hz 0.1 0.0 Extra added frequency band around the
set frequency
FilterLength 0.1 s - - 1.0 s Approximate length of the filtering
0.2 s window in seconds
0.5 s
1.0 s
2.0 s
4.0 s
OverLap 0 - 95 % 5 20 Filtering window overlap between two
calculations in percent
12.1.6 Operation principle GUID-262C1783-3A0A-46B6-99FC-1202AE8E7519 v2
For all four analogue input signals into this filter (i.e. three phases and the residual quantity) the
input samples from the TRM module which are coming at rate of 20 samples per fundamental
system cycle are first stored. When enough samples are available in the internal memory, the
phasor values at set frequency defined by the setting parameter SetFrequency are calculated. The
following values are internally available for each of the calculated phasors:
• Magnitude
• Phase angle
• Exact frequency of the extracted signal
Note that the special filtering algorithm is used to extract these phasors. This algorithm is
different from the standard one-cycle Digital Fourier Filter typically used by the numerical IEDs.
This filter provides extremely good accuracy of measurement and excellent noise rejection, but at
the same time it has much slower response time. It is capable to extract phasor (i.e. magnitude,
phase angle and actual frequency) of any signal (e.g. 37,2Hz) present in the waveforms of the
connected CTs and/or VTs. The magnitude and the phase angle of this phasor are calculated with
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Technical manual
very high precision. For example the magnitude and phase angle of the phasor can be estimated
even if it has magnitude of one per mille (i.e. 1‰ ) in comparison to the dominating signal (e.g. the
fundamental frequency component). Several instances of this function block are provided. These
instances are fully synchronized between each-other in respect of phase angle calculation. Thus if
two multi-purpose filters are used for some application, one for current and the second one for
the voltage signals, the power values (i.e. P & Q) at the set frequency can be calculated from them
by the over-/under-power function or CVMMXN measurement function block.
In addition to these phasors the following quantities are internally calculated as well:
• Phasors for the individual phases as well as phase-to-phase phasors

• True RMS value of the input signal over all samples available in the memory
• Positive sequence phasor
• Negative sequence phasor
• Zero sequence phasor
• etc.
In order to properly calculate phase-to-phase phasors from the individual phase phasors or vice
versa, the setting parameters ConnectionType is provided. It defines what quantities (i.e.
individual phases or phase-to-phase quantities) are physically connected to the IED analogue
inputs by wiring. Then the IED knows which one of them are the measured quantities and the
other one is then internally calculated. This setting is only important for the VT inputs, because the
CTs are typically wye connected all the time.
Thus when this filter is used in conjunction with multi-purpose protection function or overcurrent
function or over-voltage function or over-power function many different protection applications
can be arranged. For example the following protection, monitoring or measurement features can
be realized:
• Sub-synchronous resonance protection for turbo generators

• Sub-synchronous protection for wind turbines/wind farms
• Detection of sub-synchronous oscillation between HVDC links and synchronous generators
• Super-synchronous protection
• Detection of presence of the geo-magnetic induced currents
• Overcurrent or overvoltage protection at specific frequency harmonic, sub-harmonic, inter-
harmonic etc.
• Presence of special railway frequencies (e.g. 16.7Hz or 25Hz) in the three-phase power system
• Sensitive reverse power protection
• Stator or rotor ground fault protection for special injection frequencies (e.g. 25Hz)
• etc.
The filter output can also be connected to the measurement function blocks such as CVMMXN
(Measurements), CMMXU (Phase current measurement), VMMXU (Phase-phase voltage
measurement), etc.
The filter has as well additional capability to report the exact frequency of the extracted signal.
Thus the user can check the actual frequency of some phenomenon in the power system (e.g.
frequency of the sub-synchronous currents) and compare it with expected value obtained
previously by either calculation or simulation. For the whole three-phase filter group the frequency
of the signal connected to the first input (i.e. phase A) is reported. This value can be then used
either by over-/under-frequency protections or reported to the built-in HMI or any other external
client via the measurement blocks such is the CVMMXN.
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How many samples in the memory are used for the phasor calculation depends on the setting
parameter FilterLength. Table 423 gives overview of the used number of samples for phasor
calculation by the filter. Note that the used number of samples is always a power of number two.
Table 423: Length of the filtering window

Value for parameter Used No of samples for Corresponding length of Corresponding length of
FilterLength calculation (fixed, the input waveform in the input waveform in
independent from rated miliseconds for 50Hz miliseconds for 60Hz
frequency) power system power system
0.1 s 128 = 27 128 ms 107 ms
0.2 s 256 = 28 256 ms 213 ms
0.5 s 512 = 29 512 ms 427 ms
1.0 s 1024 = 210 1024 ms 853 ms
2.0 s 2048 = 211 2048 ms 1707 ms
4.0 s 4096 = 212 4096 ms 3413 ms
Note that the selected value for the parameter FilterLength automatically defines certain filter
properties as described below:
First in order to secure proper filter operation the selected length of the filter shall always be
longer than three complete periods of the signal which shall be extracted. Actually the best results
are obtained if at least five complete periods are available within the filtering window. Thus, this
filter feature will limit which filter lengths can be used to extract low frequency signals. For
example if 16,7 Hz signal shall be extracted the minimum filter length in milliseconds shall be:
1000
3× = 180ms
16.7
Thus based on the data from Table 423 the minimum acceptable value for this parameter would be
“FilterLength = 0.2 s” but more accurate results will be obtained by using “FilterLength = 0.5 s”
Second feature which is determined by the selected value for parameter FilterLength is the
capability of the filter to separate the desired signal from the other disturbing signals which may
have similar frequency value. Note that the filter output will be the phasor with the highest
magnitude within certain “pass frequency band” around the SetFrequency. Table 424 defines the
natural size of this pass frequency band for the filter, depending on the selected value for
parameter FilterLength.
Table 424: Pass frequency band due to FilterLength

Value for parameter FilterLength For 50Hz power system For 60Hz power system
0.1 s ±22.5 Hz ±27.0 Hz
0.2 s ±11.5 Hz ±14.0 Hz
0.5 s ±6.0 Hz ±7.2 Hz
1.0 s ±3.0 Hz ±3.6 Hz
2.0 s ±1.5 Hz ±1.8 Hz
4.0 s ±0.8 Hz ±1.0 Hz
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Thus the longer length of the filter the better capability it has to reject the disturbing signals close
to the required frequency component and any other noise present in the input signal waveform.
For example if 46 Hz signal wants to be extracted in 50Hz power system, then from Table 424 it
can be concluded that “FilterLength=1,0 s” shall be selected as a minimum value. However if
frequency deviation of the fundamental frequency signal in the power system are taken into
account it may be advisable to select “FilterLength=2,0 s” for such application.
Note that in case when no clear magnitude peak exist in the set pass frequency band the filter will
return zero values for the phasor magnitude and angle while the signal frequency will have value
minus one. Finally the set value for parameter FilterLength also defines the response time of the
filter after a step change of the measured signal. The filter will correctly estimate the new signal
magnitude once 75% of the filter length has been filed with the new signal value (i.e. after the
change).
If for any reason this natural frequency band shall be extended (e.g. to get accurate but wider
filter) it is possible to increase the pass band by entering the value different from zero for
parameter FreqBandWidth. In such case the total filter pass band can be defined as:
± (value given in Table 424 + one-half of the set FreqBandWidth value)
Example if in 60Hz system the selected values are “FilterLength =1.0 s” and “FreqBandWidth = 5.0”
the total filter pass band will be ±(3.6+5.0/2)= ± 6.1 Hz.
It shall be noted that the phasor calculation is relatively computation demanding (required certain
amount of the CPU processing time). In order to control the CPU usage for this filter, the setting
parameter OverLap is used. This setting parameter defines how often the new phasor value is
calculated during time period defined by the set value for the parameter FilterLength (see Table
423). The following list gives some examples how this parameter influence the calculation rate for
the extracted phasor:
• when OverLap=0% the new phasor value is calculated only once per FilterLength
• when OverLap=50% the new phasor value is calculated two times per FilterLength
• when OverLap=75% the new phasor value is calculated four times per FilterLength
• when OverLap=90% the new phasor value is calculated ten times per FilterLength
12.1.7 Filter calculation example GUID-F5828B0A-CED3-483E-B5B1-F389C3C2AEFB v3
In the following Figure an example from an installation of this filter on a large, 50 Hz turbo
generator with a rating in excess of 1000 MVA is presented. In this installation filter is used to
measure the stator sub-synchronous resonance currents. For this particular installation the
following settings were used for the filter:
• SetFrequency= 31.0 Hz
• FilterLength= 1.0 s
• OverLap = 75%
• FreqBandWidth= 0.0 Hz
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Figure 377: Example of filter calculation

The data shown in the Figure comes from the comtrade file captured by the IED. The following
traces are presented in this Figure.
a) Waveforms of the stator three-phase currents given in primary kA.
b) RMS value of the sub-synchronous resonance current extracted by the filter in primary amperes.
c) Frequency of the extracted sub-synchronous resonance current provided by the filter in Hz.
Note the very narrow scale on the y-axle for b) and c). Such small scale as well indicates with which
precision and consistency the filter calculates the phasor magnitude and frequency of the
extracted stator sub-synchronous current component.
The following can be observed in the Figure:
• The stator total RMS current value is around 33 kA primary.

• The measured magnitude of the sub-synchronous current is around 173 A primary (that is,
0.5% of the fundamental 50 Hz component).
• The frequency of this sub-synchronous current component is 31.24 Hz.
With above given settings the sub-synchronous current magnitude and frequency are calculated
approximately four times per second (that is, correct value is four times per 1024 ms).
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Secondary system supervision
Section 13 Secondary system supervision
13.1 Current circuit supervision (87) IP14555-1 v5
M14870-1 v5

Current circuit supervision CCSSPVC - 87
Open or short circuited current transformer cores can cause unwanted operation of many
protection functions such as differential, ground-fault current and negative-sequence current
functions.
Current circuit supervision (CCSSPVC, 87) compares the residual current from a three phase set of
current transformer cores with the neutral point current on a separate input taken from another
set of cores on the current transformer.
A detection of a difference indicates a fault in the circuit and is used as alarm or to block
protection functions expected to give inadvertent tripping.
CCSSPVC (87)
I3P* FAIL
IREF* ALARM
BLOCK
Figure 378: CCSSPVC (87) function block
Signal IREF must be connected in the configuration.
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13.1.4 Signals
Table 425: CCSSPVC (87) Input signals

I3P GROUP - Group signal for three phase current input
SIGNAL
IREF GROUP - Residual reference current input
SIGNAL
Table 426: CCSSPVC (87) Output signals

FAIL BOOLEAN Detection of current circuit failure
ALARM BOOLEAN Alarm for current circuit failure
13.1.5 Settings
Table 427: CCSSPVC (87) Group settings (basic)

Enabled
IMinOp 10 - 200 %IB 1 20 Minimum operate current differential
pickup in % of IBase
Table 428: CCSSPVC (87) Group settings (advanced)

Pickup_Block 20 - 500 %IB 1 150 Block of the function at high phase
current, in % of IBase
Table 429: CCSSPVC (87) Non group settings (basic)

groups
Current circuit supervision CCSSPVC (87) compares the absolute value of the vectorial sum of the
three phase currents |ΣIphase| and the numerical value of the residual current |Iref| from another
current transformer set, see figure 379.
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Technical manual
The FAIL output will be set to a logical one when the following criteria are fulfilled:
• The numerical value of the difference |ΣIphase| – |Iref| is higher than 80% of the numerical
value of the sum |ΣIphase| + |Iref|.
• The numerical value of the current |ΣIphase| – |Iref| is equal to or higher than the set trip value
IMinOp.
• No phase current has exceeded Pickup_Block during the last 10 ms.
• CCSSPVC (87) is enabled by setting Operation = Enabled.
The FAIL output remains activated 100 ms after the AND-gate resets when being activated for
more than 20 ms. If the FAIL lasts for more than 150 ms an ALARM will be issued. In this case the
FAIL and ALARM will remain activated 1 s after the AND-gate resets. This prevents unwanted
resetting of the blocking function when phase current supervision element(s) trip, for example,
during a fault.
IA IA I>1.054 * IMinOp
IB IB +
IC  -
IC
+ +
Iref Iref + x -
0,8
I>IP>Block
10 ms AND
OR FAIL
OR t
40 ms 100 ms
170 ms 3000 ms ALARM

OPERATION
BLOCK
Figure 379: Simplified logic diagram for Current circuit supervision CCSSPVC (87)
The trip characteristic is percentage restrained, see figure 380.
| åI phase | - | I ref |
Slope = 1
Operation
Slope = 0.8
area
I MinOp
| åI phase | + | I ref |
99000068.vsd
Figure 380: Trip characteristics
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Due to the formulas for the axis compared, |SIphase | - |I ref | and |S I phase | + | I ref
| respectively, the slope can not be above 2.

M12358-1 v9
Table 430: CCSSPVC(87) technical data

Trip current (10-200)% of IBase ±10.0% of In at I ≤ In
±10.0% of I at I > In
Reset ratio, Trip current >90%

Block current (20-500)% of IBase ±5.0% of In at I ≤ In
Reset ratio, Block current >90% at (50-500)% of IBase
13.2 Fuse failure supervision FUFSPVC IP14556-1 v3
M14869-1 v4

Fuse failure supervision FUFSPVC - -
The aim of the fuse failure supervision function FUFSPVC is to block voltage measuring functions
at failures in the secondary circuits between the voltage transformer and the IED in order to avoid
inadvertent operations that otherwise might occur.
The fuse failure supervision function basically has three different detection methods, negative
sequence and zero sequence based detection and an additional delta voltage and delta current
detection.
The negative sequence detection algorithm is recommended for IEDs used in isolated or high-
impedance grounded networks. It is based on the negative-sequence quantities.
The zero sequence detection is recommended for IEDs used in directly or low impedance
grounded networks. It is based on the zero sequence measuring quantities.
The selection of different operation modes is possible by a setting parameter in order to take into
account the particular grounding of the network.
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A criterion based on delta current and delta voltage measurements can be added to the fuse
failure supervision function in order to detect a three phase fuse failure, which in practice is more
associated with voltage transformer switching during station operations.
FUFSPVC
I3P* BLKZ
V3P* BLKV
BLOCK 3PH
52A DLD1PH
MCBOP DLD3PH
89B PU_DI
BLKTRIP PU_DI_A
PU_DI_B
PU_DI_C
PU_DV
PU_DV_A
PU_DV_B
PU_DV_C
Figure 381: FUFSPVC function block
13.2.4 Signals
Table 431: FUFSPVC Input signals

I3P GROUP - Current connection
SIGNAL
SIGNAL
52a BOOLEAN 0 Active when circuit breaker is closed
MCBOP BOOLEAN 0 Active when external Miniature Circuit Breaker opens protected
voltage circuit
89b BOOLEAN 0 Active when line disconnect switch is open
BLKTRIP BOOLEAN 0 Blocks operation of function when active
Table 432: FUFSPVC Output signals

BLKZ BOOLEAN Start of current and voltage controlled function
BLKV BOOLEAN General pickup
3PH BOOLEAN Three-phase pickup
DLD1PH BOOLEAN Dead line condition in at least one phase
DLD3PH BOOLEAN Dead line condition in all three phases
PU_DI BOOLEAN Common pickup signal of sudden change in current
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PU_DI_A BOOLEAN Pickupof sudden change in current, phase A
PU_DI_B BOOLEAN Start signal of sudden change in current, phase B
PU_DI_C BOOLEAN Start signal of sudden change in current, phase C
PU_DV BOOLEAN Common start signal of sudden change in voltage
PU_DV_A BOOLEAN Start signal of sudden change in voltage, phase A
PU_DV_B BOOLEAN Start signal of sudden change in voltage, phase B
PU_DV_C BOOLEAN Start signal of sudden change in voltage, phase C
13.2.5 Settings
Table 433: FUFSPVC Group settings (basic)

Enabled
OpModeSel Disabled - - V0I0 Operating mode selection
V2I2
V0I0
V0I0 OR V2I2
V0I0 AND V2I2
OptimZsNs
3V0PU 1 - 100 %VB 1 30 Pickup of residual overvoltage element in
% of VBase
3I0PU 1 - 100 %IB 1 10 Pickup of residual undercurrent element in
% of IBase
3V2PU 1 - 100 %VB 1 30 Pickup of negative sequence overvoltage
element in % of VBase
3I2PU 1 - 100 %IB 1 10 Pickup of negative sequence undercurrent
element in % of IBase
OpDVDI Disabled - - Disabled Operation of change based function
Enabled Disable/Enable
DVPU 1 - 100 %VB 1 60 Pickup of change in phase voltage in % of
VBase
DIPU 1 - 100 %IB 1 15 Pickup of change in phase current in % of
IBase
VPPU 1 - 100 %VB 1 70 Pickup of phase voltage in % of VBase
IPPU 1 - 100 %IB 1 10 Pickup of phase current in % of IBase
SealIn Disabled - - Enabled Seal in functionality Disable/Enable
Enabled
VSealInPU 1 - 100 %VB 1 70 Pickup of seal-in phase voltage in % of
VBase
IDLDPU 1 - 100 %IB 1 5 Pickup for phase current detection in % of
IBase for dead line detection
VDLDPU 1 - 100 %VB 1 60 Pickup for phase voltage detection in % of
VBase for dead line detection
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Table 434: FUFSPVC Non group settings (basic)

groups

Table 435: FUFSPVC Monitored data

3I0 REAL - A Magnitude of zero sequence current
3I2 REAL - A Magnitude of negative sequence current
3V0 REAL - kV Magnitude of zero sequence voltage
3V2 REAL - kV Magnitude of negative sequence voltage
13.2.7.1 Zero and negative sequence detection M13677-3 v5
The zero and negative sequence function continuously measures the currents and voltages in all
three phases and calculates, see figure 382:
• the zero-sequence voltage 3V0

• the zero-sequence current 3I0
• the negative sequence current 3I2
• the negative sequence voltage 3V2
The measured signals are compared with their respective set values 3V0PU and 3I0PU, 3V2PU and
3I2PU.
The function enable the internal signal FuseFailDetZeroSeq if the measured zero-sequence voltage
is higher than the set value 3V0PU and the measured zero-sequence current is below the set value
3I0PU.
The function enable the internal signal FuseFailDetNegSeq if the measured negative sequence
voltage is higher than the set value 3V2PU and the measured negative sequence current is below
the set value 3I2PU.
A drop out delay of 100 ms for the measured zero-sequence and negative sequence current will
prevent a false fuse failure detection at un-equal breaker opening at the two line ends.
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Sequence Detection
3I0PU CurrZeroSeq
IA
Zero 3I0
sequence
filter CurrNegSeq
a
IB a>b 100 ms
b 0
Negative 3I2
sequence
IC filter FuseFailDetZeroSeq
AND
a
a>b 100 ms
3I2PU b 0
FuseFailDetNegSeq
AND
3V0PU
VoltZeroSeq
VA
Zero
sequence
a 3V0
a>b
b
filter
VB VoltNegSeq
Negative
sequence a 3V2
a>b
VC filter b
3V2PU
Figure 382: Simplified logic diagram for sequence detection part

The calculated values 3V0, 3I0, 3I2 and 3V2 are available as service values on local HMI and
monitoring tool in PCM600.
Input and output signals M13677-19 v6

The output signals 3PH, BLKV and BLKZ as well as the signals DLD1PH and DLD3PH from dead line
detections are blocked if any of the following conditions occur:
• The input BLOCK is activated

• The input BLKTRIP is activated and the internal signal FuseFailStarted is not present
• The operation mode selector OpModeSel is set to Disable
• The IED is in TEST status (TEST-ACTIVE is high) and the function has been blocked from the
HMI (BlockFUSE=Yes)
The input BLOCK signal is a general purpose blocking signal of the fuse failure supervision
function. It can be connected to a binary input of the IED in order to receive a block command from
external devices or can be software connected to other internal functions of the IED itself in order
to receive a block command from internal functions. Through OR gate it can be connected to both
binary inputs and internal function outputs.
The input BLKTRIP is intended to be connected to the trip output from any of the protection
functions included in the IED. When activated for more than 20 ms, the operation of the fuse
failure is blocked; a fixed drop-out timer prolongs the block for 100 ms. The aim is to increase the
security against unwanted operations during the opening of the breaker, which might cause
unbalance conditions for which the fuse failure might operate.
The output signal BLKZ will also be blocked if the internal dead line detection is activated. The
dead line detection signal has a 200 ms drop-out time delay.
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The input signal MCBOP is supposed to be connected via a terminal binary input to the N.C.
auxiliary contact of the miniature circuit breaker protecting the VT secondary circuit. The MCBOP
signal sets the output signals BLKV and BLKZ in order to block all the voltage related functions
when the MCB is open independent of the setting of OpModeSel selector. The additional drop-out
timer of 150 ms prolongs the presence of MCBOP signal to prevent the unwanted operation of
voltage dependent function due to non simultaneous closing of the main contacts of the
miniature circuit breaker.
The input signal 89b is supposed to be connected via a terminal binary input to the N.C. auxiliary
contact of the line disconnector. The 89b signal sets the output signal BLKV in order to block the
voltage related functions when the line disconnector is open. The impedance protection function
is not affected by the position of the line disconnector since there will be no line currents that can
cause malfunction of the distance protection. If 89b=0 it signifies that the line is connected to the
system and when the 89b=1 it signifies that the line is disconnected from the system and the
block signal BLKV is generated.
The output BLKV can be used for blocking the voltage related measuring functions (undervoltage
protection, energizing check and so on) except for the impedance protection.
The function output BLKZ shall be used for blocking the impedance protection function.
13.2.7.2 Delta current and delta voltage detection M13685-3 v7
A simplified diagram for the functionality is found in figure 383. The calculation of the changes of
currents and voltages is based on a sample analysis algorithm. The calculated delta quantities are
compared with their respective set values DIPU and DVPU. The algorithm detects a fuse failure if a
sufficient change in voltage without a sufficient change in current is detected in each phase
separately. The following quantities are calculated in all three phases:
• The change in voltage DV

• The change in current DI
The internal FuseFailDetDVDI signal is activated if the following conditions are fulfilled:
• The magnitude of the phase-ground voltage has been above VPPU for more than 1.5 cycles
(i.e. 30 ms in a 50 Hz system)
• The magnitude of DV in three phases are higher than the corresponding setting DVPU
• The magnitudes of DI in three phases are below the setting DI<
In addition to the above conditions, at least one of the following conditions shall be fulfilled in
order to activate the internal FuseFailDetDVDI signal:
• The magnitude of the phase currents in three phases are higher than the setting IPPU
• The circuit breaker is closed (52A = True)
The first criterion means that detection of failure in three phases together with high current for
the three phases will set the output. The measured phase current is used to reduce the risk of false
fuse failure detection. If the current on the protected line is low, a voltage drop in the system (not
caused by fuse failure) may be followed by current change lower than the setting DIPU, and
therefore a false fuse failure might occur.
The second criterion requires that the delta condition shall be fulfilled at the same time as circuit
breaker is closed. If this is an important disadvantage, connect the 52A input to FALSE , then only
the first criterion can enable the delta function.If the DVDI detection of three phases set the
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Technical manual
internal signal FuseFailDetDVDI at the level high, then the signal FuseFailDetDVDI will remain high
as long as the voltage of three phases are lower then the setting VPPU.
In addition to fuse failure detection, two internal signals DeltaV and DeltaI are also generated by
the delta current and delta voltage DVDI detection algorithm. The internal signals DelatV and
DeltaI are activated when a sudden change of voltage, or respectively current, is detected. The
detection of the sudden change is based on a sample analysis algorithm. In particular DelatV is
activated if at least three consecutive voltage samples are higher then the setting DVPU. In a
similar way DelatI is activated if at least three consecutive current samples are higher then the
setting DIPU.When DeltaV or DeltaI are active, the output signals PU_DV_A, PU_DV_B, PU_DV_C
and respectively PU_DI_A, PU_DI_B, PU_DI_C, based on a sudden change of voltage or current
detection, are activated with a 20 ms time off delay. The common pickup output signals PU_DV or
PU_DI are activated with a 60 ms time off delay, if any sudden change of voltage or current is
detected.
The delta function (except the sudden change of voltage and current detection) is
deactivated by setting the parameter OpDVDI to Disabled.
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DVDI Detection
DVDI detection Phase 1
IA
IB
IC DI detection based on sample analysis
DIPU DeltaIA
VA
DV detection based on sample analysis

AND
DVPU
1.5 cycle 20 ms
a DeltaVA
a>b t t
VPPU b
IA DeltaIB
DVDI detection Phase 2
IB DeltaVB
IC
VB Same logic as for phase 1
IA DVDI detection Phase 3 DeltaIC

IB
DeltaVC
IC
VC Same logic as for phase 1
VA
a
ab
50P b AND
OR AND
52A AND OR
VB
a
ab
b AND
OR AND
AND OR
VC
a
ab
b AND
OR AND
AND OR FuseFailDetDVDI
AND
Figure 383: Simplified logic diagram for the DV/DI detection part
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Technical manual
intBlock
PU_DI
AND
DeltaIA 0
20 ms OR AND PU_DI_A
DeltaIB
0
20 ms PU_DI_B
AND
DeltaIC 0
20 ms
PU_DI_C
AND
AND PU_DV
DeltaVA 0 PU_DV_A
20 ms OR AND
DeltaVB 0
20 ms PU_DV_B
AND
DeltaVC 0
20 ms
PU_DV_B
AND
Figure 384: Internal signals DeltaV or DeltaI and the corresponding output signals
13.2.7.3 Dead line detection M13679-44 v4
A simplified diagram for the functionality is found in figure 385. A dead phase condition is
indicated if both the voltage and the current in one phase is below their respective setting values
VDLDPU and IDLDPU. If at least one phase is considered to be dead the output DLD1PH and the
internal signal DeadLineDet1Ph is activated. If all three phases are considered to be dead the
output DLD3PH is activated
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Technical manual
Dead Line Detection

IA
a
a<b AllCurrLow
b
AND
IB
a
a<b
b
IC
a
a<b
b
IDLDPU
DeadLineDet1Ph
VA
a AND
a<b
b OR DLD1PH
AND
VB
a AND
a<b
b
AND DLD3PH
VC AND
a AND
a<b
b
VDLDPU
intBlock
Figure 385: Simplified logic diagram for Dead Line detection part
13.2.7.4 Main logic GUID-D474A49E-D3A8-438C-B7E4-E527FEC2F335 v6
A simplified diagram for the functionality is found in figure 386. The fuse failure supervision
function (FUFSPVC) can be switched on or off by the setting parameter Operation to Enabled or
Disabled.
For increased flexibility and adaptation to system requirements an operation mode selector,
OpModeSel, has been introduced to make it possible to select different operating modes for the
negative and zero sequence based algorithms. The different operation modes are:
• Disabled. The negative and zero sequence function is disabled.

• V2I2. Negative sequence is selected.
• V0I0. Zero sequence is selected.
• V0I0 OR V2I2. Both negative and zero sequence are activated and work in parallel in an OR-
condition.
• V0I0 AND V2I2. Both negative and zero sequence are activated and work in series (AND-
condition for operation).
• OptimZsNs. Optimum of negative and zero sequence current (the function that has the
highest magnitude of measured negative and zero sequence current will be activated).
The delta function can be activated by setting the parameter OpDVDI to Enabled. When selected it
operates in parallel with the sequence based algorithms.
As soon as any fuse failure situation is detected, signals FuseFailDetZeroSeq, FuseFailDetNegSeq

or FuseFailDetDVDI, and the specific functionality is released, the function will activate the output
signal BLKV. The output signal BLKZ will be activated as well if the internal dead phase detection,
DeadLineDet1Ph, is not activated at the same time. The output BLKV can be used for blocking
voltage related measuring functions (under voltage protection, energizing check, and so on). The
output BLKZ shall be used to block the impedance protection functions.
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Technical manual
If the fuse failure situation is present for more than 5 seconds and the setting parameter SealIn is
set to Enabled it will be sealed in as long as at least one phase voltage is below the set value
VSealInPU. This will keep the BLKV and BLKZ signals activated as long as any phase voltage is
below the set value VSealInPU. If all three phase voltages drop below the set value VSealInPU and
the setting parameter SealIn is set to Enabled the output signal 3PH will also be activated. The
signals 3PH, BLKV and BLKZ signals will now be active as long as any phase voltage is below the
set value VSealInPU.
If SealIn is set to Enabled the fuse failure condition is stored in the non-volatile memory in the IED.
At start-up of the IED (due to auxiliary power interruption or re-start due to configuration change)
it uses the stored value in its non-volatile memory and re-establishes the conditions that were
present before the shut down. All phase voltages must be greater than VSealInPU before fuse
failure is de-activated and resets the signals BLKU, BLKZ and 3PH.
The output signal BLKV will also be active if all phase voltages have been above the setting
VSealInPU for more than 60 seconds, the zero or negative sequence voltage has been above the
set value 3V0PU and 3V2PU for more than 5 seconds, all phase currents are below the setting
IDLDPU (criteria for open phase detection) and the circuit breaker is closed (input 52a is
activated).
If a MCB is used then the input signal MCBOP is to be connected via a binary input to the N.C.
auxiliary contact of the miniature circuit breaker protecting the VT secondary circuit. The MCBOP
signal sets the output signals BLKV and BLKZ in order to block all the voltage related functions
when the MCB is open independent of the setting of OpModeSel or OpDVDI. An additional drop-
out timer of 150 ms prolongs the presence of MCBOP signal to prevent the unwanted operation of
voltage dependent function due to non simultaneous closing of the main contacts of the
miniature circuit breaker.
The input signal 89b is supposed to be connected via a terminal binary input to the N.C. auxiliary
contact of the line disconnector. The 89b signal sets the output signal BLKV in order to block the
voltage related functions when the line disconnector is open. The impedance protection function
does not have to be affected since there will be no line currents that can cause malfunction of the
distance protection.
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Technical manual
Fuse failure detection

Main logic
TEST
TEST ACTIVE
AND
BlocFuse = Yes
BLOCK intBlock
OR
BLKTRIP 20 ms 100 ms
AND t t
FusefailStarted
All VL < VSealInPU

OR
AND
3PH
AND
SealIn = Enabled AND
AND
Any VL < VSealInPU
FuseFailDetDUDI
AND 5s
OpDVDI = Enabled
OR t
FuseFailDetZeroSeq
AND
AND
FuseFailDetNegSeq
AND
V2I2 OR
V0I0 OR
V0I0 OR V2I2
OpModeSel
V0I0 AND V2I2
OptimZsNs
OR
CurrZeroSeq
a AND
CurrNegSeq a>b
b
AND
200 ms
DeadLineDet1Ph AND BLKZ
t OR AND
150 ms
MCBOP t
AND BLKV
60 s
t OR OR
All VL > VSealInPU
AND
VoltZeroSeq 5s
VoltNegSeq OR t
AllCurrLow
52a
89b
Figure 386: Simplified logic diagram for fuse failure supervision function, Main logic
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Technical manual

M16069-1 v11
Table 436: FUFSPVCtechnical data

Trip voltage, zero sequence (1-100)% of VBase ±0.5% of Vn
Trip current, zero sequence (1–100)% of IBase ±0.5% of In
Trip voltage, negative sequence (1-100)% of VBase ±0.5% of Vn
Trip current, negative sequence (1–100)% of IBase ±0.5% of In
Trip voltage change pickup (1-100)% of VBase ±10.0% of Vn
Trip current change pickup (1–100)% of IBase ±10.0% of In
Trip phase voltage (1-100)% of VBase ±0.5% of Vn
Trip phase current (1–100)% of IBase ±0.5% of In
Trip phase dead line voltage (1-100)% of VBase ±0.5% of Vn
Trip phase dead line current (1–100)% of IBase ±0.5% of In
Pickup time, 1 ph, pickup at 1 to 0 x Vn Min. = 10 ms -

Max. = 25 ms
Reset time, 1 ph, pickup at 0 to 1 x Vn Min. = 15 ms -
Max. = 30 ms
13.3 Fuse failure supervision VDSPVC (60) GUID-9C5BA1A7-DF2F-49D4-A13A-C6B483DDFCDC v2
13.3.1 Identification GUID-109434B0-23E5-4053-9E6E-418530A07F9C v2

Fuse failure supervision VDSPVC VTS 60
13.3.2 Functionality GUID-6AF2219A-264F-4971-8D03-3B8A9D0CB284 v4
Different protection functions within the protection IED operates on the basis of measured
voltage at the relay point. Some example of protection functions are:
• Distance protection function.

• Undervoltage function.
• Energisation function and voltage check for the weak infeed logic.
These functions can operate unintentionally, if a fault occurs in the secondary circuits between
voltage instrument transformers and the IED. These unintentional operations can be prevented by
VDSPVC.
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VDSPVC is designed to detect fuse failures or faults in voltage measurement circuit, based on
phase wise comparison of voltages of main and pilot fused circuits. VDSPVC blocking output can
be configured to block functions that need to be blocked in case of faults in the voltage circuit.
13.3.3 Function block GUID-0C4A6C94-E0D7-4E36-AB49-D74A5E330D36 v2
VDSPVC (60)
V3P1* MAINFUF
V3P2* PILOTFUF
BLOCK V1AFAIL
V1BFAIL
V1CFAIL
V2AFAIL
V2BFAIL
V2CFAIL
Figure 387: VDSPVC function block
13.3.4 Signals
Table 437: VDSPVC (60) Input signals

V3P1 GROUP - Main fuse voltage
SIGNAL
V3P2 GROUP - Pilot fuse voltage
SIGNAL
Table 438: VDSPVC (60) Output signals

MAINFUF BOOLEAN Block of main fuse failure
PILOTFUF BOOLEAN Alarm of pilot fuse failure
V1AFAIL BOOLEAN Fuse failure of Main fuse group phase A
V1BFAIL BOOLEAN Fuse failure of Main fuse group phase B
V1CFAIL BOOLEAN Fuse failure of Main fuse group phase C
V2AFAIL BOOLEAN Fuse failure of Pilot fuse group phase A
V2BFAIL BOOLEAN Fuse failure of Pilot fuse group phase B
V2CFAIL BOOLEAN Fuse failure of Pilot fuse group phase C
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13.3.5 Settings
Table 439: VDSPVC (60) Group settings (basic)

On
Vdif Main block 10.0 - 80.0 %VB 0.1 20.0 Blocking picked up voltage level in % of
VBase when main fuse fails
Vdif Pilot alarm 10.0 - 80.0 %VB 0.1 30.0 Alarm picked up voltage level in % of VBase
when pilot fuse fails
SealIn Disabled - - On Seal in functionality Disable/Enable
On
VSealIn 0.0 - 100.0 %VB 0.1 70.0 Operate level of seal-in voltage in % of
VBase
Table 440: VDSPVC (60) Non group settings (basic)

groups
Table 441: VDSPVC (60) Non group settings (advanced)

ConTypeMain Ph-N - - Ph-N Selection of connection type for main fuse
Ph-Ph group
ConTypePilot Ph-N - - Ph-N Selection of connection type for pilot fuse
Ph-Ph group

Table 442: VDSPVC (60) Monitored data

VADIF_A REAL - kV Differential voltage phase A for alarm
functionality
VBDIF_A REAL - kV Differential voltage phase B for alarm
functionality
VCDIF_A REAL - kV Differential voltage phase C for alarm
functionality
VADIF_B REAL - kV Differential voltage phase A for block
functionality
VBDIF_B REAL - kV Differential voltage phase B for block
functionality
VCDIF_C REAL - kV Differential voltage phase C for block
functionality
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13.3.7 Operation principle GUID-06BC0CC0-8A4F-4D84-A0B1-506E433F72F3 v4
VDSPVC requires six voltage inputs, which are the three phase voltages on main and pilot fuse
groups. The initial voltage difference between the two groups is theoretical zero in the healthy
condition. Any subsequent voltage difference will be due to a fuse failure.
If the main fuse voltage becomes smaller than the pilot fuse voltage (vMainA < vPilotA or vMainB <
vPilotB or vMainC < vPilotC) and the voltage difference exceeds the operation level (Vdif Main
block), a blocking signal will be initiated to indicate the main fuse failure and block the voltage-
dependent functions. In addition, the function also indicates the phase in which the voltage
reduction has occurred.
If the pilot fuse voltage becomes smaller than the main fuse voltage (vPilotA < vMainA or vPilotB <
vMainB or vPilotC < vMainC) and the voltage difference exceeds the operation level (Vdif Pilot
alarm), an alarm signal will be initiated to indicate the pilot fuse failure and also the faulty phase
where the voltage reduction occurred.
When SealIn is set to Enabled and the fuse failure has last for more than 5 seconds, the blocked
protection functions will remain blocked until normal voltage conditions are restored above the
VSealIn setting. Fuse failure outputs are deactivated when normal voltage conditions are restored.
a 5s
ab AND
Vdif Main block b MAINFUF
OR
0
MIN ABS a
a>b AND V2AFAIL
Vdif Pilot alarm b
BLOCK
OR PILOTFUF
vPilotB V1BFAIL
vMainB Phase B, same as Phase A V2BFAIL
vPilotC V1CFAIL
vMainC Phase C, same as Phase A V2CFAIL
Figure 388: Simplified logic diagram VDSPVC (60)
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GUID-E2EA8017-BB4B-48B0-BEDA-E71FEE353774 v4
Table 443: technical data

Operate value, block of main (10.0-80.0)% of VBase ±0.5% of Vn
fuse failure
Reset ratio <110%
Operate time, block of main Min. = 5 ms –
fuse failure at 1 to 0 x Vr
Max. = 15 ms
Reset time, block of main fuse Min. = 15 ms –
failure at 0 to 1 x Vr
Max. = 30 ms
Operate value, alarm for pilot (10.0-80.0)% of VBase ±0.5% of Vn
fuse failure
Reset ratio <110% –
Operate time, alarm for pilot Min. = 5 ms –
Max. = 15 ms
Reset time, alarm for pilot Min. = 15 ms –
Max. = 30 ms
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Section 14 Control
14.1 Synchronism check, energizing check, and synchronizing

SESRSYN (25) IP14558-1 v4
M14889-1 v4

Synchrocheck, energizing check, and SESRSYN 25
synchronizing
sc/vc
SYMBOL-M V1 EN-US
The Synchronizing function allows closing of asynchronous networks at the correct moment
including the breaker closing time, which improves the network stability.
Synchrocheck, energizing check, and synchronizing SESRSYN (25) function checks that the
voltages on both sides of the circuit breaker are in synchronism, or with at least one side dead to
ensure that closing can be done safely.
SESRSYN (25) function includes a built-in voltage selection scheme for double bus and breaker-
and-a-half or ring busbar arrangements.
Manual closing as well as automatic reclosing can be checked by the function and can have
different settings.
For systems, which are running asynchronous, a synchronizing function is provided. The main
purpose of the synchronizing function is to provide controlled closing of circuit breakers when two
asynchronous systems are going to be connected. The synchronizing function evaluates voltage
difference, phase angle difference, slip frequency and frequency rate of change before issuing a
controlled closing of the circuit breaker. Breaker closing time is a parameter setting.
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SESRSYN (25)
V3PB1* SYNOK
V3PB2* AUTOSYOK
V3PL1* AUTOENOK
V3PL2* MANSYOK
BLOCK MANENOK
BLKSYNCH TSTSYNOK
BLKSC TSTAUTSY
BLKENERG TSTMANSY
BUS1_OP TSTENOK
BUS1_CL VSELFAIL
BUS2_OP B1SEL
BUS2_CL B2SEL
LINE1_OP L1SEL
LINE1_CL L2SEL
LINE2_OP SYNPROGR
LINE2_CL SYNFAIL
VB1OK VOKSYN
VB1FF VDIFFSYN
VB2OK FRDIFSYN
VB2FF FRDIFFOK
VL1OK FRDERIVA
VL1FF VOKSC
VL2OK VDIFFSC
VL2FF FRDIFFA
STARTSYN PHDIFFA
TSTSYNCH FRDIFFM
TSTSC PHDIFFM
TSTENERG INADVCLS
AENMODE VDIFFME
MENMODE FRDIFFME
PHDIFFME
VBUS
VLINE
MODEAEN
MODEMEN
Figure 389: SESRSYN (25) function block
14.1.4 Signals
Table 444: SESRSYN (25) Input signals

V3PB1 GROUP - Group signal for phase to ground voltage input Phase A, busbar 1
SIGNAL
V3PB2 GROUP - Group signal for phase to ground voltage input Phase A, busbar 1
SIGNAL
V3PL1 GROUP - Group signal for phase to ground voltage input phase A, line 1
SIGNAL
V3PL2 GROUP - Group signal for phase to ground voltage input phase A, line 2
SIGNAL
BLKSYNCH BOOLEAN 0 Block synchronizing
BLKSC BOOLEAN 0 Block synchro check
BLKENERG BOOLEAN 0 Block energizing check
BUS1_OP BOOLEAN 0 Open status for CB or disconnector connected to bus1
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BUS1_CL BOOLEAN 0 Close status for CB and disconnector connected to bus1
BUS2_OP BOOLEAN 0 Open status for CB or disconnector connected to bus2
BUS2_CL BOOLEAN 0 Close status for CB and disconnector connected to bus2
LINE1_OP BOOLEAN 0 Open status for CB or disconnector connected to line1
LINE1_CL BOOLEAN 0 Close status for CB and disconnector connected to line1
LINE2_OP BOOLEAN 0 Open status for CB or disconnector connected to line2
LINE2_CL BOOLEAN 0 Close status for CB and disconnector connected to line2
VB1OK BOOLEAN 0 Bus1 voltage transformer OK
VB1FF BOOLEAN 0 Bus1 voltage transformer fuse failure
VB2OK BOOLEAN 0 Bus2 voltage transformer OK
VB2FF BOOLEAN 0 Bus2 voltage transformer fuse failure
VL1OK BOOLEAN 0 Line1 voltage transformer OK
VL1FF BOOLEAN 0 Line1 voltage transformer fuse failure
VL2OK BOOLEAN 0 Line2 voltage transformer OK
VL2FF BOOLEAN 0 Line2 voltage transformer fuse failure
STARTSYN BOOLEAN 0 Start synchronizing
TSTSYNCH BOOLEAN 0 Set synchronizing in test mode
TSTSC BOOLEAN 0 Set synchro check in test mode
TSTENERG BOOLEAN 0 Set energizing check in test mode
AENMODE INTEGER 0 Input for setting of automatic energizing mode
MENMODE INTEGER 0 Input for setting of manual energizing mode
Table 445: SESRSYN (25) Output signals

SYNOK BOOLEAN Synchronizing OK output
AUTOSYOK BOOLEAN Auto synchronism-check OK
AUTOENOK BOOLEAN Automatic energizing check OK
MANSYOK BOOLEAN Manual synchronism-check OK
MANENOK BOOLEAN Manual energizing check OK
TSTSYNOK BOOLEAN Synchronizing OK test output
TSTAUTSY BOOLEAN Auto synchronism-check OK test output
TSTMANSY BOOLEAN Manual synchronism-check OK test output
TSTENOK BOOLEAN Energizing check OK test output
VSELFAIL BOOLEAN Selected voltage transformer fuse failed
B1SEL BOOLEAN Bus1 selected
B2SEL BOOLEAN Bus2 selected
L1SEL BOOLEAN Line1 selected
L2SEL BOOLEAN Line2 selected
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SYNPROGR BOOLEAN Synchronizing in progress
SYNFAIL BOOLEAN Synchronizing failed
VOKSYN BOOLEAN Voltage amplitudes for synchronizing above set limits
VDIFFSYN BOOLEAN Voltage difference out of limit for synchronizing
FRDIFSYN BOOLEAN Frequency difference out of limit for synchronizing
FRDIFFOK BOOLEAN Frequency difference in band for synchronizing
FRDERIVA BOOLEAN Frequency derivative out of limit for synchronizing
VOKSC BOOLEAN Voltage magnitudes above set limits
VDIFFSC BOOLEAN Voltage difference out of limit
FRDIFFA BOOLEAN Frequency difference out of limit for Auto operation
PHDIFFA BOOLEAN Phase angle difference out of limit for Auto operation
FRDIFFM BOOLEAN Frequency difference out of limit for Manual operation
PHDIFFM BOOLEAN Phase angle difference out of limit for Manual Operation
INADVCLS BOOLEAN Inadvertent circuit breaker closing
VDIFFME REAL Calculated difference of voltage in p.u of set voltage base value
FRDIFFME REAL Calculated difference of frequency
PHDIFFME REAL Calculated difference of phase angle
VBUS REAL Bus voltage
VLINE REAL Line voltage
MODEAEN INTEGER Selected mode for automatic energizing
MODEMEN INTEGER Selected mode for manual energizing
14.1.5 Settings
Table 446: SESRSYN (25) Group settings (basic)

Enabled
OperationSynch Disabled - - Disabled Operation for synchronizing function
Enabled Off/On
VHighBusSynch 50.0 - 120.0 %UBB 1.0 80.0 Voltage high limit bus for synchronizing in
% of VBaseBus
VHighLineSynch 50.0 - 120.0 %UBL 1.0 80.0 Voltage high limit line for synchrocheck in
% of VBaseLine
VDiffSynch 0.02 - 0.50 pu 0.01 0.10 Voltage difference limit for synchronizing
in p.u of set voltage base value
FreqDiffMin 0.003 - 0.250 Hz 0.001 0.010 Minimum frequency difference limit for
synchronizing
FreqDiffMax 0.050 - 0.500 Hz 0.001 0.200 Maximum frequency difference limit for
synchronizing
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FreqRateChange 0.000 - 0.500 Hz/s 0.001 0.300 Maximum allowed frequency rate of
change
tBreaker 0.000 - 60.000 s 0.001 0.080 Closing time of the breaker
tClosePulse 0.050 - 60.000 s 0.001 0.200 Breaker closing pulse duration
tMaxSynch 0.00 - 6000.00 s 0.01 600.00 Resets synch if no close has been made
before set time
tMinSynch 0.000 - 60.000 s 0.001 2.000 Minimum time to accept synchronizing
conditions
OperationSC Disabled - - Enabled Operation for synchronism-check function
Enabled Off/On
VHighBusSC 50.0 - 120.0 %UBB 1.0 80.0 Voltage high limit bus for synchrocheck in
% of VBaseBus
VHighLineSC 50.0 - 120.0 %UBL 1.0 80.0 Voltage high limit line for synchrocheck in
% of VBaseLine
VDiffSC 0.02 - 0.50 pu 0.01 0.15 Voltage difference limit for synchrocheck
in p.u of set voltage base value
FreqDiffA 0.003 - 1.000 Hz 0.001 0.010 Frequency difference limit between bus
and line Auto
FreqDiffM 0.003 - 1.000 Hz 0.001 0.010 Frequency difference limit between bus
and line Manual
PhaseDiffA 5.0 - 90.0 Deg 1.0 25.0 Phase angle difference limit between bus
and line Auto
PhaseDiffM 5.0 - 90.0 Deg 1.0 25.0 Phase angle difference limit between bus
and line Manual
tSCA 0.000 - 60.000 s 0.001 0.100 Time delay output for synchrocheck Auto
tSCM 0.000 - 60.000 s 0.001 0.100 Time delay output for manual
synchrocheck
AutoEnerg Disabled - - DLLB Automatic energizing check mode
DLLB
DBLL
Both
ManEnerg Disabled - - Both Manual energizing check mode
DLLB
DBLL
Both
ManEnergDBDL Disabled - - Disabled Manual dead bus, dead line energizing
Enabled
VLiveBusEnerg 50.0 - 120.0 %UBB 1.0 80.0 Voltage high limit bus for energizing check
in % of VBaseBus
VLiveLineEnerg 50.0 - 120.0 %UBL 1.0 80.0 Voltage high limit line for energizing check
in % of VBaseLine
VDeadBusEnerg 10.0 - 80.0 %UBB 1.0 40.0 Voltage low limit bus for energizing check
in % of VBaseBus
VDeadLineEnerg 10.0 - 80.0 %UBL 1.0 40.0 Voltage low limit line for energizing check
in % of VBaseLine
VMaxEnerg 50.0 - 180.0 %VB 1.0 115.0 Maximum voltage for energizing in % of
VBase, Line and/or Bus
tAutoEnerg 0.000 - 60.000 s 0.001 0.100 Time delay for automatic energizing check
tManEnerg 0.000 - 60.000 s 0.001 0.100 Time delay for manual energizing check
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Table 447: SESRSYN (25) Non group settings (basic)

SelPhaseBus1 Phase A - - Phase A Select phase for busbar1
Phase B
Phase C
Phases AB
Phase BC
Phase CA
Positive sequence
GblBaseSelBus 1 - 12 - 1 1 Selection of one of the Global Base Value
groups, Bus
GblBaseSelLine 1 - 12 - 1 1 Selection of one of the Global Base Value
groups, Line
SelPhaseBus2 Phase A - - Phase A Select phase for busbar2
Phase B
Phase C
Phases AB
Phase BC
Phase CA
Positive sequence
SelPhaseLine1 Phase A - - Phase A Select phase for line1
Phase B
Phase C
Phases AB
Phase BC
Phase CA
Positive sequence
SelPhaseLine2 Phase A - - Phase A Select phase for line2
Phase B
Phase C
Phases AB
Phase BC
Phase CA
Positive sequence
CBConfig No voltage sel. - - No voltage sel. Select CB configuration
Double bus
1 1/2 bus CB
1 1/2 bus alt. CB
Tie CB
Table 448: SESRSYN (25) Non group settings (advanced)

PhaseShift -180 - 180 Deg 1 0 Additional phase angle for selected line
voltage
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Table 449: SESRSYN (25) Monitored data

VDIFFME REAL - - Calculated difference of voltage in p.u of
set voltage base value
FRDIFFME REAL - Hz Calculated difference of frequency
PHDIFFME REAL - deg Calculated difference of phase angle
VBUS REAL - kV Bus voltage
VLINE REAL - kV Line voltage
14.1.7.1 Basic functionality M14832-3 v7
The synchronism check function measures the conditions across the circuit breaker and compares
them to set limits. The output is only given when all measured quantities are simultaneously
within their set limits.
The energizing check function measures the bus and line voltages and compares them to both
high and low threshold detectors. The output is given only when the actual measured quantities
match the set conditions.
The synchronizing function measures the conditions across the circuit breaker, and also
determines the angle change occurring during the closing delay of the circuit breaker, from the
measured slip frequency. The output is given only when all measured conditions are
simultaneously within their set limits. The issue of the output is timed to give closure at the
optimal time including the time for the circuit breaker and the closing circuit.
For double bus single circuit breaker and breaker-and-a-half circuit breaker arrangements, the
SESRSYN (25) function blocks have the capability to make the necessary voltage selection. For
double bus single circuit breaker arrangements, selection of the correct voltage is made using
auxiliary contacts of the bus disconnectors. For breaker-and-a-half circuit breaker arrangements,
correct voltage selection is made using auxiliary contacts of the bus disconnectors as well as the
circuit breakers.
The internal logic for each function block as well as, the input and outputs, and the setting
parameters with default setting and setting ranges is described in this document. For application
related information, please refer to the application manual.
14.1.7.2 Logic diagrams IP14739-1 v1
Logic diagrams M14833-3 v4

The logic diagrams that follow illustrate the main principles of the SESRSYN function components
such as Synchrocheck, Synchronizing, Energizing check and Voltage selection, and are intended to
simplify the understanding of the function.
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Synchronism check M14834-3 v13

The voltage difference, frequency difference and phase angle difference values are measured in
the IED centrally and are available for the synchronism check function for evaluation. By setting the
phases used for SESRSYN, with the settings SelPhaseBus1, SelPhaseBus2, SelPhaseLine1 and
SelPhaseLine2, a compensation is made automatically for the voltage amplitude difference and
the phase angle difference caused if different setting values are selected for both sides of the
breaker. If needed an additional phase angle adjustment can be done for selected line voltage with
the PhaseShift setting.
When the function is set to OperationSC = Enabled, the measuring will start.
The function will compare the bus and line voltage values with the set values for VHighBusSC and
VHighLineSC.
If both sides are higher than the set values, the measured values are compared with the set values
for acceptable frequency, phase angle and voltage difference: FreqDiffA, FreqDiffM, PhaseDiffA,
PhaseDiffM and VDiffSC. If additional phase angle adjustment is done with the PhaseShift setting,
the adjustment factor is deducted from the line voltage before the comparison of the phase angle
values.
The frequency on both sides of the circuit breaker is also measured. The frequencies must not
deviate from the rated frequency more than +/-5Hz. The frequency difference between the bus
frequency and the line frequency is measured and may not exceed the set value FreqDiff.
Two sets of settings for frequency difference and phase angle difference are available and used
for the manual closing and autoreclose functions respectively, as required.
The inputs BLOCK and BLKSC are available for total block of the complete SESRSYN (25) function
and selective block of the Synchronism check function respectively. Input TSTSC will allow testing
of the function where the fulfilled conditions are connected to a separate test output.
The outputs MANSYOK and AUTOSYOK are activated when the actual measured conditions match
the set conditions for the respective output. The output signal can be delayed independently for
MANSYOK and AUTOSYOK conditions.
A number of outputs are available as information about fulfilled checking conditions. VOKSC
shows that the voltages are high, VDIFFSC, FRDIFFA, FRDIFFM, PHDIFFA, PHDIFFM shows when
the voltage difference, frequency difference and phase angle difference conditions are out of
limits.
Output INADVCLS, inadvertent circuit breaker closing, indicates that the circuit breaker has been
closed at wrong phase angle by mistake. The output is activated, if the voltage conditions are
fulfilled at the same time the phase angle difference between bus and line is suddenly changed
from being larger than 60 degrees to smaller than 5 degrees.
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Note! Similar logic for Manual Synchronism check.
OperationSC = Enabled
AND TSTAUTSY
AND
TSTSC
BLKSC AND
BLOCK OR
AUTOSYOK
AND
tSCA
AND 0-60 ms
0
VDiffSC
AND 50 ms
0
VHighBusSC
VOKSC
AND
VHighLineSC
VDIFFSC
1
FRDIFFA
FreqDiffA 1
PHDIFFA
PhaseDiffA 1
VDIFFME
voltageDifferenceValue
FRDIFFME
frequencyDifferenceValue
PHDIFFME
phaseAngleDifferenceValue
100 ms
AND 0 INADVCLS
PhDiff > 60° 32 ms AND
PhDiff < 5°
Figure 390: Simplified logic diagram for the Auto Synchronism function
Synchronizing SEMOD171603-4 v12.1.1

When the function is set to OperationSynch = Enabled the measuring will be performed.
The function will compare the values for the bus and line voltage with the set values for
VHighBusSynch and VHighLineSynch, which is a supervision that the voltages are both live. Also
the voltage difference is checked to be smaller than the set value for VDiffSynch, which is a p.u
value of set voltage base values. If both sides are higher than the set values and the voltage
difference between bus and line is acceptable, the measured values are compared with the set
values for acceptable frequency FreqDiffMax and FreqDiffMin, rate of change of frequency
FreqRateChange and phase angle, which has to be smaller than the internally preset value of 15
degrees.
The measured frequencies between the settings for the maximum and minimum frequency will
initiate the measuring and the evaluation of the angle change to allow operation to be sent at the
right moment including the set tBreaker time. The calculation of the operation pulse sent in
advance is using the measured SlipFrequency and the set tBreaker time. To prevent incorrect
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closing pulses, a maximum closing angle between bus and line is preset internally to a value of 15
degrees.. Table 450 below shows the maximum settable value for tBreaker at the preset maximum
closing angle of 15 degrees, at different allowed slip frequencies for synchronizing.
Table 450: Dependencies between tBreaker and SlipFrequency with maximum closing angle of 15 degrees
tBreaker [s] (max settable value) with the internally preset SlipFrequency [Hz] (BusFrequency - LineFrequency)
closing angle of 15 degrees
0.040 1.000
0.050 0.800
0.080 0.500
0.200 0.200
0.400 0.100
0.800 0.050
1.000 0.040
At operation the SYNOK output will be activated with a pulse tClosePulse and the function resets.
The function will also reset if the synchronizing conditions are not fulfilled within the set
tMaxSynch time. This prevents that the function is, by mistake, maintained in operation for a long
time, waiting for conditions to be fulfilled.
The inputs BLOCK and BLKSYNCH are available for total block of the complete SESRSYN function
and block of the Synchronizing function respectively. TSTSYNCH will allow testing of the function
where the fulfilled conditions are connected to a separate output.
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SYN1
OPERATION SYNCH=ON
TEST MODE=ON
STARTSYN SYNPROGR
AND
AND
S
BLKSYNCH
OR R
VDiffSynch
50 ms SYNOK
AND
VHighBusSynch AND t
VHighLineSynch OR
FreqDiffMax
AND
TSTSYNOK
FreqDiffMin OR
tClose
FreqRateChange Pulse
AND
fBus&fLine ± 5Hz tMax

Phase Diff < 15 deg Synch
SYNFAIL
AND
PhaseDiff=closing angle
FreqDiff
Close pulse
tBreaker in advance
Figure 391: Simplified logic diagram for the synchronizing function
Energizing check M14835-3 v11

Voltage values are measured in the IED and are available for evaluation by the Synchronism check
function.
The function measures voltages on the busbar and the line to verify whether they are live or dead.
This is done by comparing with the set values VLiveBusEnerg and VDeadBusEnerg for bus
energizing and VLiveLineEnerg and VDeadLineEnerg for line energizing.
The frequency on both sides of the circuit breaker is also measured. The frequencies must not
deviate from the rated frequency more than +/-5Hz.
The Energizing direction can be selected individually for the Manual and the Automatic functions
respectively. When the conditions are met the outputs AUTOENOK and MANENOK respectively will
be activated if the fuse supervision conditions are fulfilled. The output signal can be delayed
independently for MANENOK and AUTOENOK conditions. The Energizing direction can also be
selected by an integer input AENMODE respective MENMODE, which for example, can be
connected to a Binary to Integer function block (B16I). Integers supplied shall be 1=Off, 2=DLLB,
3=DBLL and 4= Both. Not connected input will mean that the setting is done from Parameter
Setting tool. The active position can be read on outputs MODEAEN resp MODEMEN. The modes
are 0=OFF, 1=DLLB, 2=DBLL and 3=Both.
The inputs BLOCK and BLKENERG are available for total block of the complete SESRSYN (25)
function respective block of the Energizing check function. TSTENERG will allow testing of the
function where the fulfilled conditions are connected to a separate test output.
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manEnergOpenBays
MANENOK
OR
TSTENERG
BLKENERG
OR
BLOCK
selectedFuseOK
VLiveBusEnerg
AND 0 – 60 s
DLLB OR tManEnerg
VDeadLineEnerg AND
OR 0
AND
BOTH
ManEnerg
VDeadBusEnerg
DBLL
AND
VLiveLineEnerg
TSTENOK
ManEnergDBDL AND AND
VMaxEnerg
fBus and fLine ±5 Hz
Figure 392: Manual energizing
TSTENERG
BLKENERG
OR
BLOCK
selectedFuseOK
VLiveBusEnerg
DLLB 50ms 0 – 60 s
AND
OR t tAutoEnerg
AND OR
0 AUTOENOK
VDeadLineEnerg AND
BOTH
AutoEnerg
VDeadBusEnerg
DBLL
AND
VLiveLineEnerg
TSTENOK
VMaxEnerg AND
fBus and fLine ±5 Hz
Figure 393: Automatic energizing
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BLKENERG
BLOCK OR manEnergOpenBays
AND
ManEnerg
1½ bus CB
CBConfig AND
B1QOPEN
LN1QOPEN AND
OR
B1QCLD
B2QOPEN
AND
LN2QOPEN
1½ bus alt. CB AND OR

AND
OR
B2QCLD
AND
Tie CB
AND
AND
OR
AND
Figure 394: Open bays
Fuse failure supervision M14837-3 v10

External fuse failure signals or signals from a tripped fuse switch/MCB are connected to binary
inputs that are configured to the inputs of SESRSYN (25) function in the IED. Alternatively, the
internal signals from fuse failure supervision can be used when available. There are two alternative
connection possibilities. Inputs labelled OK must be connected if the available contact indicates
that the voltage circuit is healthy. Inputs labelled FF must be connected if the available contact
indicates that the voltage circuit is faulty.
The VB1OK/VB2OK and VB1FF/VB2FF inputs are related to the busbar voltage and the VLNOK and
VLNFF inputs are related to the line voltage. Configure them to the binary input or function
outputs that indicate the status of the external fuse failure of the busbar and line voltages. In the
event of a fuse failure, the energizing check function is blocked. The synchronism check function
requires full voltage on both sides, thus no blocking at fuse failure is needed.
Voltage selection M14836-3 v9

The voltage selection module including supervision of included voltage transformers for the
different arrangements is a basic part of the SESRSYN (25) function and determines the voltages
fed to the Synchronizing, Synchrocheck and Energizing check functions. This includes the selection
of the appropriate Line and Bus voltages and MCB supervision.
The voltage selection type to be used is set with the parameter CBConfig.
If No voltage sel. is set the voltages used will be V-Line1 and V-Bus1. This setting is also used in the
case when external voltage selection is provided. Fuse failure supervision for the used inputs must
also be connected.
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The voltage selection function, selected voltages, and fuse conditions are used for the
Synchronism check and Energizing check inputs.
For the disconnector positions it is advisable to use (NO) a and (NC) b type contacts to supply
Disconnector Open and Closed positions but, it is also possible to use an inverter for one of the
positions.
If breaker or disconnector positions not are available for deciding if energizing is allowed, it is
considered to be allowed to manually energize. This is only allowed for manual energizing in
breaker-and-a-half and Tie breaker arrangements. Manual energization of a completely open
diameter in 1 1/2 CB switchgear is allowed by internal logic.
Voltage selection for a single circuit breaker with double busbars M14838-3 v9
The setting CBConfig selected for Double Bus activates the voltage selection for single CB and
double busbars. This function uses the binary input from the disconnectors auxiliary contacts
BUS1_OP-BUS1_CL for Bus 1, and BUS2_OP-BUS2_CL for Bus 2 to select between bus 1 and bus 2
voltages. If the disconnector connected to bus 1 is closed and the disconnector connected to bus 2
is opened the bus 1 voltage is used. All other combinations use the bus 2 voltage. The outputs
B1SEL and B2SEL respectively indicate the selected Bus voltage.
The function checks the fuse-failure signals for bus 1, bus 2 and line voltage transformers. Inputs
VB1OK-VB1FF supervise the MCB for Bus 1 and VB2OK-VB2FF supervises the MCB for Bus 2. VL1OK
and VL1FF supervises the MCB for the Line voltage transformer. The inputs fail (FF) or healthy (OK)
can alternatively be used dependent on the available signal. If a VT failure is detected in the
selected voltage source an output signal VSELFAIL is set. This output signal is true if the selected
bus or line voltages have a VT failure. This output as well as the function can be blocked with the
input signal BLOCK. The function logic diagram is shown in figure 395.
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BUS1_OP
B1SEL
BUS1_CL AND
BUS2_OP B2SEL
NOT
BUS2_CL AND
invalidSelection
AND
bus1Voltage busVoltage
bus2Voltage
VB1OK AND
VB1FF OR
OR selectedFuseOK
AND
VB2OK AND
VB2FF OR VSELFAIL
AND
VL1OK
VL1FF OR
BLOCK
Figure 395: Logic diagram for the voltage selection function of a single circuit breaker with double busbars
Voltage selection for a breaker-and-a-half circuit breaker arrangement M14839-3 v8

Note that with breaker-and-a-half schemes three Synchronism check functions must be used for
the complete diameter. Below, the scheme for one Bus breaker and the Tie breaker is described.
With the setting parameter CBConfig the selection of actual CB location in the 1 1/2 circuit breaker
switchgear is done. The settings are: 1 1/2 Bus CB, 1 1/2 alt. Bus CB or Tie CB.
This voltage selection function uses the binary inputs from the disconnectors and circuit breakers
auxiliary contacts to select the right voltage for the SESRSYN function. For the bus circuit breaker
one side of the circuit breaker is connected to the busbar and the other side is connected either to
line 1, line 2 or the other busbar depending on the best selection of voltage circuit.
Inputs LINE1_OP-LINE1_CL, BUS1_OP-BUS1_CL, BUS2_OP-BUS2_CL, LINE2_OP-LINE2_CL are inputs

for the position of the Line disconnectors respectively the Bus and Tie breakers. The outputs
L1SEL, L2SEL and B2SEL will give indication of the selected Line voltage as a reference to the fixed
Bus 1 voltage, which indicates B1SEL.
The fuse supervision is connected to VL1OK-VL1FF, VL2OK-VL2FF and with alternative Healthy or
Failing fuse signals depending on what is available from each fuse (MCB).
The tie circuit breaker is connected either to bus 1 or line 1 voltage on one side and the other side
is connected either to bus 2 or line 2 voltage. Four different output combinations are possible, bus
to bus, bus to line, line to bus and line to line.
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• The line 1 voltage is selected if the line 1 disconnector is closed.

• The bus 1 voltage is selected if the line 1 disconnector is open and the bus 1 circuit breaker is
closed.
• The line 2 voltage is selected if the line 2 disconnector is closed.
• The bus 2 voltage is selected if the line 2 disconnector is open and the bus 2 circuit breaker is
closed.
The function also checks the fuse-failure signals for bus 1, bus 2, line 1 and line 2. If a VT failure is
detected in the selected voltage an output signal VSELFAIL is set. This output signal is true if the
selected bus or line voltages have a MCB trip. This output as well as the function can be blocked
with the input signal BLOCK. The function block diagram for the voltage selection of a bus circuit
breaker is shown in figure 396 and for the tie circuit breaker in figure 397.
LINE1_OP
AND
L1SEL
LINE1_CL
BUS1_OP
L2SEL
BUS1_CL AND AND
B2SEL
OR
LINE2_OP
LINE2_CL AND invalidSelection
AND
BUS2_OP AND
BUS2_CL AND
line1Voltage lineVoltage
line2Voltage
bus2Voltage
VB1OK
VB1FF OR
OR selectedFuseOK
VB2OK AND
AND
VB2FF OR
VSELFAIL
VL1OK AND
AND
VL1FF OR
VL2OK
AND
VL2FF OR
BLOCK
Figure 396: Simplified logic diagram for the voltage selection function for a bus circuit breaker in a breaker-
and-a-half arrangement
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LINE1_OP
AND
L1SEL
LINE1_CL
B1SEL
NOT
BUS1_OP AND
AND
BUS1_CL AND
line1Voltage busVoltage
bus1Voltage
LINE2_OP
L2SEL
LINE2_CL AND
B2SEL
NOT
invalidSelection
OR
BUS2_OP AND
AND
BUS2_CL AND
line2Voltage lineVoltage
bus2Voltage
VB1OK AND
VB1FF OR
OR selectedFuseOK
VB2OK AND
AND
VB2FF OR
VSELFAIL
VL1OK AND
AND
VL1FF OR
VL2OK
AND
VL2FF OR
BLOCK
Figure 397: Simplified logic diagram for the voltage selection function for the tie circuit breaker in breaker-
and-a-half arrangement.
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M12359-1 v12
Table 451: SESRSYN (25) technical data

Phase shift, jline - jbus (-180 to 180) degrees -
Voltage high limit for synchronism check ±0.5% of Vn at V ≤ Vn

Reset ratio, synchronism check > 95% -

Frequency difference limit between bus and (0.003-1.000) Hz ±2.5 mHz
line for synchronism check
Phase angle difference limit between bus and (5.0-90.0) degrees ±2.0 degrees
line for synchronism check
Voltage difference limit between bus and line (0.02-0.5) p.u ±0.5% of Vn
for synchronism check
Time delay output for synchronism check (0.000-60.000) s ±0.2% or ±35 ms whichever is
greater
Frequency difference minimum limit for (0.003-0.250) Hz ±2.5 mHz
synchronizing
Frequency difference maximum limit for (0.050-0.500) Hz ±2.5 mHz
synchronizing
Maximum allowed frequency rate of change (0.000-0.500) Hz/s ±10.0 mHz/s
Breaker closing pulse duration (0.050-60.000) s ±0.2% or ±15 ms whichever is
greater
tMaxSynch, which resets synchronizing (0.000-6000.00) s ±0.2% or ±35 ms whichever is
function if no close has been made before set greater
time
Minimum time to accept synchronizing (0.000-60.000) s ±0.2% or ±35 ms whichever is
conditions greater
Voltage high limit for energizing check ±0.5% of Vn at V ≤ Vn
Reset ratio, voltage high limit > 95% -

Voltage low limit for energizing check ±0.5% of Vn
Reset ratio, voltage low limit < 105% -

Maximum voltage for energizing ±0.5% of Vn at V ≤ Vn
Time delay for energizing check when voltage (0.000-60.000) s ±0.2% or ±100 ms whichever is
jumps from 0 to 90% of Vrated greater
Trip time for synchrocheck function when Min. = 15 ms –
angle difference between bus and line jumps Max. = 30 ms
from “PhaseDiff” + 2 degrees to “PhaseDiff” - 2
degrees
Trip time for energizing function when voltage Min. = 70 ms –
jumps from 0 to 90% of Vrated Max. = 90 ms
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14.2 Autorecloser for 1 phase, 2 phase and/or 3 phase

operation SMBRREC (79) IP14559-1 v6
M14890-1 v6
Function Description IEC 61850 IEC 60617 ANSI/IEEE C37.2

Autorecloser for 1 phase, 2 phase and/or 3 SMBRREC 79
phase
O->I
SYMBOL-L V1 EN-US
The autorecloser SMBRREC (79) function provides high-speed and/or delayed auto-reclosing for
single or multi-breaker applications.
Up to five three-phase reclosing attempts can be included by parameter setting. The first attempt
can be single-, two and/or three pole for single pole or multi-pole faults respectively.
Multiple autoreclosing functions are provided for multi-breaker arrangements. A priority circuit
allows one circuit breaker to close first and the second will only close if the fault proved to be
transient.
Each autoreclosing function is configured to co-operate with the synchronism check function.
The autoreclosing function provides high-speed and/or delayed three pole autoreclosing.
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SMBRREC (79)
ON BLOCKED
OFF SETON
BLKON READY
BLKOFF ACTIVE
RESET SUCCL
INHIBIT UNSUCCL
RI INPROGR
RI_HS 1PT1
TRSOTF 2PT1
SKIPHS 3PT1
ZONESTEP 3PT2
TR2P 3PT3
TR3P 3PT4
THOLHOLD 3PT5
CBREADY PERMIT1P
52A PREP3P
PLCLOST CLOSECMD
SYNC WFMASTER
WAIT COUNT1P
RSTCOUNT COUNT2P
MODEINT COUNT3P1
COUNT3P2
COUNT3P3
COUNT3P4
COUNT3P5
COUNTAR
MODE
Figure 398: SMBRREC (79) function block
14.2.4 Signals
Table 452: SMBRREC (79) Input signals

ON BOOLEAN 0 Switches the AR On (at ExternalCtrl = On)
OFF BOOLEAN 0 Switches the AR Off (at ExternalCtrl = On)
BLKON BOOLEAN 0 Sets the AR in blocked state
BLKOFF BOOLEAN 0 Releases the AR from the blocked state
RESET BOOLEAN 0 Resets the AR to initial conditions
INHIBIT BOOLEAN 0 Interrupts and inhibits reclosing sequence
RI BOOLEAN 0 Reclosing sequence starts by a protection trip signal
RI_HS BOOLEAN 0 Start High Speed reclosing without Synchronism-Check: t13PhHS
TRSOTF BOOLEAN 0 Makes AR to continue to shots 2-5 at a trip from SOTF
SKIPHS BOOLEAN 0 Will skip the high speed shot and continue on delayed shots
ZONESTEP BOOLEAN 0 Coordination between local AR and down stream devices
TR2P BOOLEAN 0 Signal to the AR that a two-pole tripping occurred
TR3P BOOLEAN 0 Signal to the AR that a three-pole tripping occurred
THOLHOLD BOOLEAN 0 Holds the AR in wait state
CBREADY BOOLEAN 0 CB must be ready for CO/OCO operation to allow start / close
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52a BOOLEAN 0 Status of the circuit breaker Closed/Open
PLCLOST BOOLEAN 0 Power line carrier or other form of permissive signal lost
SYNC BOOLEAN 0 Synchronism-check fulfilled (for 3Ph attempts)
WAIT BOOLEAN 0 Wait for master (in Multi-breaker arrangements)
RSTCOUNT BOOLEAN 0 Resets all counters
MODEINT INTEGER 0 Integer input used to set the reclosingMode, alternative to setting
Table 453: SMBRREC (79) Output signals

BLOCKED BOOLEAN The AR is in blocked state
SETON BOOLEAN The AR operation is switched on, operative
READY BOOLEAN Indicates that the AR function is ready for a new sequence
ACTIVE BOOLEAN Reclosing sequence in progress
SUCCL BOOLEAN Activated if CB closes during the time tUnsucCl
UNSUCCL BOOLEAN Reclosing unsuccessful, signal resets after the reclaim time
INPROGR BOOLEAN Reclosing shot in progress, activated during open reset
1PT1 BOOLEAN Single-phase reclosing is in progress, shot 1
2PT1 BOOLEAN Two-phase reclosing is in progress, shot 1
3PT1 BOOLEAN Three-phase reclosing in progress, shot 1
PERMIT1P BOOLEAN Permit single-pole trip, inverse signal to PREP3P
PREP3P BOOLEAN Prepare three-pole trip, control of the next trip operation
CLOSECMD BOOLEAN Closing command for CB
WFMASTER BOOLEAN Signal to Slave issued by Master for sequential reclosing
COUNT1P INTEGER Counting the number of single-phase reclosing shots
COUNT2P INTEGER Counting the number of two-phase reclosing shots
COUNT3P1 INTEGER Counting the number of three-phase reclosing shot 1
COUNTAR INTEGER Counting total number of reclosing shots
MODE INTEGER Integer output for reclosing mode
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14.2.5 Settings
Table 454: SMBRREC (79) Group settings (basic)

Enabled
ExternalCtrl Disabled - - Disabled To be set On if AR is to be used with
Enabled external control; Off / On
ARMode 3 phase - - 1/2/3ph The AR mode selection e.g. 3ph, 1/3ph
1/2/3ph
1/2ph
1ph+1*2ph
1/2ph+1*3ph
1ph+1*2/3ph
t1 1Ph 0.000 - 120.000 s 0.001 1.000 Open time for shot 1, single-phase
t1 3Ph 0.000 - 120.000 s 0.001 6.000 Open time for shot 1, delayed reclosing
3ph
t1 3PhHS 0.000 - 120.000 s 0.001 0.400 Open time for shot 1, high speed reclosing
3ph
tReset 0.00 - 6000.00 s 0.01 60.00 Duration of the reset time
tSync 0.00 - 6000.00 s 0.01 30.00 Maximum wait time for synchronism-check
OK
tTrip 0.000 - 60.000 s 0.001 0.200 Maximum trip pulse duration
tPulse 0.000 - 60.000 s 0.001 0.200 Duration of the circuit breaker closing
pulse
tCBClosedMin 0.00 - 6000.00 s 0.01 5.00 Minimum time that CB must be closed
before new sequence allows
tUnsucCl 0.00 - 6000.00 s 0.01 30.00 Wait time for CB before indicating
Unsuccessful/Successful
Priority None - - None Priority selection between adjacent
Low terminals None/Low/High
High
tWaitForMaster 0.00 - 6000.00 s 0.01 60.00 Maximum wait time for release from
Master
Table 455: SMBRREC (79) Group settings (advanced)

NoOfShots 1 - - 1 Max number of reclosing shots 1-5
2
3
4
5
StartByCBOpen Disabled - - Disabled To be set ON if AR is to be started by CB
Enabled open position
CBAuxContType NormClosed - - NormOpen Select the CB aux contact type NC/NO for
NormOpen 52a input
CBReadyType CO - - CO Select type of circuit breaker ready signal
OCO CO/OCO
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t1 2Ph 0.000 - 120.000 s 0.001 1.000 Open time for shot 1, two-phase
t2 3Ph 0.00 - 6000.00 s 0.01 30.00 Open time for shot 2, three-phase
Extended t1 Disabled - - Disabled Extended open time at loss of permissive
Enabled channel Off/On
tExtended t1 0.000 - 60.000 s 0.001 0.500 3Ph Dead time is extended with this value
at loss of perm ch
tInhibit 0.000 - 60.000 s 0.001 5.000 Inhibit reclosing reset time
CutPulse Disabled - - Disabled Shorten closing pulse at a new trip Off/On
Enabled
Follow CB Disabled - - Disabled Advance to next shot if CB has been closed
Enabled during dead time
AutoCont Disabled - - Disabled Continue with next reclosing-shot if
Enabled breaker did not close
tAutoContWait 0.000 - 60.000 s 0.001 2.000 Wait time after close command before
proceeding to next shot
UnsucClByCBChk NoCBCheck - - NoCBCheck Unsuccessful closing signal obtained by
CB check checking CB position
BlockByUnsucCl Disabled - - Disabled Block AR at unsuccessful reclosing
Enabled
ZoneSeqCoord Disabled - - Disabled Coordination of down stream devices to
Enabled local prot unit’s AR
14.2.6.1 Logic Diagrams M12394-372 v3
The logic diagrams below illustrate the principles applicable in the understanding of the
functionality.
14.2.6.2 Auto-reclosing operation Disabled and Enabled M12394-11 v8
Operation of the automatic reclosing can be set to Off or On via the setting parameters and
through external control. With the setting Operation = Enabled, the function is activated while
with the setting Operation = Disabled the function is deactivated. With the setting Operation =
Enabled and ExternalCtrl = On , the activation/deactivation is made by input signal pulses to the
inputs ON/OFF, for example, from a control system.
When the function is set Enabled and is operative the output SETON is activated (high). If the
input conditions 52a and CBREADY also are fulfilled, the automatic recloser is prepared to start
the reclosing cycle and the output signal READY on the SMBRREC (79) function block is activated
(high).
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14.2.6.3 Auto-reclosing mode selection M12394-382 v5
The Auto-reclosing mode is selected with setting ARMode = 3phase, 1/2/3ph, 1/2ph, 1ph+1*2ph,
1/2ph+1*3ph, 1ph+1*2/3ph.
As an alternative to setting the mode can be selected by connecting an integer, for example from
function block B16I to input MODEINT.
Following integers shall be used: 1=3phase, 2=1/2/3ph, 3=1/2ph, 4=1ph+1*2ph, 5=1/2ph+1*3ph or

6=1ph+1*2/3ph.
When a valid integer is connected to the input MODEINT the selected ARMode setting will be
invalid and the MODEINT input value will be used instead. The selected mode is reported as an
integer on the output MODE.
14.2.6.4 Initiate auto-reclosing and conditions for initiation of a reclosing cycle M12394-15 v10
The usual way to initiate a reclosing cycle, or sequence, is to initiate it when a selective line
protection tripping has occurred, by applying a signal to the RI input. It should be necessary to
adjust three-phase auto-reclosing open time, (dead time) for different power system
configurations or during tripping at different protection stages. The input RI_HS (reclose initiation
of high-speed reclosing) can also be used.
To start a new auto-reclosing cycle, a number of conditions of input signals need to be met. The
inputs are:
• CBREADY: CB ready for a reclosing cycle, for example, charged operating gear
• 52a: to ensure that the CB was closed when the line fault occurred and initiation was applied
• No BLKON or INHIBIT signal shall be present.
After the initiate has been accepted, it is latched in and an internal signal “Started” is set. It can be
interrupted by a signal to the INHIBIT input.
To initiate auto-reclosing by CB position Open instead of from protection trip signals, one has to
configure the CB Open position signal to inputs 52a and RI and set a parameter StartByCBOpen =
Enabled and CBAuxContType = NormClosed (normally closed, 52b). One also has to configure and
connect signals from manual trip commands to input INHIBIT.
The logic for switching the auto-recloser Enabled/Disabled and the starting of the reclosing is
shown in figure 399. The following should be considered:
• Setting Operation can be set to Disabled or Enabled. ExternalCtrl offers the possibility of
switching by external signals to inputs ON and OFF.
• SMBRREC (79) is normally started by tripping. It is either a Zone 1 and Communication aided
trip or a general trip. If the general trip is used the function must be blocked from all back-up
tripping connected to INHIBIT. In both alternatives the breaker failure function must be
connected to inhibit the function. RI makes a first attempt with synchronism-check, RI_HS
makes its first attempt without synchronism-check. TRSOTF starts shots 2-5.
• Circuit breaker checks that the breaker was closed for a time before the opening occurred and
that the CB has sufficient stored energy to perform an auto-reclosing sequence and is
connected to inputs 52a and CBREADY.
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Operation:Enabled
AND
External Ctrl: Enabled
OR S
ON AND SETON
OR R
AND
RI
RI_HS OR
initiate
autoInitiate OR
Additional conditions
TRSOTF AND
PICKUP
CBREADY AND
0 AND S
0-t120 AND
52a CB Closed 0-tCBClosedMin R
0
AND
Blocking conditions READY
AND
OR
Inhibit conditions
count 0
Figure 399: Auto-reclosing Disabled/Enabled and start
14.2.6.5 Control of the auto-reclosing open time for shot 1 M12394-49 v7
It is possible to use up to four different time settings for the first shot, and one extension time.
There are separate settings for single- , two- and three-phase auto-reclosing open times, t1 1Ph, t1
2Ph, t1 3Ph. If only the RI input signal is applied, and an auto-reclosing program with single-phase
reclosing is selected, the auto-reclosing open time t1 1Ph will be used. If one of the inputs TR2P or
TR3P is activated in conjunction with the input RI, the auto-reclosing open time for two-phase or
three-phase reclosing is used. There is also a separate time setting facility for three-phase high-
speed auto-reclosing, t1 3PhHS available for use when required. It is activated by input RI_HS.
An auto-reclosing open time extension delay, tExtended t1, can be added to the normal shot 1
delay. It is intended to come into use if the communication channel for permissive line protection
is lost. In a case like this there can be a significant time difference in fault clearance at the two line
ends. A longer auto-reclosing open time can then be useful. This extension time is controlled by
setting parameter Extended t1 = Enabled and the input PLCLOST.
14.2.6.6 Long trip signal M12394-78 v5
In normal circumstances the trip command resets quickly due to fault clearing. The user can set a
maximum trip pulse duration tTrip. When trip signals are longer, the auto-reclosing open time is
extended by tExtended t1. If Extended t1 = Disabled, a long trip signal interrupts the reclosing
sequence in the same way as a signal to input INHIBIT.
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Extended t1
PLCLOST Extend t1
initiate AND OR AND
AND
0-tTrip
pickup 0 AND
long duration
AND
(block SMBRREC)
Figure 400: Control of extended auto-reclosing open time and long trip pulse detection
M12394-81 v2
Reclosing checks and the reset timer M12394-180 v6

When dead time has elapsed during the auto-reclosing procedure certain conditions must be
fulfilled before the CB closing command is issued. To achieve this, signals are exchanged between
program modules to check that these conditions are met. In three-phase reclosing a synchronizing
and/or energizing check can be used. It is possible to use a synchronism check function in the
same physical device or an external one. The release signal is configured by connecting to the
auto-reclosing function input SYNC. If reclosing without checking is preferred the SYNC input can
be set to TRUE (set high). At confirmation from the synchronism check, or if the reclosing is of
single-phase or two-phase type, the signal passes on. At three-phase high-speed reclosing started
by RI_HS, synchronization is not checked, and the state of the SYNC input is disregarded.
By choosing CBReadyType = CO (CB ready for a Close-Open sequence) the readiness of the circuit
breaker is also checked before issuing the CB closing command. If the CB has a readiness contact
of type CBReadyType = OCO (CB ready for an Open-Close-Open sequence) this condition may not
be fulfilled during the dead time and at the moment of reclosure. The Open-Close-Open condition
was however checked at the start of the reclosing cycle and it is then likely that the CB is prepared
for a Close-Open sequence.
The synchronism check or energizing check must be fulfilled within a set time interval, tSync. If it is
not, or if other conditions are not met, the reclosing is interrupted and blocked.
The reset timer defines a time from the issue of the reclosing command, after which the reclosing
function resets. Should a new trip occur during this time, it is treated as a continuation of the first
fault. The reset timer is started when the CB closing command is given.
A number of outputs for Autoreclosing state control keeps track of the actual state in the
reclosing sequence.
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"SMBRREC Open time"

0-t1 1Ph timers
0
1P2PTO
From logic for OR
reclosing 0-t1 2Ph
0
programs
1P2PTO
0-t1 3Ph HS 3PHSTO
3PHSTO 0
3PT1TO
3PT2TO 0-t1 3Ph 3PT1TO
3PT3TO OR 0
AND
3PT4TO OR Pulse AR
3PT5TO AND
SYNC
initiate Blocking out
AND
CBREADY AND OR
SMBRREC State
0-tSync Control
AND
0 COUNTER
0 Shot 0
CL
Shot 1
1
Shot 2
2
Shot 3
3
Pulse SMBRREC (above) 0-tReset Shot 4
AND R 4
OR 0 Shot 5
5
TR2P LOGIC Reset Timer On
TR3P reclosing
1PT1
programs
PICKUP 2PT1
RI 3PHS
INPROGR
Shot 0 3PT1 OR
Shot 1 3PT2
Shot 2
Shot 3 3PT3
Shot 4
Shot 5 3PT4
PERMIT1P
3PT5
PREP3P
1
Blocking out
0 Inhibit (internal)
INHIBIT OR
tInhibit
Figure 401: Reclosing Reset and Inhibit timers
Pulsing of the CB closing command M12394-231 v7

The CB closing command, CLOSECMD is a pulse with a duration set by parameter tPulse. For
circuit-breakers without anti-pumping function, the close pulse cutting described below can be
used. This is done by selecting the parameter CutPulse=Enabled. In case of a new AR start pulse,
the closing command pulse is cut (interrupted). The minimum duration of the pulse is always 50
ms. See figure 402
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When a reclosing command is issued, the appropriate reclosing operation counter is incremented.
There is a counter for each type of reclosing and one for the total number of reclosing commands
issued.
tPulse
pulse
initiate **) AND CLOSECMD
OR
50 ms
1PT1 AND COUNT1P

counter
2PT1 AND COUNT2P

counter
3PT1 AND COUNT3P1

counter
3PT2 AND COUNT3P2

counter
3PT3 AND COUNT3P3

counter
3PT4 AND COUNT3P4

counter
3PT5 AND COUNT3P5

counter
counter COUNTAR
RSTCOUNT
**) Only if "CutPulse" = Enabled
Figure 402: Pulsing of closing command and driving the operation counters
Transient fault M12394-257 v3

After the reclosing command the reset timer tReset starts running for the set time. If no tripping
occurs within this time, the auto-reclosing will reset.
Permanent fault and reclosing unsuccessful signal M12394-260 v6

If a new trip occurs after the CB closing command, and number of set reclosing shot have been
done, a new input signal connected to RI or TRSOTF appears, the output UNSUCCL (unsuccessful
closing) is set high. The timers for the first shot can no longer be started. Depending on the
setting for the number of reclosing shots, further shots may be made or the reclosing sequence
will be ended. After the reset time has elapsed, the auto-reclosing function resets but the CB
remains open. The CB closed data at the 52a input will be missing. Because of this, the reclosing
function will not be ready for a new reclosing cycle.
Normally the signal UNSUCCL appears when a new trip and initiate is received after the last
reclosing shot has been made and the auto-reclosing function is blocked. The signal resets once
the reset time has elapsed. The “unsuccessful“ signal can also be made to depend on CB position
input. The parameter UnsucClByCBChk should then be set to CBCheck, and a timer tUnsucCl
should also be set. If the CB does not respond to the closing command and does not close, but
remains open, the output UNSUCCL is set high after time tUnsucCl.
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initiate
block start AND
OR UNSUCCL
AND S
shot 0 R
UnsucClByCBchk = CBcheck
Pulse AR (Closing) OR
AND
AND 0-tUnsucCl
52a CBclosed 0
en05000786_ansi.vsd
Figure 403: Issue of signal UNSUCCL, unsuccessful reclosing
Automatic continuation of the reclosing sequence M12394-283 v4

The auto-reclosing function can be programmed to proceed to the following reclosing shots (if
selected) even if the initiate signals are not received from the protection functions, but the
breaker is still not closed. This is done by setting parameter AutoCont = Enabled and to the
required delay for the function to proceed without a new initiate.
0-tAutoContWait
0
AND
CLOSECMD
AND S Q
AND
52a CBClosed
OR
initiate
RI OR
en05000787_ansi.vsd
Figure 404: Automatic proceeding of shot 2 to 5
Initiation of reclosing from CB open information M12394-308 v5

If a user wants to apply initiation of auto-reclosing from CB open position instead of from
protection trip signals, the function offers such a possibility. This starting mode is selected by a
setting parameter StartByCBOpen = Enabled. One needs then to block reclosing at all manual trip
operations. Typically, one also set CBAuxContType = NormClosed and connect a CB auxiliary
contact of type NC (normally closed, 52b) to inputs 52a and RI. When the signal changes from CB
closed to CB open an auto-reclosing start pulse of limited length is generated and latched in the
function, subject to the usual checks. Then the reclosing sequence continues as usual. One needs
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Technical manual
Control
to connect signals from manual tripping and other functions, which shall prevent reclosing, to the
input INHIBIT.
StartByCBOpen= Enabled
NOT
RI AND
RI_HS AND
PICKUP
³1
100 ms
AND
100 ms
AND
Figure 405: Pulsing of the pickup inputs
14.2.6.7 Time sequence diagrams M12458-10 v4
Some examples of the timing of internal and external signals at typical transient and permanent
faults are shown below in figures 406 to 409.
Fault
CB POS
Closed Open Closed
CB READY
RECL. INT. (Trip)

SYNC
tReset
READY
INPROG
1PT1
ACTIVE
CLOSE CMD t1 1Ph tPulse
PREP3P
SUCCL
Time
en04000196-2_ansi.vsd
Figure 406: Transient single-phase fault. Single -phase reclosing
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Technical manual
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Fault
CB POS Open
Closed Open C C
CB READY
RECL. INT. (Trip)
TR3P
SYNC
READY
INPROGR
3PT1 t1 3Ph
3PT2 t2 3Ph
ACTIVE tReset
CLOSE CMD tPulse tPulse
PREP3P
UNSUCCL
Time
en04000197_ansi.vsd
Figure 407: Permanent fault. Three-pole trip. Two-shot reclosing
Fault
AR01-CBCLOSED
AR01-CBREADY(CO)
AR01-RI
AR01-TR3P
AR01-SYNC
AR01-READY
AR01-INPROGR
AR01-1PT1
AR01-T1
AR01-T2
AR01-CLOSECMD t1s
AR01-P3P
AR01-UNSUC
tReset
en04000198_ansi.vsd
Figure 408: Permanent single-phase fault. Program 1/2/3ph, single-phase single-shot

reclosing
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Technical manual
Control
Fault
AR01-CBCLOSED
AR01-CBREADY(CO)
AR01-RI
AR01-TR3P
AR01-SYNC
AR01-READY
AR01-INPROGR
AR01-1PT1
AR01-T1
AR01-T2
t2
AR01-CLOSECMD t1s
AR01-P3P
AR01-UNSUC
tReset
en04000199_ansi.vsd
Figure 409: Permanent single-phase fault. Program 1ph + 3ph or 1/2ph + 3ph, two-shot
reclosing

M12379-1 v11
Table 456: SMBRREC (79) technical data

Number of autoreclosing shots 1-5 -
Autoreclosing open time:
shot 1 - t1 1Ph (0.000-120.000) s ±0.2% or ±35 ms
shot 1 - t1 2Ph whichever is greater
shot 1 - t1 3PhHS
shot 1 - t1 3Ph
shot 2 - t2 3Ph (0.00-6000.00) s ±0.2% or ±35 ms
shot 3 - t3 3Ph whichever is greater
shot 4 - t4 3Ph
shot 5 - t5 3Ph
Extended autorecloser open time (0.000-60.000) s ±0.2% or ±35 ms
Minimum time CB must be closed before AR becomes ready (0.00-6000.00) s ±0.2% or ±35 ms
for autoreclosing cycle whichever is greater
Maximum trip pulse duration (0.000-60.000) s ±0.2% or ±15 ms
Reset time (0.00-6000.00) s ±0.2% or ±15 ms
Circuit breaker closing pulse length (0.000-60.000) s ±0.2% or ±15 ms
Wait for master release (0.00-6000.00) s ±0.2% or ±15 ms
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Inhibit reset time (0.000-60.000) s ±0.2% or ±45 ms
Autorecloser maximum wait time for sync (0.00-6000.00) s ±0.2% or ±45 ms
CB check time before unsuccessful (0.00-6000.00) s ±0.2% or ±45 ms
Wait time after close command before proceeding to next (0.000-60.000) s ±0.2% or ±45 ms
shot whichever is greater
14.3 Interlocking (3) IP15572-1 v2
The interlocking functionality blocks the possibility to operate high-voltage switching devices, for
instance when a disconnector is under load, in order to prevent material damage and/or
accidental human injury.
Each control IED has interlocking functions for different switchyard arrangements, each handling
the interlocking of one bay. The interlocking functionality in each IED is not dependent on any
central function. For the station-wide interlocking, the IEDs communicate via the station bus or by
using hard wired binary inputs/outputs.
The interlocking conditions depend on the circuit configuration and status of the system at any
given time.
The interlocking function consists of software modules located in each control IED. The function is
distributed and not dependent on any central function. Communication between modules in
different bays is performed via the station bus.
The reservation function (see section "Functionality") is used to ensure that HV apparatuses that
might affect the interlock are blocked during the time gap, which arises between position
updates. This can be done by means of the communication system, reserving all HV apparatuses
that might influence the interlocking condition of the intended operation. The reservation is
maintained until the operation is performed.
After the selection and reservation of an apparatus, the function has complete data on the status
of all apparatuses in the switchyard that are affected by the selection. Other operators cannot
interfere with the reserved apparatus or the status of switching devices that may affect it.
The open or closed positions of the HV apparatuses are inputs to software modules distributed in
the control IEDs. Each module contains the interlocking logic for a bay. The interlocking logic in a
module is different, depending on the bay function and the switchyard arrangements, that is,
double-breaker or breaker-and-a-half bays have different modules. Specific interlocking
conditions and connections between standard interlocking modules are performed with an
engineering tool. Bay-level interlocking signals can include the following kind of information:
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Technical manual
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• Positions of HV apparatuses (sometimes per phase)

• Valid positions (if evaluated in the control module)
• External release (to add special conditions for release)
• Line voltage (to block operation of line grounding switch)
• Output signals to release the HV apparatus
The interlocking module is connected to the surrounding functions within a bay as shown in figure
410.
Apparatus control
Interlocking
modules
modules in
SCILO SCSWI
other bays SXSWI
Apparatus control
modules
Interlocking SCILO SCSWI SXCBR 152
module
Apparatus control
modules
SCILO SCSWI SXSWI
en04000526_ansi.vsd
Figure 410: Interlocking module on bay level

Bays communicate via the station bus and can convey information regarding the following:
• Ungrounded busbars
• Busbars connected together
• Other bays connected to a busbar
• Received data from other bays is valid
Figure 411 illustrates the data exchange principle.
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Technical manual
Control
Station bus
Bay 1 Bay n Bus coupler
Disc 189 and 289 closed Disc 189 and 289 closed WA1 ungrounded
WA1 ungrounded
WA1 and WA2 interconn
...
WA1 not grounded WA1 not grounded
WA2 not grounded WA2 not grounded WA1 and WA2 interconn
WA1 and WA2 interconn WA1 and WA2 interconn in other bay
..
WA1
WA2
189 289 189 289 189 289 189G 289G
152
152 152
989 989
en05000494_ansi.vsd
Figure 411: Data exchange between interlocking modules

When invalid data such as intermediate position, loss of a control IED, or input board error are
used as conditions for the interlocking condition in a bay, a release for execution of the function
will not be given.
On the local HMI an override function exists, which can be used to bypass the interlocking function
in cases where not all the data required for the condition is valid.
For all interlocking modules these general rules apply:
• The interlocking conditions for opening or closing of disconnectors and grounding switches
are always identical.
• Grounding switches on the line feeder end, for example, rapid grounding switches, are
normally interlocked only with reference to the conditions in the bay where they are located,
not with reference to switches on the other side of the line. So a line voltage indication may be
included into line interlocking modules. If there is no line voltage supervision within the bay,
then the appropriate inputs must be set to no voltage, and the operator must consider this
when operating.
• Grounding switches can only be operated on isolated sections for example, without load/
voltage. Circuit breaker contacts cannot be used to isolate a section, that is, the status of the
circuit breaker is irrelevant as far as the grounding switch operation is concerned.
• Disconnectors cannot break power current or connect different voltage systems.
Disconnectors in series with a circuit breaker can only be operated if the circuit breaker is
open, or if the disconnectors operate in parallel with other closed connections. Other
disconnectors can be operated if one side is completely isolated, or if the disconnectors
operate in parallel to other closed connections, or if they are grounding on both sides.
• Circuit breaker closing is only interlocked against running disconnectors in its bay or
additionally in a transformer bay against the disconnectors and grounding switch on the
other side of the transformer, if there is no disconnector between CB and transformer.
• Circuit breaker opening is only interlocked in a bus-coupler bay, if a bus bar transfer is in
progress.
To make the implementation of the interlocking function easier, a number of standardized and
tested software interlocking modules containing logic for the interlocking conditions are
available:
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Technical manual
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• Line for double and transfer busbars, ABC_LINE (3)

• Bus for double and transfer busbars, ABC_BC (3)
• Transformer bay for double busbars, AB_TRAFO (3)
• Bus-section breaker for double busbars, A1A2_BS (3)
• Bus-section disconnector for double busbars, A1A2_DC (3)
• Busbar grounding switch, BB_ES (3)
• Double CB Bay, DB_BUS_A(3), DB_LINE(3), DB_BUS_B(3)
• Breaker-and-a-half diameter, BH_LINE_A, BH_CONN, BH_LINE_B (3)
The interlocking conditions can be altered, to meet the customer specific requirements, by adding
configurable logic by means of the graphical configuration tool PCM600. The inputs Qx_EXy on the
interlocking modules are used to add these specific conditions.
The input signals EXDU_xx shall be set to true if there is no transmission error at the transfer of
information from other bays. Required signals with designations ending in TR are intended for
transfer to other bays.
14.3.3 Logical node for interlocking SCILO (3) IP14138-1 v2
14.3.3.1 Identification
GUID-3EC5D7F1-FDA0-4F0E-9391-08D357689E0C v3

Logical node for interlocking SCILO - 3
14.3.3.2 Functionality M15048-3 v6
The Logical node for interlocking SCILO(3) function is used to enable a switching operation if the
interlocking conditions permit. SCILO (3) function itself does not provide any interlocking
functionality. The interlocking conditions are generated in separate function blocks containing the
interlocking logic.
14.3.3.3 Function block M15049-3 v6
SCILO (3)
POSOPEN EN_OPEN
POSCLOSE EN_CLOSE
OPEN_EN
CLOSE_EN
Figure 412: SCILO (3) function block
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Technical manual
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14.3.3.4 Signals
Table 457: SCILO (3) Input signals

POSOPEN BOOLEAN 0 Open position of switch device
POSCLOSE BOOLEAN 0 Closed position of switch device
OPEN_EN BOOLEAN 0 Open operation from interlocking logic is enabled
CLOSE_EN BOOLEAN 0 Close operation from interlocking logic is enabled
Table 458: SCILO (3) Output signals

EN_OPEN BOOLEAN Open operation at closed or intermediate or bad position is
enabled
EN_CLOSE BOOLEAN Close operation at open or intermediate or bad position is
enabled
The function contains logic to enable the open and close commands respectively if the
interlocking conditions are fulfilled. That means also, if the switch has a defined end position for
example, open, then the appropriate enable signal (in this case EN_OPEN) is false. The enable
signals EN_OPEN and EN_CLOSE can be true at the same time only in the intermediate and bad
position state and if they are enabled by the interlocking function. The position inputs come from
the logical nodes Circuit breaker/Circuit switch (SXCBR/SXSWI) and the enable signals come from
the interlocking logic. The outputs are connected to the logical node Switch controller (SCSWI).
One instance per switching device is needed.
POSOPEN SCILO
POSCLOSE XOR NOT
AND EN_OPEN
OR
AND
OPEN_EN
CLOSE_EN AND EN_CLOSE
OR
AND
en04000525_ansi.vsd
Figure 413: SCILO (3) function logic diagram
14.3.4 Interlocking for busbar grounding switch BB_ES (3) IP14164-1 v4
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Technical manual
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GUID-F3CBAFDC-3723-429F-9183-45229A6F0A12 v3

Interlocking for busbar grounding BB_ES - 3
switch
The interlocking for busbar grounding switch (BB_ES, 3) function is used for one busbar grounding
switch on any busbar parts according to figure 414.
89G
en04000504.vsd
Figure 414: Switchyard layout BB_ES (3)
BB_ES (3)
89G_OP 89GREL
89G_CL 89GITL
BB_DC_OP BBGSOPTR
VP_BB_DC BBGSCLTR
EXDU_BB
Figure 415: BB_ES (3) function block
BB_ES
VP_BB_DC 89GREL
BB_DC_OP AND 89GITL
EXDU_BB NOT
89G_OP BBGSOPTR
89G_CL BBGSCLTR
en04000546_ansi.vsd
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Technical manual
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14.3.4.5 Signals
Table 459: BB_ES (3) Input signals

89G_OP BOOLEAN 0 Busbar grounding switch 89G is in open position
89G_CL BOOLEAN 0 Busbar grounding switch 89G is in closed position
BB_DC_OP BOOLEAN 0 All disconnectors on this busbar part are open
VP_BB_DC BOOLEAN 0 Status for all disconnectors on this busbar part are valid
EXDU_BB BOOLEAN 0 No transm error from bays with disc on this busbar part
Table 460: BB_ES (3) Output signals

89GREL BOOLEAN Switching of 89G is allowed
89GITL BOOLEAN Switching of 89G is not allowed
BBGSOPTR BOOLEAN 89G on this busbar part is in open position
BBGSCLTR BOOLEAN 89G on this busbar part is in closed position
14.3.5 Interlocking for bus-section breaker A1A2_BS (3) IP14154-1 v2
GUID-29EF1F25-E10A-4C82-A6B7-FA246D9C6CD2 v3

Interlocking for bus-section breaker A1A2_BS - 3
The interlocking for bus-section breaker (A1A2_BS ,3) function is used for one bus-section circuit
breaker between section 1 and 2 according to figure 416. The function can be used for different
busbars, which includes a bus-section circuit breaker.
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Technical manual
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WA1 (A1) WA2 (A2)
189G 189 289 289G
152
389G 489G
A1A2_BS
en04000516_ansi.vsd
Figure 416: Switchyard layout A1A2_BS (3)
A1A2_BS (3)
152_OP 152OPREL
152_CL 152OPITL
189_OP 152CLREL
189_CL 152CLITL
289_OP 189REL
289_CL 189ITL
389G_OP 289REL
389G_CL 289ITL
489G_OP 389GREL
489G_CL 389GITL
S189G_OP 489GREL
S189G_CL 489GITL
S289G_OP S1S2OPTR
S289G_CL S1S2CLTR
BBTR_OP 189OPTR
VP_BBTR 189CLTR
EXDU_12 289OPTR
EXDU_89G 289CLTR
152O_EX1 VPS1S2TR
152O_EX2 VP189TR
152O_EX3 VP289TR
189_EX1
189_EX2
289_EX1
289_EX2
Figure 417: A1A2_BS (3) function block
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Technical manual
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A1A2_BS
152_OP
152_CL XOR VP152
189_OP
189_CL XOR VP189
289_OP
289_CL XOR VP289
389G_OP
389G_CL XOR VP389G
489G_OP
489G_CL XOR VP489G
S1189G_OP
S1189G_CL XOR VPS1189G
S2289G_OP
S2289G_CL XOR VPS2289G
VP189
189_OP AND OR 152OPREL
152O_EX1 152OPITL
NOT
VP289
289_OP AND
152O_EX2
VP_BBTR
BBTR_OP AND
EXDU_12
152O_EX3
VP189 152CLREL
VP289 AND 152CLITL
NOT
VP152
VP389G AND OR 189REL
VP489G 189ITL
NOT
VPS1189G
152_OP
389G_OP
489G_OP
S1189G_OP
EXDU_89G
189_EX1
VP389G
VPS1189G AND
389G_CL
S1189G_CL
EXDU_89G
189_EX2
en04000542_ansi.vsd
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Technical manual
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VP152
VP489G 289ITL
NOT
VPS2289G
152_OP
389G_OP
489G_OP
S2289G_OP
EXDU_89G
289_EX1
VP489G
VPS2289G AND
489G_CL
S2289G_CL
EXDU_89G
289_EX2
VP189 389GREL
VP289 AND 389GITL
189_OP NOT
489GREL
289_OP
489GITL
NOT
189_OP 189OPTR
189_CL 189CLTR
VP189 VP189TR
289_OP 289OPTR
289_CL 289CLTR
VP289 VP289TR
189_OP S1S2OPTR
289_OP OR S1S2CLTR
152_OP NOT
VP189 VPS1S2TR
VP289 AND
VP152
en04000543_ansi.vsd
14.3.5.5 Signals
Table 461: A1A2_BS (3) Input signals

152_OP BOOLEAN 0 152 is in open position
152_CL BOOLEAN 0 152 is in closed position
389G_OP BOOLEAN 0 389G is in open position
389G_CL BOOLEAN 0 389G is in closed position
S189G_OP BOOLEAN 0 S189G on bus section 1 is in open position
S189G_CL BOOLEAN 0 S189G on bus section 1 is in closed position
BBTR_OP BOOLEAN 0 No busbar transfer is in progress
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Technical manual
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VP_BBTR BOOLEAN 0 Status are valid for apparatuses involved in the busbar transfer
EXDU_12 BOOLEAN 0 No transm error from any bay connected to busbar 1 and 2
EXDU_89G BOOLEAN 0 No transm error from bays containing ground sw. S189G or S289G
152O_EX1 BOOLEAN 0 External open condition for apparatus 152
189_EX1 BOOLEAN 0 External condition for apparatus 189
Table 462: A1A2_BS (3) Output signals

152OPREL BOOLEAN Opening of 152 is allowed
152OPITL BOOLEAN Opening of 152 is not allowed
152CLREL BOOLEAN Closing of 152 is allowed
152CLITL BOOLEAN Closing of 152 is not allowed
189REL BOOLEAN Switching of 189 is allowed
189ITL BOOLEAN Switching of 189 is not allowed
S1S2OPTR BOOLEAN No bus section connection between bus section 1 and 2
S1S2CLTR BOOLEAN Bus coupler connection between bus section 1 and 2 exists
189OPTR BOOLEAN 189 is in open position
189CLTR BOOLEAN 189 is in closed position
VPS1S2TR BOOLEAN Status of the apparatuses between bus section 1 and 2 are valid
VP189TR BOOLEAN Switch status of 189 is valid (open or closed)
14.3.6 Interlocking for bus-section disconnector A1A2_DC (3) IP14159-1 v2
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GUID-0A0229EB-5ECD-405C-B706-6A54CBBDB49D v3

Interlocking for bus-section A1A2_DC - 3
disconnector
The interlocking for bus-section disconnector (A1A2_DC, 3) function is used for one bus-section
disconnector between section 1 and 2 according to figure 418. A1A2_DC (3) function can be used
for different busbars, which includes a bus-section disconnector.
WA1 (A1) WA2 (A2)
52
189G 289G
A1A2_DC en04000492_ansi.vsd
Figure 418: Switchyard layout A1A2_DC (3)
A1A2_DC (3)
089_OP 089OPREL
089_CL 089OPITL
S189G_OP 089CLREL
S189G_CL 089CLITL
S289G_OP DCOPTR
S289G_CL DCCLTR
S1DC_OP VPDCTR
S2DC_OP
VPS1_DC
VPS2_DC
EXDU_89G
EXDU_BB
089C_EX1
089C_EX2
089O_EX1
089O_EX2
089O_EX3
Figure 419: A1A2_DC (3) function block
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Technical manual
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A1A2_DC
89_OP
VPQB VPDCTR
89_CL XOR
DCOPTR
DCCLTR
S1189G_OP
VPS1189G
S1189G_CL XOR
S2289G_OP
VPS2289G
S2289G_CL XOR
VPS1189G
VPS2289G AND OR
VPS1_DC 89OPREL
S1189G_OP NOT
89OPITL
S2289G_OP
S1DC_OP
EXDU_89G
EXDU_BB
QBOP_EX1
VPS1189
VPS2289G AND
VPS2_DC
S1189G_OP
S2289G_OP
S2DC_OP
EXDU_89G
EXDU_BB
QBOP_EX2
VPS1189G
VPS2289G AND
S1189G_CL
S2289G_CL
EXDU_89G
QBOP_EX3
en04000544_ansi.vsd
14.3.6.5 Signals
Table 463: A1A2_DC (3) Input signals

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Technical manual
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S1DC_OP BOOLEAN 0 All disconnectors on bus section 1 are in open position
S2DC_OP BOOLEAN 0 All disconnectors on bus section 2 are in open position
VPS1_DC BOOLEAN 0 Switch status of disconnectors on bus section 1 are valid
VPS2_DC BOOLEAN 0 Switch status of disconnectors on bus section 2 are valid
EXDU_89G BOOLEAN 0 No transm error from bays containing ground sw. S189G or S289G
EXDU_BB BOOLEAN 0 No transm error from bays with disc conn to section 1 and 2
089C_EX1 BOOLEAN 0 External close condition for section disconnector 089
089C_EX2 BOOLEAN 0 External close condition for section disconnector 089
089O_EX1 BOOLEAN 0 External open condition for section disconnector 089
Table 464: A1A2_DC (3) Output signals

DCOPTR BOOLEAN The bus section disconnector is in open position
DCCLTR BOOLEAN The bus section disconnector is in closed position
VPDCTR BOOLEAN Switch status of 089 is valid (open or closed)
14.3.7 Interlocking for bus-coupler bay ABC_BC (3) IP14144-1 v2
GUID-8149EE0A-E2A4-431C-9D07-D1A0BD296743 v3

Interlocking for bus-coupler bay ABC_BC - 3
The interlocking for bus-coupler bay (ABC_BC, 3) function is used for a bus-coupler bay connected
to a double busbar arrangement according to figure 420. The function can also be used for a
752
Technical manual
Control
single busbar arrangement with transfer busbar or double busbar arrangement without transfer
busbar.
WA1 (A)
WA2 (B)
WA7 (C)
189 289 2089 789

189G
152
289G
en04000514_ansi.vsd
Figure 420: Switchyard layout ABC_BC (3)
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Technical manual
Control
ABC_BC (3)
152_OP 152OPREL
152_CL 152OPITL
189_OP 152CLREL
189_CL 152CLITL
289_OP 189REL
289_CL 189ITL
789_OP 289REL
789_CL 289ITL
2089_OP 789REL
2089_CL 789ITL
189G_OP 2089REL
189G_CL 2089ITL
289G_OP 189GREL
289G_CL 189GITL
1189G_OP 289GREL
1189G_CL 289GITL
2189G_OP 189OPTR
2189G_CL 189CLTR
7189G_OP 22089OTR
7189G_CL 22089CTR
BBTR_OP 789OPTR
BC_12_CL 789CLTR
VP_BBTR 1289OPTR
VP_BC_12 1289CLTR
EXDU_89G BC12OPTR
EXDU_12 BC12CLTR
EXDU_BC BC17OPTR
152O_EX1 BC17CLTR
152O_EX2 BC27OPTR
152O_EX3 BC27CLTR
189_EX1 VP189TR
189_EX2 V22089TR
189_EX3 VP789TR
289_EX1 VP1289TR
289_EX2 VPBC12TR
289_EX3 VPBC17TR
2089_EX1 VPBC27TR
2089_EX2
789_EX1
789_EX2
Figure 421: ABC_BC (3) function block
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Technical manual
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ABC_BC
152_OP
152_CL XOR VP152
189_OP
189_CL XOR VP189
2089_OP
2089_CL XOR VP2089
789_OP
789_CL XOR VP789
289_OP
289_CL XOR VP289
189G_OP
189G_CL XOR VP189G
289G_OP
289G_CL XOR VP289G
1189G_OP
1189G_CL XOR VP1189G
2189G_OP
7189G_OP
VP189
189_OP AND
152OPREL
OR
152O_EX1 152OPITL
NOT
VP2089
2089_OP AND
152O_EX2
VP_BBTR
BBTR_OP AND
EXDU_12
152O_EX3
VP189 152CLREL
VP289 AND 152CLITL
VP789 NOT
VP2089
en04000533_ansi.vsd
VP152
VP289 AND OR 189REL
VP189G 189ITL
VP289G NOT
VP1189G
152_OP
289_OP
189G_OP
289G_OP
1189G_OP
EXDU_89G
189_EX1
VP289
VP_BC_12 AND
289_CL
BC_12_CL
EXDU_BC
189_EX2
VP189G
VP1189G AND
189G_CL
1189G_CL
EXDU_89G
189_EX3
en04000534_ansi.vsd
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Technical manual
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VP152
VP189 AND OR 289REL
VP189G 289ITL
VP289G NOT
VP2189G
152_OP
189_OP
189G_OP
289G_OP
2189G_OP
EXDU_89G
289_EX1
VP189
VP_BC_12 AND
189_CL
BC_12_CL
EXDU_BC
289_EX2
VP189G
VP2189G AND
189G_CL
2189G_CL
EXDU_89G
289_EX3
en04000535_ansi.vsd
VP152
VP2089 AND OR 789REL
VP189G 789ITL
VP289G NOT
VP7189G
152_OP
2089_OP
189G_OP
289G_OP
7189G_OP
EXDU_89G
789_EX1
VP289G
VP7189G AND
289G_CL
7189G_CL
EXDU_89G
789_EX2
VP152
VP789 AND OR
2089REL
VP189G 2089ITL
VP289G NOT
VP2189G
152_OP
789_OP
189G_OP
289G_OP
2189G_OP
EXDU_89G
2089_EX1
VP289G
VP2189G AND
289G_CL
2189G_CL
EXDU_89G
2089_EX2
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Technical manual
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VP189 189GREL
VP2089 AND 189GITL
VP789 NOT
289GREL
VP289
189_OP NOT
289GITL
2089_OP
789_OP
289_OP
189_OP 189OPTR
189_CL 189CLTR
VP189 VP189TR
2089_OP 22089OTR
289_OP AND 22089CTR
VP2089 NOT
V22089TR
VP289 AND
789_OP 789OPTR
789_CL 789CLTR
VP789 VP789TR
189_OP 1289OPTR
289_OP OR 1289CLTR
VP189 NOT
VP1289TR
VP289 AND
152_OP BC12OPTR
189_OP OR BC12CLTR
2089_OP NOT
VP152
VPBC12TR
VP189 AND
VP2089
152_OP BC17OPTR
189_OP OR BC17CLTR
789_OP NOT
VP152
VPBC17TR
VP189 AND
VP789
152_OP BC27OPTR
289_OP OR BC27CLTR
789_OP NOT
VP152
VPBC27TR
VP289 AND
VP789
en04000537_ansi.vsd
14.3.7.5 Signals
Table 465: ABC_BC (3) Input signals

757
Technical manual
Control

1189G_OP BOOLEAN 0 Grounding switch 1189G on busbar 1 is in open position
1189G_CL BOOLEAN 0 Grounding switch 1189G on busbar 1 is in closed position
BBTR_OP BOOLEAN 0 No busbar transfer is in progress
BC_12_CL BOOLEAN 0 A bus coupler connection exists between busbar Bus1 and Bus2
VP_BBTR BOOLEAN 0 Status are valid for apparatuses involved in the busbar transfer
VP_BC_12 BOOLEAN 0 Status of the bus coupler apparatuses between Bus1 and Bus2 are
valid
EXDU_89G BOOLEAN 0 No transm error from any bay containing grounding switches
EXDU_12 BOOLEAN 0 No transm error from any bay connected to WA1/WA2 busbars
EXDU_BC BOOLEAN 0 No transmission error from any other bus coupler bay
Table 466: ABC_BC (3) Output signals

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Technical manual
Control

22089OTR BOOLEAN 289 and 2089 are in open position
22089CTR BOOLEAN 289 or 2089 or both are not in open position
1289OPTR BOOLEAN 189 or 289 or both are in open position
1289CLTR BOOLEAN 189 and 289 are not in open position
BC12OPTR BOOLEAN No connection via the own bus coupler between Bus1 and Bus2
BC12CLTR BOOLEAN Connection exists via the own bus coupler between Bus1 and Bus2
BC17OPTR BOOLEAN No connection via the own bus coupler between Bus1 and Bus 7
BC27OPTR BOOLEAN No connection via the own bus coupler between Bus 2 and bus 7
V22089TR BOOLEAN Switch status of 289 and 2089 are valid (open or closed)
VP1289TR BOOLEAN Switch status of 189 and 289 are valid (open or closed)
VPBC12TR BOOLEAN Status of the bus coupler apparatuses between Bus1 and Bus2 are
valid
VPBC17TR BOOLEAN Status of the bus coupler app. between WA1 and WA7 are valid
VPBC27TR BOOLEAN Status of the bus coupler app. between WA2 and WA7 are valid
14.3.8 Interlocking for breaker-and-a-half diameter BH (3) IP14173-1 v3
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Technical manual
Control
GUID-03F1A3BB-4A1E-49E8-88C6-10B3876F64DA v4

Interlocking for breaker-and-a-half BH_CONN - 3
diameter
Interlocking for breaker-and-a-half BH_LINE_A - 3
diameter
Interlocking for breaker-and-a-half BH_LINE_B - 3
diameter
The interlocking for breaker-and-a-half diameter (BH_CONN(3), BH_LINE_A(3), BH_LINE_B(3))

functions are used for lines connected to a breaker-and-a-half diameter according to figure 422.
WA1 (A)
WA2 (B)
189 289
189G 189G
152 152
289G 289G
689 689
389G 389G
BH_LINE_A BH_LINE_B
6189 6289
152
989 989
189G 289G
989G 989G
BH_CONN
en04000513_ansi.vsd
Figure 422: Switchyard layout breaker-and-a-half

M13570-7 v4
Three types of interlocking modules per diameter are defined. BH_LINE_A (3) and BH_LINE_B (3)
are the connections from a line to a busbar. BH_CONN (3) is the connection between the two lines
of the diameter in the breaker-and-a-half switchyard layout.
760
Technical manual
Control
14.3.8.3 Function blocks IP14412-1 v1
M13574-3 v6
BH_LINE_A (3)
152_OP 152CLREL
152_CL 152CLITL
689_OP 689REL
689_CL 689ITL
189_OP 189REL
189_CL 189ITL
189G_OP 189GREL
189G_CL 189GITL
289G_OP 289GREL
289G_CL 289GITL
389G_OP 389GREL
389G_CL 389GITL
989_OP 989REL
989_CL 989ITL
989G_OP 989GREL
989G_CL 989GITL
C152_OP 189OPTR
C152_CL 189CLTR
C6189_OP VP189TR
C6189_CL
C189G_OP
C189G_CL
C289G_OP
C289G_CL
1189G_OP
1189G_CL
VOLT_OFF
VOLT_ON
EXDU_89G
689_EX1
689_EX2
189_EX1
189_EX2
989_EX1
989_EX2
989_EX3
989_EX4
989_EX5
989_EX6
989_EX7
Figure 423: BH_LINE_A (3) function block
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Technical manual
Control
M13578-3 v6
BH_LINE_B (3)
152_OP 152CLREL
152_CL 152CLITL
689_OP 689REL
689_CL 689ITL
289_OP 289REL
289_CL 289ITL
189G_OP 189GREL
189G_CL 189GITL
289G_OP 289GREL
289G_CL 289GITL
389G_OP 389GREL
389G_CL 389GITL
989_OP 989REL
989_CL 989ITL
989G_OP 989GREL
989G_CL 989GITL
C152_OP 289OPTR
C152_CL 289CLTR
C6289_OP VP289TR
C6289_CL
C189G_OP
C189G_CL
C289G_OP
C289G_CL
2189G_OP
2189G_CL
VOLT_OFF
VOLT_ON
EXDU_89G
689_EX1
689_EX2
289_EX1
289_EX2
989_EX1
989_EX2
989_EX3
989_EX4
989_EX5
989_EX6
989_EX7
Figure 424: BH_LINE_B (3) function block

M13582-3 v6
BH_CONN (3)
152_OP 152CLREL
152_CL 152CLITL
6189_OP 6189REL
6189_CL 6189ITL
6289_OP 6289REL
6289_CL 6289ITL
189G_OP 189GREL
189G_CL 189GITL
289G_OP 289GREL
289G_CL 289GITL
1389G_OP
1389G_CL
2389G_OP
2389G_CL
6189_EX1
6189_EX2
6289_EX1
6289_EX2
Figure 425: BH_CONN (3) function block
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Technical manual
Control
M13577-1 v5
BH_CONN
152_OP
152_CL XOR VP152
6189_OP
6189_CL XOR VP6189
6289_OP
6289_CL XOR VP6289
189G_OP
189G_CL XOR VP189G
289G_OP
289G_CL XOR VP289G
1389G_OP
2389G_OP
VP6189 152CLREL
VP6289 AND 152CLITL
NOT
VP152
VP289G 61891ITL
NOT
VP1389G
152_OP
189G_OP
289G_OP
1389G_OP
6189_EX1
VP189G
VP1389G AND
189G_CL
1389G_CL
6189_EX2
VP152
VP289G 6289ITL
NOT
VP2389G
152_OP
189G_OP
289G_OP
2389G_OP
6289_EX1
VP289G
VP2389G AND
289G_CL
2389G_CL
6289_EX2
VP6189 189GREL
VP6289 AND NOT 189GITL
6189_OP 289GREL
6289_OP NOT
289GITL
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Technical manual
Control
BH_LINE_A
152_OP
152_CL XOR VP152
189_OP
189_CL XOR VP189
689_OP
689_CL XOR VP689
989G_OP
989G_CL XOR VP989G
989_OP
989_CL XOR VP989
189G_OP
189G_CL XOR VP189G
289G_OP
289G_CL XOR VP289G
389G_OP
389G_CL XOR VP389G
C152_OP
C152_CL XOR VPC152
C189G_OP
C189G_CL XOR VPC189G
C289G_OP
C6189_OP
C6189_CL XOR VPC6189
1189G_OP
VOLT_OFF
VOLT_ON XOR VPVOLT
VP189 152CLREL
VP689 152CLITL
AND NOT
VP989
VP152
VP189G 689REL
AND OR
VP289G 689ITL
NOT
VP389G
152_OP
189G_OP
289G_OP
389G_OP
689_EX1
VP289G
VP389G
AND
289G_CL
389G_CL
689_EX2
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Technical manual
Control
VP152
VP289G 189ITL
NOT
VP1189G
152_OP
189G_OP
289G_OP
1189G_OP
EXDU_89G
189_EX1
VP189G
VP1189G AND
189G_CL
1189G_CL
EXDU_89G
189_EX2
VP189 189GREL
VP689 AND 189GITL
NOT
189_OP 289GREL
689_OP 289GITL
VP689 NOT
VP989 AND 389GREL
VPC6189 389GITL
NOT
689_OP
989_OP
C6189_OP
VP152 989REL
VP689 AND OR 989ITL
NOT
VP989G
VP189G
VP289G
VP389G
VPC152
VPC6189
VPC189G
VPC289G
989_EX1
689_OP
989_EX2 OR
152_OP
189G_OP AND
289G_OP
989_EX3
en04000555_ansi.vsd
C6189_OP
989_EX4
OR AND OR
C152_OP
C189G_OP AND
C289G_OP
989_EX5
989G_OP
389G_OP
989_EX6
VP989G
VP389G AND
989G_CL
389G_CL
989_EX7
VP989 989GREL
VPVOLT AND 989GITL
NOT
989_OP
VOLT_OFF
189_OP 189OPTR
189_CL 189CLTR
VP189 VP189TR
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BH_LINE_B
152_OP
152_CL XOR VP152
289_OP
289_CL XOR VP289
689_OP
689_CL XOR VP689
989G_OP
989G_CL XOR VP989G
989_OP
989_CL XOR VP989
189G_OP
189G_CL XOR VP189G
289G_OP
289G_CL XOR VP289G
389G_OP
389G_CL XOR VP389G
C152_OP
C152_CL XOR VPC152
C189G_OP
C289G_OP
C6289_OP
C6289_CL XOR VPC6289
2189G_OP
VOLT_OFF
VOLT_ON XOR VPVOLT
VP289 152CLREL
VP689 AND 152CLITL
NOT
VP989
VP152
VP289G 689ITL
VP389G NOT
152_OP
189G_OP
289G_OP
389G_OP
689_EX1
VP289G
VP389G AND
289G_CL
389G_CL
689_EX2
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Technical manual
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VP152
VP189G 289REL
VP289G AND OR
NOT 289ITL
VP2189G
152_OP
189G_OP
289G_OP
2189G_OP
EXDU_89G
289_EX1
VP189G
VP2189G AND
189G_CL
2189G_CL
EXDU_89G
289_EX2
VP289 189GREL
VP689 189GITL
AND NOT
289_OP 289GREL
689_OP 289GITL
VP689 NOT
VP989 389GREL
VPC6289 AND
NOT 389GITL
689_OP
989_OP
C6289_OP
VP152 989REL
VP689
AND OR 989ITL
VP989G NOT
VP189G
VP289G
VP389G
VPC152
VPC6289
VPC189G
VPC289G
989_EX1
689_OP
989_EX2
OR
152_OP
189G_OP
AND
289G_OP
989_EX3
en04000558_ansi.vsd
C6289_OP
989_EX4
OR AND OR
C152_OP
C189G_OP
AND
C289G_OP
989_EX5
989G_OP
389G_OP
989_EX6
VP989G
VP389G AND
989G_CL
389G_CL
989_EX7
VP989 989GREL
VPVOLT AND NOT 989GITL
989_OP
VOLT_OFF
289_OP 289OPTR
289_CL 289CLTR
VP289 VP289TR
en04000559_ansi.vsd
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Technical manual
Control
14.3.8.5 Signals
Table 467: BH_LINE_A (3) Input signals

C152_OP BOOLEAN 0 152 in module BH_CONN is in open position
C152_CL BOOLEAN 0 152 in module BH_CONN is in closed position
C189G_OP BOOLEAN 0 189G in module BH_CONN is in open position
C189G_CL BOOLEAN 0 189G in module BH_CONN is in closed position
VOLT_OFF BOOLEAN 0 There is no voltage on line and not VT (fuse) failure
VOLT_ON BOOLEAN 0 There is voltage on the line or there is a VT (fuse) failure
EXDU_89G BOOLEAN 0 No transm error from bay containing grounding switch 1189G
689_EX1 BOOLEAN 0 External condition for disconnector 689
768
Technical manual
Control

Table 468: BH_LINE_A (3) Output signals

Table 469: BH_LINE_B (3) Input signals

769
Technical manual
Control

VOLT_OFF BOOLEAN 0 There is no voltage on line and not VT (fuse) failure
770
Technical manual
Control
Table 470: BH_LINE_B (3) Output signals

Table 471: BH_CONN (3) Input signals

1389G_OP BOOLEAN 0 1389G on line 1 is in open position
1389G_CL BOOLEAN 0 1389G on line 1 is in closed position
2389G_OP BOOLEAN 0 2389G on line 2 is in open position
2389G_CL BOOLEAN 0 2389G on line 2 is in closed position
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Technical manual
Control

Table 472: BH_CONN (3) Output signals

14.3.9 Interlocking for double CB bay DB (3) IP14167-1 v2
GUID-D6D10255-2818-44E4-A44E-DF623161C486 v3

Interlocking for double CB bay DB_BUS_A - 3
Interlocking for double CB bay DB_BUS_B - 3
Interlocking for double CB bay DB_LINE - 3
The interlocking for a double busbar double circuit breaker bay including DB_BUS_A (3), DB_BUS_B
(3) and DB_LINE (3) functions are used for a line connected to a double busbar arrangement
according to figure 426.
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Technical manual
Control
WA1 (A)
WA2 (B)
189 289
189G 489G
DB_BUS_A 152 252 DB_BUS_B
289G 589G
6189 6289
389G
DB_LINE
989
989G
en04000518_ansi.vsd
Figure 426: Switchyard layout double circuit breaker

Three types of interlocking modules per double circuit breaker bay are defined. DB_BUS_A (3)
handles the circuit breaker QA1 that is connected to busbar WA1 and the disconnectors and
grounding switches of this section. DB_BUS_B (3) handles the circuit breaker QA2 that is
connected to busbar WA2 and the disconnectors and grounding switches of this section.
773
Technical manual
Control
M15105-1 v4
DB_BUS_A
152_OP
152_CL XOR VP152
6189_OP
6189_CL XOR VP6189
189_OP
189_CL XOR VP189
189G_OP
189G_CL XOR VP189G
289G_OP
289G_CL XOR VP289G
389G_OP
389G_CL XOR VP389G
1189G_OP
VP6189 152CLREL
VP189 AND 152CLITL
NOT
VP152
VP289G 6189ITL
NOT
VP389G
152_OP
189G_OP
289G_OP
389G_OP
6189_EX1
VP289G
VP389G AND
289G_CL
389G_CL
6189_EX2
VP152
VP289G 189ITL
NOT
VP1189G
152_OP
189G_OP
289G_OP
1189G_OP
EXDU_89G
189_EX1
VP189G
VP1189G AND
189G_CL
1189G_CL
EXDU_89G
189_EX2
en04000547_ansi.vsd
VP6189 189GREL
6189_OP 289GREL
189_OP NOT
289GITL
189_OP 189OPTR
189_CL 189CLTR
VP189 VP189TR
en04000548_ansi.vsd
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Technical manual
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DB_BUS_B
252_OP
252_CL XOR VP252
6289_OP
6289_CL XOR VP6289
289_OP
289_CL XOR VP289
489G_OP
489G_CL XOR VP489G
589G_OP
589G_CL XOR VP589G
389G_OP
389G_CL XOR VP389G
2189G_OP
VP6289 252CLREL
VP289 AND 252CLITL
NOT
VP252
VP589G 6289ITL
NOT
VP389G
252_OP
489G_OP
589G_OP
389G_OP
6289_EX1
VP589G
VP389G AND
589G_CL
389G_CL
6289_EX2
VP252
VP589G 289ITL
NOT
VP2189G
252_OP
489G_OP
589G_OP
2189G_OP
EXDU_89G
289_EX1
VP489G
VP2189G AND
489G_CL
2189G_CL
EXDU_89G
289_EX2
en04000552_ansi.vsd
VP6289 489GREL
6289_OP 589GREL
289_OP 589GITL
NOT
289_OP 289OPTR
289_CL 289CLTR
VP289 VP289TR
en04000553_ansi.vsd
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Technical manual
Control
DB_LINE
152_OP
152_CL XOR VP152
252_OP
252_CL XOR VP252
6189_OP
6189_CL XOR VP6189
189G_OP
189G_CL XOR VP189G
289G_OP
289G_CL XOR VP289G
6289_OP
6289_CL XOR VP6289
489G_OP
489G_CL XOR VP489G
589G_OP
589G_CL XOR VP589G
989_OP
989_CL XOR VP989
389G_OP
389G_CL XOR VP389G
989G_OP
989G_CL XOR VP989G
VOLT_OFF
VOLT_ON XOR VPVOLT
VP152
VP252 AND OR 989REL
VP189G 989ITL
NOT
VP289G
VP389G
VP489G
VP589G
VP989G
152_OP
252_OP
189G_OP
289G_OP
389G_OP
489G_OP
589G_OP
989G_OP
989_EX1
AND
en04000549_ansi.vsd
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Technical manual
Control
VP152
VP189G AND OR
VP289G
VP389G
VP989G
VP6289
152_OP
189G_OP
289G_OP
389G_OP
989G_OP
6289_OP
989_EX2
VP252
VP6189 AND
VP389G
VP489G
VP589G
VP989G
252_OP
6189_OP
389G_OP
489G_OP
589G_OP
989G_OP
989_EX3
VP389G
VP989G AND
VP6189
VP6289
389G_OP
989G_OP
6189_OP
6289_OP
989_EX4
VP389G
VP989G AND
389G_CL
989G_CL
989_EX5
en04000550_ansi.vsd
VP6189
VP6289 AND 389GREL
VP989 389GITL
NOT
6189_OP
6289_OP
989_OP
VP989
VPVOLT AND 989GREL
989_OP 989GITL
NOT
VOLT_OFF
en04000551_ansi.vsd
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Technical manual
Control
14.3.9.4 Function block IP14391-1 v1
M13591-3 v6
DB_BUS_A (3)
152_OP 152CLREL
152_CL 152CLITL
189_OP 6189REL
189_CL 6189ITL
6189_OP 189REL
6189_CL 189ITL
189G_OP 189GREL
189G_CL 189GITL
289G_OP 289GREL
289G_CL 289GITL
389G_OP 189OPTR
389G_CL 189CLTR
1189G_OP VP189TR
1189G_CL
EXDU_89G
6189_EX1
6189_EX2
189_EX1
189_EX2
Figure 427: DB_BUS_A (3) function block

M15107-3 v6
DB_LINE (3)
152_OP 989REL
152_CL 989ITL
252_OP 389GREL
252_CL 389GITL
6189_OP 989GREL
6189_CL 989GITL
189G_OP
189G_CL
289G_OP
289G_CL
6289_OP
6289_CL
489G_OP
489G_CL
589G_OP
589G_CL
989_OP
989_CL
389G_OP
389G_CL
989G_OP
989G_CL
VOLT_OFF
VOLT_ON
989_EX1
989_EX2
989_EX3
989_EX4
989_EX5
Figure 428: DB_LINE (3) function block
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Technical manual
Control
M13596-3 v6
DB_BUS_B (3)
252_OP 252CLREL
252_CL 252CLITL
289_OP 6289REL
289_CL 6289ITL
6289_OP 289REL
6289_CL 289ITL
489G_OP 489GREL
489G_CL 489GITL
589G_OP 589GREL
589G_CL 589GITL
389G_OP 289OPTR
389G_CL 289CLTR
2189G_OP VP289TR
2189G_CL
EXDU_89G
6289_EX1
6289_EX2
289_EX1
289_EX2
Figure 429: DB_BUS_B (3) function block
14.3.9.5 Signals
Table 473: DB_BUS_A (3) Input signals

779
Technical manual
Control
Table 474: DB_BUS_A (3) Output signals

Table 475: DB_BUS_B (3) Input signals

780
Technical manual
Control
Table 476: DB_BUS_B (3) Output signals

Table 477: DB_LINE (3) Input signals

781
Technical manual
Control

VOLT_OFF BOOLEAN 0 There is no voltage on the line and not VT (fuse) failure
Table 478: DB_LINE (3) Output signals

14.3.10 Interlocking for line bay ABC_LINE (3) IP14139-1 v2
GUID-BEA26EA4-F402-4385-9238-1361E862D987 v3

Interlocking for line bay ABC_LINE - 3
The interlocking for line bay (ABC_LINE, 3) function is used for a line connected to a double busbar
arrangement with a transfer busbar according to figure 430. The function can also be used for a
double busbar arrangement without transfer busbar or a single busbar arrangement with/without
transfer busbar.
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Technical manual
Control
WA1 (A)
WA2 (B)
WA7 (C)
189 289 789

189G
152
289G
989
989G
en04000478_ansi.vsd
Figure 430: Switchyard layout ABC_LINE (3)
783
Technical manual
Control
ABC_LINE (3)
152_OP 152CLREL
152_CL 152CLITL
989_OP 989REL
989_CL 989ITL
189_OP 189REL
189_CL 189ITL
289_OP 289REL
289_CL 289ITL
789_OP 789REL
789_CL 789ITL
189G_OP 189GREL
189G_CL 189GITL
289G_OP 289GREL
289G_CL 289GITL
989G_OP 989GREL
989G_CL 989GITL
1189G_OP 189OPTR
1189G_CL 189CLTR
2189G_OP 289OPTR
2189G_CL 289CLTR
7189G_OP 789OPTR
7189G_CL 789CLTR
BB7_D_OP 1289OPTR
BC_12_CL 1289CLTR
BC_17_OP VP189TR
BC_17_CL VP289TR
BC_27_OP VP789TR
BC_27_CL VP1289TR
VOLT_OFF
VOLT_ON
VP_BB7_D
VP_BC_12
VP_BC_17
VP_BC_27
EXDU_89G
EXDU_BPB
EXDU_BC
989_EX1
989_EX2
189_EX1
189_EX2
189_EX3
289_EX1
289_EX2
289_EX3
789_EX1
789_EX2
789_EX3
789_EX4
Figure 431: ABC_LINE (3) function block
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ABC_LINE
152_OP
152_CL XOR VP152
989_OP
989_CL XOR VP989
189_OP 152CLREL
189_CL XOR VP189 AND NOT
152CLITL
289_OP
289_CL XOR VP289
789_OP
789_CL XOR VP789
189G_OP
189G_CL XOR VP189G
289G_OP
289G_CL XOR VP289G
989G_OP
989G_CL XOR VP989G
1189G_OP
2189G_OP
7189G_OP
VOLT_OFF
VOLT_ON XOR VPVOLT
VP152
VP289G 989ITL
NOT
VP989G
152_OP
189G_OP
289G_OP
989G_OP
989_EX1
VP289G
VP989G AND
289G_CL
989G_CL
989_EX2
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VP152 189REL
AND OR
VP289
VP189G 189ITL
NOT
VP289G
VP1189G
152_OP
289_OP
189G_OP
289G_OP
1189G_OP
EXDU_89G
189_EX1
VP289 AND
VP_BC_12
289_CL
BC_12_CL
EXDU_BC
189_EX2
VP189G
AND
VP1189G
189G_CL
1189G_CL
EXDU_89G
189EX3
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VP152 289REL
AND OR
VP189
VP189G 289ITL
NOT
VP289G
VP2189G
152_OP
189_OP
189G_OP
289G_OP
2189G_OP
EXDU_89G
289_EX1
VP189 AND
VP_BC_12
QB1_CL
BC_12_CL
EXDU_BC
289_EX2
VP189G
AND
VP2189G
189G_CL
2189G_CL
EXDU_89G
289_EX3
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VP989G 789REL
AND OR
VP7189G
VP_BB7_D 789ITL
NOT
VP_BC_17
VP_BC_27
989G_OP
7189G_OP
EXDU_89G
BB7_D_OP
EXDU_BPB
BC_17_OP
BC_27_OP
EXDU_BC
789_EX1
VP152
VP189 AND
VP989G
VP989
VP7189G
VP_BB7_D
VP_BC_17
152_CL
189_CL
989G_OP
989_CL
7189G_OP
EXDU_89G
BB7_D_OP
EXDU_BPB
BC_17_CL
EXDU_BC
789_EX2
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VP152
VP289
AND OR
VP989G
VP989
VP7189G
VP_BB7_D
VP_BC_27
152_CL
289_CL
989G_OP
989_CL
7189G_OP
EXDU_89G
BB7_D_OP
EXDU_BPB
BC_27_CL
EXDU_BC
789_EX3
VP989G
VP7189G AND
989G_CL
7189G_CL
EXDU_89G
789_EX4
VP189 189GREL
VP289 189GITL
AND NOT
VP989
289GREL
189_OP
289_OP 289GITL
NOT
989_OP
VP789
VP989 989GREL
AND
VPVOLT 989GITL
789_OP NOT
989_OP
VOLT_OFF
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189_OP 189OPTR
189_CL 189CLTR
VP189 VP189TR
289_OP 289OPTR
289_CL 289CLTR
VP289 VP289TR
789_OP 789OPTR
789_CL 789CLTR
VP789 VP789TR
189_OP 1289OPTR
289_OP OR 1289CLTR
VP189 NOT
VP1289TR
VP289 AND
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14.3.10.5 Signals
Table 479: ABC_LINE (3) Input signals

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BB7_D_OP BOOLEAN 0 Disconnectors on busbar bus7 except in the own bay are open
BC_17_OP BOOLEAN 0 No bus coupler connection exists between busbar 1 and Bus 7
BC_27_OP BOOLEAN 0 No bus coupler connection exists between busbar 2 and Bus 7
VOLT_OFF BOOLEAN 0 There is no voltage on the line and not VT (fuse) failure
VP_BB7_D BOOLEAN 0 Switch status of the disconnectors on busbar WA7 are valid
valid
VP_BC_17 BOOLEAN 0 Status of the bus coupler app. between WA1 and WA7 are valid
VP_BC_27 BOOLEAN 0 Status of the bus coupler app. between WA2 and WA7 are valid
EXDU_BPB BOOLEAN 0 No transm error from any bay with disconnectors on WA7
EXDU_BC BOOLEAN 0 No transmission error from any bus coupler bay
Table 480: ABC_LINE (3) Output signals

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14.3.11 Interlocking for transformer bay AB_TRAFO (3) IP14149-1 v2
GUID-AD839CAA-531B-43BC-B508-39AED3D0A97D v3

Interlocking for transformer bay AB_TRAFO - 3
The interlocking for transformer bay (AB_TRAFO, 3) function is used for a transformer bay
connected to a double busbar arrangement according to figure 432. The function is used when
there is no disconnector between circuit breaker and transformer. Otherwise, the interlocking for
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line bay (ABC_LINE, 3) function can be used. This function can also be used in single busbar
arrangements.
WA1 (A)
WA2 (B)
189 289
189G
152 AB_TRAFO
289G
389G
252 252 and 489G are not

used in this interlocking
489G
389 489
en04000515_ansi.vsd
Figure 432: Switchyard layout AB_TRAFO (3)
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AB_TRAFO (3)
152_OP 152CLREL
152_CL 152CLITL
189_OP 189REL
189_CL 189ITL
289_OP 289REL
289_CL 289ITL
189G_OP 189GREL
189G_CL 189GITL
289G_OP 289GREL
289G_CL 289GITL
389_OP 189OPTR
389_CL 189CLTR
489_OP 289OPTR
489_CL 289CLTR
389G_OP 1289OPTR
389G_CL 1289CLTR
1189G_OP VP189TR
1189G_CL VP289TR
2189G_OP VP1289TR
2189G_CL
BC_12_CL
VP_BC_12
EXDU_89G
EXDU_BC
152_EX1
152_EX2
152_EX3
189_EX1
189_EX2
189_EX3
289_EX1
289_EX2
289_EX3
Figure 433: AB_TRAFO (3) function block
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AB_TRAFO
152_OP
152_CL XOR VP152
189_OP
189_CL XOR VP189
289_OP
289_CL XOR VP289
189G_OP
189G_CL XOR VP189G
289G_OP
289G_CL XOR VP289G
389_OP
389_CL XOR VP389
489_OP
489_CL XOR VP489
389G_OP
389G_CL XOR VP389G
1189G_OP
2189G_OP
VP189 152CLREL
VP289 AND 152CLITL
VP189G NOT
VP289G
VP389
VP489
VP389G
152_EX2
389G_OP
152_EX3 OR
189G_CL
289G_CL AND
389G_CL
152_EX1
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VP152
VP289 AND OR 189REL
VP189G
189ITL
VP289G NOT
VP389G
VP1189G
152_OP
289_OP
189G_OP
289G_OP
389G_OP
1189G_OP
EXDU_89G
189_EX1
VP289
VP389G AND
VP_BC_12
289_CL
389G_OP
BC_12_CL
EXDU_BC
189_EX2
VP189G
VP289G AND
VP389G
VP1189G
189G_CL
289G_CL
389G_CL
1189G_CL
EXDU_89G
189_EX3
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VP152
VP189 252REL
AND OR
VP189G 252ITL
VP289G NOT
VP389G
VP2189G
152_OP
189_OP
189G_OP
289G_OP
389G_OP
2189G_OP
EXDU_89G
289_EX1
VP189
VP389G
AND
VP_BC_12
189_CL
389G_OP
BC_12_CL
EXDU_BC
289_EX2
VP189G
VP289G
AND
VP389G
VP2189G
189G_CL
289G_CL
389G_CL
2189G_CL
EXDU_89G
289_EX3
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VP189 189GREL
VP289 AND 189GITL
NOT
VP389 289GREL
VP489
189_OP 289GITL
NOT
289_OP
389_OP
489_OP
189_OP 189OPTR
189_CL 189CLTR
VP189 VP189TR
289_OP 289OPTR
289_CL 289CLTR
VP289 VP289TR
189_OP 1289OPTR
289_OP OR 1289CLTR
NOT
VP189 VP1289TR
VP289 AND
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14.3.11.5 Signals
Table 481: AB_TRAFO (3) Input signals

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1189G_OP BOOLEAN 0 1189G on busbar WA1 is in open position
1189G_CL BOOLEAN 0 1189G on busbar WA1 is in closed position
2189G_OP BOOLEAN 0 2189G on busbar WA2 is in open position
2189G_CL BOOLEAN 0 2189G on busbar WA2 is in closed position
valid
EXDU_BC BOOLEAN 0 No transmission error from any bus coupler bay
152_EX1 BOOLEAN 0 External condition for breaker 152
Table 482: AB_TRAFO (3) Output signals

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14.3.12 Position evaluation POS_EVAL GUID-F20A8939-E91E-44F6-920C-083E5D3FCDFD v2
GUID-3C4B9379-C861-406C-9295-0309014D548E v2

Position evaluation POS_EVAL - -
14.3.12.2 Functionality GUID-C3D07B40-FF01-45C5-A083-EED5643A5FCC v4
Position evaluation (POS_EVAL) function converts the input position data signal POSITION,
consisting of value, time and signal status, to binary signals OPENPOS or CLOSEPOS.
The output signals are used by other functions in the interlocking scheme.
14.3.12.3 Function block GUID-B5EF4A28-9C9F-4558-8CD6-453FB480314B v2
POS_EVAL
POSITION OPENPOS
CLOSEPOS
Figure 434: POS_EVAL function block
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14.3.12.4 Logic diagram GUID-F0EF8D38-031B-4A8E-BD7D-60314F5DCD59 v2
POS_EVAL
Position including quality POSITION OPENPOS
Open/close position of
CLOSEPOS switch device
IEC08000469-1-EN V1 EN-US
Only the value, open/close, and status is used in this function. Time information is not used.
Input position (Value) Signal quality Output OPENPOS Output CLOSEPOS

0 (Breaker intermediate) Good 0 0
1 (Breaker open) Good 1 0
2 (Breaker closed) Good 0 1
3 (Breaker faulty) Good 0 0
Any Invalid 0 0
Any Oscillatory 0 0
14.3.12.5 Signals
Table 483: POS_EVAL Input signals

POSITION INTEGER 0 Position status including quality
Table 484: POS_EVAL Output signals

OPENPOS BOOLEAN Open position
CLOSEPOS BOOLEAN Close position
14.4 Apparatus control APC IP14560-1 v2
The apparatus control functions are used for control and supervision of circuit breakers,
disconnectors and grounding switches within a bay. Permission to trip is given after evaluation of
conditions from other functions such as interlocking, synchronism check, operator place selection
and external or internal blockings.
Apparatus control features:
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• Select-Execute principle to give high reliability

• Selection function to prevent simultaneous operation
• Selection and supervision of operator place
• Command supervision
• Block/deblock of operation
• Block/deblock of updating of position indications
• Substitution of position and quality indications
• Overriding of interlocking functions
• Overriding of synchrocheck
• Operation counter
• Suppression of mid position
Two types of command models can be used:
• Direct with normal security

• SBO (Select-Before-Operate) with enhanced security
Normal security means that only the command is evaluated and the resulting position is not
supervised. Enhanced security means that the command is evaluated with an additional
supervision of the status value of the control object. The command sequence with enhanced
security is always terminated by a CommandTermination service primitive and an AddCause
telling if the command was successful or if something went wrong.
Control operation can be performed from the local HMI with authority control if so defined.
A bay can handle, for example a power line, a transformer, a reactor, or a capacitor bank. The
different primary apparatuses within the bay can be controlled via the apparatus control functions
directly by the operator or indirectly by automatic sequences.
Because a primary apparatus can be allocated to many functions within a Substation Automation
system, the object-oriented approach with a function block that handles the interaction and
status of each process object ensures consistency in the process information used by higher-level
control functions.
Primary apparatuses such as breakers and disconnectors are controlled and supervised by one
function block (SCSWI) each. Because the number and type of signals used for the control of a
breaker respectively a disconnector are almost the same, the same function block type is used to
handle these two types of apparatuses.
The SCSWI function block is connected either to an SXCBR function block (for circuit breakers) or
to an SXSWI function block (for disconnectors and grounding switches). The physical process in
the switchyard is connected to these two function blocks via binary inputs and outputs.
Four types of function blocks are available to cover most of the control and supervision within the
bay. These function blocks are interconnected to form a control function reflecting the switchyard
configuration. The total number used depends on the switchyard configuration. These four types
are:
• Bay control QCBAY

• Switch controller SCSWI
• Circuit breaker SXCBR
• Circuit switch SXSWI
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The functions Local Remote (LOCREM) and Local Remote Control (LOCREMCTRL), to handle the
local/remote switch, and the functions Bay reserve (QCRSV) and Reservation input (RESIN), for the
reservation function, also belong to the apparatus control function. The principles of operation,
function blocks, input and output signals and setting parameters for all these functions are
described below.
14.4.3 Error handling GUID-6C31D291-74E8-46A3-8FC2-D3959C2458A5 v7
Depending on the error that occurs during the command sequence the error signal will be set with
a value. Table 485 describes the cause values given on local HMI. The translation to AddCause
values specified in IEC 61850-8-1 is shown in Table 486. For IEC 61850-8-1 edition 2 only addcauses
defined in the standard are used, for edition 1 also a number of vendor specific causes are used.
The values are available in the command response to commands from IE C61850-8-1 clients. An
output L_CAUSE on the function block for Switch controller (SCSWI), Circuit breaker (SXCBR) and
Circuit switch (SXSWI) indicates the value of the cause during the latest command if the function
specific command evaluation has been started. The causes that are not always reflected on the
output L_CAUSE, with description of the typical reason are listed in table 487.
Table 485: Values for "cause" signal

Cause Name Description Supported
number
0 None Control action successfully executed X
1 Not-supported Given for Cancel request with Direct Control in Ready state X
2 Blocked-by-switching- Not successful since one of the downstream Loc switches like X
hierarchy in CSWI has the value TRUE
3 Select-failed Cancelled due to an unsuccessful selection (select service) X
4 Invalid-position Control action is aborted due to invalid switch position (Pos in X
XCBR or XSWI)
5 Position-reached Switch is already in the intended position (Pos in XCBR or X
XSWI)
6 Parameter-change-in- Control action is blocked due to running parameter change X
execution
7 Step-limit Control action is blocked, because tap changer has reached X
the limit (EndPosR or EndPosL in YLTC)
8 Blocked-by-Mode Control action is blocked, because the LN (CSWI or XCBR/ X
XSWI) is in a mode (Mod) which doesn’t allow any switching
9 Blocked-by-process Control action is blocked due to some external event at X
process level that prevents a successful operation, for
example blocking indication (EEHealth in XCBR or XSWI)
10 Blocked-by- Control action is blocked due to interlocking of switching X
interlocking devices (in CILO attribute EnaOpn.stVal=”FALSE” or
EnaCls.stVal=”FALSE”
11 Blocked-by- Control action with synchrocheck is aborted due to exceed of X
synchrocheck time limit and missing synchronism condition
12 Command-already-in- Control, select or cancel service is rejected, because control X
execution action is already running
13 Blocked-by-health Control action is blocked due to some internal event that X
prevents a successful operation (Health)
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Cause Name Description Supported

number
14 1-of-n-control Control action is blocked because another control action in a X
domain (for example, substation) is already running (in any
XCBR or XSWI of that domain, the DPC.stSeld=”TRUE”)
15 Abortion-by-cancel Control action is aborted due to cancel service X
16 Time-limit-over Control action is terminated due to exceed of some time limit X
17 Abortion-by-trip Control action is aborted due to a trip (PTRC with X
ACT.general=”TRUE”)
18 Object-not-selected Control action is rejected, because control object was not X
selected
19 Object-already- Select action is not executed because the addressed object is X
selected already selected
20 No-access-authority Control action is blocked due to lack of access authority X
21 Ended-with-overshoot Control action executed but the end position has overshoot
22 Abortion-due-to- Control action is aborted due to deviation between the
deviation command value and the measured value
23 Abortion-by- Control action is aborted due to the loss of connection with
communication-loss the client that issued the control
24 Blocked-by-command Control action is blocked due to the data attribute X
CmdBlk.stVal is TRUE
26 Inconsistent- The parameters between successive control services are not X
parameters consistent, for example the ctlNum of Select and Operate
service are different
27 Locked-by-other-client Another client has already reserved the object X
-22 Wrong-Ctl-model Command from client uses wrong control model X
-23 Blocked-by-command Blocked by command X
-24 Blocked-for-open-cmd Blocked for Open command X
-25 Blocked-for-close-cmd Blocked for Close Command X
-30 Long-operation-time Operation time too long X
-31 Switch-not-start- Switch did not start moving X
moving
-32 Persistent- Switch stopped in intermediate state X
intermediate-state
-33 Switch-returned-to- Switch returned to the initial position X
init-pos
-34 Switch-in-bad-state Switch is in a bad position state X
-35 Not-expected-final- Switch did not reach the expected final position X
position
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Table 486: Translation of cause values for IEC 61850 edition 2 and edition 1
Internal Cause AddCause in IEC 61850-8-1 Name
Number
Ed 2 Ed 1
0 25 0 None
1 1 1 Not-supported
2 2 2 Blocked-by-switching-hierarchy
3 3 3 Select-failed
4 4 4 Invalid-position
5 5 5 Position-reached
6 6 6 Parameter-change-in-execution
7 7 7 Step-limit
8 8 8 Blocked-by-Mode
9 9 9 Blocked-by-process
10 10 10 Blocked-by-interlocking
11 11 11 Blocked-by-synchrocheck
12 12 12 Command-already-in-execution
13 13 13 Blocked-by-health
14 14 14 1-of-n-control
15 15 1 Abortion-by-cancel
16 16 16 Time-limit-over
17 17 17 Abortion-by-trip
18 18 18 Object-not-selected
19 19 3 Object-already-selected
20 20 3 No-access-authority
24 24 -23 Blocked-by-command
26 26 6 Inconsistent-parameters
27 27 12 Locked-by-other-client
-22 0 -22 Wrong-Ctl-model
-23 24 -23 Blocked-by-command
-24 9 -24 Blocked-for-open-cmd
-25 9 -25 Blocked-for-close-cmd
-30 16 -30 Long-operation-time
-31 16 -31 Switch-not-start-moving
-32 4 -32 Persistent-intermediate-state
-33 22 -33 Switch-returned-to-init-pos
-34 4 -34 Switch-in-bad-state
-35 22 -35 Not-expected-final-position
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Table 487: Cause values not reflected on the output L_CAUSE

Cause number Cause description Conditions
3 Select-failed Canceled due to an unsuccessful selection
(select service)
8 Blocked-by-Mode Control action is blocked because the LN (CSWI)
is in a mode (Mod) which doesn’t allow any
switching or does not match the mode of the
command.
12 Command-already-in-execution Control, select or cancel service is rejected
because control action is already running.
13 Blocked-by-health Control action is blocked due to some internal
event that prevents a successful operation
(Health).
16 Time-limit-over Control action is terminated due to exceed of
some time limit.
18 Object-not-selected Control action is rejected because control object
was not selected.
19 Object-already-selected Select action is not executed because the
addressed object is already selected.
20 No-access-authority Control action is blocked due to lack of access
authority.
26 Inconsistent-parameters The parameters between successive control
services are not consistent, for example the
ctlNum of Select and Operate service are
different.
27 Locked-by-other-client Another client has already reserved the object.
14.4.4 Bay control QCBAY IP15597-1 v2
The Bay control QCBAY function is used together with Local remote and local remote control
functions to handle the selection of the operator place per bay. QCBAY also provides blocking
functions that can be distributed to different apparatuses within the bay.
QCBAY
LR_OFF PSTO
LR_LOC UPD_BLKD
LR_REM CMD_BLKD
LR_VALID LOC
BL_UPD STA
BL_CMD REM
Figure 435: QCBAY function block
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14.4.4.3 Signals
Table 488: QCBAY Input signals

LR_OFF BOOLEAN 0 External Local/Remote switch is in Off position
LR_LOC BOOLEAN 0 External Local/Remote switch is in Local position
LR_REM BOOLEAN 0 External Local/Remote switch is in Remote position
LR_VALID BOOLEAN 0 Data representing the L/R switch position is valid
BL_UPD BOOLEAN 0 Steady signal to block the position updates
BL_CMD BOOLEAN 0 Steady signal to block the command
Table 489: QCBAY Output signals

PSTO INTEGER Value for the operator place allocation
UPD_BLKD BOOLEAN Update of position is blocked
CMD_BLKD BOOLEAN Function is blocked for commands
LOC BOOLEAN Local operation allowed
STA BOOLEAN Station operation allowed
REM BOOLEAN Remote operation allowed
14.4.4.4 Settings
Table 490: QCBAY Non group settings (basic)

AllPSTOValid Priority - - Priority Override Priority of originators, commands
No priority from both local, station and remote are
allowed
RemoteIncStation No - - No Both Station and Remote control are
Yes allowed but not Local when local remote
switch is in remote
14.4.4.5 Operation principle

M13446-4 v6
The function sends information about the Permitted Source To Operate (PSTO) and blocking
conditions to other functions within the bay for example, switch control functions and voltage
control functions. The functionality of the Bay control (QCBAY) function is mainly described by the
LLN0 node in the IEC61850-8-1 edition 2 standard, applied to one bay. In IEC61850 edition 1 the
functionality is not described by the LLN0 node or any other node, therefore the Bay control
function is represented as a vendor specific node in edition 1.
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Local panel switch M13446-7 v7

The local panel switch is a switch that defines the operator place selection. The switch connected
to this function can have three positions (remote/local/off). The positions are here defined so
that remote means that operation is allowed from station and/or remote level and local means
that operation is allowed from the IED level. The local/remote switch is also on the control/
protection IED itself, which means that the position of the switch and its validity information are
connected internally, not via I/O boards. When the switch is mounted separately from the IED the
signals are connected to the function via I/O boards.
When the local panel switch (or LHMI selection, depending on the set source to select this) is in Off
position, all commands from remote and local level will be ignored. If the position for the local/
remote switch is not valid the PSTO output will always be set to faulty state (3), which means no
possibility to operate.
To adapt the signals from the local HMI or from an external local/remote switch, the function
blocks LOCREM and LOCREMCTRL are needed and connected to QCBAY.
Permitted Source To Operate (PSTO) M13446-16 v8

The actual state of the operator place is presented by the value of the Permitted Source To
Operate, PSTO signal. The PSTO value is evaluated from the local/remote switch position
according to Table 491. In addition, there are two parameters that affect the value of the PSTO
signal.
If the parameter AllPSTOValid is set and LR-switch position is in Local or Remote state, the PSTO
value is set to 5 (all), that is, it is permitted to operate from both local and remote level without
any priority. When the external panel switch is in Off position the PSTO value shows the actual
state of the switch that is, 0. In this case it is not possible to control anything
If the parameter RemoteIncStation is set and the LR-switch position is in Remote state, the PSTO
value is set to 2 (Station or Remote), that is, it is permitted to operate from both station and
remote level without any priority.
Table 491: PSTO values for different Local panel switch positions
Local panel PSTO AllPSTOValid RemoteInc LocSta.CtlV Possible
switch value (setting Station al locations that
positions parameter) (setting (command) shall be able
parameter) to operate
0 = Off 0 - - - Not possible
to operate
1 = Local 1 Priority - - Local Panel
1 = Local 5 No priority - - Local or
Remote level
without any
priority
2 = Remote 6 Priority No TRUE Station level
2 = Remote 7 Priority No FALSE Remote level
2 = Remote 2 Priority Yes - Station or
Remote level
2 = Remote 5 No priority - - Local,
Station or
Remote level
without any
priority
3 = Faulty 3 - - - Not possible
to operate
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Blockings M13446-50 v4
The blocking states for position indications and commands are intended to provide the possibility
for the user to make common blockings for the functions configured within a complete bay.
The blocking facilities provided by the bay control function are the following:
• Blocking of position indications, BL_UPD. This input will block all inputs related to apparatus
positions for all configured functions within the bay.
• Blocking of commands, BL_CMD. This input will block all commands for all configured
functions within the bay.
• Blocking of function, BLOCK. If the BLOCK signal is set, it means that the function is active,
but no outputs are generated, no reporting, control commands are rejected and functional
and configuration data is visible.
The switching of the Local/Remote switch requires at least system operator level. The password
will be requested at an attempt to operate if authority levels have been defined in the IED.
Otherwise the default authority level, SuperUser, can handle the control without LogOn. The users
and passwords are defined with the IED Users tool in PCM600.
14.4.5 Local/Remote switch LOCREM, LOCREMCTRL IP16319-1 v2
M17086-3 v8
The signals from the local HMI or from an external local/remote switch are connected via the
function blocks LOCREM and LOCREMCTRL to the Bay control QCBAY function block. The
parameter ControlMode in function block LOCREM is set to choose if the switch signals are
coming from the local HMI or from an external hardware switch connected via binary inputs.
LOCREM
CTRLOFF OFF
LOCCTRL LOCAL
REMCTRL REMOTE
LHMICTRL VALID
Figure 436: LOCREM function block
LOCREMCTRL
PSTO1 HMICTR1
PSTO2 HMICTR2
PSTO3 HMICTR3
PSTO4 HMICTR4
PSTO5 HMICTR5
PSTO6 HMICTR6
PSTO7 HMICTR7
PSTO8 HMICTR8
PSTO9 HMICTR9
PSTO10 HMICTR10
PSTO11 HMICTR11
PSTO12 HMICTR12
Figure 437: LOCREMCTRL function block
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14.4.5.2 Signals
Table 492: LOCREM Input signals

CTRLOFF BOOLEAN 0 Disable control
LOCCTRL BOOLEAN 0 Local in control
REMCTRL BOOLEAN 0 Remote in control
LHMICTRL INTEGER 0 LHMI control
Table 493: LOCREM Output signals

OFF BOOLEAN Control is disabled
LOCAL BOOLEAN Local control is activated
REMOTE BOOLEAN Remote control is activated
VALID BOOLEAN Outputs are valid
Table 494: LOCREMCTRL Input signals

PSTO1 INTEGER 0 PSTO input channel 1
Table 495: LOCREMCTRL Output signals

HMICTR1 INTEGER Bitmask output 1 to local remote LHMI input
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14.4.5.3 Settings
Table 496: LOCREM Non group settings (basic)

ControlMode Internal LR-switch - - Internal LR- Control mode for internal/external LR-
External LR- switch switch
switch
14.4.5.4 Operation principle M17087-3 v7
The function block Local remote (LOCREM) handles the signals coming from the local/remote
switch. The connections are seen in Figure 438, where the inputs on function block LOCREM are
connected to binary inputs if an external switch is used. When the local HMI is used, the inputs are
not used. The switching between external and local HMI source is done through the parameter
ControlMode. The outputs from the LOCREM function block control the output PSTO (Permitted
Source To Operate) on Bay control (QCBAY).
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LOCREM QCBAY
CTRLOFF OFF LR_ OFF PSTO
LOCCTRL LOCAL LR_ LOC UPD_ BLKD
REMCTRL REMOTE LR_ REM CMD_ BLKD
LHMICTRL VALID LR_ VALID LOC
BL_ UPD STA
BL_ CMD REM
LOCREM QCBAY
CTRLOFF OFF LR_ OFF PSTO
LOCCTRL LOCAL LR_ LOC UPD_ BLKD
REMCTRL REMOTE LR_ REM CMD_ BLKD
LHMICTRL VALID LR_ VALID LOC
BL_ UPD STA
BL_ CMD REM
LOCREMCTRL
PSTO1 HMICTR1
PSTO2 HMICTR2
PSTO3 HMICTR3
PSTO4 HMICTR4
PSTO5 HMICTR5
PSTO6 HMICTR6
PSTO7 HMICTR7
PSTO8 HMICTR8
PSTO9 HMICTR9
PSTO 10 HMICTR 10
PSTO 11 HMICTR 11
PSTO 12 HMICTR 12
Figure 438: Configuration for the local/remote handling for a local HMI with two bays and
two screen pages
If the IED contains control functions for several bays, the local/remote position can be different
for the included bays. When the local HMI is used the position of the local/remote switch can be
different depending on which single line diagram screen page that is presented on the local HMI.
The function block Local remote control (LOCREMCTRL) controls the presentation of the LEDs for
the local/remote position to applicable bay and screen page.
The switching of the local/remote switch requires at least system operator level. The password
will be requested at an attempt to operate if authority levels have been defined in the IED.
Otherwise the default authority level, SuperUser, can handle the control without LogOn. The users
and passwords are defined with the IED Users tool in PCM600.
14.4.6 Switch controller SCSWI IP15603-1 v2
The Switch controller (SCSWI) initializes and supervises all functions to properly select and
operate switching primary apparatuses. The Switch controller may handle and operate on one
three-phase device or up to three one-phase devices.
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SCSWI
BLOCK EXE_OP
PSTO EXE_CL
L_SEL SEL_OP
L_OPEN SEL_CL
L_CLOSE SELECTED
AU_OPEN RES_RQ
AU_CLOSE START_SY
BL_CMD CANC_SY
RES_GRT POSITION
RES_EXT OPENP OS
SY_INPRO CLOSEPOS
SYNC_OK POLEDISC
EN_OPEN CMD_BLK
EN_CLOSE L_CAUSE
XPOSL1* POS_INTR
XPOSL2* XEXINF
XPOSL3*
Figure 439: SCSWI function block
14.4.6.3 Signals
Table 497: SCSWI Input signals

PSTO INTEGER 2 Operator place selection
L_SEL BOOLEAN 0 Select signal from local panel
L_OPEN BOOLEAN 0 Open signal from local panel
L_CLOSE BOOLEAN 0 Close signal from local panel
AU_OPEN BOOLEAN 0 Used for local automation function
AU_CLOSE BOOLEAN 0 Used for local automation function
BL_CMD BOOLEAN 0 Steady signal for block of the command
RES_GRT BOOLEAN 0 Positive acknowledge that all reservations are made
RES_EXT BOOLEAN 0 Reservation is made externally
SY_INPRO BOOLEAN 0 Synchronizing function in progress
SYNC_OK BOOLEAN 0 Closing is permitted by the synchronism-check
EN_OPEN BOOLEAN 0 Enables open operation
EN_CLOSE BOOLEAN 0 Enables close operation
XPOSL1 GROUP - Group signal from XCBR/XSWI per phase
SIGNAL
SIGNAL
SIGNAL
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Table 498: SCSWI Output signals

EXE_OP BOOLEAN Execute Open command
EXE_CL BOOLEAN Execute Close command
SEL_OP BOOLEAN Selected for open command
SEL_CL BOOLEAN Selected for close command
SELECTED BOOLEAN Select conditions are fulfilled
RES_RQ BOOLEAN Request signal to the reservation function
START_SY BOOLEAN Starts the external synchronizing function
CANC_SY BOOLEAN Cancels the external synchronizing function, started through
START_SY
POSITION INTEGER Position indication
OPENPOS BOOLEAN Open position indication
CLOSEPOS BOOLEAN Closed position indication
POLEDISC BOOLEAN The positions for poles A, B and C are not equal after a set time
CMD_BLK BOOLEAN Commands are blocked
L_CAUSE INTEGER Latest value of the error indication during command
POS_INTR BOOLEAN Stopped in intermediate position
XOUT BOOLEAN Execution information to XCBR/XSWI
GUID-7DABB496-EABE-48A4-8078-7ED5D6D4FE14 v2
AU_OPEN and AU_CLOSE are used to issue automated commands as e.g. for load
shedding for opening respectively closing to the SCSWI function. They work
without regard to how the operator place selector, PSTO, is set. In order to have
effect on the outputs EXE_OP and EXE_CL, the corresponding enable input,
EN_OPEN respectively EN_CLOSE must be set, and that no interlocking is active.
L_SEL, L_OPEN and L_CLOSE are used for local command sequence connected to
binary inputs. In order to have effect, the operator place selector, PSTO, must be
set to local or to remote with no priority. If the control model used is Select before
operate, Also the corresponding enable input must be set, and no interlocking is
active. The L_SEL input must be set before L_OPEN or L_CLOSE is operated, if the
control model is Select before operate.
If one multi-phase XCBR/XSWI or two single-phase XCBR/XSWI are used for a two-
or three-phase system, two or more of the inputs XPOSL1, XPOSL2 and XPOSL3 are
connected to the same source.
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14.4.6.4 Settings
Table 499: SCSWI Non group settings (basic)

CtlModel Dir Norm - - SBO Enh Specifies control model type
SBO Enh
PosDependent Always permitted - - Always Permission to operate depending on the
Not perm at permitted position
00/11
tSelect 0.00 - 600.00 s 0.01 30.00 Maximum time between select and
execute signals
tResResponse 0.000 - 60.000 s 0.001 5.000 Allowed time from reservation request to
reservation granted
tSynchrocheck 0.00 - 600.00 s 0.01 10.00 Allowed time for synchronism-check to
fulfil close conditions
tSynchronizing 0.00 - 600.00 s 0.01 0.00 Supervision time to get the signal
synchronizing in progress
tExecutionFB 0.00 - 600.00 s 0.01 30.00 Maximum time from command execution
to termination
tPoleDiscord 0.000 - 60.000 s 0.001 2.000 Allowed time to have discrepancy between
the poles
SuppressMidPos Disabled - - Enabled Mid-position is suppressed during the
Enabled time tIntermediate
InterlockChk Sel & Op phase - - Sel & Op phase Selection if interlock check should be done
Op phase in select phase

M13484-4 v4
The Switch controller (SCSWI) is provided with verification checks for the select - execute
sequence, that is, checks the conditions prior each step of the operation are fulfilled. The involved
functions for these condition verifications are interlocking, reservation, blockings and
synchronism-check.
Control handling M13484-6 v6

.
Two types of control models can be used. The two control models are "direct with normal security"
and "SBO (Select-Before-Operate) with enhanced security". The parameter CtlModel defines which
one of the two control models is used. The control model "direct with normal security" does not
require a select whereas, the "SBO with enhanced security" command model requires a select
before execution. The command sequence for a command with control mode SBO with enhanced
security is shown in figure 440, with control mode direct with normal security is shown in figure
441.
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Reservation SXCBR /
Client SCSWI
logic SXSWI
select
selectAck/AddCause = 0
RES_RQ = TRUE
tReservation
Response
tSelect
RES_GRT = TRUE
SELECTED = TRUE
requestedPosition = 10
opRcvd = TRUE
EXE_CL
opOK = TRUE, tOpOk

operateAck/AddCause = 0
operateAck/AddCause = 0
tExecutionFB
POSITION = 00, timeStamp

cmdTermination/
AddCause = 0
cmdTermination/AddCause = 0
RES_RQ = FALSE
RES_GRT = FALSE
SELECTED = FALSE
IEC15000416-1-EN.vsdx
Figure 440: Example of command sequence for a successful close command when the control
model SBO with enhanced security is used
Reservation SwitchCtrl Switch

client
core core core
requestedPosition = 10
opRcvd = TRUE
RES_RQ
tReservation
Response
RES_GRT = TRUE
EXE_CL
opOK = TRUE, tOpOk
operateAck/AddCause = 0 operateAck/AddCause = 0
POSITION = 00, timeStamp POSITION = 00, timeStamp

cmdTermination/
POSITION = 10, timeStamp AddCause = 0
RES_RQ = FALSE
RES_GRT = FALSE
Figure 441: Example of command sequence for a successful close command when the control
model direct with normal security is used
Normal security means that only the command is evaluated and the resulting position is not
supervised. Enhanced security means that the command sequence is supervised in three steps,
the selection, command evaluation and the supervision of position. Each step ends up with a
pulsed signal to indicate that the respective step in the command sequence is finished. If an error
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occurs in one of the steps in the command sequence, the sequence is terminated. The last error
(L_CAUSE) can be read from the function block and used for example at commissioning.
There is no relation between the command direction and the actual position. For
example, if the switch is in close position it is possible to execute a close
command.
Before an execution command, an evaluation of the position is done. If the parameter

PosDependent is true and the position is in intermediate state or in bad state no execution
command is sent. If the parameter is false the execution command is sent independent of the
position value.
Evaluation of position M13484-14 v4

The position output from the switches (SXCBR or SXSWI) is connected to the switch controller
SCSWI. The XPOS1, XPOS2 and XPOS3 input signals receive the position, time stamps and quality
attributes of the position which is used for further evaluation.
In the case when there are three one-phase switches connected to the switch control function, the
switch control will "merge" the position of the three switches to the resulting three-phase
position. In the case when the position differ between the one-phase switches, following
principles will be applied:
All switches in open position: switch control position = open

All switches in close position: switch control position = close
One switch =open, two switches= close (or switch control position = intermediate
inversely):
Any switch in intermediate position: switch control position = intermediate
Any switch in bad state: switch control position = bad state
The time stamp of the output three-phase position from switch control will have the time stamp
of the last changed phase when it reaches the end position. When it goes to intermediate position
or bad state, it will get the time stamp of the first changed phase.
In addition, there is also the possibility that one of the one-phase switches will change position at
any time due to a trip. Such situation is here called pole discrepancy and is supervised by this
function. In case of a pole discrepancy situation, that is, the positions of the one-phase switches
are not equal positions for a time longer than the setting tPoleDiscord, an error signal POLEDISC
will be set.
In the supervision phase, the switch controller function evaluates the "cause" values from the
switch modules Circuit breaker (SXCBR)/ Circuit switch (SXSWI). At error the "cause" value with
highest priority is shown.
Blocking principles M13484-37 v5

The blocking signals are normally coming from the bay control function (QCBAY) and via the IEC
61850 communication from the operator place.
The different blocking possibilities are:
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• Block/deblock of command. It is used to block command for operation of position.

• Blocking of function, BLOCK. If the BLOCK signal is set, it means that the function is active,
but no outputs are generated, no reporting, control commands are rejected and functional
and configuration data is visible.
The different block conditions will only affect the operation of this function, that is,
no blocking signals will be "forwarded" to other functions. The above blocking
outputs are stored in a non-volatile memory.
Dependence on Operator place GUID-AB327F15-AF44-4ACC-8FA5-2A52AE4AE090 v1

For commands from communication protocol, such as IEC61850-8-1 and DNP, and through the
inputs L_SEL, L_OPEN and L_CLOSE, the operator place is evaluated, and only commands from
enabled operator places are accepted, see Table 491. Commands through the inputs L_SEL,
L_OPEN and L_CLOSE are always from the local operator place. For commands through the inputs
AU_OPEN and AU_CLOSE, the operator place is not evaluated, thus also accepted when the
operator place selector is set to Faulty or Off.
Interaction with synchronism-check and synchronizing functions M13484-47 v5

The Switch controller (SCSWI) works in conjunction with the synchronism-check and the
synchronizing function (SESRSYN, 25). It is assumed that the synchronism-check function is
continuously in operation and gives the result to SCSWI. The result from the synchronism-check
function is evaluated during the close execution. If the operator performs an override of the
synchronism-check, the evaluation of the synchronism-check state is omitted. When there is a
positive confirmation from the synchronism-check function, SCSWI will send the close signal
EXE_CL to the switch function Circuit breaker (SXCBR).
When there is no positive confirmation from the synchronism-check function, SCSWI will send a
start signal START_SY to the synchronizing function, which will send the closing command to
SXCBR when the synchronizing conditions are fulfilled, see Figure 442. If no synchronizing function
is included, the timer for supervision of the "synchronizing in progress signal" is set to 0, which
means no start of the synchronizing function. SCSWI will then set the attribute "blocked-by-
synchronism-check" in the "cause" signal. See also the time diagram in Figure 446.
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SCSWI SXCBR
EXE_CL
OR CLOSE
SYNC_OK
START_SY
SY_INPRO
SESRSYN
CLOSECMD
Synchro Synchronizing
check function
Figure 442: Example of interaction between SCSWI, SESRSYN (25) (synchronism check and
synchronizing function) and SXCBR function
Time diagrams M13484-51 v6

The Switch controller (SCSWI) function has timers for evaluating different time supervision
conditions. These timers are explained here.
The timer tSelect is used for supervising the time between the select and the execute command
signal, that is, the time the operator has to perform the command execution after the selection of
the object to operate.
select
execute command
tSelect
timer t1 t1>tSelect, then long-
operation-time in 'cause'
is set
en05000092.vsd
Figure 443: tSelect
The Long-operation-time cause is only given on the output L_CAUSE. It is not sent
on protocols since the selection has already received a positive response, and no
operation has been issued. If an operation is issued after the time out, the negative
response is Object-not-selected.
The parameter tResResponse is used to set the maximum allowed time to make the reservation,
that is, the time between reservation request and the feedback reservation granted from all bays
involved in the reservation function.
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select
reservation request RES_RQ
reservation granted RES_GRT

t1>tResResponse, then 1-
tResResponse
of-n-control in 'cause' is
timer t1
set
Figure 444: tResResponse

The timer tExecutionFB supervises the time between the execute command and the command
termination, see Figure 445.
execute command
phase A open
close
phase B open
close
phase C open
close
command termination
phase A
command termination
phase B
command termination
phase C
command termination *
circuit breaker open
close
tExecutionFB t1>tExecutionFB, then

timer long-operation-time in
t1 'cause' is set
* The command termination will be delayed one execution sample.

en05000094_ansi.vsd
Figure 445: tExecutionFB

The parameter tSynchrocheck is used to define the maximum allowed time between the execute
command and the input SYNC_OK to become true. If SYNC_OK=true at the time the execute
command signal is received, the timer "tSynchrocheck" will not start. The start signal for the
synchronizing is obtained if the synchronism-check conditions are not fulfilled.
The parameter tSynchronizing is used to define the maximum allowed time between the start
signal for synchronizing and the confirmation that synchronizing is in progress.
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execute command
SYNC_OK
tSynchrocheck
t1
START_SY
SY_INPRO
tSynchronizing
t2>tSynchronizing, then
t2 blocked-by-synchronism
check in 'cause' is set
en05000095_ansi.vsd
Figure 446: tSynchroCheck and tSynchronizing
14.4.7 Circuit breaker SXCBR IP15614-1 v3
The purpose of Circuit breaker (SXCBR) is to provide the actual status of positions and to perform
the control operations, that is, pass all the commands to primary apparatuses in the form of
circuit breakers via binary output boards and to supervise the switching operation and position.
SXCBR
BLOCK XPOS
LR_SWI EXE_OP
OPEN EXE_CL
CLOSE SUBSTED
BL_OPEN OP_BLKD
BL_CLOSE CL_BLKD
BL_UPD UPD_BLKD
POSOP EN POSITION
POSCLOSE OPENP OS
CBOPCAP CLOSEPOS
TR_OPEN TR_POS
TR_CLOSE CNT_VAL
RS_CNT L_CAUSE
EEH_WARN EEHEALTH
EEH_ALM CBOPCAP
XIN
Figure 447: SXCBR function block
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14.4.7.3 Signals
Table 500: SXCBR Input signals

LR_SWI BOOLEAN 0 Local/Remote switch indication from switchyard
OPEN BOOLEAN 0 Pulsed signal used to immediately open the switch
CLOSE BOOLEAN 0 Pulsed signal used to immediately close the switch
BL_OPEN BOOLEAN 0 Signal to block the open command
BL_CLOSE BOOLEAN 0 Signal to block the close command
BL_UPD BOOLEAN 0 Steady signal for block of the position updating
POSOPEN BOOLEAN 0 Signal for open position of apparatus from I/O
POSCLOSE BOOLEAN 0 Signal for close position of apparatus from I/O
CBOPCAP INTEGER 3 Breaker operating capability 1 = None, 2 = O, 3 = CO, 4 = OCO, 5 =
COCO, 6+ = More
TR_OPEN BOOLEAN 0 Signal for open position of truck from I/O
TR_CLOSE BOOLEAN 0 Signal for close position of truck from I/O
RS_CNT BOOLEAN 0 Resets the operation counter
EEH_WARN BOOLEAN 0 Warning from external equipment
EEH_ALM BOOLEAN 0 Alarm from external equipment
XIN GROUP - Execution information from CSWI
SIGNAL
Table 501: SXCBR Output signals

XPOS GROUP SIGNAL Group connection to CSWI for XCBR and XSWI
EXE_OP BOOLEAN Executes the command for open direction
EXE_CL BOOLEAN Executes the command for close direction
SUBSTED BOOLEAN Indication that the position is substituted
OP_BLKD BOOLEAN Indication that the function is blocked for open commands
CL_BLKD BOOLEAN Indication that the function is blocked for close commands
UPD_BLKD BOOLEAN Update of position indication is blocked
POSITION INTEGER Apparatus position indication
OPENPOS BOOLEAN Apparatus open position
CLOSEPOS BOOLEAN Apparatus closed position
TR_POS INTEGER Truck position indication
CNT_VAL INTEGER Operation counter value
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EEHEALTH INTEGER External equipment health. 1=No warning or alarm, 2=Warning,
3=Alarm
CBOPCAP INTEGER Breaker operating capability 1 = None, 2 = O, 3 = CO, 4 = OCO, 5 =
COCO, 6+ = More
14.4.7.4 Settings
Table 502: SXCBR Non group settings (basic)

tStartMove 0.000 - 60.000 s 0.001 0.100 Supervision time for the apparatus to
move after a command
tIntermediate 0.000 - 60.000 s 0.001 0.150 Allowed time for intermediate position
AdaptivePulse Not adaptive - - Not adaptive Output resets when a new correct end
Adaptive position is reached
tOpenPulse 0.000 - 60.000 s 0.001 0.200 Output pulse length for open command
tClosePulse 0.000 - 60.000 s 0.001 0.200 Output pulse length for close command
InitialCount 0 - 20000 - 1 0 Initial number of operations (Initial count
value)

M13487-4 v5
The Circuit breaker function (SXCBR) is used by other functions such as for example, switch
controller, protection functions, autorecloser function or an IEC 61850 client residing in another
IED or the operator place. This switch function executes commands, evaluates block conditions
and evaluates different time supervision conditions. Only if all conditions indicate a switch
operation to be allowed, the function performs the execution command. In case of erroneous
conditions, the function indicates an appropriate "cause" value, see Table 485.
SXCBR has an operation counter for closing and opening commands. The counter value can be
read remotely from the operator place. The value is reset from local HMI, a binary input or remotely
from the operator place by configuring a signal from the Single Point Generic Control 8 signals
(SPC8GAPC) for example. The health of the external equipment, the switch, can be monitored
according to IEC61850-8-1. The operation counter functionality and the external equipment health
supervision are independent sub-functions of the circuit breaker function.
Local/Remote switch M13487-7 v4

One binary input signal LR_SWI is included in SXCBR to indicate the local/remote switch position
from switchyard provided via the I/O board. If this signal is set to TRUE it means that change of
position is allowed only from switchyard level. If the signal is set to FALSE it means that command
from IED or higher level is permitted. When the signal is set to TRUE all commands (for change of
position) are rejected, even trip commands from protection functions are rejected. The
functionality of the local/remote switch is described in Figure 448.
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Local= Operation at
UE switch yard level
TR
From I/O switchLR

FAL
SE
Remote= Operation at
IED or higher level
en05000096.vsd
Figure 448: Local/Remote switch

SXCBR includes several blocking principles. The basic principle for all blocking signals is that they
will affect commands from all other clients for example, switch controller, protection functions
and autoreclosure.
The blocking possibilities are:
• Block/deblock for open command. It is used to block operation for open command.
• Block/deblock for close command. It is used to block operation for close command.
• Update block/deblock of positions. It is used to block the updating of position values. Other
signals related to the position will be reset.
• Blocking of function, BLOCK. If BLOCK signal is set, it means that the function is active, but no
outputs are generated, no reporting, control commands are rejected and functional and
configuration data is visible.
The above blocking outputs are stored in a non-volatile memory.
Substitution M13487-22 v4
The substitution part in SXCBR is used for manual set of the position and quality of the switch.
The typical use of substitution is that an operator enters a manual value because that the real
process value is erroneous for some reason. SXCBR will then use the manually entered value
instead of the value for positions determined by the process.
It is always possible to make a substitution, independently of the position

indication and the status information of the I/O board. When substitution is
enabled, the other signals related to the position follow the substituted position.
The substituted values are stored in a non-volatile memory. If the function is
blocked or blocked for update when the substitution is released, the position value
is kept the same as the last substitution value, but the quality is changed to
"questionable, old data", indicating that the value is old and not reliable.
When the position of the SXCBR is substituted, its IEC61850-8-1 data object is
marked as “substituted", in addition to the substituted quality, but the position
quality of the connected SCSWI is not dependent on the substitution indication in
the quality, so it does not show that it is derived from a substituted value.
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There are two timers for supervising of the execute phase, tStartMove and tIntermediate.
tStartMove supervises that the primary device starts moving after the execute output pulse is
sent. tIntermediate defines the maximum allowed time for intermediate position. Figure 449
explains these two timers during the execute phase.
EXE_CL AdaptivePulse = TRUE

Close pulse duration
OPENPOS
CLOSEPOS
if t1 > tStartMove then

tStartMove timer "switch-not-start-moving"
t1 attribute in 'cause' is set
tStartMove
if t2 > tIntermediate then

tIntermediate timer "persisting-intermediate-state"
tIntermediate
en05000097.vsd
Figure 449: The timers tStartMove and tIntermediate

The timers tOpenPulse and tClosePulse are the length of the execute output pulses to be sent to
the primary equipment. Note that the output pulses for open and close command can have
different pulse lengths. The pulses can also be set to be adaptive with the configuration
parameter AdaptivePulse. Figure 450 shows the principle of the execute output pulse. The
AdaptivePulse parameter will have effect on both execute output pulses.
OPENPOS
CLOSEPOS
AdaptivePulse=FALSE
EXE_CL
tClosePulse
AdaptivePulse=TRUE
EXE_CL
tClosePulse
en05000098.vsd
Figure 450: Execute output pulse

If the pulse is set to be adaptive, it is not possible for the pulse to exceed tOpenPulse or
tClosePulse.
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The execute output pulses are reset when:
• the new expected final position is reached and the configuration parameter AdaptivePulse is
set to true
• the timer tOpenPulse or tClosePulse has elapsed
• an error occurs due to the switch does not start moving, that is, tStartMove has elapsed.
If the breaker reaches the final position before the execution pulse time has
elapsed, and AdaptivePulse is not true, the function waits for the end of the
execution pulse before telling the activating function that the command is
completed.
There is one exception from the first item above. If the primary device is in open position and an
open command is executed or if the primary device is in closed position and a close command is
executed. In these cases, with the additional condition that the configuration parameter
AdaptivePulse is true, the execute output pulse is always activated and resets when tStartMove
has elapsed. If the configuration parameter AdaptivePulse is set to false the execution output
remains active until the pulse duration timer has elapsed.
If the start position indicates bad state (OPENPOS=1 and CLOSEPOS =1) when a
command is executed the execute output pulse resets only when timer tOpenPulse
or tClosePulse has elapsed.
An example of when a primary device is open and an open command is executed is shown in
Figure 451 .
OPENPOS
CLOSEPOS
EXE_OP AdaptivePulse=FALSE
tOpenPulse
EXE_OP AdaptivePulse=TRUE
tOpenPulse
tStartMove timer
en05000099.vsd
Figure 451: Open command with open position indication
14.4.8 Circuit switch SXSWI IP15620-1 v2
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The purpose of Circuit switch (SXSWI) function is to provide the actual status of positions and to
perform the control operations, that is, pass all the commands to primary apparatuses in the form
of disconnectors or grounding switches via binary output boards and to supervise the switching
operation and position.
SXSWI
BLOCK XPOS
LR_SWI EXE_OP
OPEN EXE_CL
CLOSE SUBSTED
BL_OPEN OP_BLKD
BL_CLOSE CL_BLKD
BL_UPD UPD_BLKD
POSOP EN POSITION
POSCLOSE OPENP OS
SWOPCAP CLOSEPOS
RS_CNT CNT_VAL
EEH_WARN L_CAUSE
EEH_ALM EEHEALTH
XIN SWOPCAP
Figure 452: SXSWI function block
14.4.8.3 Signals
Table 503: SXSWI Input signals

LR_SWI BOOLEAN 0 Local/Remote switch indication from switchyard
OPEN BOOLEAN 0 Pulsed signal used to immediately open the switch
CLOSE BOOLEAN 0 Pulsed signal used to immediately close the switch
BL_OPEN BOOLEAN 0 Signal to block the open command
BL_CLOSE BOOLEAN 0 Signal to block the close command
BL_UPD BOOLEAN 0 Steady signal for block of the position updating
SWOPCAP INTEGER 4 Switch operating capability 1 = None, 2 = O, 3 = C, 4 = O and C
RS_CNT BOOLEAN 0 Resets the operation counter
EEH_WARN BOOLEAN 0 Warning from external equipment
EEH_ALM BOOLEAN 0 Alarm from external equipment
SIGNAL
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Table 504: SXSWI Output signals

XPOS GROUP SIGNAL Group connection to CSWI for XCBR and XSWI
EXE_OP BOOLEAN Executes the command for open direction
EXE_CL BOOLEAN Executes the command for close direction
SUBSTED BOOLEAN Indication that the position is substituted
UPD_BLKD BOOLEAN Update of position indication is blocked
POSITION INTEGER Apparatus position indication
3=Alarm
SWOPCAP INTEGER Switch operating capability 1 = None, 2 = O, 3 = C, 4 = O and C
14.4.8.4 Settings
Table 505: SXSWI Non group settings (basic)

AdaptivePulse Not adaptive - - Not adaptive Output resets when a new correct end
Adaptive position is reached
tOpenPulse 0.000 - 60.000 s 0.001 0.200 Output pulse length for open command
tClosePulse 0.000 - 60.000 s 0.001 0.200 Output pulse length for close command
SwitchType Load Break - - Disconnector Load Break, Disconnector, Grounding
Disconnector Switch, HS Grounding. Switch
Grounding Switch
HS Groundg.
Switch
InitialCount 0 - 20000 - 1 0 Initial number of operations (Initial count
value)

M16494-3 v6
The users of the Circuit switch (SXSWI) are other functions such as for example, switch controller,
protection functions, autorecloser function, or a 61850 client residing in another IED or the
operator place. SXSWI executes commands, evaluates block conditions and evaluates different
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time supervision conditions. Only if all conditions indicate a switch operation to be allowed, SXSWI
performs the execution command. In case of erroneous conditions, the function indicates an
appropriate "cause" value, see Table 485.
SXSWI has an operation counter for closing and opening commands. The counter value can be
read remotely from the operator place. The value is reset from a binary input or remotely from the
operator place by configuring a signal from the Single Point Generic Control 8 signals (SPC8GAPC),
for example.
Also, the health of the external equipment, the switch, can be monitored according to
IEC61850-8-1.
Local/Remote switch M16494-6 v4

One binary input signal LR_SWI is included in SXSWI to indicate the local/remote switch position
from switchyard provided via the I/O board. If this signal is set to TRUE it means that change of
position is allowed only from switchyard level. If the signal is set to FALSE it means that command
from IED or higher level is permitted. When the signal is set to TRUE all commands (for change of
position) from internal IED clients are rejected, even trip commands from protection functions are
rejected. The functionality of the local/remote switch is described in Figure 453.
Local= Operation at
UE switch yard level
TR
From I/O switchLR

FAL
SE
Remote= Operation at
IED or higher level
en05000096.vsd
Figure 453: Local/Remote switch

SXSWI includes several blocking principles. The basic principle for all blocking signals is that they
will affect commands from all other clients for example, switch controller, protection functions
and autorecloser.
The blocking possibilities are:
• Block/deblock for open command. It is used to block operation for open command.
• Block/deblock for close command. It is used to block operation for close command.
• Update block/deblock of positions. It is used to block the updating of position values. Other
signals related to the position will be reset.
• Blocking of function, BLOCK. If BLOCK signal is set, it means that the function is active, but no
outputs are generated, no reporting, control commands are rejected and functional and
configuration data is visible.
The above blocking outputs are stored in a non-volatile memory.
Substitution M16494-21 v6
The substitution part in SXSWI is used for manual set of the position and quality of the switch. The
typical use of substitution is that an operator enters a manual value because the real process value
is erroneous of some reason. SXSWI will then use the manually entered value instead of the value
for positions determined by the process.
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It is always possible to make a substitution, independently of the position

indication and the status information of the I/O board. When substitution is
enabled, the other signals related to the position follow the substituted position.
The substituted values are stored in a non-volatile memory. If the function is
blocked or blocked for update when the substitution is released, the position value
is kept the same as the last substitution value, but the quality is changed to
"questionable, old data", indicating that the value is old and not reliable.
When the position of the SXSWI is substituted, its IEC61850-8-1 data object is
marked as “substituted", in addition to the substituted quality, but the position
quality of the connected SCSWI is not dependent on the substitution indication in
the quality, so it does not show that it is derived from a substituted value.

There are two timers for supervising of the execute phase, tStartMove and tIntermediate.
tStartMove supervises that the primary device starts moving after the execute output pulse is
sent. tIntermediate defines the maximum allowed time for intermediate position. Figure 454
explains these two timers during the execute phase.
EXE_CL AdaptivePulse = TRUE

Close pulse duration
OPENPOS
CLOSEPOS
if t1 > tStartMove then

tStartMove timer "switch-not-start-moving"
tStartMove
if t2 > tIntermediate then

tIntermediate timer "persisting-intermediate-state"
tIntermediate
en05000097.vsd
Figure 454: The timers tStartMove and tIntermediate

The timers tOpenPulse and tClosePulse are the length of the execute output pulses to be sent to
the primary equipment. Note that the output pulses for open and close command can have
different pulse lengths. The pulses can also be set to be adaptive with the configuration
parameter AdaptivePulse. Figure 455 shows the principle of the execute output pulse. The
AdaptivePulse parameter will have effect on both execute output pulses.
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OPENPOS
CLOSEPOS
AdaptivePulse=FALSE
EXE_CL
tClosePulse
AdaptivePulse=TRUE
EXE_CL
tClosePulse
en05000098.vsd
Figure 455: Execute output pulse

If the pulse is set to be adaptive, it is not possible for the pulse to exceed tOpenPulse or
tClosePulse.
The execute output pulses are reset when:
• the new expected final position is reached and the configuration parameter AdaptivePulse is
set to true
• the timer tOpenPulse or tClosePulse has elapsed
• an error occurs due to the switch does not start moving, that is, tStartMove has elapsed.
If the controlled primary device reaches the final position before the execution
pulse time has elapsed, and AdaptivePulse is not true, the function waits for the
end of the execution pulse before telling the activating function that the command
is completed.
There is one exception from the first item above. If the primary device is in open position and an
open command is executed or if the primary device is in close position and a close command is
executed. In these cases, with the additional condition that the configuration parameter
AdaptivePulse is true, the execute output pulse is always activated and resets when tStartMove
has elapsed. If the configuration parameter AdaptivePulse is set to false the execution output
remains active until the pulse duration timer has elapsed.
If the start position indicates bad state (OPENPOS=1 and CLOSEPOS =1) when a
command is executed the execute output pulse resets only when timer tOpenPulse
or tClosePulse has elapsed.
An example when a primary device is open and an open command is executed is shown in
Figure 456.
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OPENPOS
CLOSEPOS
EXE_OP AdaptivePulse=FALSE
tOpenPulse
EXE_OP AdaptivePulse=TRUE
tOpenPulse
tStartMove timer
en05000099.vsd
Figure 456: Open command with open position indication
14.4.9 Proxy for signals from switching device via GOOSE XLNPROXY
14.4.9.1 Functionality GUID-11F9CA1C-8E20-489B-822B-34DACC59553A v1
The proxy for signals from switching device via GOOSE (XLNPROXY) gives an internal
representation of the position status and control response for a switch modelled in a breaker IED.
This representation is identical to that of an SXCBR or SXSWI function.
14.4.9.2 Function block GUID-408513CD-A87E-45E8-8E44-24E153947F02 v1
XLNPROXY
BEH* XPOS
BEH_VALID* SELECTED
LOC* OP_BLKD
LOC_VALID* CL_BLKD
BLKOPN* OPENPOS
BLKOPN_V* CLOSEPOS
BLKCLS* CNT_VAL
BLKCLS_V* L_CAUSE
POSVAL* EEHEALTH
POSVAL_V* OPCAP
OPCNT*
OP_CNT_V*
BLK
BLK_VAL
STSELD
STSELD_V
OPRCVD
OPRCVD_V
OPOK
OPOK_VAL
EEHEALTH
EEH_VAL
OPCAP
OPCAP_V
COMMVALID
XIN
Figure 457: XLNPROXY function block
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14.4.9.3 Signals
Table 506: XLNPROXY Input signals

BEH INTEGER -1 Behaviour
BEH_VLD BOOLEAN 0 Valid data on BEH input
LOC BOOLEAN 0 Local control behaviour
LOC_VLD BOOLEAN 0 Valid data on LOC input
BLKOPN BOOLEAN 0 Block opening
BLKOPN_VLD BOOLEAN 0 Valid data on BLKOPN input
BLKCLS BOOLEAN 0 Block closing
BLKCLS_VLD BOOLEAN 0 Valid data on BLKCLS input
POSVAL INTEGER 0 Switch position, Pos.stVal
POSVAL_VLD BOOLEAN 0 Valid data on POSVAL input
OPCNT INTEGER -1 Operation counter
OPCNT_VLD BOOLEAN 0 Valid data on OPCNT input
BLK BOOLEAN 0 Dynamic blocking of function described by the LN
BLK_VLD BOOLEAN 0 Valid data on BLK input
STSELD BOOLEAN 0 The controllable data is in the status "selected”
STSELD_VLD BOOLEAN 0 Valid data on STSELD input
OPRCVD BOOLEAN 0 Operate command for a controllable data object received
OPRCVD_VLD BOOLEAN 0 Valid data on OPRCVD input
OPOK BOOLEAN 0 Operate command for a controllable data object accepted
OPOK_VLD BOOLEAN 0 Valid data on OPOK input
EEHEALTH INTEGER -1 External equipment health
EEHEALTH_VLD BOOLEAN 0 Valid data on EEHEALTH input
OPCAP INTEGER -1 Operating capability
OPCAP_VLD BOOLEAN 0 Valid data on OPCAP input
COMMVALID BOOLEAN 0 Communication valid
SIGNAL
Table 507: XLNPROXY Output signals

XPOS GROUP SIGNAL Group connection to CSWI
SELECTED BOOLEAN Select conditions are fulfilled
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3=Alarm
OPCAP INTEGER Switch / breaker operating capability
14.4.9.4 Settings
Table 508: XLNPROXY Non group settings (basic)

SwitchType Circuit Breaker - - Circuit Breaker 0 = CB, 1 = Load Break, 2 = Disconnector, 3
Load Break = Earthing Switch, 4 = High Speed Earthing
Disconnector Switch
Grounding Switch
HS groud Switch
GUID-A4CCC681-D4D8-4534-905D-1D8AD40E923B v1
The default values of the inputs BEH, OPCNT, EEHEALTH and OPCAP are set to -1 to
denote that they are not connected.
14.4.9.5 Operation principle GUID-D2679E0E-ABB5-46F0-AD9C-F6E8E8099534 v1
The proxy for signals from switching device via GOOSE (XLNPROXY) is intended to be used when
the switch (XCBR/XSWI) is modelled and controlled in a breaker IED or similar unit on the process
bus. XLNPROXY packages the signals from the GOOSE receive function, normally GOOSEXLNRCV,
into the same format as used from SXCBR and SXSWI to SCSWI. It makes a similar evaluation of
the command response as SXCBR and SXSWI when a command is issued from the connected
SCSWI.
14.4.9.6 Position supervision GUID-95C72346-A577-4F0A-8584-8E1593B9B947 v1
XLNPROXY has two outputs for position indication: OPENPOS and CLOSEPOS. Position is a double
point indication and the OPENPOS and CLOSEPOS are binary outputs intended to be used for
condition logics to protection and control functions
Normally, the position outputs, OPENPOS and CLOSEPOS, follow the value of the input POSVAL.
However, if the POSVAL_V input is FALSE, the communication is lost (COMMVALID = FALSE), or the
quality of the position received is bad, the OPENPOS and CLOSEPOS are both set to FALSE.
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14.4.9.7 Command response evaluation GUID-A2CDC1AE-A6F5-478B-B6E5-3442C54212D8 v1
The command evaluation is triggered through the group input XIN that is connected to the SCSWI
function controlling the switch.
If an operation is initiated by the SCSWI, the XLNPROXY function checks if the switch is blocked
for the operation direction and that the position moves to the desired position within the two
time limits tStartMove and tIntermediate. The default values for tStartMove and tIntermediate are
for a breaker. The typical values for a disconnector are:
• tStartMove = 3s
• tIntermediate = 15s
In most cases, tStartMove and tIntermediate can be set to the same values as in
the source XCBR or XSWI function. However, if the time limits are set very close to
the actual movement times of the apparatus, compensation may be needed for the
communication delays and differences in cycle time of the XLNPROXY function and
the source function. The compensation should be in the range of 0 - 5ms.
When the switch has started moving, it issues a response to the SCSWI function that the operation
has started. If it does not start moving within tStartMove, the command is deemed as failed, and a
cause is raised on the L_CAUSE output and sent to the SCSWI. The different causes it can identify
are listed in order of priority in table 1. The detection of the different ways of blocking is done
while waiting for movement of the switch, but the cause is not given until the tStartMove has
elapsed.
Table 509: Possible cause values from XLNPROXY

Cause No Cause Description Conditions
8 Blocked-by-Mode The BEH input is 5.
2 Blocked-by-switching- The LOC input indicates that only local commands
hierarchy are allowed for the breaker IED function.
-24 Blocked-for-open-cmd The BLKOPN is active indicating that the switch is
blocked for open commands.
-25 Blocked-for-close-cmd The BLKCLS is active indicating that the switch is
blocked for close commands.
9 Blocked-by-process If the Blk input is connected and active indicating
that the switch is dynamically blocked. Or if the
OPCAP input is connected, it indicates that the
operation capability of the switch is not enough to
perform the command.
5 Position-reached Switch is already in the intended position.
-31 Switch-not-start-moving Switch did not start moving within tStartMove.
-32 Persistent-intermediate-state The switch stopped in intermediate state for longer
than tIntermediate.
-33 Switch-returned-to-init-pos Switch returned to the initial position.
-34 Switch-in-bad-state Switch is in a bad position.
-35 Not-expected-final-position Switch did not reach the expected final position.
The L_CAUSE output keeps its output value until a new command sequence has been started.
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If the quality of the position or the communication becomes bad, the command evaluation
replaces the uncertain position value with intermediate position. Thus, as long as the quality is
bad, all commands will result in the cause Persistant-intermediate-state, -32.
If the switch in the merging unit has the behaviour set to Test or Test blocked, when the IED
has the behaviour On or Blocked, all data from the switch is regarded as invalid. Thus, any
command will fail with the cause PersistantiIntermediate-state, -32, and if selection is used for the
switch, all attempts to select the connected SCSWI will fail with the cause Select-failed, 3, from the
SCSWI.
It is possible to speed up the command response for when the command has been started by the
switch in the breaker IED by connecting the inputs OPOK and OPOK_VAL. Then the blocking check
is only done until OPOK is activated and confirmation of that the command has been started is
given to the SCSWI function.
If the inputs STSELD and STSELD_V are connected, the switch in the breaker IED is assumed to use
selection. Then the SCSWI will wait for a selected indication, STSELD input of XLNPROXY, before
accepting selection, this information is transferred to the SCSWI function from the XLNPROXY
through the group connection XPOS. If STSELD is not activated within tSelect of the SCSWI
function, the selection is deemed failed and it gives a negative selection acknowledgement to the
command issuer with the cause Select-failed. Further, if the communication is lost, or the data
received is deemed invalid, the selection will also fail with cause Select-failed from the SCSWI.
14.4.10 Bay reserve QCRSV IP15629-1 v2
The purpose of the reservation function is primarily to transfer interlocking information between
IEDs in a safe way and to prevent double operation in a bay, switchyard part, or complete
substation.
QCRSV
EXCH_IN RES_GRT1
RES_RQ1 RES_GRT2
RES_RQ2 RES_GRT3
RES_RQ3 RES_GRT4
RES_RQ4 RES_GRT5
RES_RQ5 RES_GRT6
RES_RQ6 RES_GRT7
RES_RQ7 RES_GRT8
RES_RQ8 RES_BAYS
BLK_RES ACK_TO_B
OVERRIDE RESERVED
RES_DATA EXCH_OUT
Figure 458: QCRSV function block
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14.4.10.3 Signals
Table 510: QCRSV Input signals

EXCH_IN INTEGER 0 Used for exchange signals between different BayRes blocks
RES_RQ1 BOOLEAN 0 Signal for apparatus 1 that requests to do a reservation
BLOCK BOOLEAN 0 Reservation is not possible and the output signals are reset
OVERRIDE BOOLEAN 0 Signal to override the reservation
RES_DATA INTEGER 0 Reservation data coming from function block ResIn
Table 511: QCRSV Output signals

RES_GRT1 BOOLEAN Reservation is made and the apparatus 1 is allowed to operate
RES_BAYS BOOLEAN Request for reservation of other bays
ACK_TO_B BOOLEAN Acknowledge to other bays that this bay is reserved
RESERVED BOOLEAN Indicates that the bay is reserved
EXCH_OUT INTEGER Used for exchange signals between different BayRes blocks
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14.4.10.4 Settings
Table 512: QCRSV Non group settings (basic)

tCancelRes 0.000 - 60.000 s 0.001 10.000 Supervision time for canceling the
reservation
ParamRequest1 Other bays res. - - Only own bay res. Reservation of the own bay only, at
Only own bay res. selection of apparatus 1

M13505-4 v3
The Bay reserve (QCRSV) function handles the reservation. QCRSV function starts to operate in
two ways. It starts when there is a request for reservation of the own bay or if there is a request
for reservation from another bay. It is only possible to reserve the function if it is not currently
reserved. The signal that can reserve the own bay is the input signal RES_RQx (x=1-8) coming from
switch controller (SCWI). The signals for request from another bay are the outputs RE_RQ_B and
V_RE_RQ from function block RESIN. These signals are included in signal EXCH_OUT from RESIN
and are connected to RES_DATA in QCRSV.
The parameters ParamRequestx (x=1-8) are chosen at reservation of the own bay only (TRUE) or
other bays (FALSE). To reserve the own bay only means that no reservation request RES_BAYS is
created.
Reservation request of own bay M13505-7 v2

If the reservation request comes from the own bay, the function QCRSV has to know which
apparatus the request comes from. This information is available with the input signal RES_RQx
and parameter ParamRequestx (where x=1-8 is the number of the requesting apparatus). In order
to decide if a reservation request of the current bay can be permitted QCRSV has to know whether
the own bay already is reserved by itself or another bay. This information is available in the output
signal RESERVED.
If the RESERVED output is not set, the selection is made with the output RES_GRTx (where x=1-8 is
the number of the requesting apparatus), which is connected to switch controller SCSWI. If the bay
already is reserved the command sequence will be reset and the SCSWI will set the attribute "1-of-
n-control" in the "cause" signal.
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Reservation of other bays M13505-11 v2

When the function QCRSV receives a request from an apparatus in the own bay that requires other
bays to be reserved as well, it checks if it already is reserved. If not, it will send a request to the
other bays that are predefined (to be reserved) and wait for their response (acknowledge). The
request of reserving other bays is done by activating the output RES_BAYS.
When it receives acknowledge from the bays via the input RES_DATA, it sets the output RES_GRTx
(where x=1-8 is the number of the requesting apparatus). If not acknowledgement from all bays is
received within a certain time defined in SCSWI (tResResponse), the SCSWI will reset the
reservation and set the attribute "1-of-n-control" in the "cause" signal.
Reservation request from another bay M13505-15 v2

When another bay requests for reservation, the input BAY_RES in corresponding function block
RESIN is activated. The signal for reservation request is grouped into the output signal EXCH_OUT
in RESIN, which is connected to input RES_DATA in QCRSV. If the bay is not reserved, the bay will
be reserved and the acknowledgment from output ACK_T_B is sent back to the requested bay. If
the bay already is reserved the reservation is kept and no acknowledgment is sent.
Blocking and overriding of reservation M13505-18 v3

If QCRSV function is blocked (input BLK_RES is set to true) the reservation is blocked. That is, no
reservation can be made from the own bay or any other bay. This can be set, for example, via a
binary input from an external device to prevent operations from another operator place at the
same time.
The reservation function can also be overridden in the own bay with the OVERRIDE input signal,
that is, reserving the own bay without waiting for the external acknowledge.
Bay with more than eight apparatuses M13505-22 v5

If only one instance of QCRSV is used for a bay that is, use of up to eight apparatuses, the input
EXCH_IN must be set to FALSE.
If there are more than eight apparatuses in the bay there has to be one additional QCRSV. The two
QCRSV functions have to communicate and this is done through the input EXCH_IN and
EXCH_OUT according to Figure 459. If more than one QCRSV are used, the execution order is very
important. The execution order must be in the way that the first QCRSV has a lower number than
the next one.
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QCRSV
EXCH_IN RES_ GRT1
RES_RQ1 RES_ GRT2
RES_RQ2 RES_ GRT3
RES_RQ3 RES_ GRT4
RES_RQ4 RES_ GRT5
RES_RQ5 RES_ GRT6
RES_RQ6 RES_ GRT7
RES_RQ7 RES_ GRT8
RES_RQ8 RES_ BAYS
BLK_ RES ACK_TO_B
OVERRIDE RESERVED
RES_ DATA EXCH_ OUT
QCRSV
EXCH_IN RES_ GRT1
RES_RQ1 RES_ GRT2
RES_RQ2 RES_ GRT3 RES_ BAYS
OR
RES_RQ3 RES_ GRT4
RES_RQ4 RES_ GRT5
RES_RQ5 RES_ GRT6 ACK_TO_B
RES_RQ6 RES_ GRT7 OR
RES_RQ7 RES_ GRT8
RES_RQ8 RES_ BAYS
BLK_ RES ACK_TO_B RESERVED
OR
OVERRIDE RESERVED
RES_ DATA EXCH_ OUT
Figure 459: Connection of two QCRSV function blocks
14.4.11 Reservation input RESIN IP15650-1 v2
The Reservation input (RESIN) function receives the reservation information from other bays. The
number of instances is the same as the number of involved bays (up to 60 instances are available).
RESIN1
BAY_ACK ACK_F_B
BAY_VAL ANY_ACK
BAY_RES VALID_TX
RE_RQ_B
V_RE_RQ
EXCH_OUT
Figure 460: RESIN1 function block
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RESIN2
EXCH_IN ACK_F_B
BAY_ACK ANY_ACK
BAY_VAL VALID_TX
BAY_RES RE_RQ_B
V_RE_RQ
EXCH_OUT
Figure 461: RESIN2 function block
14.4.11.3 Signals
Table 513: RESIN1 Input signals

BAY_ACK BOOLEAN 0 Another bay has acknowledged the reservation request from this
bay
BAY_VAL BOOLEAN 0 The reservervation and acknowledge signals from another bay are
valid
BAY_RES BOOLEAN 0 Request from other bay to reserve this bay
Table 514: RESIN1 Output signals

ACK_F_B BOOLEAN All other bays have acknowledged the reservation request from
this bay
ANY_ACK BOOLEAN Any other bay has acknowledged the reservation request from
this bay
VALID_TX BOOLEAN The reservation and acknowledge signals from other bays are
valid
RE_RQ_B BOOLEAN Request from other bay to reserve this bay
V_RE_RQ BOOLEAN Check if the request of reserving this bay is valid
EXCH_OUT INTEGER Used for exchange signals between different ResIn blocks
Table 515: RESIN2 Input signals

EXCH_IN INTEGER 5 Used for exchange signals between different ResIn blocks
BAY_ACK BOOLEAN 0 Another bay has acknowledged the reservation request from this
bay
BAY_VAL BOOLEAN 0 The reservervation and acknowledge signals from another bay are
valid
BAY_RES BOOLEAN 0 Request from other bay to reserve this bay
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Table 516: RESIN2 Output signals

ACK_F_B BOOLEAN All other bays have acknowledged the reservation request from
this bay
ANY_ACK BOOLEAN Any other bay has acknowledged the reservation request from
this bay
VALID_TX BOOLEAN The reservation and acknowledge signals from other bays are
valid
RE_RQ_B BOOLEAN Request from other bay to reserve this bay
V_RE_RQ BOOLEAN Check if the request of reserving this bay is valid
EXCH_OUT INTEGER Used for exchange signals between different ResIn blocks
14.4.11.4 Settings
Table 517: RESIN1 Non group settings (basic)

FutureUse Bay in use - - Bay in use The bay for this ResIn block is for future
Bay future use use
Table 518: RESIN2 Non group settings (basic)

FutureUse Bay in use - - Bay in use The bay for this ResIn block is for future
Bay future use use
14.4.11.5 Operation principle M16503-3 v6
The reservation input (RESIN) function is based purely on Boolean logic conditions. The logic
diagram in Figure 462 shows how the output signals are created. The inputs of the function block
are connected to a receive function block representing signals transferred over the station bus
from another bay.
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EXCH_IN INT
BIN
ACK_F_B
AND
FutureUse
OR
ANY_ACK
BAY_ACK OR
VALID_TX
AND
BAY_VAL OR
RE_RQ_B
OR
BAY_RES AND
V _RE_RQ
OR
BIN
EXCH_OUT
INT
INT……..Integer
BIN……..Binary en05000089_ansi.vsd
Figure 462: Logic diagram for RESIN

Figure 463 describes the principle of the data exchange between all RESIN modules in the current
bay. There is one RESIN function block per "other bay" used in the reservation mechanism. The
output signal EXCH_OUT in the last RESIN functions are connected to the module bay reserve
(QCRSV) that handles the reservation function in the own bay.
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RESIN
BAY_ACK ACK_F_B
Bay 1 BAY_VAL ANY_ACK
BAY_RES VALID_TX
RE_RQ_B
V_RE_RQ
EXCH_OUT
RESIN
EXCH_IN ACK_F_B
BAY_ACK ANY_ACK
Bay 2 BAY_VAL VALID_TX
BAY_RES RE_RQ_B
V_RE_RQ
EXCH_OUT
RESIN
EXCH_IN ACK_F_B
BAY_ACK ANY_ACK
Bay n BAY_VAL VALID_TX
BAY_RES RE_RQ_B QCRSV
V_RE_RQ
EXCH_OUT RES_DATA
en05000090.vsd
Figure 463: Diagram of the chaining principle for RESIN
14.5 Logic rotating switch for function selection and LHMI

presentation SLGAPC SEMOD114936-1 v4
SEMOD167845-2 v3

Logic rotating switch for function SLGAPC - -
selection and LHMI presentation
The logic rotating switch for function selection and LHMI presentation SLGAPC (or the selector
switch function block) is used to get an enhanced selector switch functionality compared to the
one provided by a hardware selector switch. Hardware selector switches are used extensively by
utilities, in order to have different functions operating on pre-set values. Hardware switches are
however sources for maintenance issues, lower system reliability and an extended purchase
portfolio. The selector switch function eliminates all these problems.
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SLGAPC
BLOCK ^P01
PSTO ^P02
UP ^P03
DOWN ^P04
^P05
^P06
^P07
^P08
^P09
^P10
^P11
^P12
^P13
^P14
^P15
^P16
^P17
^P18
^P19
^P20
^P21
^P22
^P23
^P24
^P25
^P26
^P27
^P28
^P29
^P30
^P31
^P32
SWPOSN
Figure 464: SLGAPC function block
14.5.4 Signals
Table 519: SLGAPC Input signals

UP BOOLEAN 0 Binary "UP" command
DOWN BOOLEAN 0 Binary "DOWN" command
Table 520: SLGAPC Output signals

P01 BOOLEAN Selector switch position 1
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SWPOSN INTEGER Switch position (integer)
14.5.5 Settings
Table 521: SLGAPC Non group settings (basic)

Enabled
NrPos 2 - 32 - 1 32 Number of positions in the switch
OutType Pulsed - - Steady Output type, steady or pulse
Steady
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tPulse 0.000 - 60.000 s 0.001 0.200 Operate pulse duration, in [s]
tDelay 0.000 - s 0.010 0.000 Time delay on the output, in [s]
60000.000
StopAtExtremes Disabled - - Disabled Stop when min or max position is reached
Enabled

Table 522: SLGAPC Monitored data

SWPOSN INTEGER - - Switch position (integer)

SEMOD114931-4 v6
The logic rotating switch for function selection and LHMI presentation (SLGAPC) function has two
operating inputs – UP and DOWN. When a signal is received on the UP input, the function will
activate the output next to the present activated output, in ascending order (for example if the
present activated output is P03 and one activates the UP input then the output P04 will be
activated). When a signal is received on the DOWN input, the function will activate the output next
to the present activated output, in descending order (for example if the present activated output
is P03 and one activates the DOWN input then the output P02 will be activated). Depending on the
output settings the output signals can be steady or pulsed. In case of steady signals, the output
will be active till the time it receives next operation of UP/DOWN inputs. Also, depending on the
settings one can have a time delay between the UP or DOWN activation signal positive front and
the output activation.
Besides the inputs visible in the application configuration in the Application Configuration tool,
there are other possibilities that will allow an user to set the desired position directly (without
activating the intermediate positions), either locally or remotely, using a “select before execute”
dialog. One can block the function operation, by activating the BLOCK input. In this case, the
present position will be kept and further operation will be blocked. The operator place (local or
remote) is specified through the PSTO input. If any operation is allowed the signal INTONE from
the Fixed signal function block can be connected. SLGAPC function block has also an integer value
output, that generates the actual position number. The positions and the block names are fully
settable by the user. These names will appear in the menu, so the user can see the position names
instead of a number.
14.5.7.1 Graphical display SEMOD114931-35 v4
There are two possibilities for SLGAPC
• if it is used just for the monitoring, the switches will be listed with their actual position
names, as defined by the user (max. 13 characters).
• if it is used for control, the switches will be listed with their actual positions, but only the first
three letters of the name will be used.
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In both cases, the switch full name will be shown, but the user has to redefine it when building the
Graphical Display Editor, under the "Caption". If used for the control, the following sequence of
commands will ensure:
Control
Control Single Line Diagram
Measurements Commands
Events
Disturbance records
Settings
Diagnostics
Test
Change to the "Switches" page Reset
of the SLD by left-right arrows. Authorization
Select switch by up-down Language
arrows
../Control/SLD/Switch Open Close ../Control/SLD/Switch

SMBRREC control SMBRREC control
Select switch. Press the
WFM WFM
Open or Close key. A
dialog box appears.
Pilot setup Pilot setup
OFF OFF
Damage control E P: Disc N: Disc Fe
DAL
The pos will not be modified
(outputs will not be activated) until OK Cancel
you press the E-button for O.K.
../Control/SLD/Switch
SMBRREC control
WFM
Pilot setup
OFF
Damage control
DFW
Figure 465: Example 2 on handling the switch from the local HMI.
From the single line diagram on local HMI.
14.6 Selector mini switch VSGAPC SEMOD158754-1 v3
SEMOD167850-2 v3

Selector mini switch VSGAPC - -
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The Selector mini switch VSGAPC function block is a multipurpose function used for a variety of
applications, as a general purpose switch.
VSGAPC can be controlled from the menu or from a symbol on the single line diagram (SLD) on the
local HMI.
VSGAPC
BLOCK BLOCKED
PSTO POSITION
IPOS1 POS1
IPOS2 POS2
CMDPOS12
CMDPOS21
Figure 466: VSGAPC function block
14.6.4 Signals
Table 523: VSGAPC Input signals

IPOS1 BOOLEAN 0 Position 1 indicating input
IPOS2 BOOLEAN 0 Position 2 indicating input
Table 524: VSGAPC Output signals

BLOCKED BOOLEAN The function is active but the functionality is blocked
POSITION INTEGER Position indication, integer
POS1 BOOLEAN Position 1 indication, logical signal
POS2 BOOLEAN Position 2 indication, logical signal
CMDPOS12 BOOLEAN Execute command from position 1 to position 2
CMDPOS21 BOOLEAN Execute command from position 2 to position 1
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14.6.5 Settings
Table 525: VSGAPC Non group settings (basic)

Enabled
CtlModel Dir Norm - - Dir Norm Specifies the type for control model
SBO Enh according to IEC 61850
Mode Steady - - Pulsed Operation mode
Pulsed
tSelect 0.000 - 60.000 s 0.001 30.000 Max time between select and execute
signals
tPulse 0.000 - 60.000 s 0.001 0.200 Command pulse lenght
Selector mini switch (VSGAPC) function can be used for double purpose, in the same way as switch
controller (SCSWI) functions are used:
• for indication on the single line diagram (SLD). Position is received through the IPOS1 and
IPOS2 inputs and distributed in the configuration through the POS1 and POS2 outputs, or to
IEC 61850 through reporting, or GOOSE.
• for commands that are received via the local HMI or IEC 61850 and distributed in the
configuration through outputs CMDPOS12 and CMDPOS21.
The output CMDPOS12 is set when the function receives a CLOSE command from the local
HMI when the SLD is displayed and the object is chosen.
The output CMDPOS21 is set when the function receives an OPEN command from the local
HMI when the SLD is displayed and the object is chosen.
It is important for indication in the SLD that the a symbol is associated with a
controllable object, otherwise the symbol won't be displayed on the screen. A
symbol is created and configured in GDE tool in PCM600.
The PSTO input is connected to the Local remote switch to have a selection of operators place,
operation from local HMI (Local) or through IEC 61850 (Remote). An INTONE connection from
Fixed signal function block (FXDSIGN) will allow operation from local HMI.
As it can be seen, both indications and commands are done in double-bit representation, where a
combination of signals on both inputs/outputs generate the desired result.
The following table shows the relationship between IPOS1/IPOS2 inputs and the name of the
string that is shown on the SLD. The value of the strings are set in PST.
IPOS1 IPOS2 Name of displayed string Default string value

0 0 PosUndefined P00
1 0 Position1 P01
0 1 Position2 P10
1 1 PosBadState P11
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14.7 Generic communication function for Double Point

indication DPGAPC SEMOD55384-1 v4
GUID-E16EA78F-6DF9-4B37-A92D-5C09827E2297 v3

Generic communication function for DPGAPC - -
Double Point indication
Generic communication function for Double Point indication (DPGAPC) function block is used to
send double point position indications to other systems, equipment or functions in the substation
through IEC 61850-8-1 or other communication protocols. It is especially intended to be used in
the interlocking station-wide logics.
Figure 467: DPGAPC function block
Table 526: DPGAPC Input signals

OPEN BOOLEAN 0 Open indication
CLOSE BOOLEAN 0 Close indication
VALID BOOLEAN 0 Valid indication
Table 527: DPGAPC Output signals

POSITION INTEGER Double point indication
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14.7.5 Settings ABBD8E283863 v3
The function does not have any parameters available in the local HMI or PCM600.
When receiving the input signals, DPGAPC sends the signals over IEC 61850-8-1 to the systems,
equipment or functions that requests and thus subscribes on these signals. To be able to get the
signals into other systems, equipment or functions, one must use other tools, described in the
Engineering manual, and define which function block in which systems, equipment or functions
should receive this information.
More specifically, DPGAPC function reports a combined double point position indication output
POSITION, by evaluating the value and the timestamp attributes of the inputs OPEN and CLOSE,
together with the logical input signal VALID.
When the input signal VALID is active, the values of the OPEN and CLOSE inputs determine the
two-bit integer value of the output POSITION. The timestamp of the output POSITION will have the
latest updated timestamp of the inputs OPEN and CLOSE.
When the input signal VALID is inactive, DPGAPC function forces the position to intermediated
state.
When the value of the input signal VALID changes, the timestamp of the output POSITION will be
updated as the time when DPGAPC function detects the change.
Refer to Table 528 for the description of the input-output relationship in terms of the value and
the quality attributes.
Table 528: Description of the input-output relationship

POSITION
VALID OPEN CLOSE
Value Description
0 - - 0 Intermediate
1 0 0 0 Intermediate
1 1 0 1 Open
1 0 1 2 Closed
1 1 1 3 Bad State
14.8 Single point generic control 8 signals SPC8GAPC SEMOD176448-1 v3
SEMOD176456-2 v3

Single point generic control 8 signals SPC8GAPC - -
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The Single point generic control 8 signals SPC8GAPC function block is a collection of 8 single point
commands, designed to bring in commands from REMOTE (SCADA) to those parts of the logic
configuration that do not need extensive command receiving functionality (for example, SCSWI). In
this way, simple commands can be sent directly to the IED outputs, without confirmation.
Confirmation (status) of the result of the commands is supposed to be achieved by other means,
such as binary inputs and SPGAPC function blocks. The commands can be pulsed or steady with a
settable pulse time.
SPC8GAPC
BLOCK ÔUT1
PSTO ÔUT2
ÔUT3
ÔUT4
ÔUT5
ÔUT6
ÔUT7
ÔUT8
Figure 468: SPC8GAPC function block
14.8.4 Signals
Table 529: SPC8GAPC Input signals

BLOCK BOOLEAN 0 Blocks the function operation
Table 530: SPC8GAPC Output signals

OUT1 BOOLEAN Command output 1
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14.8.5 Settings
Table 531: SPC8GAPC Non group settings (basic)

Enabled
PulseMode1 Pulsed - - Pulsed Setting for pulsed/latched mode for
Latched output 1
tPulse1 0.01 - 6000.00 s 0.01 0.10 Pulse time output 1
Latched output 2
Latched output 3
Latched output 4
Latched output 5
Latched output 6
Latched output 7
Latched output 8
The PSTO input selects the operator place (LOCAL, REMOTE or ALL). One of the eight outputs is
activated based on the command sent from the operator place selected. The settings Latchedx
and tPulsex (where x is the respective output) will determine if the signal will be pulsed (and how
long the pulse is) or latched (steady). BLOCK will block the operation of the function – in case a
command is sent, no output will be activated.
PSTO is the universal operator place selector for all control functions. Although,
PSTO can be configured to use LOCAL or ALL operator places only, REMOTE
operator place is used in SPC8GAPC function.
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14.9 AutomationBits, command function for DNP3.0

AUTOBITS SEMOD158589-1 v3
GUID-C3BB63F5-F0E7-4B00-AF0F-917ECF87B016 v4

AutomationBits, command function
AUTOBITS - -
for DNP3
AutomationBits function for DNP3 (AUTOBITS) is used within PCM600 to get into the
configuration of the commands coming through the DNP3 protocol. The AUTOBITS function plays
the same role as functions GOOSEBINRCV (for IEC 61850) and MULTICMDRCV (for LON).
AUTOBITS
BLOCK ^CMDBIT1
PSTO ^CMDBIT2
^CMDBIT3
^CMDBIT4
^CMDBIT5
^CMDBIT6
^CMDBIT7
^CMDBIT8
^CMDBIT9
^CMDBIT10
^CMDBIT11
^CMDBIT12
^CMDBIT13
^CMDBIT14
^CMDBIT15
^CMDBIT16
^CMDBIT17
^CMDBIT18
^CMDBIT19
^CMDBIT20
^CMDBIT21
^CMDBIT22
^CMDBIT23
^CMDBIT24
^CMDBIT25
^CMDBIT26
^CMDBIT27
^CMDBIT28
^CMDBIT29
^CMDBIT30
^CMDBIT31
^CMDBIT32
Figure 469: AUTOBITS function block
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14.9.4 Signals
Table 532: AUTOBITS Input signals

Table 533: AUTOBITS Output signals

CMDBIT1 BOOLEAN Command out bit 1
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14.9.5 Settings
Table 534: AUTOBITS Non group settings (basic)

Enabled
Table 535: DNPGEN Non group settings (basic)

Enabled
Table 536: CHSERRS485 Non group settings (basic)

BaudRate 300 Bd - - 9600 Bd Baud-rate for serial port
600 Bd
1200 Bd
2400 Bd
4800 Bd
9600 Bd
19200 Bd
38400 Bd
57600 Bd
115200 Bd
Table 537: CHSERRS485 Non group settings (advanced)

DLinkConfirm Never - - Never Data-link confirm
Sometimes
Always
tDLinkTimeout 0.000 - 60.000 s 0.001 2.000 Data-link confirm timeout in s
DLinkRetries 0 - 255 - 1 3 Data-link maximum retries
tRxToTxMinDel 0.000 - 60.000 s 0.001 0.000 Rx to Tx minimum delay in s
ApLayMaxRxSize 20 - 2048 - 1 2048 Application layer maximum Rx fragment
size
ApLayMaxTxSize 20 - 2048 - 1 2048 Application layer maximum Tx fragment
size
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StopBits 1-2 - 1 1 Stop bits
Parity No - - Even Parity
Even
Odd
tRTSWarmUp 0.000 - 60.000 s 0.001 0.000 RTS warm-up in s
tRTSWarmDown 0.000 - 60.000 s 0.001 0.000 RTS warm-down in s
tBackOffDelay 0.000 - 60.000 s 0.001 0.050 RS485 back-off delay in s
tMaxRndDelBkOf 0.000 - 60.000 s 0.001 0.100 RS485 maximum back-off random delay in
s
Table 538: CH1TCP Non group settings (basic)

Operation Disabled - - Disabled Operation mode
TCP/IP
UDP-Only
TCPIPLisPort 1 - 65535 - 1 20000 TCP/IP listen port
UDPPortAccData 1 - 65535 - 1 20000 UDP port to accept UDP datagrams from
master
UDPPortInitNUL 1 - 65535 - 1 20000 UDP portfor initial NULL response
UDPPortCliMast 0 - 65535 - 1 0 UDP port to remote client/master
Table 539: CH1TCP Non group settings (advanced)

size
size

TCP/IP
UDP-Only
master
UDPPortInitNUL 1 - 65535 - 1 20000 UDP port for initial NULL response
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size
size

TCP/IP
UDP-Only
master

size
size

TCP/IP
UDP-Only
master

size
size
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Table 546: MSTSER Non group settings (basic)

Enabled
ChToAssociate RS485 - - RS485 Channel to associate to
Optical
SlaveAddress 0 - 65519 - 1 1 Slave address
MasterAddres 0 - 65519 - 1 1 Master address
Obj1DefVar 1:BISingleBit - - 1:BISingleBit Object 1, default variation
2:BIWithStatus
Obj2DefVar 1:BIChWithoutTim - - 3:BIChWithRelTi Object 2, default variation
e me
2:BIChWithTime
3:BIChWithRelTim
e
Obj3DefVar 1:DIWithoutFlag - - 1:DIWithoutFlag Object 3, default variation
2:DIWithFlag
Obj4DefVar 1:DIChWithoutTim - - 3:DIChWithRelTi Object 4, default variation
e me
2:DIChWithTime
3:DIChWithRelTim
e
Obj10DefVar 1:BO - - 2:BOStatus Object 10, default variation
2:BOStatus
Obj20DefVar 1:BinCnt32 - - 5:BinCnt32WoutF Object 20, default variation
2:BinCnt16
5:BinCnt32WoutF
6:BinCnt16WoutF
Obj22DefVar 1:BinCnt32EvWout - - 1:BinCnt32EvWou Object 22, default variation
T tT
2:BinCnt16EvWou
tT
5:BinCnt32EvWith
T
6:BinCnt16EvWith
T
Obj30DefVar 1:AI32Int - - 3:AI32IntWithout Object 30, default variation
2:AI16Int F
3:AI32IntWithoutF
4:AI16IntWithoutF
5:AI32FltWithF
6:AI64FltWithF
Obj32DefVar 1:AI32IntEvWoutF - - 1:AI32IntEvWoutF Object 32, default variation
2:AI16IntEvWoutF
3:AI32IntEvWithFT
4:AI16IntEvWithFT
5:AI32FltEvWithF
6:AI64FltEvWithF
7:AI32FltEvWithFT
8:AI64FltEvWithF
T
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Table 547: MSTSER Non group settings (advanced)

ValMasterAddr No - - Yes Validate source (master) address
Yes
AddrQueryEnbl No - - Yes Address query enable
Yes
tApplConfTout 0.00 - 300.00 s 0.01 10.00 Application layer confim timeout
ApplMultFrgRes No - - Yes Enable application for multiple fragment
Yes response
ConfMultFrag No - - Yes Confirm each multiple fragment
Yes
UREnable No - - Yes Unsolicited response enabled
Yes
UREvClassMask Disabled - - Disabled Unsolicited response, event class mask
Class 1
Class 2
Class 1 and 2
Class 3
Class 1 and 3
Class 2 and 3
Class 1, 2 and 3
UROfflineRetry 0 - 10 - 1 5 Unsolicited response retries before off-line
retry mode
tVRRetryDelay 0.00 - 60.00 s 0.01 5.00 Unsolicited response retry delay in s
tVROfflRtryDel 0.00 - 60.00 s 0.01 30.00 Unsolicited response off-line retry delay in
s
UREvCntThold1 1 - 100 - 1 5 Unsolicited response class 1 event count
report treshold
tVREvBufTout1 0.00 - 60.00 s 0.01 5.00 Unsolicited response class 1 event buffer
timeout
report treshold
timeout
report treshold
timeout
DelOldBufFull No - - No Delete oldest event when buffer is full
Yes
ExtTimeFormat LocalTime - - UTC External time format
UTC
DNPToSetTime No - - Yes Allow DNP to set time in IED
Yes
tSynchTimeout 30 - 3600 s 1 1800 Time synch timeout before error status is
generated
TSyncReqAfTout No - - No Time synchronization request after
Yes timeout
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Averag3TimeReq No - - No Use average of 3 time requests
Yes
PairedPoint No - - Yes Enable paired point
Yes
tSelectTimeout 1.0 - 60.0 s 0.1 30.0 Select timeout
Table 548: MST1TCP Non group settings (basic)

Enabled
Yes
MasterIP-Addr 0 - 18 IP 1 0.0.0.0 Master IP-address
Address
MasterIPNetMsk 0 - 18 IP 1 255.255.255.255 Master IP net mask
Address
2:BIWithStatus
e me
2:BIChWithTime
3:BIChWithRelTim
e
2:DIWithFlag
e me
2:DIChWithTime
3:DIChWithRelTim
e
2:BOStatus
2:BinCnt16
5:BinCnt32WoutF
6:BinCnt16WoutF
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T tT
2:BinCnt16EvWou
tT
5:BinCnt32EvWith
T
6:BinCnt16EvWith
T
2:AI16Int F
3:AI32IntWithoutF
4:AI16IntWithoutF
5:AI32FltWithF
6:AI64FltWithF
2:AI16IntEvWoutF
3:AI32IntEvWithFT
4:AI16IntEvWithFT
5:AI32FltEvWithF
6:AI64FltEvWithF
7:AI32FltEvWithFT
8:AI64FltEvWithF
T
Table 549: MST1TCP Non group settings (advanced)

Yes
Yes response
Yes
Yes
Class 1
Class 2
Class 1 and 2
Class 3
Class 1 and 3
Class 2 and 3
Class 1, 2 and 3
retry mode
s
report treshold
timeout
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report treshold
timeout
report treshold
timeout
Yes
UTC
DNPToSetTime No - - No Allow DNP to set time in IED
Yes
generated
Yes timeout
Yes
Yes
tBrokenConTout 0 - 3600 s 1 0 Broken connection timeout
tKeepAliveT 0 - 3600 s 1 10 Keep-Alive timer

Enabled
Yes
Address
Address
2:BIWithStatus
e me
2:BIChWithTime
3:BIChWithRelTim
e
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2:DIWithFlag
e me
2:DIChWithTime
3:DIChWithRelTim
e
2:BOStatus
2:BinCnt16
5:BinCnt32WoutF
6:BinCnt16WoutF
T tT
2:BinCnt16EvWou
tT
5:BinCnt32EvWith
T
6:BinCnt16EvWith
T
2:AI16Int F
3:AI32IntWithoutF
4:AI16IntWithoutF
5:AI32FltWithF
6:AI64FltWithF
2:AI16IntEvWoutF
3:AI32IntEvWithFT
4:AI16IntEvWithFT
5:AI32FltEvWithF
6:AI64FltEvWithF
7:AI32FltEvWithFT
8:AI64FltEvWithF
T

Yes
Yes response
Yes
Yes
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Class 1
Class 2
Class 1 and 2
Class 3
Class 1 and 3
Class 2 and 3
Class 1, 2 and 3
retry mode
s
report treshold
timeout
report treshold
timeout
report treshold
timeout
Yes
UTC
Yes
generated
Yes timeout
Yes
Yes
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Enabled
Yes
Address
Address
2:BIWithStatus
e me
2:BIChWithTime
3:BIChWithRelTim
e
2:DIWithFlag
e me
2:DIChWithTime
3:DIChWithRelTim
e
2:BOStatus
2:BinCnt16
5:BinCnt32WoutF
6:BinCnt16WoutF
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T tT
2:BinCnt16EvWou
tT
5:BinCnt32EvWith
T
6:BinCnt16EvWith
T
2:AI16Int F
3:AI32IntWithoutF
4:AI16IntWithoutF
5:AI32FltWithF
6:AI64FltWithF
2:AI16IntEvWoutF
3:AI32IntEvWithFT
4:AI16IntEvWithFT
5:AI32FltEvWithF
6:AI64FltEvWithF
7:AI32FltEvWithFT
8:AI64FltEvWithF
T

Yes
Yes response
Yes
Yes
Class 1
Class 2
Class 1 and 2
Class 3
Class 1 and 3
Class 2 and 3
Class 1, 2 and 3
retry mode
s
report treshold
timeout
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report treshold
timeout
report treshold
timeout
Yes
UTC
Yes
generated
Yes timeout
Yes
Yes

Enabled
Yes
Address
Address
2:BIWithStatus
e me
2:BIChWithTime
3:BIChWithRelTim
e
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2:DIWithFlag
e me
2:DIChWithTime
3:DIChWithRelTim
e
2:BOStatus
2:BinCnt16
5:BinCnt32WoutF
6:BinCnt16WoutF
T tT
2:BinCnt16EvWou
tT
5:BinCnt32EvWith
T
6:BinCnt16EvWith
T
2:AI16Int F
3:AI32IntWithoutF
4:AI16IntWithoutF
5:AI32FltWithF
6:AI64FltWithF
2:AI16IntEvWoutF
3:AI32IntEvWithFT
4:AI16IntEvWithFT
5:AI32FltEvWithF
6:AI64FltEvWithF
7:AI32FltEvWithFT
8:AI64FltEvWithF
T

Yes
Yes response
Yes
Yes
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Class 1
Class 2
Class 1 and 2
Class 3
Class 1 and 3
Class 2 and 3
Class 1, 2 and 3
retry mode
s
report treshold
timeout
report treshold
timeout
report treshold
timeout
Yes
UTC
Yes
generated
Yes timeout
Yes
Yes
AutomationBits function (AUTOBITS) has 32 individual outputs which each can be mapped as a
Binary Output point in DNP3. The output is operated by a "Object 12" in DNP3. This object contains
parameters for control-code, count, on-time and off-time. To operate an AUTOBITS output point,
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send a control-code of latch-On, latch-Off, pulse-On, pulse-Off, Trip or Close. The remaining
parameters will be regarded were appropriate. ex: pulse-On, on-time=100, off-time=300, count=5
would give 5 positive 100 ms pulses, 300 ms apart.
There is a BLOCK input signal, which will disable the operation of the function, in the same way the
setting Operation: Enabled/Disabled does. That means that, upon activation of the BLOCK input,
all 32 CMDBITxx outputs will be set to 0. The BLOCK acts like an overriding, the function still
receives data from the DNP3 master. Upon deactivation of BLOCK, all the 32 CMDBITxx outputs
will be set by the DNP3 master again, momentarily. For AUTOBITS , the PSTO input determines the
operator place. The command can be written to the block while in “Remote”. If PSTO is in “Local”
then no change is applied to the outputs.
14.10 Single command, 16 signals SINGLECMD SEMOD119849-1 v2
GUID-2217CCC2-5581-407F-A4BC-266CD6808984 v1

Single command, 16 signals SINGLECMD - -
The IEDs can receive commands either from a substation automation system or from the local
HMI. The command function block has outputs that can be used, for example, to control high
voltage apparatuses or for other user defined functionality.
SINGLECMD
BLOCK ÔUT1
ÔUT2
ÔUT3
ÔUT4
ÔUT5
ÔUT6
ÔUT7
ÔUT8
ÔUT9
ÔUT10
ÔUT11
ÔUT12
ÔUT13
ÔUT14
ÔUT15
ÔUT16
Figure 470: SINGLECMD function block
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Control
14.10.4 Signals
Table 556: SINGLECMD Input signals

BLOCK BOOLEAN 0 Block single command function
Table 557: SINGLECMD Output signals

OUT1 BOOLEAN Single command output 1
14.10.5 Settings
Table 558: SINGLECMD Non group settings (basic)

Steady
Pulsed
Single command, 16 signals (SINGLECMD) function has 16 binary output signals. The outputs can
be individually controlled from a substation automation system or from the local HMI. Each output
signal can be given a name with a maximum of 13 characters in PCM600.
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Control
The output signals can be of the types Disabled, Steady, or Pulse. This configuration setting is
done via the local HMI or PCM600 and is common for the whole function block. The length of the
output pulses are 100 ms. In steady mode, SINGLECMD function has a memory to remember the
output values at power interruption of the IED. Also a BLOCK input is available used to block the
updating of the outputs.
The output signals, OUT1 to OUT16, are available for configuration to built-in functions or via the
configuration logic circuits to the binary outputs of the IED.
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Technical manual
Section 15 Scheme communication
15.1 Scheme communication logic for distance or overcurrent

protection ZCPSCH(85) IP15749-1 v3
M14854-1 v4

Scheme communication logic for ZCPSCH - 85
distance or overcurrent protection
To achieve instantaneous fault clearance for all line faults, scheme communication logic is
provided. All types of communication schemes for permissive underreaching, permissive
overreaching, blocking, delta based blocking, unblocking and intertrip are available.
The built-in communication module (LDCM) can be used for scheme communication signaling
when included.
ZCPSCH
I3P* TRIP
V3P* CS
BLOCK CHSTOP
BLKTR CRL
BLKCS LCG
CS_STOP
PLTR_CRD
CSOR
CSUR
CR
CR_GUARD
CBOPEN
ANSI09000004.vsd
Figure 471: ZCPSCH (85) function block
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Technical manual
15.1.4 Signals
Table 559: ZCPSCH (85) Input signals

SIGNAL
SIGNAL
BLKTR BOOLEAN 0 Block pilot (communication assisted) trip
BLKCS BOOLEAN 0 Block pilot channel start
CS_STOP BOOLEAN 0 Block of channel start (CS) due to reverse fault detection
PLTR_CRD BOOLEAN 0 Signal to be used for coordinating local pilot tripping with the
channel receive (CR) signal
CSOR BOOLEAN 0 Signal to be used for channel start with overreaching pilot
schemes
CSUR BOOLEAN 0 Signal to be used for channel start with underreaching pilot
schemes
CR BOOLEAN 0 Channel receive input signal from communications apparatus/
module for pilot communication scheme logic
CR_GUARD BOOLEAN 0 Carrier channel guard input signal
CBOPEN BOOLEAN 0 Indicates that the breaker is open
Table 560: ZCPSCH (85) Output signals

CS BOOLEAN Pilot channel start signal
CHSTOP BOOLEAN Stops the blocking signal to remote end
CRL BOOLEAN Channel receive signal output from communication scheme logic
LCG BOOLEAN Loss of channel guard signal output from communication scheme
logic
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15.1.5 Settings
Table 561: ZCPSCH (85) Group settings (basic)

Enabled
SchemeType Intertrip - - Permissive UR Scheme type
Permissive UR
Permissive OR
Blocking
DeltaBlocking
tCoord 0.000 - 60.000 s 0.001 0.035 Communication scheme channel
coordination time
tSendMin 0.000 - 60.000 s 0.001 0.100 Minimum duration of a carrier send signal
(carrier continuation)
Table 562: ZCPSCH (85) Group settings (advanced)

Unblock Disabled - - Disabled Operation mode of unblocking logic
NoRestart
Restart
DeltaI 0 - 200 %IB 1 10 Current change level in % of IBase for fault
inception detection
DeltaV 0 - 100 %VB 1 5 Voltage change level in % of VB for fault
inception detection
Delta3I0 0 - 200 %IB 1 10 Zero seq current change level in % of IBase
Delta3V0 0 - 100 %VB 1 5 Zero seq voltage change level in % of
UBase
tSecurity 0.000 - 60.000 s 0.001 0.035 Security timer for loss of carrier guard
detection
Table 563: ZCPSCH (85) Non group settings (advanced)

GlobalBaseSelector 1 - 12 - 1 1 Selection of one of the Global Base Value
groups

M13893-3 v4
Depending on whether a reverse or forward directed impedance zone is used to issue the send
signal, the communication schemes are divided into Blocking and Permissive schemes,
respectively.
A permissive scheme is inherently faster and has better security against false tripping than a
blocking scheme. On the other hand, a permissive scheme depends on a received signal for a fast
trip, so its dependability is lower than that of a blocking scheme.
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15.1.6.1 Blocking scheme M13893-6 v6
The principle of operation for a blocking scheme is that an overreaching zone is allowed to trip
instantaneously after the settable co-ordination time tCoord has elapsed, when no signal is
received from the remote IED.
The received signal, which shall be connected to CR, is used to not release the zone to be
accelerated to clear the fault instantaneously (after time tCoord). The forward overreaching zone
to be accelerated is connected to the input PLTR_CRD, see figure 472.
In case of external faults, the blocking signal (CR) must be received before the settable timer
tCoord elapses, to prevent a false trip, see figure 472.
The function can be totally blocked by activating the input BLOCK, block of trip by activating the
input BLKTR, Block of signal send by activating the input BLKCS.
PLTR-CRD
0-tCoord TRIP
CR AND 0
en05000512_ansi.vsd
Figure 472: Basic logic for trip signal in blocking scheme

Channels for communication in each direction must be available.
15.1.6.2 Delta blocking scheme GUID-22E3BFAC-82E9-4434-B761-AD63BCFC68D5 v2
In order to avoid delays due to carrier coordination times, the initiation of sending of blocking
signal to remote end is done by a fault inception detection element based on delta quantities of
currents and voltages. The delta based fault detection is very fast and if the channel is fast there is
no need for delaying the operation of the remote distance element. The received blocking signal
arrives well before the distance element has picked up. If the fault is in forward direction the
sending is immediately stopped by a forward directed distance, directional current or directional
ground fault element.
The fault inception detection element detects instantaneous changes in any phase currents or
zero sequence current in combination with a change in the corresponding phase voltage or zero
sequence voltage. The criterion for the fault inception detection is if the change of any phase
voltage and current exceeds the settings DeltaV and DeltaI respectively, or if the change of zero
sequence voltage and zero sequence current exceeds the settings Delta3V0,Delta3I0 respectively.
The schemeType is selected as DeltaBlocking.
If the fault inception function has detected a system fault, a block signal CS will be issued and sent
to remote end in order to block the overreaching zones. Different criteria has to be fulfilled for
sending the CS signal:
1. The breaker has to be in closed condition, that is, the input signal CBOPEN is deactivated.
2. A fault inception should have been detected while the carrier send signal is not blocked, that
is, the input signal BLKCS is not activated.
If it is later detected that it was an internal fault that made the function issue the CS signal, the
function will issue a CHSTOP signal to unblock the remote end.
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The received signal, which is connected to the CR input, is not used to accelerate the release of the
overreaching zone to clear the fault instantaneously. The overreaching zone to be accelerated is
connected to the input PLTR_CRD, see Figure 473.
In case of external faults, the blocking signal (CR) must be received before the settable timer
tCoord elapses, to prevent a false trip, see Figure 473.
The function can be totally blocked by activating the input BLOCK, block of trip by activating the
input BLKTR, block of carrier send by activating the input BLKCS.
PLTR-CRD
0-tCoord TRIP
CR AND 0
en05000512_ansi.vsd
Figure 473: Basic logic for trip signal in delta blocking scheme
Channels for communication in each direction must be available.
15.1.6.3 Permissive underreaching scheme M13893-13 v5
In a permissive underreaching scheme, a forward directed underreach measuring element

(normally zone1) sends a permissive signal CS to the remote end if a fault is detected.in forward
direction. The received signal CR is used to allow an overreaching zone to trip after the tCoord
timer has elapsed. The tCoord in permissive underreaching schemes is normally set to zero.
The logic for trip signal in permissive scheme is shown in figure 474.
PLTR-CRD
0-tCoord TRIP
CR AND 0
en05000513_ansi.vsd
Figure 474: Logic for trip signal in permissive scheme

The permissive underreaching scheme has the same blocking possibilities as mentioned for
blocking scheme.
15.1.6.4 Permissive overreaching scheme M13893-22 v5
In a permissive overreaching scheme, a forward directed overreach measuring element (normally

zone2) sends a permissive signal CS to the remote end if a fault is detected in forward direction.
The received signal CR is used to allow an overreaching zone to trip after the settable tCoord timer
has elapsed. The tCoord in permissive overreaching schemes is normally set to zero.
The logic for trip signal is the same as for permissive underreaching, as in figure 474.
The permissive overreaching scheme has the same blocking possibilities as mentioned for
blocking scheme.
15.1.6.5 Unblocking scheme M13893-31 v7
In unblocking scheme, the lower dependability in permissive scheme is overcome by using the loss
of guard signal from the communication equipment to locally create a receive signal. It is common
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Technical manual
or suitable to use the function when older, less reliable, power-line carrier (PLC) communication is
used.
The received signal created by the unblocking function is reset 150 ms after the security timer has
elapsed. When that occurs an output signal LCG is activated for signalling purpose. The
unblocking function is reset 200 ms after that the guard signal is present again.
CR
CRL
0-tSecurity OR
NOT
0
CR_GUARD
200 ms 150 ms AND

AND OR 0
0
LCG
en05000746_ansi.vsd
Figure 475: Guard singal logic with unblocking scheme and with setting Unblock = Restart
CR
CRL
OR
CR_GUARD 0-tSecurity
1
0
Figure 476: Guard singal logic with unblocking scheme and with setting Unblock = NoRestart
The unblocking function can be set in three operation modes (setting Unblock):
Disabled The unblocking function is out of operation

No restart Communication failure shorter than tSecurity will be ignored
If CR_GUARD disappears a CRL signal will be transferred to the trip logic
There will not be any information in case of communication failure (LCG)
Restart Communication failure shorter than tSecurity will be ignored
It sends a defined (150 ms) CRL after the disappearance of the CR_GUARD
signal
The function will activate LCG output in case of communication failure
If the communication failure comes and goes (<200 ms) there will not be
recurrent signalling
15.1.6.6 Intertrip scheme M13893-36 v4
In the direct intertrip scheme, the send signal CS is sent from an underreaching zone that is
tripping the line.
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The received signal CR is directly transferred to a TRIP for tripping without local criteria. The signal
is further processed in the tripping logic.
In case of single-pole tripping in multi-phase systems, a phase selection is performed.
15.1.6.7 Simplified logic diagram M13893-40 v4
The simplified logic diagram for the complete logic is shown in figure 477.
Unblock =
Off
CR
Unblock =
OR CRL
NoRestart AND
CRL
Unblock =
Restart
CR_GUARD 0-tSecurity AND
NOT
0
LCG
200ms 150ms AND
OR AND
0 0
SchemeType =
Intertrip
CSUR
tSendMin AND
OR
BLOCK AND
CS_STOP OR
CRL
Schemetype =
Permissive UR AND CS
OR
AND 0-tCoord 0 TRIP

PLTR_CRD OR 25ms
0
Schemetype =
Permissive OR
CSOR OR AND
AND
tSendMin
OR
AND
SchemeType =
Blocking
BLKCS
AND
en05000515_ansi.vsd
Figure 477: Scheme communication logic for distance or overcurrent protection, simplified
logic diagram
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M16038-1 v11
Table 564: ZCPSCH (85) technical data

Scheme type Disabled -
Intertrip
Permissive UR
Permissive OR
Blocking
DeltaBlocking
Trip voltage, Delta V (0–100)% of VBase ±5.0% of ΔV
Trip current, Delta I (0–200)% of IBase ±5.0% of ΔI
Trip zero sequence voltage, Delta (0–100)% of VBase ±10.0% of Δ3V0
3V0
Trip zero sequence current, Delta (0–200)% of IBase ±10.0% of Δ3I0
3I0
Co-ordination time for blocking (0.000-60.000) s ±0.5% ±10 ms
communication scheme
Minimum duration of a carrier (0.000-60.000) s ±0.5% ±10 ms
send signal
Security timer for loss of guard (0.000-60.000) s ±0.5% ±10 ms
signal detection
Operation mode of unblocking Disabled -
logic NoRestart
Restart
15.2 Phase segregated scheme communication logic for

distance protection ZC1PPSCH (85) SEMOD141690-1 v2
SEMOD141699-2 v2

Phase segregated Scheme ZC1PPSCH - 85
communication logic for distance
protection
Communication between line ends is used to achieve fault clearance for all faults on a power line.
All possible types of communication schemes for example, permissive underreach, permissive
overreach and blocking schemes are available. To manage problems with simultaneous faults on
parallel power lines phase segregated communication is needed. This will then replace the
standard Scheme communication logic for distance or Overcurrent protection (ZCPSCH, 85) on
important lines where three communication channels (in each subsystem) are available for the
distance protection communication.
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The main purpose of the Phase segregated scheme communication logic for distance protection
(ZC1PPSCH, 85) function is to supplement the distance protection function such that:
• fast clearance of faults is also achieved at the line end for which the faults are on the part of
the line not covered by its underreaching zone.
• correct phase selection can be maintained to support single-pole tripping for faults occurring
anywhere on the entire length of a double circuit line.
To accomplish this, three separate communication channels, that is, one per phase, each capable
of transmitting a signal in each direction is required.
ZC1PPSCH (85) can be completed with the current reversal and WEI logic for phase segregated
communication, when found necessary in Blocking and Permissive overreaching schemes.
ZC1PPSCH (85)
BLOCK TRIP
BLKTR TR_A
BLKTRL1 TR_B
BLKTRL2 TR_C
BLKTRL3 CS_A
CACCL1 CS_B
CACCL2 CS_C
CACCL3 CSMPH
CSURL1 CRL_A
CSURL2 CRL_B
CSURL3 CRL_C
CSORL1
CSORL2
CSORL3
CSBLKL1
CSBLKL2
CSBLKL3
BLKCSL1
BLKCSL2
BLKCSL3
CRL1
CRL2
CRL3
CRMPH
Figure 478: ZC1PPSCH (85) function block
15.2.4 Signals
Table 565: ZC1PPSCH (85) Input signals

BLKTR BOOLEAN 0 Common signal for block of trip output from communication logic
in all phases
BLKTRL1 BOOLEAN 0 Signal for block of trip output from communication logic in Phase
L1
L2
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Technical manual

L3
CACCL1 BOOLEAN 0 Accelerated Distance protection zone start in Phase L1
CACCL2 BOOLEAN 0 Accelerated Distance protection zone signal in Phase L2
CACCL3 BOOLEAN 0 Accelerated Distance protection zone signal in Phase L3
CSURL1 BOOLEAN 0 Underreaching distance protection zone signal in Phase L1
CSORL1 BOOLEAN 0 Overreaching distance protection zone signal in Phase L1
CSBLKL1 BOOLEAN 0 Reverse directed distance protection zone signal in Phase L1
BLKCSL1 BOOLEAN 0 Block of carrier send in POR and Blocking schemes in Phase L1
CRL1 BOOLEAN 0 Carrier signal received in Phase A
CRL2 BOOLEAN 0 Carrier signal received in Phase B
CRL3 BOOLEAN 0 Carrier signal received in Phase C
CRMPH BOOLEAN 0 Carrier Signal received for multiphase fault
Table 566: ZC1PPSCH (85) Output signals

TRIP BOOLEAN Common trip output in any of the phase
TR_A BOOLEAN Trip output in Phase A
TR_B BOOLEAN Trip output in Phase B
TR_C BOOLEAN Trip output in Phase C
CS_A BOOLEAN Carrier Send in phase A
CS_B BOOLEAN Carrier Send in phase B
CS_C BOOLEAN Carrier Send in phase C
CSMPH BOOLEAN carrier Send for multi phase fault
CRL_A BOOLEAN Carrier signal received in Phase A
CRL_B BOOLEAN Carrier signal received in Phase B
CRL_C BOOLEAN Carrier signal received in Phase C
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Technical manual
15.2.5 Settings
Table 567: ZC1PPSCH (85) Group settings (basic)

Enabled
Scheme Type Disabled - - Permissive UR Scheme type
Intertrip
Permissive UR
Permissive OR
Blocking
tCoord 0.000 - 60.000 s 0.001 0.000 Trip coordinate time
tSendMin 0.000 - 60.000 s 0.001 0.100 Minimum duration of Carrier Send signal

SEMOD141705-4 v2
Depending on whether a reverse or forward directed impedance zone is used to issue the send
signal, the communication schemes are divided into Blocking and Permissive schemes,
respectively.
A permissive scheme is inherently faster and has better security against false tripping than a
blocking scheme. On the other hand, a permissive scheme depends on a received signal for a fast
trip, so its dependability is lower than that of a blocking scheme.
The Phase segregated scheme communication logic for distance protection (ZC1PPSCH ,85)
function is a logical function built-up from logical elements. It is a supplementary function to the
distance protection, requiring for its operation inputs from the distance protection and the
communication equipment.
The type of communication-aided scheme to be used can be selected by way of the settings.
The ability to select which distance protection zone is assigned to which input of ZC1PPSCH (85)
makes this logic able to support practically any scheme communication requirements regardless
of their basic operating principle. The outputs to initiate tripping and sending of the
teleprotection signal are given in accordance with the type of communication-aided scheme
selected and the zone(s) and phase(s) of the distance protection which have operated.
When power line carrier communication channels are used for permissive schemes
communication, unblocking logic which uses the loss of guard signal as a receive criteria is
provided. This logic compensates for the lack of dependability due to the transmission of the
command signal over the faulted line.
15.2.6.1 Blocking scheme SEMOD141705-12 v2
The principle of operation for a blocking scheme is that an overreaching zone is allowed to trip
instantaneously after the settable co-ordination time tCoord has elapsed, when no signal is
received from the remote IED. The received signal (sent by a reverse looking element in the remote
IED), which shall be connected to CRLx, is used to not release the zone to be accelerated to clear
the fault instantaneously (after time tCoord). The overreaching zone to be accelerated is
connected to the input CACCLx, see figure 479. In case of external faults, the blocking signal
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Technical manual
(CRLx) must be received before the settable timer tCoord elapses, to prevent an unneccesary trip,
see figure 479.
ZC1PPSCH (85) can be totally blocked by activating the input BLOCK, block of trip is achieved by
activating the input BLKTRLx, Block of carrier send is done by activating the input BLKCSLx.
CACCLx
0 - tCoord 0 TRLx
CRLx AND
0 25 ms
Figure 479: Basic logic for trip carrier in one phase of a blocking scheme
15.2.6.2 Permissive underreach scheme SEMOD141705-18 v1
In a permissive underreach scheme, a forward directed underreach measuring element (normally

zone1) sends a permissive signal CSLx to the remote end if a fault is detected in forward direction.
The received signal CRLx is used to allow an overreaching zone (connected to CACCLx) to trip after
the tCoord timer has elapsed. The tCoord is in permissive underreach schemes normally set to
zero. The logic for trip carrier in permissive scheme is shown in figure 480. Three channels for
communication in each direction must be available.
CACCLx
0-tCoord 0 TRLx
CRLx AND
0 25 ms
Figure 480: Basic logic for trip carrier in one phase of a permissive underreach scheme
15.2.6.3 Permissive overreach scheme SEMOD141705-26 v1
In a permissive overreach scheme, a forward directed overreach measuring element (normally

zone2) sends a permissive signal CSLx to the remote end if a fault is detected in forward direction.
The received signal CRLx is used to allow an overreaching zone to trip after the settable tCoord
timer has elapsed. The tCoord is in permissive overreach schemes normally set to zero. The logic
for trip carrier is the same as for permissive underreach, see figure 479.
The permissive overreach scheme has the same blocking possibilities as mentioned for blocking
scheme above. The blocking inputs are activated from the current reversal logic when this function
is included.
Three channels for communication in each direction must be available.
15.2.6.4 Unblocking scheme SEMOD141705-31 v2
In an unblocking scheme, the lower dependability in permissive scheme is overcome by using the
loss of guard signal from the communication equipment to locally create a carrier receive signal. It
is common or suitable to use the function when older, less reliable, power-line carrier (PLC)
communication is used. As phase segregated communication schemes uses phases individually
and the PLC is typically connected single-phase or phase-to-phase it is not possible to evaluate
which of the phases to release and the unblocking scheme has thus not been supported.
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Technical manual
15.2.6.5 Intertrip scheme SEMOD141705-34 v1
In the direct intertrip scheme, the carrier send signal CS is sent from an underreaching zone that is
tripping the line.
The received signal per phase is directly transferred to the trip function block for tripping without
local criteria. The signal is not further processed in the phase segregated communication logic. In
case of single-pole tripping the phase selection and logic for tripping the three phases is
performed in the trip function block.
15.2.6.6 Simplified logic diagram SEMOD141705-38 v2
The simplified logic diagram for one phase is shown in figure 481.
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Technical manual
SchemeType =
Intertrip
CSURLx
tSendMin AND
OR
BLOCK
AND
CSBLKLx OR
CRLx
Scheme Type =
Permissive UR AND CSLx
OR
AND
OR
0-tCoord TRLx
CACCLx 25
Scheme Type =
Permissive OR
CSORLx OR AND
AND
tSendMin
OR
AND
Scheme Type =
Blocking
BLKCSx
AND
CSL1
CSL2 AND
CSL2
OR CSMPH
CSL3 AND
CSL3
CSL1 AND
CSL1
CSL2 GENERAL
OR
CSL3
Figure 481: Simplified logic diagram for one phase
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Technical manual

SEMOD166936-2 v7
Table 568: ZC1PPSCH (85) technical data

Scheme type Intertrip -
Permissive UR
Permissive OR
Blocking
Co-ordination time for blocking (0.000-60.000) s ±0.2% or ±15 ms whichever is greater
communication scheme
Minimum duration of a carrier (0.000-60.000) s ±0.2% or ±15 ms whichever is greater
send signal
15.3 Current reversal and Weak-end infeed logic for distance

protection 3-phase ZCRWPSCH (85) IP15751-1 v4
M15073-1 v5

Current reversal and weak-end ZCRWPSCH - 85
infeed logic for distance protection
3-phase
The ZCRWPSCH function provides the current reversal and weak end infeed logic functions that
supplement the standard scheme communication logic. It is not suitable for standalone use as it
requires inputs from the distance protection functions and the scheme communications function
included within the terminal.
On detection of a current reversal, the current reversal logic provides an output to block the
sending of the teleprotection signal to the remote end, and to block the permissive tripping at the
local end. This blocking condition is maintained long enough to ensure that no unwanted
operation will occur as a result of the current reversal.
On verification of a weak end infeed condition, the weak end infeed logic provides an output for
sending the received teleprotection signal back to the remote sending end and other output(s) for
local tripping. For terminals equipped for single- and two-pole tripping, outputs for the faulted
phase(s) are provided. Undervoltage detectors are used to detect the faulted phase(s).
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Technical manual
ZCRWPSCH (85)
V3P* IRVL
BLOCK TRWEI
IFWD TRWEI_A
IREV TRWEI_B
WEIBLK1 TRWEI_C
WEIBLK2 ECHO
LOVBZ
CBOPEN
CRL
Figure 482: ZCRWPSCH (85) function block
15.3.4 Signals
Table 569: ZCRWPSCH (85) Input signals

SIGNAL
IFWD BOOLEAN 0 A signal that indicates a forward fault has been detected and will
block tripping if there was a pre-existing reverse fault condition
(IREV)
IREV BOOLEAN 0 A signal that indicates a reverse fault has been detected and
activates current reverasl logic
WEIBLK1 BOOLEAN 0 Block of WEI logic
WEIBLK2 BOOLEAN 0 Block of WEI logic due to operation of other protections that
would effect a pilot trip or the detection of reverse faults that will
be tripped by an external device
LOVBZ BOOLEAN 0 Block of trip from WEI logic through the loss of voltage (fuse-
failure) function
CBOPEN BOOLEAN 0 Block of trip from WEI logic by an open breaker
CRL BOOLEAN 0 POTT or Unblock carrier receive for WEI logic
Table 570: ZCRWPSCH (85) Output signals

IRVL BOOLEAN Operation of current reversal logic
TRWEI BOOLEAN Trip signal from weak end infeed logic
TRWEI_A BOOLEAN Trip signal from weak end infeed logic in phase A
TRWEI_B BOOLEAN Trip signal from weak end infeed logic in phase B
TRWEI_C BOOLEAN Trip signal from weak end infeed logic in phase C
ECHO BOOLEAN A signal that indicates channel start (CS) by WEI logic
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Technical manual
15.3.5 Settings
Table 571: ZCRWPSCH (85) Group settings (basic)

CurrRev Disabled - - Disabled Operating mode of Current Reversal Logic
Enabled
tPickUpRev 0.000 - 60.000 s 0.001 0.020 Pickup time for current reversal logic
tDelayRev 0.000 - 60.000 s 0.001 0.060 Time Delay to prevent Carrier send and
local trip
WEI Disabled - - Disabled Operating mode of WEI logic
Echo
Echo & Trip
tPickUpWEI 0.000 - 60.000 s 0.001 0.010 Coordination time for the WEI logic
PU27PP 10 - 90 %VB 1 70 Phase to Phase voltage for detection of
fault condition
PU27PN 10 - 90 %VB 1 70 Phase to Neutral voltage for detection of
fault condition
Table 572: ZCRWPSCH (85) Non group settings (basic)

groups
15.3.6.1 Current reversal logic M16679-3 v9
The current reversal logic can be enabled by setting the parameter CurrRev = On. The current
reversal logic uses a reverse zone connected to the input IRV to recognize the fault on the parallel
line in any of the phases.When the reverse zone has been activated (even if only for a short time), it
prevents sending of a communication signal and tripping through the scheme communication
logic after a settable time tPickUpRev. The prevention will last for tPickUpRev + 10 ms + tDelayRev
after the IREV reset. This makes it possible for the receive signal to reset before the carrier-aided
trip signal is activated due to the current reversal by the forward directed zone. The logic diagram
for current reversal is shown in Figure 483.
IREV 0 0 0-tPickUpRev
0-tPickUpRev 10ms 0
IRVL
IFWD AND 0
0-tDelayRev
Figure 483: Simplified logic diagram for current reversal
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Technical manual
By connecting the output signal IRVL to input BLKCS in the ZCPSCH (85) function, the sending of
the signal CS from the overreaching zone connected to CSOR in ZCPSCH will be blocked. By
connecting IRVL to input BLKTR in the ZCPSCH function, the TRIP output from the ZCPSCH (85)
function will be blocked.
The function has an internal 10 ms drop-off timer which will secure that the current reversal logic
will be activated for short input signals even if the pick-up timer is set to zero.
15.3.6.2 Weak-end infeed logic M16679-8 v10
The weak-end infeed logic (WEI) function sends back (echoes) the received signal under the
condition that no fault has been detected on the weak-end by different fault detection elements
(distance protection in forward or reverse direction).
The WEI function returns the received signal, shown in Figure 484, when:
• The setting parameter WEI is set to either Echo or Echo & Trip.
• No active signal present on the input BLOCK.
• The functional input CRL is active for a time longer than the tPickUpWei setting. This input is
usually connected to the CRL output on the scheme communication logic ZCPSCH (85).
• The WEI function is not blocked by the active signal connected to the WEIBLK1 functional
input or to theLOVBZ functional input. The later is usually configured to the VTSZ functional
output of the fuse-failure function.
• No active signal has been present for at least 200 ms on the WEIBLK2 functional input. An OR
combination of all fault detection functions (not undervoltage) as present within the IED is
usually used for this purpose.
• The weak-end infeed logic also echoes the received permissive signal when local breaker
opens, CBOPEN prior to faults appeared at the end of line.
BLOCK
WTSZ
WEIBLK1 OR
ECHO - cont.
CRL 0-tWEI 0 200ms
AND
0 50 ms 0 ECHO
AND
WEIBLKn 0
200ms
en06000324_ansi.vsd
Figure 484: Simplified logic diagram for weak-end infeed logic — Echo
When an echo function is used in both IEDs (should generally be avoided), a spurious signal can be
looped round by the echo logics. To avoid a continuous lock-up of the system, the duration of the
echoed signal is limited to 200 ms.
An undervoltage criteria is used as an additional tripping criteria, when the tripping of the local
breaker is selected, setting WEI = Echo&Trip. With this setting the Echo and Trip are working in
parallel as in logic shown in Figure 485.
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Technical manual
BLOCK
VTSZ
WEIBLK1 OR
tPickUpWEI
CRL AND 50 ms 200 ms
t AND ECHO
OR t t AND
200 ms
WEIBLK2
t
AND
1500 ms
OR
CBOPEN
t
AND
V3P*
VA<VPN<
VB < VPN<
VC < VPN<
VPN< 100 ms
OR
AND t
TRWEI
OR
15 ms
TRWEI_A
V3P*
AND t
VAB <VPP< OR
VBC < VPP<
VCA < VPP<
15 ms
VPP< TRWEI_B
AND t
OR
15 ms
OR TRWEI_C
AND t
WEI = Echo & Trip
ANSI00000551-TIFF V1 EN-US
Figure 485: Simplified logic diagram for weak-end infeed logic — Echo&Trip

M16039-1 v16
Table 573: ZCRWPSCH (85) technical data

Detection pickup phase-to- (10-90)% of VBase ±0.25% of Vn
neutral voltage
Detection pickup phase-to- (10-90)% of VBase ±0.5% of Vn
phase voltage
Trip time for current reversal (0.000-60.000) s ±0.2% or ±15 ms whichever is greater
logic
Delay time for current reversal (0.000-60.000) s ±0.2% or ±15 ms whichever is greater
Coordination time for weak- (0.000-60.000) s ±0.2% or ±15 ms whichever is greater
end infeed logic
891
Technical manual
15.4 Current reversal and weak-end infeed logic for phase

segregated communication ZC1WPSCH (85) SEMOD155635-1 v2
SEMOD156467-2 v2

Current reversal and weak-end ZC1WPSCH - 85
infeed logic for phase segregated
communication
Current reversal and weak-end infeed logic for phase segregated communication (ZC1WPSCH, 85)
function is used to prevent unwanted operations due to current reversal when using permissive
overreach protection schemes in application with parallel lines where the overreach from the two
ends overlaps on the parallel line.
The weak-end infeed logic is used in cases where the apparent power behind the protection can be
too low to activate the distance protection function. When activated, received carrier signal
together with local undervoltage criteria and no reverse zone operation gives an instantaneous
trip. The received signal is also echoed back to accelerate the sending end.
ZC1WPSCH (85)
V3P* TRPWEI
BLOCK TRPWEI_A
BLKZ TRPWEI_B
CBOPEN TRPWEI_C
CRL1 IRVOP
CRL2 IRVOP_A
CRL3 IRVOP_B
IRVL1 IRVOP_C
IRVL2 ECHO
IRVL3 ECHO_A
IRVBLKL1 ECHO_B
IRVBLKL2 ECHO_C
IRVBLKL3
WEIBLK
WEIBLKL1
WEIBLKL2
WEIBLKL3
WEIBLKOP
WEIBLKO1
WEIBLKO2
WEIBLKO3
Figure 486: ZC1WPSCH (85) function block
892
Technical manual
15.4.4 Signals
Table 574: ZC1WPSCH (85) Input signals

V3P GROUP - Voltage
SIGNAL
BLKZ BOOLEAN 0 Block of trip from WEI logic by the fuse-failure function
CRL1 BOOLEAN 0 Carrier receive for WEI logic in Phase L1
IRVL1 BOOLEAN 0 Activation of current reversal logic in Phase L1
IRVL2 BOOLEAN 0 Activation of current reversal logic in Phase L2
IRVL3 BOOLEAN 0 Activation of current reversal logic in phase L3
IRVBLKL1 BOOLEAN 0 Block of current reversal function in Phase L1
WEIBLK BOOLEAN 0 Block of WEI logic
WEIBLKL1 BOOLEAN 0 Block of WEI logic in Phase L1
WEIBLKOP BOOLEAN 0 Block of WEI logic due to operation of other protection
WEIBLKO1 BOOLEAN 0 Block of WEI logic in Phase L1 due to operation of other protection
WEIBLKO2 BOOLEAN 0 Block of WEI logic in Phase L2 due to operation of other
protections
WEIBLKO3 BOOLEAN 0 Block of WEI logic in Phase L3 due to operation of other
protections
Table 575: ZC1WPSCH (85) Output signals

TRPWEI BOOLEAN Trip of WEI logic
TRPWEI_A BOOLEAN Trip of WEI logic in Phase A
TRPWEI_B BOOLEAN Trip of WEI logic in Phase B
TRPWEI_C BOOLEAN Trip of WEI logic in Phase C
IRVOP BOOLEAN Operation of current reversal logic
IRVOP_A BOOLEAN Operation of current reversal logic in Phase A
IRVOP_B BOOLEAN Operation of current reversal logic in Phase B
IRVOP_C BOOLEAN Operation of current reversal logic in Phase C
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Technical manual

ECHO BOOLEAN Carrier Send by WEI logic
ECHO_A BOOLEAN Carrier Send by WEI logic in Phase A
ECHO_B BOOLEAN Carrier Send by WEI logic in Phase B
ECHO_C BOOLEAN Carrier Send by WEI logic in Phase C
15.4.5 Settings
Table 576: ZC1WPSCH (85) Group settings (basic)

OperCurrRev Disabled - - Disabled Operating mode of Current Reversal Logic
Enabled
local trip
OperationWEI Disabled - - Disabled Operating mode of WEI logic
Echo
Echo & Trip
VPGPickup 10 - 90 %VB 1 70 Phase to Ground voltage for detection of
fault condition
PU27PP 10 - 90 %VB 1 70 Phase to Phase voltage for detection of
fault condition
Table 577: ZC1WPSCH (85) Non group settings (basic)

groups
15.4.6.1 Current reversal logic SEMOD156478-5 v3
The current reversal logic can be enabled by setting the parameter OperCurrRev = On. The current
reversal logic uses a reverse zone connected to the input IRVLx to recognize the fault on the
parallel line in any of the phases. When the reverse zone has been activated for a certain settable
time tPickUpRev, it prevents sending communication signal and activation of trip signal for a
predefined time tDelayRev. This makes it possible for the receive signal to reset before the trip
signal is activated due to the current reversal by the forward directed zone. The logic diagram for
current reversal is shown in Figure 487.
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Technical manual
BLOCK
IRVBLKLx
tDelayRev
tPickUpRev 10 ms tPickUpRev IRVOPLx
IRVLx & t
t t t
operCurrRev=On

The prevention of sending carrier send signal CSLx and activating the TRIPLx in the Scheme
communication logic for distance or Overcurrent protection (ZCPSCH ,85) is carried out by
connecting the IRVOPLx signal to input BLOCKLx in ZCPSCH (85) function.
The Current reversal and weak-end infeed logic for phase segregated communication
(ZC1WPSCH ,85) function has an internal 10 ms drop-off timer which secure that the current
reversal logic will be activated for short input signals even if the pickup timer is set to zero.
15.4.6.2 Weak-end infeed logic GUID-CBFC8E60-748A-49F6-AF73-563E7CFC0653 v4
The WEI function sends back (echoes) the received carrier signal under the condition that no fault
has been detected at the weak end by different fault detection elements (distance protection in
forward and reverse direction).
VTSZ
BLOCK OR
ECHOLn - cont.
CRLLn 0-tWEI 0 200ms
AND
0 50ms 0 ECHOLn
AND
WEIBLK1 0
200ms
WEIBLK2 0
200ms
en07000085_ansi.vsd
Figure 488: Simplified logic for weak-end infeed logic — Echo

The WEI function returns the received carrier signal, shown in Figure 488, when:
• No active signal present on the input BLOCK.

• The input CRLx is active. This input is usually connected to the CRLx output on the scheme
communication logic for distance or Overcurrent protection (ZCPSCH,85).
• The WEI function is not blocked by the active signal connected to the WEIBLKLx input or to the
BLKZ input. The latter is usually configured to the STGEN output of the fuse-failure function.
• No active signal has been present for at least 200 ms on the WEIBLKOx input. An OR
combination of all fault detection functions (not undervoltage) as present within the IED is
usually used for this purpose.
• The weak-end infeed logic also echoes the received permissive signal when local breaker
opens, CBOPEN prior to faults appeared at the end of line.
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Technical manual
When an echo function is used in both the IEDs on the protected line (should generally be avoided),
a spurious signal can be looped round by the echo logics. To avoid a continuous lock-up of the
system, the duration of the echoed signal is limited to 200 ms.
An undervoltage criteria is used as an additional tripping criteria when the tripping of the local
breaker is selected. Setting OperationWEI = Echo &Trip together with the WEI function and
ECHOLx, trip signal TRPWEIx has been issued by the echo and trip logic which is described in
Figure 489.
WEI = Echo&Trip
ECHOLn - cont.
CBOPEN
STUL1N
OR TRWEI
STUL2N AND 100ms OR
0
STUL3N TRWEIL1
AND 0
15ms
TRWEIL2
AND 0
15ms
TRWEIL3
AND 0
15ms
en00000551_ansi.vsd
Figure 489: Simplified logic diagram for weak-end infeed logic – Echo & Trip
It is strongly recommended to not connect any start signals from impedance

protection or directional overcurrent protection functions to WEIBLK and
WEIBLKOP inputs in ZC1WPSCH function to block the echo signal, if local
protection functions operate for faults at the weak end.
Start signals can be connected to WEIBLKLx and WEIBLKOx via OR gate to achieve the blocking of
echo signal in case if the faults are detected by local protection functions and thereby, avoiding
the operation from the remote end. By this, 3-pole operation can be accomplished in addition to 1-
pole and 2-pole operations by ZC1WPSCH function. Also, if a 3-pole operation needs to be achieved
by a separate protection function, current reversal and weak-end infeed logic for distance
protection 3-phase ZCRWPSCH function can be used. Figure 490 and Figure 491 shows the
connection of start signals from ZMFCPDIS function to WEIBLKLx and WEIBLKOx in ACT
configuration to block echo signal.
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Technical manual
Technical manual
1MRK 505 344-UUS B
Figure 490: Blocking of echo signal using WEIBLKLx input of ZC1WPSCH

Project Responsible department Technical reference Document kind Doc. designation
Test123234 ABB Ltd. Graphical Application Co... AA1J1Q01A2
Replacing Created by Title Document id.
REL670
Test123234.Substation.Voltage Level.Bay Approved by Rev. Rel. date Lan
1/1
Rev. Modification Rel. date Created ... Based on 0 3/2/2018 en
897
Section 15
898
Section 15
Figure 491: Blocking of echo signal using WEIBLKOx input of ZC1WPSCH

Project Responsible department Technical reference Document kind Doc. designation
Test123234 ABB Ltd. Graphical Application Co... AA1J1Q01A2
Replacing Created by Title Document id.
REL670
Test123234.Substation.Voltage Level.Bay Approved by Rev. Rel. date Lan
1/1
Rev. Modification Rel. date Created ... Based on 0 3/2/2018 en
Technical manual
1MRK 505 344-UUS B

SEMOD166938-2 v6
Table 578: ZC1WPSCH technical data

Detection pickup phase to (10-90)% of VBase ±0.5% of Vn
neutral voltage
Detection pickup phase to (10-90)% of VBase ±0.5% of Vn
phase voltage
Reset ratio <105% at (20-90)% of VBase -
Coordination time for weak- (0.000-60.000) s ±0.2% or ±15 ms whichever is greater
end infeed logic
15.5 Local acceleration logic ZCLCPSCH SEMOD52894-1 v4
M14860-1 v4

Local acceleration logic ZCLCPSCH - -
To achieve fast clearing of faults on the whole line, when no communication channel is available,
local acceleration logic ZCLCPSCH can be used. This logic enables fast fault clearing and re-closing
during certain conditions, but naturally, it can not fully replace a communication channel.
The logic can be controlled either by the autorecloser (zone extension) or by the loss-of-load
current (loss-of-load acceleration).
ZCLCPSCH
I3P* TRZE
BLOCK TRLL
ARREADY
NDST
EXACC
BC
LLACC
Figure 492: ZCLCPSCH function block
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Technical manual
15.5.4 Signals
Table 579: ZCLCPSCH Input signals

SIGNAL
ARREADY BOOLEAN 0 Autoreclosure ready, releases function used for fast trip
NDST BOOLEAN 0 Non directional criteria used to prevent instantaneous trip
EXACC BOOLEAN 0 Connected to function used for tripping at zone extension
BC BOOLEAN 0 Breaker Close
LLACC BOOLEAN 0 Connected to function used for tripping at loss of load
Table 580: ZCLCPSCH Output signals

TRZE BOOLEAN Trip by zone extension
TRLL BOOLEAN Trip by loss of load
15.5.5 Settings
Table 581: ZCLCPSCH Group settings (basic)

Enabled
LoadCurr 1 - 100 %IB 1 10 Load current before disturbance in % of
IBase
LossOfLoad Disabled - - Disabled Enable/Disable operation of Loss of load.
Enabled
ZoneExtension Disabled - - Disabled Enable/Disable operation of Zone
Enabled extension
MinCurr 1 - 100 %IB 1 5 Lev taken as curr loss due to remote CB
trip in % of IBase
tLowCurr 0.000 - 60.000 s 0.001 0.200 Time delay on pick-up for MINCURR value
tLoadOn 0.000 - 60.000 s 0.001 0.000 Time delay on pick-up for load current
release
tLoadOff 0.000 - 60.000 s 0.001 0.300 Time delay on drop off for load current
release
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Technical manual
Table 582: ZCLCPSCH Non group settings (basic)

groups
15.5.6.1 Zone extension M13819-3 v2
The overreaching zone is connected to the input EXACC. For this reason, configure the ARREADY
functional input to a READY functional output of a used autoreclosing function or via the selected
binary input to an external autoreclosing device, see figure 493.
This will allow the overreaching zone to trip instantaneously.
Figure 493: Simplified logic diagram for local acceleration logic

After the autorecloser initiates the close command and remains in the reclaim state, there will be
no ARREADY signal, and the protection will trip normally with step distance time functions.
In case of a fault on the adjacent line within the overreaching zone range, an unwanted
autoreclosing cycle will occur. The step distance function at the reclosing attempt will prevent an
unwanted retrip when the breaker is reclosed.
On the other hand, at a persistent line fault on line section not covered by instantaneous zone
(normally zone 1) only the first trip will be "instantaneous".
The function will be blocked if the input BLOCK is activated (common with loss-of-load
acceleration).
15.5.6.2 Loss-of-Load acceleration M13819-9 v5
When the "acceleration" is controlled by a loss-of-load, the overreaching zone used for
"acceleration" connected to input LLACC is not allowed to trip "instantaneously" during normal
non-fault system conditions. When all three-phase currents have been above the set value MinCurr
for more than setting tLowCurr, an overreaching zone will be allowed to trip "instantaneously"
during a fault condition when one or two of the phase currents will become low due to a three-
phase trip at the opposite IED, see figure 494. The current measurement is performed internally
and the internal STILL signal becomes logical one under the described conditions. The load current
901
Technical manual
in a healthy phase is in this way used to indicate the tripping at the opposite IED. Note that this
function will not trip in case of three-phase faults, because none of the phase currents will be low
when the opposite IED is tripped.
BLOCK
OR
BC
TRLL
STILL 0-tLoadOn AND
0
LLACC
Figure 494: Loss-of-load acceleration - simplified logic diagram

Breaker closing signals can if decided be connected to block the function during normal closing.
M13819-14 v2
15.6 Scheme communication logic for residual overcurrent

protection ECPSCH (85) IP14711-1 v2
M14882-1 v2

Scheme communication logic for ECPSCH - 85
residual overcurrent protection
To achieve fast fault clearance of ground faults on the part of the line not covered by the
instantaneous step of the residual overcurrent protection, the directional residual overcurrent
protection can be supported with a logic that uses communication channels.
In the directional scheme, information of the fault current direction must be transmitted to the
other line end. With directional comparison, a short trip time of the protection including a channel
transmission time, can be achieved. This short trip time enables rapid autoreclosing function after
the fault clearance.
The communication logic module for directional residual current protection enables blocking as
well as permissive under/overreaching, and unblocking schemes. The logic can also be supported
by additional logic for weak-end infeed and current reversal, included in Current reversal and
weak-end infeed logic for residual overcurrent protection ECRWPSCH (85) function.
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Technical manual
ECPSCH (85)
BLOCK TRIP
BLKTR CS
BLKCS CRL
CS_STOP LCG
PLTR_CRD
CSOR
CSUR
CR
CR_GUARD
Figure 495: ECPSCH (85) function block
15.6.4 Signals
Table 583: ECPSCH (85) Input signals

BLKTR BOOLEAN 0 Block pilot (communication assisted) trip
BLKCS BOOLEAN 0 Block pilot channel start
CS_STOP BOOLEAN 0 Block of channel start (CS) due to reverse fault detection
PLTR_CRD BOOLEAN 0 Signal to be used for coordinating local pilot tripping with the
channel receive (CR) signal
CSOR BOOLEAN 0 Signal to be used for channel start with overreaching pilot
schemes
CSUR BOOLEAN 0 Signal to be used for channel start with underreaching pilot
schemes
CR BOOLEAN 0 Channel receive input signal from communications apparatus/
module for pilot communication scheme logic
CR_GUARD BOOLEAN 0 Carrier channel guard input signal
Table 584: ECPSCH (85) Output signals

TRIP BOOLEAN Trip signal by communication scheme logic
CS BOOLEAN Pilot channel start signal
CRL BOOLEAN Channel receive signal output from communication scheme logic
LCG BOOLEAN Loss of channel guard signal output from communication scheme
logic
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Technical manual
15.6.5 Settings
Table 585: ECPSCH (85) Group settings (basic)

Enabled
SchemeType Disabled - - Permissive UR Scheme type, Mode of Operation
Intertrip
Permissive UR
Permissive OR
Blocking
tCoord 0.000 - 60.000 s 0.001 0.035 Communication scheme channel
coordination time
tSendMin 0.000 - 60.000 s 0.001 0.100 Minimum duration of a carrier send signal
(carrier continuation)
Table 586: ECPSCH (85) Group settings (advanced)

Unblock Disabled - - Disabled Operation mode of unblocking logic
NoRestart
Restart
tSecurity 0.000 - 60.000 s 0.001 0.035 Security timer for loss of carrier guard
detection

M13922-4 v5
The four step directional residual overcurrent protection EF4PTOC (51N/67N) is configured to give
input information, that is directional fault detection signals, to the ECPSCH (85) logic:
• Input signal PLTR_CRD is used for tripping of the communication scheme, normally the pickup
signal of a forward overreaching step of STFW.
• Input signal CS_STOP is used for sending block signal in the blocking communication scheme,
normally thepickup signal of a reverse overreaching step of STRV.
• Input signal CSUR is used for sending permissive signal in the underreaching permissive
communication scheme, normally the pickup signal of a forward underreaching step of STINn,
where n corresponds to the underreaching step.
• Input signal CSOR is used for sending permissive signal in the overreaching permissive
communication scheme, normally the pickup signal of a forward overreaching step of STINn,
where n corresponds to the overreaching step.
In addition to this a signal from the autoreclosing function should be configured to the BLKCS
input for blocking of the function at a single phase reclosing cycle.
15.6.6.1 Blocking scheme M13922-9 v5
In the blocking scheme a signal is sent to the other line end if the directional element detects a
ground fault in the reverse direction. When the forward directional element operates, it trips after
a short time delay if no blocking signal is received from the opposite line end. The time delay,
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Technical manual
normally 30 – 40 ms, depends on the communication transmission time and a chosen safety
margin.
One advantage of the blocking scheme is that only one channel (carrier frequency) is needed if the
ratio of source impedances at both end is approximately equal for zero and positive sequence
source impedances, the channel can be shared with the impedance measuring system, if that
system also works in the blocking mode. The communication signal is transmitted on a healthy
line and no signal attenuation will occur due to the fault.
Blocking schemes are particular favorable for three-terminal applications if there is no zero-
sequence outfeed from the tapping. The blocking scheme is immune to current reversals because
the received signal is maintained long enough to avoid unwanted operation due to current
reversal. There is never any need for weak-end infeed logic, because the strong end trips for an
internal fault when no blocking signal is received from the weak end. The fault clearing time is
however generally longer for a blocking scheme than for a permissive scheme.
If the fault is on the line, the forward direction measuring element operates. If no blocking signal
comes from the other line end via the CR binary input (received signal) the TRIP output is activated
after the tCoord set time delay.
AND
CS
CS_STOP
BLOCK
TRIP
AND 0-tCoord 0
0 25ms
PLTR_CRD
CR 0
50ms
CRL
AND
Figure 496: Simplified logic diagram for blocking scheme
15.6.6.2 Permissive under/overreaching scheme M13922-17 v6
In the permissive scheme the forward directed ground-fault measuring element sends a
permissive signal to the other end, if a ground fault is detected in the forward direction. The
directional element at the other line end must wait for a permissive signal before activating a trip
signal. Independent channels must be available for the communication in each direction.
An impedance measuring IED, which works in the same type of permissive mode, with one channel
in each direction, can share the channels with the communication scheme for residual overcurrent
protection. If the impedance measuring IED works in the permissive overreaching mode, common
channels can be used in single line applications. In case of double lines connected to a common
bus at both ends, use common channels only if the ratio Z1S/Z0S (positive through zero-sequence
source impedance) is about equal at both ends. If the ratio is different, the impedance measuring
and the directional ground-fault current system of the healthy line may detect a fault in different
directions, which could result in unwanted tripping.
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Technical manual
Common channels cannot be used when the weak-end infeed function is used in the distance or
ground-fault protection.
In case of an internal ground-fault, the forward directed measuring element operates and sends a
permissive signal to the remote end via the CS output (sent signal). Local tripping is permitted
when the forward direction measuring element operates and a permissive signal is received via
the CR binary input (received signal).
The permissive scheme can be of either underreaching or overreaching type. In the underreaching
alternative, an underreaching directional residual overcurrent measurement element will be used
as sending criterion of the permissive input signal CSUR.
In the overreaching alternative, an overreaching directional residual overcurrent measurement

element will be used as sending criterion of the permissive input signal CSOR. Also the
underreaching input signal CSUR can initiate sending.
BLOCK
CRL
CR AND
0 TRIP
0-tCoord 25ms
PLTR_CRD AND AND
0
0
50ms
AND
BLKCS OR CS
AND
Overreach
CSOR AND
OR 25ms
CSUR
0
ANSI05000280
15.6.6.3 Unblocking scheme M13922-45 v6
In unblocking scheme, the lower dependability in permissive scheme is overcome by using the loss
of guard signal from the communication equipment to locally create a receive signal. It is common
or suitable to use the function when older, less reliable, power line carrier (PLC) communication is
used.
The unblocking function uses a guard signal CR_GUARD, which must always be present, even when
no CR signal is received. The absence of the CR_GUARD signal for a time longer than the setting
tSecurity time is used as a CR signal, see figure 497. This also enables a permissive scheme to trip
when the line fault blocks the signal transmission.
The received signal created by the unblocking function is reset 150 ms after the security timer has
elapsed. When that occurs an output signal LCG is activated for signaling purpose. The unblocking
function is reset 200 ms after that the guard signal is present again.
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Technical manual
CR
CRL
0-tSecurity OR
NOT
0
CR_GUARD
200 ms 150 ms AND

AND OR 0
0
LCG
en05000746_ansi.vsd
Figure 497: Guard signal logic with unblocking scheme

The unblocking function can be set in three operation modes (setting Unblock):
Disabled: The unblocking function is out of operation

No restart: Communication failure shorter than tSecurity will be ignored
If CR_GUARD disappears, a CRL signal will be transferred to the trip logic
There will not be any information in case of communication failure (LCG)
Restart Communication failure shorter than tSecurity will be ignored
It sends a defined (150 ms) CRL after the disappearance of the CR_GUARD
signal
The function will activate LCG output in case of communication failure
If the communication failure comes and goes (<200 ms) there will not be
recurrent signaling

M16049-1 v9
Table 587: ECPSCH (85) technical data

Scheme type Permissive Underreaching -
Permissive Overreaching
Blocking
Communication scheme (0.000-60.000) s ±0.2% or ±20 ms whichever is greater
coordination time
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Technical manual
15.7 Current reversal and weak-end infeed logic for residual

overcurrent protection ECRWPSCH (85) IP14365-1 v4
M14883-1 v2

Current reversal and weak-end ECRWPSCH - 85
infeed logic for residual overcurrent
protection
M13928-3 v7
The Current reversal and weak-end infeed logic for residual overcurrent protection ECRWPSCH
(85) is a supplement to Scheme communication logic for residual overcurrent protection ECPSCH
(85).
To achieve fast fault clearing for all ground faults on the line, the directional ground fault
protection function can be supported with logic that uses tele-protection channels.
This is why the IEDs have available additions to the scheme communication logic.
M13928-6 v2
If parallel lines are connected to common busbars at both terminals, overreaching permissive
communication schemes can trip unselectively due to fault current reversal. This unwanted
tripping affects the healthy line when a fault is cleared on the other line. This lack of security can
result in a total loss of interconnection between the two buses. To avoid this type of disturbance,
a fault current reversal logic (transient blocking logic) can be used.
M13928-8 v5
Permissive communication schemes for residual overcurrent protection can basically trip only
when the protection in the remote IED can detect the fault. The detection requires a sufficient
minimum residual fault current, out from this IED. The fault current can be too low due to an
opened breaker or high-positive and/or zero-sequence source impedance behind this IED. To
overcome these conditions, weak-end infeed (WEI) echo logic is used. The weak-end infeed echo is
limited to 200 ms to avoid channel lockup.
908
Technical manual
ECRWPSCH (85)
V3P* IRVL
BLOCK TRWEI
IFWD ECHO
IREV
WEIBLK1
WEIBLK2
LOVBZ
CBOPEN
CRL
Figure 498: ECRWPSCH (85) function block
15.7.4 Signals
Table 588: ECRWPSCH (85) Input signals

SIGNAL
IFWD BOOLEAN 0 A signal that indicates a forward fault has been detected and will
block tripping if there was a pre-existing reverse fault condition
(IREV)
IREV BOOLEAN 0 A signal that indicates a reverse fault has been detected and
activates current reverasl logic
WEIBLK1 BOOLEAN 0 Block of WEI Logic
WEIBLK2 BOOLEAN 0 Block of WEI logic due to operation of other protections that
would effect a pilot trip or the detection of reverse faults that will
be tripped by an external device
LOVBZ BOOLEAN 0 Block of trip from WEI logic through the loss of voltage (fuse-
failure) function
CRL BOOLEAN 0 POTT or Unblock carrier receive for WEI logic
Table 589: ECRWPSCH (85) Output signals

IRVL BOOLEAN Operation of current reversal logic
TRWEI BOOLEAN Trip signal from weak end infeed logic
ECHO BOOLEAN Permissive signal transmitted as echo signal or in case of weak
end infeed
909
Technical manual
15.7.5 Settings
Table 590: ECRWPSCH (85) Group settings (basic)

CurrRev Disabled - - Disabled Operating mode of Current Reversal Logic
Enabled
local trip
WEI Disabled - - Disabled Operating mode of WEI logic
Echo
Echo & Trip
3V0PU 5 - 70 %VB 1 25 Neutral voltage setting for fault conditions
measurement
Table 591: ECRWPSCH (85) Non group settings (basic)

groups
15.7.6.1 Directional comparison logic function M13929-4 v5
The directional comparison function contains logic for blocking overreaching and permissive
overreaching schemes.
The circuits for the permissive overreaching scheme contain logic for current reversal and weak-
end infeed functions. These functions are not required for the blocking overreaching scheme.
Use the independent or inverse time functions in the directional ground fault protection module to
get backup tripping in case the communication equipment malfunctions and prevents operation
of the directional comparison logic.
Connect the necessary signal from the autorecloser for blocking of the directional comparison
scheme, during a single-phase autoreclosing cycle, to the BLOCK input of the directional
comparison module.
15.7.6.2 Fault current reversal logic M13929-11 v7
The fault current reversal logic uses a reverse directed element, connected to the input signal IREV,
which recognizes that the fault is in reverse direction. When the reverse direction element is
activated the output signal IRVL is activated which is shown in Figure 499. The logic is now ready
to handle a current reversal without tripping. The output signal IRVL will be connected to the block
input on the permissive overreaching scheme.
910
Technical manual
When the fault current is reversed on the healthy line, IRV is deactivated and IRVBLK is activated.
The tDelayRev timer delays the reset of the output signal. The signal blocks operation of the
overreach permissive scheme for residual current and thus prevents unwanted operation caused
by fault current reversal.
BLOCK
IREV 0 0 tPickUpRev 0 IRVL
tPickUpRev 10ms 0 AND tDelayRev
IRWD
CurrRev = On
15.7.6.3 Weak-end infeed logic M13929-24 v9
The weak-end infeed function can be set to send only an echo signal (WEI=Echo) or an echo signal
and a trip signal (WEI=Echo & Trip). The corresponding logic diagrams are depicted in Figure 500
and Figure 501.
The weak-end infeed logic uses normally a reverse and a forward direction element, connected to
WEIBLK2 via an OR-gate. If neither the forward nor the reverse directional measuring element is
activated during the last 200 ms, the weak-end infeed logic echoes back the received permissive
signal as shown in Figure 500 and Figure 501. The weak-end infeed logic also echoes the received
permissive signal when CBOPEN is high (local breaker opens) prior to faults appeared at the end
of line.
If the forward or the reverse directional measuring element is activated during the last 200 ms, the
fault current is sufficient for the IED to detect the fault with the ground fault function that is in
operation.
BLOCK
WEIBLK1 200 ms AND

ECHO
0 & 0 200 ms
CRL tPickUpWEI 50 ms 0
0
WEI = Echo
Figure 500: Simplified logic diagram for weak-end infeed logic - Echo
With the WEI= Echo & Trip setting, the logic sends an echo according to the diagram above.
Further, it activates the TRWEI signal to trip the breaker if the echo conditions are fulfilled and the
neutral point voltage is above the set trip value for 3V0PU.
The voltage signal that is used to calculate the zero sequence voltage is set in the ground fault
function which is in operation.
911
Technical manual
BLOCK
WEIBLK1 0 AND
ECHO
200 ms AND 0 200 ms
CRL 50 ms 0
TRWEI
WEI = Echo&Trip AND
100 ms
3V0PU
AND
CBOPEN
Figure 501: Simplified logic diagram for weak-end infeed logic - Echo & Trip
The weak-end infeed echo sent to the strong line end has a maximum duration of 200 ms. When
this time period has elapsed, the conditions that enable the echo signal to be sent are set to zero
for a time period of 50 ms. This avoids ringing action if the weak-end echo is selected for both line
ends.

M16051-2 v11
Table 592: ECRWPSCH (85) technical data

Trip mode of WEI logic Disabled -
Echo
Echo & Trip
Trip voltage 3V0 for WEI trip (5-70)% of VBase ±0.5% of Vn
logic
Coordination time for weak- (0.000–60.000) s ±0.2% or ±30 ms whichever is greater
end infeed logic
15.8 Direct transfer trip logic GUID-F6AE5927-D93F-4CAD-A6C6-445720C806D8 v1
15.8.1 Introduction GUID-40B4D8B0-2B57-4E0B-BC85-CB611E8EFBFE v1
Direct transfer trip (DTT) logic is used together with Line distance protection function or other
type of line protection. One typical example for use of transfer trip is given below. When Line
distance protection function is extended to cover power lines feeding the transformer directly and
there is a fault in transformer differential area, the transformer differential protection operates
faster than line protection. A trip command is sent to the remote end of the line. On remote end,
before sending a trip command to the circuit breaker, the certainty of a fault condition is ensured
by checking local criterion in DTT logic.
912
Technical manual
CR CS TRIP
TRIP
DTT IDIFF>
Xsource VT1
~ CT1
Line
CT2 CT3
Source Power Load
Transformer
en03000120.vsd
Figure 502: Direct transfer trip

On receiving the CR signal from remote end, Direct transfer trip logic needs to check additional
local criterion, before sending the trip signal to circuit breaker.
DTT logic can be handled in the following separate application functions:
1. Low active power and power factor protection LAPPGAPC (37_55)

2. Sudden change in current variation SCCVPTOC (51)
3. Compensated over and undervoltage protection COUVGAPC (59_27)
4. Carrier receive logic LCCRPTRC (94)
5. Zero sequence overvoltage protection LCZSPTOV (59N)
6. Negative sequence overvoltage protection LCNSPTOV (47)
7. Zero sequence overcurrent protection LCZSPTOC (51N)
8. Negative sequence overcurrent protection LCNSPTOC (46)
9. Three-phase overcurrent LCP3PTOC (51)
10. Three-phase undercurrent LCP3PTUC (37)
A composite scheme of these functions must be configured in PCM600 configuration tool, to

make a complete DTT scheme as shown in Figure 503. The different individual local criteria
functions can also be used as direct tripping protections, normally with a time delay.
913
Technical manual
CR!
CR2
Low impedance protection
Breaker Failure Backup trip of breaker failure

protection
Three phase overcurrent
CarrierReceiveLogic
LCCRPTRC (94)
Three phase undercurrent
V3P
CR!
CB Trip output
CR2
Zero sequence overcurrent
protection
LocalCheck
Analog input
Negative sequence overcurrent

protection OR
Zero sequence overvoltage

protection
I3P
Negative sequence overvoltage

protection
Compensated over and

undervoltage protection
Low active power and power

factor protection
Sudden change in current

variation
Figure 503: Direct transfer trip scheme
15.8.2 Low active power and power factor protection LAPPGAPC (37_55) GUID-585236C8-583C-4415-9820-A1DD038EA995 v1
GUID-6F3FADD8-8974-4874-8A43-642C1D540D3E v1

Low active power and power factor LAPPGAPC - 37_55
protection
15.8.2.2 Functionality GUID-25A2A94F-09FE-4552-89F8-CF22632A7A0D v2
914
Technical manual
Low active power and power factor protection (LAPPGAPC, 37_55) function measures power flow.
It can be used for protection and monitoring of:
• phase wise low active power

• phase wise low power factor
• phase wise reactive power and apparent power as service values
Following features are available:
• Definite time stage for low active power protection

• Definite time stage for low power factor protection
• Individual enabling of Low active power and Low power factor functions
• Low active power trip with 2 selection modes '1 out of 3' and '2 out of 3'
• Phase wise calculated values of apparent power, reactive power, active power and power
factor are available as service values
• Insensitive to small variations in voltage and current
15.8.2.3 Function block GUID-CB3033A2-D2AD-42CE-AAAE-1918A8A2861C v1
LAPPGAPC (37_55)
I3P* TRLAP
V3P* TRLPF
BLOCK TRTPFA
BLKTR TRLPFB
TRLPFC
PU_LAP
PU_LPF
PU_LAP_A
PU_LAP_B
PU_LAP_C
PU_LPF_A
PU_LPF_B
PU_LPF_C
Figure 504: LAPPGAPC (37_55) function block
15.8.2.4 Signals
Table 593: LAPPGAPC (37_55) Input signals

I3P GROUP - Three phase group signal for current
SIGNAL
V3P GROUP - Three phase group signal for voltage
SIGNAL
BLKTR BOOLEAN 0 Block all trip signals of the funtction
915
Technical manual
Table 594: LAPPGAPC (37_55) Output signals

TRLAP BOOLEAN Trip low active power
TRLPF BOOLEAN Trip low power factor
TRTPFA BOOLEAN Trip low power factor phase A
TRLPFB BOOLEAN Trip low power factor Phase B
TRLPFC BOOLEAN Trip low power factor Phase C
PU_LAP BOOLEAN Pick up low active power
PU_LPF BOOLEAN Pickup low power factor
PU_LAP_A BOOLEAN Pick up low active power phase A
PU_LAP_B BOOLEAN Pick up low active power phase B
PU_LAP_C BOOLEAN Pick up low active power phase C
PU_LPF_A BOOLEAN Pick up low power factor phase A
PU_LPF_B BOOLEAN Pick up low power factor phase B
PU_LPF_C BOOLEAN Pick up low power factor phase C
15.8.2.5 Settings
Table 595: LAPPGAPC (37_55) Group settings (basic)

Operation Disabled - - Disabled Operation Enable/Disable
Enabled
OperationLAP Disabled - - Disabled Operation low active power Enable/
Enabled disable
OpModeSel 2 out of 3 - - 2 out of 3 Trip mode low active power 2out of 3 or 1
1 out of 3 out of 3
PU_LAP 2.0 - 100.0 %SB 0.1 5.0 3 Phase pick up value for low active power
tdelay_LAP 0.000 - 60.000 s 0.001 0.010 Time delay to operate for low active power
OperationLPF Disabled - - Disabled Operation low power factor enable/
Enabled disable
PU_LPF 0.00 - 1.00 - 0.01 0.40 Pickup value for low power factor
tdelay_LPD 0.000 - 60.000 s 0.001 0.010 Time delay to operate for low power factor
Table 596: LAPPGAPC (37_55) Group settings (advanced)

VGenZeroDb 0.0 - 100.0 %VB 0.1 30.0 Zero point Clamping in % of UBase
IGenZeroDb 0.0 - 100.0 %IB 0.1 3.0 Zero point clamping in % of IBase
916
Technical manual
Table 597: LAPPGAPC (37_55) Non group settings (basic)

groups
15.8.2.6 Monitored data

Table 598: LAPPGAPC (37_55) Monitored data

S_A REAL - MVA Apparent power for phase A
S_B REAL - MVA Apparent power for phase B
S_C REAL - MVA Apparent power for phase C
P-A REAL - MW Active power for phase A
P_B REAL - MW Active power for phase B
P_C REAL - MW Active power for phase C
Q_Ph_A REAL - MVAr Reactive power for phase A
Q_Ph_B REAL - MVAr Reactive power for phase B
Q_Ph_C REAL - MVAr Reactive power for phase C
PF_A REAL - - Power factor phase A
PF_B REAL - - Power factor phase B
PF_C REAL - - Power factor phase C
15.8.2.7 Operation principle GUID-FF753775-9D02-4CC6-AD0C-7ED1693F6372 v2
Low active power and low power factor protection (LAPPGAPC, 37_55) calculates power and power
factor from voltage and current values. Trip signal must be set independently for low active power
and low power factor condition after definite time delay.
Active power calculation
LAPPGAPC (37_55) calculates single phase complex power of A, B and C loop by following
equations. From this complex apparent power, the real and imaginary parts can be respective
active and reactive power values of respective phases. All the apparent power values given out of
the function are absolute values. The active power is the real part of the calculated apparent
power.
S A = VA ·I A
S = V ·I
B B B
SC = VC · IC
917
Technical manual
Power factor calculation
Power factor is a ratio of active power to apparent power. The function calculates power factor
from the calculated values of active power and apparent power of A, B and C loop by following
equation:
PA
pfA =
SA
PB
pfB =
SB
PC
pfC =
SC
Active power trip mode
The low active power functionality has a trip mode setting. According to this setting, trip is
activated if the low active power is detected in one out of three phases or two out of three phases
respectively. These two modes are user settable through setting OpModeSel.
Zero clamping filtering
The function will do zero clamping to disable the calculation if the current and voltage values of a
particular phase are less than 30% of VBase for voltage and 3% of IBase for current value.
Calculation
The active power setting value used for detection of under power must be given as a three-phase
value. The design starts to calculate internally the per phase value from this setting and detect
phase wise under power condition individually. The power factor pickup value is common for all
the three phases.
Phase wise analog values apparent power, active power, reactive power and power factor are
available as service values.
918
Technical manual
PU_LAP_x
P < LAP<
I3P TRLAP
t
Calculation P and
pf
V3P
PU_LPF_x
pf < pf<
TRLPFx
t
Figure 505: Logic diagram of Low active power and low power factor protection (LAPPGAPC,
37_55)
15.8.2.8 Technical data

GUID-B5714FAE-A87D-4C2D-A167-6CB3522CE1D5 v4
Table 599: LAPPGAPC (37_55) technical data

Trip value, low active power (2.0-100.0)% of SBase ±1.0% of Sn
Reset ratio, low active power <105% -

Trip value, low power factor 0.00-1.00 ±0.02
Independent time delay to trip for low (0.000-60.000) s ±0.2% or ±40 ms whichever is
active power at 1.2 to 0.8 x Pset greater
Independent time delay to trip for low (0.000-60.000) s ±0.2% or ±40 ms whichever is
power factor at 1.2 to 0.8 x PFset greater
Critical impulse time, low active power 10 ms typically at 1.2 to 0.8 x Pset -
Impulse margin time, low active power 10 ms typically -
15.8.3 Compensated over and undervoltage protection COUVGAPC

(59_27) GUID-41C1AD2A-3E57-40A9-9039-F159A3CE3DF8 v1
GUID-F5F76C4D-DD25-4695-9FF1-6B45C696CC5E v1

Compensated over and undervoltage COUVGAPC - 59_27
protection
919
Technical manual
15.8.3.2 Functionality GUID-229EB419-0903-46FA-9192-BBB35725C841 v2
Compensated over and undervoltage protection (COUVGAPC, 59_27) function calculates the
remote end voltage of the transmission line utilizing local measured voltage, current and with the
help of transmission line parameters, that is, line resistance, reactance, capacitance and local
shunt reactor. For protection of long transmission line for in zone faults, COUVGAPC, (59_27) can
be incorporated with local criteria within direct transfer trip logic to ensure tripping of the line
only under abnormal conditions.
15.8.3.3 Function block GUID-7A5D719C-3C29-43A8-B213-9FDABB4B05E6 v1
COUVGAPC (59_27)
I3P* 27 Trip
V3P* 59 Trip
BLOCK 27_Trip_A
BLKTR 27_Trip_B
SWIPOS 27_Trip_C
59_Trip_A
59_Trip_B
59_Trip_C
27 PU
59 PU
27_PU_A
27_PU_B
27_PU_C
59_PU_A
59_PU_B
59_PU_C
Figure 506: COUVGAPC (59_27) function block
15.8.3.4 Signals
Table 600: COUVGAPC (59_27) Input signals

I3P GROUP - Group signal for voltage inputs
SIGNAL
V3P GROUP - Group signal for voltage inputs
SIGNAL
BLOCK BOOLEAN 0 Block the function
BLKTR BOOLEAN 0 Blocks all operate outputs
SWIPOS BOOLEAN 1 Local shunt reactor connected or not
Table 601: COUVGAPC (59_27) Output signals

27 Trip BOOLEAN Common trip signal for compensated under voltage
59 Trip BOOLEAN Common trip signal for compensated over voltage
27_Trip_A BOOLEAN Trip signal for compensated under voltage of phase A
27_Trip_B BOOLEAN Trip signal for compensated under voltage of phase B
920
Technical manual

27_Trip_C BOOLEAN Trip signal for compensated under voltage of phase C
59_Trip_A BOOLEAN Trip signal for compensated over voltage of phase A
59_Trip_B BOOLEAN Trip signal for compensated over voltage of phase B
59_Trip_C BOOLEAN Trip signal for compensated over voltage of phase C
27 PU BOOLEAN Common PU fr compensated undervoltage
59 PU BOOLEAN Pick up for overvoltage
27_PU_A BOOLEAN pick up for 27 phase A uncompensated
27_PU_B BOOLEAN pick up for 27 phase B uncompensated
27_PU_C BOOLEAN pickup for compensated 27 phase C
59_PU_A BOOLEAN pick up for uncompensated 59 phase A
59_PU_B BOOLEAN pick up for uncompensated 59 phase B
59_PU_C BOOLEAN pick up for uncompensated 59 phase C
15.8.3.5 Settings
Table 602: COUVGAPC (59_27) Group settings (basic)

Enabled
Operation 27 Disabled - - Enabled Operation compensated undervoltage
Enabled enable/disable
27_COMP 1 - 100 %VB 1 70 Compensated under voltage level in % of
VBase
t_27 0.000 - 60.000 s 0.001 1.000 Time delay to trip under voltage
Operation_59 Disabled - - Enabled Operation compenated overvoltage
Enabled enable/disable
59_COMP 1 - 200 %VB 1 120 Compensated over voltage level in % of
VBase
t_59 0.000 - 60.000 s 0.001 5.000 Time delay to trip over voltage
Table 603: COUVGAPC (59_27) Group settings (advanced)

HystAbs 0.0 - 50.0 %VB 0.1 0.5 Hysteresis absolute for compensated
over/under voltage in % of VBase
921
Technical manual
Table 604: COUVGAPC (59_27) Non group settings (basic)

groups
R1 0.01 - 3000.00 Ohm 0.01 5.00 Positive sequence resistance per phase for
the line in ohm
X1 0.01 - 3000.00 Ohm 0.01 40.00 Positive sequence reactance per phase for
the line in ohm
Xc 1.00 - 10000.00 Ohm 0.01 1000.00 Half of equivalent capacitive reactance per
phase in ohm
EnShuntReactor Disabled - - Enabled Enable setting if shunt reactor connected
Enabled in line
Xsh 1.00 - 10000.00 Ohm 0.01 1500.00 Per phase reactance of local Shunt Reactor
in ohm

Table 605: COUVGAPC (59_27) Monitored data

CMP_VA REAL - kV Compensated voltage of phase A
CMP_VB REAL - kV Compensated voltage of phase B
CMP_VC REAL - kV Compensated voltage of phase C
15.8.3.7 Operation principle GUID-F0E1BCC7-2010-4B48-9A6F-9A2D92107AD8 v2
Compensated over and undervoltage protection (COUVGAPC, 59_27) function is phase segregated
and mainly used for local criteria check in Direct transfer trip. The principle is to utilize local
measured voltage and current to calculate the voltage at the remote end of the line.
The main measured inputs to COUVGAPC (59_27) are three-phase voltage and current signals.
COUVGAPC (59_27)uses line resistance, reactance and line charging capacitance to calculate the
remote end voltage. It also takes the input for local shunt reactor, connected at the line side of the
line breaker, reactance value. The calculated voltage is referred to as compensated voltage.
922
Technical manual
59 PU
59 Trip
Over voltage
V3P 59_PU_x
comparator
I3P 59_Trip_x
t
Compensated
SWIPOS voltage calculation 27_PU_x
EnShuntReactor AND
27_Trip_x
Under voltage t
27 Trip
comparator
27 PU
Figure 507: Logic diagram of Compensated over and undervoltage protection (COUVGAPC,
59_27)
The formula used for calculation of compensated voltage is as follows:
Vremote = Vlocal – (Ilocal – j x Vlocal/Xsr + j x Vlocal/Xcp) x Zsetting
Where:
Vremote calculated voltage at the opposite side of line
Vlocal measured local voltage
Ilocal measured local current
Xsr reactance of local line connected shunt reactor, if applicable
Xcp half of equivalent reactance of line distributed capacitor
Above calculated compensated voltage is compared to preset over and under voltage levels set as
percentage of base voltage VBase. If the calculated voltage exceeds setting in any phase,
COUVGAPC (59_27) generates pickup and trip signals for that phase and common pickup and trip
signals. Independent enabling for overvoltage and undervoltage are available with definite time
delay. If shunt reactor is not present in the system, COUVGAPC (59_27) does not include any effect
of shunt reactor while calculating the compensated voltage. This shunt reactor calculation is
enabled when both input SWIPOS is and setting parameter EnShuntReactor is Enabled. Run time
change in EnShuntReactor setting parameter restarts the IED and SWIPOS input signal is used to
enable/disable the shunt reactor calculations.
Calculations
• All resistance and reactance considered in compensated voltage calculation are primary side
values.
• Calculation of shunt reactor reactance in ohms from given MVAr rating:
2
VN
X sr =
QN
923
Technical manual
Where:
VN line to line voltage
QN is total three phase MVAr of shunt reactor

• If total line capacitance (Ctotal) is known then half line capacitive reactance:
2
X cp =
wCtotal
and if total line capacitive reactance XcTotal is known:
X cp = 2 X cTotal
Compensated voltage for all three phases is available as service values.

GUID-D9EADF1B-5FC7-4FDB-BF38-95BDBC4D7C3D v4
Table 606: COUVGAPC (59_27)technical data

Trip value, undervoltage (1-100)% of VBase ±0,5% of Vn
Absolute hysteresis (0.00–50.0)% of VBase ±0.5% of Vr at V < Vr

±0.5% of Vr at V > Vr
Critical impulse time, undervoltage 10 ms typically at 1.2 to 0.8x Vset -
Impulse margin time, undervoltage 15 ms typically -

Trip value, overvoltage (1-200)% of VBase ±0.5% of Vn at V≤Vn
± 0.5% of V at V>Vn
Critical impulse time, overvoltage 10 ms typically at 0.8 to 1.2 x Vset -
Impulse margin time, overvoltage 15 ms typically -

Independent time delay for (0.000-60.000) s ±0.2% or ±40 ms whichever is
undervoltage functionality at 1.2 to greater at 1.2 to 0.8 x Vset
0.8 x Vset
Independent time delay for (0.000-60.000) s ±0.2% or ±40 ms whichever is

overvoltage functionality at 0.8 to greater at 0.8 to 1.2 x Vset
1.2 x Vset
15.8.4 Sudden change in current variation SCCVPTOC (51) GUID-61E9C823-5313-4682-93CB-2BA6AC0A0640 v1
924
Technical manual
GUID-3B6E6472-8153-4D8F-874B-DF68891296C8 v1

Sudden change in current variation SCCVPTOC - 51
15.8.4.2 Functionality GUID-413851A9-5EB7-4C48-8F5D-E30E470EFFAF v2
Sudden change in current variation (SCCVPTOC, 51) function is a fast way of finding any
abnormality in line currents. When there is a fault in the system, the current changes faster than
the voltage. SCCVPTOC (51) finds abnormal condition based on phase-to-phase current variation.
The main application is as a local criterion to increase security when transfer trips are used.
15.8.4.3 Function block GUID-98592177-56F1-400E-AE03-02D33C12B94E v1
SCCVPTOC (51)
I3P* TRIP
BLOCK RI
BLKTR
Figure 508: SCCVPTOC (51) function block
15.8.4.4 Signals
Table 607: SCCVPTOC (51) Input signals

I3P GROUP - Three phase to phase current samples group
SIGNAL
BLKTR BOOLEAN 0 Block trip signals
Table 608: SCCVPTOC (51) Output signals

RI BOOLEAN Common start signal
925
Technical manual
15.8.4.5 Settings
Table 609: SCCVPTOC (51) Group settings (basic)

Enabled
IPickup 5 - 100 %IB 1 20 Fixed threshold setting in % of IBase
tHold 0.000 - 60.000 s 0.001 0.500 Hold time for operate signals
Table 610: SCCVPTOC (51) Group settings (advanced)

tDelay 0.000 - 0.005 s 0.001 0.002 Time delay for pickup and trip signals
Table 611: SCCVPTOC (51) Non group settings (basic)

groups
15.8.4.6 Operation principle GUID-53346F67-4CF8-4E74-83AD-5DF32DECAA0A v2
Sudden change in current variation (SCCVPTOC, 51) function calculates the variation in phase-to-
phase current and gives the RI output when this variation crosses the sum of start level and float
threshold for a time of tDelay. The variation is calculated for all the three phase-to-phase currents.
The variation in the current is calculated using the following equation:
Di = i ( t ) - 2 × i ( t - T ) + i ( t - 2T )
Where:
i(t) Amplitude of the current at the present instant
i(t-T) Amplitude of the current at the instant exactly one cycle time before
i(t-2T) Amplitude of the current at the instant exactly two cycle time before
Criteria:
Di > i (1.8 · DIT + IPickup )

IPickup: pickup level
It is the full-circle integral of the phase-to-phase current variation
926
Technical manual
1 2T -1
DIT = å Di ( t - n )
T n =T
T: the count of the sampling value in one cycle
If the above criteria becomes true for a time of tDelay, then respective RI output is activated
provided the BLOCK input is false, and the respective TRIP outputs is activated for the time of
tHold provided the BLKTR and BLOCK input is false.

GUID-4BF21D95-4517-424E-BC23-6156EA0E253C v4
Table 612: SCCVPTOC (51) technical data

Trip value, overcurrent (5-100)% of IBase ±2.0% of In
Hold time for trip signal at 0 to 2 x Iset (0.000-60.000) s ±0.2% or ±15 ms whichever is
greater
15.8.5 Carrier receive logic LCCRPTRC (94) GUID-13BF45AF-B04C-4C6D-B59D-79A51241C449 v1
GUID-D420E532-37DC-442F-B847-8F73EE8527A7 v1

Carrier receive logic LCCRPTRC - 94
15.8.5.2 Functionality GUID-79AB9B9E-9200-44D7-B4EE-57C9E7BB74A9 v2
In Direct transfer trip (DTT) scheme, the received CR signal gives the trip to the circuit breaker
after checking certain local criteria functions in order to increase the security of the overall
tripping functionality. Carrier receive logic (LCCRPTRC, 94) function gives final trip output of the
DTT scheme.
Features:
• Carrier redundancy to ensure security in DTT scheme

• Blocking function output on CR Channel Error
• Phase wise trip outputs
927
Technical manual
15.8.5.3 Function block GUID-B90E2B88-8C17-4B9C-8BC0-E3194559A4D1 v1
LCCRPTRC (94)
BLOCK TRIP
LOCTR TR_A
LOCTR_A TR_B
LOCTR_B TR_C
LOCTR_C
CHERR1
CHERR2
CR!
CR2
Figure 509: LCCRPTRC (94) function block
15.8.5.4 Signals
Table 613: LCCRPTRC (94) Input signals

LOCTR BOOLEAN 0 Local common trip signal coming from DTT
LOCTR_A BOOLEAN 0 Local trip signal for phase A coming from DTT
LOCTR_B BOOLEAN 0 Local trip signal for phase B coming from DTT
LOCTR_C BOOLEAN 0 Local trip signal for phase C coming from DTT
CHERR1 BOOLEAN 0 Channel error indication flag for carrier receive 1
CHERR2 BOOLEAN 0 Channel error indication flag for carrier receive 2
CR1 BOOLEAN 0 Carrier receive 1
CR2 BOOLEAN 0 Carrier receive 2
Table 614: LCCRPTRC (94) Output signals

TRIP BOOLEAN Common trip
TR_A BOOLEAN Trip Phase A
TR_C BOOLEAN Trip Phase C
928
Technical manual
15.8.5.5 Settings
Table 615: LCCRPTRC (94) Group settings (basic)

Enabled
ChMode 2 Out Of 2 - - 2 Out Of 2 Setting to select 1/2 or 2/2 mode
1 Out Of 2
tOperate 0.000 - 60.000 s 0.001 0.100 Time delay to operate
15.8.5.6 Operation principle GUID-203F41ED-D08B-41E1-AF54-DFFBECCE1F06 v2
The functionality of the Carrier receive logic (LCCRPTRC, 94) is to release the TRIP signal for DTT
scheme based on the LOCTR_A, LOCTRL_B, LOCTR_C, and LOCTR signals coming from local
criterion, and the Carrier receive signals CR! and CR2. There are two modes of operation 1 out of 2
and 2 out of 2. In the case of the 1 out of 2 mode if any one of the carrier signal is received then the
trip signals will be released, and in 2 out of 2 mode both the CRs should be high to release trip
signal. If any one of the channel error signals is high in 2 out of 2 mode, then logic automatically
switches to 1 out of 2 mode after a time delay of 200 ms. After switching to 1/2 mode under
channel error condition and if channel error gets cleared the mode will switch back only after a
time delay of 200 ms.
If the input channel error signal is high then the respective carrier receive signal will be blocked.
The complete function can be blocked by setting the BLOCK input high.

GUID-C99E063D-B377-40D5-8481-9F46D4166AED v3
Table 616: LCCRPTRC (94)technical data

Operation mode 1 Out Of 2 -
2 Out Of 2
Independent time delay (0.000-60.000) s ±0.2% or ±35 ms whichever is
greater
15.8.6 Negative sequence overvoltage protection LCNSPTOV (47) GUID-F15A69BA-58B1-4F3E-AE12-11FF71B96021 v1
GUID-C0F8D64B-FBCD-4115-9A5A-23B252CB7E45 v1

Negative sequence overvoltage LCNSPTOV - 47
protection
929
Technical manual
15.8.6.2 Functionality GUID-C5CBB6A2-780D-4008-98E3-455A404D32CB v2
Negative sequence components are present in all types of fault condition. Negative sequence
voltage and current get high values during unsymmetrical faults.
15.8.6.3 Function block GUID-F0F40881-AF96-45C4-8157-7EE6DE60C23A v1
LCNSPTOV (47)
V3P* TRIP
BLOCK RI
BLKTR
Figure 510: LCNSPTOV (47) Function block
15.8.6.4 Signals
Table 617: LCNSPTOV (47) Input signals

SIGNAL
BLOCK BOOLEAN 0 Block overall function
BLKTR BOOLEAN 0 Block trip output
Table 618: LCNSPTOV (47) Output signals

TRIP BOOLEAN Trip signal for negative sequence over voltage
RI BOOLEAN Start signal for negative sequence over voltage
15.8.6.5 Settings
Table 619: LCNSPTOV (47) Group settings (basic)

Enabled
Pickup2 1 - 200 %VB 1 10 Negative sequence over voltage pickup
value in % of VBase
tV2 0.000 - 120.000 s 0.001 2.000 Time delay to operate
Table 620: LCNSPTOV (47) Non group settings (basic)

groups
930
Technical manual

Table 621: LCNSPTOV (47) Monitored data

V2 REAL - kV Neagative sequence voltage value
15.8.6.7 Operation principle GUID-ADD0FC96-B81F-458D-AEA3-94C374128FB0 v2
Negative sequence over voltage protection (LCNSPTOV, 47) is a definite time stage comparator
function. The negative sequence input voltage from the SMAI block is connected as input to the
function through a group connection V3P in PCM600. This voltage is compared against the preset
value and a pickup signal will be set high if the input negative sequence voltage is greater than the
preset value Pickup2. Trip signal will be set high after a time delay setting oftV2. There is a BLOCK
input which will block the complete function. BLKTR will block the trip output. The negative
sequence voltage is also available as service value output U2.

GUID-122A206E-27D2-4D15-AD5A-86B68F1ED559 v4
Table 622: LCNSPTOV (47)technical data

Trip value, negative sequence (1-200)% of VBase ±0.5% of Vn at V≤Vn
overvoltage ±0.5% of V at V>Vn
Reset ratio, negative sequence >95% at (10–200)% of VBase -

overvoltage
Max. = 30 ms
Max. = 30 ms
Critical impulse time, negative 10 ms typically at 0 to 2 x Vset -
sequence overvoltage
Impulse margin time, negative 15 ms typically -
sequence overvoltage
Independent time delay to trip at 0 to (0.000-120.000) s ±0.2% or ±40 ms whichever is
1.2 x Vset greater
15.8.7 Zero sequence overvoltage protection LCZSPTOV (59N) GUID-5179ADF5-7A85-4B95-972F-F55566B46709 v1
GUID-0D2A007F-167A-4534-A41B-22C107FEAC46 v1

Zero sequence overvoltage LCZSPTOV - 59N
protection
931
Technical manual
15.8.7.2 Functionality GUID-4CF3EC6A-D286-4808-929B-C9302418E4ED v2
Zero sequence components are present in all abnormal conditions involving ground. They can
reach considerably high values during ground faults.
15.8.7.3 Function block GUID-7764289A-A859-4C02-A9A1-B8F963F65138 v1
LCZSPTOV (59N)
V3P* TRIP
BLOCK RI
BLKTR
Figure 511: LCZSPTOV (59N) function block
15.8.7.4 Signals
Table 623: LCZSPTOV (59N) Input signals

SIGNAL
BLKTR BOOLEAN 0 Block TRIP output
Table 624: LCZSPTOV (59N) Output signals

TRIP BOOLEAN TRIP signal for zero sequence over voltage protection
RI BOOLEAN Start signal for zero sequence over voltage protection
15.8.7.5 Settings
Table 625: LCZSPTOV (59N) Group settings (basic)

Enabled
3V0PU 1 - 200 %VB 1 10 Zero sequence voltage pickup in % of
UBase
t3V0 0.000 - 120.000 s 0.001 2.000 Time delay to operate
Table 626: LCZSPTOV (59N) Non group settings (basic)

groups
932
Technical manual

Table 627: LCZSPTOV (59N) Monitored data

3V0 REAL - kV Zero sequence voltage value
15.8.7.7 Operation principle GUID-901A8A6C-A68B-47CB-9C41-BB0E0BDF7EF8 v2
Zero sequence over voltage protection (LCZSPTOV, 59N) is a definite time stage comparator
function. The zero sequence input voltage from the SMAI block is connected as input to the
function through a group connection V3P in PCM600. This voltage is compared against the preset
value and a pickup signal will be set high if the input zero sequence voltage is greater than the
preset value 3V0PU. Trip signal will be set high after a time delay setting of t3V0. BLOCK input will
block the complete function. BLKTR will block the trip output. The zero sequence voltage will be
available as service value output as 3V0.

GUID-7A8E7F49-F079-42A0-8685-20288FAD5982 v4
Table 628: LCZSPTOV (59N)technical data

Trip value, zero sequence overvoltage (1-200)% of VBase ±0.5% of Vn at V ≤ Vn
Reset ratio, zero sequence overvoltage >95% at (10–200)% of VBase -

Max. = 30 ms
Max. = 30 ms
Critical impulse time, zero sequence 10 ms typically at 0 to 2 x Vset -
overvoltage
Impulse margin time, zero sequence 15 ms typically -
overvoltage
Independent time delay to trip at 0 to 1.2 (0.000-120.000) s ±0.2% or ±40 ms whichever is
x Vset greater
15.8.8 Negative sequence overcurrent protection LCNSPTOC (46) GUID-0593B07A-4F76-4F92-92E9-EB30FC836ABE v1
GUID-EDC20AC7-540D-43DE-8ABF-7A463E115950 v1

Negative sequence overcurrent LCNSPTOC - 46
protection
933
Technical manual
15.8.8.2 Functionality GUID-C4F99554-88BC-4F11-9EFE-91BCA6ED1261 v2
Negative sequence components are present in all types of fault condition. They can reach
considerably high values during abnormal operation.
15.8.8.3 Function block GUID-199CCB09-A4D0-4147-9BBD-5D1ADF85CA2F v1
LCNSPTOC (46)
I3P* TRIP
BLOCK RI
BLKTR
Figure 512: LCNSPTOC (46) Function block
15.8.8.4 Signals
Table 629: LCNSPTOC (46) Input signals

SIGNAL
BLKTR BOOLEAN 0 Block trip signal
Table 630: LCNSPTOC (46) Output signals

TRIP BOOLEAN Trip signal negative sequence over current protection
RI BOOLEAN Start signal for negative sequence over current protection
15.8.8.5 Settings
Table 631: LCNSPTOC (46) Group settings (basic)

Enabled
Pickup2 3 - 2500 %IB 1 100 Negative sequence over current pickup
value in % of IBase
tI2 0.000 - 60.000 s 0.001 0.000 Time delay to operate
Table 632: LCNSPTOC (46) Non group settings (basic)

groups
934
Technical manual

Table 633: LCNSPTOC (46) Monitored data

I2 REAL - A Neagative sequence current value
15.8.8.7 Operation principle GUID-C7D22C1D-2441-4C7B-938B-E7B47559D3C5 v2
Negative sequence overcurrent protection (LCNSPTOC, 46) is a definite time stage comparator
function. The negative sequence input current from the SMAI block is connected as input to the
function through a group connection I3P in PCM600. This current is compared against the preset
value and a pickup signal will be set high if the input negative sequence current is greater than the
preset value Pickup2. Trip signal will be set high after a time delay setting of tI2. BLOCK input will
block the complete function. BLKTR will block the trip output. The negative sequence current is
available as service value output I2.

GUID-0E964441-43DE-43B6-B454-485FBBF66B5C v4
Table 634: LCNSPTOC (37_55)technical data

Trip value, negative sequence (3 - 2500)% of IBase ±1.0% of Ir at I ≤ In
overcurrent ±1.0% of I at I > In
Reset ratio, negative sequence >95% at (50–2500)% of IBase -

overcurrent
Max. = 25 ms
Max. = 25 ms
Max. = 20 ms
Max. = 35 ms
Critical impulse time, negative 10 ms typically at 0 to 2 x Iset -
sequence overcurrent 2 ms typically at 0 to 10 x Iset
Impulse margin time, negative 15 ms typically -

sequence overcurrent
Independent time delay at 0 to 2 x Iset (0.000-60.000) s ±0.2% or ±35 ms, whichever is
greater
Transient overreach, pickup function <5% at τ = 100 ms -
15.8.9 Zero sequence overcurrent protection LCZSPTOC (51N) GUID-6F355F11-2863-4E05-A72C-FB4D6A1A6C0F v1
935
Technical manual
GUID-581BA9F0-7886-4E46-84B6-37E8B6962934 v1

Zero sequence overcurrent LCZSPTOC - 51N
protection
15.8.9.2 Functionality GUID-F0C38DA1-2F39-46DE-AFFE-F919E6CF4A57 v2
Zero sequence components are present in all abnormal conditions involving ground. They have a
considerably high value during ground faults.
15.8.9.3 Function block GUID-2EBCFED9-1980-4B9C-A27B-BFB07B279B5C v1
LCZSPTOC (51N)
I3P* TRIP
BLOCK RI
BLKTR
Figure 513: LCZSPTOC (51N) Function block
15.8.9.4 Signals
Table 635: LCZSPTOC (51N) Input signals

SIGNAL
BLKTR BOOLEAN 0 Block trip output
Table 636: LCZSPTOC (51N) Output signals

TRIP BOOLEAN Trip signal for zero sequence over current protection
RI BOOLEAN Start signal for zero sequence over current protection
936
Technical manual
15.8.9.5 Settings
Table 637: LCZSPTOC (51N) Group settings (basic)

Enabled
3I0 PU 3 - 2500 %IB 1 100 Zero sequence over current pickup in % of
IBase
t3I0 0.000 - 60.000 s 0.001 0.000 Time delay to operate
Table 638: LCZSPTOC (51N) Non group settings (basic)

groups

Table 639: LCZSPTOC (51N) Monitored data

3I0 REAL - A Zero sequence current value
15.8.9.7 Operation principle GUID-AAB75539-3C71-4B32-97DA-4D1D349B25E5 v2
Zero sequence overcurrent protection (LCZSPTOC, 51N) is a definite time stage comparator
function. The zero sequence input current from the SMAI block is connected as input to the
function through a group connection I3P in PCM600. This current is compared against the preset
value and a pickup signal will be set high if the input zero sequence current is greater than the
preset value 3I0 PU. Trip signal will be set high after a time delay setting of t3I0. BLOCK input will
block the complete function. BLKTR will block the trip output. The zero sequence current is
available as service value output 3I0.

GUID-9F739808-04CA-4988-ABBC-1A444297FDB5 v4
Table 640: LCZSPTOC (51N) technical data

Trip value, zero sequence overcurrent (3-2500)% of IBase ±1.0% of In at I≤In
±1.0% of I at I>In
Reset ratio, zero sequence overcurrent >95% at (50–2500)% of IBase -

Max. = 30 ms
Max. = 30 ms
937
Technical manual

Max. = 20 ms
Max. = 35 ms
Critical impulse time, zero sequence 10 ms typically at 0 to 2 x Iset -
overcurrent 2 ms typically at 0 to 10 x Iset
Impulse margin time, zero sequence 15 ms typically -

overcurrent
Independent time delay at 0 to 2 x Iset (0.000-60.000) s ±0.2% or ±35 ms whichever is
greater
15.8.10 Three phase overcurrent LCP3PTOC (51) GUID-510F1FCE-39ED-4B44-89D0-338B085DD8C3 v1
GUID-5FBC4309-C8FB-4CDF-A4D6-84E3A89C81B7 v1

Three phase overcurrent LCP3PTOC - 51
15.8.10.2 Functionality GUID-AC4FF35E-5D86-421E-82C7-93F600E9F453 v2
Three phase overcurrent (LCP3PTOC, 51) is designed for overcurrent conditions.
Features:
• Phase wise pickup and trip signals

• Overcurrent protection
• Phase wise RMS current is available as service values
• Single definite time stage trip function.
15.8.10.3 Function block GUID-CBFCC6B5-F239-4AE1-BDCC-0D192127579D v1
LCP3PTOC (51)
I3P* TRIP
BLOCK TR_A
BLKTR TR_B
TR_C
RI
PU_A
PU_B
BFI_C
Figure 514: LCP3PTOC (51) Function block
938
Technical manual
15.8.10.4 Signals
Table 641: LCP3PTOC (51) Input signals

SIGNAL
BLOCK BOOLEAN 0 Block all binary outputs by resetting timers
BLKTR BOOLEAN 0 Block trip of the function
Table 642: LCP3PTOC (51) Output signals

15.8.10.5 Settings
Table 643: LCP3PTOC (51) Group settings (basic)

Enabled
PU 50 5 - 2500 %IB 1 1000 Pickup value for 3 phase over current in %
of IBase
tOC 0.000 - 60.000 s 0.001 0.020 Time delay to operate
Table 644: LCP3PTOC (51) Non group settings (basic)

groups
939
Technical manual

Table 645: LCP3PTOC (51) Monitored data

15.8.10.7 Operation principle GUID-ED4F48A8-91AF-4123-94DA-C50E957931DC v2
Three phase overcurrent (LCP3PTOC, 51) is used for detecting over current conditions. LCP3PTOC
(51) pickups when the current exceeds the set limit PU 51. It operates with definite time (DT)
characteristics, that is, the function operates after a predefined time tOC and resets when the
fault current disappears. The function contains a blocking functionality. It is possible to block the
function output, timer or the function itself, if desired.

GUID-C4ACE306-2A54-483D-B247-A479D48CBF5F v4
Table 646: LCP3PTOC (51) technical data

Trip value, overcurrent (5-2500)% of IBase ±1.0% of In at I ≤ In
Reset ratio, overcurrent > 95% at (50-2500)% of IBase -

Max. = 25 ms
Max. = 35 ms
Critical impulse time, overcurrent 5 ms typically at 0 to 2 x Iset -
2 ms typically at 0 to 10 x Iset
Impulse margin time, overcurrent 10 ms typically -

Independent time delay to operate at 0 (0.000-60.000) s ±0.2% or ±30 ms whichever is
to 2 x Iset greater
15.8.11 Three phase undercurrent LCP3PTUC (37) GUID-E8EAE24D-4B69-43DC-BCFC-C4AC63AA66AB v1
GUID-51A4DEE2-C549-483B-9BDD-8F79AD4CFE23 v1

Three phase undercurrent LCP3PTUC - 37
940
Technical manual
15.8.11.2 Functionality GUID-E8EA5CE8-ED7A-4FA3-9DAC-83227D53387F v2
Three phase undercurrent function (LCP3PTUC, 37) is designed for detecting loss of load
conditions.
Features:
• Phase wise pickup and trip signals

• Phase wise RMS current is available as service values
• Single definite time stage trip function
15.8.11.3 Function block GUID-432A180E-CBB4-4928-A898-0748C34D3527 v1
LCP3PTUC (37)
I3P* TRIP
BLOCK TR_A
BLKTR TR_B
TR_C
RI
BFI_A
PU_B
BFI_C
Figure 515: LCP3PTUC (37) Function block
15.8.11.4 Signals
Table 647: LCP3PTUC (37) Input signals

SIGNAL
BLOCK BOOLEAN 0 Block all binary outputs by resetting timers
BLKTR BOOLEAN 0 Block trip of the function
Table 648: LCP3PTUC (37) Output signals

941
Technical manual
15.8.11.5 Settings
Table 649: LCP3PTUC (37) Group settings (basic)

Enabled
PU_37 1.00 - 100.00 %IB 0.01 50.00 Pickup value for 3 phase under current in %
of IBase
tUC 0.000 - 60.000 s 0.001 0.000 Time delay to operate
Table 650: LCP3PTUC (37) Non group settings (basic)

groups

Table 651: LCP3PTUC (37) Monitored data

15.8.11.7 Operation principle GUID-B13D3F9D-358E-4E6C-BD72-A44B00B27BC0 v2
Three phase undercurrent (LCP3PTUC, 37) is used for detecting sudden load loss which is
considered as fault condition. LCP3PTUC (37) starts when the current is less than the set limit
PU_37. It operates with definite time (DT) characteristics, that is, the function operates after a
predefined time tUC and resets when the load current restores. The function contains a blocking
functionality. It is possible to block the function output, timer or the function itself, if desired.

GUID-CE2C6F0A-DF49-4AAF-80F0-9CDCBB08E755 v4
Table 652: LCP3PTUC (37) technical data

Trip value, undercurrent (1.00-100.00)% of IBase ±1.0% of In
Reset ratio, undercurrent < 105% at (50.00-100.00)% of IBase -

Max. = 30 ms
Max. = 25 ms
942
Technical manual

Critical impulse time, undercurrent 10 ms typically at 2 to 0 x Iset -
Impulse margin time, undercurrent 10 ms typically -

Independent time delay to trip at 2 to 0 (0.000-60.000) s ±0.2% or ±45 ms whichever is
x Iset greater
943
Technical manual
944
Logic
Section 16 Logic
16.1 Tripping logic SMPPTRC (94) IP14576-1 v4
SEMOD56226-2 v6

Tripping logic SMPPTRC 94
I->O
SYMBOL-K V1 EN-US
A function block for protection tripping is always provided as basic for each circuit breaker
involved in the tripping of the fault. It provides a settable pulse prolongation to ensure a trip pulse
of sufficient length, as well as all functionality necessary for correct co-operation with
autoreclosing functions.
The trip function block also includes a settable latch functionality for evolving faults and breaker
lock-out.
SMPPTRC (94)
BLOCK TRIP
BLKLKOUT TR_A
TRINP_3P TR_B
TRINP_A TR_C
TRINP_B TR1P
TRINP_C TR2P
PS_A TR3P
PS_B CLLKOUT
PS_C
1PTRZ
1PTRGF
P3PTR
SETLKOUT
RSTLKOUT
Figure 516: SMPPTRC (94) function block
945
Technical manual
Logic
16.1.4 Signals
Table 653: SMPPTRC (94) Input signals

BLKLKOUT BOOLEAN 0 Blocks circuit breaker lockout output (CLLKOUT)
TRINP_3P BOOLEAN 0 Trip all phases
TRINP_A BOOLEAN 0 Trip phase A
TRINP_B BOOLEAN 0 Trip phase B
TRINP_C BOOLEAN 0 Trip phase C
PS_A BOOLEAN 0 Input from phase selection, phase A
PS_B BOOLEAN 0 Input from phase selection, phase B
PS_C BOOLEAN 0 Input from phase selection, phase C
1PTRZ BOOLEAN 0 Zone Trip with a separate phase selection
1PTRGF BOOLEAN 0 Single phase Directional Ground Fault Overcurrent Trip with phase
selection
P3PTR BOOLEAN 0 Prepare all tripping to be three-phase
SETLKOUT BOOLEAN 0 Input for setting the circuit breaker lockout function
RSTLKOUT BOOLEAN 0 Input for resetting the circuit breaker lockout function
Table 654: SMPPTRC (94) Output signals

TRIP BOOLEAN General trip output signal
TR1P BOOLEAN Tripping single-pole
TR2P BOOLEAN Tripping two-pole
TR3P BOOLEAN Tripping three-pole
CLLKOUT BOOLEAN Circuit breaker lockout output (set until reset)
946
Technical manual
Logic
16.1.5 Settings
Table 655: SMPPTRC (94) Group settings (basic)

Enabled
Program 3 phase - - 1p/3p Three pole; single or three pole; single, two
1p/3p or three pole trip
1p/2p/3p
tTripMin 0.000 - 60.000 s 0.001 0.150 Minimum duration of trip output signal
tWaitForPHS 0.020 - 0.500 s 0.001 0.050 Secures 3-pole trip when phase selection
failed
Table 656: SMPPTRC (94) Group settings (advanced)

TripLockout Disabled - - Disabled If TripLockout is set to On, it will activate
Enabled output (CLLKOUT) and trip latch. If set to
Off it will activate only CLLKOUT
AutoLock Disabled - - Disabled If AutoLock is set to On i will activate
Enabled lockout from input (SETLKOUT) and trip, If
set to Off it will activate only from
SETLKOUT
16.1.6 Operation principle M12255-3 v10.1.1
The duration of a trip output signal from tripping logic common 3-phase output SMPPTRC (94) is
settable (tTripMin). The pulse length should be long enough to secure the breaker opening.
For three-pole tripping logic common 3-phase output, SMPPTRC (94) has a single input (TRINP_3P)
through which all trip output signals from the protection functions within the IED, or from external
protection functions via one or more of the IEDs binary inputs, are routed. It has a single trip
output (TRIP) for connection to one or more of the IEDs binary outputs, as well as to other
functions within the IED requiring this signal.
BLOCK
tTripMin TRIP
TRIN OR
AND t
Operation Mode = Enabled
Program = 3 phase
Figure 517: Simplified logic diagram for three pole trip
947
Technical manual
Logic
SMPPTRC (94) function for single-pole and two-pole tripping has additional phase segregated
inputs for this, as well as inputs for faulted phase selection. The latter inputs enable single- pole
and two-pole tripping for those functions which do not have their own phase selection capability,
and therefore which have just a single trip output and not phase segregated trip outputs for
routing through the phase segregated trip inputs of the expanded SMPPTRC (94) function.
Examples of such protection functions are the residual overcurrent protections. The expanded
SMPPTRC (94) function has two inputs for these functions, one for impedance tripping (for
example, carrier-aided tripping commands from the scheme communication logic), and one for
ground fault tripping (for example, tripping output from a residual overcurrent protection).
Additional logic, including a timer tWaitForPHS, secures a three-phase trip command for these
protection functions in the absence of the required phase selection signals.
The expanded SMPPTRC (94) function has three trip outputs TR_A, TR_B, TR_C (besides the trip
output TRIP), one per phase, for connection to one or more of the IEDs binary outputs, as well as
to other functions within the IED requiring these signals. There are also separate output signals
indicating single-pole, two-pole or three-pole trip. These signals are important for cooperation
with the autorecloser SMBRREC (79) function.
The expanded SMPPTRC (94) function is equipped with logic which secures correct operation for
evolving faults as well as for reclosing on to persistent faults. A special input is also provided
which disables single- pole and two-pole tripping, forcing all tripping to be three-pole.
In multi-breaker arrangements, one SMPPTRC (94) function block is used for each breaker. This
can be the case if single pole tripping and autoreclosing is used.
The breaker close lockout function can be activated from an external trip signal from another
protection function via input (SETLKOUT) or internally at a three-pole trip, if desired.
It is possible to lockout seal in the tripping output signals or use blocking of closing only the
choice is by setting TripLockout.
16.1.6.1 Logic diagram M12258-7 v5.1.1
TRINP_A
TRINP_B
OR
TRINP_C
1PTRZ OR
1PTRGF
OR
TRINP_3P INTL_ABCTRIP
AND
Program = 3 phase
Figure 518: Three-phase front logic — simplified logic diagram
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TRINP_3P
TRINP_A
PS_A
TR_A
OR
AND
TRINP_B
PS_B TR_B
OR
AND
TRINP_C
PS_C TR_C
OR
AND
OR
OR OR
- loop
-loop
OR
AND
AND
AND
1PTRGF AND tWaitForPHS
1PTRZ OR
Figure 519: Phase segregated front logic
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tTripMin
tEvolvingFault
tTripMin
tEvolvingFault
tTripMin
tEvolvingFault
Figure 520: Additional logic for the 1ph/3ph operating mode
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Logic
BLOCK
tTripMin
tEvolvingFault
tTripMin
tEvolvingFault
tTripMin
tEvolvingFault
Figure 521: Additional logic for the 1ph/2ph/3ph operating mode
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ANSI05000521-3.vsd
Figure 522: Final tripping circuits

M12380-1 v9
Table 657: SMPPTRC (94) technical data

Trip action 3-ph, 1/3-ph, 1/2/3-ph -
Minimum trip pulse length (0.000-60.000) s ±0.2% or ±15 ms whichever is greater
3-pole trip delay (0.020-0.500) s ±0.2% or ±15 ms whichever is greater
Evolving fault delay (0.000-60.000) s ±0.2% or ±15 ms whichever is greater
Table 658: Number of SMPPTRC instances

Function Quantity with cycle time
3 ms 8 ms 100 ms
SMPPTRC 6 - -
16.2 Trip matrix logic TMAGAPC IP15121-1 v4
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SEMOD167882-2 v3

Trip matrix logic TMAGAPC - -
The trip matrix logic TMAGAPC function is used to route trip signals and other logical output
signals to different output contacts on the IED.
The trip matrix logic function has 3 output signals and these outputs can be connected to physical
tripping outputs according to the specific application needs for settable pulse or steady output.
TMAGAPC
BLOCK OUTPUT1
BLK1 OUTPUT2
BLK2 OUTPUT3
BLK3
INPUT1
INPUT2
INPUT3
INPUT4
INPUT5
INPUT6
INPUT7
INPUT8
INPUT9
INPUT10
INPUT11
INPUT12
INPUT13
INPUT14
INPUT15
INPUT16
INPUT17
INPUT18
INPUT19
INPUT20
INPUT21
INPUT22
INPUT23
INPUT24
INPUT25
INPUT26
INPUT27
INPUT28
INPUT29
INPUT30
INPUT31
INPUT32
Figure 523: TMAGAPC function block
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16.2.4 Signals
Table 659: TMAGAPC Input signals

BLK1 BOOLEAN 0 Block of output 1
INPUT1 BOOLEAN 0 Binary input 1
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Table 660: TMAGAPC Output signals

OUTPUT1 BOOLEAN OR function betweeen inputs 1 to 16
OUTPUT2 BOOLEAN OR function between inputs 17 to 32
OUTPUT3 BOOLEAN OR function between inputs 1 to 32
16.2.5 Settings
Table 661: TMAGAPC Group settings (basic)

Enabled
PulseTime 0.050 - 60.000 s 0.001 0.150 Output pulse time
OnDelay 0.000 - 60.000 s 0.001 0.000 Output on delay time
OffDelay 0.000 - 60.000 s 0.001 0.000 Output off delay time
ModeOutput1 Steady - - Steady Mode for output ,1 steady or pulsed
Pulsed
ModeOutput2 Steady - - Steady Mode for output 2, steady or pulsed
Pulsed
ModeOutput3 Steady - - Steady Mode for output 3, steady or pulsed
Pulsed
The trip matrix logic (TMAGAPC) block is provided with 32 input signals and 3 output signals. The
function block incorporates internal logic OR gates in order to provide grouping of connected
input signals to the three output signals from the function block.
Internal built-in OR logic is made in accordance with the following three rules:
1. when any one of first 16 inputs signals (INPUT1 to INPUT16) has logical value 1 the first output
signal (OUTPUT1) will get logical value 1.
2. when any one of second 16 inputs signals (INPUT17 to INPUT32) has logical value 1 the second
output signal (OUTPUT2) will get logical value 1.
3. when any one of all 32 input signals (INPUT1 to INPUT32) has logical value 1 the third output
signal (OUTPUT3) will get logical value 1.
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By use of the settings ModeOutput1, ModeOutput2, ModeOutput3, PulseTime, OnDelay and

OffDelay the behavior of each output can be customized. The OnDelay is always active and will
delay the input to output transition by the set time. The ModeOutput for respective output
decides whether the output shall be steady with an drop-off delay as set by OffDelay or if it shall
give a pulse with duration set by PulseTime. Note that for pulsed operation and that the inputs are
connected in an OR-function, a new pulse will only be given on the output if all related inputs are
reset and then one is activated again. For steady operation the OffDelay will pickup when all
related inputs have reset. Detailed logical diagram is shown in figure 524
PulseTime
t
AND
ModeOutput1
INPUT 1
OUTPUT 1
OR
0-OnDelay 0 AND
OR
0 0-OffDelay
INPUT 16
PulseTime
t
AND
ModeOutput2
INPUT 17
OUTPUT 2
OR
0-OnDelay 0 AND
OR
0 0-OffDelay
INPUT 32
PulseTime
t
AND
ModeOutput3
OUTPUT 3
OR
0-OnDelay 0 AND
OR
0 0-OffDelay
Figure 524: Trip matrix internal logic

Output signals from TMAGAPC are typically connected to other logic blocks or directly to output
contacts in the IED. When used for direct tripping of the circuit breaker(s) the pulse time shall be
set to at least 0.150 seconds in order to obtain satisfactory minimum duration of the trip pulse to
the circuit breaker trip coils.

GUID-3AB1EE95-51BF-4CC4-99BD-F4ECDAACB75A v1
Table 662: Number of TMAGAPC instances

3 ms 8 ms 100 ms
TMAGAPC 6 6 -
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16.3 Logic for group alarm ALMCALH GUID-64EA392C-950F-486C-8D96-6E7736B592BF v1
16.3.1 Identification GUID-64EA392C-950F-486C-8D96-6E7736B592BF v1

Logic for group alarm ALMCALH - -
16.3.2 Functionality GUID-16E60E27-F7A8-416D-8648-8174AAC49BB5 v3
The group alarm logic function ALMCALH is used to route several alarm signals to a common
indication, LED and/or contact, in the IED.
16.3.3 Function block GUID-EA192656-71DD-4D44-A1D5-96B1B4937971 v1
ALMCALH
BLOCK ALARM
INPUT1
INPUT2
INPUT3
INPUT4
INPUT5
INPUT6
INPUT7
INPUT8
INPUT9
INPUT10
INPUT11
INPUT12
INPUT13
INPUT14
INPUT15
INPUT16
16.3.4 Signals
Table 663: ALMCALH Input signals

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Table 664: ALMCALH Output signals

ALARM BOOLEAN OR function betweeen inputs 1 to 16
16.3.5 Settings
Table 665: ALMCALH Group settings (basic)

Enabled
16.3.6 Operation principle GUID-0405BB7B-7EF7-4546-92CD-F703AA0DD9F4 v2
The logic for group alarm ALMCALH block is provided with 16 input signals and one ALARM output
signal. The function block incorporates internal logic OR gate in order to provide grouping of
connected input signals to the output ALARM signal from the function block.
When any one of 16 input signals (INPUT1 to INPUT16) has logical value 1, the ALARM output signal
will get logical value 1.
The function has a drop-off delay of 200 ms when all inputs are reset to provide a steady signal.
Input 1
ALARM
1 200 ms
0
Input 16
Figure 525: Group alarm logic
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GUID-A05AF26F-DC98-4E62-B96B-E75D19F20767 v1
Table 666: Number of ALMCALH instances

3 ms 8 ms 100 ms
ALMCALH - - 5
16.4 Logic for group warning WRNCALH GUID-3EBD3D5B-F506-4557-88D7-DFC0BD21C690 v3
16.4.1 Identification GUID-3EBD3D5B-F506-4557-88D7-DFC0BD21C690 v3

Logic for group warning WRNCALH - -
16.4.2 Functionality GUID-F7D9A012-3AD4-4D86-BE97-DF2A99BE5383 v3
The group warning logic function WRNCALH is used to route several warning signals to a common
indication, LED and/or contact, in the IED.
16.4.3 Function block GUID-C909E4FB-3F7A-47F7-8988-36B159E2C7B2 v1
WRNCALH
BLOCK WARNING
INPUT1
INPUT2
INPUT3
INPUT4
INPUT5
INPUT6
INPUT7
INPUT8
INPUT9
INPUT10
INPUT11
INPUT12
INPUT13
INPUT14
INPUT15
INPUT16
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16.4.4 Signals
Table 667: WRNCALH Input signals

Table 668: WRNCALH Output signals

WARNING BOOLEAN OR function betweeen inputs 1 to 16
16.4.5 Settings
Table 669: WRNCALH Group settings (basic)

Enabled
16.4.6 Operation principle GUID-71C65C20-7B6C-499F-BFCD-E418AA55F7EC v2
The logic for group warning WRNCALH block is provided with 16 input signals and 1 WARNING
output signal. The function block incorporates internal logic OR gate in order to provide grouping
of connected input signals to the output WARNING signal from the function block.
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When any one of 16 input signals (INPUT1 to INPUT16) has logical value 1, the WARNING output
signal will get logical value 1.
INPUT1
WARNING
1 200 ms
0
INPUT16

GUID-70B7357D-F467-4CF5-9F73-641A82D334F5 v1
Table 670: Number of WRNCALH instances

3 ms 8 ms 100 ms
WRNCALH - - 5
16.5 Logic for group indication INDCALH GUID-3B5D4371-420D-4249-B6A4-5A168920D635 v3
16.5.1 Identification GUID-3B5D4371-420D-4249-B6A4-5A168920D635 v3

Logic for group indication INDCALH - -
16.5.2 Functionality GUID-D8D1A4EE-A87F-46C6-8529-277FC1ADA9B0 v3
The group indication logic function INDCALH is used to route several indication signals to a
common indication, LED and/or contact, in the IED.
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16.5.3 Function block GUID-9D89E183-449A-4016-AB83-E57C8DDBA843 v1
INDCALH
BLOCK IND
INPUT1
INPUT2
INPUT3
INPUT4
INPUT5
INPUT6
INPUT7
INPUT8
INPUT9
INPUT10
INPUT11
INPUT12
INPUT13
INPUT14
INPUT15
INPUT16
16.5.4 Signals
Table 671: INDCALH Input signals

Table 672: INDCALH Output signals

IND BOOLEAN OR function betweeen inputs 1 to 16
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16.5.5 Settings
Table 673: INDCALH Group settings (basic)

Enabled
16.5.6 Operation principle GUID-72B1B4E8-BC6C-4AF7-8B41-058241B944F8 v2
The logic for group indication INDCALH block is provided with 16 input signals and 1 IND output
signal. The function block incorporates internal logic OR gate in order to provide grouping of
connected input signals to the output IND signal from the function block.
When any one of 16 input signals (INPUT1 to INPUT16) has logical value 1, the IND output signal will
get logical value 1.
INPUT1
IND
1 200 ms
0
INPUT16

GUID-EAA43288-01A5-49CF-BF5B-9ABF6DC27D85 v1
Table 674: Number of INDCALH instances

3 ms 8 ms 100 ms
INDCALH - 5 -
16.6 Basic configurable logic blocks M11396-4 v15
The basic configurable logic blocks do not propagate the time stamp and quality of signals (have
no suffix QT at the end of their function name). A number of logic blocks and timers are always
available as basic for the user to adapt the configuration to the specific application needs. The list
below shows a summary of the function blocks and their features.
These logic blocks are also available as part of an extension logic package with the same number
of instances.
• AND function block. Each block has four inputs and two outputs where one is inverted.
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• GATE function block is used for whether or not a signal should be able to pass from the input
to the output.
• INVERTER function block that inverts one input signal to the output.
• LLD function block. Loop delay used to delay the output signal one execution cycle.
• OR function block. Each block has up to six inputs and two outputs where one is inverted.
• PULSETIMER function block can be used, for example, for pulse extensions or limiting of
operation of outputs, settable pulse time.
• RSMEMORY function block is a flip-flop that can reset or set an output from two inputs
respectively. Each block has two outputs where one is inverted. The memory setting controls
if, after a power interruption, the flip-flop resets or returns to the state it had before the
power interruption. RESET input has priority.
• SRMEMORY function block is a flip-flop that can set or reset an output from two inputs
if, after a power interruption, the flip-flop resets or returns to the state it had before the
power interruption. The SET input has priority.
• TIMERSET function has pick-up and drop-out delayed outputs related to the input signal. The
timer has a settable time delay.
• XOR function block. Each block has two outputs where one is inverted.
16.6.1 AND function block AND IP11013-1 v2
M11453-3 v4
The AND function is used to form general combinatory expressions with boolean variables. The
AND function block has up to four inputs and two outputs. One of the outputs is inverted.
16.6.1.1 Function block

M11452-3 v2
AND
INPUT1 OUT
INPUT2 NOUT
INPUT3
INPUT4
Figure 526: AND function block
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16.6.1.2 Signals
Table 675: AND Input signals

INPUT1 BOOLEAN 1 Input signal 1
Table 676: AND Output signals

OUT BOOLEAN Output signal
NOUT BOOLEAN Inverted output signal

GUID-D1179280-1D99-4A66-91AC-B7343DBA9F23 v1
Table 677: Number of AND instances

Logic block Quantity with cycle time
3 ms 8 ms 100 ms
AND 60 60 160
16.6.2 Controllable gate function block GATE IP11021-1 v2
M11489-3 v2
The Controllable gate function block (GATE) is used for controlling if a signal should be able to
pass from the input to the output or not depending on a setting.

M11490-3 v2
GATE
INPUT OUT
Figure 527: GATE function block
16.6.2.2 Signals
Table 678: GATE Input signals

INPUT BOOLEAN 0 Input to gate
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Table 679: GATE Output signals

OUT BOOLEAN Output from gate
16.6.2.3 Settings
Table 680: GATE Group settings (basic)

Enabled

GUID-45DF373F-DC39-4E1B-B45B-6B454E8E0E50 v1
Table 681: Number of GATE instances

3 ms 8 ms 100 ms
GATE 10 10 20
16.6.3 Inverter function block INV IP11011-1 v2

M11445-3 v1
INV
INPUT OUT
Figure 528: INV function block
16.6.3.2 Signals
Table 682: INV Input signals

INPUT BOOLEAN 0 Input
Table 683: INV Output signals

OUT BOOLEAN Output
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GUID-0EC4192A-EF03-47C0-AEC1-09B68B411A98 v1
Table 684: Number of INV instances

3 ms 8 ms 100 ms
INV 90 90 240
16.6.4 Loop delay function block LLD GUID-05D959B5-A55B-437C-8E8F-831A4A357E24 v2
GUID-64B24094-010D-4B8F-8B7B-DDD49499AAE5 v3
The Logic loop delay function block (LLD) function is used to delay the output signal one execution
cycle, that is, the cycle time of the function blocks used.

GUID-EE44CFDF-C8F7-4870-BD1C-98D9CD91FD97 v4
LLD
INPUT OUT
IEC15000144.vsd
Figure 529: LLD function block
16.6.4.2 Signals
Table 685: LLD Input signals

INPUT BOOLEAN 0 Input signal
Table 686: LLD Output signals

OUT BOOLEAN Output signal delayed one execution cycle

GUID-B2E6F510-8766-4381-9618-CE02ED71FFB6 v1
Table 687: Number of LLD instances

3 ms 8 ms 100 ms
LLD 10 10 20
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16.6.5 OR function block OR IP11012-1 v2
M11449-3 v2
The OR function is used to form general combinatory expressions with boolean variables. The OR
function block has up to six inputs and two outputs. One of the outputs is inverted.

M11448-3 v1
OR
INPUT1 OUT
INPUT2 NOUT
INPUT3
INPUT4
INPUT5
INPUT6
Figure 530: OR function block
16.6.5.2 Signals
Table 688: OR Input signals

INPUT1 BOOLEAN 0 Input 1 to OR gate
Table 689: OR Output signals

OUT BOOLEAN Output from OR gate
NOUT BOOLEAN Inverted output from OR gate

GUID-35A795D7-A6BD-4669-A023-43C497DBFB01 v1
Table 690: Number of OR instances

3 ms 8 ms 100 ms
OR 69 60 160
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16.6.6 Pulse timer function block PULSETIMER IP11016-1 v2
M11466-3 v3
The pulse (PULSETIMER) function can be used, for example, for pulse extensions or limiting the
operation time of outputs. The PULSETIMER has a settable length. When the input is 1, the output
will be 1 for the time set by the time delay parameter t. Then it returns to 0.

M11465-3 v4
PULSETIMER
INPUT OUT
Figure 531: PULSETIMER function block
16.6.6.2 Signals
Table 691: PULSETIMER Input signals

INPUT BOOLEAN 0 Input to pulse timer
Table 692: PULSETIMER Output signals

OUT BOOLEAN Output from pulse timer
16.6.6.3 Settings
Table 693: PULSETIMER Non group settings (basic)

t 0.000 - s 0.001 0.010 Time delay of function
90000.000

GUID-E05E5FB1-23E7-4816-84F2-1FBFFDFF2B43 v1
Table 694: Number of PULSETIMER instances

Logic block Quantity with cycle time Range or Value Accuracy
3 ms 8 ms 100 ms
PULSETIMER 10 10 20 (0.000–90000.000) s ±0.5% ±10 ms
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16.6.7 Reset-set with memory function block RSMEMORY GUID-9C93669F-078B-49EA-85B8-C4BB6A434734 v1
GUID-4C804DEA-3C83-4C20-82C6-BAD03BD48242 v4
The Reset-set with memory function block (RSMEMORY) is a flip-flop with memory that can reset
or set an output from two inputs respectively. Each RSMEMORY function block has two outputs,
where one is inverted. The memory setting controls if, after a power interruption, the flip-flop
resets or returns to the state it had before the power interruption. For a Reset-Set flip-flop, RESET
input has higher priority over SET input.
Table 695: Truth table for RSMEMORY function block

RESET SET OUT NOUT
0 0 Last Inverted last
value value
0 1 1 0
1 0 0 1
1 1 0 1

GUID-50D5A4C0-59BF-44DE-86AC-47640ACD35A7 v3
RSMEMORY
SET OUT
RESET NOUT
Figure 532: RSMEMORY function block
16.6.7.2 Signals
Table 696: RSMEMORY Input signals

SET BOOLEAN 0 Input signal to set
RESET BOOLEAN 0 Input signal to reset
Table 697: RSMEMORY Output signals

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Technical manual
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16.6.7.3 Settings
Table 698: RSMEMORY Group settings (basic)

Memory Disabled - - Enabled Operating mode of the memory function
Enabled

GUID-BE6FD540-E96E-4F15-B2A2-12FFAE6C51DB v1
Table 699: Number of RSMEMORY instances

3 ms 8 ms 100 ms
RSMEMORY 10 10 20
16.6.8 Set-reset with memory function block SRMEMORY IP11020-1 v2
M11485-3 v4
The Set-reset with memory function block (SRMEMORY) is a flip-flop with memory that can set or
reset an output from two inputs respectively. Each SRMEMORY function block has two outputs,
where one is inverted. The memory setting controls if, after a power interruption, the flip-flop
resets or returns to the state it had before the power interruption. The input SET has priority.
Table 700: Truth table for SRMEMORY function block

SET RESET OUT NOUT
0 0 Last Inverted
value last value
0 1 0 1
1 0 1 0
1 1 1 0

M11484-3 v2
SRMEMORY
SET OUT
RESET NOUT
Figure 533: SRMEMORY function block
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16.6.8.2 Signals
Table 701: SRMEMORY Input signals

Table 702: SRMEMORY Output signals

16.6.8.3 Settings
Table 703: SRMEMORY Group settings (basic)

Enabled

GUID-7A0F4327-CA83-4FB0-AB28-7C5F17AE6354 v1
Table 704: Number of SRMEMORY instances

3 ms 8 ms 100 ms
SRMEMORY 10 10 20
16.6.9 Settable timer function block TIMERSET IP11022-1 v2
M11494-3 v3
The Settable timer function block (TIMERSET) timer has two outputs for the delay of the input
signal at drop-out and at pick-up. The timer has a settable time delay. It also has an Operation
setting Enabled and Disabled that controls the operation of the timer.
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Input
tdelay
On
Off
tdelay
t
Figure 534: TIMERSET status diagram

M11495-3 v3
TIMERSET
INPUT ON
OFF
Figure 535: TIMERSET function block
16.6.9.2 Signals
Table 705: TIMERSET Input signals

INPUT BOOLEAN 0 Input to timer
Table 706: TIMERSET Output signals

ON BOOLEAN Output from timer, pickup delay
OFF BOOLEAN Output from timer, dropout delay
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16.6.9.3 Settings
Table 707: TIMERSET Group settings (basic)

Enabled
t 0.000 - s 0.001 0.000 Delay for settable timer n
90000.000

GUID-C6C98FE0-F559-45EE-B853-464516775417 v1
Table 708: Number of TIMERSET instances

3 ms 8 ms 100 ms
TIMERSET 15 15 30 (0.000–90000.000) s ±0.5% ±10 ms
16.6.10 Exclusive OR function block XOR IP11018-1 v2
M11477-3 v4
The exclusive OR function (XOR) is used to generate combinatory expressions with boolean
variables. XOR has two inputs and two outputs. One of the outputs is inverted. The output signal
OUT is 1 if the input signals are different and 0 if they are the same.
Table 709: Truth table for XOR function block

INPUT1 INPUT2 OUT NOUT
0 0 0 1
0 1 1 0
1 0 1 0
1 1 0 1

M11476-3 v1
XOR
INPUT1 OUT
INPUT2 NOUT
Figure 536: XOR function block
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16.6.10.2 Signals
Table 710: XOR Input signals

INPUT1 BOOLEAN 0 Input 1 to XOR gate
INPUT2 BOOLEAN 0 Input 2 to XOR gate
Table 711: XOR Output signals

OUT BOOLEAN Output from XOR gate
NOUT BOOLEAN Inverted output from XOR gate

GUID-0B07F78C-10BD-4070-AFF0-6EE36454AA03 v1
Table 712: Number of XOR instances

3 ms 8 ms 100 ms
XOR 10 10 20
16.7 Configurable logic blocks Q/T GUID-0CA6511A-E8BD-416E-9B59-5C6BD98C60B7 v4
The configurable logic blocks QT propagate the time stamp and the quality of the input signals
(have suffix QT at the end of their function name). The propagation of information is part of the
IEC 61850 capabilities.
The function blocks assist the user to adapt the IEDs' configuration to the specific application
needs. The list below shows a summary of the function blocks and their features.
• ANDQT AND function block. The function also propagates the time stamp and the quality of
input signals. Each block has four inputs and two outputs where one is inverted.
• INDCOMBSPQT combines single input signals to group signal. Single position input is copied
to value part of SP_OUT output. TIME input is copied to time part of SP_OUT output. Quality
input bits are copied to the corresponding quality part of SP_OUT output.
• INDEXTSPQT extracts individual signals from a group signal input. The value part of single
position input is copied to SI_OUT output. The time part of single position input is copied to
TIME output. The quality bits in the common part and the indication part of inputs signal are
copied to the corresponding quality output.
• INVALIDQT function which sets quality invalid of outputs according to a "valid" input. Inputs
are copied to outputs. If input VALID is 0, or if its quality invalid bit is set, all outputs invalid
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quality bit will be set to invalid. The time stamp of an output will be set to the latest time
stamp of INPUT and VALID inputs.
• INVERTERQT function block that inverts the input signal and propagates the time stamp and
the quality of the input signal.
• ORQT OR function block that also propagates the time stamp and the quality of the input
signals. Each block has six inputs and two outputs where one is inverted.
• PULSETIMERQT Pulse timer function block can be used, for example, for pulse extensions or
limiting of operation of outputs. The function also propagates the time stamp and the quality
of the input signal.
• RSMEMORYQT function block is a flip-flop that can reset or set an output from two inputs
if the block after a power interruption should return to the state before the interruption, or be
reset. The function also propagates the time stamp and the quality of the input signal.
• SRMEMORYQT function block is a flip-flop that can set or reset an output from two inputs
if the block after a power interruption should return to the state before the interruption, or be
reset. The function also propagates the time stamp and the quality of the input signal.
• TIMERSETQT function has pick-up and drop-out delayed outputs related to the input signal.
The timer has a settable time delay. The function also propagates the time stamp and the
quality of the input signal.
• XORQT XOR function block. The function also propagates the time stamp and the quality of
the input signals. Each block has two outputs where one is inverted.
16.7.1 ANDQT function block GUID-E3023D85-FDCC-4A5F-99B4-64DA7B4AC5BB v4
The ANDQT function is used to form general combinatory expressions with boolean variables. The
ANDQT function block has four inputs and two outputs. It can propagate the quality, value and
timestamps of the signals via IEC61850.
16.7.1.1 Function block GUID-4CEE3C76-A39D-4C33-AD55-88C570210F2B v2
ANDQT
INPUT1 OUT
INPUT2 NOUT
INPUT3
INPUT4
Figure 537: ANDQT function block
16.7.1.2 Signals GUID-4543C4C9-FAE2-4328-8DE2-4A5756A020E9 v1
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Table 713: ANDQT Input signals

Table 714: ANDQT Output signals


GUID-23D4121A-4C9A-4072-BBE3-6DB076EDAB79 v1
Table 715: Number of ANDQT instances

3 ms 8 ms 100 ms
ANDQT - 20 100
16.7.2 Single point indication related signals combining function block

INDCOMBSPQT GUID-13C9325D-D3A0-480F-9F3B-738A13E0ECF8 v3
GUID-EEBD65A5-394C-4ECD-BF6F-D556B610FC57 v2
The value of single point input (SP_IN) is copied to the value part of the SP_OUT output. The TIME
input is copied to the time part of the SP_OUT output. State input bits are copied to the
corresponding state part of the SP_OUT output. If the state or value on the SP_OUT output
changes, the Event bit in the state part is toggled.
INDCOMBSPQT can propagate the quality, the value and the time stamps of the signals via
IEC61850.
16.7.2.1 Function block GUID-55B49FC7-8239-4891-BE16-29296A8F40BE v1
INDCOMBSPQT
SP_IN* SP_OUT
TIME*
BLOCKED*
SUBST*
INVALID*
TEST*
IEC15000146.vsd
Figure 538: INDCOMBSPQT function block
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Table 716: INDCOMBSPQT Input signals

SP_IN BOOLEAN 0 Single point indication
TIME GROUP 0 Timestamp
SIGNAL
BLOCKED BOOLEAN 0 Blocked for update
SUBST BOOLEAN 0 Substituted
INVALID BOOLEAN 0 Invalid value
TEST BOOLEAN 0 Testmode
Table 717: INDCOMBSPQT Output signals

SP_OUT BOOLEAN Single point indication

GUID-27DF23C0-A0B2-4BB0-80B5-FC7B7F7FE448 v1
Table 718: Number of INDCOMBSPQT instances

3 ms 8 ms 100 ms
INDCOMBSPQT - 10 10
16.7.3 Single point input signal attributes converting function block

INDEXTSPQT GUID-9C3D6C45-6B3A-466C-86A1-3DBCD4809B33 v1
GUID-9B700C69-4DAE-434A-BCE6-CE2D1139680A v2
The value part of the single point input signal SI_IN is copied to SI_OUT output. The time part of
single point input is copied to the TIME output. The state bits in the common part and the
indication part of the input signal are copied to the corresponding state output.
INDEXTSPQT can propagate the quality, the value and the time stamps of the signals via IEC61850.
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16.7.3.1 Function block GUID-04AA5209-B919-4161-A585-336CE9618A89 v2
INDEXTSPQT
SI_IN* SI_OUT
TIME
BLOCKED
SUBST
INVALID
TEST
Figure 539: INDEXTSPQT function block
Table 719: INDEXTSPQT Input signals

SI_IN BOOLEAN 0 Single indication
Table 720: INDEXTSPQT Output signals

SI_OUT BOOLEAN Single indication
TIME GROUP SIGNAL Timestamp of input
BLOCKED BOOLEAN Blocked for update
SUBST BOOLEAN Substituted
INVALID BOOLEAN Invalid value
TEST BOOLEAN Testmode

GUID-C1E61AE5-22CF-4198-97CF-8C8043EE96D2 v1
Table 721: Number of INDEXTSPQT instances

3 ms 8 ms 100 ms
INDEXTSPQT - 10 10
16.7.4 Invalid logic function block INVALIDQT GUID-66C6DCEE-1F0E-4EB8-9ADB-97F8B41E53DF v3
Component which sets quality invalid of outputs according to a "valid" input.
The values of the input signals INPUTx (where 1<x<16) are copied to the outputs OUTPUTx (where
1<x<16). If the input VALID is 0 or if its quality bit is set invalid, all outputs OUTPUTx (where
1<x<16) quality bit will be set to invalid. The time stamp of any output OUTPUTx (where 1<x<16)
will be set to the latest time stamp of any input and the input VALID.
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INVALIDQT can propagate the quality, the value and the time stamps of the signals via IEC61850.
16.7.4.1 Function block GUID-0BD84306-0965-4702-8D5C-9570A70168EA v1
INVALIDQT
INPUT1 OUTPUT1
INPUT2 OUTPUT2
INPUT3 OUTPUT3
INPUT4 OUTPUT4
INPUT5 OUTPUT5
INPUT6 OUTPUT6
INPUT7 OUTPUT7
INPUT8 OUTPUT8
INPUT9 OUTPUT9
INPUT10 OUTPUT10
INPUT11 OUTPUT11
INPUT12 OUTPUT12
INPUT13 OUTPUT13
INPUT14 OUTPUT14
INPUT15 OUTPUT15
INPUT16 OUTPUT16
VALID
iec08000169.vsd
Figure 540: INVALIDQT function block
Table 722: INVALIDQT Input signals

INPUT1 BOOLEAN 0 Indication input 1
VALID BOOLEAN 1 Inputs are valid or invalid
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Table 723: INVALIDQT Output signals

OUTPUT1 BOOLEAN Indication output 1

GUID-77FEBE9B-0882-4E85-8B1A-7671807BFC02 v1
Table 724: Number of INVALIDQT instances

3 ms 8 ms 100 ms
INVALIDQT - 6 6
16.7.5 Inverter function block INVERTERQT GUID-502064E0-FE2F-43C0-AA40-79D058FC3E1C v3
The INVERTERQT function block inverts one binary input signal to the output. It can propagate the
quality, value and the time stamps of the signals via IEC61850.
16.7.5.1 Function block GUID-06C5C594-E00B-4FD5-8B0F-4ED05DB348B6 v2
INVERTERQT
INPUT OUT
Figure 541: INVERTERQT function block
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Table 725: INVERTERQT Input signals

Table 726: INVERTERQT Output signals


GUID-F25B94C6-9CC9-48A0-A7A3-47627D2B56E2 v1
Table 727: Number of INVERTERQT instances

3 ms 8 ms 100 ms
INVERTERQT - 20 100
16.7.6 ORQT function block GUID-F8F8D591-F895-4BCB-ADBD-5F95E7B70FEB v2
GUID-F8AECD9C-83FC-4025-9AB5-809D88122277 v3
The ORQT function block (ORQT) is used to form general combinatory expressions OR with
boolean variables. ORQT function block has up to six inputs and two outputs. One of the outputs
is inverted. It can propagate the quality, value and the timestamps of the signals via IEC61850.
16.7.6.1 Function block GUID-BCDFD5F0-4F30-4012-BA49-2E5C2115912E v2
ORQT
INPUT1 OUT
INPUT2 NOUT
INPUT3
INPUT4
INPUT5
INPUT6
Figure 542: ORQT function block
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Table 728: ORQT Input signals

Table 729: ORQT Output signals


GUID-88B27B3C-26D2-47AF-9878-CC19018171B1 v1
Table 730: Number of ORQT instances

3 ms 8 ms 100 ms
ORQT - 20 100
16.7.7 Pulse timer function block PULSETIMERQT GUID-5CB71BD1-58A0-4A06-9207-6DAE389B5288 v2
GUID-D930E5A7-C564-4464-B97F-C72B4801C917 v3
The pulse timer function block (PULSETIMERQT) can be used, for example, for pulse extensions or
for limiting the operation time of the outputs. PULSETIMERQT has a settable output pulse length.
When the input goes to 1, the output will be 1 for the time set by the time delay parameter t. Then
it returns to 0.
When the output changes value, the time stamp of the output signal is updated.
The supported “quality” state bits are propagated from the input to the output at each execution
cycle. A change of these bits will not lead to an updated time stamp on the output.
PULSETIMERQT can propagate the quality, value and the time stamps of the signals via IEC61850.
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16.7.7.1 Function block GUID-C0490ECF-5C4E-4F17-B628-482694C590D2 v1
PULSETIMERQT
INPUT OUT
IEC15000145.vsd
Figure 543: PULSETIMERQT function block
Table 731: PULSETIMERQT Input signals

Table 732: PULSETIMERQT Output signals

16.7.7.3 Settings
Table 733: PULSETIMERQT Non group settings (basic)

t 0.000 - s 0.001 0.010 Pulse time length
90000.000

GUID-61263951-53A8-4113-82B5-3DB3BF0D9449 v1
Table 734: Number of PULSETIMERQT instances

3 ms 8 ms 100 ms
PULSETIMERQT - 10 30 (0.000–90000.000) s ±0.5% ±10 ms
16.7.8 Reset/Set function block RSMEMORYQT GUID-095B2670-610E-47AE-A5D3-F3E7C0A56B65 v2
GUID-32A1B759-2ED8-45B3-8385-762167626CE2 v4
The Reset-set function (RSMEMORYQT) is a flip-flop with memory that can reset or set an output
from two inputs respectively. Each RSMEMORYQT function block has two outputs, where one is
inverted. The memory setting controls if, after a power interruption, the flip-flop resets or returns
to the state it had before the power interruption. For a Reset-Set flip-flop, the RESET input has
higher priority than the SET input.
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RSMEMORYQT can propagate the quality, the value and the time stamps of the signals via
IEC61850.
Table 735: Truth table for RSMEMORYQT function block

RESET SET OUT NOUT
0 0 Last Inverted last
value value
0 1 1 0
1 0 0 1
1 1 0 1
16.7.8.1 Function block GUID-BDBFD8BA-9253-4277-96D8-0FF7EE93B56E v1
RSMEMORYQT
SET OUT
RESET NOUT
Figure 544: RSMEMORYQT function block
Table 736: RSMEMORYQT Input signals

Table 737: RSMEMORYQT Output signals

16.7.8.3 Settings
Table 738: RSMEMORYQT Group settings (basic)

Enabled
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GUID-94C803B4-6C5A-4072-AB5C-20DDE98C9A70 v1
Table 739: Number of RSMEMORYQT instances

3 ms 8 ms 100 ms
RSMEMORYQT - 10 30
16.7.9 Set/Reset function block SRMEMORYQT GUID-D910BA2D-07FA-44C5-A820-E0413AD7FD91 v2
GUID-39060D4B-9AA7-4505-9487-88B2CBC534F0 v4
The Set-reset function (SRMEMORYQT) is a flip-flop with memory that can set or reset an output
from two inputs respectively. Each SRMEMORYQT function block has two outputs, where one is
inverted. The memory setting controls if, after a power interruption, the flip-flop resets or returns
to the state it had before the power interruption. The SET input has priority.
SRMEMORYQT can propagate the quality, the value and the time stamps of the signals via
IEC61850.
Table 740: Truth table for SRMEMORYQT function block

SET RESET OUT NOUT
0 0 Last Inverted
value last value
0 1 0 1
1 0 1 0
1 1 1 0
If Memory parameter is Enabled, the output result is stored in semi-retained memory.
16.7.9.1 Function block GUID-8B04BA86-9685-4E73-9C04-3AE74752CDBF v1
SRMEMORYQT
SET OUT
RESET NOUT
Figure 545: SRMEMORYQT function block
Table 741: SRMEMORYQT Input signals

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Table 742: SRMEMORYQT Output signals

16.7.9.3 Settings
Table 743: SRMEMORYQT Group settings (basic)

Enabled

GUID-341562FB-6149-495B-8A63-200DF16A5590 v1
Table 744: Number of SRMEMORYQT instances

3 ms 8 ms 100 ms
SRMEMORYQT - 10 30
16.7.10 Settable timer function block TIMERSETQT GUID-582D9F19-9974-40D6-95EB-7BAD72910748 v2
GUID-3830BCA7-4876-481E-B5AC-2104675232E7 v4
The Settable timer function block (TIMERSETQT) has two outputs for delay of the input signal at
pick-up and drop-out. The timer has a settable time delay (t). It also has an Operation setting
On/Off that controls the operation of the timer.
When the output changes value, the timestamp of the output signal is updated. The supported
“quality” state bits are propagated from the input to the output at each execution cycle. A change
of these bits will not lead to an updated timestamp on the output.
TIMERSETQT can propagate the quality, value and the timestamps of the signals via IEC61850.
16.7.10.1 Function block GUID-13589BAE-38AE-46A1-8E9F-94BCD1CBCBF1 v1
TIMERSETQT
INPUT ON
OFF
Figure 546: TIMERSETQT function
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Table 745: TIMERSETQT Input signals

Table 746: TIMERSETQT Output signals

ON BOOLEAN Output signal, pick-up delayed
OFF BOOLEAN Output signal, drop-out delayed
16.7.10.3 Settings
Table 747: TIMERSETQT Group settings (basic)

Enabled
t 0.000 - s 0.001 0.000 Delay for settable timer n
90000.000

GUID-B6231B97-05ED-40E8-B735-1E1A50FDB85F v1
Table 748: Number of TIMERSETQT instances

3 ms 8 ms 100 ms
TIMERSETQT - 10 30 (0.000–90000.000) s ±0.5% ±10 ms
16.7.11 Exclusive OR function block XORQT GUID-76ADACC1-A273-4100-BE62-99BCDABFEB7A v2
GUID-62986D87-1690-499E-B8D3-1F51D2DA191E v3
The exclusive OR function (XORQT) function is used to generate combinatory expressions with
boolean variables. XORQT function has two inputs and two outputs. One of the outputs is
inverted. The output signal OUT is 1 if the input signals are different and 0 if they are equal.
Table 749: Truth table for XORQT function block

INPUT1 INPUT2 OUT NOUT
0 0 0 1
0 1 1 0
1 0 1 0
1 1 0 1
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XORQT can propagate the quality, value and time stamps of the signals via IEC61850.
16.7.11.1 Function block GUID-A685524C-DF12-4BA8-A29C-A027CEAC75E5 v2
XORQT
INPUT1 OUT
INPUT2 NOUT
Figure 547: XORQT function block
Table 750: XORQT Input signals

Table 751: XORQT Output signals


GUID-1C381E02-6B9E-44DC-828F-8B3EA7EDAA54 v1
Table 752: Number of XORQT instances

3 ms 8 ms 100 ms
XORQT - 10 30
16.8 Extension logic package IP11362-1 v2
When extra configurable logic blocks are required, an additional package can be ordered.
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GUID-19810098-1820-4765-8F0B-7D585FFC0C78 v6
Table 753: Number of instances in the extension logic package

3 ms 8 ms 100 ms
AND 40 40 100
GATE - - 49
INV 40 40 100
LLD - - 49
OR 40 40 100
PULSETIMER 5 5 49
SLGAPC 10 10 54
SRMEMORY - - 110
TIMERSET - - 49
VSGAPC 10 10 110
XOR - - 49
16.9 Fixed signals FXDSIGN
SEMOD167904-2 v2

Fixed signals FXDSIGN - -
The Fixed signals function FXDSIGN generates nine pre-set (fixed) signals that can be used in the
configuration of an IED, either for forcing the unused inputs in other function blocks to a certain
level/value, or for creating certain logic. Boolean, integer, floating point, string types of signals are
available.
One FXDSIGN function block is included in all IEDs.
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FXDSIGN
OFF
ON
INTZERO
INTONE
INTALONE
REALZERO
STRNULL
ZEROSMPL
GRP_OFF
Figure 548: FXDSIGN function block
16.9.4 Signals
Table 754: FXDSIGN Output signals

OFF BOOLEAN Boolean signal fixed off
ON BOOLEAN Boolean signal fixed on
INTZERO INTEGER Integer signal fixed zero
INTONE INTEGER Integer signal fixed one
INTALONE INTEGER Integer signal fixed all ones
REALZERO REAL Real signal fixed zero
STRNULL STRING String signal with no characters
ZEROSMPL GROUP SIGNAL Channel id for zero sample
GRP_OFF GROUP SIGNAL Group signal fixed off
16.9.5 Settings
The function does not have any settings available in Local HMI or Protection and Control IED
Manager (PCM600).
There are nine outputs from FXDSIGN function block:
• OFF is a boolean signal, fixed to OFF (boolean 0) value

• ON is a boolean signal, fixed to ON (boolean 1) value
• INTZERO is an integer number, fixed to integer value 0
• INTONE is an integer number, fixed to integer value 1
• INTALONE is an integer value FFFF (hex)
• REALZERO is a floating point real number, fixed to 0.0 value
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• STRNULL is a string, fixed to an empty string (null) value

• ZEROSMPL is a channel index, fixed to 0 value
• GRP_OFF is a group signal, fixed to 0 value
16.10 Boolean 16 to Integer conversion B16I SEMOD175715-1 v1
SEMOD175721-2 v2

Boolean 16 to integer conversion B16I - -
SEMOD175725-4 v4
Boolean 16 to integer conversion function B16I is used to transform a set of 16 binary (logical)
signals into an integer.
B16I
BLOCK OUT
IN1
IN2
IN3
IN4
IN5
IN6
IN7
IN8
IN9
IN10
IN11
IN12
IN13
IN14
IN15
IN16
Figure 549: B16I function block
16.10.3 Signals
Table 755: B16I Input signals

IN1 BOOLEAN 0 Input 1
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Table 756: B16I Output signals

OUT INTEGER Output value

Table 757: B16I Monitored data

OUT INTEGER - - Output value
The Boolean 16 to integer conversion function (B16I) will transfer a combination of up to 16 binary
inputs INx, where 1≤x≤16, to an integer. Each INx represents a value according to the table below
from 0 to 32768. This follows the general formula: INx = 2x-1 where 1≤x≤16. The sum of all the values
on the activated INx will be available on the output OUT as a sum of the integer values of all the
inputs INx that are activated. OUT is an integer. When all INx (where 1≤x≤16) are activated, that is =
Boolean 1, it corresponds to that integer 65535 is available on the output OUT. The B16I function is
designed for receiving up to 16 booleans input locally. If the BLOCK input is activated, it will freeze
the output at the last value.
Values of each of the different OUTx from function block B16I for 1≤x≤16.
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The sum of the value on each INx corresponds to the integer presented on the output OUT on the
function block B16I
Name of input Type Default Description Value when Value when

activated deactivated
IN1 BOOLEAN 0 Input 1 1 0
The sum of the numbers in column “Value when activated” when all INx (where 1≤x≤16) are active
that is=1; is 65535. 65535 is the highest boolean value that can be converted to an integer by the
B16I function block.

GUID-65A2876A-F779-41C4-ACD7-7662D1E7F1F2 v1
Table 758: Number of B16I instances

3 ms 8 ms 100 ms
B16I 6 4 8
16.11 Boolean to integer conversion with logical node

representation, 16 bit BTIGAPC SEMOD175753-1 v4
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SEMOD175757-2 v5

Boolean to integer conversion with BTIGAPC - -
logical node representation, 16 bit
Boolean to integer conversion with logical node representation, 16 bit (BTIGAPC) is used to
transform a set of 16 boolean (logical) signals into an integer. The block input will freeze the
output at the last value.
BTIGAPC
BLOCK OUT
IN1
IN2
IN3
IN4
IN5
IN6
IN7
IN8
IN9
IN10
IN11
IN12
IN13
IN14
IN15
IN16
Figure 550: BTIGAPC function block
16.11.4 Signals
Table 759: BTIGAPC Input signals

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Table 760: BTIGAPC Output signals

OUT INTEGER Output value

Table 761: BTIGAPC Monitored data

OUT INTEGER - - Output value
The Boolean 16 to integer conversion with logic node representation function (BTIGAPC) will
transfer a combination of up to 16 binary inputs INx, where 1≤x≤16, to an integer. Each INx
represents a value according to the table below from 0 to 32768. This follows the general formula:
INx = 2x-1 where 1≤x≤16. The sum of all the values on the activated INx will be available on the
output OUT as a sum of the integer values of all the inputs INx that are activated. OUT is an
integer. When all INx (where 1≤x≤16) are activated, that is = Boolean 1, it corresponds to that
integer 65535 is available on the output OUT. If the BLOCK input is activated, it will freeze the
logical outputs at the last value.
Values of each of the different OUTx from function block BTIGAPC for 1≤x≤16.
function block BTIGAPC.
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Name of input Type Default Description Value when Value when

activated deactivated
The sum of the numbers in column “Value when activated” when all INx (where 1≤x≤16) are active
that is=1; is 65535. 65535 is the highest boolean value that can be converted to an integer by the
BTIGAPC function block.

GUID-3820F464-D296-4CAD-8491-F3F997359D79 v1
Table 762: Number of BTIGAPC instances

3 ms 8 ms 100 ms
BTIGAPC 4 4 8
16.12 Integer to boolean 16 conversion IB16
SEMOD167941-2 v2

Integer to boolean 16 conversion IB16 - -
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Integer to boolean 16 conversion function IB16 is used to transform an integer into a set of 16
binary (logical) signals.
IB16
BLOCK OUT1
INP OUT2
OUT3
OUT4
OUT5
OUT6
OUT7
OUT8
OUT9
OUT10
OUT11
OUT12
OUT13
OUT14
OUT15
OUT16
Figure 551: IB16 function block
16.12.4 Signals
Table 763: IB16 Input signals

INP INTEGER 0 Integer Input
Table 764: IB16 Output signals

OUT1 BOOLEAN Output 1
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16.12.5 Setting parameters ABBD8E242451 v3
The function does not have any parameters available in local HMI or Protection and Control IED
Manager (PCM600)
With integer 15 on the input INP the OUT1 = OUT2 = OUT3= OUT4 =1 and the remaining OUTx = 0
for (5≤x≤16).
OUTx represents a value when activated. The value of each of the OUTx is in accordance with the
table IB16_1. When not activated the OUTx has the value 0.
In the above example when integer 15 is on the input INP the OUT1 has a value =1, OUT2 has a value
=2, OUT3 has a value =4 and OUT4 has a value =8. The sum of these OUTx is equal to 1 + 2 + 4 + 8 =
15.
This follows the general formulae: The sum of the values of all OUTx = 2x-1 where 1≤x≤16 will be
equal to the integer value on the input INP.
The Integer to Boolean 16 conversion function (IB16) will transfer an integer with a value between 0
to 65535 connected to the input INP to a combination of activated outputs OUTx where 1≤x≤16.
The sum of the values of all OUTx will then be equal to the integer on input INP. The values of the
different OUTx are according to the table below. When an OUTx is not activated, its value is 0.
When all OUTx where 1≤x≤16 are activated that is = Boolean 1 it corresponds to that integer 65535
is connected to input INP. The IB16 function is designed for receiving the integer input locally. If
the BLOCK input is activated, it will freeze the logical outputs at the last value.
Values of each of the different OUTx from function block IB16 for 1≤x≤16.
function block IB16.
Name of OUTx Type Description Value when activated Value when

deactivated
OUT1 BOOLEAN Output 1 1 0
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deactivated
The sum of the numbers in column “Value when activated” when all OUTx (where x = 1 to 16) are
active that is=1; is 65535. 65535 is the highest integer that can be converted by the IB16 function
block.

GUID-B45901F4-B163-4696-8220-7F8CAC84D793 v1
Table 765: Number of IB16 instances

3 ms 8 ms 100 ms
IB16 6 4 8
16.13 Integer to Boolean 16 conversion with logic node

representation ITBGAPC SEMOD158419-1 v3
SEMOD167944-2 v4

Integer to boolean 16 conversion ITBGAPC - -
with logic node representation
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Technical manual
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Integer to boolean conversion with logic node representation function ITBGAPC is used to
transform an integer which is transmitted over IEC 61850 and received by the function to 16 binary
coded (logic) output signals.
ITBGAPC function can only receive remote values over IEC 61850 when the R/L (Remote/Local)
push button on the front HMI, indicates that the control mode for the operator is in position R
(Remote i.e. the LED adjacent to R is lit ), and the corresponding signal is connected to the input
PSTO ITBGAPC function block. The input BLOCK will freeze the output at the last received value
and blocks new integer values to be received and converted to binary coded outputs.
ITBGAPC
BLOCK OUT1
PSTO OUT2
OUT3
OUT4
OUT5
OUT6
OUT7
OUT8
OUT9
OUT10
OUT11
OUT12
OUT13
OUT14
OUT15
OUT16
Figure 552: ITBGAPC function block
16.13.4 Signals
Table 766: ITBGAPC Input signals

Table 767: ITBGAPC Output signals

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Technical manual
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16.13.5 Settings
GUID-F573CA16-4821-4203-970A-F7D01AF5E63B v1
This function does not have any setting parameters.
An example is used to explain the principle of operation: With integer 15 sent to and received by
the ITBGAPC function on the IEC61850 the OUTx changes from 0 to 1 on each of the OUT1; OUT2
OUT3 and OUT4. All other OUTx (5≤x≤16) remains 0. The boolean interpretation of this is
represented by the assigned values of each of the outputs OUT1 = 1; and OUT2 = 2; and OUT3= 4;
and OUT4 = 8. The sum of these OUTx (1≤x≤4) is equal to the integer 15 received via the IEC61850
network. The remaining OUTx = 0 for (5≤x≤16).
OUTx represents a value when activated. The value of each of the OUTx is in accordance with the
Table 768. When not activated the OUTx has the value 0.
The value of each OUTx for 1≤x≤16 (1≤x≤16) follows the general formulae: OUTx = 2x-1 The sum of
the values of all activated OUTx = 2x-1 where 1≤x≤16 will be equal to the integer value received over
IEC61850 to the ITBGAPC_1 function block.
The Integer to Boolean 16 conversion with logic node representation function (ITBGAPC) will
transfer an integer with a value between 0 to 65535 communicated via IEC61850 and connected to
the ITBGAPC function block to a combination of activated outputs OUTx where 1≤x≤16. The values
represented by the different OUTx are according to Table 768. When an OUTx is not activated, its
value is 0.
The ITBGAPC function is designed for receiving the integer input from a station computer - for
example, over IEC 61850. If the BLOCK input is activated, it will freeze the logical outputs at the
last value.
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Table 768: Outputs and their values when activated

deactivated
The sum of the numbers in column “Value when activated” when all OUTx (1≤x≤16) are active
equals 65535. This is the highest integer that can be converted to boolean by the ITBGAPC
function block.
The operator position input (PSTO) determines the operator place. The integer number that is
communicated to the ITBGAPC can only be written to the block while the PSTO is in position
“Remote”. If PSTO is in position ”Off” or ”Local”, then no changes are applied to the outputs.

GUID-A339BBA3-8FD0-429D-BB49-809EAC4D53B0 v1
Table 769: Number of ITBGAPC instances

3 ms 8 ms 100 ms
ITBGAPC 4 4 8
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16.14 Elapsed time integrator with limit transgression and

overflow supervision TEIGAPC
16.14.1 Identification GUID-1913E066-37D1-4689-9178-5B3C8B029815 v2
Function Description IEC 61850 IEC 60617 ANSI/IEEE C37.2 device

identification identification number
Elapsed time integrator TEIGAPC - -
16.14.2 Functionality GUID-390D7433-0C1C-48B4-9A90-71AA148C3C35 v3
Elapsed Time Integrator (TEIGAPC) function is a function that accumulates the elapsed time when
a given binary signal has been high, see also Figure 553.
BLOCK
RESET
IN Time Integration ACCTIME
with Retain
q-1
a
OVERFLOW
AND
a>b
999 999 s b
a
WARNING
AND
a>b
tWarning b
a
ALARM
AND
a>b
tAlarm b
q-1 = unit delay IEC13000290-2-en.vsd
Figure 553: TEIGAPC logics

The main features of TEIGAPC
• Applicable to long time integration up to 999 999.9 seconds

• Supervision of overflow
• Possibility to define a warning and an alarm with the resolution of 10 milliseconds
• Retain the integration value
• Possibilities for blocking and reset of the total integrated time
• Report of the integrated time
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16.14.3 Function block GUID-6D50A060-7751-405B-AEC1-FAE942EBDA64 v2
TEIGAPC
BLOCK WARNING
IN ALARM
RESET OVERFLOW
ACCTIME
Figure 554: TEIGAPC function block
16.14.4 Signals
Table 770: TEIGAPC Input signals

BLOCK BOOLEAN 0 Freeze the integration and block the other outputs
IN BOOLEAN 0 The input signal that is used to measure the elapsed time, when
its value is high
RESET BOOLEAN 0 Reset the integration time
Table 771: TEIGAPC Output signals

WARNING BOOLEAN Indicator of the integrated time has reached the warning limit
ALARM BOOLEAN Indicator of the integrated time has reached the alarm limit
OVERFLOW BOOLEAN Indicator of the integrated time has reached the overflow limit
ACCTIME REAL Integrated elapsed time in seconds
16.14.5 Settings
Table 772: TEIGAPC Group settings (basic)

Enabled
tWarning 1.00 - 999999.99 s 0.01 600.00 Time limit for warning supervision
tAlarm 1.00 - 999999.99 s 0.01 1200.00 Time limit for alarm supervision
16.14.6 Operation principle GUID-04CC8365-DCDE-4DC7-BEF0-6EF8382305DD v3
The elapsed time integrator (TEIGAPC) provides
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• time integration, accumulating the elapsed time when a given binary signal has been high
• blocking and reset of the total integrated time
• supervision of limit transgression and overflow, the overflow limit is fixed to 999999.9
seconds
• retaining of the integrated value
Figure 555 describes the simplified logic of the function where the block “Time Integration“ covers
the logics for the first two items listed above while the block “Transgression Supervision Plus
Retain“ contains the logics for the last two.
Loop Delay
tWarning
OVERFLOW
tAlarm
Transgression Supervision WARNING
Plus Retain
ALARM
BLOCK
RESET ACCTIME
Time Integration
IN
Loop Delay
Figure 555: TEIGAPC Simplified logic

TEIGAPC main functionalities
• integration of the elapsed time when IN has been high

• applicable to long time integration (≤999 999.9 seconds)
• output ACCTIME presents integrated value in seconds
• integrated value is retained in nonvolatile memory
• any retained value with a warning/alarm/overflow is used as initiation value for the
integration following by a restart
• RESET: Reset of the integration value. Consequently all other outputs are also reset
• unconditionally on the input IN value
• reset the value of the nonvolatile memory to zero
• BLOCK: Freeze the integration and block/reset the other outputs
• unconditionally on the signal value
• BLOCK request overrides RESET request
• Monitor and report the conditions of limit transgression
• overflow if output ACCTIME >999999.9 seconds
• alarm if ACCTIME > tAlarm
• warning if ACCTIME > tWarning
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The ACCTIME output represents the integrated time in seconds while tOverflow, tAlarm and
tWarning are the time limit parameters in seconds.
tAlarm and tWarning are user settable limits. They are also independent, that is, there is no check
if tAlarm > tWarning.
tAlarm and tWarning are possible to be defined with a resolution of 10 ms, depending on the level
of the defined values for the parameters.
The limit for the overflow supervision is fixed at 999999.9 seconds. The outputs freeze if an
overflow occurs.
16.14.6.1 Operation accuracy GUID-E0772193-9F6E-43DA-B642-2923565E5D4C v3
The accuracy of TEIGAPC depends on essentially three factors
• function cycle time

• the pulse length
• the number of pulses, that is, the number of rising and falling flank pairs
In principle, a shorter function cycle time, longer integrated time length or more pulses may lead
to reduced accuracy.
16.14.6.2 Memory storage GUID-6FDD6590-30F9-4CC1-AC9D-945544AB8688 v3
The value of the integrated elapsed time is retained in a non-volatile memory.

GUID-B258726E-1129-47C9-94F9-BE634A2085FA v3
Table 773: TEIGAPC Technical data

Function Cycle time (ms) Range or value Accuracy
Elapsed time integration 3 0 ~ 999999.9 s ±0.2% or ±20 ms whichever
is greater
8 0 ~ 999999.9 s ±0.2% or ±100 ms whichever
is greater
100 0 ~ 999999.9 s ±0.2% or ±250 ms whichever
is greater
Table 774: Number of TEIGAPC instances

3 ms 8 ms 100 ms
TEIGAPC 4 4 4
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16.15 Comparator for integer inputs - INTCOMP
16.15.1 Identification GUID-5992B0F2-FC1B-4838-9BAB-2D2542BB264D v1

Comparison of integer values INTCOMP Int<=>
16.15.2 Functionality GUID-A93564FA-0017-4939-A9C1-095DA0FD9832 v1
The function gives the possibility to monitor the level of integer values in the system relative to
each other or to a fixed value. It is a basic arithmetic function that can be used for monitoring,
supervision, interlocking and other logics.
16.15.3 Function block GUID-EB28F45B-B1D0-452F-98B4-F96D7FA34069 v1
INTCOMP
INPUT INEQUAL
REF INHIGH
INLOW
16.15.4 Operation principle GUID-E9C1B863-ACA7-45C0-91F1-A51FE38755FE v1
The comparison can be done in two ways,
• Between 2 inputs, INPUT and REF

• Between INPUT and the value set by the user SetValue.
The selection of reference value for comparison can be done through setting RefSource. If
RefSource is selected as REF then the reference value for comparison is taken from second input
signal (REF). If RefSource is selected as SetValue then the reference value for comparison is taken
from setting (SetValue).
The comparison can be done either between absolute values or signed values and it depends on
the setting EnaAbs. If EnaAbs is selected as Absolute then both input and reference value is
converted into absolute values and comparison is done. If EnaAbs is selected as Signed then the
comparison is done without any conversion.
The function has three state outputs high, low and equal to condition. It will check the following
condition and give corresponding outputs.
• If the input is above the reference value then INHIGH will set
• If the input is below the reference value then INLOW will set
• If the input is equal to reference value then INEQUAL will set
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EnaAbs
INPUT ABS T a
F INHIGH
a>b
b
a INEQUAL
a=b
b
RefSource
REF ABS T
T
SetValue
F a INLOW
F a<b
b
Figure 556: Function logic diagram for INTCOMP
16.15.5 Signals
Table 775: INTCOMP Input signals

INPUT INTEGER 0 Input value to be compared with reference value
REF INTEGER 0 Reference value to be compared with input value
Table 776: INTCOMP Output signals

INEQUAL BOOLEAN Input value is equal to the reference value
INHIGH BOOLEAN Input value is higher than the reference value
INLOW BOOLEAN Input value is lower than the reference value
16.15.6 Settings
Table 777: INTCOMP Group settings (basic)

EnaAbs Signed - - Signed Selection for absolute or signed
Absolute comparison
RefSource Set Value - - Set Value Selection for reference value either input
Input REF or setting
SetValue -2000000000 - - 1 100 Set value for reference
2000000000
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16.16 Comparator for real inputs - REALCOMP
16.16.1 Identification GUID-0D68E846-5A15-4C2C-91A2-F81A74034E81 v1

Comparator for real inputs REALCOMP Real<=>
16.16.2 Functionality GUID-E17A88D7-D095-4F36-9CD5-64EBFD2A1DEA v1
The function gives the possibility to monitor the level of real value signals in the system relative to
each other or to a fixed value. It is a basic arithmetic function that can be used for monitoring,
supervision, interlocking and other logics.
16.16.3 Function block GUID-8752DF2A-D131-4461-80C6-C52F9980D228 v1
REALCOMP
INPUT INEQUAL
REF INHIGH
INLOW
16.16.4 Signals
Table 778: REALCOMP Input signals

INPUT REAL 0.000 Input value to be compared with reference value
REF REAL 0.000 Reference value to be compared with input value
Table 779: REALCOMP Output signals

INEQUAL BOOLEAN Input value is equal to the reference value
INHIGH BOOLEAN Input value is higher than the reference value
INLOW BOOLEAN Input value is lower than the reference value
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16.16.5 Settings
Table 780: REALCOMP Group settings (basic)

EnaAbs Signed - - Signed Selection for absolute or signed
Absolute comparison
RefSource Set Value - - Set Value Selection for reference value either input
Input REF or setting
SetValue -999.999 - - 0.001 0.001 Set value for reference
999.999
SetValPrefix milli - - unit Multiplication factor for SetValue
unit
kilo
Mega
Giga
EqualBandHigh 0.10 - 10.00 % 0.01 0.50 Equal band high limit in % of reference
value
EqualBandLow 0.10 - 10.00 % 0.01 0.50 Equal band low limit in % of reference
value
16.16.6 Operation principle GUID-3FA699A8-D076-4E5E-BCB8-C6B7907573D1 v1
The comparison can be done in two ways,
1. Between 2 inputs, INPUT and REF

2. Between INPUT and the value set by the user SetValue
The selection of reference value for comparison can be done through setting RefSource. If
RefSource is selected as REF then the reference value for comparison is taken from second input
signal (REF). If RefSource is selected as SetValue then the reference value for comparison is taken
from setting (SetValue).
Generally the inputs to the function are in SI units, but when the comparison is to be done with
respect to set level, then the user can set a value in any unit out of Milli to Giga range in setting
SetValue. The unit can be separately set with setting RefPrefix. Internally the function handles the
reference value for comparator as SetValue*RefPrefix.
Additionally the comparison can be done either between absolute values or signed values and it
depends on the setting EnaAbs. If EnaAbs is selected as Absolute then both input and reference
value is converted into absolute values and comparison is done. If EnaAbs is selected as Signed
then the comparison is done without any conversion.
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EnaAbs
INPUT
ABS T
F
High
Comparator
EqualBandHigh INHIGH
RefSource XOR INEQUAL
REF ABS T
T Low
F
SetValue F comparator
INLOW
RefPrefix
EqualBandLow
Figure 557: Logic diagram for REALCOMP

This function has two settings EqualBandHigh and EqualBandLow to provide margins from
reference value for equal to condition. When the INPUT value is within high and low band, output
INEQUAL will get set.
If the INPUT is above the equal high level margin then output INHIGH will set. Similarly if the INPUT
is below the equal low level margin then output INLOW will set. In order to avoid oscillations at
boundary conditions of equal band low limit and high limit, hysteresis has been provided
INEQUAL Reset / INHIGH Set INEQUAL Set / INHIGH Reset
EqualBandHigh
Internal
Equal Band REF or SetValue Hysteresis for
equal band
EqualBandLow
INEQUAL Reset / INLOW Set INEQUAL Set / INLOW Reset

Figure 558: Operation principle of REALCOMP
When EnaAbs is set as absolute comparison and SetValue is set less than 0.2% of
the set unit then INLOW output will never pickups. During the above mentioned
condition, due to marginal value for avoiding oscillations of function outputs, the
INLOW output will never set.
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GUID-62792FCB-B436-4034-9A08-C9FF918FF547 v1
REALCOMP function can compare the values from milli value level to giga value level and the
maximum expectable accuracy level from the function is 10 µ.
GUID-3FDD7677-1D86-42AD-A545-B66081C49B47 v1
Table 781: REALCOMP Technical data

Function Accuracy
Operate value, ±0.5% of set value
EqualBandHigh
and EqualBandLow
Reset value, > 0.1% of set RefPrefix
EqualBandHigh
Reset value, < 0.1% of set RefPrefix
EqualBandLow
Table 782: Number of REALCOMP instances

3 ms 8 ms 100 ms
REALCOMP 4 4 4
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Section 17 Monitoring
17.1 Measurements IP14593-1 v3
SEMOD56123-2 v7

Measurements CVMMXN -
P, Q, S, I, U, f
SYMBOL-RR V1 EN-US
Phase current measurement CMMXU -
SYMBOL-SS V1 EN-US
Phase-phase voltage measurement VMMXU -
SYMBOL-UU V1 EN-US
Current sequence component CMSQI -

measurement
I1, I2, I0
SYMBOL-VV V1 EN-US
Voltage sequence component VMSQI -

measurement
U1, U2, U0
SYMBOL-TT V1 EN-US
Phase-neutral voltage measurement VNMMXU -
SYMBOL-UU V1 EN-US
Measurement functions are used for power system measurement, supervision and reporting to
the local HMI, monitoring tool within PCM600 or to station level for example, via IEC 61850. The
possibility to continuously monitor measured values of active power, reactive power, currents,
voltages, frequency, power factor etc. is vital for efficient production, transmission and
distribution of electrical energy. It provides to the system operator fast and easy overview of the
present status of the power system. Additionally, it can be used during testing and commissioning
of protection and control IEDs in order to verify proper operation and connection of instrument
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transformers (CTs and VTs). During normal service by periodic comparison of the measured value
from the IED with other independent meters the proper operation of the IED analog measurement
chain can be verified. Finally, it can be used to verify proper direction orientation for distance or
directional overcurrent protection function.
The available measured values of an IED are depending on the actual hardware
(TRM) and the logic configuration made in PCM600.
All measured values can be supervised with four settable limits that is, low-low limit, low limit, high
limit and high-high limit. A zero clamping reduction is also supported, that is, the measured value
below a settable limit is forced to zero which reduces the impact of noise in the inputs.
Dead-band supervision can be used to report measured signal value to station level when change
in measured value is above set threshold limit or time integral of all changes since the last time
value updating exceeds the threshold limit. Measure value can also be based on periodic reporting.
Main menu/Measurement/Monitoring/Service values/CVMMXN
The measurement function, CVMMXN, provides the following power system quantities:
• P, Q and S: three phase active, reactive and apparent power

• PF: power factor
• V: phase-to-phase voltage magnitude
• I: phase current magnitude
• F: power system frequency
,
The measuring functions CMMXU, VMMXU and VNMMXU provide physical quantities:
• I: phase currents (magnitude and angle) (CMMXU)

• V: voltages (phase-to-ground and phase-to-phase voltage, magnitude and angle) (VMMXU,
VNMMXU)
The CVMMXN function calculates three-phase power quantities by using fundamental frequency
phasors (DFT values) of the measured current respectively voltage signals. The measured power
quantities are available either, as instantaneously calculated quantities or, averaged values over a
period of time (low pass filtered) depending on the selected settings.
It is possible to calibrate the measuring function above to get better then class 0.5 presentation.
This is accomplished by angle and magnitude compensation at 5, 30 and 100% of rated current
and at 100% of rated voltage.
The power system quantities provided, depends on the actual hardware, (TRM) and
the logic configuration made in PCM600.
The measuring functions CMSQI and VMSQI provide sequence component quantities:
• I: sequence currents (positive, zero, negative sequence, magnitude and angle)

• V: sequence voltages (positive, zero and negative sequence, magnitude and angle).
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The available function blocks of an IED are depending on the actual hardware (TRM) and the logic
configuration made in PCM600.
CVMMXN
I3P* S
V3P* S_RANGE
P_INST
P
P_RANGE
Q_INST
Q
Q_RANGE
PF
PF_RANGE
ILAG
ILEAD
V
V_RANGE
I
I_RANGE
F
F_RANGE
Figure 559: CVMMXN function block
CMMXU
I3P* I_A
IA_RANGE
IA_ANGL
I_B
IB_RANGE
IB_ANGL
I_C
IC_RANGE
IC_ANGL
Figure 560: CMMXU function block
VMMXU
V3P* V_AB
VAB_RANG
VAB_ANGL
V_BC
VBC_RANG
VBC_ANGL
V_CA
VCA_RANG
VCA_ANGL
Figure 561: VMMXU function block
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CMSQI
I3P* 3I0
3I0RANG
3I0ANGL
I1
I1RANG
I1ANGL
I2
I2RANG
I2ANGL
Figure 562: CMSQI function block
VMSQI
V3P* 3V0
3V0RANG
3V0ANGL
V1
V1RANG
V1ANGL
V2
V2RANG
V2ANGL
Figure 563: VMSQI function block
VNMMXU
V3P* V_A
VA_RANGE
VA_ANGL
V_B
VB_RANGE
VB_ANGL
V_C
VC_RANGE
VC_ANGL
Figure 564: VNMMXU function block
17.1.4 Signals
Table 783: CVMMXN Input signals

SIGNAL
SIGNAL
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Table 784: CVMMXN Output signals

S REAL Apparent Power magnitude of deadband value
S_RANGE INTEGER Apparent Power range
P_INST REAL Active Power
P REAL Active Power magnitude of deadband value
P_RANGE INTEGER Active Power range
Q_INST REAL Reactive Power
Q REAL Reactive Power magnitude of deadband value
Q_RANGE INTEGER Reactive Power range
PF REAL Power Factor magnitude of deadband value
PF_RANGE INTEGER Power Factor range
ILAG BOOLEAN Current is lagging voltage
ILEAD BOOLEAN Current is leading voltage
V REAL Calculated voltage magnitude of deadband value
V_RANGE INTEGER Calculated voltage range
I REAL Calculated current magnitude of deadband value
I_RANGE INTEGER Calculated current range
F REAL System frequency magnitude of deadband value
F_RANGE INTEGER System frequency range
Table 785: CMMXU Input signals

SIGNAL
Table 786: CMMXU Output signals

IA REAL Phase A current magnitude of reported value
IA_RANGE INTEGER Phase A current magnitude range
IA_ANGL REAL Phase A current magnitude angle
IB REAL Phase B current magnitude of reported value
IB_RANGE INTEGER Phase B current magnitude range
IB_ANGL REAL Phase B current magnitude angle
IC REAL Phase C current magnitude of reported value
IC_RANGE INTEGER Phase C current magnitude range
IC_ANGL REAL Phase C current magnitude angle
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Table 787: VMMXU Input signals

V3P GROUP - Group connection abstract block 2
SIGNAL
Table 788: VMMXU Output signals

VAB REAL VAB Reported magnitude value
VAB_RANG INTEGER VAB Magnitude range
VAB_ANGL REAL VAB Angle, magnitude of reported value
VBC REAL VBC Reported magnitude value
VBC_RANG INTEGER VBC Magnitude range
VBC_ANGL REAL VBC Angle, magnitude of reported value
VCA REAL VCA Reported magnitude value
VCA_RANG INTEGER VCA Magnitude range
VCA_ANGL REAL VCA Angle, magnitude of reported value
Table 789: CMSQI Input signals

I3P GROUP - Group connection abstract block 3
SIGNAL
Table 790: CMSQI Output signals

3I0 REAL 3I0 magnitude of reported value
3I0RANG INTEGER 3I0 Magnitude range
3I0ANGL REAL 3I0 Angle, magnitude of reported value
I1 REAL I1magnitude of reported value
I1RANG INTEGER I1 Magnitude range
I1ANGL REAL I1 Angle, magnitude of reported value
I2 REAL I2 Magnitude of reported value
I2RANG INTEGER I2 Magnitude range
I2ANGL REAL I2 Angle, magnitude of reported value
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Table 791: VMSQI Input signals

V3P GROUP - Group connection abstract block 4
SIGNAL
Table 792: VMSQI Output signals

3V0 REAL 3V0 Reported magnitude value
3V0RANG INTEGER 3V0 Magnitude range
3V0ANGL REAL 3V0 Magnitude angle
V1 REAL V1 Reported magnitude value
V1RANG INTEGER V1 Magnitude range
V1ANGL REAL V1 Magnitude angle
V2 REAL V2 Reported magnitude value
V2RANG INTEGER V2 Magnitude range
V2ANGL REAL V2 Magnitude angle
Table 793: VNMMXU Input signals

SIGNAL
Table 794: VNMMXU Output signals

VA REAL VA Amplitude, magnitude of reported value
VA_RANGE INTEGER VAAmplitude range
VA_ANGL REAL VA Angle, magnitude of reported value
VB REAL VB Amplitude, magnitude of reported value
VB_RANGE INTEGER VB Amplitude range
VB_ANGL REAL VB Angle, magnitude of reported value
VC REAL VC Amplitude, magnitude of reported value
VC_RANGE INTEGER VC Amplitude range
VC_ANGL REAL V_C Angle, magnitude of reported value
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The available setting parameters of the measurement function (MMXU, MSQI) are depending on
the actual hardware (TRM) and the logic configuration made in PCM600.
These six functions are not handled as a group, so parameter settings are only available in the first
setting group.
The following terms are used in the Unit and Description columns:
• VBase: Base voltage in primary kV. This voltage is used as reference for voltage setting. It can
be suitable to set this parameter to the rated primary voltage supervised object.
• IBase: Base current in primary A. This current is used as reference for current setting. It can be
suitable to set this parameter to the rated primary current of the supervised object.
• SBase: Base setting for power values in MVA.
Table 795: CVMMXN Non group settings (basic)

SLowLim 0.0 - 2000.0 %SB 0.1 80.0 Low limit in % of SBase
SLowLowLim 0.0 - 2000.0 %SB 0.1 60.0 Low Low limit in % of SBase
SMin 0.0 - 2000.0 %SB 0.1 50.0 Minimum value in % of SBase
SMax 0.0 - 2000.0 %SB 0.1 200.0 Maximum value in % of SBase
SRepTyp Cyclic - - Cyclic Reporting type
Dead band
Int deadband
PMin -2000.0 - 2000.0 %SB 0.1 -200.0 Minimum value in % of SBase
PMax -2000.0 - 2000.0 %SB 0.1 200.0 Maximum value in % of SBase
PRepTyp Cyclic - - Cyclic Reporting type
Dead band
Int deadband
QMin -2000.0 - 2000.0 %SB 0.1 -200.0 Minimum value in % of SBase
QMax -2000.0 - 2000.0 %SB 0.1 200.0 Maximum value in % of SBase
QRepTyp Cyclic - - Cyclic Reporting type
Dead band
Int deadband
PFMin -1.000 - 1.000 - 0.001 -1.000 Minimum value
PFMax -1.000 - 1.000 - 0.001 1.000 Maximum value
PFRepTyp Cyclic - - Cyclic Reporting type
Dead band
Int deadband
VMin 0.0 - 200.0 %VB 0.1 50.0 Minimum value in % of VBase
VMax 0.0 - 200.0 %VB 0.1 200.0 Maximum value in % of VBase
VRepTyp Cyclic - - Cyclic Reporting type
Dead band
Int deadband
IMin 0.0 - 500.0 %IB 0.1 5.0 Minimum value in % of IBase
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IMax 0.0 - 500.0 %IB 0.1 200.0 Maximum value in % of IBase
IRepTyp Cyclic - - Cyclic Reporting type
Dead band
Int deadband
FrMin 0.000 - 100.000 Hz 0.001 0.000 Minimum value
FrMax 0.000 - 100.000 Hz 0.001 70.000 Maximum value
FrRepTyp Cyclic - - Cyclic Reporting type
Dead band
Int deadband
Enabled
groups
Mode A, B, C - - A, B, C Selection of measured current and voltage
Arone
Pos Seq
AB
BC
CA
A
B
C
PowMagFact 0.000 - 6.000 - 0.001 1.000 Magnitude factor to scale power
calculations
PowAngComp -180.0 - 180.0 Deg 0.1 0.0 Angle compensation for phase shift
between measured I & V
k 0.000 - 1.000 - 0.001 0.000 Low pass filter coefficient for power
measurement, V and I
Table 796: CVMMXN Non group settings (advanced)

SDbRepInt 1 - 300 Type 1 10 Cycl: Report interval (s), Db: In % of range,
Int Db: In %s
SZeroDb 0 - 100000 m% 1 500 Zero point clamping in 0.001% of range
SHiHiLim 0.0 - 2000.0 %SB 0.1 150.0 High High limit in % of SBase
SHiLim 0.0 - 2000.0 %SB 0.1 120.0 High limit in % of SBase
SLimHyst 0.000 - 100.000 % 0.001 5.000 Hysteresis value in % of range (common
for all limits)
PDbRepInt 1 - 300 Type 1 10 Cycl: Report interval (s), Db: In % of range,
Int Db: In %s
PZeroDb 0 - 100000 m% 1 500 Zero point clamping in 0.001% of range
PHiHiLim -2000.0 - 2000.0 %SB 0.1 150.0 High High limit in % of SBase
PHiLim -2000.0 - 2000.0 %SB 0.1 120.0 High limit in % of SBase
PLowLim -2000.0 - 2000.0 %SB 0.1 -120.0 Low limit in % of SBase
PLowLowLim -2000.0 - 2000.0 %SB 0.1 -150.0 Low Low limit in % of SBase
PLimHyst 0.000 - 100.000 % 0.001 5.000 Hysteresis value in % of range (common
for all limits)
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QDbRepInt 1 - 300 Type 1 10 Cycl: Report interval (s), Db: In % of range,
Int Db: In %s
QZeroDb 0 - 100000 m% 1 500 Zero point clamping in 0.001% of range
QHiHiLim -2000.0 - 2000.0 %SB 0.1 150.0 High High limit in % of SBase
QHiLim -2000.0 - 2000.0 %SB 0.1 120.0 High limit in % of SBase
QLowLim -2000.0 - 2000.0 %SB 0.1 -120.0 Low limit in % of SBase
QLowLowLim -2000.0 - 2000.0 %SB 0.1 -150.0 Low Low limit in % of SBase
QLimHyst 0.000 - 100.000 % 0.001 5.000 Hysteresis value in % of range (common
for all limits)
PFDbRepInt 1 - 300 Type 1 10 Cycl: Report interval (s), Db: In % of range,
Int Db: In %s
PFZeroDb 0 - 100000 m% 1 500 Zero point clamping in 0.001% of range
PFHiHiLim -1.000 - 1.000 - 0.001 1.000 High High limit (physical value)
PFHiLim -1.000 - 1.000 - 0.001 0.800 High limit (physical value)
PFLowLim -1.000 - 1.000 - 0.001 -0.800 Low limit (physical value)
PFLowLowLim -1.000 - 1.000 - 0.001 -1.000 Low Low limit (physical value)
PFLimHyst 0.000 - 100.000 % 0.001 5.000 Hysteresis value in % of range (common
for all limits)
VDbRepInt 1 - 300 Type 1 10 Cycl: Report interval (s), Db: In % of range,
Int Db: In %s
VZeroDb 0 - 100000 m% 1 500 Zero point clamping in 0.001% of range
VHiHiLim 0.0 - 200.0 %VB 0.1 150.0 High High limit in % of UBase
VHiLim 0.0 - 200.0 %VB 0.1 120.0 High limit in % of VBase
VLowLim 0.0 - 200.0 %VB 0.1 80.0 Low limit in % of VBase
VLowLowLim 0.0 - 200.0 %VB 0.1 60.0 Low Low limit in % of VBase
VLimHyst 0.000 - 100.000 % 0.001 5.000 Hysteresis value in % of range (common
for all limits)
IDbRepInt 1 - 300 Type 1 10 Cycl: Report interval (s), Db: In % of range,
Int Db: In %s
IZeroDb 0 - 100000 m% 1 500 Zero point clamping in 0.001% of range
IHiHiLim 0.0 - 500.0 %IB 0.1 150.0 High High limit in % of IBase
IHiLim 0.0 - 500.0 %IB 0.1 120.0 High limit in % of IBase
ILowLim 0.0 - 500.0 %IB 0.1 80.0 Low limit in % of IBase
ILowLowLim 0.0 - 500.0 %IB 0.1 60.0 Low Low limit in % of IBase
ILimHyst 0.000 - 100.000 % 0.001 5.000 Hysteresis value in % of range (common
for all limits)
FrDbRepInt 1 - 300 Type 1 10 Cycl: Report interval (s), Db: In % of range,
Int Db: In %s
FrZeroDb 0 - 100000 m% 1 500 Zero point clamping in 0.001% of range
FrHiHiLim 0.000 - 100.000 Hz 0.001 65.000 High High limit (physical value)
FrHiLim 0.000 - 100.000 Hz 0.001 63.000 High limit (physical value)
FrLowLim 0.000 - 100.000 Hz 0.001 47.000 Low limit (physical value)
1024
Technical manual
Monitoring

FrLowLowLim 0.000 - 100.000 Hz 0.001 45.000 Low Low limit (physical value)
FrLimHyst 0.000 - 100.000 % 0.001 5.000 Hysteresis value in % of range (common
for all limits)
VGenZeroDb 1 - 100 %VB 1 5 Zero point clamping in % of UBase
IGenZeroDb 1 - 100 %IB 1 5 Zero point clamping in % of IBase
VMagComp5 -10.000 - 10.000 % 0.001 0.000 Magnitude factor to calibrate voltage at
5% of Vn
30% of Vn
100% of Vn
IMagComp5 -10.000 - 10.000 % 0.001 0.000 Magnitude factor to calibrate current at
5% of In
30% of In
100% of In
IAngComp5 -10.000 - 10.000 Deg 0.001 0.000 Angle calibration for current at 5% of In
Table 797: CMMXU Non group settings (basic)

IA_DbRepInt 1 - 300 Type 1 10 Cycl: Report interval (s), Db: In % of range,
Int Db: In %s
Enabled
IA_Max 0.0 - 500.0 %IB 0.1 200.0 Maximum value in % of IBase
IA_RepTyp Cyclic - - Cyclic Reporting type
Dead band
Int deadband
groups
IA_AngDbRepInt 1 - 300 Type 1 10 Cycl: Report interval (s), Db: In % of range,
Int Db: In %s
IB_DbRepInt 1 - 300 Type 1 10 Cycl: Report interval (s), Db: In % of range,
Int Db: In %s
IB_Max 0.0 - 500.0 %IB 0.1 200.0 Maximum value in % of IBase
IB_RepTyp Cyclic - - Cyclic Reporting type
Dead band
Int deadband
IB_AngDbRepInt 1 - 300 Type 1 10 Cycl: Report interval (s), Db: In % of range,
Int Db: In %s
IC_DbRepInt 1 - 300 Type 1 10 Cycl: Report interval (s), Db: In % of range,
Int Db: In %s
1025
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IC_Max 0.0 - 500.0 %IB 0.1 200.0 Maximum value in % of IBase
IC_RepTyp Cyclic - - Cyclic Reporting type
Dead band
Int deadband
IC_AngDbRepInt 1 - 300 Type 1 10 Cycl: Report interval (s), Db: In % of range,
Int Db: In %s
Table 798: CMMXU Non group settings (advanced)

IA_ZeroDb 0 - 100000 m% 1 1 Zero point clamping
IA_HiHiLim 0.0 - 500.0 %IB 0.1 150.0 High High limit in % of IBase
IA_HiLim 0.0 - 500.0 %IB 0.1 120.0 High limit in % of IBase
5% of In
30% of In
IA_LowLim 0.0 - 500.0 %IB 0.1 80.0 Low limit in % of IBase
IA_LowLowLim 0.0 - 500.0 %IB 0.1 60.0 Low Low limit in % of IBase
100% of In
IA_Min 0.0 - 500.0 %IB 0.1 50.0 Minimum value in % of IBase
IA_LimHys 0.000 - 100.000 % 0.001 5.000 Hysteresis value in % of range and is
IB_ZeroDb 0 - 100000 m% 1 1 Zero point clamping
IB_HiHiLim 0.0 - 500.0 %IB 0.1 150.0 High High limit in % of IBase
IB_HiLim 0.0 - 500.0 %IB 0.1 120.0 High limit in % of IBase
IB_LowLim 0.0 - 500.0 %IB 0.1 80.0 Low limit in % of IBase
IB_LowLowLim 0.0 - 500.0 %IB 0.1 60.0 Low Low limit in % of IBase
IB_Min 0.0 - 500.0 %IB 0.1 50.0 Minimum value in % of IBase
IB_LimHys 0.000 - 100.000 % 0.001 5.000 Hysteresis value in % of range and is
IC_ZeroDb 0 - 100000 m% 1 1 Zero point clamping
IC_HiHiLim 0.0 - 500.0 %IB 0.1 150.0 High High limit in % of IBase
IC_HiLim 0.0 - 500.0 %IB 0.1 120.0 High limit in % of IBase
IC_LowLim 0.0 - 500.0 %IB 0.1 80.0 Low limit in % of IBase
IC_LowLowLim 0.0 - 500.0 %IB 0.1 60.0 Low Low limit in % of IBase
IC_Min 0.0 - 500.0 %IB 0.1 50.0 Minimum value in % of IBase
IC_LimHys 0.000 - 100.000 % 0.001 5.000 Hysteresis value in % of range and is
1026
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Table 799: VMMXU Non group settings (basic)

VAB_DbRepInt 1 - 300 Type 1 10 Cycl: Report interval (s), Db: In % of range,
Int Db: In %s
Enabled
VAB_ZeroDb 0 - 100000 m% 1 1 Zero point clamping
VAB_Max 0.0 - 200.0 %VB 0.1 200.0 Maximum value in % of VBase
VAB_RepTyp Cyclic - - Cyclic Reporting type
Dead band
Int deadband
groups
VAB_AnDbRepInt 1 - 300 Type 1 10 Cycl: Report interval (s), Db: In % of range,
Int Db: In %s
VBC_DbRepInt 1 - 300 Type 1 10 Cycl: Report interval (s), Db: In % of range,
Int Db: In %s
VB_ZeroDb 0 - 100000 m% 1 1 Zero point clamping
VBC_Max 0.0 - 200.0 %VB 0.1 200.0 Maximum value in % of VBase
VBC_RepTyp Cyclic - - Cyclic Reporting type
Dead band
Int deadband
VBC_AnDbRepInt 1 - 300 Type 1 10 Cycl: Report interval (s), Db: In % of range,
Int Db: In %s
VCA_DbRepInt 1 - 300 Type 1 10 Cycl: Report interval (s), Db: In % of range,
Int Db: In %s
VC_ZeroDb 0 - 100000 m% 1 1 Zero point clamping
VCA_Max 0.0 - 200.0 %VB 0.1 200.0 Maximum value in % of VBase
VCA_RepTyp Cyclic - - Cyclic Reporting type
Dead band
Int deadband
VCA_AnDbRepInt 1 - 300 Type 1 10 Cycl: Report interval (s), Db: In % of range,
Int Db: In %s
Table 800: VMMXU Non group settings (advanced)

VAB_HiHiLim 0.0 - 200.0 %VB 0.1 150.0 High High limit in % of UBase
VAB_HiLim 0.0 - 200.0 %VB 0.1 120.0 High limit in % of VBase
VAB_LowLim 0.0 - 200.0 %VB 0.1 80.0 Low limit in % of VBase
VAB_LowLowLim 0.0 - 200.0 %VB 0.1 60.0 Low Low limit in % of VBase
100% of Vn
VAB_Min 0.0 - 200.0 %VB 0.1 50.0 Minimum value in in % of VBase
VAB_LimHys 0.000 - 100.000 % 0.001 5.000 Hysteresis value in % of range and is
1027
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VBC_HiHiLim 0.0 - 200.0 %VB 0.1 150.0 High High limit in % of UBase
VBC_HiLim 0.0 - 200.0 %VB 0.1 120.0 High limit in % of VBase
VBC_LowLim 0.0 - 200.0 %VB 0.1 80.0 Low limit in % of VBase
VBC_LowLowLim 0.0 - 200.0 %VB 0.1 60.0 Low Low limit in % of VBase
VBC_Min 0.0 - 200.0 %VB 0.1 50.0 Minimum value in % of VBase
VBC_LimHys 0.000 - 100.000 % 0.001 5.000 Hysteresis value in % of range and is
VCA_HiHiLim 0.0 - 200.0 %VB 0.1 150.0 High High limit in % of UBase
VCA_HiLim 0.0 - 200.0 %VB 0.1 120.0 High limit in % of VBase
VCA_LowLim 0.0 - 200.0 %VB 0.1 80.0 Low limit in % of VBase
VCA_LowLowLim 0.0 - 200.0 %VB 0.1 60.0 Low Low limit in % of VBase
VCA_Min 0.0 - 200.0 %VB 0.1 50.0 Minimum value in % of VBase
VCA_LimHys 0.000 - 100.000 % 0.001 5.000 Hysteresis value in % of range and is
Table 801: CMSQI Non group settings (basic)

3I0DbRepInt 1 - 300 Type 1 10 Cycl: Report interval (s), Db: In % of range,
Int Db: In %s
3I0ZeroDb 0 - 100000 m% 1 1 Zero point clamping
3I0Min 0.0 - 500.0 %IB 0.1 50.0 Minimum value in % of IBase
3I0Max 0.0 - 500.0 %IB 0.1 200.0 Maximum value in % of IBase
3I0RepTyp Cyclic - - Cyclic Reporting type
Dead band
Int deadband
groups
3I0LimHys 0.000 - 100.000 % 0.001 5.000 Hysteresis value in % of range and is
3I0AngDbRepInt 1 - 300 Type 1 10 Cycl: Report interval (s), Db: In % of range,
Int Db: In %s
Enabled
3I0AngMin -180.000 - Deg 0.001 -180.000 Minimum value
180.000
3I0AngMax -180.000 - Deg 0.001 180.000 Maximum value
180.000
3I0AngRepTyp Cyclic - - Cyclic Reporting type
Dead band
Int deadband
I1DbRepInt 1 - 300 Type 1 10 Cycl: Report interval (s), Db: In % of range,
Int Db: In %s
I1ZeroDb 0 - 100000 m% 1 1 Zero point clamping
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I1Min 0.0 - 500.0 %IB 0.1 50.0 Minimum value in % of IBase
I1Max 0.0 - 500.0 %IB 0.1 200.0 Maximum value in % of IBase
I1RepTyp Cyclic - - Cyclic Reporting type
Dead band
Int deadband
I1AngDbRepInt 1 - 300 Type 1 10 Cycl: Report interval (s), Db: In % of range,
Int Db: In %s
I1AngMax -180.000 - Deg 0.001 180.000 Maximum value
180.000
I1AngRepTyp Cyclic - - Cyclic Reporting type
Dead band
Int deadband
I2DbRepInt 1 - 300 Type 1 10 Cycl: Report interval (s), Db: In % of range,
Int Db: In %s
I2ZeroDb 0 - 100000 m% 1 1 Zero point clamping
I2Min 0.0 - 500.0 %IB 0.1 50.0 Minimum value in % of IBase
I2Max 0.0 - 500.0 %IB 0.1 200.0 Maximum value in % of IBase
I2RepTyp Cyclic - - Cyclic Reporting type
Dead band
Int deadband
I2LimHys 0.000 - 100.000 % 0.001 5.000 Hysteresis value in % of range and is
I2AngDbRepInt 1 - 300 Type 1 10 Cycl: Report interval (s), Db: In % of range,
Int Db: In %s
I2AngMin -180.000 - Deg 0.001 -180.000 Minimum value
180.000
I2AngRepTyp Cyclic - - Cyclic Reporting type
Dead band
Int deadband
Table 802: CMSQI Non group settings (advanced)

3I0HiHiLim 0.0 - 500.0 %IB 0.1 150.0 High High limit in % of IBase
3I0HiLim 0.0 - 500.0 %IB 0.1 120.0 High limit in % of IBase
3I0LowLim 0.0 - 500.0 %IB 0.1 80.0 Low limit in % of IBase
3I0LowLowLim 0.0 - 500.0 %IB 0.1 60.0 Low Low limit in % of IBase
3I0AngZeroDb 0 - 100000 m% 1 0 Zero point clamping in 0.001% of range
I1HiHiLim 0.0 - 500.0 %IB 0.1 150.0 High High limit in % of IBase
I1HiLim 0.0 - 500.0 %IB 0.1 120.0 High limit in % of IBase
I1LowLim 0.0 - 500.0 %IB 0.1 80.0 Low limit in % of IBase
I1LowLowLim 0.0 - 500.0 %IB 0.1 60.0 Low Low limit in % of IBase
I1LimHys 0.000 - 100.000 % 0.001 5.000 Hysteresis value in % of range and is
I1AngZeroDb 0 - 100000 m% 1 0 Zero point clamping in 0.001% of range
1029
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I1AngMin -180.000 - Deg 0.001 -180.000 Minimum value
180.000
I2HiHiLim 0.0 - 500.0 %IB 0.1 150.0 High High limit in % of IBase
I2HiLim 0.0 - 500.0 %IB 0.1 120.0 High limit in % of IBase
I2LowLim 0.0 - 500.0 %IB 0.1 80.0 Low limit in % of IBase
I2LowLowLim 0.0 - 500.0 %IB 0.1 60.0 Low Low limit in % of IBase
I2AngZeroDb 0 - 100000 m% 1 0 Zero point clamping in 0.001% of range
I2AngMax -180.000 - Deg 0.001 180.000 Maximum value
180.000
Table 803: VMSQI Non group settings (basic)

3V0DbRepInt 1 - 300 Type 1 10 Cycl: Report interval (s), Db: In % of range,
Int Db: In %s
3V0ZeroDb 0 - 100000 m% 1 1 Zero point clamping
3V0Min 0.0 - 200.0 %VB 0.1 50.0 Minimum value in % of VBase
3V0Max 0.0 - 200.0 %VB 0.1 200.0 Maximum value in % of VBase
3V0RepTyp Cyclic - - Cyclic Reporting type
Dead band
Int deadband
groups
3V0LimHys 0.000 - 100.000 % 0.001 5.000 Hysteresis value in % of range and is
3V0AngDbRepInt 1 - 300 Type 1 10 Cycl: Report interval (s), Db: In % of range,
Int Db: In %s
Enabled
3V0AngZeroDb 0 - 100000 m% 1 0 Zero point clamping in 0.001% of range
3V0AngMin -180.000 - Deg 0.001 -180.000 Minimum value
180.000
3V0AngMax -180.000 - Deg 0.001 180.000 Maximum value
180.000
3V0AngRepTyp Cyclic - - Cyclic Reporting type
Dead band
Int deadband
V1DbRepInt 1 - 300 Type 1 10 Cycl: Report interval (s), Db: In % of range,
Int Db: In %s
V1ZeroDb 0 - 100000 m% 1 1 Zero point clamping
V1Min 0.0 - 200.0 %VB 0.1 50.0 Minimum value in % of VBase
V1Max 0.0 - 200.0 %VB 0.1 200.0 Maximum value in % of VBase
V1RepTyp Cyclic - - Cyclic Reporting type
Dead band
Int deadband
1030
Technical manual
Monitoring

V1LimHys 0.000 - 100.000 % 0.001 5.000 Hysteresis value in % of range and is
V1AngDbRepInt 1 - 300 Type 1 10 Cycl: Report interval (s), Db: In % of range,
Int Db: In %s
V2DbRepInt 1 - 300 Type 1 10 Cycl: Report interval (s), Db: In % of range,
Int Db: In %s
V2ZeroDb 0 - 100000 m% 1 1 Zero point clamping
V2Min 0.0 - 200.0 %VB 0.1 50.0 Minimum value in % of VBase
V2Max 0.0 - 200.0 %VB 0.1 200.0 Maximum value in % of VBase
V2RepTyp Cyclic - - Cyclic Reporting type
Dead band
Int deadband
V2LimHys 0.000 - 100.000 % 0.001 5.000 Hysteresis value in % of range and is
V2AngDbRepInt 1 - 300 Type 1 10 Cycl: Report interval (s), Db: In % of range,
Int Db: In %s
V2AngMin -180.000 - Deg 0.001 -180.000 Minimum value
180.000
V2AngMax -180.000 - Deg 0.001 180.000 Maximum value
180.000
V2AngRepTyp Cyclic - - Cyclic Reporting type
Dead band
Int deadband
UAmpPreComp5 -10.000 - 10.000 % 0.001 0.000 Amplitude factor to pre-calibrate voltage
at 5% of Vr
at 30% of Vr
at 100% of Vr
Table 804: VMSQI Non group settings (advanced)

3V0HiHiLim 0.0 - 200.0 %VB 0.1 150.0 High High limit in % of UBase
3V0HiLim 0.0 - 200.0 %VB 0.1 120.0 High limit in % of VBase
3V0LowLim 0.0 - 200.0 %VB 0.1 80.0 Low limit in % of VBase
3V0LowLowLim 0.0 - 200.0 %VB 0.1 60.0 Low Low limit in % of VBase
V1HiHiLim 0.0 - 200.0 %VB 0.1 150.0 High High limit in % of UBase
V1HiLim 0.0 - 200.0 %VB 0.1 120.0 High limit in % of VBase
V1LowLim 0.0 - 200.0 %VB 0.1 80.0 Low limit in % of VBase
V1LowLowLim 0.0 - 200.0 %VB 0.1 60.0 Low Low limit in % of VBase
V1AngZeroDb 0 - 100000 m% 1 0 Zero point clamping in 0.001% of range
V1AngMin -180.000 - Deg 0.001 -180.000 Minimum value
180.000
V1AngMax -180.000 - Deg 0.001 180.000 Maximum value
180.000
1031
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Monitoring

V1AngRepTyp Cyclic - - Cyclic Reporting type
Dead band
Int deadband
V2HiHiLim 0.0 - 200.0 %VB 0.1 150.0 High High limit in % of UBase
V2HiLim 0.0 - 200.0 %VB 0.1 120.0 High limit in % of VBase
V2LowLim 0.0 - 200.0 %VB 0.1 80.0 Low limit in % of VBase
V2LowLowLim 0.0 - 200.0 %VB 0.1 60.0 Low Low limit in % of VBase
V2AngZeroDb 0 - 100000 m% 1 0 Zero point clamping in 0.001% of range
Table 805: VNMMXU Non group settings (basic)

VA_DbRepInt 1 - 300 Type 1 10 Cycl: Report interval (s), Db: In % of range,
Int Db: In %s
Enabled
VA_ZeroDb 0 - 100000 m% 1 1 Zero point clamping
VA_Max 0.0 - 200.0 %VB 0.1 200.0 Maximum value in % of VBase
VA_RepTyp Cyclic - - Cyclic Reporting type
Dead band
Int deadband
groups
VA_LimHys 0.000 - 100.000 % 0.001 5.000 Hysteresis value in % of range and is
VA_AnDbRepInt 1 - 300 Type 1 10 Cycl: Report interval (s), Db: In % of range,
Int Db: In %s
VB_DbRepInt 1 - 300 Type 1 10 Cycl: Report interval (s), Db: In % of range,
Int Db: In %s
VB_ZeroDb 0 - 100000 m% 1 1 Zero point clamping
VB_Max 0.0 - 200.0 %VB 0.1 200.0 Maximum value in % of VBase
VB_RepTyp Cyclic - - Cyclic Reporting type
Dead band
Int deadband
VB_LimHys 0.000 - 100.000 % 0.001 5.000 Hysteresis value in % of range and is
VB_AnDbRepInt 1 - 300 Type 1 10 Cycl: Report interval (s), Db: In % of range,
Int Db: In %s
VC_DbRepInt 1 - 300 Type 1 10 Cycl: Report interval (s), Db: In % of range,
Int Db: In %s
VC_ZeroDb 0 - 100000 m% 1 1 Zero point clamping
VC_Max 0.0 - 200.0 %VB 0.1 200.0 Maximum value in % of VBase
1032
Technical manual
Monitoring

VC_RepTyp Cyclic - - Cyclic Reporting type
Dead band
Int deadband
VC_LimHys 0.000 - 100.000 % 0.001 5.000 Hysteresis value in % of range and is
VC_AnDbRepInt 1 - 300 Type 1 10 Cycl: Report interval (s), Db: In % of range,
Int Db: In %s
Table 806: VNMMXU Non group settings (advanced)

VA_HiHiLim 0.0 - 200.0 %VB 0.1 150.0 High High limit in % of UBase
VA_HiLim 0.0 - 200.0 %VB 0.1 120.0 High limit in % of VBase
VA_LowLim 0.0 - 200.0 %VB 0.1 80.0 Low limit in % of VBase
VA_LowLowLim 0.0 - 200.0 %VB 0.1 60.0 Low Low limit in % of VBase
100% of Vn
VA_Min 0.0 - 200.0 %VB 0.1 50.0 Minimum value in % of VBase
VB_HiHiLim 0.0 - 200.0 %VB 0.1 150.0 High High limit in % of UBase
VB_HiLim 0.0 - 200.0 %VB 0.1 120.0 High limit in % of VBase
VB_LowLim 0.0 - 200.0 %VB 0.1 80.0 Low limit in % of VBase
VB_LowLowLim 0.0 - 200.0 %VB 0.1 60.0 Low Low limit in % of VBase
VB_Min 0.0 - 200.0 %VB 0.1 50.0 Minimum value in % of VBase
VC_HiHiLim 0.0 - 200.0 %VB 0.1 150.0 High High limit in % of UBase
VC_HiLim 0.0 - 200.0 %VB 0.1 120.0 High limit in % of VBase
VC_LowLim 0.0 - 200.0 %VB 0.1 80.0 Low limit in % of VBase
VC_LowLowLim 0.0 - 200.0 %VB 0.1 60.0 Low Low limit in % of VBase
VC_Min 0.0 - 200.0 %VB 0.1 50.0 Minimum value in % of VBase

Table 807: CVMMXN Monitored data

S REAL - MVA Apparent Power magnitude of deadband
value
P REAL - MW Active Power magnitude of deadband
value
Q REAL - MVAr Reactive Power magnitude of deadband
value
PF REAL - - Power Factor magnitude of deadband
value
1033
Technical manual
Monitoring

V REAL - kV Calculated voltage magnitude of
deadband value
I REAL - A Calculated current magnitude of deadband
value
F REAL - Hz System frequency magnitude of deadband
value
Table 808: CMMXU Monitored data

IA REAL - A Phase A current magnitude of reported
value
IA_ANGL REAL - deg Phase A current magnitude angle
IB REAL - A Phase B current magnitude of reported
value
IB_ANGL REAL - deg Phase B current magnitude angle
IC REAL - A Phase C current magnitude of reported
value
IC_ANGL REAL - deg Phase C current magnitude angle
Table 809: VMMXU Monitored data

VAB REAL - kV VAB Reported magnitude value
VAB_ANGL REAL - deg VAB Angle, magnitude of reported value
VBC REAL - kV VBC Reported magnitude value
VBC_ANGL REAL - deg VBC Angle, magnitude of reported value
VCA REAL - kV VCA Reported magnitude value
VCA_ANGL REAL - deg VCA Angle, magnitude of reported value
Table 810: CMSQI Monitored data

3I0IMAG REAL - - 3I0 Amplitude, magnitude of
instantaneous value
3I0 REAL - A 3I0 magnitude of reported value
3I0ANGIM REAL - - 3I0 Angle, magnitude of instantaneous
value
3I0ANGL REAL - deg 3I0 Angle, magnitude of reported value
I1IMAG REAL - - I1 Amplitude, magnitude of instantaneous
value
I1 REAL - A I1magnitude of reported value
1034
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Monitoring

I1ANGIM REAL - - I1 Angle, magnitude of instantaneous value
I1ANGL REAL - deg I1 Angle, magnitude of reported value
I2IMAG REAL - - I2 Amplitude, magnitude of instantaneous
value
I2 REAL - A I2 Magnitude of reported value
I2ANGIM REAL - - I2 Angle, magnitude of instantaneous value
I2ANGL REAL - deg I2 Angle, magnitude of reported value
Table 811: VMSQI Monitored data

3U0IMAG REAL - - 3U0 Amplitude, magnitude of
instantaneous value
3V0 REAL - kV 3V0 Reported magnitude value
3U0ANGIM REAL - - 3U0 Angle, magnitude of instantaneous
value
3V0ANGL REAL - deg 3V0 Magnitude angle
U1IMAG REAL - - U1 Amplitude, magnitude of instantaneous
value
V1 REAL - kV V1 Reported magnitude value
U1ANGIM REAL - - U1 Angle, magnitude of instantaneous
value
V1ANGL REAL - deg V1 Magnitude angle
U2IMAG REAL - - U2 Amplitude, magnitude of instantaneous
value
V2 REAL - kV V2 Reported magnitude value
U2ANGIM REAL - - U2 Angle, magnitude of instantaneous
value
V2ANGL REAL - deg V2 Magnitude angle
Table 812: VNMMXU Monitored data

VA REAL - kV VA Amplitude, magnitude of reported
value
VA_ANGL REAL - deg VA Angle, magnitude of reported value
VB REAL - kV VB Amplitude, magnitude of reported
value
VB_ANGL REAL - deg VB Angle, magnitude of reported value
VC REAL - kV VC Amplitude, magnitude of reported
value
VC_ANGL REAL - deg V_C Angle, magnitude of reported value
1035
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17.1.7.1 Measurement supervision SEMOD54417-130 v3

Phase angle reference SEMOD54417-303 v5

All phase angles are presented in relation to a defined reference channel. The General setting
parameter PhaseAngleRef defines the reference, see section "Analog inputs".
Zero point clamping SEMOD54417-137 v4

signal to be ignored. The zero point clamping limit is a general setting (XZeroDb where X equals S,
P, Q, PF, V, I, F, IA, IB, IC, VA, VB, VC, VAB, VBC, VCA, I1, I2, 3I0, V1, V2 or 3V0). Observe that this
measurement supervision zero point clamping might be overridden by the zero point clamping
used for the measurement values within CVMMXN.

operating:
1036
Technical manual
Monitoring
X_RANGE = 3
High-high limit
High limit
X_RANGE=0
X_RANGE=0 t
Low limit
X_RANGE=2
Low-low limit
X_RANGE=4




1037
Technical manual
Monitoring
Y
(1st)
Y3 Value Reported
Y2 Y4
Y1 Y5
t (*) t (*) t (*) t (*)
t
Value 1
Value 2
Value 3
Value 4
Value 5

Figure 567 shows an example with the magnitude dead-band supervision. The picture is simplified:
the process is not continuous but the values are evaluated with a time interval of one execution
cycle from each other.
1038
Technical manual
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Value Reported
Y

Value Reported
(1st)
Y3 Y
Y
Y2 Y
Y
Y
Y
Y1

limits.

1039
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Y A1 >=
A >= pre-set value
A2 >=
Y3 A3 + A4 + A5 + A6 + A7 >=
pre-set value
Y2 A1 A2
A4 A6
Value
(1st) Value
A Reported Y5
Reported Value
Reported Value
Y1 Reported
t
17.1.7.2 Measurements CVMMXN SEMOD54417-172 v3
Mode of operation SEMOD54417-174 v5

The measurement function must be connected to three-phase current and three-phase voltage
input in the configuration tool (group signals), but it is capable to measure and calculate above
mentioned quantities in nine different ways depending on the available VT inputs connected to
the IED. The end user can freely select by a parameter setting, which one of the nine available
measuring modes shall be used within the function. Available options are summarized in the
following table:
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Set value Formula used for complex, Formula used for voltage Comment
for three-phase power calculation and current magnitude
parameter calculation
“Mode”
1 A, B, C Used when three phase-to-
S = VA × I A* + VB × I B* + VC × I C* (
V = VA + VB + VC )/ 3 ground voltages are available
I =( I )/3
A
+ IB + IC
2 Arone Used when three two phase-to-

S = VAB × I A - VBC × I C
* *
(
V = VAB + VBC / 2 ) phase voltages are available

I =( I A
+ IC / 2 )
3 PosSeq Used when only symmetrical
S = 3 × VPosSeq × I PosSeq
*
V = 3 × VPosSeq three phase power shall be
measured
(Equation 195)
I = I PosSeq
( )
4 AB Used when only VAB phase-to-
S = VAB × I A - I B
* *
V = VAB phase voltage is available
EQUATION1567 V1 EN-US (Equation 197) (

I = IA + IB / 2 )
( )
5 BC Used when only VBC phase-to-
S = VBC × I B - I C
* *
V = VBC phase voltage is available

I = I B + IC / 2 )
( )
6 CA Used when only VCA phase-to-
S = VCA × I C - I A
* *
V = VCA phase voltage is available

I = IC + I A / 2 )
7 A Used when only VA phase-to-
S = 3 × VA × I A
*
V = 3 × VA ground voltage is available
(Equation 203)
I = IA
1041
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Set value Formula used for complex, Formula used for voltage Comment
for three-phase power calculation and current magnitude
parameter calculation
“Mode”
8 B Used when only VB phase-to-
S = 3 × VB × I B
*
V = 3 × VB ground voltage is available
(Equation 205)
I = IB

9 C Used when only VC phase-to-
S = 3 × VC × I C
*
V = 3 × VC ground voltage is available
(Equation 207)
I = IC

* means complex conjugated value
It shall be noted that only in the first two operating modes that is, 1 & 2 the measurement function
calculates exact three-phase power. In other operating modes that is, from 3 to 9 it calculates the
three-phase power under assumption that the power system is fully symmetrical. Once the
complex apparent power is calculated then the P, Q, S, & PF are calculated in accordance with the
following formulas:
P = Re( S )
Q = Im( S )
S = S = P +Q
2 2
PF = cosj = P
S
Additionally to the power factor value the two binary output signals from the function are
provided which indicates the angular relationship between current and voltage phasors. Binary
output signal ILAG is set to one when current phasor is lagging behind voltage phasor. Binary
output signal ILEAD is set to one when current phasor is leading the voltage phasor.
Each analog output has a corresponding supervision level output (X_RANGE). The output signal is
an integer in the interval 0-4, see section "Measurement supervision".
1042
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Calibration of analog inputs SEMOD54417-293 v4

Measured currents and voltages used in the CVMMXN function can be calibrated to get class 0.5
measuring accuracy. This is achieved by magnitude and angle compensation at 5, 30 and 100% of
Magnitude
+10
IMagComp5 Measured
IMagComp30 current
IMagComp100
5 30 100 % of In
0-5%: Constant
-10 5-30-100%: Linear
>100%: Constant
Degrees Angle
compensation
+10
IAngComp30 Measured
current
IAngComp5
IAngComp100
5 30 100 % of In
-10

magnitude and angle compensation will be used for related input signals.
Low pass filtering SEMOD54417-233 v3

introduce the recursive, low pass filtering of the measured values for P, Q, S, V, I and power factor.
This will make slower measurement response to the step changes in the measured quantity.
Filtering is performed in accordance with the following recursive formula:
1043
Technical manual
Monitoring
X = k × X Old + (1 - k ) × X Calculated
where:
X is a new measured value (that is P, Q, S, V, I or PF) to be given out from the function
XOld is the measured value given from the measurement function in previous execution cycle
XCalculated is the new calculated value in the present execution cycle
k is settable parameter by the end user which influence the filter properties
Default value for parameter k is 0.00. With this value the new calculated value is immediately given
out without any filtering (that is, without any additional delay). When k is set to value bigger than
0, the filtering is enabled. Appropriate value of k shall be determined separately for every
application. Some typical value for k =0.14.
Zero point clamping SEMOD54417-250 v5

In order to avoid erroneous measurements when either current or voltage signal is not present, it
is possible for the end user to set the magnitudeIGenZeroDb level for current and voltage
measurement VGenZeroDb is forced to zero. When either current or voltage measurement is
forced to zero automatically the measured values for power (P, Q and S) and power factor are
forced to zero as well. Since the measurement supervision functionality, included in CVMMXN, is
using these values the zero clamping will influence the subsequent supervision (observe the
possibility to do zero point clamping within measurement supervision, see section "Measurement
supervision").
Compensation facility SEMOD54417-253 v5

In order to compensate for small magnitude and angular errors in the complete measurement
chain (CT error, VT error, IED input transformer errors and so on.) it is possible to perform on site
calibration of the power measurement. This is achieved by setting the complex constant which is
then internally used within the function to multiply the calculated complex apparent power S. This
constant is set as magnitude (setting parameter PowMagFact, default value 1.000) and angle
(setting parameter PowAngComp, default value 0.0 degrees). Default values for these two
parameters are done in such way that they do not influence internally calculated value (complex
constant has default value 1). In this way calibration, for specific operating range (for example,
around rated power) can be done at site. However, to perform this calibration it is necessary to
have an external power meter with high accuracy class available.
Directionality SEMOD54417-256 v6
If CT grounding parameter is set as described in section "Analog inputs", active and reactive
power will be measured always towards the protected object. This is shown in the following
figure 570.
1044
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Busbar
52
IED
P Q
Protected
Object
Figure 570: Internal IED directionality convention for P & Q measurements

Practically, it means that active and reactive power will have positive values when they flow from
the busbar towards the protected object and they will have negative values when they flow from
the protected object towards the busbar.
In some application, for example, when power is measured on the secondary side of the power
transformer it might be desirable, from the end client point of view, to have actually opposite
directional convention for active and reactive power measurements. This can be easily achieved by
setting parameter PowAngComp to value of 180.0 degrees. With such setting the active and
reactive power will have positive values when they flow from the protected object towards the
busbar.
Frequency SEMOD54417-261 v2
Frequency is actually not calculated within measurement block. It is simply obtained from the pre-
processing block and then just given out from the measurement block as an output.
17.1.7.3 Phase current measurement CMMXU SEMOD54417-264 v6
The Phase current measurement (CMMXU) function must be connected to three-phase current
input in the configuration tool to be operable. Currents handled in the function can be calibrated
to get better then class 0.5 measuring accuracy for internal use, on the outputs and IEC 61850.
This is achieved by magnitude and angle compensation at 5, 30 and 100% of rated current. The
compensation below 5% and above 100% is constant and linear in between, see figure 569.
Phase currents (magnitude and angle) are available on the outputs and each magnitude output
has a corresponding supervision level output (Ix_RANGE). The supervision output signal is an
integer in the interval 0-4, see section "Measurement supervision".
17.1.7.4 Phase-phase and phase-neutral voltage measurements VMMXU, VNMMXU SEMOD54417-268 v5
The voltage function must be connected to three-phase voltage input in the configuration tool to
be operable. Voltages are handled in the same way as currents when it comes to class 0.5
calibrations, see above.
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The voltages (phase or phase-phase voltage, magnitude and angle) are available on the outputs
and each magnitude output has a corresponding supervision level output (Vxy_RANG). The
supervision output signal is an integer in the interval 0-4, see section "Measurement supervision".
17.1.7.5 Voltage and current sequence measurements VMSQI, CMSQI SEMOD54417-299 v6
The measurement functions must be connected to three-phase current (CMSQI) or voltage

(VMSQI) input in the configuration tool to be operable. No outputs, other than X_RANG, are
calculated within the measuring blocks and it is not possible to calibrate the signals. Input signals
are obtained from the pre-processing block and transferred to corresponding output.
Positive, negative and three times zero sequence quantities are available on the outputs (voltage
and current, magnitude and angle). Each magnitude output has a corresponding supervision level
output (X_RANGE). The output signal is an integer in the interval 0-4, see section "Measurement
supervision".

M12386-1 v14.1.1
Table 813: CVMMXN technical data

Frequency (0.95-1.05) x fn ±2.0 mHz
Voltage (10 to 300) V ±0.3% of V at V≤ 50 V

±0.2% of V at V> 50 V
Current (0.1-4.0) x In ±0.8% of I at 0.1 x In 0.5 x Sn
(100 to 220) V ±0.2% of P

(0.5-2.0) x In
cos φ> 0.7
Reactive power, Q (10 to 300) V ±0.5% of Sn at S ≤0.5 x Sn
(0.1-4.0) x In ±0.5% of S at S > 0.5 x Sn
(100 to 220) V ±0.2% of Q

(0.5-2.0) x In
cos φ< 0.7
Apparent power, S (10 to 300) V ±0.5% of Sn at S ≤0.5 x Sn
(0.1-4.0) x In ±0.5% of S at S >0.5 x Sn
(100 to 220) V ±0.2% of S

(0.5-2.0) x In
Power factor, cos (φ) (10 to 300) V <0.02

(0.1-4.0) x In
(100 to 220) V <0.01

(0.5-2.0) x In
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Technical manual
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GUID-5E04B3F9-E1B7-4974-9C0B-DE9CD4A2408F v5
Table 814: CMMXU technical data

Current at symmetrical load (0.1-4.0) × In ±0.3% of In at I ≤ 0.5 × In
±0.3% of I at I > 0.5 × In
Phase angle at symmetrical (0.1-4.0) × In ±1.0 degrees at 0.1 × In 50 V
Phase angle (10 to 300) V ±0.5° at V ≤ 50 V
±0.2° at V > 50 V
GUID-9B8A7FA5-9C98-4CBD-A162-7112869CF030 v4
Table 816: CMSQI technical data

Current positive sequence, I1 (0.1–4.0) × In ±0.3% of In at I ≤ 0.5 × In
Three phase settings ±0.3% of I at I > 0.5 × In
Current zero sequence, 3I0 (0.1–1.0) × In ±0.3% of In at I ≤ 0.5 × In

Current negative sequence, I2 (0.1–1.0) × In ±0.3% of In at I ≤ 0.5 × In

Phase angle (0.1–4.0) × In ±1.0 degrees at 0.1 × In < I ≤ 0.5 × In

±0.5 degrees at 0.5 × In 50 V
Voltage zero sequence, 3V0 (10 to 300) V ±0.5% of V at V ≤ 50 V
±0.2% of V at V > 50 V
Voltage negative sequence, V2 (10 to 300) V ±0.5% of V at V ≤ 50 V
±0.2% of V at V > 50 V
Phase angle (10 to 300) V ±0.5 degrees at V ≤ 50 V
±0.2 degrees at V > 50 V
1047
Technical manual
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GUID-ED634B6D-9918-464F-B6A4-51B78129B819 v5
Table 818: VNMMXU technical data

Voltage (5 to 175) V ±0.5% of V at V ≤ 50 V
±0.2% of V at V > 50 V
Phase angle (5 to 175) V ±0.5° at V ≤ 50 V
±0.2° at V > 50 V
17.2 Gas medium supervision SSIMG (63) GUID-358AD8F8-AE06-4AEA-9969-46E5299D5B4B v3
GUID-AD96C26E-C3E5-4B21-9ED6-12E540954AC3 v3

Gas medium supervision SSIMG - 63
17.2.2 Functionality GUID-0692CD0D-F33E-4370-AC91-B216CAAAFC28 v5
Gas medium supervision SSIMG (63) is used for monitoring the circuit breaker condition. Binary
information based on the gas pressure in the circuit breaker is used as input signals to the
function. In addition, the function generates alarms based on received information.

GUID-94B75A6D-973D-4F1F-8643-F2128AD31CC4 v3
SSIMG (63)
BLOCK PRESSURE
BLK_ALM PRES_ALM
PRESSURE PRES_LO
TEMP TEMP
PRES_ALM TEMP_ALM
PRES_LO TEMP_LO
SET_P_LO
SET_T_LO
RESET_LO
Figure 571: SSIMG (63) function block
17.2.4 Signals
GUID-89749F71-CAEB-4A57-A1F0-148CCF68E97E v2
1048
Technical manual
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Table 819: SSIMG (63) Input signals

BLK_ALM BOOLEAN 0 Block all the alarms
PRESSURE REAL 0.0 Pressure input from CB
TEMP REAL 0.0 Temperature of the insulation medium from CB
PRES_ALM BOOLEAN 0 Pressure alarm signal
PRES_LO BOOLEAN 0 Pressure lockout signal
SET_P_LO BOOLEAN 0 Set pressure lockout
SET_T_LO BOOLEAN 0 Set temperature lockout
RESET_LO BOOLEAN 0 Reset pressure and temperature lockout
Table 820: SSIMG (63) Output signals

PRESSURE REAL Pressure service value
PRES_ALM BOOLEAN Pressure below alarm level
PRES_LO BOOLEAN Pressure below lockout level
TEMP REAL Temperature of the insulation medium
TEMP_ALM BOOLEAN Temperature above alarm level
TEMP_LO BOOLEAN Temperature above lockout level
17.2.5 Settings
Table 821: SSIMG (63) Group settings (basic)

Enabled
PressAlmLimit 1.00 - 100.00 - 0.01 5.00 Alarm setting for pressure
PressLOLimit 1.00 - 100.00 - 0.01 3.00 Pressure lockout setting
TempAlarmLimit -40.00 - 200.00 - 0.01 30.00 Temperature alarm level setting of the
medium
TempLOLimit -40.00 - 200.00 - 0.01 30.00 Temperature lockout level of the medium
tPressureAlarm 0.000 - 60.000 s 0.001 0.000 Time delay for pressure alarm
tPressureLO 0.000 - 60.000 s 0.001 0.000 Time delay for pressure lockout indication
tTempAlarm 0.000 - 60.000 s 0.001 0.000 Time delay for temperature alarm
tTempLockOut 0.000 - 60.000 s 0.001 0.000 Time delay for temperture lockout
tResetPressAlm 0.000 - 60.000 s 0.001 0.000 Reset time delay for pressure alarm
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tResetPressLO 0.000 - 60.000 s 0.001 0.000 Reset time delay for pressure lockout
tResetTempLO 0.000 - 60.000 s 0.001 0.000 Reset time delay for temperture lockout
tResetTempAlm 0.000 - 60.000 s 0.001 0.000 Reset time delay for temperture alarm
17.2.6 Operation principle GUID-359458EA-FFAA-4A44-A8E8-9469CA069C80 v6
Gas medium supervision SSIMG (63) is used to monitor the gas pressure in the circuit breaker.
Binary inputs of gas density PRES_ALM, PRES_LO, and gas pressure signal PRESSURE, are taken
into account to initiate the alarms PRES_ALM and PRES_LO. When PRESSURE is less than
PressAlmLimit or binary signal from CB PRES_ALM is high then the gas pressure alarm, PRES_ALM
will be initiated. Similarly, if pressure input PRESSURE is less than PressLOLimit or binary signal
from CB PRES_LO is high or temperature input TEMP is above lockout level TempLOLimit then the
gas pressure lockout, PRES_LO will be initiated.
There may be sudden change in pressure of the gas for a very small time, for which the function
need not to initiate any alarm. That is why two time delays tPressureAlarm or tPressureLO have
been included. If the pressure goes below the settings for more than these time delays, then only
the corresponding alarm PRES_ALM or lockout PRES_LO will be initiated. The SET_P_LO binary
input is used for setting the gas pressure lockout. The PRES_LO output retains the last value until
it is reset by using the binary input RESET_LO. Hysteresis type comparators have been used with
the setting for relative and absolute hysteresis. The binary input BLK_ALM can be used to block
the alarms, and the BLOCK input can block both alarms and the lockout indication.
Temperature of the medium is available from the input signal of temperature. The signal is
monitored to detect high temperature.
When temperature input TEMP is greater than TempAlarmLimit, then temperature alarm
TEMP_ALM will be initiated. Similarly, if temperature input TEMP is greater than TempLOLimit,
then TEMP_LO will be initiated.
There may be sudden change in temperature of the medium for a very small time, for which the
function need not to initiate any alarm. That is why two time delays tTempAlarm or tTempLockOut
have been included. If the temperature goes above the settings for more than these time delays,
then only the corresponding alarm TEMP_ALM or lockout TEMP_LO will be initiated. The SET_T_LO
binary input is used for setting the temperature lockout. The TEMP_LO output retains the last
value until it is reset by using the binary input RESET_LO. Hysteresis type comparators have been
used with the setting for relative and absolute hysteresis. The binary input BLK_ALM can be used
to block the alarms, and the BLOCK input can block both alarms and the lockout indication.

GUID-F034B396-6600-49EF-B0A5-8ED96766A6A0 v6
Table 822: SSIMG (63) Technical data

Pressure alarm level 1.00-100.00 ±10.0% of set value
Pressure lockout level 1.00-100.00 ±10.0% of set value
Temperature alarm level -40.00-200.00 ±2.5% of set value
Temperature lockout level -40.00-200.00 ±2.5% of set value
1050
Technical manual
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Time delay for pressure alarm (0.000-60.000) s ±0.2% or ±250ms whichever is
greater
Reset time delay for pressure alarm (0.000-60.000) s ±0.2% or ±250ms whichever is
greater
Time delay for pressure lockout (0.000-60.000) s ±0.2% or ±250ms whichever is
greater
Time delay for temperature alarm (0.000-60.000) s ±0.2% or ±250ms whichever is
greater
Reset time delay for temperature (0.000-60.000) s ±0.2% or ±250ms whichever is
alarm greater
Time delay for temperature lockout (0.000-60.000) s ±0.2% or ±250ms whichever is
greater
17.3 Liquid medium supervision SSIML (71) GUID-37669E94-4830-4C96-8A67-09600F847F23 v3
GUID-4CE96EF6-42C6-4F2E-A190-D288ABF766F6 v2

Liquid medium supervision SSIML - 71
17.3.2 Functionality GUID-3B1A665F-60A5-4343-85F4-AD9C066CBE8D v5
Liquid medium supervision SSIML (71) is used for monitoring the circuit breaker condition. Binary
information based on the oil level in the circuit breaker is used as input signals to the function. In
addition, the function generates alarms based on received information.
17.3.3 Function block GUID-AC82A86C-495D-4CBD-9BF9-3CC760591AA9 v3
SSIML (71)
BLOCK LEVEL
BLK_ALM LVL_ALM
LEVEL LVL_LO
TEMP TEMP
LVL_ALM TEMP_ALM
LEVEL_LO TEMP_LO
SET_L_LO
SET_T_LO
RESET_LO
Figure 572: SSIML (71) function block
17.3.4 Signals
GUID-0C378BB3-2104-417F-94B5-16EFC55151FE v2
1051
Technical manual
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Table 823: SSIML (71) Input signals

BLK_ALM BOOLEAN 0 Block all the alarms
LEVEL REAL 0.0 Level input from CB
TEMP REAL 0.0 Temperature of the insulation medium from CB
LVL_ALM BOOLEAN 0 Level alarm signal
LEVEL_LO BOOLEAN 0 Level lockout signal
SET_L_LO BOOLEAN 0 Set level lockout
SET_T_LO BOOLEAN 0 Set temperature lockout
RESET_LO BOOLEAN 0 Reset level and temperature lockout
Table 824: SSIML (71) Output signals

LEVEL REAL Level service value
LVL_ALM BOOLEAN Level below alarm level
LVL_LO BOOLEAN Level below lockout level
TEMP REAL Temperature of the insulation medium
TEMP_ALM BOOLEAN Temperature above alarm level
TEMP_LO BOOLEAN Temperature above lockout level
17.3.5 Settings
Table 825: SSIML (71) Group settings (basic)

Enabled
LevelAlmLimit 1.00 - 100.00 - 0.01 5.00 Alarm setting for level
LevelLOLimit 1.00 - 100.00 - 0.01 3.00 Level lockout setting
TempAlarmLimit -40.00 - 200.00 - 0.01 30.00 Temperature alarm level setting of the
medium
TempLOLimit -40.00 - 200.00 - 0.01 30.00 Temperature lockout level of the medium
tLevelAlarm 0.000 - 60.000 s 0.001 0.000 Time delay for level alarm
tLevelLockOut 0.000 - 60.000 s 0.001 0.000 Time delay for level lockout indication
tTempAlarm 0.000 - 60.000 s 0.001 0.000 Time delay for temperature alarm
tTempLockOut 0.000 - 60.000 s 0.001 0.000 Time delay for temperture lockout
tResetLevelAlm 0.000 - 60.000 s 0.001 0.000 Reset time delay for level alarm
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tResetLevelLO 0.000 - 60.000 s 0.001 0.000 Reset time delay for level lockout
tResetTempLO 0.000 - 60.000 s 0.001 0.000 Reset time delay for temperture lockout
tResetTempAlm 0.000 - 60.000 s 0.001 0.000 Reset time delay for temperture alarm
17.3.6 Operation principle GUID-F4340B59-90D0-4EA7-9FD8-F21D425C884A v6
Liquid medium supervision SSIML (71) is used to monitor the oil level in the circuit breaker. Binary
inputs of oil level LVL_ALM, LEVEL_LO and oil level signal LEVEL are taken into account to initiate
the alarms LVL_ALM and LVL_LO. When LEVEL is less than LevelAlmLimit or binary signal from CB
LVL_ALM is high, then the oil level indication alarm, LVL_ALM will be initiated. Similarly, if oil level
input LEVEL is less than LevelLOLimit or binary signal from CB LVL_LO is high or temperature
input TEMP is above lockout level TempLOLimit, then the oil level indication lockout, LVL_LO will
be initiated.
There may be sudden change in oil level for a very small time, for which the function need not to
initiate any alarm. That is why two time delays tLevelAlarm or tLevelLockOut have been included. If
the oil level goes below the settings for more than these time delays, then only the corresponding
alarm LVL_ALM or lockout LVL_LO will be initiated. The SET_L_LO binary input is used for setting
the gas pressure lockout. The LVL_LO output retains the last value until it is reset by using the
binary input RESET_LO. Hysteresis type comparators have been used with the setting for relative
and absolute hysteresis. The binary input BLK_ALM can be used for blocking the alarms, and the
BLOCK input can block both alarms and the lockout indication.
Temperature of the medium is available from the input signal of temperature. The signal is
monitored to detect high temperature.
When temperature input TEMP is greater than TempAlarmLimit, then temperature alarm
TEMP_ALM will be initiated. Similarly, if temperature input TEMP is greater than TempLOLimit,
then TEMP_LO will be initiated.
There may be sudden change in temperature of the medium for a very small time, for which the
function need not to initiate any alarm. That is why two time delays tTempAlarm or
tTempLockOuthave been included. If the temperature goes above the settings for more than
these time delays, then only the corresponding alarm TEMP_ALM or lockout TEMP_LO will be
initiated. The SET_T_LO binary input is used for setting the temperature lockout. The TEMP_LO
output retains the last value until it is reset by using the binary input RESET_LO. Hysteresis type
comparators have been used with the setting for relative and absolute hysteresis. The binary input
BLK_ALM can be used for blocking the alarms, and the BLOCK input can block both alarms and the
lockout indication.

GUID-83B0F607-D898-403A-94FD-7FE8D45C73FF v6
Table 826: SSIML(71) Technical data

Oil alarm level 1.00-100.00 ±10.0% of set value
Oil lockout level 1.00-100.00 ±10.0% of set value
Temperature alarm level -40.00-200.00 ±2.5% of set value
Temperature lockout level -40.00-200.00 ±2.5% of set value
1053
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Time delay for oil alarm (0.000-60.000) s ±0.2% or ±250ms whichever is
greater
Reset time delay for oil alarm (0.000-60.000) s ±0.2% or ±250ms whichever is
greater
Time delay for oil lockout (0.000-60.000) s ±0.2% or ±250ms whichever is
greater
Time delay for temperature alarm (0.000-60.000) s ±0.2% or ±250ms whichever is
greater
Reset time delay for temperature (0.000-60.000) s ±0.2% or ±250ms whichever is
alarm greater
Time delay for temperature lockout (0.000-60.000) s ±0.2% or ±250ms whichever is
greater
17.4 Breaker monitoring SSCBR
17.4.1 Identification GUID-0FC081B2-0BC8-4EB8-9529-B941E51F18EE v7

Breaker monitoring SSCBR - -
17.4.2 Functionality GUID-E1FD74C3-B9B6-4E11-AA1B-7E7F822FB4DD v10
The breaker monitoring function SSCBR is used to monitor different parameters of the breaker
condition. The breaker requires maintenance when the number of operations reaches a predefined
value. For a proper functioning of the circuit breaker, it is essential to monitor the circuit breaker
operation, spring charge indication or breaker wear, travel time, number of operation cycles and
estimate the accumulated energy during arcing periods.
17.4.3 Function block GUID-B002ED61-5092-4E9E-AEB6-E4A4310BDAF2 v11
SSCBR
I3P* OPENPOS
BLOCK CLOSEPOS
BLKALM INVDPOS
TRIND TRCMD
POSOPEN TRVTOPAL
POSCLOSE TRVTCLAL
PRESALM OPERALM
PRESLO OPERLO
SPRCHRST CBLIFEAL
SPRCHRD MONALM
RSTCBWR IPOWALPH
RSTTRVT IPOWLOPH
RSTIPOW SPCHALM
RSTSPCHT GPRESALM
GPRESLO
Figure 573: SSCBR function block
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17.4.4 Signals
Table 827: SSCBR Input signals

SIGNAL
BLOCK BOOLEAN 0 Block all the alarm and lockout indication
BLKALM BOOLEAN 0 Block all the alarms
TRIND BOOLEAN 0 Trip command from trip circuit
PRESALM BOOLEAN 0 Pressure alarm indication from CB
PRESLO BOOLEAN 0 Pressure lockout indication from CB
SPRCHRST BOOLEAN 0 CB spring charging started indication signal
SPRCHRD BOOLEAN 0 CB spring charged indication signal
RSTCBWR BOOLEAN 0 Reset of CB remaining life and operation counter
RSTTRVT BOOLEAN 0 Reset of CB closing and opening travel times
RSTIPOW BOOLEAN 0 Reset of accumulated I^CurrExponent
RSTSPCHT BOOLEAN 0 Reset of CB spring charging time
Table 828: SSCBR Output signals

OPENPOS BOOLEAN CB is in open position
CLOSEPOS BOOLEAN CB is in closed position
INVDPOS BOOLEAN CB is in Invalid Position
TRCMD BOOLEAN Open command issued to CB
TRVTOPAL BOOLEAN CB open travel time exceeded set value
TRVTCLAL BOOLEAN CB close travel time exceeded set value
OPERALM BOOLEAN Number of CB operations exceeds alarm limit
OPERLO BOOLEAN Number of CB operations exceeds lockout limit
CBLIFEAL BOOLEAN Remaining life of CB reduced to Life alarm level
MONALM BOOLEAN CB 'not operated for long time' alarm
IPOWALPH BOOLEAN Accum I^CurrExponent integr over CB open travel time exceeds
alarm limit
IPOWLOPH BOOLEAN Accum I^CurrExponent integr over CB open travel time exceeds
lockout limit
SPCHALM BOOLEAN Spring charging time has crossed the set value
GPRESALM BOOLEAN Pressure below alarm level
GPRESLO BOOLEAN Pressure below lockout level
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17.4.5 Settings
Table 829: SSCBR Non group settings (basic)

Enabled
groups
PhSel Phase A - - Phase A Phase selection
Phase B
Phase C
RatedOperCurr 100.00 - 5000.00 A 0.01 1000.00 Rated operating current of the breaker
OperNoRated 1 - 99999 - 1 10000 Number of operations possible at rated
current
RatedFltCurr 500.00 - 99999.99 A 0.01 5000.00 Rated fault current of the breaker
OperNoFault 1 - 10000 - 1 1000 Number of operations possible at rated
fault current
tTrOpenAlm 0.000 - 0.200 s 0.001 0.040 Alarm level for open travel time
tTrCloseAlm 0.000 - 0.200 s 0.001 0.040 Alarm level for close travel time
OperAlmLevel 0 - 9999 - 1 200 Alarm level for number of operations
OperLOLevel 0 - 9999 - 1 300 Lockout level for number of operations
AccSelCal Aux Contact - - Trip Signal Accumulated energy calculation selection
Trip Signal
CurrExponent 0.50 - 3.00 - 0.01 2.00 Current exponent value used for energy
calculation
AccStopCurr 5.00 - 100.00 %IB 0.01 10.00 RMS current level below which energy
accumulation stops
AlmAccCurrPwr 0.00 - 20000.00 - 0.01 2500.00 Alarm level for accumulated
I^CurrExponent integrated over CB open
travel time
LOAccCurrPwr 0.00 - 20000.00 - 0.01 2500.00 Lockout level for accumulated
I^CurrExponent integrated over CB open
travel time
SpChAlmTime 0.00 - 60.00 s 0.01 1.00 Alarm level for spring charging time
InitCBRemLife 1 - 99999 - 1 10000 Initial value for remaining life estimates
InactiveAlDays 0 - 9999 Day 1 2000 Alarm level for inactive days counter
Table 830: SSCBR Non group settings (advanced)

OpenTimeCorr -0.100 - 0.100 s 0.001 0.010 Correction for open travel time
CloseTimeCorr -0.100 - 0.100 s 0.001 0.010 Correction for close travel time
DirCoef -3.00 - -0.50 - 0.01 -1.50 Directional coefficient for CB life
calculation
CBLifeAlmLevel 1 - 99999 - 1 5000 Alarm level for CB remaining life
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ContTrCorr -0.010 - 0.010 s 0.001 0.005 Correction for time difference in auxiliary
and main contacts open time
OperTimeDelay 0.000 - 0.200 s 0.001 0.020 Time delay between change of status of
trip output and start of main contact
separation
tDGasPresAlm 0.00 - 60.00 s 0.01 0.10 Time delay for gas pressure alarm
tDGasPresLO 0.00 - 60.00 s 0.01 0.10 Time delay for gas pressure lockout
InitCounterVal 0 - 9999 - 1 0 Initial value for number of operations
InitAccCurrPwr 0.00 - 9999.99 - 0.01 0.00 Initial value for accum I^CurrExponent
integr over CB open travel time value
InitInactDays 0 - 9999 Day 1 0 Initial value for inactive days
InactiveAlHrs 0 - 23 Hour 1 0 Alarm time for inactive days counter in
hours

Table 831: SSCBR Monitored data

TTRVOP REAL - ms Travel time of the CB during opening
operation
TTRVCL REAL - ms Travel time of the CB during closing
operation
NOOPER INTEGER - - Number of CB operation cycle
CBLIFEPH INTEGER - - CB Remaining life of respective phase
INADAYS INTEGER - - The number of days CB has been inactive
IPOWPH REAL - - Accumulated I^CurrExponent integrated
over CB open travel time
SPCHT REAL - s The charging time of the CB spring
17.4.7 Operation principle GUID-3902D69C-1858-40DD-AD63-C33C381697BA v11
The breaker monitoring function includes metering and monitoring subfunctions. The
subfunctions can be enabled and disabled with the Operation setting. The corresponding
parameter values are Enabled and Disabled.
The operation of the subfunctions is described by the module diagram as shown in Figure 574. All
the modules in the diagram are explained in subsequent sections.
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I3P-ILRMSPH
POSCLOSE TTRVOP
POSOPEN CB Contact Travel TTRVCL
BLOCK Time TRVTOPAL
BLKALM TRVTCLAL
RSTTRVT
OPENPOS
CB Status CLOSEPOS
INVDPOS
CBLIFEAL
Remaining Life of CB
CBLIFEPH
RSTCBWR
TRCMD
Accumulated IPOWALPH
energy
I3P-IL IPOWLOPH
TRIND
IPOWPH
RSTIPOW
CB Operation OPERALM
Cycles NOOPER
CB Operation MONALM
Monitoring INADAYS
SPCHALM
SPRCHRST CB Spring Charge SPCHT
SPRCHRD Monitoring
RSTSPCHT
CB Gas Pressure GPRESALM

PRESALM Indication GPRESLO
PRESLO
Figure 574: Functional module diagram of breaker monitoring
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17.4.7.1 Circuit breaker contact travel time GUID-3AF0EE8D-AA8E-4F83-9916-61B5D0D6B05B v11
The circuit breaker contact travel time subfunction calculates the breaker contact travel time for
opening and closing operations. The operation of the breaker contact travel time measurement is
described in Figure 575.
POSCLOSE TTRVOP
Contact travel
POSOPEN time TTRVCL
calculation
RSTTRVT
TRVTOPAL
Alarm limit
BLOCK check TRVTCLAL
BLKALM
Figure 575: Functional module diagram for circuit breaker contact travel time
Contact travel time calculation

The contact travel time of the breaker is calculated from the time between the state of change of
auxiliary contacts. The opening travel time is measured between the opening of the POSCLOSE and
closing of the POSOPEN auxiliary contacts. Similarly, the closing travel time is measured between
the opening of the POSOPEN and closing of the POSCLOSE auxiliary contacts. A compensation
factor has been added to consider the time difference between auxiliary contact operation and
the actual physical opening of the breaker main contact.
Main Contact
0
POSCLOSE
POSOPEN
t1 tOpen t2 t3 tClose t4
tTravelOpen = tOpen + t1 + t2 tTravelClose = tClose + t3 + t4

Figure 576: Travel time calculation

There is a time difference t1 between the pickup of the main contact opening and the opening of
the POSCLOSE auxiliary contact. Similarly, there is a time difference t2 between the time when the
POSOPEN auxiliary contact opens and the main contact is completely open. Therefore, a correction
factor needs to be added to get the actual opening time. This factor is added with the
OpenTimeCorr (t1+t2) setting. The closing time is calculated by adding the value set with the
CloseTimeCorr (t3+t4) setting to the measured closing time.
The last measured opening travel time (TTRVOP) and the closing travel time (TTRVCL) are given as
service values.
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The values can be reset using the Clear menu on the LHMI or by activation the input RSTCBWR.
Alarm limit check

When the measured opening travel time is longer than the value set in the tTrOpenAlm setting, the
TRVTOPAL output is activated. Similarly, when the measured closing travel time is longer than the
value set in the tTrCloseAlm setting, the TRVTCLAL output is activated.
It is also possible to block the TRVTCLAL and TRVTOPAL alarm signals by activating the BLKALM
input.
17.4.7.2 Circuit breaker status GUID-390A1250-B258-4023-9A7D-0D7E19E13A6C v11
The circuit breaker status subfunction monitors the position of the circuit breaker, that is,
whether the breaker is in the open, closed or error position. The operation is described in Figure
577.
Phase current
I3P-ILRMSPH
check
OPENPOS
Contact
POSCLOSE position CLOSEPOS
indicator
POSOPEN INVDPOS
Figure 577: Functional module diagram for monitoring circuit breaker status
Phase current check

The module compares the phase current I3P-ILRMSPH to the AccStopCurr setting. If the current in
the selected phase exceeds the set level, it is reported to the contact position indicator module as
closed circuit breaker.
Contact position indicator

The circuit breaker status is open when the auxiliary input contact POSCLOSE is low, the POSOPEN
input is high and the phase current is less than the setting AccStopCurr value. The circuit breaker
is closed when the POSOPEN input is low and the POSCLOSE input is high. The breaker is in the error
state if both auxiliary contacts have the same value or if the auxiliary input contact POSCLOSE is
low and the POSOPEN input is high but the current is above the setting AccStopCurr.
The status of the breaker is indicated with the binary outputs OPENPOS, CLOSEPOS and INVDPOS
for open, closed and error position respectively.
17.4.7.3 Remaining life of circuit breaker GUID-C347406A-2B6F-42BD-B70B-51489AB51EAE v11
The Remaining life of circuit breaker subfunction is used to give an indication on the wear and tear
of the circuit breaker. Every time the breaker operates, the life of the circuit breaker reduces due
to wear. The breaker wear depends on the interrupted current. The remaining life of the breaker is
estimated from the circuit breaker trip curve provided by the manufacturer. The remaining life is
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decreased by at least one when the circuit breaker is opened. The operation of the remaining life
of circuit breaker subfunction is described in Figure 578.
I3P-ILRMSPH
CB remaining CBLIFEPH
POSCLOSE life estimation
RSTCBWR
Alarm limit
BLOCK CBLIFEAL
Check
BLKALM
Figure 578: Functional module diagram for estimating the life of the circuit breaker
Circuit breaker remaining life estimation

If the interrupted current is less than the rated operating current set using the RatedOperCurr
setting, the remaining operations of the breaker are reduced by one operation. If the interrupted
current is more than the rated fault current set using the RatedFltCurr setting, the remaining
operations of the circuit breaker are reduced by the set OperNoRated divided by the set
OperNoFault value. If the tripping current is between these two values, the remaining life of the
circuit breaker is calculated based on the maintenance curve equation given by the manufacturer.
The OperNoRated parameter sets the number of operations the breaker can perform at the rated
current. The OperNoFault parameter sets the number of operations the breaker can perform at
the rated fault current.
Alarm limit check

When the remaining life of a circuit breaker phase drops below the CBLifeAlmLevel setting, the life
alarm CBLIFEAL is activated.
It is possible to deactivate the CBLIFEAL alarm signal by activating the binary input BLKALM.
The old circuit breaker operation counter value can be used by adding the value to the
InitCBRemLife parameter. The value can be reset using the Clear menu from LHMI or by activating
the input RSTCBWR.
17.4.7.4 Accumulated energy GUID-0163FF0F-6E18-4CDC-87AA-578304E0872E v10
The Accumulated energy subfunction calculates the accumulated energy (Iyt) based on current
samples, where the setting CurrExponent (y) ranges from 0.5 to 3.0. The operation is described in
Figure 579.
The TRCMD output is enabled when either of the trip indications from the trip coil circuit TRIND is
high or the breaker status is OPENPOS.
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I3P-IL
TRCMD
I3P-ILRMSPH Accumulated
POSCLOSE energy
calculation IPOWPH
TRIND
LRSTIPOW
IPOWALPH
Alarm limit
BLOCK Check IPOWLOPH
BLKALM
Figure 579: Functional module diagram for estimating accumulated energy
Accumulated energy calculation

Accumulated energy can be calculated either with TRIND or POSCLOSE by selecting the AccSelCal
parameter value accordingly.
The calculation is initiated with the POSCLOSE or TRIND input events. It ends when the RMS current
is lower than the AccStopCurr setting.
The ContTrCorr setting is used to determine the accumulated energy in relation to the time the
main contact opens. If the setting is positive, the calculation of energy starts after the auxiliary
contact has opened and the delay equal to the value of the ContTrCorr setting has passed. When
the setting is negative, the calculation starts in advance by the correction time in relation to when
the auxiliary contact opened.
Main Contact Main Contact

close close
open open
POSCLOSE 1 POSCLOSE 1
0 0
Energy Energy
Accumulation Accumulation
starts starts
ContTrCorr ContTrCorr
(Negative) (Positive)
Figure 580: Significance of correction factor setting

Accumulated energy can also be calculated by using the change of state of the trip output. TRIND
is used to get the instance of the trip output and the time delay between the trip initiation and the
opening of the main contact is introduced by the setting OperTimeDelay.
The accumulated energy output IPOWPH is provided as a service value. The value can be reset by
enabling RSTIPOW through LHMI or by activating the input RSTIPOW.
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Alarm limit check

The IPOWALPH alarm is activated when the accumulated energy exceeds the set value
AlmAccCurrPwr.
IPOWLOPH is activated when the accumulated energy exceeds the limit of the LOAccCurrPwr
setting.
The IPOWALPH and IPOWLOPH outputs can be blocked by activating the binary input BLKALM.
17.4.7.5 Circuit breaker operation cycles GUID-D3481D26-2E42-455E-8DB2-91538421F3B1 v8
The circuit breaker operation cycles subfunction counts the number of closing-opening sequences
of the breaker. The operation counter value is updated after each closing-opening sequence. The
operation is described in Figure 581.
POSCLOSE
Operation
POSOPEN NOOPER
counter
RSTCBWR
OPERALM
Alarm limit
BLOCK
Check
OPERLO
BLKALM
Figure 581: Functional module diagram for circuit breaker operation cycles
Operation counter
The operation counter counts the number of operations based on the state of change of the
auxiliary contact inputs POSCLOSE and POSOPEN.
The number of operations NOOPER is given as a service value. The old circuit breaker operation
counter value can be used by adding the value to the InitCounterVal parameter and can be reset by
Clear CB wear in the Clear menu on the LHMI or activating the input RSTCBWR.
Alarm limit check

OPERALM is generated when the number of operations exceeds the set value of the OperAlmLevel
threshold setting.
If the number of operations increases and exceeds the limit value set with the OperLOLevel
setting, the OPERLO output is activated.
The binary outputs OPERALM and OPERALO are deactivated when the BLKALM input is activated.
17.4.7.6 Circuit breaker operation monitoring GUID-6DAE4C6B-BD66-49CD-817D-08E4EBF47DE0 v8
The circuit breaker operation monitoring subfunction indicates the inactive days of the circuit
breaker and gives an alarm when the number of days exceed the set level. The operation of the
circuit breaker operation monitoring is shown in Figure 582.
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POSCLOSE
Inactive timer INADAYS
POSOPEN
Alarm limit MONALM

BLOCK
Check
BLKALM
Figure 582: Functional module diagram for circuit breaker operation monitoring
Inactive timer
The Inactive timer module calculates the number of days the circuit breaker has remained in the
same open or closed state. The value is calculated by monitoring the states of the POSOPEN and
POSCLOSE auxiliary contacts.
The number of inactive days INADAYS is available as a service value. The initial number of inactive
days is set using the InitInactDays parameter.
Alarm limit check

MONALM is initiated when the number of inactive days and hours exceed the limit value defined by
the InactiveAlDays and InactivAlHrs setting. The alarm signal MONALM can be blocked by activating
the binary input BLKALM.
17.4.7.7 Circuit breaker spring charge monitoring GUID-F850A940-7890-4C37-8B31-6C7D5B30E582 v9
The circuit breaker spring charge monitoring subfunction calculates the spring charging time. The
operation is described in Figure 583.
SPRCHRST
Spring charging
SPRCHRD time SPCHT
measurement
RSTSPCHT
Alarm limit
BLOCK SPCHALM
Check
BLKALM
Figure 583: Functional module diagram for circuit breaker spring charge indication
Spring charging time measurement

The binary input SPRCHRST indicates the pickup of circuit breaker spring charging time. SPRCHRD
indicates that the circuit breaker spring is charged. The spring charging time is calculated from
the difference of these two signal timings. Spring charging indication is described in Figure583.
The last measured spring charging time SPCHT is provided as a service value. The spring charging
time SPCHT can be reset on the LHMI or by activating the input RSTSPCHT.
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Alarm limit check

If the time taken by the spring to charge is more than the value set with the SpChAlmTime setting,
the subfunction generates the SPCHALM alarm.
It is possible to block the SPCHALM alarm signal by activating the BLKALM binary input.
17.4.7.8 Circuit breaker gas pressure indication GUID-9D070D52-B499-4D45-9195-60181819184E v9
The circuit breaker gas pressure indication subfunction monitors the gas pressure inside the arc
chamber. The operation is described in Figure 584.
PRESALM
tDGasPresAlm
BLOCK AND 0 GPRESALM
BLKALM
PRESLO tDGasPresLO
AND 0 GPRESLO
Figure 584: Functional module diagram for circuit breaker gas pressure indication
When the PRESALM binary input is activated, the GPRESALM output is activated after a time delay
set with the tDGasPresAlm setting. The GPRESALM alarm can be blocked by activating the BLKALM
input.
If the pressure drops further to a very low level, the PRESLO binary input goes high, activating the
lockout alarm GPRESLO after a time delay set with the tDGasPresLO setting. The GPRESLO alarm
can be blocked by activating the BLKALM input.
The binary input BLOCK can be used to block the function. The activation of the BLOCK input
deactivates all outputs and resets internal timers. The alarm signals from the function can be
blocked by activating the binary input BLKALM.

GUID-B6799420-D726-460E-B02F-C7D4F1937432 v9
Table 832: SSCBR Technical data

Alarm level for open and close travel (0 – 200) ms ±3 ms
time
Alarm level for number of (0 – 9999) -
operations
Independent time delay for spring (0.00 – 60.00) s ±0.2% or ±30 ms whichever is
charging time alarm greater
Independent time delay for gas (0.00 – 60.00) s ±0.2% or ±30 ms whichever is
pressure alarm greater
Independent time delay for gas (0.00 – 60.00) s ±0.2% or ±30 ms whichever is
pressure lockout greater
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CB Contact Travel Time, opening ±3 ms
and closing
Remaining Life of CB ±2 operations
Accumulated Energy ±1.0% or ±0.5 whichever is greater
17.5 Event function EVENT SEMOD120002-1 v2
SEMOD167950-2 v2

Event function EVENT -
S00946 V1 EN-US
When using a Substation Automation system with LON or SPA communication, time-tagged
events can be sent at change or cyclically from the IED to the station level. These events are
created from any available signal in the IED that is connected to the Event function (EVENT). The
event function block is used for remote communication.
Analog and double indication values are also transferred through EVENT function.
EVENT
BLOCK
ÎNPUT1
ÎNPUT2
ÎNPUT3
ÎNPUT4
ÎNPUT5
ÎNPUT6
ÎNPUT7
ÎNPUT8
ÎNPUT9
ÎNPUT10
ÎNPUT11
ÎNPUT12
ÎNPUT13
ÎNPUT14
ÎNPUT15
ÎNPUT16
Figure 585: EVENT function block
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17.5.4 Signals IP11335-1 v2
Table 833: EVENT Input signals

INPUT1 GROUP 0 Input 1
SIGNAL
SIGNAL
SIGNAL
SIGNAL
SIGNAL
SIGNAL
SIGNAL
SIGNAL
SIGNAL
SIGNAL
SIGNAL
SIGNAL
SIGNAL
SIGNAL
SIGNAL
SIGNAL
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17.5.5 Settings IP11336-1 v2
Table 834: EVENT Non group settings (basic)

SPAChannelMask Disabled - - Disabled SPA channel mask
Channel 1-8
Channel 9-16
Channel 1-16
LONChannelMask Disabled - - Disabled LON channel mask
Channel 1-8
Channel 9-16
Channel 1-16
EventMask1 NoEvents - - AutoDetect Reporting criteria for input 1
OnSet
OnReset
OnChange
AutoDetect
OnSet
OnReset
OnChange
AutoDetect
OnSet
OnReset
OnChange
AutoDetect
OnSet
OnReset
OnChange
AutoDetect
OnSet
OnReset
OnChange
AutoDetect
OnSet
OnReset
OnChange
AutoDetect
OnSet
OnReset
OnChange
AutoDetect
OnSet
OnReset
OnChange
AutoDetect
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OnSet
OnReset
OnChange
AutoDetect
OnSet
OnReset
OnChange
AutoDetect
OnSet
OnReset
OnChange
AutoDetect
OnSet
OnReset
OnChange
AutoDetect
OnSet
OnReset
OnChange
AutoDetect
OnSet
OnReset
OnChange
AutoDetect
OnSet
OnReset
OnChange
AutoDetect
OnSet
OnReset
OnChange
AutoDetect
MinRepIntVal1 0 - 3600 s 1 2 Minimum reporting interval input 1
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The main purpose of the event function (EVENT) is to generate events when the state or value of
any of the connected input signals is in a state, or is undergoing a state transition, for which event
generation is enabled.
Each EVENT function has 16 inputs INPUT1 - INPUT16. Each input can be given a name from the
Application Configuration tool. The inputs are normally used to create single events, but are also
intended for double indication events.
EVENT function also has an input BLOCK to block the generation of events.
The events that are sent from the IED can originate from both internal logical signals and binary
input channels. The internal signals are time-tagged in the main processing module, while the
binary input channels are time-tagged directly on the input module. The time-tagging of the
events that are originated from internal logical signals have a resolution corresponding to the
execution cycle-time of the source application. The time-tagging of the events that are originated
from binary input signals have a resolution of 1 ms.
The outputs from EVENT function are formed by the reading of status, events and alarms by the
station level on every single input. The user-defined name for each input is intended to be used by
the station level.
All events according to the event mask are stored in a buffer, which contains up to 1000 events. If
new events appear before the oldest event in the buffer is read, the oldest event is overwritten
and an overflow alarm appears.
The events are produced according to the set-event masks. The event masks are treated
commonly for both the LON and SPA communication. The EventMask can be set individually for
each input channel. These settings are available:
• NoEvents
• OnSet
• OnReset
• OnChange
• AutoDetect
It is possible to define which part of EVENT function generates the events. This can be performed
individually for the SPAChannelMask and LONChannelMask respectively. For each communication
type these settings are available:
• Disabled
• Channel 1-8
• Channel 9-16
• Channel 1-16
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For LON communication the events normally are sent to station level at change. It is possibly also
to set a time for cyclic sending of the events individually for each input channel.
To protect the SA system from signals with a high change rate that can easily saturate the event
system or the communication subsystems behind it, a quota limiter is implemented. If an input
creates events at a rate that completely consume the granted quota then further events from the
channel will be blocked. This block will be removed when the input calms down and the
accumulated quota reach 66% of the maximum burst quota. The maximum burst quota per input
channel is 45 events per second.
17.6 Disturbance report DRPRDRE IP14584-1 v2
M16055-1 v7
Function description IEC 61850 identification IEC 60617 ANSI/IEEE C37.2

identification device number
Disturbance report DRPRDRE - -
Disturbance report A1RADR - A4RADR - -
Disturbance report B1RBDR - B8RBDR - -
17.6.2 Functionality M12153-3 v11.1.1
Complete and reliable information about disturbances in the primary and/or in the secondary
system together with continuous event-logging is accomplished by the disturbance report
functionality.
Disturbance report DRPRDRE, always included in the IED, acquires sampled data of all selected
analog input and binary signals connected to the function block with a, maximum of 40 analog and
128 binary signals.
The Disturbance report functionality is a common name for several functions:
• Sequential of events
• Indications
• Event recorder
• Trip value recorder
• Disturbance recorder
• Fault locator
The Disturbance report function is characterized by great flexibility regarding configuration,

initiating conditions, recording times, and large storage capacity.
A disturbance is defined as an activation of an input to the AnRADR or BnRBDR function blocks,

which are set to trigger the disturbance recorder. All connected signals from pickup of pre-fault
time to the end of post-fault time will be included in the recording.
Every disturbance report recording is saved in the IED in the standard Comtrade format as a
reader file HDR, a configuration file CFG, and a data file DAT. The same applies to all events, which
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are continuously saved in a ring-buffer. The local HMI is used to get information about the
recordings. The disturbance report files may be uploaded to PCM600 for further analysis using the
disturbance handling tool.
M12510-3 v3
DRPRDRE
DRPOFF
RECSTART
RECMADE
CLEARED
MEMUSED
Figure 586: DRPRDRE function block

SEMOD54837-4 v4
A1RADR
^GRP INPUT1
^GRP INPUT2
^GRP INPUT3
^GRP INPUT4
^GRP INPUT5
^GRP INPUT6
^GRP INPUT7
^GRP INPUT8
^GRP INPUT9
^GRP INPUT10
Figure 587: A1RADR function block example for A1RADR-A3RADR

SEMOD54843-4 v3
A4RADR
ÎNPUT31
ÎNPUT32
ÎNPUT33
ÎNPUT34
ÎNPUT35
ÎNPUT36
ÎNPUT37
ÎNPUT38
ÎNPUT39
ÎNPUT40
Figure 588: A4RADR function block, derived analog inputs
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SEMOD54845-4 v4
B1RBDR
ÎNPUT1
ÎNPUT2
ÎNPUT3
ÎNPUT4
ÎNPUT5
ÎNPUT6
ÎNPUT7
ÎNPUT8
ÎNPUT9
ÎNPUT10
ÎNPUT11
ÎNPUT12
ÎNPUT13
ÎNPUT14
ÎNPUT15
ÎNPUT16
Figure 589: B1RBDR function block, binary inputs, example for B1RBDR - B8RBDR
17.6.4 Signals
Table 835: DRPRDRE Output signals

DRPOFF BOOLEAN Disturbance report function turned off
RECSTART BOOLEAN Disturbance recording started
RECMADE BOOLEAN Disturbance recording made
CLEARED BOOLEAN All disturbances in the disturbance report cleared
MEMUSED BOOLEAN More than 80% of memory used
Table 836: A1RADR Input signals

GRPINPUT1 GROUP - Group signal for input 1
SIGNAL
SIGNAL
SIGNAL
SIGNAL
SIGNAL
SIGNAL
SIGNAL
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SIGNAL
SIGNAL
SIGNAL
GUID-D025D5D9-A0F3-4A00-891A-63AD5F609A77 v1
A2RADR and A3RADR functions have the same input signal specifications as A1RADR but with
different numbering:
• A2RADR: GRPINPUT11 to GRPINPUT20 (group signal for inputs 11 to 20)

• A3RADR: GRPINPUT21 to GRPINPUT30 (group signal for inputs 21 to 30)
Table 837: A4RADR Input signals

INPUT31 REAL 0 Analog channel 31
Table 838: B1RBDR Input signals

INPUT1 BOOLEAN 0 Binary channel 1
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GUID-D3A8067F-80F8-4174-BD2D-4C43F4B99020 v1
B2RBDR to B8RBDR functions have the same input signal specifications as B1RBDR but with
• B2RBDR: INPUT17 to INPUT32 (binary channels 17 to 32)

17.6.5 Settings
Table 839: DRPRDRE Non group settings (basic)

Enabled
PreFaultRecT 0.05 - 9.90 s 0.01 0.10 Pre-fault recording time
PostFaultRecT 0.1 - 10.0 s 0.1 0.5 Post-fault recording time
TimeLimit 0.5 - 10.0 s 0.1 1.0 Fault recording time limit
PostRetrig Disabled - - Disabled Post-fault retrig enabled (On) or not (Off)
Enabled
MaxNoStoreRec 10 - 100 - 1 100 Maximum number of stored disturbances
ZeroAngleRef 1 - 30 Ch 1 1 Trip value recorder, phasor reference
channel
OpModeTest Disabled - - Disabled Operation mode during test mode
Enabled
Table 840: A1RADR Non group settings (basic)

Operation01 Disabled - - Disabled Operation On/Off
Enabled
Enabled
Enabled
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Enabled
Enabled
Enabled
Enabled
Enabled
Enabled
Enabled
Table 841: A1RADR Non group settings (advanced)

NomValue01 0.0 - 999999.9 - 0.1 0.0 Nominal value for analog channel 1
UnderTrigOp01 Disabled - - Disabled Use under level trigger for analog channel 1
Enabled (on) or not (off)
UnderTrigLe01 0 - 200 % 1 50 Under trigger level for analog channel 1 in
% of signal
OverTrigOp01 Disabled - - Disabled Use over level trigger for analog channel 1
OverTrigLe01 0 - 5000 % 1 200 Over trigger level for analog channel 1 in %
of signal
UnderTrigOp02 Disabled - - Disabled Use under level trigger for analog channel
Enabled 2 (on) or not (off)
% of signal
of signal
% of signal
OverTrigLe03 0 - 5000 % 1 200 Overtrigger level for analog channel 3 in %
of signal
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% of signal
of signal
% of signal
of signal
% of signal
of signal
% of signal
of signal
% of signal
of signal
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% of signal
of signal
% of signal
OverTrigLe10 0 - 5000 % 1 200 Over trigger level for analog channel 10 in
% of signal
GUID-E05EEC82-CB90-4E73-B9C9-4C16FD95FCBF v1
A2RADR to A4RADR functions have the same Non group settings (basic) as A1RADR but with
• A2RADR: Operation11 to Operation20

A2RADR to A4RADR functions have the same Non group settings (advanced) as A1RADR but with
different numbering (examples given in brackets):
• A2RADR: 11 to 20 (NomValue11, nominal value for analog channel 11)

Table 842: B1RBDR Non group settings (basic)

TrigDR01 Disabled - - Disabled Trigger operation On/Off
Enabled
SetLED01 Disabled - - Disabled Set LED on HMI for binary channel 1
Pickup
Trip
Pickup and Trip
Enabled
Pickup
Trip
Pickup and Trip
Enabled
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Pickup
Trip
Pickup and Trip
Enabled
Pickup
Trip
Pickup and Trip
Enabled
Pickup
Trip
Pickup and Trip
Enabled
Pickup
Trip
Pickup and Trip
Enabled
Pickup
Trip
Pickup and Trip
Enabled
Pickup
Trip
Pickup and Trip
Enabled
Pickup
Trip
Pickup and Trip
Enabled
Pickup
Trip
Pickup and Trip
Enabled
Pickup
Trip
Pickup and Trip
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Enabled
Pickup
Trip
Pickup and Trip
Enabled
Pickup
Trip
Pickup and Trip
Enabled
Pickup
Trip
Pickup and Trip
Enabled
Pickup
Trip
Pickup and Trip
Enabled
Pickup
Trip
Pickup and Trip
FunType1 0 - 255 - 1 0 Function type for binary channel 1 (IEC
-60870-5-103)
InfNo1 0 - 255 - 1 0 Information number for binary channel 1
(IEC -60870-5-103)
-60870-5-103)
(IEC -60870-5-103)
-60870-5-103)
(IEC -60870-5-103)
-60870-5-103)
(IEC -60870-5-103)
-60870-5-103)
(IEC -60870-5-103)
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-60870-5-103)
(IEC -60870-5-103)
-60870-5-103)
(IEC -60870-5-103)
-60870-5-103)
(IEC -60870-5-103)
-60870-5-103)
(IEC -60870-5-103)
-60870-5-103)
(IEC -60870-5-103)
-60870-5-103)
(IEC -60870-5-103)
-60870-5-103)
(IEC -60870-5-103)
-60870-5-103)
(IEC -60870-5-103)
-60870-5-103)
(IEC -60870-5-103)
-60870-5-103)
(IEC -60870-5-103)
-60870-5-103)
(IEC -60870-5-103)
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Table 843: B1RBDR Non group settings (advanced)

TrigLevel01 Trig on 0 - - Trig on 1 Trigger on positive (1) or negative (0) slope
Trig on 1 for binary input 1
IndicationMa01 Hide - - Show Indication mask for binary channel 1
Show
Show
Show
Show
Show
Show
Show
Show
Show
Show
Show
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Show
Show
Show
Show
Show
GUID-8702C5B9-05A3-4E61-8952-C66483FFDFE2 v1
B2RBDR to B8RBDR functions have the same Non group settings (basic) as B1RBDR but with
• B2RBDR: 17 to 32 (SetLED17, set LED on HMI for binary channel 17)

B2RBDR to B8RBDR functions have the same Non group settings (advanced) as B1RBDR but with
• B2RBDR: 17 to 32 (IndicationMa17, indication mask for binary channel 17)

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Table 844: DRPRDRE Monitored data

MemoryUsed INTEGER - % Memory usage (0-100%)
UnTrigStatCh1 BOOLEAN - - Under level trig for analog channel 1
activated
OvTrigStatCh1 BOOLEAN - - Over level trig for analog channel 1
activated
activated
activated
activated
activated
activated
activated
activated
activated
activated
activated
activated
activated
activated
activated
activated
activated
activated
activated
activated
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activated
activated
activated
activated
activated
activated
activated
activated
activated
activated
activated
activated
activated
activated
activated
activated
activated
activated
activated
activated
activated
activated
activated
activated
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activated
activated
activated
activated
activated
activated
activated
activated
activated
activated
activated
activated
activated
activated
activated
activated
activated
activated
activated
activated
activated
activated
activated
activated
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activated
activated
activated
activated
activated
activated
activated
activated
activated
activated
activated
FaultNumber INTEGER - - Disturbance fault number

M12155-6 v13
Disturbance report DRPRDRE is a common name for several functions to supply the operator,
analysis engineer, and so on, with sufficient information about events in the system.
The functions included in the disturbance report are:
• Sequential of events (SOE)

• Indications (IND)
• Event recorder (ER)
• Trip value recorder (TVR)
• Disturbance recorder (DR)
• Fault locator (FL)
• Settings information
Figure 590 shows the relations between Disturbance Report, included functions and function
blocks. Sequential of events (SOE), Event recorder (ER) and Indications (IND) uses information
from the binary input function blocks (BxRBDR).Trip value recorder (TVR) uses analog information
from the analog input function blocks (AxRADR) which is used by FL after estimation by TVR.
Disturbance recorder DRPRDRE acquires information from both AxRADR and BxRBDR.
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AxRADR Disturbance Report
DRPRDRE FL
Analog signals
Trip value rec Fault locator
BxRBDR Disturbance
recorder
Binary signals
Sequential of
events
Event recorder
Indications
Figure 590: Disturbance report functions and related function blocks

The whole disturbance report can contain information for a number of recordings, each with the
data coming from all the parts mentioned above. The sequential of events function is working
continuously, independent of disturbance triggering, recording time, and so on. Settings
information function contains all the visible settings, parameter information of components
configured in ACT, runtime status and IEC61850 behavior that is added to the disturbance record
header file. These settings information is recorded in XML format and then grouped for each
function instance in the HDR file. The function, setting names and Enum values are same as in the
HMI and can be translated to the selected HMI language. All setting values are updated along with
the units. If the setting values are related to the global base value, then the setting value is scaled
and updated with corresponding global base unit. All information in the disturbance report is
stored in non-volatile flash memories. This implies that no information is lost in case of loss of
auxiliary power. Each report will get an identification number in the interval from 0-999.
Disturbance report
Record no. N Record no. N+1 Record no. N+100
General dist. Trip Event Disturbance Event list

Indications Fault locator
information values recordings recording (SOE)
en05000125_ansi.vsd
Figure 591: Disturbance report structure
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Up to 100 disturbance reports can be stored. If a new disturbance is to be recorded when the
memory is full, the oldest disturbance report is overwritten by the new one. The total recording
capacity for the disturbance recorder is depending of sampling frequency, number of analog and
binary channels and recording time and settings information (refer Figure 593 for the recording
times definition). Figure 592 shows the number of recordings versus the total recording time
tested for a typical configuration. In a 60 Hz system, it is possible to record 80 disturbance
recordings where the average recording time for each disturbance recording file is 3.4 seconds
with 40 analog and 96 binary signals in each recording. The memory limit does not affect the rest
of the disturbance recordings report (Event list (EL), Event recordings (ER), Indications (IND) and
Trip value recordings (TVR)).
Number of recordings
100
3.4s
80 3.4s 20 analog
96 binary
40 analog
96 binary
60 6.3s
6.3s
6.3s 50 Hz
40
60 Hz
Total recording time
250 300 350 400 s
en05000488_ansi.vsd
Figure 592: Example of number of recordings versus the total recording time
The maximum number of recordings depend on each recordings total recording

time. Long recording time will reduce the number of recordings to less than 100.
The IED flash disk should NOT be used to store any user files. This might cause
disturbance recordings to be deleted due to lack of disk space.
Disturbance information M12155-175 v3

Date and time of the disturbance, the indications, events, fault location and the trip values are
available on the local HMI. To acquire a complete disturbance report the user must use a PC and -
either the PCM600 Disturbance handling tool - or a FTP or MMS (over 61850) client. The PC can be
connected to the IED front, rear or remotely via the station bus (Ethernet ports).
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Indications (IND) M12155-87 v5

Indications is a list of signals that were activated during the total recording time of the
disturbance (not time-tagged).
Event recorder (ER) M12155-89 v5

The event recorder may contain a list of up to 150 time-tagged events, which have occurred during
the disturbance. The information is available via the local HMI or PCM600.
Sequential of events (SOE) M12155-177 v6

The sequetial of events may contain a list of totally 1000 time-tagged events. The list information
is continuously updated when selected binary signals change state. The oldest data is overwritten.
The logged signals may be presented via local HMI or PCM600.
Trip value recorder (TVR) M12155-91 v5

The recorded trip values include phasors of selected analog signals before the fault and during the
fault.
Disturbance recorder (DR) M12155-97 v5

Disturbance recorder records analog and binary signal data before, during and after the fault.
Fault locator (FL) M12155-186 v4

The fault location function calculates the distance to fault.
Time tagging M12155-194 v1

The IED has a built-in real-time calendar and clock. This function is used for all time tagging within
the disturbance report
Recording times M12155-99 v5

Disturbance report DRPRDRE records information about a disturbance during a settable time
frame. The recording times are valid for the whole disturbance report. Disturbance recorder (DR),
event recorder (ER) and indication function register disturbance data and events during
tRecording, the total recording time.
The total recording time, tRecording, of a recorded disturbance is:
tRecording = PreFaultrecT + tFault + PostFaultrecT or PreFaultrecT + TimeLimit, depending on

which criterion stops the current disturbance recording
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Trig point
TimeLimit
PreFaultRecT PostFaultRecT
1 2 3
en05000487.vsd
Figure 593: The recording times definition
PreFaultRecT, 1 Pre-fault or pre-trigger recording time. The time before the fault including the trip time of the
trigger. Use the setting PreFaultRecT to set this time.
tFault, 2 Fault time of the recording. The fault time cannot be set. It continues as long as any valid trigger
condition, binary or analog, persists (unless limited by TimeLimit the limit time).
PostFaultRecT, 3 Post fault recording time. The time the disturbance recording continues after all activated
triggers are reset. Use the setting PostFaultRecT to set this time.
TimeLimit Limit time. The maximum allowed recording time after the disturbance recording was triggered.
The limit time is used to eliminate the consequences of a trigger that does not reset within a
reasonable time interval. It limits the maximum recording time of a recording and prevents
subsequent overwriting of already stored disturbances. Use the setting TimeLimit to set this
time.
Analog signals M12155-160 v7

Up to 40 analog signals can be selected for recording by the Disturbance recorder and triggering
of the Disturbance report function. Out of these 40, 30 are reserved for external analog signals
from analog input modules (TRM) and line data communication module (LDCM) via preprocessing
function blocks (SMAI) and summation block (3PHSUM). The last 10 channels may be connected to
internally calculated analog signals available as function block output signals (mA input signals,
phase differential currents, bias currents and so on).
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SMAI A1RADR
Block AI3P A2RADR
^GRP2_A AI1 INPUT1 A3RADR
External analog
^GRP2_B AI2 INPUT2
signals
^GRP2_C AI3 INPUT3
^GRP2_N AI4 INPUT4
Type AIN INPUT5
INPUT6
...
A4RADR
INPUT31
INPUT32
INPUT33
Internal analog signals INPUT34
INPUT35
INPUT36
...
INPUT40
Figure 594: Analog input function blocks

The external input signals will be acquired, filtered and skewed and (after configuration) available
as an input signal on the AxRADR function block via the SMAI function block. The information is
saved at the Disturbance report base sampling rate (1000 or 1200 Hz). Internally calculated signals
are updated according to the cycle time of the specific function. If a function is running at lower
speed than the base sampling rate, Disturbance recorder will use the latest updated sample until a
new updated sample is available.
If the IED is preconfigured the only tool needed for analog configuration of the Disturbance report
is the Signal Matrix Tool (SMT, external signal configuration). In case of modification of a
preconfigured IED or general internal configuration the Application Configuration tool within
PCM600 is used.
The preprocessor function block (SMAI) calculates the residual quantities in cases where only the
three phases are connected (AI4-input not used). SMAI makes the information available as a group
signal output, phase outputs and calculated residual output (AIN-output). In situations where AI4-
input is used as an input signal the corresponding information is available on the non-calculated
output (AI4) on the SMAI function block. Connect the signals to the AxRADR accordingly.
For each of the analog signals, Operation = Enabled means that it is recorded by the disturbance
recorder. The trigger is independent of the setting of Operation, and triggers even if operation is
set to Disabled. Both undervoltage and overvoltage can be used as trigger conditions. The same
applies for the current signals.
If Operation = Disabled, no waveform (samples) will be recorded and reported in graph. However,
Trip value, pre-fault and fault value will be recorded and reported. The input channel can still be
used to trig the disturbance recorder.
If Operation = Enabled, waveform (samples) will also be recorded and reported in graph.
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The analog signals are presented only in the disturbance recording, but they affect the entire
disturbance report when being used as triggers.
Binary signals M12155-162 v8

Up to 128 binary signals can be selected to be handled by disturbance report. The signals can be
selected from internal logical and binary input signals. A binary signal is selected to be recorded
when:
• the corresponding function block is included in the configuration

• the signal is connected to the input of the function block
Each of the 128 signals can be selected as a trigger of the disturbance report (Operation =
Operation—>TrigDR =Enabled). A binary signal can be selected to activate the red LED on the local
HMI (SetLED = Enabled).
The selected signals are presented in the event recorder, sequential of events and the disturbance
recording. But they affect the whole disturbance report when they are used as triggers. The
indications are also selected from these 128 signals with local HMI IndicationMask = Show/Hide.
Trigger signals M12155-164 v2

The trigger conditions affect the entire disturbance report, except the sequential of events, which
runs continuously. As soon as at least one trigger condition is fulfilled, a complete disturbance
report is recorded. On the other hand, if no trigger condition is fulfilled, there is no disturbance
report, no indications, and so on. This implies the importance of choosing the right signals as
trigger conditions.
A trigger can be of type:
• Manual trigger
• Binary-signal trigger
• Analog-signal trigger (over/under function)
Manual trigger M12155-167 v4

A disturbance report can be manually triggered from the local HMI, PCM600 or via station bus (IEC
61850). When the trigger is activated, the manual trigger signal is generated. This feature is
especially useful for testing. Refer to the operator's manual for procedure.
Binary-signal trigger M12155-169 v4

Any binary signal state (logic one or a logic zero) can be selected to generate a trigger (Triglevel =
Trig on 0/Trig on 1). When a binary signal is selected to generate a trigger from a logic zero, the
selected signal will not be listed in the indications list of the disturbance report.
Analog-signal trigger M12155-171 v6

All analog signals are available for trigger purposes, no matter if they are recorded in the
disturbance recorder or not. The settings are OverTrigOp, UnderTrigOp, OverTrigLe and
UnderTrigLe.
The check of the trigger condition is based on peak-to-peak values. When this is found, the
absolute average value of these two peak values is calculated. If the average value is above the
threshold level for an overvoltage or overcurrent trigger, this trigger is indicated with a greater
than (>) sign with the user-defined name.
If the average value is below the set threshold level for an undervoltage or undercurrent trigger,
this trigger is indicated with a less than (<) sign with its name. The procedure is separately
performed for each channel.
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This method of checking the analog trigger conditions gives a function which is insensitive to DC
offset in the signal. The trip time for this initiation is typically in the range of one cycle, 16 2/3 ms
for a 60 Hz network.
All under/over trig signal information is available on the local HMI and PCM600.
Post Retrigger M12155-173 v6

Disturbance report function does not automatically respond to any new trig condition during a
recording, after all signals set as trigger signals have been reset. However, under certain
circumstances the fault condition may reoccur during the post-fault recording, for instance by
automatic reclosing to a still faulty power line.
In order to capture the new disturbance it is possible to allow retriggering (PostRetrig = Enabled)
during the post-fault time. In this case a new, complete recording will pickup and, during a period,
run in parallel with the initial recording.
When the retrig parameter is disabled (PostRetrig = Disabled), a new recording will not pickup
until the post-fault (PostFaultrecT or TimeLimit) period is terminated. If a new trig occurs during
the post-fault period and lasts longer than the proceeding recording a new complete recording
will be started.
Disturbance report function can handle maximum 3 simultaneous disturbance recordings.

M12760-1 v9.1.1
Table 845: DRPRDRE technical data

Pre-fault time (0.05–9.90) s -
Post-fault time (0.1–10.0) s -
Limit time (0.5–10.0) s -
Maximum number of recordings 100, first in - first out -
Time tagging resolution 1 ms See table 1041
Maximum number of analog inputs 30 + 10 (external + internally -
derived)
Maximum number of binary inputs 128 -
Maximum number of phasors in the Trip Value 30 -
recorder per recording
Maximum number of indications in a disturbance 96 -
report
Maximum number of events in the Event recording per 150 -
recording
Maximum number of events in the Sequence of events 1000, first in - first out -
Maximum total recording time (3.4 s recording time 340 seconds (100 recordings) -
and maximum number of channels, typical value) at 50 Hz, 280 seconds (80
recordings) at 60 Hz
Sampling rate 1 kHz at 50 Hz -
1.2 kHz at 60 Hz
Recording bandwidth (5-300) Hz -
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17.7 Logical signal status report BINSTATREP GUID-E7A2DB38-DD96-4296-B3D5-EB7FBE77CE07 v2
17.7.1 Identification GUID-E0247779-27A2-4E6C-A6DD-D4C31516CA5C v3

Logical signal status report BINSTATREP - -
17.7.2 Functionality GUID-A72E490D-01F7-4874-B010-8BDE38391D88 v3
The Logical signal status report (BINSTATREP) function makes it possible for a SPA master to poll
signals from various other functions.
17.7.3 Function block GUID-BA0A5BC3-493B-4FE3-B4A9-14F60A88A22F v2
BINSTATREP
BLOCK OUTPUT1
ÎNPUT1 OUTPUT2
ÎNPUT2 OUTPUT3
ÎNPUT3 OUTPUT4
ÎNPUT4 OUTPUT5
ÎNPUT5 OUTPUT6
ÎNPUT6 OUTPUT7
ÎNPUT7 OUTPUT8
ÎNPUT8 OUTPUT9
ÎNPUT9 OUTPUT10
ÎNPUT10 OUTPUT11
ÎNPUT11 OUTPUT12
ÎNPUT12 OUTPUT13
ÎNPUT13 OUTPUT14
ÎNPUT14 OUTPUT15
ÎNPUT15 OUTPUT16
ÎNPUT16
Figure 595: BINSTATREP function block
17.7.4 Signals
Table 846: BINSTATREP Input signals

INPUT1 BOOLEAN 0 Single status report input 1
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Table 847: BINSTATREP Output signals

OUTPUT1 BOOLEAN Logical status report output 1
17.7.5 Settings
Table 848: BINSTATREP Non group settings (basic)

t 0.0 - 60.0 s 0.1 10.0 Time delay of function
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17.7.6 Operation principle GUID-537921CA-82B9-4A02-BAD1-67E3AC61AE96 v3
The Logical signal status report (BINSTATREP) function has 16 inputs and 16 outputs. The output
status follows the inputs and can be read from the local HMI or via SPA communication.
When an input is set, the respective output is set for a user defined time. If the input signal
remains set for a longer period, the output will remain set until the input signal resets.
INPUTn
OUTPUTn
t t
Figure 596: BINSTATREP logical diagram
17.8 Measured value expander block RANGE_XP SEMOD52451-1 v2
SEMOD113212-2 v3

Measured value expander block RANGE_XP - -
The current and voltage measurements functions (CVMMXN, CMMXU, VMMXU and VNMMXU),
current and voltage sequence measurement functions (CMSQI and VMSQI) and IEC 61850 generic
communication I/O functions (MVGAPC) are provided with measurement supervision
functionality. All measured values can be supervised with four settable limits: low-low limit, low
limit, high limit and high-high limit. The measure value expander block (RANGE_XP) has been
introduced to enable translating the integer output signal from the measuring functions to 5
binary signals: below low-low limit, below low limit, normal, above high limit or above high-high
limit. The output signals can be used as conditions in the configurable logic or for alarming
purpose.
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RANGE_XP
RANGE* HIGHHIGH
HIGH
NORMAL
LOW
LOWLOW
Figure 597: RANGE_XP function block
Table 849: RANGE_XP Input signals

RANGE INTEGER 0 Measured value range
Table 850: RANGE_XP Output signals

HIGHHIGH BOOLEAN Measured value is above high-high limit
HIGH BOOLEAN Measured value is between high and high-high limit
NORMAL BOOLEAN Measured value is between high and low limit
LOW BOOLEAN Measured value is between low and low-low limit
LOWLOW BOOLEAN Measured value is below low-low limit
The input signal must be connected to a range output of a measuring function block (CVMMXN,
CMMXU, VMMXU, VNMMXU, CMSQI, VMSQ or MVGAPC). The function block converts the input
integer value to five binary output signals according to table 851.
Table 851: Input integer value converted to binary output signals

Measured supervised below low- between low‐ between low between above high-high limit
value is: low limit low and low and high limit high-high
Output: limit and high limit
LOWLOW High
LOW High
NORMAL High
HIGH High
HIGHHIGH High
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17.9 Fault locator LMBRFLO IP14592-1 v2
M14892-1 v3

Fault locator LMBRFLO - -
The accurate fault locator is an essential component to minimize the outages after a persistent
fault and/or to pin-point a weak spot on the line.
The fault locator is an impedance measuring function giving the distance to the fault as a relative
(in%) or an absolute value. The main advantage is the high accuracy achieved by compensating for
load current and for the mutual zero-sequence effect on double circuit lines.
The compensation includes setting of the remote and local sources and calculation of the
distribution of fault currents from each side. This distribution of fault current, together with
recorded load (pre-fault) currents, is used to exactly calculate the fault position. The fault can be
recalculated with new source data at the actual fault to further increase the accuracy.
Especially on heavily loaded long lines, where the source voltage angles can be up to 35-40 degrees
apart, the accuracy can be still maintained with the advanced compensation included in fault
locator.
LMBRFLO
PHSELL1* CALCMADE
PHSELL2* FLT_X
PHSELL3* BCD_80
CALCDIST* BCD_40
BCD_20
BCD_10
BCD_8
BCD_4
BCD_2
BCD_1
Figure 598: LMBRFLO function block
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17.9.4 Signals
Table 852: LMBRFLO Input signals

PHSELL1 BOOLEAN 0 Phase selection phase A
PHSELL2 BOOLEAN 0 Phase selection phase B
PHSELL3 BOOLEAN 0 Phase selection phase C
CALCDIST BOOLEAN 0 Input signal to initiate fault distance calculation
Table 853: LMBRFLO Output signals

CALCMADE BOOLEAN Fault calculation made
FLT_X REAL Reactive distance to fault
BCD_80 BOOLEAN Distance in binary coded data, bit represents 80%
17.9.5 Settings
Table 854: LMBRFLO Group settings (basic)

R1A 0.001 - 1500.000 Ohm/p 0.001 2.000 Source resistance A (near end)
X1A 0.001 - 1500.000 Ohm/p 0.001 12.000 Source reactance A (near end)
R1B 0.001 - 1500.000 Ohm/p 0.001 2.000 Source resistance B (far end)
X1B 0.001 - 1500.000 Ohm/p 0.001 12.000 Source reactance B (far end)
R1L 0.001 - 1500.000 Ohm/p 0.001 2.000 Positive sequence line resistance
X1L 0.001 - 1500.000 Ohm/p 0.001 12.500 Positive sequence line reactance
R0L 0.001 - 1500.000 Ohm/p 0.001 8.750 Zero sequence line resistance
X0L 0.001 - 1500.000 Ohm/p 0.001 50.000 Zero sequence line reactance
R0M 0.000 - 1500.000 Ohm/p 0.001 0.000 Zero sequence mutual resistance
X0M 0.000 - 1500.000 Ohm/p 0.001 0.000 Zero sequence mutual reactance
LineLengthUnit kilometer - - kilometer Line length unit
miles
LineLength 0.0 - 10000.0 - 0.1 40.0 Length of line
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Table 855: LMBRFLO Non group settings (basic)

DrepChNoIL1 1 - 30 Ch 1 1 Recorder input number recording phase
current, IL1
current, IL2
current, IL3
DrepChNoIN 0 - 30 Ch 1 4 Recorder input number recording residual
current, IN
DrepChNoIP 0 - 30 Ch 1 0 Recorder input number recording 3I0 on
parallel line
DrepChNoUL1 1 - 30 Ch 1 5 Recorder input number recording phase
voltage, UL1
voltage, UL2
voltage, UL3
UL1Gain 0.000 - 10.000 - 0.001 1.000 Scale factor for fine tuning of voltage
magnitude L1
magnitude L2
magnitude L3

Table 856: LMBRFLO Monitored data

FLT_REL REAL - - Distance to fault, relative
FLT_DIST REAL - - Distance to fault in line length unit
FLT_X REAL - Ohm Reactive distance to fault
FLT_R REAL - Ohm Resistive distance to fault
FLT_LOOP INTEGER 1=L1-N - Fault loop
2=L2-N
3=L3-N
4=L1-L2
5=L2-L3
6=L3-L1
7=Others

M14982-4 v7
The Fault locator (LMBRFLO) in the IED is an essential complement to other monitoring functions,
since it measures and indicates the distance to the fault with high accuracy.
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When calculating distance to fault, pre-fault and fault phasors of currents and voltages are
selected from the Trip value recorder data, thus the analog signals used by the fault locator must
be among those connected to the disturbance report function. The analog configuration (channel
selection) is performed using the parameter setting tool within PCM600.
The calculation algorithm considers the effect of load currents, double-end infeed and additional
fault resistance.
R0L+jX0L
R1L+jX1L
R1A+jX1A R1B+jX1B
Z0m=Z0m+jX0m
R0L+jX0L
R1L+jX1L
DRPRDRE
LMBRFLO
Figure 599: Simplified network configuration with network data, required for settings of the
fault location-measuring function
If source impedance in the near and far end of the protected line have changed in a significant
manner relative to the set values at fault location calculation time (due to exceptional switching
state in the immediate network, power generation out of order, and so on), new values can be
entered via the local HMI and a recalculation of the distance to the fault can be ordered using the
algorithm described below. It’s also possible to change fault loop. In this way, a more accurate
location of the fault can be achieved.
The function indicates the distance to the fault as a percentage of the line length, in kilometers or
miles according to the setting LineLengthUnit. The fault location is stored as a part of the
disturbance report information (ER, DR, IND, TVR and FL) and managed via the local HMI or
PCM600.
17.9.7.1 Measuring Principle M14983-4 v2
For transmission lines with voltage sources at both line ends, the effect of double-end infeed and
additional fault resistance must be considered when calculating the distance to the fault from the
currents and voltages at one line end. If this is not done, the accuracy of the calculated figure will
vary with the load flow and the amount of additional fault resistance.
The calculation algorithm used in the fault locator in compensates for the effect of double-end
infeed, additional fault resistance and load current.
M14983-5 v1
17.9.7.2 Accurate algorithm for measurement of distance to fault M14983-7 v4
Figure 600 shows a single-line diagram of a single transmission line, that is fed from both ends
with source impedances ZA and ZB. Assume that the fault occurs at a distance F from IED A on a
line with the length L and impedance ZL. The fault resistance is defined as RF. A single-line model is
used for better clarification of the algorithm.
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A B
ZA IA pZL IB (1-p).ZL ZB
IF
VA RF
xx01000171_ansi.vsd
Figure 600: Fault on transmission line fed from both ends

From figure 600 it is evident that:
VA = IA × p × ZL + IF × RF
Where:
IA is the line current after the fault, that is, pre-fault current plus current change due to the fault,
IF is the fault current and
p is a relative distance to the fault
The fault current is expressed in measurable quantities by:
IF A
IF = --------
DA
Where:
IFA is the change in current at the point of measurement, IED A and
DA is a fault current-distribution factor, that is, the ratio between the fault current at line end A and the total
fault current.
For a single line, the value is equal to:
( 1 – p ) × Z L + ZB
DA = -----------------------------------------
Z A + Z L + ZB
Thus, the general fault location equation for a single line is:
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IFA
VA = IA × p × ZL + × RF
DA
Table 857: Expressions for VA, IA and IFA for different types of faults
Fault type: VA IA IFA

AG VAA IAA + KN x INA
3
2 × D (IAA - I0 A )
BG VBA IBA + KN x INA

3
2 × D (IBA - I0 A )
CG VCA ICA + KN x INA

3
2 × D (ICA - I0 A )
ABC, AB, ABG VAA-VBA IAA - IBA DIABA
BC, BCG VBA-VCA IBA - ICA DICBA
CA, CAG VCA-VAA ICA - IAA DICAA
The KN complex quantity for zero-sequence compensation for the single line is equal to:
Z0L – Z 1L
K N = ------------------------
3 × Z1L
DI is the change in current, that is the current after the fault minus the current before the fault.
In the following, the positive sequence impedance for ZA, ZB and ZL is inserted into the equations,
because this is the value used in the algorithm.
For double lines, the fault equation is:
IFA
VA = IA × p × Z1L + × RF + I0P × Z0M
DA
Where:
I0P is a zero sequence current of the parallel line,
Z0M is a mutual zero sequence impedance and
DA is the distribution factor of the parallel line, which is:
( 1 – p ) × ( ZA + ZA L + ZB ) + Z B
DA = ----------------------------------------------------------------------------
-
2 × ZA + Z L + 2 × Z B
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The KN compensation factor for the double line becomes:
Z0L – Z 1L Z 0M I 0P
K N = ----------------------- - × -------
- + ----------------
3 × Z1L 3 × Z1L I 0A
From these equations it can be seen, that, if Z0m = 0, then the general fault location equation for a
single line is obtained. Only the distribution factor differs in these two cases.
Because the DA distribution factor according to equation 217 or 219 is a function of p, the general
equation 219 can be written in the form:
2
p – p × K1 + K2 – K3 × RF = 0
Where:
VA ZB
K1 = + +1
IA × ZL ZL + Z ADD
VA æ ZB ö
K2 = ×ç + 1÷
IA × ZL è ZL + Z ADD ø
IF A Z A + ZB
- × æ --------------------------
K 3 = --------------- - + 1ö
è
I A × Z L Z 1 + ZA DD ø
and:
• ZADD = ZA + ZB for parallel lines.

• IA, IFA and VA are given in the above table.
• KN is calculated automatically according to equation 220.
• ZA, ZB, ZL, Z0L and Z0M are setting parameters.
For a single line, Z0M = 0 and ZADD = 0. Thus, equation 221 applies to both single and parallel lines.
Equation 221 can be divided into real and imaginary parts:
2
p – p × Re ( K 1 ) + Re ( K 2 ) – R F × Re ( K 3 ) = 0
– p × Im × ( K1 ) + Im × ( K 2 ) – R F × Im × ( K3 ) = 0
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If the imaginary part of K3 is not zero, RF can be solved according to equation 226, and then
inserted to equation 225. According to equation 225, the relative distance to the fault is solved as
the root of a quadratic equation.
Equation 225 gives two different values for the relative distance to the fault as a solution. A
simplified load compensated algorithm, which gives an unequivocal figure for the relative distance
to the fault, is used to establish the value that should be selected.
If the load compensated algorithms according to the above do not give a reliable solution, a less
accurate, non-compensated impedance model is used to calculate the relative distance to the
fault.
17.9.7.3 The non-compensated impedance model M14983-121 v3
In the non-compensated impedance model, IA line current is used instead of IFA fault current:
VA = p × Z1L × IA + RF × IA
Where:
IA is according to table 857.
The accuracy of the distance-to-fault calculation, using the non-compensated impedance model, is
influenced by the pre-fault load current. So, this method is only used if the load compensated
models do not function.
17.9.7.4 IEC 60870-5-103 M14983-135 v2
The communication protocol IEC 60870-5-103 may be used to poll fault location information from
the IED to a master (that is station HSI). There are two outputs that must be connected to
appropriate inputs on the function block I103StatFltDis, FLTDISTX gives distance to fault
(reactance, according the standard) and CALCMADE gives a pulse (100 ms) when a result is
obtainable on FLTDISTX output.

M14987-1 v6
Table 858: LMBRFLO technical data

Function Value or range Accuracy
Reactive and resistive reach (0.001-1500.000) Ω/phase ±2.0% static accuracy
Conditions:
Phase selection According to input signals -

Maximum number of fault 100 -
locations
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17.10 Limit counter L4UFCNT GUID-22E141DB-38B3-462C-B031-73F7466DD135 v1
17.10.1.1 Identification GUID-F3FB7B33-B189-4819-A1F0-8AC7762E9B7E v2

Limit counter L4UFCNT -
17.10.2 Functionality GUID-13157EAB-1686-4D2E-85DF-EC89768F3572 v5
The 12 Up limit counter L4UFCNT provides a settable counter with four independent limits where
the number of positive and/or negative sides on the input signal are counted against the setting
values for limits. The output for each limit is activated when the counted value reaches that limit.
Overflow indication is included for each up-counter.

GUID-4D58423F-329C-4553-9FAF-E55A368849A5 v2
Limit counter (L4UFCNT) counts the number of positive and/or negative sides on the binary input
signal depending on the function settings. L4UFCNT also checks if the accumulated value is equal
or greater than any of its four settable limits. The four limit outputs will be activated relatively on
reach of each limit and remain activated until the reset of the function. Moreover, the content of
L4UFCNT is stored in flash memory and will not be lost at an auxiliary power interruption.
17.10.3.1 Design GUID-B643C994-D0BA-4BE9-BACB-ADEA0197CAE4 v1
Figure 601 illustrates the general logic diagram of the function.
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BLOCK
INPUT
Operation
Counter
RESET
VALUE
Overflow
CountType Detection OVERFLOW
OnMaxValue
Limit LIMIT1 … 4
MaxValue Check
CounterLimit1...4
Error ERROR
Detection
InitialValue
Figure 601: Logic diagram

The counter can be initialized to count from a settable non-zero value after reset of the function.
The function has also a maximum counted value check. The three possibilities after reaching the
maximum counted value are:
• Stops counting and activates a steady overflow indication for the next count
• Rolls over to zero and activates a steady overflow indication for the next count
• Rolls over to zero and activates a pulsed overflow indication for the next count
The pulsed overflow output lasts up to the first count after rolling over to zero, as illustrated in
figure 602.
Overflow indication
Actual value ... Max value -1® Max value ® Max value +1 ® Max value +2 ® Max value +3 ...
Counted value ... Max value -1 ® Max value ® 0 ® 1 ® 2 ...
Figure 602: Overflow indication when OnMaxValue is set to rollover pulsed

The Error output is activated as an indicator of setting the counter limits and/or initial value
setting(s) greater than the maximum value. The counter stops counting the input and all the
outputs except the error output remains at zero state. The error condition remains until the
correct settings for counter limits and/or initial value setting(s) are applied.
The function can be blocked through a block input. During the block time, input is not counted and
outputs remain in their previous states. However, the counter can be initialized after reset of the
function. In this case the outputs remain in their initial states until the release of the block input.
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17.10.3.2 Reporting GUID-7DF874A7-F7DA-48DD-8760-5E4CF05FD870 v1
The content of the counter can be read on the local HMI.
Reset of the counter can be performed from the local HMI or via a binary input.
Reading of content and resetting of the function can also be performed remotely, for example
from a IEC 61850 client. The value can also be presented as a measurement on the local HMI
graphical display.
17.10.4 Function block GUID-C90E7375-F3CC-414A-93FC-9AC4A9156FFC v1
L4UFCNT
BLOCK ERROR
INPUT OVERFLOW
RESET LIMIT1
LIMIT2
LIMIT3
LIMIT4
VALUE
Figure 603: L4UFCNT function block
17.10.5 Signals
Table 859: L4UFCNT Input signals

INPUT BOOLEAN 0 Input for counter
RESET BOOLEAN 0 Reset of function
Table 860: L4UFCNT Output signals

ERROR BOOLEAN Error indication on counter limit and/or initial value settings
OVERFLOW BOOLEAN Overflow indication on count of greater than MaxValue
LIMIT1 BOOLEAN Counted value is larger than or equal to CounterLimit1
VALUE INTEGER Counted value
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17.10.6 Settings
Table 861: L4UFCNT Group settings (basic)

On
CountType Positive edge - - Positive edge Select counting on positive and/or
Negative edge negative sides
Both edges
CounterLimit1 1 - 65535 - 1 100 Value of the first limit
CounterLimit2 1 - 65535 - 1 200 Value of the second limit
CounterLimit3 1 - 65535 - 1 300 Value of the third limit
CounterLimit4 1 - 65535 - 1 400 Value of the fourth limit
MaxValue 1 - 65535 - 1 500 Maximum count value
OnMaxValue Stop - - Stop Select if counter stops or rolls over after
Rollover Steady reaching maxValue with steady or pulsed
Rollover Pulsed overflow flag
InitialValue 0 - 65535 - 1 0 Initial count value after reset of the
function

Table 862: L4UFCNT Monitored data

VALUE INTEGER - - Counted value

GUID-C43B8654-60FE-4E20-8328-754C238F4AD0 v2
Table 863: L4UFCNTtechnical data

Counter value 0-65535 -
Max. count up speed 30 pulses/s (50% duty cycle) -
17.11 Running hour-meter TEILGAPC
17.11.1 Identification GUID-3F9EF4FA-74FA-4D1D-88A0-E948B722B64F v1
Function Description IEC 61850 IEC 60617 ANSI/IEEE C37.2 device

identification identification number
Running hour-meter TEILGAPC - -
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17.11.2 Functionality GUID-464FB24F-B367-446C-963A-A14841943B87 v2
The Running hour-meter (TEILGAPC) function is a function that accumulates the elapsed time
when a given binary signal has been high, see also figure 604.
BLOCK
RESET
IN Time Accumulation ACC_HOUR
ADDTIME with Retain
ACC_DAY
tAddToTime
q-1
OVERFLOW
a
&
a>b
99 999.9 h b
WARNING
a
&
a>b
tWarning b
ALARM
a
&
a>b
tAlarm b
Figure 604: TEILGAPC logics

The main features of TEILGAPC are:
• Applicable to very long time accumulation (≤ 99999.9 hours)

• Supervision of limit transgression conditions and rollover/overflow
• Possibility to define a warning and alarm with the resolution of 0.1 hours
• Retain any saved accumulation value at a restart
• Possibilities for blocking and reset
• Possibility for manual addition of accumulated time
• Reporting of the accumulated time
17.11.3 Function block GUID-D0E9688B-C9D9-44B7-BD95-81132CCA5E4F v1
TEILGAPC
BLOCK ALARM
IN WARNING
ADDTIME OVERFLOW
RESET ACC_HOUR
ACC_DAY
IEC15000323.vsdx
Figure 605: TEILGAPC function block
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17.11.4 Signals
Table 864: TEILGAPC Input signals

BLOCK BOOLEAN 0 Freeze the accumulation and block the outputs
IN BOOLEAN 0 The input signal that is used to measure the elapsed time, when
its value is high
ADDTIME BOOLEAN 0 Add time to the accumulation
RESET BOOLEAN 0 Reset accumulated time
Table 865: TEILGAPC Output signals

ALARM BOOLEAN Indicator that accumulated time has reached alarm limit
WARNING BOOLEAN Indicator that accumulated time has reached warning limit
OVERFLOW BOOLEAN Indicator that accumulated time has reached overflow limit
ACC_HOUR REAL Accumulated time in hours
ACC_DAY REAL Accumulated time in days
17.11.5 Settings
Table 866: TEILGAPC Group settings (basic)

Enabled
tAlarm 1.0 - 99999.9 Hour 0.1 90000.0 Time limit for alarm supervision
tWarning 1.0 - 99999.9 Hour 0.1 50000.0 Time limit for warning supervision
tAddToTime 0.0 - 99999.9 Hour 0.1 0.0 Time to add to the accumulation
17.11.6 Operation principle GUID-C7F91D4E-5942-4006-B7C8-4F499E7DC49D v3
Figure 606 describes the simplified logic of the function.
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Loop Delay
tWarning
OVERFLOW
tAlarm
Transgression Supervision WARNING
Plus Retain
ALARM
BLOCK
RESET ACC_HOUR
Time Accumulation
IN
ADDTIME ACC_DAY
tAddToTime
Loop Delay
IEC15000322.vsd
Figure 606: TEILGAPC Simplified logic

TEILGAPC main functionalities
• IN: Accumulation of the elapsed time when input IN is high

• applicable to very long time accumulation (≤99999.9 hours)
• output ACC_HOUR presents accumulated value in hours and ACC_DAY presents
accumulated value in days
• accumulated value is retained in a non-volatile memory
• any retained value is used as initiation value for the integration following by a restart
• RESET: Reset of the accumulated value. Consequently all other outputs are also reset
• independent of the input IN value
• reset the value of the nonvolatile memory to zero.
Note that the nonvolatile memory will not reset to zero if the input IN is high during the
reset.
• reset can be made by activation of input RESET or from LHMI or with IEC 61850
command
• ADDTIME: Manually add time to the currently accumulated time
• the amount of time to be added is defined by a setting tAddToTime
• time is added through activation of input ADDTIME or from LHMI or with IEC 61850
command
• BLOCK: Freeze the accumulation and block/reset the other outputs
• independent of the input IN value
• BLOCK request overrides RESETrequest
• Monitor and report the conditions of limit transgression
• overflow if output ACC_HOUR > 99 999.9 hours
• alarm if output ACC_HOUR > tAlarm
• warning if output ACC_HOUR > tWarning
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The ACC_HOURoutput represents the accumulated time in hours and the ACC_DAY output
represents the accumulated time in days.
tAlarm and tWarning are user settable time limit parameters in hours. They are also independent
of each other, that is, there is no check if tAlarm > tWarning.
tAddToTime is a user settable time parameter in hours.
tAlarm, tWarning and tAddToTime are possible to be defined with a resolution of 0.1 hours (6
minutes).
The limit for the overflow supervision is fixed at 99999.9 hours. The outputs will reset and the
accumulated time will reset and pickup from zero if an overflow occurs.
17.11.6.1 Operation accuracy GUID-B6FBEFD7-17C8-41C6-B5D5-32E1205E6752 v1
The accuracy of TEILGAPC depends on essentially two factors
• the pulse length

• the number of pulses, that is, the number of rising and falling flank pairs
In principle, more pulses may lead to reduced accuracy.
17.11.6.2 Memory storage GUID-B49698FF-0AB2-4792-A7CB-5534313B6CA0 v2
The value of the accumulated time is retained in a non-volatile memory,
• at every falling edge of the input IN

• at every even 6 minutes, after a rising edge of the input IN
• after a manual addition of time
Consequently in case of a power failure, there is a risk of losing the difference in time between
actual time and last time stored in the non-volatile memory.

GUID-F5E124E3-0B85-41AC-9830-A2362FD289F2 v1
Table 867: TEILGAPC Technical data

Time limit for alarm supervision, (0 - 99999.9) hours ±0.1% of set value
tAlarm
Time limit for warning supervision, (0 - 99999.9) hours ±0.1% of set value
tWarning
Time limit for overflow supervision Fixed to 99999.9 hours ±0.1%
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Section 18 Metering
18.1 Pulse-counter logic PCFCNT IP14600-1 v3
M14879-1 v4

Pulse-counter logic PCFCNT -
S00947 V1 EN-US
Pulse-counter logic (PCFCNT) function counts externally generated binary pulses, for instance
pulses coming from an external energy meter, for calculation of energy consumption values. The
pulses are captured by the binary input module and then read by the PCFCNT function. A scaled
service value is available over the station bus. The special Binary input module with enhanced
pulse counting capabilities must be ordered to achieve this functionality.
PCFCNT
BLOCK INVALID
READ_VAL RESTART
BI_PULSE* BLOCKED
RS_CNT NEW_VAL
SCAL_VAL
Figure 607: PCFCNT function block
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18.1.4 Signals
Table 868: PCFCNT Input signals

READ_VAL BOOLEAN 0 Initiates an additional pulse counter reading
BI_PULSE BOOLEAN 0 Connect binary input channel for metering
RS_CNT BOOLEAN 0 Resets pulse counter value
Table 869: PCFCNT Output signals

INVALID BOOLEAN The pulse counter value is invalid
RESTART BOOLEAN The reported value does not comprise a complete integration
cycle
BLOCKED BOOLEAN The pulse counter function is blocked
NEW_VAL BOOLEAN A new pulse counter value is generated
SCAL_VAL REAL Scaled value with time and status information
18.1.5 Settings
Table 870: PCFCNT Non group settings (basic)

Enabled
EventMask NoEvents - - NoEvents Report mask for analog events from pulse
ReportEvents counter
CountCriteria Disabled - - RisingEdge Pulse counter criteria
RisingEdge
Falling edge
OnChange
Scale 1.000 - - 0.001 1.000 Scaling value for SCAL_VAL output to unit
90000.000 per counted value
Quantity Count - - Count Measured quantity for SCAL_VAL output
ActivePower
ApparentPower
ReactivePower
ActiveEnergy
ApparentEnergy
ReactiveEnergy
tReporting 0 - 3600 s 1 60 Cycle time for reporting of counter value
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Table 871: PCFCNT Monitored data

CNT_VAL INTEGER - - Actual pulse counter value
SCAL_VAL REAL - - Scaled value with time and status
information
M13397-3 v5
The registration of pulses is done for positive transitions (0->1) on one of the 16 binary input
channels located on the Binary Input Module (BIM). Pulse counter values are sent to the station
HMI with predefined cyclicity without reset.
The reporting time period can be set in the range from 1 second to 60 minutes and is synchronized
with absolute system time. Interrogation of additional pulse counter values can be done with a
command (intermediate reading) for a single counter. All active counters can also be read by the
LON General Interrogation command (GI) or IEC 61850.
Pulse-counter logic (PCFCNT) function in the IED supports unidirectional incremental counters.
That means only positive values are possible. The counter uses a 32 bit format, that is, the
reported value is a 32-bit, signed integer with a range 0...+2147483647. The counter is reset at
initialization of the IED.
The reported value to station HMI over the station bus contains Identity, Scaled Value (pulse count
x scale), Time, and Pulse Counter Quality. The Pulse Counter Quality consists of:
• Invalid (board hardware error or configuration error)

• Wrapped around
• Blocked
• Adjusted
The transmission of the counter value by SPA can be done as a service value, that is, the value
frozen in the last integration cycle is read by the station HMI from the database. PCFCNT updates
the value in the database when an integration cycle is finished and activates the NEW_VAL signal
in the function block. This signal can be connected to an Event function block, be time tagged, and
transmitted to the station HMI. This time corresponds to the time when the value was frozen by
the function.
The pulse-counter logic function requires a binary input card, BIMp, that is specially
adapted to the pulse-counter logic function.
M13399-3 v9
Figure 608 shows the pulse-counter logic function block with connections of the inputs and
outputs.
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SingleCmdFunc PulseCounter EVENT

OUTx BLOCK
INVALID INPUT1
SingleCmdFunc Pulse RESTART INPUT2
OUTx INPUT OUT READ_VAL
Pulse length >1s BLOCKED INPUT3
I/O- NEW_VAL INPUT4
module BI_PULSE
”Reset counter” RS_CNT
NAME
SCAL_VAL IEC EVENT
SMS settings Database

1.Operation = Off/On Pulse counter value:
2.tReporting = 0s...60min 0...2147483647
3.Event Mask = No Events/Report Events
4.Scale = 1-90000
en05000744_ansi.vsd
Figure 608: Overview of the pulse-counter logic function

The BLOCK and READ_VAL inputs can be connected to Single Command logics, which are intended
to be controlled either from the station HMI or/and the local HMI. As long as the BLOCK signal is
set, the pulse counter is blocked. The signal connected to READ_VAL performs one additional
reading per positive flank. The signal must be a pulse with a length >1 second.
The BI_PULSE input is connected to the used input of the function block for the Binary Input
Module (BIM).
The RS_CNT input is used for resetting the counter.
Each pulse-counter logic function block has four binary output signals that can be connected to an
Event function block for event recording: INVALID, RESTART, BLOCKED and NEW_VAL. The
SCAL_VAL signal can be connected to the IEC Event function block.
The INVALID signal is a steady signal and is set if the Binary Input Module, where the pulse counter
input is located, fails or has wrong configuration.
The RESTART signal is a steady signal and is set when the reported value does not comprise a
complete integration cycle. That is, in the first message after IED pickup, in the first message after
deblocking, and after the counter has wrapped around during last integration cycle.
The BLOCKED signal is a steady signal and is set when the counter is blocked. There are two
reasons why the counter is blocked:
• The BLOCK input is set, or

• The Binary Input Module, where the counter input is situated, is inoperative.
The NEW_VAL signal is a pulse signal. The signal is set if the counter value was updated since last
report.
Note, the pulse is short, one cycle.
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The SCAL_VAL signal consists of scaled value (according to parameter Scale), time and status
information.
M13404-2 v5
Table 872: PCFCNT technical data

Function Setting range Accuracy
Input frequency See Binary Input Module (BIM) -
Cycle time for report of (1–3600) s -
counter value
18.2 Function for energy calculation and demand handling

ETPMMTR SEMOD153638-1 v2
SEMOD175537-2 v4

Function for energy calculation and ETPMMTR W_Varh -
demand handling
18.2.2 Functionality GUID-6898E29B-DA70-421C-837C-1BBED8C63A7A v2
Measurements function block (CVMMXN) can be used to measure active as well as reactive power
values. Function for energy calculation and demand handling (ETPMMTR) uses measured active
and reactive power as input and calculates the accumulated active and reactive energy pulses, in
forward and reverse direction. Energy values can be read or generated as pulses. Maximum
demand power values are also calculated by the function. This function includes zero point
clamping to remove noise from the input signal. As output of this function: periodic energy
calculations, integration of energy values, calculation of energy pulses, alarm signals for limit
violation of energy values and maximum power demand, can be found.
The values of active and reactive energies are calculated from the input power values by
integrating them over a selected time tEnergy. The integration of active and reactive energy values
will happen in both forward and reverse directions. These energy values are available as output
signals and also as pulse outputs. Integration of energy values can be controlled by inputs
(STARTACC and STOPACC) and EnaAcc setting and it can be reset to initial values with RSTACC
input.
The maximum demand for active and reactive powers are calculated for the set time interval
tEnergy and these values are updated every minute through output channels. The active and
reactive maximum power demand values are calculated for both forward and reverse direction and
these values can be reset with RSTDMD input.
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ETPMMTR
P* ACCINPRG
Q* EAFPULSE
STARTACC EARPULSE
STOPACC ERFPULSE
RSTACC ERRPULSE
RSTDMD EAFALM
EARALM
ERFALM
ERRALM
EAFACC
EARACC
ERFACC
ERRACC
MAXPAFD
MAXPARD
MAXPRFD
MAXPRRD
Figure 609: ETPMMTR function block
18.2.4 Signals
Table 873: ETPMMTR Input signals

P REAL 0 Measured active power
Q REAL 0 Measured reactive power
STARTACC BOOLEAN 0 Start to accumulate energy values
STOPACC BOOLEAN 0 Stop accumulating energy values
RSTACC BOOLEAN 0 Reset of accumulated enery reading
RSTDMD BOOLEAN 0 Reset of maximum demand reading
Table 874: ETPMMTR Output signals

ACCINPRG BOOLEAN Accumulation of energy values in progress
EAFPULSE BOOLEAN Accumulated forward active energy pulse
EARPULSE BOOLEAN Accumulated reverse active energy pulse
ERFPULSE BOOLEAN Accumulated forward reactive energy pulse
ERRPULSE BOOLEAN Accumulated reverse reactive energy pulse
EAFALM BOOLEAN Alarm for active forward energy exceed limit in set interval
EARALM BOOLEAN Alarm for active reverse energy exceed limit in set interval
ERFALM BOOLEAN Alarm for reactive forward energy exceed limit in set interval
ERRALM BOOLEAN Alarm for reactive reverse energy exceed limit in set interval
EAFACC REAL Accumulated forward active energy value in Ws
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EARACC REAL Accumulated reverse active energy value in Ws
ERFACC REAL Accumulated forward reactive energy value in VArS
ERRACC REAL Accumulated reverse reactive energy value in VArS
MAXPAFD REAL Maximum forward active power demand value for set interval
MAXPARD REAL Maximum reverse active power demand value for set interval
MAXPRFD REAL Maximum forward reactive power demand value for set interval
MAXPRRD REAL Maximum reactive power demand value in reverse direction
18.2.5 Settings
Table 875: ETPMMTR Non group settings (basic)

Enabled
EnaAcc Disabled - - Disabled Activate the accumulation of energy values
Enabled
tEnergy 1 Minute - - 1 Minute Time interval for energy calculation
5 Minutes
10 Minutes
15 Minutes
30 Minutes
60 Minutes
180 Minutes
tEnergyOnPls 0.100 - 60.000 s 0.001 1.000 Energy accumulated pulse ON time in secs
tEnergyOffPls 0.100 - 60.000 s 0.001 0.500 Energy accumulated pulse OFF time in
secs
EAFAccPlsQty 0.001 - 10000.000 MWh 0.001 100.000 Pulse quantity for active forward
accumulated energy value
EARAccPlsQty 0.001 - 10000.000 MWh 0.001 100.000 Pulse quantity for active reverse
ERFAccPlsQty 0.001 - 10000.000 MVArh 0.001 100.000 Pulse quantity for reactive forward
ERRAccPlsQty 0.001 - 10000.000 MVArh 0.001 100.000 Pulse quantity for reactive reverse
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Table 876: ETPMMTR Non group settings (advanced)

EALim 0.001 - MWh 0.001 1000000.000 Active energy limit
10000000000.00
0
ERLim 0.001 - MVArh 0.001 1000.000 Reactive energy limit
10000000000.00
0
EnZeroClamp Disabled - - Enabled Enable of zero point clamping detection
Enabled function
LevZeroClampP 0.001 - 10000.000 MW 0.001 10.000 Zero point clamping level at active Power
LevZeroClampQ 0.001 - 10000.000 MVAr 0.001 10.000 Zero point clamping level at reactive Power
DirEnergyAct Forward - - Forward Direction of active energy flow Forward/
Reverse Reverse
DirEnergyReac Forward - - Forward Direction of reactive energy flow Forward/
Reverse Reverse
EAFPrestVal 0.000 - MWh 0.001 0.000 Preset Initial value for forward active
100000000.000 energy
EARPrestVal 0.000 - MWh 0.001 0.000 Preset Initial value for reverse active
100000000.000 energy
ERFPresetVal 0.000 - MVArh 0.001 0.000 Preset Initial value for forward reactive
100000000.000 energy
ERRPresetVal 0.000 - MVArh 0.001 0.000 Preset Initial value for reverse reactive
100000000.000 energy

Table 877: ETPMMTR Monitored data

EAFACC REAL - MWh Accumulated forward active energy value
in Ws
EARACC REAL - MWh Accumulated reverse active energy value in
Ws
ERFACC REAL - MVArh Accumulated forward reactive energy
value in VArS
ERRACC REAL - MVArh Accumulated reverse reactive energy value
in VArS
MAXPAFD REAL - MW Maximum forward active power demand
value for set interval
MAXPARD REAL - MW Maximum reverse active power demand
MAXPRFD REAL - MVAr Maximum forward reactive power demand
MAXPRRD REAL - MVAr Maximum reactive power demand value in
reverse direction
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18.2.7 Operation principle GUID-4A46757C-EC5D-4BCE-9D09-C8152B062CE1 v2
The instantaneous output values of active and reactive power from the Measurements function
CVMMXN are used and integrated over a selected time tEnergy to measure the integrated energy.
Figure 610 shows the overall functionality of the energy calculation and demand handling function
ETPMMTR.
MAXPAFD
RSTDMD
MAXPARD
MAXPRFD
P
MAXPRRD
Zero Clamping Maximum Power
EAFALM
Detection Demand Calculation
Q EARALM
ERFALM
ERRALM
ACCINPRG
EAFPULSE
EARPULSE
ERFPULSE
Energy Accumulation ERRPULSE
STARTACC
Calculation EAFACC
EARACC
STOPACC
ERFACC
ERRACC
RSTACC
Figure 610: ETPMMTR Functional overview logical diagram

The integration of energy values is enabled by the setting EnaAcc and controlled by the STARTACC
and STOPACC inputs. If the integration is in progress, the output ACCINPRG is high. Otherwise, it is
low. Figure 611 shows the logic of the ACCINPRG output. ACCINPRG is active when the STARTACC
input is active and the EnaAcc setting is enabled. When the RSTACC input is in the active state, the
output ACCINPRG is low even if the integration of energy is enabled. ACCINPRG is deactivated by
activating the STOPACC input.
STOPACC
FALSE
STARTACC T
³1
& F ACCINPRG
EnaAcc &
q-1
RSTACC

Figure 611: ACCINPRG Logic diagram

The accumulated energy values (in MWh and MVArh) are available as service values and also as
pulsed output depending on the ExxAccPlsQty setting, which can be connected to a pulse counter.
Accumulated energy outputs are available for forward as well as reverse direction. The
accumulated energy values can be reset to initial accumulated energy values (ExxPrestVal) from
the local HMI reset menu or with the input signal RSTACC. Figure 612 shows the logic for
integration of energy in active forward direction. Similarly, the integration of energy in active
reverse, reactive forward and reactive reverse is done.
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RSTACC
EAFPrestVal
ACCINPRG
P* (ACTIVE FORWARD)
X
 T
T EAFACC
60.0
F
F
&
q-1
1000 GWh T
-1 F
q 0.0
a
a>b
b
-1
q = unit delay
Figure 612: Logic for integration of active forward energy

The energy pulses generated by using internally calculated accumulated energy values and energy
per pulse (ExxAccPlsQty) setting. The accumulated energy values are divided by the energy-per-
pulse value to get the number of pulses. The number of pulses can be reset to zero by activating
RSTACC input or by using the local HMI reset menu. The pulse on and off time duration is set by the
settings tEnergyOnPls and tEnergyOffPls. Figure 613 shows the logic for pulse output generation
for the integrated energy in the active forward direction. Similarly, the pulse generation for
integrated energy in the active reverse, reactive forward and reactive reverse is done.
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tEnergyOffPls
EAFACC
a Counter q-1
a>b CU
1000 GWh b CV
Rst
tOff
t
R I q-1
0
÷ X
 R I T
EAFPULSE
a TP
a>b F
b
EAFAccPlsQty ÷ 0
Counter
CU
CV
RSTACC
Rst
q-1
tEnergyOnPls
q-1 = unit delay

Figure 613: Logic for pulse generation of integrated active forward energy
The maximum demand values for active and reactive power are calculated for the set time interval
tEnergy. The maximum values are updated every minute and stored in a register available over
communication and from outputs MAXPAFD, MAXPARD, MAXPRFD and MAXPRRD for the active and
reactive power forward and reverse direction. When the RSTDMD input is active from the local HMI
reset menu, these outputs are reset to zero. The energy alarm is activated once the periodic
energy value crosses the energy limit ExLim. Figure 614 shows the logic of alarm for active forward
energy exceeds limit and Maximum forward active power demand value. Similarly, the maximum
power calculation and energy alarm outputs in the active reverse, reactive forward and reactive
reverse is implemented.
P (ACTIVE FORWARD)
Average Power
X a EAFALM
tEnergy Calculation a>b
b
EALim
RSTMAXD
0.0 T MAXPAFD
MAX F
q-1
q-1 = unit delay
Figure 614: Logic for maximum power demand calculation and energy alarm
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18.2.8.1 Technical data GUID-DA0A8AB5-755D-4F35-8C69-FFAA951FE374 v1
Table 878:
Energy metering MWh Export/Import, MVarh Export/ Input from MMXU. No extra error at
Import steady load
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Section 19 Station communication
19.1 Communication protocols M14815-3 v12
Each IED is provided with a communication interface, enabling it to connect to one or many
substation level systems or equipment, either on the Substation Automation (SA) bus or
Substation Monitoring (SM) bus.
Available communication protocols are:
• IEC 61850-8-1 communication protocol

• IEC 61850-9-2LE communication protocol
• LON communication protocol
• SPA or IEC 60870-5-103 communication protocol
• DNP3.0 communication protocol
Several protocols can be combined in the same IED.
19.2 Communication protocol diagnostics GUID-6BC4671F-6D06-4BBD-B1FF-2F03FF16A856 v1
Status of the protocols can be viewed in the LHMI under Main menu/Diagnostics/IED status/
Protocol diagnostics. The diagnostic values are:
Diagnostic value Description

Off Protocol is turned off
Error An error has occured, refer to event list for more
information
Warning Configuration inconsistency. Unable to locate data
point.
Ready Protocol is ready
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Figure 615: Protocol diagnostic screen in LHMI
19.3 DNP3 protocol GUID-54A54716-23BD-4E7C-8245-DE2B4C75E8DC v1
DNP3 (Distributed Network Protocol) is a set of communications protocols used to communicate

data between components in process automation systems. For a detailed description of the DNP3
protocol, see the DNP3 Communication protocol manual.
19.4 IEC 61850-8-1 communication protocol IP14616-1 v2
IEC 61850 Ed.1 or Ed.2 can be chosen by a setting in PCM600. The IED is equipped with single or
double optical Ethernet rear ports (order dependent) for IEC 61850-8-1 station bus
communication. The IEC 61850-8-1 communication is also possible from the electrical Ethernet
front port. IEC 61850-8-1 protocol allows intelligent electrical devices (IEDs) from different vendors
to exchange information and simplifies system engineering. IED-to-IED communication using
GOOSE and client-server communication over MMS are supported. Disturbance recording file
(COMTRADE) uploading can be done over MMS or FTP.
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19.4.2 Communication interfaces and protocols GUID-35C845D3-574A-40D1-AEF1-9E0D330E31DE v6
Table 879: Supported station communication interfaces and protocols

Protocol Ethernet Serial
100BASE-FX (ST connector) Glass fiber (ST connector) EIA-485
IEC 61850–8–1 ● - -
DNP3 ● ● ●
IEC 60870-5-103 - ● ●
● = Supported
When double Ethernet ports are activated, make sure that the two ports are
connected to different subnets. For example: Port 1 has IP-address 138.227.102.10
with subnet mask 255.255.255.0 and port 2 has IP-address 138.227.103.10 with
subnet mask 255.255.255.0
19.4.3 Settings
Table 880: IEC61850-8-1 Non group settings (basic)

Enabled
PortSelGOOSE Front - - LANAB Port selection for GOOSE communication
LANAB
LANCD
PortSelMMS Front - - Any Port selection for MMS communication
LANAB
LANCD
Any
Protocol Edition Ed 1 - - Ed 1 Protocol Edition
Ed 2
RemoteModControl Disabled - - Disabled Remote Mode Control
Maintenance
All levels
AllowSimulation No - - No Allow simulated GOOSE values or
Yes simulated sampled measured values
IEC61850BufTimEnable Disabled - - Enabled Enable BRC buf time behavior
Enabled
EnableSettings Disabled - - Disabled Enable 61850 Edition 2 setting
Enabled
ResvTms 1 - 3600 s 1 60 Reservation time
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Table 881: Communication protocols

Function Value
Protocol IEC 61850-8-1
Communication speed for the IEDs 100BASE-FX
Protocol IEC 60870–5–103
Communication speed for the IEDs 9600 or 19200 Bd
Protocol DNP3.0
Communication speed for the IEDs 300–19200 Bd
Protocol TCP/IP, Ethernet
Communication speed for the IEDs 100 Mbit/s
19.4.5 Generic communication function for Single Point indication

SPGAPC, SP16GAPC SEMOD55999-1 v4
19.4.5.1 Functionality SEMOD55713-5 v7
Generic communication function for Single Point indication SPGAPC is used to send one single
logical signal to other systems or equipment in the substation.
19.4.5.2 Function block SEMOD54714-4 v4
SPGAPC
BLOCK
ÎN
Figure 616: SPGAPC function block
SP16GAPC
BLOCK
ÎN1
ÎN2
ÎN3
ÎN4
ÎN5
ÎN6
ÎN7
ÎN8
ÎN9
ÎN10
ÎN11
ÎN12
ÎN13
ÎN14
ÎN15
ÎN16
Figure 617: SP16GAPC function block
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19.4.5.3 Signals SEMOD55830-1 v2
Table 882: SPGAPC Input signals

IN BOOLEAN 0 Input status
Table 883: SP16GAPC Input signals

IN1 BOOLEAN 0 Input 1 status
19.4.5.4 Settings ABBD8E283673 v3

Table 884: SPGAPC Monitored data

OUT GROUP - - Output status
SIGNAL
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Table 885: SP16GAPC Monitored data

OUT1 GROUP - - Output 1 status
SIGNAL
SIGNAL
SIGNAL
SIGNAL
SIGNAL
SIGNAL
SIGNAL
SIGNAL
SIGNAL
SIGNAL
SIGNAL
SIGNAL
SIGNAL
SIGNAL
SIGNAL
SIGNAL
OUTOR GROUP - - Output status logic OR gate for input 1 to
SIGNAL 16
19.4.5.6 Operation principle SEMOD55725-5 v6
Upon receiving a signal at its input, Generic communication function for Single Point indication
(SPGAPC) function sends the signal over IEC 61850-8-1 to the equipment or system that requests
this signal. To get the signal, PCM600 must be used to define which function block in which
equipment or system should receive this information.
19.4.6 Generic communication function for Measured Value MVGAPC SEMOD55402-1 v3
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19.4.6.1 Functionality SEMOD55872-5 v9
Generic communication function for Measured Value MVGAPC function is used to send the
instantaneous value of an analog signal to other systems or equipment in the substation. It can
also be used inside the same IED, to attach a RANGE aspect to an analog value and to permit
measurement supervision on that value.
19.4.6.2 Function block SEMOD54712-4 v4
MVGAPC
BLOCK ^VALUE
ÎN RANGE
Figure 618: MVGAPC function block
19.4.6.3 Signals SEMOD55948-1 v2
Table 886: MVGAPC Input signals

IN REAL 0 Analog input value
Table 887: MVGAPC Output signals

VALUE REAL Magnitude of deadband value
RANGE INTEGER Range
19.4.6.4 Settings SEMOD55954-1 v2
Table 888: MVGAPC Non group settings (basic)

BasePrefix micro - - unit Base prefix (multiplication factor)
milli
unit
kilo
Mega
Giga
Tera
MV db 1 - 300 Type 1 10 Cycl: Report interval (s), Db: In % of range,
Int Db: In %s
MV zeroDb 0 - 100000 m% 1 500 Zero point clamping in 0.001% of range
MV hhLim -5000.00 - xBase 0.01 900.00 High High limit multiplied with the base
5000.00 prefix (multiplication factor)
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MV hLim -5000.00 - xBase 0.01 800.00 High limit multiplied with the base prefix
5000.00 (multiplication factor)
MV lLim -5000.00 - xBase 0.01 -800.00 Low limit multiplied with the base prefix
5000.00 (multiplication factor)
MV llLim -5000.00 - xBase 0.01 -900.00 Low Low limit multiplied with the base
MV min -5000.00 - xBase 0.01 -1000.00 Minimum value multiplied with the base
MV max -5000.00 - xBase 0.01 1000.00 Maximum value multiplied with the base
MV dbType Cyclic - - Dead band Reporting type
Dead band
Int deadband
MV limHys 0.000 - 100.000 % 0.001 5.000 Hysteresis value in % of range (common
for all limits)

Table 889: MVGAPC Monitored data

VALUE REAL - - Magnitude of deadband value
RANGE INTEGER 1=High - Range
2=Low
3=High-High
4=Low-Low
0=Normal
19.4.6.6 Operation principle SEMOD55936-5 v6
Upon receiving an analog signal at its input, Generic communication function for Measured Value
(MVGAPC) will give the instantaneous value of the signal and the range, as output values. In the
same time, it will send over IEC 61850-8-1 the value, to other IEC 61850 clients in the substation.
19.4.7 IEC 61850-8-1 redundant station bus communication GUID-FF43A130-7D2D-4BA3-B51C-80398D73228F v2
GUID-00C469E6-00D4-4780-BD0D-426647AB8E0F v3.1.1
Function description LHMI and ACT IEC 61850 IEC 60617 ANSI/IEEE C37.2
identification identification identification device number
Dual ethernet port PRPSTATUS PRPSTATUS - -
link status
IEC 62439-3 parallel PRP PRP - -
redundancy
protocol
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19.4.7.1 Functionality GUID-A90FDBA7-D4D7-4CBD-9F05-13DCC9971779 v5
Redundant station bus communication according to IEC 62439-3 Edition 1 and IEC 62439-3 Edition
2 parallel redundancy protocol (PRP) are available as options when ordering IEDs. Redundant
station bus communication according to IEC 62439-3 uses both port AB and port CD on the OEM
module.
19.4.7.2 Function block GUID-876EDB9C-BEF1-4DBE-967D-5BEEEA6AFF38 v3
PRPSTATUS
PRP-A LINK
PRP-A VALID
PRP-B LINK
PRP-B VALID
IEC09000757.vsd
Figure 619: PRPSTATUS function block
19.4.7.3 Signals
Table 890: PRPSTATUS Output signals

PRP-A LINK BOOLEAN PRP-A Link Status
PRP-A VALID BOOLEAN PRP-A Link Valid
PRP-B LINK BOOLEAN PRP-B Link Status
PRP-B VALID BOOLEAN PRP-B Link Valid
19.4.7.4 Settings
Table 891: PRP Non group settings (basic)

Enabled
PRPMode PRP-0 - - PRP-1 PRP Mode
PRP-1
IPAddress 0 - 18 IP 1 192.168.7.10 IP-Address
Address
IPMask 0 - 18 IP 1 255.255.255.0 IP-Mask
Address
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Table 892: PRPSTATUS Monitored data

AB Beh INTEGER 2=Blocked - AB Link Beh
3=Test
4=Test blocked
5=Off
1=On
CD Beh INTEGER 1=On - CD Link Beh
2=Blocked
3=Test
4=Test blocked
5=Off
PRP Beh INTEGER 2=Blocked - PRP Beh
3=Test
4=Test blocked
5=Off
1=On
19.4.7.6 Principle of operation GUID-545BD854-36AA-4606-B79B-A5FF73B1A4CB v3.1.1
The communication is performed in parallel, that is the same data package is transmitted on both
channels simultaneously. The received package identity from one channel is compared with data
package identity from the other channel, if they are the same, the last package is discarded.
The PRPSTATUS function block supervise the redundant communication on the two channels. If no
data package has been received on one (or both) channels within the last 10 s, the output PRP-A
LINK and/or PRP-B LINK is set to 0 which indicates an error.
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Station Control System
Redundancy
Supervision
Duo
Data Data
Switch A Switch B
1 2 1 2
Data Data
AB CD IED
Configuration OEM
PRP PRPSTATUS
=IEC09000758=3=en=Original.vsd
Figure 620: Redundant station bus
19.5 IEC 61850-9-2LE communication protocol GUID-6814F62B-8D99-4679-A11E-68048D1AC424 v1
19.5.1 Introduction GUID-FE2AC08A-2E04-4E73-8CA4-905522B1026A v2
The IEC/UCA 61850-9-2LE process bus communication protocol enables an IED to communicate
with devices providing measured values in digital format, commonly known as Merging Units
(MU). The rear access points are used for the communication.
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19.5.2 Function block GUID-2581F3AD-7487-4C80-BDF3-9C6EC9F2E43C v2.1.1
The function blocks are not represented in the configuration tool. The signals
appear only in the SMT tool when merging units (MU) are included in the
configuration with the hardware configuration tool. In the SMT tool they can be
mapped to the desired virtual input (SMAI) of the IED and used internally in the
configuration.
19.5.3 Signals
19.5.3.1 Output signals SEMOD166622-1 v1
Table 893: MU1_4I_4U Output signals

I1 STRING Analogue input I1
V1 STRING Analogue input V1
MUDATA BOOLEAN Fatal error, serious data loss
SYNCH BOOLEAN MU clock synchronized to same clock as IED
SMPLLOST BOOLEAN Sample lost
MUSYNCH BOOLEAN Synchronization lost in MU
TESTMODE BOOLEAN MU in test mode

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SYNCH BOOLEAN Operational mode on ethernet link


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Table 899: MU1_4I_4U Non group settings (basic)

SVId 10 - 34 - 1 ABB_MU0101 MU identifier
SmplGrp 0 - 65535 - 1 0 Sampling group
Table 900: MU1_4I_4U Non group settings (advanced)

SynchMode NoSynch - - Operation Synchronization mode
Init
Operation


Init
Operation
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Init
Operation


Init
Operation
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Init
Operation


Init
Operation
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Table 911: MU1_4I_4U Monitored data

MUDATA BOOLEAN 0=Ok - Fatal error, serious data loss
1=Error
SYNCH BOOLEAN 0=Ok - MU clock synchronized to same clock as
1=Error IED
SMPLLOST BOOLEAN 1=Yes - Sample lost
0=No
MUSYNCH BOOLEAN 0=Ok - Synchronization lost in MU
1=Error
TESTMODE BOOLEAN 1=Yes - MU in test mode
0=No

1=Error
SYNCH BOOLEAN 0=Ok - Operational mode on ethernet link
1=Error
0=No
1=Error
0=No

1=Error
1=Error
0=No
1=Error
0=No
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1=Error
1=Error
0=No
1=Error
0=No

1=Error
1=Error
0=No
1=Error
0=No

1=Error
1=Error
0=No
1=Error
0=No
19.5.6 Operation principle GUID-A1D31CDA-1FE2-4BC0-A472-1B35E73CA1F2 v3.1.1
The ABB merging units (MUs) are situated close to primary equipment, like circuit breakers,
isolators, etc. The MUs have the capability to gather measured values from measuring
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transformers, non-conventional transducers or both. The gathered data are then transmitted to
subscribers over the process bus, utilizing the IEC 61850-9-2LE protocol.
The IED communicates with the MUs over the process bus via the OEM module port "CD". For the
user, the MU appears in the IED as a normal analogue input module and is engineered in the very
same way.
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IED
Application
Station Wide
Preprocessing blocks Preprocessing blocks GPS Clock
SMAI SMAI
MU1 MU2
Splitter
Electrical-to-
Optical Converter
1PPS
TRM module OEM Module
CD
110 V 1A 1A
IEC61850-9-2LE
Ethernet Switch
IEC61850-9-2LE
IEC61850-9-2LE
ABB ABB
1PPS 1PPS
Merging Merging
Unit Unit
Combi Combi
CT CT
Sensor Sensor
Conventional VT
en08000072-2.vsd
Figure 621: Example of signal path for sampled analogue values from MU and conventional
CT/VT
The function has the following alarm signals:
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Technical manual
• MUDATA: Indicates when sample sequence needs to be realigned. that is the application soon
needs to be restarted. The signal is raised to 2 s before the application is restarted.
• SYNCH: Indicates that the time quality of the hardware is out of the set value from parameter
synchAccLevel (1 μs, 4 μs or unspecified) and the parameter AppSynch is set to Synch. In case
of AppSynch is set to NoSynch the SYNCH output will never go high.
• SMPLLOST: Indicates that more than one sample has been lost/been marked invalid/
overflow/ been marked failed, and the sample has thereafter been substituted. When
SMPLLOST is high, protection is blocked.
• MUSYNCH: Indicates that the MU connected is not synchronized. Received from quality flag in
datastream. No IED setting affects this signal.
• TESTMODE: Indicates that the MU connected is in TestMode. Received from quality flag in
datastream. No IED setting affects this signal.
Timeout
TSYNCERR Indicates that there is some timeout on any configured time source or the time quality
is worse than specified in SynchAccLevel. The timeout is individually specified per time source
(PPS, IRIG-B, SNTP etc.) See section "Time synchronization"
Blocking condition
Blocking of protection functions is indicated by (SAMPLOST is high) or (MUSYNCH is high and

AppSynch is set to Synch) or (SYNCH is high)
Application synch is not required for differential protection based on ECHO mode. A missing PPS
however will lead to a drift between MU and IED. Therefore protection functions in this case will be
blocked.
SEMOD172236-2 v2
Table 917: IEC 61850-9-2LE communication protocol

Functions Value
Protocol IEC 61850-9-2LE
Communication speed for the IEDs 100BASE-FX
19.6 LON communication protocol IP14420-1 v1
An optical network can be used within the substation automation system. This enables
communication with the IED through the LON bus from the operator’s workplace, from the control
center and also from other terminals.
LON communication protocol is specified in LonTalkProtocol Specification Version 3 from Echelon

Corporation and is designed for communication in control networks. These networks are
characterized by high speed for data transfer, short messages (few bytes), peer-to-peer
communication, multiple communication media, low maintenance, multivendor equipment, and
low support costs. LonTalk supports the needs of applications that cover a range of requirements.
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The protocol follows the reference model for open system interconnection (OSI) designed by the
International Standardization Organization (ISO).
In this document the most common addresses for commands and events are available. For other
addresses, refer to section "".
It is assumed that the reader is familiar with LON communication protocol in general.
19.6.2 Settings IP14441-1 v2
Table 918: HORZCOMM Non group settings (basic)

Operation Disabled - - Disabled Operation
Enabled
Table 919: ADE Non group settings (basic)

Enabled
TimerClass Slow - - Slow Timer class
Normal
Fast
TimeDomain Local without DST - - Local with DST Time domain
Local with DST
M15083-3 v2
The speed of the network depends on the medium and transceiver design. With protection and
control devices, fiber optic media is used, which enables the use of the maximum speed of 1.25
Mbits/s. The protocol is a peer-to-peer protocol where all the devices connected to the network
can communicate with each other. The own subnet and node number are identifying the nodes
(max. 255 subnets, 127 nodes per one subnet).
The LON bus links the different parts of the protection and control system. The measured values,
status information, and event information are spontaneously sent to the higher-level devices. The
higher-level devices can read and write memorized values, setting values, and other parameter
data when required. The LON bus also enables the bay level devices to communicate with each
other to deliver, for example, interlocking information among the terminals without the need of a
bus master.
The LonTalk protocol supports two types of application layer objects: network variables and
explicit messages. Network variables are used to deliver short messages, such as measuring
values, status information, and interlocking/blocking signals. Explicit messages are used to
transfer longer pieces of information, such as events and explicit read and write messages to
access device data.
The benefits achieved from using the LON bus in protection and control systems include direct
communication among all terminals in the system and support for multi-master implementations.
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The LON bus also has an open concept, so that the terminals can communicate with external
devices using the same standard of network variables.
Introduction of LON protocol M15083-8 v2

For more information, refer to LON bus, LonWorks Network in Protection and Control, User’s
manual and Technical description.
LON protocol M15083-11 v1
Configuration of LON M15083-13 v3

LON network tool (LNT) is a multi-purpose tool for LonWorks network configuration. All the
functions required for setting up and configuring a LonWorks network, is easily accessible on a
single tool program.
Activate LON Communication M15083-16 v3

Activate LON communication in the Parameter Setting tool under Main Menu/Configuration/
Communication/Station communication/ LON/HORZCOMM:1, where Operation must be set to
ON.
Add LON Device Types LNT M15083-19 v3

A new device is added to LON Network Tool from the Device menu or by installing the device from
the ABB LON Device Types package for LNT 505 using SLDT package version 1p2 r04.
LON net address M15083-22 v3

To establish a LON connection, the IED has to be given a unique net address. The net address
consists of a subnet and node number. This is accomplished with the LON Network Tool by
creating one device for each IED.
Vertical communication M15083-25 v1

Vertical communication describes communication between the monitoring devices and protection
and control IEDs. This communication includes sending of changed process data to monitoring
devices as events and transfer of commands, parameter data and disturbance recorder files. This
communication is implemented using explicit messages.
Events and indications M15083-28 v2

Events sent to the monitoring devices are using explicit messages (message code 44H) with
unacknowledged transport service of the LonTalk protocol. When a signal is changed in the IED,
one message with the value, quality and time is transmitted from terminal.
Binary events M15083-31 v4

Binary events are generated in event function blocks EVENT:1 to EVENT:20 in the IEDs. The event
function blocks have predefined LON addresses. Table 920 shows the LON addresses to the first
input on the event function blocks. Addresses to the other inputs on the event function block are
consecutive after the first input. For example, input 15 on event block EVENT:17 has the address
1280 + 14 (15-1) = 1294.
For double indications, only the first eight inputs 1–8 must be used. Inputs 9–16 can be used for
other types of events at the same event block.
Three event function blocks EVENT:1 to EVENT:3 running with a fast loop time (3 ms) are available
as basic in the IEDs.. The remaining event function blocks EVENT:4 to EVENT:9 run with a loop time
of 8 ms and EVENT:10 to EVENT:20 run with a loop time of 100 ms. The event blocks are used to
send binary signals, integers, real time values like analogue data from measuring functions and
mA input modules as well as pulse counter signals.
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16 pulse counter value function blocks PCFCNT:1 to PCFCNT:16, and 24 mA input service values
function blocks SMMI1_In1 to 6 – SMMI4_In1 to 6 are available in the IEDs.
The first LON address in every event function block is found in table 920
Table 920: LON adresses for Event functions

Function block First LON address in
function block
EVENT:1 1024
EVENT:2 1040
EVENT:3 1056
EVENT:4 1072
EVENT:5 1088
EVENT:6 1104
EVENT:7 1120
EVENT:8 1136
EVENT:9 1152
EVENT:10 1168
EVENT:11 1184
EVENT:12 1200
EVENT:13 1216
EVENT:14 1232
EVENT:15 1248
EVENT:16 1264
EVENT:17 1280
EVENT:18 1296
EVENT:19 1312
EVENT:20 1328
Event masks M15083-78 v3

The event mask for each input can be set individually from Parameter Setting Tool (PST) under:
Settings/IED settings/ Monitoring / EventFunction or via parameter setting tool (PST) as
follows:
• No events
• OnSet, at pick-up of the signal
• OnReset, at drop-out of the signal
• OnChange, at both pick-up and drop-out of the signal
• AutoDetect, event system itself make the reporting decision, (reporting criteria for integers
has no semantic, prefer to be set by the user)
The following type of signals from application functions can be connected to the event function
block.
Single indication M15083-123 v2
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Directly connected binary IO signal via binary input function block (SMBI) is always reported on
change, no changed detection is done in the event function block. Other Boolean signals, for
example a pickup or a trip signal from a protection function is event masked in the event function
block.
Double indications M15083-126 v3

Double indications can only be reported for the first 8 inputs on an EVENT function block.
• 00 generates an intermediate event with the read status 0

• 01 generates an open event with the read status 1
• 10 generates a close event with the read status 2
• 11 generates an undefined event with the read status 3
Analog value M15083-135 v3

All analog values are reported cyclic. The reporting interval is taken from the connected function if
there is a limit supervised signal, otherwise it is taken from the event function block.
Command handling M15083-80 v3

Commands are transferred using transparent SPA-bus messages. The transparent SPA-bus
message is an explicit LON message, which contains an ASCII character message following the
coding rules of the SPA-bus protocol. The message is sent using explicit messages with message
code 41H and using acknowledged transport service.
Both the SPA-bus command messages (R or W) and the reply messages (D, A or N) are sent using
the same message code. It is mandatory that one device sends out only one SPA-bus message at a
time to one node and waits for the reply before sending the next message.
For commands from the operator workplace to the IED for apparatus control, That is, the function
blocks type SCSWI 1 to 30, SXCBR 1 to 18 and SXSWI 1 to 24; the SPA addresses are according to
table 921.
Horizontal communication M15083-86 v4

Network variables are used for communication between 500 and 670 series IEDs.Network
variables are used for communication between 500 and 650 series IEDs The supported network
variable type is SNVT_state (NV type 83). SNVT_state is used to communicate the state of a set of
1 to 16 Boolean values.
Multiple command send function block (MULTICMDSND) is used to pack the information to one
value. This value is transmitted to the receiving node and presented for the application by a
multiple command receive function block (MULTICMDRCV). With horizontal communication, the
input BOUND on MULTICMDSND must be set to 1. There are 10 MULTICMDSND and 60
MULTICMDRCV function blocks available. These function blocks are connected using the LON
network tool (LNT). The tool also defines the service and addressing on LON.
This is an overview for configuring the network variables for the IEDs.
Configuration of LON network variables M15083-92 v3

Configure the Network variables according to the specific application using the LON network tool
(LNT). The following is an example of how to configure network variables concerning, for example,
interlocking between two IEDs.
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LON
BAY E1 BAY E3 BAY E4

MULTICMDSND: 7 MULTICMDSND: 9 MULTICMDSND: 9
en05000718.vsd
Figure 622: Examples connections between MULTICMDSND and MULTICMDRCV function

blocks in three IEDs
The network variable connections are done from the NV Connection window. From LNT window
select Connections/ NVConnections/ New.
en05000719.vsd
Figure 623: The network variables window in LNT

There are two ways of downloading NV connections. Either the users can use the drag-and-drop
method where they can select all nodes in the device window, drag them to the Download area in
the bottom of the program window and drop them there; or, they can perform it by selecting the
traditional menu, Configuration/ Download.
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en05000720.vsd
Figure 624: The download configuration window in LNT
Communication ports M15083-97 v3

The serial communication module (SLM) is a mezzanine module placed on the Main Processing
Module (NUM) and is used for LON, SPA, IEC60870-5-103 and DNP communication.
There are two types of IO connectors: 1) snap-in for plastic fiber cables, and 2) ST/bayonet for
glass fiber cables. The SLM can be equipped with either type or a combination of both, which is
identified by a tag.
Connect the incoming optical fiber to the RX receiver input, and the outgoing optical fiber to the
TX transmitter output. Pay special attention to the instructions concerning handling and
connection of fiber cables.
SEMOD116913-2 v2
Table 921: SPA addresses for commands from the operator workplace to the IED for apparatus control
Name Function SPA Description
block address
BL_CMD SCSWI01 1 I 5115 SPA parameters for block
command
command
command
command
command
command
command
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block address
command
command
command
command
command
command
command
command
command
command
command
command
command
command
command
command
command
command
command
command
command
command
command
command
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block address
command
CANCEL SCSWI01 1 I 5107 SPA parameters for cancel
command
command
command
command
command
command
command
command
command
command
command
command
command
command
command
command
command
command
command
command
command
command
command
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block address
command
command
command
command
command
command
command
command
command
SELECTOpen=00, SCSWI01 1 I 5105 SPA parameters for select
SELECTClose=01, (Open/Close) command
SELOpen+ILO=10, Note: Send select command
SELClose+ILO=11, before operate command
SELOpen+SCO=20,
SELClose+SCO=21,
SELOpen+ILO+SCO=30,
SELClose+ILO+SCO=31
SELECTClose=01, so on. (Open/Close) command
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block address
ExcOpen=00, SCSWI01 1 I 5106 SPA parameters for operate
ExcClose=01, (Open/Close) command
ExcOpen+ILO=10, Note: Send select command
ExcClose+ILO=11, before operate command
ExcOpen+SCO=20,
ExcClose+SCO=21,
ExcOpen+ILO+SCO=30,
ExcClose+ILO+SCO=31
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Technical manual

block address
ExcClose=01, so on. (Open/Close) command
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Technical manual

block address
Sub Value SXCBR01 2 I 7854 SPA parameter for position to
be substituted
Note: Send the value before
Enable
be substituted
be substituted
be substituted
be substituted
be substituted
be substituted
be substituted
Sub Value SXCBR09 3I7 SPA parameter for position to
be substituted
be substituted
be substituted
be substituted
be substituted
be substituted
be substituted
be substituted
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block address
be substituted
be substituted
Sub Value SXSWI01 3 I 196 SPA parameter for position to
be substituted
be substituted
be substituted
be substituted
be substituted
be substituted
be substituted
be substituted
be substituted
be substituted
be substituted
be substituted
be substituted
be substituted
be substituted
be substituted
be substituted
be substituted
be substituted
be substituted
be substituted
be substituted
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block address
be substituted
be substituted
be substituted
be substituted
be substituted
be substituted
Sub Enable SXCBR01 2 I 7855 SPA parameter for substitute
enable command
Note: Send the Value before
Enable
enable command
enable command
enable command
enable command
enable command
enable command
enable command
Sub Enable SXCBR09 3I8 SPA parameter for substitute
enable command
enable command
enable command
enable command
enable command
enable command
enable command
enable command
enable command
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block address
enable command
Sub Enable SXSWI01 3 I 197 SPA parameter for substitute
enable command
enable command
enable command
enable command
enable command
enable command
enable command
enable command
enable command
enable command
Sub Enable SXSWI11 3I 379 SPA parameter for substitute
enable command
enable command
enable command
enable command
enable command
enable command
enable command
enable command
enable command
enable command
enable command
enable command
enable command
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block address
enable command
enable command
enable command
enable command
enable command
Update Block SXCBR01 2 I 7853 SPA parameter for update block
command
command
command
command
command
command
command
command
Update Block SXCBR09 3I6 SPA parameter for update block
command
command
command
command
command
command
command
command
command
command
Update Block SXSWI01 3 I 198 SPA parameter for update block
command
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block address
command
command
command
command
command
command
command
command
command
command
command
command
command
command
command
command
command
command
command
command
command
command
command
command
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block address
command
command
command
M11927-1 v2
Table 922: LON communication protocol

Function Value
Protocol LON
Communication speed 1.25 Mbit/s
19.7 SPA communication protocol IP14614-1 v1
In this section the most common addresses for commands and events are available. For other
addresses, refer to section "".
It is assumed that the reader is familiar with the SPA communication protocol in general.
19.7.2 Design M11877-3 v4
Using the rear SPA port for either local or remote communication with a PC requires the following
equipment:
• Optical fibers
• Opto/electrical converter for the PC
• PC
The software needed in the PC, either local or remote, is PCM600. (Note! SPA cannot be used with
PCM600 2.6 or later).
When communicating between the local HMI and a PC, the only hardware required is a front-
connection cable. Note! SPA cannot be used from LHMI front, except for using "FSTACCS", that is,
Field Service Tool Access.
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Technical manual
19.7.3 Settings IP14403-1 v2
Table 923: SPA Non group settings (basic)

BaudRate 300 Bd - - 9600 Bd Baudrate on serial line
1200 Bd
2400 Bd
4800 Bd
9600 Bd
19200 Bd
38400 Bd
Table 924: LONSPA Non group settings (basic)

Enabled
M11880-3 v2
The SPA bus uses an asynchronous serial communications protocol (1 start bit, 7 data bits + even
parity, 1 stop bit) with data transfer rate up to 38400 bit/s. For more information on
recommended baud rate for each type of IED, refer to Technical reference manual. Messages on
the bus consist of ASCII characters.
Introduction of SPA protocol M11880-7 v2

The basic construction of the protocol assumes that the slave has no self-initiated need to talk to
the master but the master is aware of the data contained in the slaves and, consequently, can
request required data. In addition, the master can send data to the slave. Requesting by the
master can be performed either by sequenced polling (for example, for event information) or only
on demand.
The master requests slave information using request messages and sends information to the
slave in write messages. Furthermore, the master can send all slaves in common a broadcast
message containing time or other data. The inactive state of bus transmit and receive lines is a
logical "1".
SPA protocol M11880-10 v5

The tables below specify the SPA addresses for reading data from and writing data to an IED with
the SPA communication protocol implemented.
The SPA addresses for the mA input service values (MIM3 to MIM16) are found in table 925.
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Technical manual
Table 925: SPA addresses for the MIM function

Function block SPA address
MIM3-CH1 4-O-6508
MIM3-CH2 4-O-6511
MIM3-CH3 4-O-6512
MIM3-CH4 4-O-6515
MIM3-CH5 4-O-6516
MIM3-CH6 4-O-6519
MIM4-CH1 4-O-6527
MIM4-CH2 4-O-6530
MIM4-CH3 4-O-6531
MIM4-CH4 4-O-6534
MIM4-CH5 4-O-6535
MIM4-CH6 4-O-6538
MIM5-CH1 4-O-6546
MIM5-CH2 4-O-6549
MIM5-CH3 4-O-6550
MIM5-CH4 4-O-6553
MIM5-CH5 4-O-6554
MIM5-CH6 4-O-6557
MIM6-CH1 4-O-6565
MIM6-CH2 4-O-6568
MIM6-CH3 4-O-6569
MIM6-CH4 4-O-6572
MIM6-CH5 4-O-6573
MIM6-CH6 4-O-6576
MIM7-CH1 4-O-6584
MIM7-CH2 4-O-6587
MIM7-CH3 4-O-6588
MIM7-CH4 4-O-6591
MIM7-CH5 4-O-6592
MIM7-CH6 4-O-6595
MIM8-CH1 4-O-6603
MIM8-CH2 4-O-6606
MIM8-CH3 4-O-6607
MIM8-CH4 4-O-6610
MIM8-CH5 4-O-6611
MIM8-CH6 4-O-6614
MIM9-CH1 4-O-6622
MIM9-CH2 4-O-6625
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MIM9-CH3 4-O-6626
MIM9-CH4 4-O-6629
MIM9-CH5 4-O-6630
MIM9-CH6 4-O-6633
MIM10-CH1 4-O-6641
MIM10-CH2 4-O-6644
MIM10-CH3 4-O-6645
MIM10-CH4 4-O-6648
MIM10-CH5 4-O-6649
MIM10-CH6 4-O-6652
MIM11-CH1 4-O-6660
MIM11-CH2 4-O-6663
MIM11-CH3 4-O-6664
MIM11-CH4 4-O-6667
MIM11-CH5 4-O-6668
MIM11-CH6 4-O-6671
MIM12-CH1 4-O-6679
MIM12-CH2 4-O-6682
MIM12-CH3 4-O-6683
MIM12-CH4 4-O-6686
MIM12-CH5 4-O-6687
MIM12-CH6 4-O-6690
MIM13-CH1 4-O-6698
MIM13-CH2 4-O-6701
MIM13-CH3 4-O-6702
MIM13-CH4 4-O-6705
MIM13-CH5 4-O-6706
MIM13-CH6 4-O-6709
MIM14-CH1 4-O-6717
MIM14-CH2 4-O-6720
MIM14-CH3 4-O-6721
MIM14-CH4 4-O-6724
MIM14-CH5 4-O-6725
MIM14-CH6 4-O-6728
MIM15-CH1 4-O-6736
MIM15-CH2 4-O-6739
MIM15-CH3 4-O-6740
MIM15-CH4 4-O-6743
MIM15-CH5 4-O-6744
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MIM15-CH6 4-O-6747
MIM16-CH1 4-O-6755
MIM16-CH2 4-O-6758
MIM16-CH3 4-O-6759
MIM16-CH4 4-O-6762
MIM16-CH5 4-O-6763
MIM16-CH6 4-O-6766
The SPA addresses for the pulse counter values PCFCNT:1 to PCFCNT:16 are found in table 926.
Table 926: SPA addresses for the PCFCNT function

Function block SPA address CNT_VAL SPA address NEW_VAL
PCFCNT:1 6-O-2788 6-O-2787
PCFCNT:2 6-O-2794 6-O-2793
PCFCNT:3 6-O-2800 6-O-2799
PCFCNT:4 6-O-2806 6-O-2805
PCFCNT:5 6-O-2812 6-O-2811
PCFCNT:6 6-O-2818 6-O-2817
PCFCNT:7 6-O-2824 6-O-2823
PCFCNT:8 6-O-2830 6-O-2829
PCFCNT:9 6-O-2836 6-O-2835
PCFCNT:10 6-O-2842 6-O-2841
PCFCNT:11 6-O-2848 6-O-2847
PCFCNT:12 6-O-2854 6-O-2853
PCFCNT:13 6-O-2860 6-O-2859
PCFCNT:14 6-O-2866 6-O-2865
PCFCNT:15 6-O-2872 6-O-2871
PCFCNT:16 6-O-2878 6-O-2877
I/O modules M11880-16 v4

To read binary inputs, the SPA-addresses for the outputs of the I/O-module function block are
used, that is, the addresses for BI1 – BI16. For SPA addresses, refer to section Related documents
in Product Guide.
M11880-35 v1
Single command, 16 signals M11880-51 v4

The IEDs can be provided with a function to receive signals either from a substation automation
system or from the local HMI. That receiving function block has 16 outputs that can be used, for
example, to control high voltage apparatuses in switchyards. For local control functions, the local
HMI can also be used.
Single command, 16 signals function consists of three function blocks; SINGLECMD:1 to

SINGLECMD:3 for 16 binary output signals each.
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The signals can be individually controlled from the operator station, remote-control gateway, or
from the local HMI on the IED. For Single command, 3 signals function block, SINGLECMD:1 to
SINGLECMD:3, the address is for the first output. The other outputs follow consecutively after the
first one. For example, output 7 on the SINGLECMD:2 function block has the 5O533 address.
The SPA addresses for Single command, 16 signals functions SINGLECMD:1 to SINGLECMD:3 are
found in table 927.
Table 927: SPA addresses for SINGLECMD function

Function block SPA address CMD Input SPA address CMD output
SINGLECMD1-Cmd1 4-S-4639 5-O-511
SINGLECMD1-Cmdt13 4-S-4651 5-O-523
SINGLECMD2-Cmdt3 4-S-4674 5-O-529
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Technical manual
Function block SPA address CMD Input SPA address CMD output
Figure 625 shows an application example of how the user can, in a simplified way, connect the
command function via the configuration logic circuit in a protection IED for control of a circuit
breaker.
A pulse via the binary outputs of the IED normally performs this type of command control. The SPA
addresses to control the outputs OUT1 – OUT16 in SINGLECMD:1 are shown in table 927.
SINGLECMD PULSETIMER
BLOCK ÔUT1 INPUT OUT To output board, CLOSE
#CD01-CMDOUT1 ÔUT2
#CD01-CMDOUT2 ÔUT3
#CD01-CMDOUT3 ÔUT4
#CD01-CMDOUT4 ÔUT5 AND PULSETIMER
ÔUT6 INPUT1 OUT INPUT OUT To output board, OPEN
#CD01-CMDOUT5
#CD01-CMDOUT6 ÔUT7 INPUT2 NOUT
#CD01-CMDOUT7 ÔUT8 INPUT3
#CD01-CMDOUT8 ÔUT9 INPUT4
#CD01-CMDOUT9 ÔUT10
#CD01-CMDOUT16
SYNCH OK
Figure 625: Application example showing a simplified logic diagram for control of a circuit
breaker
The MODE input defines if the output signals from SINGLECMD:1 is off, steady or setable pulse
length signals. This is set in Parameter Setting Tool (PST) under: Main Menu/Settings / IED
Settings / Control / Commands / Single Command or via Parameter Setting Tool (PST).
Event function M11880-82 v4

Event function is intended to send time-tagged events to the station level (for example, operator
workplace) over the station bus. The events are there presented in an event list. The events can be
created from both internal logical signals and binary input channels. All the internal signals are
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Technical manual
time tagged in the main processing module, while the binary input channels are time tagged
directly on each I/O module. The events are produced according to the set of event masks. The
event masks are treated commonly for both the LON and SPA channels. All events according to the
event mask are stored in a buffer, which contains up to 1000 events. If new events appear before
the oldest event in the buffer is read, the oldest event is overwritten and an overflow alarm
appears.
Two special signals for event registration purposes are available in the IED, Terminal Restarted
(0E50) and Event buffer overflow (0E51).
The input parameters can be set individually from the Parameter Setting Tool (PST) under: Main
Menu/Settings / IED Settings / Monitoring / Event Function or via parameter Setting Tool (PST)
as follows:
• No events
• OnSet, at pick-up of the signal
• OnReset, at drop-out of the signal
• OnChange, at both pick-up and drop-out of the signal
• AutoDetect, event system itself make the reporting decision, (reporting criteria for integers
has no semantic, prefer to be set by the user)
The Status and event codes for the Event functions are found in table 928.
Table 928: Status and event codes
Single indication1) Double indication

Event block Status Set event Reset Intermed Closed Open Undefined
event iate 00 10 01 11
EVENT:1
Input 1 22O1 22E33 22E32 22E0 22E1 22E2 22E3
Input 2 22O2 22E35 22E34 22E4 22E5 22E6 22E7
Input 3 22O3 22E37 22E36 22E8 22E9 22E10 22E11
Input 4 22O4 22E39 22E38 22E12 22E13 22E14 22E15
Input 5 22O5 22E41 22E40 22E16 22E17 22E18 22E19
Input 6 22O6 22E43 22E42 22E20 22E21 22E22 22E23
Input 7 22O7 22E45 22E44 22E24 22E25 22E26 22E27
Input 8 22O8 22E47 22E46 22E28 22E29 22E30 22E31
Input 9 22O9 22E49 22E48 - - - -
Input 10 22O10 22E51 22E50 - - - -
Input 11 22O11 22E53 22E52 - - - -
Input 12 22O12 22E55 22E54 - - - -
Input 13 22O13 22E57 22E56 - - - -
Input 14 22O14 22E59 22E58 - - - -
Input 15 22O15 22E61 22E60 - - - -
Input 16 22O16 22E63 22E62 - - - -
EVENT:2 230.. 23E.. 23E.. 23E.. 23E.. 23E.. 23E..

EVENT:3 240.. 24E.. 24E.. 24E.. 23E.. 24E.. 24E..
- - - - - - - -
- - - - - - - -
- - - - - - - -
EVENT:20 410.. 41E.. 41E.. 41E.. 41E.. 41E.. 41E..
These values are only applicable if the Event mask is masked ≠ OFF.
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Technical manual
Connection of signals as events M11880-311 v4

Signals coming from different protection and control functions and must be sent as events to the
station level over the SPA-bus (or LON-bus) are connected to the Event function block according to
figure 626.
EVENT
Block BLOCK
ILRANG ÎNPUT1
PSTO ÎNPUT2
VABRANG ÎNPUT3
VBCRANG ÎNPUT4
VCARANG ÎNPUT5
3I0RANG ÎNPUT6
3V0RANG ÎNPUT7
FALSE ÎNPUT8
ÎNPUT9
ÎNPUT10
ÎNPUT11
ÎNPUT12
ÎNPUT13
ÎNPUT14
ÎNPUT15
ÎNPUT16
Figure 626: Connection of protection signals for event handling
19.7.4.1 Communication ports M11880-315 v4
The serial communication module (SLM) is a mezzanine module placed on the numeric processing
module (NUM) and is used for LON, SPA, IEC60870-5-103, or DNP communication.
There are two types of IO connectors: 1) snap-in for plastic fiber cables and 2) ST/bayonet for
glass fiber cables. The SLM can be equipped with either type or a combination of both, which is
identified by a tag.
Connect the incoming optical fiber to the RX receiver input, and the outgoing optical fiber to the
TX transmitter output. Pay special attention to the instructions concerning handling and
connection of fiber cables.
For setting the transfer rate (baud rate) and slave number, please refer to the Application Manual
and Commissioning Manual respectively.
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Technical manual
M11901-1 v2
Table 929: SPA communication protocol

Function Value
Protocol SPA
Communication speed 300, 1200, 2400, 4800, 9600, 19200 or 38400 Bd
Slave number 1 to 899
19.8 IEC 60870-5-103 communication protocol IP14615-1 v2
19.8.1 Introduction M11910-3 v3
IEC 60870-5-103 communication protocol is mainly used when a protection IED communicates
with a third party control or monitoring system. This system must have software that can
interpret the IEC 60870-5-103 communication messages.
19.8.2 Measurands for IEC 60870-5-103 I103MEAS
19.8.2.1 Functionality GUID-557FB587-9127-4D99-B2C6-16445E06F220 v3
103MEAS is a function block that reports all valid measuring types depending on connected
signals.
The set of connected input will control which ASDUs (Application Service Data Units) are
generated.
• 9 Will be generated if at least IA is connected. IB, IC, VA, VB, VC, P, Q, F are optional but there
can be no holes.
• 3.4 Will be generated if IN and VN are present.
• 3.3 Will be generated if IB, VAB, P and Q present.
• 3.2 Will be generated if IB, VAB, and P or Q missing.
• 3.1 Will be generated if IB is present and IA is missing (otherwise I_B in 9).
Description for I103MEAS function block:

9 = IA
3.4 = IN AND VN
3.3 = IB AND VAB AND P AND Q
3.2 = IB AND VAB AND NOT 3.3
3.1 = IB AND NOT (3.2 OR 3.3 OR 9)
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Technical manual
GUID-3E1AB624-1B68-4018-B1BA-BC2C811F8F74 v1
Function description Function block IEC 60617 ANSI/IEEE C37.2

name identification device number
Measurands for IEC 60870-5-103 I103MEAS - -
19.8.2.3 Function block GUID-EC5F1C83-0F47-4548-86E3-FFE056571241 v2
I103MEAS
BLOCK
I_A
I_B
I_C
IN
V_A
V_B
V_C
V_AB
V_N
P
Q
F
Figure 627: I103MEAS function block
19.8.2.4 Signals
Table 930: I103MEAS Input signals

BLOCK BOOLEAN 0 Block of service value reporting
IA REAL 0.0 Service value for current phase A
IB REAL 0.0 Service value for current phase B
IC REAL 0.0 Service value for current phase C
IN REAL 0.0 Service value for residual current IN
VA REAL 0.0 Service value for voltage phase A
VB REAL 0.0 Service value for voltage phase B
VC REAL 0.0 Service value for voltage phase C
V_AB REAL 0.0 Service value for voltage phase-phase AB
V_N REAL 0.0 Service value for residual voltage VN
P REAL 0.0 Service value for active power
Q REAL 0.0 Service value for reactive power
F REAL 0.0 Service value for system frequency
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Technical manual
19.8.2.5 Settings
Table 931: I103MEAS Non group settings (basic)

FunctionType 1 - 255 - 1 1 Function type (1-255)
MaxIa 1 - 99999 A 1 3000 Maximum current phase A
MaxIb 1 - 99999 A 1 3000 Maximum current phase B
MaxIc 1 - 99999 A 1 3000 Maximum current phase C
MaxIN 1 - 99999 A 1 3000 Maximum residual current IN
MaxVa 0.05 - 2000.00 kV 0.05 230.00 Maximum voltage for phase A
MaxVb 0.05 - 2000.00 kV 0.05 230.00 Maximum voltage for phase B
MaxVc 0.05 - 2000.00 kV 0.05 230.00 Maximum voltage for phase C
MaxVab 0.05 - 2000.00 kV 0.05 400.00 Maximum voltage for phase-phase AB
MaxVn 0.05 - 2000.00 kV 0.05 230.00 Maximum residual voltage VN
MaxP 0.00 - 2000.00 MW 0.05 1200.00 Maximum value for active power
MaxQ 0.00 - 2000.00 MVAr 0.05 1200.00 Maximum value for reactive power
MaxF 45.0 - 66.0 Hz 1.0 51.0 Maximum system frequency
19.8.3 Measurands user defined signals for IEC 60870-5-103

I103MEASUSR
19.8.3.1 Functionality GUID-FC9ED4BD-F11C-4BDA-8CDB-3ACF00931D3A v1
I103MEASUSR is a function block with user defined input measurands in monitor direction. These
function blocks include the FunctionType parameter for each block in the private range, and the
Information number parameter for each block.
GUID-A9E21066-354B-453D-8D9B-E86EE31CF5F9 v1

Measurands user defined signals for I103MEASUSR - -
IEC 60870-5-103
1177
Technical manual
19.8.3.3 Function block GUID-C234101E-F9B9-4DB0-874C-C51BB50588CB v1
I103MEASUSR
BLOCK
ÎNPUT1
ÎNPUT2
ÎNPUT3
ÎNPUT4
ÎNPUT5
ÎNPUT6
ÎNPUT7
ÎNPUT8
ÎNPUT9
Figure 628: I103MEASUSR function block
19.8.3.4 Signals
Table 932: I103MEASUSR Input signals

BLOCK BOOLEAN 0 Block of service value reporting
INPUT1 REAL 0.0 Service value for measurement on input 1
19.8.3.5 Settings
Table 933: I103MEASUSR Non group settings (basic)

InfNo 1 - 255 - 1 1 Information number for measurands
(1-255)
MaxMeasur1 0.05 - - 0.05 1000.00 Maximum value for measurement on input
10000000000.00 1
10000000000.00 2
10000000000.00 3
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Technical manual

10000000000.00 4
10000000000.00 5
10000000000.00 6
10000000000.00 7
10000000000.00 8
10000000000.00 9
19.8.4 Function status auto-recloser for IEC 60870-5-103 I103AR
19.8.4.1 Functionality GUID-7A132276-35A2-402C-9722-6259D65998F5 v1
I103AR is a function block with defined functions for autorecloser indications in monitor direction.
This block includes the FunctionType parameter, and the information number parameter is
defined for each output signal.
GUID-7B066282-79D7-480B-BEDE-3C04F0FCBF05 v1

Function status auto-recloser for IEC I103AR - -
60870-5-103
19.8.4.3 Function block GUID-FAC5A3DF-73CB-4A39-A213-5C21ACA05756 v1
I103AR
BLOCK
16_ARACT
128_CBON
130_BLKD
Figure 629: I103AR function block
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Technical manual
19.8.4.4 Signals
Table 934: I103AR Input signals

BLOCK BOOLEAN 0 Block of status reporting
16_ARACT BOOLEAN 0 Information number 16, auto-recloser active
128_CBON BOOLEAN 0 Information number 128, circuit breaker on by auto-recloser
130_BLKD BOOLEAN 0 Information number 130, auto-recloser blocked
19.8.4.5 Settings
Table 935: I103AR Non group settings (basic)

19.8.5 Function status ground-fault for IEC 60870-5-103 I103EF GUID-F23B392E-B55D-4BC3-A0A6-B7992D551092 v1
19.8.5.1 Functionality GUID-13F90E95-7C8C-4DCB-A9D8-2489B66DB81A v2
I103EF is a function block with defined functions for ground fault indications in monitor direction.
This block includes the FunctionType parameter, and the information number parameter is
defined for each output signal.
GUID-033731B7-1B71-4CCC-8356-1C03CBCB23FA v1

Function status earth-fault for IEC I103EF - -
60870-5-103
19.8.5.3 Function block GUID-25B47484-2976-4063-BD81-AE02D03B08B0 v1
I103EF
BLOCK
51_EFFW
52_EFREV
Figure 630: I103EF function block
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Technical manual
19.8.5.4 Signals
Table 936: I103EF Input signals

51_EFFW BOOLEAN 0 Information number 51, ground-fault forward
52_EFREV BOOLEAN 0 Information number 52, ground-fault reverse
19.8.5.5 Settings
Table 937: I103EF Non group settings (basic)

19.8.6 Function status fault protection for IEC 60870-5-103

I103FLTPROT
19.8.6.1 Functionality GUID-6D52F442-1592-4BA7-919C-0CD79046CAE5 v1
I103FLTPROT is used for fault indications in monitor direction. Each input on the function block is
specific for a certain fault type and therefore must be connected to a correspondent signal
present in the configuration. For example: 68_TRGEN represents the General Trip of the device,
and therefore must be connected to the general trip signal SMPPTRC_TRIP or equivalent.
The delay observed in the protocol is the time difference in between the signal that is triggering
the Disturbance Recorder and the respective configured signal to the IEC 60870-5-103
I103FLTPROT.
GUID-55593EC4-7AED-47A0-8311-DB22D013A193 v1

Function status fault protection for I103FLTPROT - -
IEC 60870-5-103
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Technical manual
19.8.6.3 Function block GUID-F0ED13B8-6B82-4CA7-8F22-C200C33EBB7E v2
I103FLTPROT
BLOCK
64_PU_A
65_PU_B
66_PU_C
67_STIN
68_TRGEN
69_TR_A
70_TR_B
71_TR_C
72_TRBKUP
73_SCL
74_FW
75_REV
76_TRANS
77_RECEV
78_ZONE1
79_ZONE2
80_ZONE3
81_ZONE4
82_ZONE5
84_STGEN
85_BFP
86_MTR_A
87_MTR_B
88_MTR_C
89_MTRN
90_IOC
91_IOC
92_IEF
93_IEF
ARINPROG
FLTLOC
Figure 631: I103FLTPROT function block
19.8.6.4 Signals
Table 938: I103FLTPROT Input signals

BLOCK BOOLEAN 0 Block of status reporting.
64_PU_A BOOLEAN 0 Information number 64, pickup phase A
65_PU_B BOOLEAN 0 Information number 64, pickup phase B
66_PU_C BOOLEAN 0 Information number 64, pickup phase C
67_STIN BOOLEAN 0 Information number 67, start residual current IN
68_TRGEN BOOLEAN 0 Information number 68, trip general
69_TR_A BOOLEAN 0 Information number 69, trip phase A
70_TR_B BOOLEAN 0 Information number 70, trip phase B
71_TR_C BOOLEAN 0 Information number 71, trip phase C
72_TRBKUP BOOLEAN 0 Information number 72, back up trip I>>
73_SCL REAL 0 Information number 73, fault location in ohm
74_FW BOOLEAN 0 Information number 74, forward/line
75_REV BOOLEAN 0 Information number 75, reverse/busbar
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Technical manual

76_TRANS BOOLEAN 0 Information number 76, signal transmitted
77_RECEV BOOLEAN 0 Information number 77, signal received
78_ZONE1 BOOLEAN 0 Information number 78, zone 1
84_STGEN BOOLEAN 0 Information number 84, start general
85_BFP BOOLEAN 0 Information number 85, breaker failure
86_MTR_A BOOLEAN 0 Information number 86, trip measuring system phase A
87_MTR_B BOOLEAN 0 Information number 87, trip measuring system phase B
88_MTR_C BOOLEAN 0 Information number 88, trip measuring system phase C
89_MTRN BOOLEAN 0 Information number 89, trip measuring system neutral N
90_IOC BOOLEAN 0 Information number 90, over current trip, stage low
91_IOC BOOLEAN 0 Information number 91, over current trip, stage high
92_IEF BOOLEAN 0 Information number 92, ground-fault trip, stage low
93_IEF BOOLEAN 0 Information number 93, ground-fault trip, stage high
ARINPROG BOOLEAN 0 Autorecloser in progress (SMBRREC- INPROGR)
FLTLOC BOOLEAN 0 Faultlocator faultlocation valid (LMBRFLO-CALCMADE)
19.8.6.5 Settings
Table 939: I103FLTPROT Non group settings (basic)

19.8.7 IED status for IEC 60870-5-103 I103IED
19.8.7.1 Functionality GUID-52AC7D0F-33C5-46FC-983E-5CB4B3517D88 v1
I103IED is a function block with defined IED functions in monitor direction. This block uses
parameter as FunctionType, and information number parameter is defined for each input signal.
GUID-5EEBE11C-C8E3-4A8A-814F-840E137DB5B5 v1

IED status for IEC 60870-5-103 I103IED - -
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Technical manual
19.8.7.3 Function block GUID-421D5C37-27A5-476A-A7D9-40E70AFDFDC8 v1
I103IED
BLOCK
19_LEDRS
21_TESTM
22_SETCH
23_GRP1
24_GRP2
25_GRP3
26_GRP4
Figure 632: I103IED function block
19.8.7.4 Signals
Table 940: I103IED Input signals

19_LEDRS BOOLEAN 0 Information number 19, reset LEDs
21_TESTM BOOLEAN 0 Information number 21, test mode is active
22_SETCH BOOLEAN 0 Information number 22, setting changed
23_GRP1 BOOLEAN 0 Information number 23, setting group 1 is active
19.8.7.5 Settings
Table 941: I103IED Non group settings (basic)

19.8.8 Supervison status for IEC 60870-5-103 I103SUPERV
19.8.8.1 Functionality GUID-E7A28D8D-398E-437C-9B58-AE125BC38058 v1
I103SUPERV is a function block with defined functions for supervision indications in monitor
direction. This block includes the FunctionType parameter, and the information number parameter
is defined for each output signal.
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Technical manual
GUID-C8113B08-3586-412C-A750-606159B1E97E v1

Supervison status for IEC I103SUPERV - -
60870-5-103
19.8.8.3 Function block GUID-69C2C974-2D64-4174-9F9A-15383C09050D v1
I103SUPERV
BLOCK
32_MEASI
33_MEASU
37_IBKUP
38_VTFF
46_GRWA
47_GRAL
Figure 633: I103SUPERV function block
19.8.8.4 Signals
Table 942: I103SUPERV Input signals

32_MEASI BOOLEAN 0 Information number 32, measurand supervision of I
33_MEASU BOOLEAN 0 Information number 33, measurand supervision of V
37_IBKUP BOOLEAN 0 Information number 37, I high-high back-up protection
38_VTFF BOOLEAN 0 Information number 38, fuse failure VT
46_GRWA BOOLEAN 0 Information number 46, group warning
47_GRAL BOOLEAN 0 Information number 47, group alarm
19.8.8.5 Settings
Table 943: I103SUPERV Non group settings (basic)

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Technical manual
19.8.9 Status for user defined signals for IEC 60870-5-103 I103USRDEF
19.8.9.1 Functionality GUID-DADC9CE4-2E80-426C-A3B6-A8E8C7AC3CD4 v3
I103USRDEF is a function block with user defined input signals in monitor direction. Each instance
is associated with a Function Type (FUN) and each input signal with an Information Number (INF).
Additionally, all input signals may be defined to use relative time and how to respond to a GI
request.
The user is responsible for assigning a proper FUN value and proper INF values to all connected
inputs. See Settings for details.
GUID-474FDF39-CEFC-4370-9393-13BE62159969 v2

Status for user defined signals for I103USRDEF - -
IEC 60870-5-103
19.8.9.3 Function block GUID-B8312E77-514D-4117-BB31-B9907755580C v1
Figure 634: I103USRDEF function block
19.8.9.4 Signals
Table 944: I103USRDEF Input signals

INPUT1 BOOLEAN 0 Binary signal Input 1
INPUT2 BOOLEAN 0 Binary signal input 2
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Technical manual

RT_START BOOLEAN 0 Trig to set base of relative time
GUID-9E29DE39-EA74-4D62-A2BA-F8E31A3D8757 v1
RT_START registers the positive transition (0->1) of a pulse and sets the time from which relative
time is derived. Relative time is assigned only to inputs where the corresponding TypNo
parameter is set to Relative. The maximum relative time and unit conform to the IEC60870-5-103
standard.
19.8.9.5 Settings
Table 945: I103USRDEF Non group settings (basic)

InfNo1 1 - 255 - 1 1 Information number for binary input 1
(1-255)
(1-255)
(1-255)
(1-255)
(1-255)
(1-255)
(1-255)
(1-255)
TypNo1 Absolute - - Absolute Type identification (TYP)
Relative
Relative
Relative
Relative
Relative
Relative
Relative
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Technical manual

Relative
GiNo1 Excluded - - Included Response and status change (GI)
Included
Included
Included
Included
Included
Included
Included
Included
GUID-86DE9DBA-BE2F-4CC9-B447-1D2D86849EFF v1
The FunctionType parameter associates a particular instance of the function block with a FUN.
Refer to the IEC60870-5-103 standard for details.
The InfNon parameters are used to associate each individual input signal with a userdefined INF.
Refer to the IEC60870-5-103 standard for details.
The TypNon parameters determine if messages use absolute or relative time. This adheres to the
TYPE IDENTIFICATION (TYP) message types 1 (time-tagged message) and 2 (time-tagged message
with relative time) of the IEC60870-5-103 standard.
The GiNon parameters determine whether a message is sent as a part of a GI reply or not. Refer to
the IEC60870-5-103 standard for details.
19.8.10 Function commands for IEC 60870-5-103 I103CMD
19.8.10.1 Functionality GUID-973929FE-292B-42A5-ACF9-BC95E2B16AE1 v2
I103CMD is a command function block in control direction with pre-defined output signals. The
signals are in steady state, not pulsed, and stored in the IED in case of restart.
GUID-CFD43980-0791-40D1-9136-CF4CCC35549A v1

Function commands for IEC I103CMD - -
60870-5-103
1188
Technical manual
19.8.10.3 Function block GUID-C0680812-C488-4546-AA65-F590955DBF0C v1
I103CMD
BLOCK 16-AR
17-DIFF
18-PROT
Figure 635: I103CMD function block
19.8.10.4 Signals
Table 946: I103CMD Input signals

BLOCK BOOLEAN 0 Block of commands
Table 947: I103CMD Output signals

16-AR BOOLEAN Information number 16 disable/enable autorecloser
17-DIFF BOOLEAN Information number 17, block of differential protection
18-PROT BOOLEAN Information number 18, block of protection
19.8.10.5 Settings
Table 948: I103CMD Non group settings (basic)

19.8.11 IED commands for IEC 60870-5-103 I103IEDCMD
19.8.11.1 Functionality GUID-19AD44B2-21D6-4DB0-AD74-1578DA30C100 v5
I103IEDCMD is a command block in control direction with defined IED functions. All outputs are
pulsed and they are NOT stored. Pulse length is fixed to 400ms.
GUID-0D0B2477-1B0C-48F3-B047-CCF9C7A71856 v1

IED commands for IEC 60870-5-103 I103IEDCMD - -
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Technical manual
19.8.11.3 Function block GUID-52D27CDA-8805-48FA-99BE-2E05A438B0C7 v1
I103IEDCMD
BLOCK 19-LEDRS
23-GRP1
24-GRP2
25-GRP3
26-GRP4
Figure 636: I103IEDCMD function block
19.8.11.4 Signals
Table 949: I103IEDCMD Input signals

Table 950: I103IEDCMD Output signals

19-LEDRS BOOLEAN Information number 19, reset LEDs
23-GRP1 BOOLEAN Information number 23, activate setting group 1
19.8.11.5 Settings
Table 951: I103IEDCMD Non group settings (basic)

19.8.12 Function commands user defined for IEC 60870-5-103

I103USRCMD
19.8.12.1 Functionality GUID-2989EAC8-20BE-46EE-93FE-C70188D0BC89 v1
I103USRCMD is a command block in control direction with user defined output signals. These
function blocks include the FunctionType parameter for each block in the private range, and the
Information number parameter for each output signal.
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Technical manual
GUID-9D6D1636-36C6-4C4E-B157-2D827820DDC7 v1

Function commands user defined for I103USRCMD - -
IEC 60870-5-103
19.8.12.3 Function block GUID-5EBEAED5-ABD9-4257-B879-DF7FD9F7805A v1
I103USRCMD
BLOCK ÔUTPUT1
ÔUTPUT2
ÔUTPUT3
ÔUTPUT4
ÔUTPUT5
ÔUTPUT6
ÔUTPUT7
ÔUTPUT8
Figure 637: I103USRCMD function block
19.8.12.4 Signals
Table 952: I103USRCMD Input signals

Table 953: I103USRCMD Output signals

OUTPUT1 BOOLEAN Command output 1
1191
Technical manual
19.8.12.5 Settings
Table 954: I103USRCMD Non group settings (basic)

PulseMode Steady - - Pulsed Pulse mode
Pulsed
PulseLength 0.200 - 60.000 s 0.001 0.400 Pulse length
InfNo_1 1 - 255 - 1 1 Information number for output 1 (1-255)
19.8.13 Function commands generic for IEC 60870-5-103 I103GENCMD
19.8.13.1 Functionality GUID-729E9AFD-0468-4BBD-B54A-A6CDCC68A9B2 v3
I103GENCMD is used for transmitting generic commands over IEC 60870-5-103. The function has
two outputs signals CMD_OFF and CMD_ON that can be used to implement double-point
command schemes.
The I103GENCMD component can be configured as either 2 pulsed ON/OFF or 2 steady ON/OFF
outputs. The ON output is pulsed with a command with value 2, while the OFF output is pulsed
with a command value 1. If in steady mode is ON asserted and OFF deasserted with command 2
and vice versa with command 1. Steady mode is selected by setting PulseLength=0. The
I103GENCMD is retained, and a command in steady mode will be reissued on restart.
GUID-1933A30C-5214-4116-8CD3-91BD975FACED v1

Function commands generic for IEC I103GENCMD - -
60870-5-103
1192
Technical manual
19.8.13.3 Function block GUID-6EC8453E-0D00-4720-95A6-156C41CA46BB v1
I103GENCMD
BLOCK ^CMD_OFF
^CMD_ON
Figure 638: I103GENCMD function block
19.8.13.4 Signals
Table 955: I103GENCMD Input signals

BLOCK BOOLEAN 0 Block of command
Table 956: I103GENCMD Output signals

CMD_OFF BOOLEAN Command output OFF
CMD_ON BOOLEAN Command output ON
19.8.13.5 Settings
Table 957: I103GENCMD Non group settings (basic)

PulseLength 0.000 - 60.000 s 0.001 0.400 Pulse length
InfNo 1 - 255 - 1 1 Information number for command output
(1-255)
19.8.14 IED commands with position and select for IEC 60870-5-103
I103POSCMD
19.8.14.1 Functionality GUID-1E40B94D-B6A6-42F0-8757-A47B8A3FA3CD v8
I103POSCMD is a transceiver function that monitors activity on its input signals and interprets any
state transition into commands then sent over an established IEC 60870-5-103 link. Additionally, it
listens for general interrogation (GI) requests and replies to those with a GI response message
with the current state of each connected input.
Input POSITION is a double-indication signal, and it is GI enabled. This means that any state
transition, that is to ON, OFF, intermediate and faulty, is reported spontaneously. However, the
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Technical manual
intermediate and faulty states may be suppressed by setting the Report Intermediate Position =
Off. See the settings for RS485 and optical serial communication for more information.
Input SELECT is a single-indication signal, and it is also GI enabled. State transitions to ON and
OFF are reported spontaneously.
When input BLOCK is ON, the function will ignore GI requests and cease all monitoring activity.
Consequently, no transitions will be detected.
The I103POSCMD function is also equipped with three additional commands: Select, Operate and
Cancel. These are hidden in ACT and respond only to the base INF+1, INF+2 and INF+3 respectively.
The base INF (Information Number) parameter is an IEC 60870-5-103 identifier that associates a
function in a 103 Master (such as Scada) with its equivalent in the IED.
GUID-ABF81C27-4605-4A15-9CF5-77FF82DE8747 v1

IED commands with position and I103POSCMD - -
select for IEC 60870-5-103
19.8.14.3 Function block GUID-3A31C1F2-1FB5-4DB0-A698-AD3F55738DB1 v1
I103POSCMD
BLOCK
POSITION
SELECT
Figure 639: I103POSCMD function block
19.8.14.4 Signals
Table 958: I103POSCMD Input signals

POSITION INTEGER 0 Position of controllable object
SELECT BOOLEAN 0 Select of controllable object
19.8.14.5 Settings
Table 959: I103POSCMD Non group settings (basic)

FunctionType 1 - 255 - 1 1 Function type
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19.8.15 IED commands with position for IEC 60870-5-103 I103POSCMDV
19.8.15.1 Functionality GUID-CF04D9AC-40BE-46A3-A418-77204D2B0F27 v3
I103POSCMDV is a transceiver function that monitors activity on its input signals and interprets
any state transition into commands sent over an established IEC 60870-5-103 link. Additionally, it
listens for general interrogation (GI) requests, and replies to those with a GI response message
with the current state of each connected input.
Input POSITION is a double-indication signal, and it is GI enabled. This means that any state
transition, that is to ON, OFF, intermediate and faulty, is reported spontaneously. However, the
intermediate and faulty states may be suppressed by setting the Report Intermediate Position =
Off. See the settings for RS485 and optical serial communication for more information.
When input BLOCK is ON, the function ignores GI requests and ceases all monitoring activity.
Consequently, no transitions will be detected.
GUID-2249B679-03E4-43CC-B690-916246FE6A31 v1

IED direct commands with position I103POSCMDV - -
for IEC 60870-5-103
19.8.15.3 Function block GUID-031C0F49-BEBD-40FE-A33F-18F1D94BB4B0 v1
Figure 640: I103POSCMDV function block
19.8.15.4 Signals
Table 960: I103POSCMDV Input signals

POSITION INTEGER 0 Position of controllable object
19.8.15.5 Settings
Table 961: I103POSCMDV Non group settings (basic)

FunctionType 1 - 255 - 1 1 Function type
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19.8.16.1 General M11874-3 v5
IEC 60870-5-103 is an unbalanced (master-slave) protocol for coded-bit serial communication

exchanging information with a control system, and with a data transfer rate up to 38400 bit/s. In
IEC terminology, a primary station is a master and a secondary station is a slave. The
communication is based on a point-to-point principle. The master must have software that can
interpret IEC 60870-5-103 communication messages.
Introduction to IEC 60870–5–103 protocol M11874-6 v3

IEC 60870-5-103 protocol functionality consists of the following functions:
• Event handling
• Report of analog service values (measurements)
• Fault location
• Command handling
• Autorecloser ON/OFF
• Teleprotection ON/OFF
• Protection ON/OFF
• LED reset
• Characteristics 1 - 4 (Setting groups)
• File transfer (disturbance files)
• Time synchronization
For detailed information about IEC 60870-5-103, refer to the IEC 60870 standard part 5:
Transmission protocols, and to the section 103: Companion standard for the informative interface
of protection equipment.
IEC 60870-5-103 vendor specific implementation M11874-23 v4

The signal and setting tables specify the information types supported by the IEDs with the
communication protocol IEC 60870-5-103 implemented.
The information types are supported when corresponding functions are included in the protection
and control IED.
Be aware of that different cycle times for function blocks must be considered to
ensure correct time stamping.
Commands in control direction M11874-27 v1

Commands in control direction, I103IEDCMD M11874-29 v6
Command block in control direction with defined output signals.
Number of instances: 1
Function type is selected with parameter FunctionType.
Information number is defined for each output signals.
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Table 962: I103IEDCMD supported indications

INF Description
19 LED Reset
23 Activate setting group 1
Function commands in control direction, pre-defined I103CMD M11874-53 v6

Function command block in control direction with defined output signals.
Information number is defined for each output signals.
Table 963: Pre-defined I103CMD supported indications

INF Description
16 Auto-recloser on/off
17 Teleprotection on/off
18 Protection on/off
Function commands in control direction, user-defined, I103USRCMD M11874-72 v5

Function command blocks in control direction with user-defined output signals.
Function type for each function block instance in private range is selected with parameter
FunctionType.
Information number must be selected for each output signal. Default values are 1 - 8.
Table 964: I103USRCMD supported indications

INF Description
11) Output signal 01
2* Output signal 02
3* Output signal 03
4* Output signal 04
5* Output signal 05
6* Output signal 06
7* Output signal 07
8* Output signal 08
1) * User defined information number
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Status M11874-107 v1
Terminal status indications in monitor direction, I103IED M11874-109 v7
Indication block for status in monitor direction with defined IED functions.
Information number is defined for each input signals.
Table 965: I103IED supported functions

INF Description
19 LED reset
21 TestMode
22 Local Parameter setting
23 Setting group 1 active
Function status indications in monitor direction, user-defined, I103USRDEF M11874-137 v7

Function indication block in monitor direction with user-defined input signals.
Information number is required for each input signal.
Table 966: I103USRDEF Information number default values

INF Description GI TYP COT
11) Input signal 01 x/- 1/2 1,7,(9)
2* Input signal 02 x/- 1/2 1,7,(9)

3* Input signal 03 x/- 1/2 1,7,(9)
4* Input signal 04 x/- 1/2 1,7,(9)
5* Input signal 05 x/- 1/2 1,7,(9)
6* Input signal 06 x/- 1/2 1,7,(9)
7* Input signal 07 x/- 1/2 1,7,(9)
8* Input signal 08 x/- 1/2 1,7,(9)
1) * User defined information number
Supervision indications in monitor direction, I103SUPERV M11874-171 v7

Indication block for supervision in monitor direction with defined functions.
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Information number is defined for output signals.
Table 967: I103SUPERV supported functions

Info. no. Message Typ GI COT
32 Measurand supervision I 1 Y 1,7,9
33 Measurand supervision V 1 Y 1,7,9
37 I>>back-up operation 1 Y 1,7,9
38 VT fuse failure 1 Y 1,7,9
46 Group warning 1 Y 1,7,9
47 Group alarm 1 Y 1,7,9
Ground fault indications in monitor direction, I103EF M11874-199 v8

Indication block for ground fault in monitor direction with defined functions.
Information number is defined for each output signal.
Table 968: I103EF supported indications

INF Description
51 Ground fault forward
52 Ground fault reverse
Autorecloser indications in monitor direction, I103AR M11874-363 v6

Indication block for autorecloser in monitor direction with defined functions.
Information number is defined for each output signal.
Table 969: I103AR supported indications

INF Description
16 Autorecloser active
128 CB on by Autorecloser
130 Autorecloser blocked
Function status fault protection for IEC 60870-5-103, I103FLTPROT GUID-E9DF9410-F570-4F85-9063-C76D1D4A0668 v5

Information number is defined for each input signals.
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Table 970:
INF Description TYP GI COT
64 Pickup phase A 2 Y 1,7,9
65 Pickup phase B 2 Y 1,7,9
66 Pickup phase C 2 Y 1,7,9
67 Pickup residual current IN 2 Y 1,7,9
68 Trip general 2 N 1,7
69 Trip phase A 2 N 1,7
70 Trip phase B 2 N 1,7
71 Trip phase C 2 N 1,7
72 Back up trip I>> 2 N 1,7
73 Fault location in ohm 4 N 1,7
74 Forward/line 2 N 1,7
75 Reverse/busbar 2 N 1,7
76 Signal transmitted 2 N 1,7
77 Signal received 2 N 1,7
78 Zone 1 2 N 1,7
79 Zone 2 2 N 1,7
80 Zone 3 2 N 1,7
81 Zone 4 2 N 1,7
82 Zone 5 2 N 1,7
84 Pickup general 2 Y 1,7,9
85 Breaker failure 2 N 1,7
86 Trip measuring system phase A 2 N 1,7
87 Trip measuring system phase B 2 N 1,7
88 Trip measuring system phase C 2 N 1,7
89 Trip measuring system neutral 2 N 1,7
N
90 Over current trip, stage low 2 N 1,7
91 Over current trip, stage high 2 N 1,7
92 Ground-fault trip, stage low 2 N 1,7
93 Ground-fault trip, stage high 2 N 1,7
Measurands M11874-382 v2
Function blocks in monitor direction for input measurands. Typically connected to monitoring
function, for example to power measurement CVMMXN.
Measurands in public range, I103MEAS M11874-385 v8

The IED reports all valid measuring types depending on connected signals.
Upper limit for measured currents, active/reactive-power is 2.4 times rated value.
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Upper limit for measured voltages and frequency is 1.2 times rated value.
The upper limit is the maximum value that can be encoded into the ASDU (Application Service Data
Unit). Any value higher than this value will be tagged as OVERFLOW. The factors 1.2 and 2.4 are
taken from the 103 standard and require that a rated value to use as base exists, and then use 1.2
or 2.4 times <rated> as maxVal. You can use 2.4 times rated as maxVal, but as there is no way to
propagate value to client, the use of a scale factor on <rated> does not make much difference.
You can configure client:client-scaled-max ::= 1.2 * <rated> or client-scaled-

max ::= 1.0 * <maxVal>
If the client has a hard-coded gain of 1.2 * <rated> then client-scaled-max ::= 1.2 times
<maxVal>/1.2
Resolution is <maxVal> / 4095 and hence the lowest possible maxVal yields the best accuracy.
Table 971: I103MEAS supported indications

INF Description
148 I_A
144, 145, I_B
146, 148
148 I_C
147 IN, Neutral current
148 V_A
148 V_B
148 V_C
145, 146 V_A-V_B
147 UN, Neutral voltage
146, 148 P, active power
146, 148 Q, reactive power
148 f, frequency
Measurands in private range, I103MEASUSR M11874-431 v5

Function type parameter for each block in private range.
Information number must be selected for measurands.
Table 972: I103MEASUSR supported indications

INF FUN GI TYP COT Description
*1) *2) No, polled *3) 2,7 Meas1
with CL2
* * No, polled * 2,7 Meas2
with CL2
with CL2
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INF FUN GI TYP COT Description

with CL2
with CL2
with CL2
with CL2
with CL2
with CL2
1) * User defined information value (PARAM.3)

2) * User defined information value (PARAM.2)
3) 9 = Measurands II, Format = Measurand II (7.3.1.8 in IEC 60870-5-103:1997), semantics per IE is defined by
semantics of connected source.
<Number of information elements> is defined by index of first input not connected.
Example: Input1, Input2, and Input4 are connected, Input3 is not connected.
<Number of information elements> will be 3 (Input3 NOT connected) -1 = 2, that is, only Input1 and
Input2 will be transmitted.
Disturbance recordings M11874-467 v6

The following elements are used in the ASDUs (Application Service Data Units) defined in the
standard.
Analog signals, 40-channels: the channel number for each channel has to be specified. Channels
used in the public range are 1 to 8 and with:
• IA connected to channel 1 on disturbance function block A1RADR

• IB connected to channel 2 on disturbance function block A1RADR
• IC connected to channel 3 on disturbance function block A1RADR
• IN connected to channel 4 on disturbance function block A1RADR
• VAE connected to channel 5 on disturbance function block A1RADR
• VBE connected to channel 6 on disturbance function block A1RADR
• VCE connected to channel 7 on disturbance function block A1RADR
• VEN connected to channel 8 on disturbance function block A1RADR
Channel number used for the remaining 32 analog signals are numbers in the private range 64 to
95.
Binary signals, 96-channels: for each channel the user can specify a FUNCTION TYPE and an
INFORMATION NUMBER.
M11874-629 v7
Disturbance upload
All analog and binary signals that are recorded with disturbance recorder can be reported to the
master. The last eight disturbances that are recorded are available for transfer to the master. A
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successfully transferred disturbance (acknowledged by the master) will not be reported to the
master again.
When a new disturbance is recorded by the IED a list of available recorded disturbances will be
sent to the master, an updated list of available disturbances can be sent whenever something has
happened to disturbances in this list. For example, when a disturbance is deleted (by other client,
for example, SPA) or when a new disturbance has been recorded or when the master has uploaded
a disturbance.
Deviations from the standard
Information sent in the disturbance upload is specified by the standard; however, some of the
information are adapted to information available in disturbance recorder in the IED series.
This section describes all data that is not exactly as specified in the standard.
ASDU23
In ‘list of recorded disturbances’ (ASDU23) an information element named SOF (status of fault)
exists. This information element consists of 4 bits and indicates whether:
• Bit TP: the protection equipment has tripped during the fault
• Bit TM: the disturbance data are currently being transmitted
• Bit TEST: the disturbance data have been recorded during normal operation or test mode.
• Bit OTEV: the disturbance data recording has been initiated by another event than pick-up
The only information that is easily available is test-mode status. The other information is always
set (hard coded) to:
TP Recorded fault with trip. [1]

TM Disturbance data waiting for transmission [0]
OTEV Disturbance data initiated by other events [1]
Another information element in ASDU23 is the FAN (fault number). According to the standard this
is a number that is incremented when a protection function takes action. FAN is equal to
disturbance number, which is incremented for each disturbance.
ASDU26 / ASDU31
When a disturbance has been selected by the master by sending ASDU24, the protection
equipment answers by sending ASDU26, which contains an information element named NOF
(number of grid faults). This number must indicate fault number in the power system,that is, a
fault in the power system with several trip and auto-reclosing has the same NOF (while the FAN
must be incremented). NOF is just as FAN, equal to disturbance number.
M11874-482 v2
Interoperability, physical layer

Supported
Electrical Interface
EIA RS-485 No
number of loads No
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Supported
Optical interface
glass fiber Yes
plastic fiber
Transmission speed
9600 bit/s Yes
19200 bit/s Yes
Link Layer
DFC-bit used Yes
Connectors
connector F-SMA No
connector BFOC/2.5 Yes
Interoperability, application layer M11874-524 v2
Supported
Selection of standard ASDUs in monitoring direction
ASDU Yes
1 Time-tagged message Yes
2 Time-tagged message with rel. time Yes
3 Measurands I Yes
4 Time-tagged message with rel. time Yes
5 Identification Yes
6 Time synchronization Yes
8 End of general interrogation Yes
9 Measurands II Yes
10 Generic data No
11 Generic identification No
23 List of recorded disturbances Yes
26 Ready for transm. of disturbance data Yes
27 Ready for transm. of a channel Yes
28 Ready for transm of tags Yes
29 Transmission of tags Yes
30 Transmission fo disturbance data Yes
31 End of transmission Yes
Selection of standard ASDUs in control direction
ASDU Yes
6 Time synchronization Yes
7 General interrogation Yes
10 Generic data No
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Supported
20 General command Yes
21 Generic command No
24 Order for disturbance data transmission Yes
25 Acknowledgement for distance data Yes
transmission
Selection of basic application functions
Test mode No
Blocking of monitoring direction Yes
Disturbance data Yes
Private data Yes
Generic services No
19.8.16.2 Communication ports M11874-626 v2
The serial communication module (SLM) is used for SPA/IEC 60870-5-103/DNP and LON
communication. This module is a mezzanine module, and can be placed on the Analog/Digital
conversion module (ADM). The serial communication module can have connectors for two plastic
fiber cables (snap-in) or two glass fiber cables (ST, bayonet) or a combination of plastic and glass
fiber. Three different types are available depending on type of fiber.
The incoming optical fiber is connected to the RX receiver input, and the outgoing optical fiber to
the TX transmitter output. When the fiber optic cables are laid out, pay special attention to the
instructions concerning the handling and connection of the optical fibers. The module is identified
with a number on the label on the module.
M11921-1 v4
Table 973: IEC 60870-5-103 communication protocol

Function Value
Protocol IEC 60870-5-103
Communication speed 9600, 19200 Bd
19.9 Horizontal communication via GOOSE for interlocking

GOOSEINTLKRCV SEMOD173197-1 v2
19.9.1 Functionality GUID-92ECE152-892C-4214-95DE-B92718689434 v2
GOOSE communication can be used for exchanging information between IEDs via the IEC
61850-8-1 station communication bus. This is typically used for sending apparatus position
indications for interlocking or reservation signals for 1-of-n control. GOOSE can also be used to
exchange any boolean, integer, double point and analog measured values between IEDs.
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GOOSEINTLKRCV
BLOCK ^RESREQ
^RESGRANT
ÂPP1_OP
ÂPP1_CL
APP1VAL
ÂPP2_OP
ÂPP2_CL
APP2VAL
ÂPP3_OP
ÂPP3_CL
APP3VAL
ÂPP4_OP
ÂPP4_CL
APP4VAL
ÂPP5_OP
ÂPP5_CL
APP5VAL
ÂPP6_OP
ÂPP6_CL
APP6VAL
ÂPP7_OP
ÂPP7_CL
APP7VAL
ÂPP8_OP
ÂPP8_CL
APP8VAL
ÂPP9_OP
ÂPP9_CL
APP9VAL
ÂPP10_OP
ÂPP10_CL
APP10VAL
ÂPP11_OP
ÂPP11_CL
APP11VAL
ÂPP12_OP
ÂPP12_CL
APP12VAL
ÂPP13_OP
ÂPP13_CL
APP13VAL
ÂPP14_OP
ÂPP14_CL
APP14VAL
ÂPP15_OP
ÂPP15_CL
APP15VAL
COMMVALID
TEST
IEC07000048.vsd
Figure 641: GOOSEINTLKRCV function block
GUID-2DC54788-86AF-4B4B-8E57-A89E30F0C433 v1
Except for the BLOCK input, the rest of the inputs of this GOOSE function block are
used for GOOSE connections. These connections are visible and possible to make
only if Easy GOOSE engineering is enabled. For instructions on how to enable Easy
GOOSE engineering in PCM600, refer to the Engineering Manual.
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Table 974: GOOSEINTLKRCV Input signals

BLOCK BOOLEAN 0 Block of output signals
Table 975: GOOSEINTLKRCV Output signals

RESREQ BOOLEAN Reservation request
RESGRANT BOOLEAN Reservation granted
APP1_OP BOOLEAN Apparatus 1 position is open
APP1_CL BOOLEAN Apparatus 1 position is closed
APP1VAL BOOLEAN Apparatus 1 position is valid
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COMMVALID BOOLEAN Communication Valid
TEST BOOLEAN Test Output
Table 976: GOOSEINTLKRCV Non group settings (basic)

Enabled
19.9.5 Operation principle GUID-7275CFBA-F1FE-496A-A9A1-724139DB2081 v1
The APPxVAL output will be HIGH if the incoming message is with valid data.
The COMMVALID output will become LOW when the sending IED is under total failure condition
and the GOOSE transmission from the sending IED does not happen.
The TEST output will go HIGH if the sending IED is in test mode.
Data Value Data Valid Comm Valid Test

Incoming data with q=Normal Updated 1 1 0
Incoming data with q=oldData 0 0 1 0
Incoming data with q=Invalid 0 0 1 0
Incoming data with q=test 0 0 1 1
Incoming data with q=test+oldData 0 0 1 1
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Receiver in block 0 0 1 0
Receiver in block and communication 0 0 0 0
error
Receiver in test mode and incoming data Updated 1 1 0
with q= Normal
with q= Test
Communication Error 0 0 0 0
At least one of the inputs of this GOOSE block must be linked either in SMT by
means of a cross or in ACT by means of a GOOSE connection (if easy GOOSE
engineering is enabled) to receive any data. Only those outputs whose source input
is linked/connected will be updated.
The implementation for IEC 61850 quality data handling is restricted to a simple
level. If quality data validity is GOOD then the APPxVAL output will be HIGH. If
quality data validity is INVALID, QUESTIONABLE, OVERFLOW, FAILURE or OLD DATA
then the APPxVAL output will be LOW.
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19.10 Goose binary receive GOOSEBINRCV SEMOD173158-1 v2
GOOSEBINRCV
BLOCK ÔUT1
DVALID1
ÔUT2
DVALID2
ÔUT3
DVALID3
ÔUT4
DVALID4
ÔUT5
DVALID5
ÔUT6
DVALID6
ÔUT7
DVALID7
ÔUT8
DVALID8
ÔUT9
DVALID9
ÔUT10
DVALID10
ÔUT11
DVALID11
ÔUT12
DVALID12
ÔUT13
DVALID13
ÔUT14
DVALID14
ÔUT15
DVALID15
ÔUT16
DVALID16
COMMVALID
TEST
IEC07000047.vsd
Figure 642: GOOSEBINRCV function block
Table 977: GOOSEBINRCV Input signals

BLOCK BOOLEAN 0 Block of output signals
Table 978: GOOSEBINRCV Output signals

OUT1 BOOLEAN Binary output 1
DVALID1 BOOLEAN Valid data on binary output 1
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COMMVALID BOOLEAN Communication Valid
TEST BOOLEAN Test Output
Table 979: GOOSEBINRCV Non group settings (basic)

Enabled
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19.10.4 Operation principle GUID-950F2501-9183-43C0-A193-7D15124F6CCE v2
The DVALIDx output will be HIGH if the incoming message is with valid data.

Incoming data with q=Normal Updated 1 1 0
Incoming data with q=oldData 1 0 1 0
Incoming data with q=Invalid 0 0 1 0
Incoming data with q=test 0 0 1 1
Incoming data with q=test+oldData 0 0 1 1
Receiver in block 0 0 1 0
Receiver in block and communication 0 0 0 0
error
with q= Normal
with q= Test
Communication Error 0 0 0 0
At least one of the inputs of this GOOSE block must be linked either in SMT by
means of a cross or in ACT by means of a GOOSE connection (if easy GOOSE
engineering is enabled) to receive any data. Only those outputs whose source input
is linked/connected will be updated.
The implementation for IEC 61850 quality data handling is restricted to a simple
level. If quality data validity is GOOD then the DVALIDx output will be HIGH. If
then the DVALIDx output will be LOW.
19.11 GOOSE function block to receive a double point value

GOOSEDPRCV
GUID-8C11DB9A-7844-4E1F-A6BB-D97ECE350FC1 v1

GOOSE function block to receive a GOOSEDPRCV - -
double point value
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19.11.2 Functionality GUID-1D2DBC22-4F04-4809-B34E-8939D442C185 v2
GOOSEDPRCV is used to receive a double point value using IEC61850 protocol via GOOSE.
19.11.3 Function block GUID-ED277880-FB5D-4630-872F-9F343D449FFE v1
GOOSEDPRCV
BLOCK ^DPOUT
DATAVALID
COMMVALID
TEST
Figure 643: GOOSEDPRCV function block
19.11.4 Signals
Table 980: GOOSEDPRCV Input signals

Table 981: GOOSEDPRCV Output signals

DPOUT INTEGER Double point output
DATAVALID BOOLEAN Data valid for double point output
COMMVALID BOOLEAN Communication valid for double point output
TEST BOOLEAN Test output
19.11.5 Settings
Table 982: GOOSEDPRCV Non group settings (basic)

Enabled
19.11.6 Operation principle GUID-82A1C8A2-827A-40EF-8E58-F573E29E468E v2
The DATAVALID output will be HIGH if the incoming message is with valid data.
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The input of this GOOSE block must be linked in SMT by means of a cross to receive
the double point values.
The implementation for IEC61850 quality data handling is restricted to a simple

level. If quality data validity is GOOD then the DATAVALID output will be HIGH. If
then the DATAVALID output will be LOW.
19.12 GOOSE function block to receive an integer value

GOOSEINTRCV
GUID-93A1E81B-1DE8-483A-BB3B-DB771EE66DC1 v1

GOOSE function block to receive an GOOSEINTRCV - -
integer value
19.12.2 Functionality GUID-27B1ED7A-C8E8-499E-89C1-C656FB0337F8 v2
GOOSEINTRCV is used to receive an integer value using IEC61850 protocol via GOOSE.
19.12.3 Function block GUID-56F0C9F7-98F3-4091-B071-53CA5074DC8F v1
GOOSEINTRCV
BLOCK ÎNTOUT
DATAVALID
COMMVALID
TEST
Figure 644: GOOSEINTRCV function block
19.12.4 Signals
Table 983: GOOSEINTRCV Input signals

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Table 984: GOOSEINTRCV Output signals

INTOUT INTEGER Integer output
DATAVALID BOOLEAN Data valid for integer output
COMMVALID BOOLEAN Communication valid for integer output
19.12.5 Settings
Table 985: GOOSEINTRCV Non group settings (basic)

Enabled
19.12.6 Operation principle GUID-5BBDF772-3B3E-4F7C-ABE9-18CE3C1A2E2D v2
the integer values.

19.13 GOOSE function block to receive a measurand value

GOOSEMVRCV
GUID-B1FFBE08-C823-4A58-9FE0-A9A20DA6BB44 v1

GOOSE function block to receive a GOOSEMVRCV - -
measurand value
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19.13.2 Functionality GUID-759CB016-2B4D-4D98-82E1-592044983D53 v2
GOOSEMVRCV is used to receive measured value using IEC61850 protocol via GOOSE.
19.13.3 Function block GUID-A0B333CC-AEF4-40EA-B152-364648AB78D3 v1
GOOSEMVRCV
BLOCK ^MVOUT
DATAVALID
COMMVALID
TEST
Figure 645: GOOSEMVRCV function block
19.13.4 Signals
Table 986: GOOSEMVRCV Input signals

Table 987: GOOSEMVRCV Output signals

MVOUT REAL Measurand value output
DATAVALID BOOLEAN Data valid for measurand value output
COMMVALID BOOLEAN Communication valid for measurand value output
19.13.5 Settings
Table 988: GOOSEMVRCV Non group settings (basic)

Enabled
19.13.6 Operation principle GUID-7B24A6D3-2E5F-4961-A0A6-86436373809E v3
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the measured value.

19.14 GOOSE function block to receive a single point value

GOOSESPRCV
GUID-F2B30A70-842E-435E-8FAB-B1E58B9C0164 v1

GOOSE function block to receive a GOOSESPRCV - -
single point value
19.14.2 Functionality GUID-0C99A106-C131-45D3-9B81-6B188E35EB34 v2
GOOSESPRCV is used to receive a single point value using IEC61850 protocol via GOOSE.
19.14.3 Function block GUID-A414F31A-323F-4684-BADA-46F9C5E2B0E8 v1
GOOSESPRCV
BLOCK ^SPOUT
DATAVALID
COMMVALID
TEST
Figure 646: GOOSESPRCV function block
19.14.4 Signals
Table 989: GOOSESPRCV Input signals

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Table 990: GOOSESPRCV Output signals

SPOUT BOOLEAN Single point output
DATAVALID BOOLEAN Data valid for single point output
COMMVALID BOOLEAN Communication valid for single point output
19.14.5 Settings
Table 991: GOOSESPRCV Non group settings (basic)

Enabled
19.14.6 Operation principle GUID-0E25A3FB-41BD-4EFE-9CA0-1262B9CD14CD v2
the binary single point values.

19.15 GOOSE VCTR configuration for send and receive

GOOSEVCTRCONF
GUID-CD59C2EE-F937-4CCA-83C1-181F925B8A40 v1

GOOSE VCTR configuration for send GOOSEVCTRCO - -
and receive NF
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19.15.2 Functionality GUID-39C8760B-E4C2-4158-98D3-B3336364A10B v3
GOOSEVCTRCONF function is used to control the rate (in seconds) at which voltage control
information from TR8ATCC (90) is transmitted/received to/from other IEDs via GOOSE
communication. GOOSEVCTRCONF function is visible in PST.
The following voltage control information can be sent from TR8ATCC (90) via GOOSE
communication:
• BusV
• LoadAIm
• LoadARe
• PosRel
• SetV
• VCTRStatus
• X2
19.15.3 Settings
Table 992: GOOSEVCTRCONF Non group settings (basic)

SendOperation Disabled - - Enabled Send operation
Enabled
SendInterval 0.1 - 5.0 s 0.1 0.3 Send interval
ReceiveOperation Disabled - - Enabled Receive operation
Enabled
ReceiveInterval 0.1 - 10.0 s 0.1 0.8 Receive interval
19.16 GOOSE voltage control receiving block GOOSEVCTRRCV
GUID-470735CB-59CE-4935-85A1-48E9947817DF v1

GOOSE voltage control receiving GOOSEVCTRRC - -
block V
19.16.2 Functionality GUID-F733AE23-C2C7-4DEF-8629-EC89984C9F4B v2
GOOSEVCTRRCV component receives the voltage control data from GOOSE network at the user
defined rate.
This component also checks the received data validity, communication validity and test mode.
Communication validity will be checked upon the rate of data reception. Data validity also
depends upon the communication. If communication is invalid then data validity will also be
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invalid. IEC 61850 also checks for data validity using internal parameters which will also be passed
to the DATAVALID output.
19.16.3 Function block GUID-14AF9617-BDEB-4C97-8FCB-7357F47BF37B v1
GOOSEVCTRRCV
BLOCK VCTR_RCV
DATAVALID
COMMVALID
TEST
Figure 647: GOOSEVCTRRCV function block
19.16.4 Signals
Table 993: GOOSEVCTRRCV Input signals

BLOCK BOOLEAN 0 Block function
Table 994: GOOSEVCTRRCV Output signals

VCTR_RCV GROUP SIGNAL Output group connection to voltage control
DATAVALID BOOLEAN Data valid for output signals
COMMVALID BOOLEAN Communication valid for output signals
19.17 MULTICMDRCV and MULTICMDSND SEMOD119881-1 v3
GUID-1A6E066C-6399-4D37-8CA5-3074537E48B2 v2

Multiple command and receive MULTICMDRCV - -
Multiple command and send MULTICMDSND - -
The IED provides two function blocks enabling several IEDs to send and receive signals via the
interbay bus. The sending function block, MULTICMDSND, takes 16 binary inputs. LON enables
these to be transmitted to the equivalent receiving function block, MULTICMDRCV, which has 16
binary outputs.
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19.17.2 Design SEMOD119958-1 v1
19.17.2.1 General M14792-3 v3
The common behavior for all 16 outputs of the MULTICMDRCV is set to either of two modes:
Steady or Pulse.
• 1 = Steady: This mode simply forwards the received signals to the binary outputs.
• 2 = Pulse: When a received signal transitions from 0 (zero) to 1 (one), a pulse with a duration of
exactly one execution cycle is triggered on the corresponding binary output. This means that
no connected function block may have a cycle time that is higher than the execution cycle time
of the particular MULTICMDRCV instance.
SEMOD119976-5 v2
MULTICMDRCV
BLOCK ERROR
NEWDATA
OUTPUT1
OUTPUT2
OUTPUT3
OUTPUT4
OUTPUT5
OUTPUT6
OUTPUT7
OUTPUT8
OUTPUT9
OUTPUT10
OUTPUT11
OUTPUT12
OUTPUT13
OUTPUT14
OUTPUT15
OUTPUT16
VALID
Figure 648: MULTICMDRCV function block

SEMOD120009-4 v2
MULTICMDSND
BLOCK ERROR
INPUT1
INPUT2
INPUT3
INPUT4
INPUT5
INPUT6
INPUT7
INPUT8
INPUT9
INPUT10
INPUT11
INPUT12
INPUT13
INPUT14
INPUT15
INPUT16
Figure 649: MULTICMDSND function block
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Table 995: MULTICMDRCV Input signals

Table 996: MULTICMDSND Input signals

INPUT1 BOOLEAN 0 Input 1
Table 997: MULTICMDRCV Output signals

ERROR BOOLEAN MultiReceive error
NEWDATA BOOLEAN New data is received
OUTPUT1 BOOLEAN Output 1
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VALID BOOLEAN Output data is valid
Table 998: MULTICMDSND Output signals

ERROR BOOLEAN MultiSend error
PID-400-SETTINGS v9
Table 999: MULTICMDRCV Non group settings (basic)

tMaxCycleTime 0.050 - 200.000 s 0.001 11.000 Maximum cycle time between receptions
of input data
tMinCycleTime 0.000 - 200.000 s 0.001 0.000 Minimum cycle time between receptions of
input data
Mode Steady - - Steady Mode for output signals
Pulsed
tPulseTime 0.000 - 60.000 s 0.001 0.200 Pulse length for multi command outputs
PID-399-SETTINGS v9
Table MULTICMDSND Non group settings (basic)

1000:
tMaxCycleTime 0.000 - 200.000 s 0.001 5.000 Maximum time interval between
transmission of output data
tMinCycleTime 0.000 - 200.000 s 0.001 0.000 Minimum time interval between
transmission of output data
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There are 10 instances of the MULTICMDSND function block. The first two are fast (8 ms cycle
time) while the others are slow (100 ms cycle time). Each instance has 16 binary inputs, to which 16
independent signals can be connected. Connected signals are sent through MULTICMDSND to the
receiving equivalent, MULTICMDRCV, located on a different IED.
The MULTICMDRCV function block has 16 binary outputs, all controlled through the command
block of one or many MULTICMDSND function blocks. There are 60 instances of the
MULTICMDRCV where the first 12 are fast (8 ms), and the others are slow (100 ms). Additionally,
the MULTICMDRCV has a supervision function, which sets the output connector "VALID" to 0 (zero)
if its block does not receive any data within the time defined by tMaxCycleTime.
LON connections are established using LON network tool (LNT).
19.18 Security events on protocols SECALARM
19.18.1 Security alarm SECALARM GUID-205B0024-DA06-4369-8707-5E1D2D035995 v2
19.18.1.1 Signals
Table 1001:SECALARM Output signals

EVENTID INTEGER EventId of the generated security event
SEQNUMBER INTEGER Sequence number of the generated security event
19.18.1.2 Settings
Table SECALARM Non group settings (basic)

1002:
Operation Disabled - - Enabled Operation On/Off
Enabled
19.19 Activity logging parameters ACTIVLOG
19.19.1 Activity logging ACTIVLOG GUID-BED7C3D6-6BE3-4DAC-84B3-92239E819CC0 v1
ACTIVLOG contains all settings for activity logging.
There can be 6 external log servers to send syslog events to. Each server can be configured with IP
address; IP port number and protocol format. The format can be either syslog (RFC 5424) or
Common Event Format (CEF) from ArcSight.
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19.19.2 Settings
Table ACTIVLOG Non group settings (basic)

1003:
ExtLogSrv1Type Disabled - - Disabled External log server 1 type
ExtLogSrv1Type
SYSLOG TCP/IP
CEF TCP/IP
ExtLogSrv1Port 1 - 65535 - 1 514 External log server 1 port number
ExtLogSrv1IP 0 - 18 IP 1 127.0.0.1 External log server 1 IP-address
Address
ExtLogSrv1Type
SYSLOG TCP/IP
CEF TCP/IP
Address
ExtLogSrv1Type
SYSLOG TCP/IP
CEF TCP/IP
Address
ExtLogSrv1Type
SYSLOG TCP/IP
CEF TCP/IP
Address
ExtLogSrv1Type
SYSLOG TCP/IP
CEF TCP/IP
Address
ExtLogSrv1Type
SYSLOG TCP/IP
CEF TCP/IP
Address
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Section 20 Remote communication
20.1 Binary signal transfer IP12423-1 v2
M14849-1 v2

Binary signal transfer BinSignReceive - -
Binary signal transfer BinSignTransm - -
The remote end data communication is used either for the transmission of current values with a
maximum of 8 binary signals in the line differential protection IED, or for the transmission of only
binary signals (up to 192) in the other IEDs. The binary signals are freely configurable and can, thus,
be used for any purpose, for example, communication scheme related signals, transfer trip and/or
other binary signals between IEDs.
Communication between two IEDs requires that each IED is equipped with a Line Data
Communication Module (LCDM). The LDCMs then act as interfaces to a 64 kbit/s communication
channel for duplex communication between the IEDs.
The IED can be equipped with up to four short range, medium range or long range LDCMs.
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SEMOD55084-4 v2
LDCMRecBinStat1
COMFAIL
YBIT
NOCARR
NOMESS
ADDRERR
LNGTHERR
CRCERROR
REMCOMF
LOWLEVEL
LDCMRecBinStat2
COMFAIL
YBIT
NOCARR
NOMESS
ADDRERR
LNGTHERR
CRCERROR
TRDELERR
SYNCERR
REMCOMF
REMGPSER
SUBSTITU
LOWLEVEL
Figure 650: LDCMRecBinStat function blocks

SEMOD55082-4 v2
LDCMRecBinStat3
COMFAIL
YBIT
NOCARR
NOMESS
ADDRERR
LNGTHERR
CRCERROR
TRDELERR
SYNCERR
REMCOMF
REMGPSER
SUBSTITU
LOWLEVEL
Figure 651: LDCMRecBinStat function block
20.1.4 Signals
Table LDCMRecBinStat1 Output signals

1004:
COMFAIL BOOLEAN Detected error in the differential communication
YBIT BOOLEAN Detected error in remote end with incoming message
NOCARR BOOLEAN No carrier is detected in the incoming message
NOMESS BOOLEAN No start and stop flags identified for the incoming message
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ADDRERR BOOLEAN Incoming message from non-valid address
LNGTHERR BOOLEAN Wrong length of the incoming message
CRCERROR BOOLEAN Identified error by CRC check in incoming message
REMCOMF BOOLEAN Remote terminal indicates problem with received message
LOWLEVEL BOOLEAN Low signal level on the receive link

1005:
CH1 STRING Remote communication channel 1
TRDELERR BOOLEAN Transmission time is longer than permitted
SYNCERR BOOLEAN Error in echo synchronization
REMGPSER BOOLEAN Remote terminal indicates problem with GPS synchronization
SUBSTITU BOOLEAN Link error, values are substituted

1006:
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TRDELERR BOOLEAN Transmission time is longer than permitted
SYNCERR BOOLEAN Error in echo synchronization
REMGPSER BOOLEAN Remote terminal indicates problem with GPS synchronization
SUBSTITU BOOLEAN Link error, values are substituted
20.1.5 Settings
Table LDCMRecBinStat1 Non group settings (basic)

1007:
ChannelMode Blocked - - Normal Channel mode of LDCM, 0=OFF, 1=ON,
Normal 2=OutOfService
OutOfService
TerminalNo 0 - 255 - 1 0 Terminal number used for line differential
communication
RemoteTermNo 0 - 255 - 1 0 Terminal number on remote terminal
CommSync Slave - - Slave Com Synchronization mode of LDCM,
Master 0=Slave, 1=Master
OptoPower LowPower - - LowPower Transmission power for LDCM, 0=Low,
HighPower 1=High
ComFailAlrmDel 5 - 500 ms 5 100 Time delay before communication error
signal is activated
ComFailResDel 5 - 500 ms 5 100 Reset delay before communication error
signal is reset
InvertPolX21 Disabled - - Disabled Invert polarization for X21 communication
Enabled
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1008:
OutOfService
communication
DiffSync Echo - - Echo Diff Synchronization mode of LDCM,
GPS 0=ECHO, 1=GPS
GPSSyncErr Block - - Block Operation mode when GPS synchroniation
Echo signal is lost
HighPower 1=High
TransmCurr CT-GRP1 - - CT-GRP1 Summation mode for transmitted current
CT-GRP2 values
CT-SUM
CT-DIFF1
CT-DIFF2
signal is activated
signal is reset
RedChSwTime 5 - 500 ms 5 5 Time delay before switching in redundant
channel
RedChRturnTime 5 - 500 ms 5 100 Time delay before switching back from
redundant channel
AsymDelay -20.00 - 20.00 ms 0.01 0.00 Asymmetric delay when communication
use echo synch.
AnalogLatency 2 - 20 - 1 2 Latency between local analogue data and
transmitted
remAinLatency 2 - 20 - 1 2 Analog latency of remote terminal
MaxTransmDelay 0 - 40 ms 1 20 Max allowed transmission delay
CompRange 0-10kA - - 0-25kA Compression range
0-25kA
0-50kA
0-150kA
MaxtDiffLevel 200 - 2000 us 1 600 Maximum time diff for ECHO back-up
DeadbandtDiff 200 - 1000 us 1 300 Deadband for t Diff
Enabled
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1009:
OutOfService
communication
DiffSync Echo - - Echo Diff Synchronization mode of LDCM,
GPS 0=ECHO, 1=GPS
GPSSyncErr Block - - Block Operation mode when GPS synchroniation
Echo signal is lost
HighPower 1=High
TransmCurr CT-GRP1 - - CT-GRP1 Summation mode for transmitted current
CT-GRP2 values
CT-SUM
CT-DIFF1
CT-DIFF2
RedundantChann
el
signal is activated
signal is reset
RedChSwTime 5 - 500 ms 5 5 Time delay before switching in redundant
channel
RedChRturnTime 5 - 500 ms 5 100 Time delay before switching back from
redundant channel
AsymDelay -20.00 - 20.00 ms 0.01 0.00 Asymmetric delay when communication
use echo synch.
AnalogLatency 2 - 20 - 1 2 Latency between local analogue data and
transmitted
remAinLatency 2 - 20 - 1 2 Analog latency of remote terminal
MaxTransmDelay 0 - 40 ms 1 20 Max allowed transmission delay
CompRange 0-10kA - - 0-25kA Compression range
0-25kA
0-50kA
0-150kA
MaxtDiffLevel 200 - 2000 us 1 600 Maximum time diff for ECHO back-up
DeadbandtDiff 200 - 1000 us 1 300 Deadband for t Diff
Enabled
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Table 1010:LDCMRecBinStat1 Monitored data

CommStatus BOOLEAN 0=Ok - Status of communication link
1=SyncErr
2=No RXD
3=LocalGPSErr
4=RemGPSErr
5=LocAndRemG
PSErr
6=LocalADErr
7=RemADErr
8=LocAndRemA
DErr
9=AddressErr
10=FreqConfErr
11=LatencyConf
Err
Table 1011: LDCMRecBinStat2 Monitored data

1=SyncErr
2=No RXD
3=LocalGPSErr
4=RemGPSErr
5=LocAndRemG
PSErr
6=LocalADErr
7=RemADErr
8=LocAndRemA
DErr
9=AddressErr
10=FreqConfErr
11=LatencyConf
Err
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Table 1012: LDCMRecBinStat3 Monitored data

1=SyncErr
2=No RXD
3=LocalGPSErr
4=RemGPSErr
5=LocAndRemG
PSErr
6=LocalADErr
7=RemADErr
8=LocAndRemA
DErr
9=AddressErr
10=FreqConfErr
11=LatencyConf
Err
The communication is made on standard ITU (CCITT) PCM digital 64 kbit/s channels. It is a two-
way communication where telegrams are sent every 5 ms (same in 50 Hz and 60 Hz), exchanging
information between two IEDs. The format used is C37.94 and one telegram consists of start and
stop flags, address, data to be transmitted, Cyclic Redundancy Check (CRC) and Yellow bit (which
is associated with C37.94).
Start Stop
Information CRC
flag flag
8 bits n x 16 bits 16 bits 8 bits

en01000134.vsd
Figure 652: Data message structure

The start and stop flags are the 0111 1110 sequence (7E hexadecimal), defined in the HDLC
standard. The CRC is designed according to the standard CRC16 definition. The optional address
field in the HDLC frame is not used instead a separate addressing is included in the data field.
The address field is used for checking that the received message originates from the correct
equipment. There is always a risk that multiplexers occasionally mix the messages up. Each
terminal in the system is given a number. The terminal is then programmed to accept messages
from a specific terminal number. If the CRC function detects a faulty message, the message is
thrown away and not used in the evaluation.
When the communication is used for line differential purpose, the transmitted data consists of
three currents, clock information, trip-, block- and alarm-signals and eight binary signals which can
be used for any purpose. The three currents are represented as sampled values.
When the communication is used exclusively for binary signals, the full data capacity of the
communication channel is used for the binary signal purpose which gives the capacity of 192
signals.
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20.2 Transmission of local analog data via LDCM to remote

end, function block LDCMTRN called LDCMTransmit GUID-B057C0DD-4EA8-4F6A-B57C-3395DFB38463 v2
GUID-05808CF6-34D6-4C76-A7A2-A26E5A96EC44 v2
LDCMTRN
^CT1L1
^CT1L2
^CT1L3
^CT1N
^CT2L1
^CT2L2
^CT2L3
^CT2N
Figure 653: LDCMTRN function block
20.2.2 Signals
Table 1013: LDCMTRN Input signals

CT1L1 STRING 0 Input to be used for transmit CT-group1 line L1 to remote end
CT1N STRING 0 Input to be used for transmit CT-group1 neutral N to remote end
CT2N STRING 0 Input to be used for transmit CT-group2 neutral N to remote end
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Security
Section 21 Security
21.1 Authority check ATHCHCK
GUID-FBEF319B-94E6-41FB-BB9F-D870E0425128 v2

Authority check ATHCHCK - -
To safeguard the interests of our customers, both the IED and the tools that are accessing the IED
are protected, by means of authorization handling. The authorization handling of the IED and the
PCM600 is implemented at both access points to the IED:
• local, through the local HMI

• remote, through the communication ports
The IED users can be created, deleted and edited with PCM600 IED user management tool.
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Figure 654: PCM600 user management tool
21.1.3 Operation principle GUID-B555EDD0-BAF1-4F0E-9162-BDB3A3468CF2 v8
There are different levels (or types) of users that can access or operate different areas of the IED
and tools functionality. The pre-defined user types are given in Table 1014.
Ensure that the user logged on to the IED has the access required when writing
particular data to the IED from PCM600.
The meaning of the legends used in the table:
• R= Read
• W= Write
• - = No access rights
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Table 1014:Pre-defined user types

Access rights System Protection Design User
Guest Super User SPA Guest Operator Engineer Engineer Administrato
r
Basic setting possibilities (change R R/W R R/W R/W R/W R
setting group, control settings, limit
supervision)
Advanced setting possibilities (for R R/W R R R/W R/W R
example protection settings)
Basic control possibilities (process R R/W R/W R/W R/W R/W R
control, no bypass)
Advanced control possibilities R R/W R/W R/W R/W R/W R
(process control including interlock
trigg)
Basic command handling (for R R/W R R/W R/W R/W R
example clear LEDs, manual trigg)
Advanced command handling (for R R/W R R R/W R/W R/W
example clear disturbance record)
Basic configuration possibilities R R/W R R R R/W R/W
(I/O-configuration in SMT)
Advanced configuration possibilities R R/W R R R R/W R/W
(application configuration including
SMT, GDE and CMT)
File loading (database loading from - R/W - - - R/W R/W
XML-file)
File dumping (database dumping to - R/W - - - R/W R/W
XML-file)
File transfer (FTP file transfer) - R/W - R/W R/W R/W R/W
File transfer (limited) (FTP file R R/W R R/W R/W R/W R/W
transfer)
File Transfer (SPA File Transfer) - R/W - - - R/W -
Database access for normal user R R/W R R/W R/W R/W R/W
User administration (user R R/W R R R R R/W
management – FTP File Transfer)
User administration (user - R/W - - - - -
management – SPA File Transfer)
The IED users can be created, deleted and edited only with the IED User Management within
PCM600. The user can only LogOn or LogOff on the local HMI on the IED, there are no users,
groups or functions that can be defined on local HMI.
If the IED is Central Account Management enabled, users can only be created,
deleted or edited in the Central Account Management server. In that case, only the
user rights can be edited using the PCM600 tool. See Cyber Security Deployment
Guidelines manual.
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Only characters A - Z, a - z and 0 - 9 should be used in user names and passwords.

The maximum of characters in a password is 18.
At least one user must be included in the UserAdministrator group to be able to

write users, created in PCM600, to IED.
SEMOD176296-5 v8.1.1
At delivery the default user is the SuperUser. No Log on is required to operate the IED until a user
has been created with the IED User Management..
Once a user is created and downloaded to the IED, that user can perform a Log on, introducing the
password assigned in the tool.
If there is no user created, an attempt to log on will display a message box: “No user defined!”
If one user leaves the IED without logging off, then after the timeout (set in Main menu/
Configuration/HMI/Screen/Display Timeout) elapses, the IED returns to Guest state, when only
reading is possible. The display time out is set to 60 minutes at delivery.
If there are one or more users created with the IED User Management and downloaded into the
IED, then, when a user intentionally attempts a Log on or when the user attempts to perform an
operation that is password protected, the Log on window will appear.
The cursor is focused on the User identity field, so upon pressing the key, the user can change
the user name, by browsing the list of users, with the “up” and “down” arrows. After choosing the
right user name, the user must press the “E” key again. When it comes to password, upon pressing
the key, the following character will show up: “$”. After all the letters are introduced
(passwords are case sensitive) choose OK and press the key again.
If everything is alright at a voluntary Log on, the local HMI returns to the Authorization screen. If
the Log on is OK, when required to change for example a password protected setting, the local
HMI returns to the actual setting folder. If the Log on has failed, then the Log on window opens
again, until either the user makes it right or presses “Cancel”.
21.1.3.1 Authorization with Central Account Management enabled IED GUID-1A836989-5D89-4F3D-B3A2-3BABCDFFB440 v1
The users, their roles and rights are created, deleted and edited only in the Central Account
Management server (SDM600). However, the user rights can be edited in the IED by using the
PCM600 user tool.
One user can have one or several user roles. By default, the users in Table 1015 are created in the
IED, and when creating new users in the SDM600 server, the predefined roles from Table 1016 can
be used.
At delivery, the IED user has full access as SuperUser when using the LHMI and as
Administrator when using FTP or PCM600 until Central Account Management is
activated.
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Table 1015: Default users

User name User rights
SuperUser Full rights, only presented in LHMI. LHMI is logged on by default until other users are defined
Guest Only read rights, only presented in LHMI. LHMI is logged on by default when other users are
defined (same as VIEWER)
Administrator Full rights. Password: Administrator. This user has to be used when reading out disturbances
with third party FTP-client.
Table 1016:Predefined user roles according to IEC 62351-8

User roles Role explanation User rights
VIEWER Viewer Can read parameters and browse the menus from LHMI
OPERATOR Operator Can read parameters and browse the menus as well as perform control
actions
ENGINEER Engineer Can create and load configurations and change settings for the IED and
also run commands and manage disturbances
INSTALLER Installer Can load configurations and change settings for the IED
SECADM Security Can change role assignments and security settings. Can deploy
administrator certificates.
SECAUD Security auditor Can view audit logs
RBACMNT RBAC Can change role assignment
management
ADMINISTRATOR Administrator Sum of all rights for SECADM, SECAUD and RBACMNT
rights
This User role is vendor specific and not defined in IEC

62351–8
Changes in user management settings do not cause an IED reboot.
The PCM600 tool caches the login credentials after successful login for 15 minutes.
During that time no more login will be necessary.
The successfully activation of Central Account Management will disable built-in users or remove all
local created users from PCM600.
Management of user credentials and roles is handled on the central Account Management server
e.g. SDM600 The IED employs two strategies to ensure availability of the authentication system
even if there is a problem with the network or authentication server:
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• A substation can be equipped with two redundant authentication servers operating in a hot
standby mode.
• If configured by the security administrator, the IED itself maintains a local replica in the
database with selected users. This database is periodically updated with data from the server
and used as fallback if none of the servers are reachable.
Note that not all users in the SDM600 server are part of the replica. There might be users that are
not assigned to any replication group. IED only replicates those users which are part of replication
group configured in the IED.
This replication can be disabled using PCM600 by the security administrator, which means that
the IED will forward login requests to the SDM600 for authorization and in case of problems with
the network users will not be able to log in to the IED.
If user replication has been disabled in a CAM-enabled IED and if communication

with SDM600 is lost, access to that IED will be denied until communication is re-
established.
All communication between the central management and the IEDs is protected using secure
communication. Customers using SDM600 are required to generate and distribute certificates
during the engineering process of the substation. These certificates ensure mutual trust between
IED and for example SDM600, FTP, PCM600 and other system.
Table 1017: Authority-related IED functions

Function Description
Authority status This function is an indication function block for user logon activity.
ATHSTAT User denied attempt to logon and user successful logon are reported.
Authority check To safeguard the interests of our customers, both the IED and the tools that are
ATHCHCK accessing the IED are protected, by means of authorization handling. The authorization
handling of the IED and the PCM600 is implemented at both access points to the IED:
• local, through the local HMI

• remote, through the communication ports
The IED users can be created, deleted and edited only in the CAM server.
Authority This function enables/disables the maintenance menu. It also controls the maintenance
management menu logon time out.
AUTHMAN
For more information on the functions Authority Management (AUTHMAN), Authority Status
(ATHSTAT), and Authority Check (ATHCHCK) functions, refer to chapter “Basic IED functions” in
the Technical Manual.
21.2 Authority management AUTHMAN
GUID-7925E6A3-301D-44A5-982F-167805EEA473 v1

Authority management AUTHMAN - -
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21.2.2 AUTHMAN GUID-AF7EDB44-42AA-4D49-BFA0-DA6A9B43973E v1
This function enables/disables the maintenance menu. It also controls the maintenance menu log
on time out.
21.2.3 Settings
Table 1018:AUTHMAN Non group settings (basic)

MaintMenuDisAuth Disable - - Enable In maintenance menu, disable authority
Enable selection is shown
AuthTimeout 600 - 3600 s 600 600 Authority blocking timeout
21.3 FTP access with password FTPACCS
GUID-C037D0B0-1AA0-4592-9293-92C7EDED3261 v1

FTP access with SSL FTPACCS - -
21.3.2 FTP access with TLS, FTPACCS GUID-9E64EA68-6FA9-4576-B5E9-92E3CC6AA7FD v3
The FTP Client defaults to the best possible security mode when trying to negotiate with TLS.
The automatic negotiation mode acts on configured port number 21 and server features, it tries to
negotiate with explicit TLS via AUTH TLS. If the specified port is any other, it tries to negotiate in a
similar way.
Using FTP without TLS encryption gives the FTP client reduced capabilities. This mode is only for
accessing disturbance recorder data from the IED.
If normal FTP is required to read out disturbance recordings, create a specific

account for this purpose with rights only to do File transfer. The password of this
user will be exposed in clear text on the wire.
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21.3.3 Settings
Table 1019:FTPACCS Non group settings (basic)

PortSelection None - - Any Port selection for communication
Front
LANAB
LANCD
Any
SSLMode FTP+FTPS - - FTPS Support for AUTH TLS/SSL
FTPS
TCPPortFTP 1 - 65535 - 1 21 TCP port for FTP and FTP with Explicit SSL
21.4 Authority status ATHSTAT
GUID-79C63688-4D7D-4954-AC3C-B9484D084F6F v1

Authority status ATHSTAT - -
Authority status ATHSTAT function is an indication function block for user log-on activity.
User denied attempt to log-on and user successful log-on are reported.
ATHSTAT
USRBLKED
LOGGEDON
Figure 655: ATHSTAT function block
21.4.4 Signals
Table ATHSTAT Output signals

1020:
USRBLKED BOOLEAN At least one user is blocked by invalid password
LOGGEDON BOOLEAN At least one user is logged on
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GUID-87CF079A-64C8-46AE-B7E4-A0B2EEAC92E9 v1
The output signal USRBLKED is not valid if the IED is Centralized Account
Management enabled.
21.4.5 Settings GUID-ECE18AA9-15CC-4522-AA31-78C4F0F052E4 v2
The function does not have any parameters available in Local HMI or in Protection and Control IED
Manager (PCM600)
Authority status (ATHSTAT) function informs about two events related to the IED and the user
authorization:
• the fact that at least one user has tried to log on wrongly into the IED and it was blocked (the
output USRBLKED)
• the fact that at least one user is logged on (the output LOGGEDON)
Whenever one of the two events occurs, the corresponding output (USRBLKED or LOGGEDON) is
activated. The output can for example, be connected on Event (EVENT) function block for LON/
SPA.The signals are also available on IEC 61850 station bus.
21.5 Self supervision with internal event list INTERRSIG IP1721-1 v2
Self supervision with internal event list function listens and reacts to internal system events,
generated by the different built-in self-supervision elements. The internal events are saved in an
internal event list presented on the LHMI and in PCM600 event viewer tool.
INTERRSIG
FAIL
WARNING
TSYN CERR
RTCERR
STUPBLK
Figure 656: INTERRSIG function block
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21.5.3 Signals IP9674-1 v2
Table 1021: INTERRSIG Output signals

FAIL BOOLEAN Internal fail
WARNING BOOLEAN Internal warning
TSYNCERR BOOLEAN Time synchronization error
RTCERR BOOLEAN Real time clock error
DISABLE BOOLEAN Application Disable
M11401-3 v11
The self-supervision operates continuously and includes:
• Normal micro-processor watchdog function.

• Checking of digitized measuring signals.
• Other alarms, for example hardware and time synchronization.
The self-supervision function status can be monitored from the local HMI or from the Event Viewer
in PCM600.
Under the Diagnostics menu in the local HMI, the actual information from the self-supervision
function can be reviewed. The information can be found under Main menu/Diagnostics/Internal
events or Main menu/Diagnostics/IED status/General. The information from the self-supervision
function is also available in the Event Viewer in PCM600.
Figure 657: IED general status in local HM

The self supervision records internal signal changes in an internal event list. A maximum of 40
internal events are stored in a first-in, first-out manner.
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GUID-B481701F-05B4-4B29-83D4-18F13886FEBE V1 EN-US
Figure 658: Self-supervision event list in local HMI

A self-supervision summary can be obtained by means of an output relay with potential free alarm
contact (INTERNAL FAIL) located on the power supply module. This contact is closed when the IED
either does not have auxiliary power, or when one or more error conditions are present in the IED
(for example harware error).
Some output signals are available from the INTERRSIG function block. The signals from this
function block are sent as events via IEC61850 to the station level of the control system. These
signals can also be connected to binary outputs for signalization via output relays or they can be
used as conditions for other functions if required/desired.
Individual error signals from I/O modules can be obtained from respective module in the Signal
Matrix tool. Error signals from time synchronization can be obtained from the INTERRSIG function
block via two outputs TSYNCERR and RTCERR .
21.5.5.1 Internal signals M11401-173 v11
Self supervision provides several status signals that give information about the internal status of
the IED. For this reason they are also called internal signals. These internal signals , available on
local HMI under Main menu/Diagnostics/IED status/General, can be divided into two groups.
• Standard signals are always presented in the IED, see table 1022.
• Hardware dependent internal signals are collected depending on the hardware configuration,
see table 1023.
Table 1022:Self-supervision's standard internal signals

Name of signal Description Displayed on Reasons for activation
local HMI as
FAIL Internal Fail Internal fail This signal will be active if one or more of the following
status internal signals are active; LMDERROR, WATCHDOG,
APPERROR, RTEERROR, or any of the HW dependent
signals
WARNING Internal Internal This signal will be active if one or more of the following
Warning warning internal signals are active; RTCERROR, IEC61850ERROR
status
RTCERROR Real Time Real time clock This signal will be active when there is a hardware error
Clock status with the real time clock.
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Name of signal Description Displayed on Reasons for activation

local HMI as
TIMESYNCHERROR Time Time synch This signal will be active when the source of the time
Synchronizat synchronization is lost, or when the time system has to
ion status make a time reset.
RTEERROR Runtime Runtime This signal will be active if the Runtime Engine failed to
Execution execution do some actions with the application threads. The
Error status actions can be loading of settings or parameters for
components, changing of setting groups, loading or
unloading of application threads.
IEC61850ERROR IEC 61850 IEC61850 This signal will be active if the IEC 61850 stack did not
Error status succeed in some actions like reading IEC 61850
configuration, startup, for example
DNP3 DNP3 error DNP3 This signal will be active when DNP3 detects any
status configuration error during startup.
LMDERROR LON/Mip SLM301 LON network interface, MIP/DPS, is in an unrecoverable
Device Error error state.
status
APPERROR Runtime Runtime App This signal will be active if one or more of the application
Application Error threads are not in the state that Runtime Engine expects.
Error status The states can be CREATED, INITIALIZED, RUNNING, for
example
SETCHGD Settings Settings This signal will generate an Internal Event to the Internal
changed changed Event list if any settings are changed.
SETGRPCHGD Setting Settings This signal will generate an Internal Event to the Internal
groups changed Event list if any setting groups are changed.
changed
Table 1023:Self-supervision's hardware dependent internal signals

Card Name of signal Description Displayed on Reasons for activation
local HMI as
PSM PSM-Error Power PSM1 Activated if the module has a hardware error.
Supply
Module Error
status
BIM BIM-Error Binary In BIMn Activated if the module has a hardware error.
Module Error n = slot number
status
BOM BOM-Error Binary Out BOMn Activated if the module has a hardware error.
status
IOM IOM-Error In/Out IOMn Activated if the module has a hardware error.
status
MIM MIM-Error Millampere MIMn Activated if the module has a hardware error.
Input Module n = slot number
Error status
SOM SOM-Error Static Out SOMn Activated if the module has a hardware error.
status
NUM NUM-Error Numerical/C NUM30 Activated if the module has a hardware or
PU Module software error.
Error status
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Card Name of signal Description Displayed on Reasons for activation

local HMI as
ADM ADM-Error A/D Module ADM31 Activated if the module has a hardware error.
Error status
ADM ADM-Error A/D Module ADM32 Activated if the module has a hardware error.
Error status
OEM OEM-Error Optical OEM3nn Activated if the module has a hardware error.
Ethernet n = slot number
Module Error
status
LDCM LDCM-Error Line LDCM3nn Activated if the module has a hardware error.
Differential n = slot number
Communicati
on Module
Error status
TRM TRM-Error Transformer TRM40
Module Error
status
TRM TRM-Error Transformer TRM41
Module Error
status
When settings are changed in the IED, the protection and control applications restart in order to
take effect of the changes. During restart, internal events get generated and Runtime App error
will be displayed. These events are only indications and will be for short duration during the
restart.
IED will not be operational during applications restart.
21.5.5.2 Supervision of analog inputs M11401-136 v7
The analog signals to the A/D converter is internally distributed into two different converters, one
with low amplification and one with high amplification.
When the signal is within measurable limits on both channels, a direct comparison of the two A/D
converter channels can be performed. If the validation fails, the CPU will be informed and an alarm
will be given for A/D converter failure.
M11963-1 v5
Table 1024:Self supervision with internal event list

Data Value
Recording manner Continuous, event controlled
List size 40 events, first in-first out
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21.6 ChangeLock function CHNGLCK GUID-E8A1C33A-DD65-42B5-BA13-CFAE40C2C9AD v2
21.6.1 Functionality GUID-00784FC0-B39D-462D-854B-AAF62626DD0A v3
Change lock function CHNGLCK is used to block further changes to the IED configuration and
settings once the commissioning is complete. The purpose is to block inadvertent IED
configuration changes beyond a certain point in time.
The change lock function activation is normally connected to a binary input.
21.6.2 Function block GUID-15AA1D42-912E-4085-8166-33FDC327CEB5 v2
CHNGLCK
LOCK* ACTIVE
OVERRIDE
IEC09000946.vsd
Figure 659: CHNGLCK function block
21.6.3 Signals GUID-1B253577-C81B-40E3-B406-1F6586DCE545 v2
Table 1025:CHNGLCK Input signals

LOCK BOOLEAN 0 Activate change lock
Table 1026:CHNGLCK Output signals

ACTIVE BOOLEAN Change lock active
OVERRIDE BOOLEAN Change lock override
21.6.4 Operation principle GUID-74581AA2-6EB4-4CFA-92DA-90FB89F9A62C v3
The Change lock function (CHNGLCK) is configured using ACT.
The function, when activated, will still allow the following changes of the IED state that does not
involve reconfiguring of the IED:
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• Monitoring
• Reading events
• Resetting events
• Reading disturbance data
• Clear disturbances
• Reset LEDs
• Reset counters and other runtime component states
• Control operations
• Set system time
• Enter and exit from test mode
• Change of active setting group
The binary input signal LOCK controlling the function is defined in ACT or SMT:
Binary input Function

1 Activated
0 Deactivated
21.7 Denial of service DOS
21.7.1 Functionality GUID-407250CA-0076-41E1-AD2D-434077AC3F1D v4
The Denial of service functions (DOSFRNT, DOSLANAB and DOSLANCD) are designed to limit
overload on the IED produced by heavy Ethernet network traffic. The communication facilities
must not be allowed to compromise the primary functionality of the device. All inbound network
traffic will be quota controlled so that too heavy network loads can be controlled. Heavy network
load might for instance be the result of malfunctioning equipment connected to the network.
21.7.2 Function blocks GUID-A8F084A4-9AD2-41CE-995C-64F034D27FF6 v3
DOSFRNT
LINKUP
WARNING
ALARM
Figure 660: DOSFRNT function block
DOSLANAB
LINKUP
WARNING
ALARM
Figure 661: DOSLANAB function block
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DOSLANCD
LINKUP
WARNING
ALARM
Figure 662: DOSLANCD function block
21.7.3 Signals GUID-3C413A40-CC58-46D1-BE86-3A391D6C25D1 v1
Table 1027:DOSFRNT Output signals

LINKUP BOOLEAN Ethernet link status
WARNING BOOLEAN Frame rate is higher than normal state
ALARM BOOLEAN Frame rate is higher than throttle state
Table 1028:DOSLANAB Output signals

Table 1029:DOSLANCD Output signals

21.7.4 Settings GUID-2DD23D7A-007C-4819-8173-6C05399F9C6E v2
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Table DOSFRNT Monitored data

1030:
State INTEGER 0=Off - Frame rate control state
1=Normal
2=Throttle
3=DiscardLow
4=DiscardAll
5=StopPoll
Quota INTEGER - % Quota level in percent 0-100
Table 1031: DOSLANAB Monitored data

DoSStatus INTEGER 0=Off - Frame rate control state
1=Normal
2=Throttle
3=DiscardLow
4=DiscardAll
5=StopPoll
Table 1032:DOSLANCD Monitored data

DoSStatus INTEGER 0=Off - Frame rate control state
1=Normal
2=Throttle
3=DiscardLow
4=DiscardAll
5=StopPoll
21.7.6 Operation principle GUID-94340D4F-4D32-409B-BA1A-BA49A0C3F297 v4
The Denial of service functions (DOSFRNT, DOSLANAB and DOSLANCD) measures the IED load
from communication and, if necessary, limit it for not jeopardizing the IEDs control and protection
functionality due to high CPU load. The function has the following outputs:
• LINKUP indicates the Ethernet link status

• WARNING indicates that communication (frame rate) is higher than normal
• ALARM indicates that the IED limits communication
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Section 22 Basic IED functions
22.1 Time synchronization IP1750-1 v1
The time synchronization function is used to select a common source of absolute time for the
synchronization of the IED when it is a part of a protection system. This makes it possible to
compare events and disturbance data between all IEDs within a station automation system and in
between sub-stations.
Micro SCADA OPC server should not be used as a time synchronization source.
SEMOD55141-5 v5
There are two groups of parameter settings related to time:
• System time
• Synchronization
The System time group relates to setting the on/off and start/end of the Daylight Saving Time
(DST) for the local time zone in relation to Coordinated Universal Time (UTC). The Synchronization
group relates to selecting the coarse and fine synchronization sources. As well as defining the
synchronization master and accuracy levels specifically for IEC61850-9-2.
All the settings and parameters related to time are available via Local HMI under Main menu/
Configuration/Time/System time and via PCM600 under IED Configuration/Time.
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Table 1033:TIMESYNCHGEN Non group settings (basic)

CoarseSyncSrc Disabled - - Disabled Coarse time synchronization source
SPA
LON
SNTP
DNP
IEC103
FineSyncSource Disabled - - Disabled Fine time synchronization source
SPA
LON
BIN
GPS
GPS+SPA
GPS+LON
GPS+BIN
SNTP
GPS+SNTP
IRIG-B
GPS+IRIG-B
PPS
SyncMaster Disabled - - Disabled Activate IEDas synchronization master
SNTP-Server
TimeAdjustRate Slow - - Fast Adjust rate for time synchronization
Fast
HWSyncSrc Disabled - - Disabled Hardware time synchronization source
GPS
IRIG-B
PPS
AppSynch NoSynch - - NoSynch Time synchronization mode for application
Synch
SyncAccLevel Class T5 (1us) - - Unspecified Wanted time synchronization accuracy
Class T4 (4us)
Unspecified
Table BININPUT Non group settings (basic)

1034:
ModulePosition 3 - 16 - 1 3 Hardware position of IO module for time
synchronization
BinaryInput 1 - 16 - 1 1 Binary input number for time
synchronization
BinDetection PositiveEdge - - PositiveEdge Positive or negative edge detection
NegativeEdge
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Table 1035:SNTP Non group settings (basic)

ServerIP-Add 0 - 255 IP 1 0.0.0.0 Server IP-address
Address
RedServIP-Add 0 - 255 IP 1 0.0.0.0 Redundant server IP-address
Address
Table 1036:DSTENABLE Non group settings (basic)

DST Enable Disabled - - Enabled Enables or disables the use of Daylight
Enabled Saving Time
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Table 1037:DSTBEGIN Non group settings (basic)
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MonthInYear January - - March Month in year when daylight time starts
February
March
April
May
June
July
August
September
October
November
December
DayInWeek Sunday - - Sunday Day in week when daylight time starts
Monday
Tuesday
Wednesday
Thursday
Friday
Saturday
WeekInMonth Last - - Last Week in month when daylight time starts
First
Second
Third
Fourth
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UTCTimeOfDay -24:00 - - 1:00 UTC Time of day in hours when daylight
-23:30 time starts
-23:00
-22:30
-22:00
-21:30
-21:00
-20:30
-20:00
-19:30
-19:00
-18:30
-18:00
-17:30
-17:00
-16:30
-16:00
-15:30
-15:00
-14:30
-14:00
-13:30
-13:00
-12:30
-12:00
-11:30
-11:00
-10:30
-10:00
-9:30
-9:00
-8:30
-8:00
-7:30
-7:00
-6:30
-6:00
-5:30
-5:00
-4:30
-4:00
-3:30
-3:00
-2:30
-2:00
-1:30
-1:00
-00:30
00:00
00:30
1:00
1:30
2:00
2:30
3:00
3:30
4:00
4:30
5:00
5:30
6:00
6:30
7:00
7:30
8:00
8:30
9:00
9:30
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11:30
12:00
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Table 1038:DSTEND Non group settings (basic)
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MonthInYear January - - October Month in year when daylight time ends
February
March
April
May
June
July
August
September
October
November
December
DayInWeek Sunday - - Sunday Day in week when daylight time ends
Monday
Tuesday
Wednesday
Thursday
Friday
Saturday
WeekInMonth Last - - Last Week in month when daylight time ends
First
Second
Third
Fourth
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UTCTimeOfDay -24:00 - - 1:00 UTC Time of day in hours when daylight
-23:30 time ends
-23:00
-22:30
-22:00
-21:30
-21:00
-20:30
-20:00
-19:30
-19:00
-18:30
-18:00
-17:30
-17:00
-16:30
-16:00
-15:30
-15:00
-14:30
-14:00
-13:30
-13:00
-12:30
-12:00
-11:30
-11:00
-10:30
-10:00
-9:30
-9:00
-8:30
-8:00
-7:30
-7:00
-6:30
-6:00
-5:30
-5:00
-4:30
-4:00
-3:30
-3:00
-2:30
-2:00
-1:30
-1:00
-00:30
00:00
00:30
1:00
1:30
2:00
2:30
3:00
3:30
4:00
4:30
5:00
5:30
6:00
6:30
7:00
7:30
8:00
8:30
9:00
9:30
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Table 1039:TIMEZONE Non group settings (basic)

TimeZone -12:00 - - 1:00 Local time from UTC
-11:00
-10:00
-9:30
-9:00
-8:00
-7:00
-6:00
-5:00
-4:30
-4:00
-3:30
-3:00
-2:00
-1:00
0:00
1:00
2:00
3:00
3:30
4:00
4:30
5:00
5:30
5:45
6:00
6:30
7:00
8:00
8:45
9:00
9:30
10:00
10:30
11:00
11:30
12:00
12:45
13:00
14:00
Table IRIG-B Non group settings (basic)

1040:
SynchType BNC - - Opto Type of synchronization
Opto
TimeDomain LocalTime - - LocalTime Time domain
UTC
Encoding IRIG-B - - IRIG-B Type of encoding
1344
1344TZ
TimeZoneAs1344 MinusTZ - - PlusTZ Time zone as in 1344 standard
PlusTZ
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22.1.3.1 General concepts M11346-77 v1
Time definitions M11346-80 v3

The error of a clock is the difference between the actual time of the clock, and the time the clock is
intended to have. Clock accuracy indicates the increase in error, that is, the time gained or lost by
the clock. A disciplined clock knows its own faults and tries to compensate for them.
Design of the time system (clock synchronization) GUID-E2B9E81C-5733-4521-B27F-BF33E05CCFB0 v6

The time system is based on software and hardware clocks that run independently from each
other. See figure 663
External
Synchronization
sources Time tagging and general synchronisation
Off
Comm- Protection
LON Events
Time- unication and control
SPA Regulator functions
Min. pulse
(Setting,
GPS see
SW-time
technical
SNTP
reference
DNP manual) Connected when GPS-time is
IRIG-B used for differential protection
PPS
Synchronization for differential protection

(ECHO-mode or GPS)
Off Time-
GPS Regulator HW-time
(fast or slow)
IRIG-B
PPS Diff.-
A/D Trans-
converter comm- ducers*
unication
*IEC 61850-9-2
Figure 663: Design of the time system (clock synchronization)

All time tagging is performed by the software clock. When, for example, a status signal is changed
in the protection system of a function based on the free running hardware clock, the event is time
tagged by the software clock when it reaches the event recorder. The hardware clock can thus run
independently.
The echo mode of differential protection is based on the hardware clock. Thus, there is no need to
synchronize the hardware clock and the software clock.
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The synchronization of the hardware clock to the software clock is necessary only when GPS or
IRIG B 00X with optical fiber, IEEE 1344 is used for differential protection. The two clock systems
are synchronized by a special clock synchronization unit with two modes, fast and slow. A special
feature, an automatic fast clock time regulator is used. The automatic fast mode makes the
synchronization time as short as possible during pickup or at interruptions/disturbances in the
GPS timing. The fast and slow settings are also available on the local HMI.
The hardware and software clocks are synchronized also if a GPS clock is used.
Fast clock synchronization mode

At start-up and after interruptions in the GPS or IRIG B time signals, the deviation between the
GPS time and the internal differential time system can be substantial. A new start-up is also
required, for example, after maintenance of the auxiliary voltage system.
When the time difference is >16μs, the differential function is blocked and the time regulator for
the hardware clock automatically uses a fast mode to synchronize the clock systems. The time
adjustment is made with an exponential function, that is, with big time adjustment steps in the
beginning, and then smaller steps until a time deviation between the GPS time and the differential
time system of <16μs has been reached. The differential function is then enabled and the
synchronization remains in fast mode or switches to slow mode depending on the setting.
Slow clock synchronization mode

During normal service, a setting with slow synchronization mode is used. This prevents the
hardware clock to make too big time steps, >16µs, emanating from the differential protection
requirement of correct timing.
Synchronization principle M11346-83 v4

From a general point of view synchronization can be seen as a hierarchical structure. A function is
synchronized from a higher level and provides synchronization to lower levels.
Synchronization from
a higher level
Function
Optional synchronization of
modules at a lower level
Figure 664: Synchronization principle

A function is said to be synchronized when it periodically receives synchronization messages from
a higher level. As the level decreases, the accuracy of the synchronization decreases as well. A
function can have several potential sources of synchronization, with different maximum errors.
This gives the function the possibility to choose the source with the best quality, and to adjust its
internal clock based on this source. The maximum error of a clock can be defined as:
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• The maximum error of the last used synchronization message

• The time since the last used synchronization message
• The rate accuracy of the internal clock in the function.
22.1.3.2 Real-time clock (RTC) operation M11346-57 v2
The IED has a built-in real-time clock (RTC) with a resolution of one second. The clock has a built-in
calendar that handles leap years through 2038.
Real-time clock at power off M11346-60 v2

During power off, the system time in the IED is kept by a capacitor-backed real-time clock that will
provide 35 ppm accuracy for 5 days. This means that if the power is off, the time in the IED may
drift with 3 seconds per day, during 5 days, and after this time the time will be lost completely.
Real-time clock at startup M11346-63 v4
Time synchronization startup procedure M11346-66 v8

The first message that contains the full time (as for instance LON, SNTP and GPS) gives an
accurate time to the IED. After the initial setting of the clock, one of the three following conditions
happens with each of the coming synchronization messages configured as FineSynchSource:
• If the synchronization message, which is similar to the other messages, has an offset
compared to the internal time in the IED, the message is used directly for synchronization,
which means, for adjusting the internal clock to obtain zero offset at the next coming time
message.
• If the synchronization message has a large offset compared to the other messages, a spike-
filter in the IED removes this time-message.
• If the synchronization message has a large offset and the following message also has a large
offset, the spike filter does not act and the offset in the synchronization message is
compared to a threshold that defaults to 500 milliseconds. If the offset is more than the
threshold, the clock jumps a whole number of seconds so the remaining offset is less than
500ms. The remaining offset is then slowly adjusted with 1000 ppm until the offset is
removed. With an adjustment of 1000ppm it takes 500 seconds to remove an offset of 500
milliseconds.
Synchronization messages configured as coarse are only used for initial setting of the time. After
this has been done, the messages are checked against the internal time and only an offset of more
than 10 seconds resets the time.
Rate accuracy M11346-93 v4

The Rate accuracy is the accuracy of the internal clock while the external time signal is lost (e.g.
GPS lost). In the IED, the rate accuracy at cold start is 100 ppm but if the IED is synchronized for a
while, the rate accuracy is approximately 1 ppm if the surrounding temperature is constant. It can
take up to one hour after a cold start of the IED to reach to a stable rate due to the normal
warming-up procedure of the IED.
Time-out on synchronization sources M11346-96 v3

All synchronization interfaces have a time-out, and a configured interface must receive time
synchronization messages regularly in order not to give an error signal (TSYNCERR) that is
reported from the INTERRSIG function block. The time-out is such that one message can be lost
without getting a TSYNCERR, but if more than one message is lost, a TSYNCERR is given.
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22.1.3.3 Synchronization alternatives M11346-3 v7
Four main alternatives of external synchronization sources are available. The synchronization
message is applied:
• via any of the communication ports of the IED as a telegram message including date and time
• as a minute pulse connected to a binary input
• via GPS
• via IRIG-B or PPS
Synchronization via SNTP M11346-33 v6

SNTP provides a ping-pong method of synchronization. A message is sent from an IED to an SNTP
server, and the SNTP server returns the message after filling in a reception time and a
transmission time. SNTP operates via the normal Ethernet network that connects IEDs together in
an IEC 61850 network. For SNTP to operate properly, there must be an SNTP server present,
preferably in the same station. The SNTP synchronization provides an accuracy that gives +/- 1 ms
accuracy for binary inputs. The IED itself can be set as an SNTP-time server.
SNTP provides complete time-information and can be used as both fine and coarse time synch
source. However SNTP shall normally be used as fine synch only. The only reason to use SNTP as
coarse synch is in combination with PPS as fine source. The combination SNTP as both fine and
coarse source shall not be used.
SNTP server requirements GUID-588FCD12-C494-445E-8488-8287B34EFD9A v4

The SNTP server to be used is connected to the local network, that is not more than 4-5 switches
or routers away from the IED. The SNTP server is dedicated for its task, or at least equipped with a
real-time operating system, that is not a PC with SNTP server software. The SNTP server should be
stable, that is, either synchronized from a stable source like GPS, or local without synchronization.
Using a local SNTP server without synchronization as primary or secondary server in a redundant
configuration is not recommended.
Synchronization via Serial Communication Module (SLM) M11346-50 v6

On the serial buses (both LON and SPA) two types of synchronization messages are sent.
• Coarse message is sent every minute and comprises complete date and time, that is, year,
month, day, hours, minutes, seconds and milliseconds.
• Fine message is sent every second and comprises only seconds and milliseconds.
The SLM module is located on the Numeric processing module (NUM).
Synchronization via Built-in-GPS M11346-39 v5

The built-in GPS clock modules receive and decode time information from the global positioning
system. The modules are located on the GPS time synchronization Module (GTM).
Synchronization via binary input M11346-42 v6

The IED accepts minute pulses to a binary input. These minute pulses can be generated from, for
example station master clock. If the station master clock is not synchronized from a world wide
source, time will be a relative time valid for the substation. Both positive and negative edge on the
signal can be accepted. This signal is also considered as a fine time synchronization signal.
The minute pulse is connected to any channel on any Binary Input Module in the IED. The electrical
characteristic is thereby the same as for any other binary input.
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If the objective of synchronization is to achieve a relative time within the substation and if no
station master clock with minute pulse output is available, a simple minute pulse generator can be
designed and used for synchronization of the IEDs. The minute pulse generator can be created
using the logical elements and timers available in the IED.
The definition of a minute pulse is that it occurs one minute after the last pulse. As only the flanks
are detected, the flank of the minute pulse shall occur one minute after the last flank.
Binary minute pulses are checked with reference to frequency.
Pulse data:
• Period time (a) should be 60 seconds.

• Pulse length (b):
• Minimum pulse length should be >50 ms.
• Maximum pulse length is optional.
• Magnitude (c) - please refer to section "Binary input module (BIM)".
Deviations in the period time (a) larger than 50 ms will cause TSYNCERR.
en05000251.vsd
Figure 665: Binary minute pulses

The default time-out-time for a minute pulse is two minutes, and if no valid minute pulse is
received within two minutes a SYNCERR will be given.
If contact bounce occurs, only the first pulse will be detected as a minute pulse. The next minute
pulse will be registered first 60 s - 50 ms after the last contact bounce.
If the minute pulses are perfect, for example, it is exactly 60 seconds between the pulses, contact
bounces might occur 49 ms after the actual minute pulse without effecting the system. If contact
bounce occurs more than 50 ms, for example, it is less than 59950 ms between the two most
adjacent positive (or negative) flanks, the minute pulse will not be accepted.
Binary synchronization example M11346-74 v5

An IED is configured to use only binary input for time synchronization, and a valid binary input is
applied to a binary input card. The HMI is used to tell the IED the approximate time, and the
minute pulse is then used to synchronize the IED. Minute pulse means that each pulse occurs one
minute after the previous pulse, so the first pulse is not used at all. The second pulse will probably
be rejected due to the spike filter. The third pulse will give the IED a good time, and will reset the
time so that the fourth pulse will occur on a minute border. After the first three minutes, the time
in the IED will be good if the coarse time is set properly via the HMI or if the RTC backup still keeps
the time since last up-time. If the minute pulse is removed, for example, for an hour, the internal
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time will drift by maximum the error rate in the internal clock. If the minute pulse is returned, the
first pulse is automatically rejected. The second pulse will possibly be rejected due to the spike
filter. The third pulse will set the time if the time offset is more than 500 ms or adjust the time if
the time offset is small enough. If the time is set, the application will be brought to a safe state
before the time is set. If the time is adjusted, the time will reach its destination within one minute.
Synchronization via IRIG-B module M11346-146 v8

IRIG-B is a protocol used only for time synchronization. A clock can provide local time of the year in
this format. The “B” in IRIG-B states that 100 bits per second are transmitted and the message is
sent every second. After IRIG-B there are numbers stating if and how the signal is modulated and
the information transmitted.
To receive IRIG-B there are two connectors in the IRIG-B module, one galvanic BNC connector and
one optical ST connector. IRIG-B 12x messages can be supplied via the galvanic interface, and IRIG-
B 00x messages can be supplied via either the galvanic interface or the optical interface, where x
(in 00x or 12x) means a number in the range of 0-7.
“00” means that a base band is used, and the information can be fed into the IRIG-B module via the
BNC contact or an optical fiber. “12” means that a 1 kHz modulation is used. In this case the
information must go into the module via the BNC connector.
If the x in 00x or 12x is 4, 5, 6 or 7, the time message from IRIG-B contains information of the year.
If the x is 0, 1, 2 or 3, the information contains only the time within the year, and year information
has to be set via PCM600 or local HMI.
The IRIG-B module also takes care of IEEE1344 messages that are sent by IRIG-B clocks, as IRIG-B
previously did not have any year information. IEEE1344 is compatible with IRIG-B and contains year
information and information of the time-zone.
22.1.3.4 Process bus IEC 61850-9-2LE synchronization GUID-6E384BDB-5598-4108-99B4-0B4A4E1828B2 v3
When process bus communication (IEC 61850-9-2LE protocol) is used, it is essential that the
merging units are using the same time source as the IED. To achieve this, a satellite-controlled
clock shall provide time synchronization to the IED (either internal GPS or via IRIG-B 00x with
IEEE1344 support) and to the merging units (via for instance PPS). For the time synchronization of
the process bus communication, GPS Time Module (GTM) and/or IRIG-B module can be used. If the
IED contains a GTM, the merging unit can be synchronized from the PPS output of the GTM.
M12331-1 v7
Table 1041:Time synchronization, time tagging

Function Value
Time tagging resolution, events and sampled measurement values 1 ms
Time tagging error with synchronization once/min (minute pulse synchronization), ± 1.0 ms typically
events and sampled measurement values
Time tagging error with SNTP synchronization, sampled measurement values ± 1.0 ms typically
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22.2 Parameter setting groups IP1745-1 v1
Use the six different groups of settings to optimize the IED operation for different power system
conditions. Creating and switching between fine-tuned setting sets, either from the local HMI or
configurable binary inputs, results in a highly adaptable IED that can be applied to a variety of
power system scenarios.
M12010-3 v3
ActiveGroup
ACTGRP1 GRP1
ACTGRP2 GRP2
ACTGRP3 GRP3
ACTGRP4 GRP4
ACTGRP5 GRP5
ACTGRP6 GRP6
GRP_CHGD
Figure 666: ActiveGroup function block
22.2.3 Signals IP14073-1 v2
Table 1042:ACTVGRP Input signals

ACTGRP1 BOOLEAN 0 Selects setting group 1 as active
Table ACTVGRP Output signals

1043:
GRP1 BOOLEAN Setting group 1 is active
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GRP_CHGD BOOLEAN Pulse when setting changed
REMSETEN BOOLEAN Settings over IEC 61850 enabled
22.2.4 Settings IP11026-1 v2
Table SETGRPS Non group settings (basic)

1044:
ActiveSetGrp SettingGroup1 - - SettingGroup1 Active setting group
SettingGroup2
SettingGroup3
SettingGroup4
SettingGroup5
SettingGroup6
MaxNoSetGrp 1-6 - 1 1 Max number of setting groups 1-6
M12008-8 v10
Parameter setting groups ActiveGroup function has six functional inputs, each corresponding to
one of the setting groups stored in the IED. Activation of any of these inputs changes the active
setting group. Eight functional output signals are available for configuration purposes, so that
information on the active setting group is always available.
A setting group is selected by using the local HMI, from a front connected personal computer,
remotely from the station control or station monitoring system or by activating the corresponding
input to the ActiveGroup function block.
Each input of the function block can be configured to connect to any of the binary inputs in the
IED. To do this PCM600 must be used.
The external control signals are used for activating a suitable setting group when adaptive
functionality is necessary. Input signals that should activate setting groups must be either
permanent or a pulse exceeding 400 ms.
More than one input may be activated at the same time. In such cases the lower order setting
group has priority. This means that if for example both group four and group two are set to be
activated, group two will be the one activated.
Every time a setting is changed, the output signal GRP_CHGD is sending a pulse. Activating or
deactivating test mode is made by changing a parameter, consequently this will also cause a pulse
on the GRP_CHGD output.
The parameter MaxNoSetGrp defines the maximum number of setting groups in use to switch
between.
The output REMSETEN indicates whether setting changes over IEC61850 are enabled or not. Per
default, this is not enabled, which results in REMSETEN being at a logical low level. If setting
changes via IEC61850 are enabled, then REMSETEN will be a logical high. The setting changes over
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IEC61850 is enabled with the setting EnableSettings in the IEC61850-8-1 configuration under Main
menu/Configuration/Communication/Station communication/IEC61850-8-1/IEC61850-8-1.
Please refer to documentation for IEC61850 for further details.
Switching can only be done within that number of groups. The number of setting groups selected
to be used will be filtered so only the setting groups used will be shown on the Parameter Setting
Tool.
ACTIVATE GROUP 6
ACTIVATE GROUP 5
ACTIVATE GROUP 4
ACTIVATE GROUP 3
ACTIVATE GROUP 2
+RL2 ACTIVATE GROUP 1
IOx-Bly1 ActiveGroup
Æ ACTGRP1 GRP1
IOx-Bly2
Æ ACTGRP2 GRP2
IOx-Bly3
Æ ACTGRP3 GRP3
IOx-Bly4
Æ ACTGRP4 GRP4
IOx-Bly5
Æ ACTGRP5 GRP5
IOx-Bly6 ACTGRP6
Æ GRP6
GRP_CHGD
Figure 667: Connection of the function to external circuits

The above example also includes seven output signals, for confirmation of which group that is
active.
22.3 Test mode functionality TEST IP1647-1 v2
When entering IED test mode there is an option to block all functions. Active test mode is
indicated by a flashing yellow Pickup LED on the LHMI. After that, it is possible to unblock
arbitrarily selected functions from the LHMI to perform required tests.
When leaving TESTMODE, all blockings are removed (except for functions that have their block
input active), and the IED resumes normal operation. However, if during TESTMODE operation,
power is removed and later restored, the IED will remain in TESTMODE with the same protection
functions blocked or unblocked as before the power was removed. All testing will be done with
actually set and configured values within the IED. No settings will be changed, thus mistakes are
avoided.
Forcing of binary input and output signals is only possible when the IED is in IED test mode.
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TESTMODE
IED_TEST TEST
IED_TEST
BLOCK
NOEVENT
INPUT
SETTING
IEC61850
Figure 668: TESTMODE function block
22.3.3 Signals IP9680-1 v2
Table TESTMODE Input signals

1045:
IED_TEST BOOLEAN 0 Activate IED test mode
Table TESTMODE Output signals

1046:
TEST BOOLEAN In test via IED TEST or via LD0 Mode
IED_TEST BOOLEAN IED test mode is active
BLOCK BOOLEAN Active when LD0 is blocked or test blocked
NOEVENT BOOLEAN Event disabled during test mode
INPUT BOOLEAN IED TEST input is active
SETTING BOOLEAN IED test mode setting is On
IEC61850 BOOLEAN Active when LD0 Mode is in Blocked, Test or Test blocked
22.3.4 Settings IP11343-1 v2
Table 1047:TESTMODE Non group settings (basic)

IEDTestMode Disabled - - Disabled Activate IED Test mode
Enabled
EventDisable Disabled - - Disabled Event disable during test mode
Enabled
BlockAllFunc Disabled - - Enabled Block all functions when entering IED test
Enabled mode
CmdTestEd1 Disabled - - Disabled Require test bit in command at test mode
Enabled (only for IEC61850 Ed1)
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M12015-4 v10
Set the IED in test mode by
• configuration, activating the input SIGNAL on the function block TESTMODE.

• setting TestMode to Enabled in the local HMI, under Main menu/TEST/IED test mode.
While the IED is in test mode, the output ACTIVE of the function block TESTMODE is activated. The
other outputs of the function block TESTMODE shows the cause of the "Test mode: Enabled" state
— input from configuration (OUTPUT signal is activated) or setting from local HMI (SETTING signal
is activated).
While the IED is in test mode, the yellow Pickup LED will flash and all functions can be blocked
depending on the configuration of the testmode component. Any function can be unblocked
individually regarding functionality and event signalling.
M11828-3 v7
The functions will be blocked next time if the testmode component is configured to block
components upon puting the IED into testmode.
The blocking of a function concerns all output signals from the actual function, so no outputs will
be activated.
If the IED is restarted while set to IED testmode by a binary input all functions will
be temporarily unblocked during startup, which might cause unwanted operations.
The TESTMODE function block might be used to automatically block functions when a test handle
is inserted in a test switch. A contact in the test switch (RTXP24 contact 29-30) or an FT switch
finger can supply a binary input which in turn is configured to the TESTMODE function block.
Each of the functions includes the blocking from the TESTMODE function block.
The functions can also be blocked from sending events over IEC 61850 station bus to prevent
filling station and SCADA databases with test events, for example during a commissioning or
maintenance test.
22.4 IED identifiers IP15060-1 v1
IED identifiers (TERMINALID) function allows the user to identify the individual IED in the system,
not only in the substation, but in a whole region or a country.
Use only characters A-Z, a-z and 0-9 in station, object and unit names.
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22.4.2 Settings GUID-3C49A222-FFE4-492B-A96C-9E9965FA2CB4 v2
Table TERMINALID Non group settings (basic)

1048:
StationName 0 - 18 - 1 Station name Station name
StationNumber 0 - 99999 - 1 0 Station number
ObjectName 0 - 18 - 1 Object name Object name
ObjectNumber 0 - 99999 - 1 0 Object number
UnitName 0 - 18 - 1 Unit name Unit name
UnitNumber 0 - 99999 - 1 0 Unit number
IEDMainFunType 0 - 255 - 1 0 IED main function type for IEC60870-5-103
TechnicalKey 0 - 16 - 1 AA0B0Q0A0 Technical key (part 1)
0 - 16 - 1 Technical key (part 2)
22.5 Product information GUID-F67243CA-2429-4118-BBFF-3D62BF55E080 v1
22.5.1 Functionality GUID-D78786E6-C34A-4E63-9D1E-0582C8F1F7E1 v6
The Product identifiers function contains constant data (i.e. not possible to change) that uniquely
identifies the IED:
• ProductVer
• ProductDef
• FirmwareVer
• SerialNo
• OrderingNo
• ProductionDate
• IEDProdType
The settings are visible on the local HMI , under Main menu/Diagnostics/IED status/Product
identifiersand underMain menu/Diagnostics/IED Status/IED identifiers
This information is very helpful when interacting with ABB product support (e.g. during repair and
maintenance).
22.5.2 Settings GUID-168CD792-8811-43B5-8760-74ED82DE17F7 v4
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22.5.3 Factory defined settings M11789-39 v10
The factory defined settings are very useful for identifying a specific version and very helpful in the
case of maintenance, repair, interchanging IEDs between different Substation Automation
Systems and upgrading. The factory made settings can not be changed by the customer. They can
only be viewed. The settings are found in the local HMI under Main menu/Diagnostics/IED status/
Product identifiers
The following identifiers are available:
• IEDProdType
• Describes the type of the IED. Example: REL670
• ProductDef
• Describes the release number from the production. Example: 2.1.0
• FirmwareVer
• Describes the firmware version.
• The firmware version can be checked from Main menu/Diagnostics/IED status/Product
identifiers
• Firmware version numbers run independently from the release production numbers. For
every release number there can be one or more firmware versions depending on the
small issues corrected in between releases.
• ProductVer
• Describes the product version. Example: 2.1.0
1 is the Major version of the manufactured product this means, new platform of the product
2 is the Minor version of the manufactured product this means, new functions or new hardware
added to the product
3 is the Major revision of the manufactured product this means, functions or hardware is either
changed or enhanced in the product
• IEDMainFunType
• Main function type code according to IEC 60870-5-103. Example: 128 (meaning line
protection).
• SerialNo
• OrderingNo
• ProductionDate
22.6 Signal matrix for binary inputs SMBI SEMOD55793-1 v2
The Signal matrix for binary inputs (SMBI) function is used within the Application Configuration
Tool (ACT) in direct relation with the Signal Matrix Tool (SMT), see the application manual to get
information about how binary inputs are brought in for one IED configuration.
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SMBI
^VIN1 ^BI1
^VIN2 ^BI2
^VIN3 ^BI3
^VIN4 ^BI4
^VIN5 ^BI5
^VIN6 ^BI6
^VIN7 ^BI7
^VIN8 ^BI8
^VIN9 ^BI9
^VIN10 ^BI10
Figure 669: SMBI function block
Table SMBI Input signals

1049:
BI1 BOOLEAN 0 SMT Connect input
Table SMBI Output signals

1050:
BI1 BOOLEAN Binary input 1
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The Signal matrix for binary inputs (SMBI) function , see figure 669, receives its inputs from the
real (hardware) binary inputs via the Signal Matrix Tool (SMT), and makes them available to the
rest of the configuration via its outputs, BI1 to BI10. The inputs and outputs, as well as the whole
block, can be given a user defined name. These names will be represented in SMT as information
which signals shall be connected between physical IO and SMBI function. The input/output user
defined name will also appear on the respective output/input signal.
22.7 Signal matrix for binary outputs SMBO SEMOD55215-1 v2
The Signal matrix for binary outputs (SMBO) function is used within the Application Configuration
Tool (ACT) in direct relation with the Signal Matrix Tool (SMT), see the application manual to get
information about how binary inputs are sent from one IED configuration.
SMBO
BO1 ^BO1
BO2 ^BO2
BO3 ^BO3
BO4 ^BO4
BO5 ^BO5
BO6 ^BO6
BO7 ^BO7
BO8 ^BO8
BO9 ^BO9
BO10 ^BO10
Figure 670: SMBO function block
Table 1051: SMBO Input signals

BO1 BOOLEAN 0 Signal name for BO1 in Signal Matrix Tool
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The Signal matrix for binary outputs (SMBO) function , see figure 670, receives logical signal from
the IED configuration, which is transferring to the real (hardware) outputs, via the Signal Matrix
Tool (SMT). The inputs in SMBO are BO1 to BO10 and they, as well as the whole function block, can
be tag-named. The name tags will appear in SMT as information which signals shall be connected
between physical IO and the SMBO.
22.8 Signal matrix for mA inputs SMMI SEMOD55233-1 v2
The Signal matrix for mA inputs (SMMI) function is used within the Application Configuration Tool
(ACT) in direct relation with the Signal Matrix Tool (SMT). See the Application Manual for
information about how milliamp (mA) inputs from external transducers are physically connected
to the MIM board inputs used in an IED. Via the SMMI, the signals are brought into the IED
configuration, for example, to the input for ambient temperature compensation of the thermal
overload function when there is a need for ambient temperature compensation in the thermal
function.
SMMI
ÂI1 ÂI1
ÂI2 ÂI2
ÂI3 ÂI3
ÂI4 ÂI4
ÂI5 ÂI5
ÂI6 ÂI6
IEC05000440.vsd
Figure 671: SMMI function block
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Table 1052:SMMI Input signals

AI1 REAL 0 SMT connected milliampere input
Table 1053:SMMI Output signals

AI1 REAL Analog milliampere input 1
The Signal matrix for mA inputs (SMMI) function, see figure 671, receives its inputs from the real
(hardware) mA inputs (the MIM boards) via the Signal Matrix Tool (SMT), and makes them available
to the rest of the configuration via its analog outputs, named AI1 to AI6. The inputs, outputs, as
well as the whole block, can be given user-defined names which will be represented in SMT and
ACT.
The outputs on SMMI can also be connected to the IEC61850 generic communication I/O functions
(MVGAPC) for further use of the mA signals elsewhere in a substation system.
22.9 Signal matrix for analog inputs SMAI SEMOD55751-1 v2
Signal matrix for analog inputs (SMAI), also known as the preprocessor function block, analyses
the connected four analog signals (three phases and neutral) and calculates all relevant
information from them like the phasor magnitude, phase angle, frequency, true RMS value,
harmonics, sequence components and so on. This information is then used by the respective
functions connected to this SMAI block in ACT (for example protection, measurement or
monitoring functions).
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SEMOD54868-4 v10
SMAI1
BLOCK SPFCOUT
DFTSPFC G1AI3P
REVROT G1AI1
^GRP1_A G1AI2
^GRP1_B G1AI3
^GRP1_C G1AI4
^GRP1_N G1N
Figure 672: SMAI1 function block

Figure 672 is an example of SMAI1:n in each of the three task time groups 1, 2 or 3 where:
• n=1–12 in task group 1

The task time defines the execution repetition rate, and is 1, 3 or 8 ms respectively for the three
task time groups.
SEMOD54997-4 v9
SMAI2
BLOCK G2AI3P
REVROT G2AI1
^GRP2_A G2AI2
^GRP2_B G2AI3
^GRP2_C G2AI4
^GRP2_N G2N
Figure 673: SMAI2 function block

Figure 673 is an example of SMAI2:n to SMAI12:m in each of the three task time groups 1, 2 or 3
where:
• n=2 and m=12 in task group 1

The task time defines the execution repetition rate, and is 3, 8 or 1 ms respectively for the three
task time groups.
Table SMAI1 Input signals

1054:
BLOCK BOOLEAN 0 Block group 1
DFTSPFC REAL 20.0 Number of samples per fundamental cycle used for DFT
calculation
REVROT BOOLEAN 0 Reverse rotation group 1
GRP1_A STRING - First analog input used for phase A or AB quantity
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GRP1_B STRING - Second analog input used for phase B or BC quantity
GRP1_C STRING - Third analog input used for phase C or CA quantity
GRP1_N STRING - Fourth analog input used for residual or neutral quantity
Table 1055:SMAI1 Output signals

SPFCOUT REAL Number of samples per fundamental cycle from internal DFT
reference function
G1AI3P GROUP SIGNAL Group 1 analog input 3-phase group
G1AI1 GROUP SIGNAL Group 1 analog input 1
G1N GROUP SIGNAL Group parameter for residual sample
Table SMAI2 Input signals

1056:
BLOCK BOOLEAN 0 Block group 2
REVROT BOOLEAN 0 Reverse rotation group 2
GRP2_A STRING - First analog input used for phase A or AB quantity
GRP2_B STRING - Second analog input used for phase B or BC quantity
GRP2_C STRING - Third analog input used for phase C or CA quantity
GRP2_N STRING - Fourth analog input used for residual or neutral quantity
Table 1057:SMAI2 Output signals

G2AI3P GROUP SIGNAL Group 2 analog input 3-phase group
G2N GROUP SIGNAL Group parameter for residual sample
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SEMOD130357-4 v3
Settings DFTRefExtOut and DFTReference shall be set to default value

InternalDFTRef if no VT inputs are available. Internal nominal frequency DFT
reference is then the reference.
Table SMAI1 Non group settings (basic)

1058:
groups
DFTRefExtOut InternalDFTRef - - InternalDFTRef DFT reference for external output
DFTRefGrp1
DFTRefGrp2
DFTRefGrp3
DFTRefGrp4
DFTRefGrp5
DFTRefGrp6
DFTRefGrp7
DFTRefGrp8
DFTRefGrp9
DFTRefGrp10
DFTRefGrp11
DFTRefGrp12
External DFT ref
DFTReference InternalDFTRef - - InternalDFTRef DFT reference
DFTRefGrp1
DFTRefGrp2
DFTRefGrp3
DFTRefGrp4
DFTRefGrp5
DFTRefGrp6
DFTRefGrp7
DFTRefGrp8
DFTRefGrp9
DFTRefGrp10
DFTRefGrp11
DFTRefGrp12
External DFT ref
ConnectionType Ph-N - - Ph-N Input connection type
Ph-Ph
AnalogInputType Voltage - - Voltage Analog input signal type
Current
Table SMAI1 Non group settings (advanced)

1059:
Negation Disabled - - Disabled Negation
NegateN
Negate3Ph
Negate3Ph+N
MinValFreqMeas 5 - 200 % 1 10 Limit for frequency calculation in % of
VBase
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Table SMAI2 Non group settings (basic)

1060:
groups
DFTRefGrp1
DFTRefGrp2
DFTRefGrp3
DFTRefGrp4
DFTRefGrp5
DFTRefGrp6
DFTRefGrp7
DFTRefGrp8
DFTRefGrp9
DFTRefGrp10
DFTRefGrp11
DFTRefGrp12
External DFT ref
ConnectionType Ph-N - - Ph-N Input connection type
Ph-Ph
AnalogInputType Voltage - - Voltage Analog input signal type
Current
Table 1061:SMAI2 Non group settings (advanced)

Negation Disabled - - Disabled Negation
NegateN
Negate3Ph
Negate3Ph+N
MinValFreqMeas 5 - 200 % 1 10 Limit for frequency calculation in % of
VBase
Every Signal matrix for analog inputs function (SMAI) can receive four analog signals (three phases
and one neutral or residual value), either voltage or current, see figure 672 and figure 673. SMAI
outputs give information about every aspect of the 3ph analog signals acquired (phase angle, RMS
value, frequency and frequency derivates etc. – 244 values in total). The BLOCK input will force all
outputs to value zero if BLOCK is TRUE (1). However, when the disturbance recorder is connected
to the single-phase outputs of SMAI, the sample data to the disturbance recorder will not be
blocked. The disturbance recorder bypasses SMAI to the sample data channels.
System phase rotation and frequency are defined using the PhaseRotation and Frequency settings
in the primary system values PRIMVAL function. Logic 1 in the REVROT input to the SMAI function
means that the phase rotation is changed relative to the set PhaseRotation in PRIMVAL.
The output signal AI1 to AI4 are direct output of the, in SMT, connected input to GRPx_A, GRPxB,
GRPxC and GRPx_N, x=1-12. AIN is always calculated residual sum from the first three inputs. A3P is
grouped, three-phase information containing all relevant information about four connected
inputs. Note that all other functions, with a few exceptions, use this output in configuration. Note
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that the SMAI function will always calculate the residual sum of current/voltage if the input GRPxN
is not connected in SMT. Applications with a few exceptions shall always be connected to AI3P.
22.9.5.1 Frequency values GUID-B494B93C-B5AA-4FD6-8080-8611C34C2AD8 v5
The SMAI function includes a functionality based on the level of positive sequence voltage,
MinValFreqMeas, to validate if the frequency measurement is valid or not. If the positive sequence
voltage is lower than MinValFreqMeas, the function freezes the frequency output value for 500 ms
and after that the frequency output is set to the nominal value. A signal is available for the SMAI
function to prevent operation due to non-valid frequency values. MinValFreqMeas is set as % of
VBase/√3
If SMAI setting ConnectionType is Ph-Ph, at least two of the inputs GRPx_A, GRPx_B and GRPx_C,
where 1≤x≤12, must be connected in order to calculate the positive sequence voltage. Note that
phase to phase inputs shall always be connected as follows: A-B to GRPxA, B-C to GRPxB, C-A to
GRPxC. If SMAI setting ConnectionType is Ph-N, all three inputs GRPx_A, GRPx_B and GRPx_C must
be connected in order to calculate the positive sequence voltage.
If only one phase-phase voltage is available and SMAI setting ConnectionType is Ph-Ph, the user is
advised to connect two (not three) of the inputs GRPx_A, GRPx_B and GRPx_C to the same voltage
input as shown in figure 674 to make SMAI calculate a positive sequence voltage.
SMAI1
BLOCK SPFCOUT SAPTOF
DFTSPFC G1AI3P V3P* TRIP SAPTOF(1)_TRIP
VAB BLOCK PICK UP
REVROT G1AI1
PHASEA G1AI2 BLKTRIP BLKDMAGN
^GRP1_A G1AI4 FREQ
TRM_40.CH7(U) PHASEB
G1N
^GRP1_B
PHASEC
^GRP1_C
NEUTRAL
^GRP1_N
Figure 674: Connection example
The above described scenario does not work if SMAI setting ConnectionType is Ph-
N. If only one phase-ground voltage is available, the same type of connection can
be used but the SMAI ConnectionType setting must still be Ph-Ph and this has to be
accounted for when setting MinValFreqMeas. If SMAI setting ConnectionType is Ph-
N and the same voltage is connected to all three SMAI inputs, the positive
sequence voltage will be zero and the frequency functions will not work properly.
The outputs from the above configured SMAI block shall only be used for
Overfrequency protection (SAPTOF, 81), Underfrequency protection (SAPTUF, 81)
and Rate-of-change frequency protection (SAPFRC, 81) due to that all other
information except frequency and positive sequence voltage might be wrongly
calculated.
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22.10 Summation block 3 phase 3PHSUM SEMOD55968-1 v2
Summation block 3 phase function 3PHSUM is used to get the sum of two sets of three-phase
analog signals (of the same type) for those IED functions that might need it.
3PHSUM
BLOCK SPFCOUT
BLKGR1 AI3P
BLKGR2 AI1
REVROT AI2
^G1AI3P* AI3
^G2AI3P* AI4
Figure 675: 3PHSUM function block
Table 1062:3PHSUM Input signals

BLOCK BOOLEAN 0 Block
BLKGR1 BOOLEAN 0 Block input for group 1
BLKGR2 BOOLEAN 0 Block input for group 2
REVROT BOOLEAN 0 Reverse rotation
G1AI3P GROUP - Group 1 three phase analog input from first SMAI
SIGNAL
G2AI3P GROUP - Group 2 three phase analog input from second SMAI
SIGNAL
Table 1063:3PHSUM Output signals

SPFCOUT REAL Number of samples per fundamental cycle from internal DFT
reference function
AI3P GROUP SIGNAL Linear combination of two connected three phase inputs
AI1 GROUP SIGNAL Linear combination of input 1 signals from both SMAI blocks
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SEMOD130361-4 v2
Settings DFTRefExtOut and DFTReference shall be set to default value

InternalDFTRef if no VT inputs are available.
Table 3PHSUM Non group settings (basic)

1064:
groups
SummationType Group1+Group2 - - Group1+Group2 Summation type
Group1-Group2
Group2-Group1
-(Group1+Group2)
DFTRefGrp1
External DFT ref
DFTRefExtOut InternalDFTRef - - InternalDFTRef DFT reference for external output
DFTRefGrp1
External DFT ref
Table 3PHSUM Non group settings (advanced)

1065:
FreqMeasMinVal 5 - 200 % 1 10 Amplitude limit for frequency calculation in
% of UBase
Summation block 3 phase 3PHSUM receives the three-phase signals from Signal matrix for analog
inputs function (SMAI). The BLOCK input will reset all the outputs of the function to 0.
22.11 Global base values GBASVAL GUID-2FDB0A2C-10FE-4954-B6E4-9DA2EEEF1668 v1
GUID-0D5405BE-E669-44C8-A208-3A4C86D39115 v3

Global base values GBASVAL - -
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22.11.2 Functionality GUID-D58ECA9A-9771-443D-BF84-8EF582A346BF v4
Global base values function (GBASVAL) is used to provide global values, common for all applicable
functions within the IED. One set of global values consists of values for current, voltage and
apparent power and it is possible to have twelve different sets.
This is an advantage since all applicable functions in the IED use a single source of base values.
This facilitates consistency throughout the IED and also facilitates a single point for updating
values when necessary.
Each applicable function in the IED has a parameter, GlobalBaseSel, defining one out of the twelve
sets of GBASVAL functions.
22.11.3 Settings GUID-C73A66FB-5D6E-4DC3-B8B5-046AEC2F1FDE v1
Table GBASVAL Non group settings (basic)

1066:
VBase 0.05 - 2000.00 kV 0.05 400.00 Global base voltage
IBase 1 - 99999 A 1 3000 Global base current
SBase 1.00 - 200000.00 MVA 0.05 2000.00 Global base apparent power
22.12 Primary system values PRIMVAL
GUID-B8B3535D-227B-4151-9E98-BEB85F4D54DE v1

Primary system values PRIMVAL - -
The rated system frequency and phase rotation direction are set under Main menu/
Configuration/ Power system/ Primary Values in the local HMI and PCM600 parameter setting
tree.
22.12.3 Settings
Table 1067:PRIMVAL Non group settings (basic)

Frequency 50.0 - 60.0 Hz 10.0 50.0 Rated system frequency
PhaseRotation Normal=ABC - - Normal=ABC System phase rotation
Inverse=ACB
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Section 23 IED hardware
23.1 Overview IP14270-1 v1
23.1.1 Variants of case size with local HMI display M15024-3 v5
ANSI04000458-2-en.psd
Figure 676: 1/2 19” case with local HMI display.
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ANSI05000762-2-en.psd
ANSI04000460 -2-en.psd
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23.1.2 Case from the rear side IP16286-1 v1
M16105-3 v7
Table Designations for 1/2 x 19” casing with 1 TRM slot

1068:
Module Rear Positions

PSM X11
BIM, BOM, SOM, IOM or X31 and X32 etc. to X51
MIM and X52
SLM X301:A, B, C, D
LDCM, IRIG-B or RS485 X302
LDCM or RS485 X303
OEM X311:A, B, C, D
LDCM, IRIG-B or GTM X312, X313
TRM X401
1MRK002801-AC-2-670-1.2-PG V.3 EN
1MRK002801-AC-2-670-1.2-PG V3 EN-US
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SEMOD111882-4 v6

1069:

PSM X11
BIM, BOM, SOM, IOM or X31 and X32 etc. to
MIM X101 and X102
SLM X301:A, B, C, D
LDCM or RS485 X303
OEM X311:A, B, C, D
LDCM, RS485 or GTM X312, X313
TRM X401
1MRK002801-AC-3-670-1.2-PG V.3 EN
1MRK002801-AC-3-670-1.2-PG V3 EN-US
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SEMOD111884-4 v5

1070:

PSM X11
BIM, BOM, SOM, IOM or X31 and X32 etc. to X71 and
MIM X72
SLM X301:A, B, C, D
LDCM or RS485 X303
OEM X311:A, B, C, D
LDCM, RS485 or GTM X312, X313, X322, X323
TRM 1 X401
TRM 2 X411
1MRK002801-AC-4-670-1.2-PG V.3 EN
1MRK002801-AC-4-670-1.2-PG V3 EN-US
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M16106-3 v7
Table 1071: Designations for 1/1 x 19” casing with 1 TRM slot

PSM X11
BIM, BOM, SOM, X31 and X32 etc. to X161
IOM or MIM and X162
SLM X301:A, B, C, D
LDCM, IRIG-B or X302
RS485
LDCM or RS485 X303
OEM X311:A, B, C, D
LDCM,RS485 or X312, X313
GTM
TRM X401
1MRK002801-AC-5-670-1.2-PG V.3 EN
1MRK002801-AC-5-670-1.2-PG V3 EN-US
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M16108-3 v10
Table 1072:Designations for 1/1 x 19” casing with 2 TRM slots
Rear position Module

X11 PSM
X31 and X32 etc. to X131 BIM, BOM, SOM, IOM or
and X132 MIM
X301, X302, X303, X304 SFP
X305 LDCM
X306 LDCM or OEM
X3061, X3062 SFP if OEM is selected
X311: A, B, C, D SLM
X312 LDCM, IRIG-B, GTM
X313, X322, X323 LDCM, IRIG-B, GTM,
RS485
X401 TRM 1
X411 TRM 2
1MRK002801-AC-6-670-1.2-PG V.3 EN
1MRK002801-AC-6-670-1.2-PG V3 EN-US
23.2 Hardware modules IP14529-1 v1
23.2.1 Overview M11562-3 v7
Table 1073:Basic modules

Module Description
Power supply module (PSM) Including a regulated DC/DC converter that supplies auxiliary
voltage to all static circuits.
• An internal fail alarm output is available.
Numerical module (NUM) Module for overall application control. All information is
processed or passed through this module, such as configuration,
settings and communication.
Local Human machine interface (LHMI) The module consists of LED:s, an LCD, a push button keyboard
and an ethernet connector used to connect a PC to the IED.
Transformer input module (TRM) Transformer module that galvanically separates the internal
circuits from the VT and CT circuits. It has 12 analog inputs.
Analog digital conversion module (ADM) Slot mounted PCB with A/D conversion.
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Table 1074:Application specific modules

Module Description
Binary input module (BIM) Module with 16 optically isolated binary inputs
Binary output module (BOM) Module with 24 single outputs or 12 double-pole command
outputs including supervision function
Binary I/O module (IOM) Module with 8 optically isolated binary inputs, 10 outputs and 2
fast signalling outputs.
Line data communication modules (LDCM), Modules used for digital communication to remote terminal.
short range, medium range ,long range,X21
Serial SPA/LON/IEC 60870-5-103 Used for SPA/LON/IEC 60870–5–103 communication
communication modules (SLM)
Optical ethernet module (OEM) PMC board for IEC 61850 based communication.
mA input module (MIM) Analog input module with 6 independent, galvanically separated
channels.
GPS time synchronization module (GSM) Used to provide the IED with GPS time synchronization.
Static output module (SOM) Module with 6 fast static outputs and 6 change over output relays.
IRIG-B Time synchronization module (IRIG-B) Module with 2 inputs. One is used for handling both pulse-width
modulated signals and amplitude modulated signals and one is
used for optical input type ST for PPS time synchronization.
23.2.2 Numeric processing module (NUM) IP14288-1 v1
23.2.2.1 Introduction M12643-3 v1
The Numeric processing module (NUM), is a CPU-module that handles all protection functions and
logic.
For communication with high speed modules, e.g. analog input modules and high speed serial
interfaces, the NUM is equipped with a Compact PCI bus. The NUM is the compact PCI system card
i.e. it controls bus mastering, clock distribution and receives interrupts.
The NUM, Numeric processing module is a high performance, compact-PCI CPU module. It is 6U
high and occupies one slot. Contact with the backplane is via two compact PCI connectors and an
euro connector.
The NUM has one PMC slot (32-bit IEEE P1386.1 compliant) and two PC-MIP slots onto which
mezzanine cards such as SLM or LDCM can be mounted.
To reduce bus loading of the compact PCI bus in the backplane the NUM has one internal PCI bus
for internal resources and the PMC/PC-MIP slots and external PCI accesses through the backplane
are buffered in a PCI/PCI bridge.
The application code and configuration data are stored in flash memory using a flash file system.
The NUM is equipped with a real time clock. It uses a capacitor for power backup of the real time
clock.
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No forced cooling is used on this standard module because of the low power dissipation.
23.2.2.3 Block diagram M12651-3 v1
Compact
Flash Logic
PMC
connector
PC-MIP
connector
UBM
Memory Ethernet
North
bridge
Backplane
PCI-PCI-
connector
bridge
CPU
en04000473.vsd
Figure 679: Numeric processing module block diagram
23.2.3 Power supply module (PSM) IP15594-1 v1
The power supply module is used to provide the correct internal voltages and full isolation
between the IED and the battery system. An internal fail alarm output is available.
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23.2.3.2 Design IP14278-1 v1
M6377-3 v2
There are two types of the power supply module. They are designed for different DC input voltage
ranges see table 1075. The power supply module contains a built-in, self-regulated DC/DC
converter that provides full isolation between the terminal and the external battery system.
The DC input is protected against inverse polarity within the rated DC voltage range.
Connection diagram M6377-8 v2
Figure 680: PSM Connection diagram.
23.2.3.3 Technical data SEMOD52801-1 v1
M12286-1 v4
Table 1075:PSM - Power supply module

Quantity Rated value Nominal range
Auxiliary dc voltage, EL (input) EL = (24 - 60) V EL ±20%
EL = (90 - 250) V EL ±20%
Power consumption 50 W typically -
Auxiliary DC power in-rush < 10 A during 0.1 s -
23.2.4 Local human-machine interface (Local HMI) SEMOD56218-5 v2
Refer to section "" for information.
23.2.5 Transformer input module (TRM) IP15581-1 v1
The transformer input module is used to galvanically separate and adapt the secondary currents
and voltages generated by the measuring transformers. The module has twelve inputs in different
combinations of currents and voltage inputs.
Alternative connectors of Ring lug or Compression type can be ordered.
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23.2.5.2 Design M14858-3 v8
The transformer module has 12 input transformers. There are several versions of the module, each
with a different combination of voltage and current input transformers.
Basic versions:
• 6 current channels and 6 voltage channels

• 12 current channels
• 6 current channels
TRM variants are available depending on the product. The rated values and channel type,
measurement or protection, of the current inputs are selected at order.
Transformer input module for measuring should not be used with current
transformers intended for protection purposes, due to limitations in overload
characteristics.
The TRM is connected to the ADM and NUM.
For configuration of the input and output signals, refer to section "Signal matrix for analog inputs
SMAI".
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Figure 681: TRM connection diagram
M16988-1 v11
Table 1076:TRM - Energizing quantities, rated values and limits for protection transformer
Description Value
Frequency
Current inputs
Rated current Ir 1 or 5 A
Operating range (0-100) x Ir
Thermal withstand 100 × Ir for 1 s *)

30 × Ir for 10 s
10 × Ir for 1 min
4 × Ir continuously
Dynamic withstand 250 × Ir one half wave
Burden < 20 mVA at Ir = 1 A

< 150 mVA at Ir = 5 A
*) max. 350 A for 1 s when COMBITEST test switch is included.

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Description Value
Voltage inputs **)

420 V continuously
< 80 mVA at 220 V
**) all values for individual voltage inputs
Table 1077:TRM - Energizing quantities, rated values and limits for measuring transformer
Description Value
Frequency
Current inputs
Rated current Ir 1A 5A
Operating range (0-1.8) × Ir (0-1.6) × Ir
Thermal withstand 80 × Ir for 1 s 65 × Ir for 1 s

25 × Ir for 10 s 20 × Ir for 10 s
10 × Ir for 1 min 8 × Ir for 1 min
1.8 × Ir for 30 min 1.6 × Ir for 30 min
1.1 × Ir continuously 1.1 × Ir continuously
Burden < 200 mVA at Ir < 350 mVA at Ir
Voltage inputs *)

420 V continuously
< 80 mVA at 220 V
*) all values for individual voltage inputs
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23.2.6 Analog digital conversion module, with time synchronization

(ADM) IP14285-1 v1
The Analog/Digital module has twelve analog inputs, 2 PC-MIP slots and 1 PMC slot. The PC-MIP
slot is used for PC-MIP cards and the PMC slot for PMC cards according to table 1078. The OEM
card should always be mounted on the ADM board.
Table 1078:PC-MIP cards and PMC cards

PC-MIP cards PMC cards
LDCM SLM
LR-LDCM OEM 1 ch
MR-LDCM OEM 2 ch
X21-LDCM
IRIG-B
RS485
23.2.6.2 Design M13666-3 v2
The Analog digital conversion module input signals are voltage and current from the transformer
module. Shunts are used to adapt the current signals to the electronic voltage level. To gain
dynamic range for the current inputs, two shunts with separate A\D channels are used for each
input current. In this way a 20 bit dynamic range is obtained with a 16 bit A\D converter.
Input signals are sampled with a sampling freqency of 5 kHz at 50 Hz system frequency and 6 kHz
at 60 Hz system frequency.
The A\D converted signals goes through a filter with a cut off frequency of 500 Hz and are
reported to the numerical module (NUM) with 1 kHz at 50 Hz system frequency and 1,2 kHz at 60
Hz system frequency.
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Channel 1
AD1 Channel 2
Channel 3
Channel 4
AD2
Channel 5
1.2v Channel 6
AD3 Channel 7
Channel 8
Channel 9
AD4 Channel 10
Channel 11
Channel 12
PMC
level shift
PC-MIP
2.5v
PCI to PCI
PC-MIP
en05000474.vsd
Figure 682: The ADM layout
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23.2.7 Binary input module (BIM) IP14535-1 v1
The binary input module has 16 optically isolated inputs and is available in two versions, one
standard and one with enhanced pulse counting capabilities on the inputs to be used with the
pulse counter function. The binary inputs are freely programmable and can be used for the input
of logical signals to any of the functions. They can also be included in the disturbance recording
and event-recording functions. This enables extensive monitoring and evaluation of operation of
the IED and for all associated electrical circuits.
23.2.7.2 Design M11586-3 v6
The Binary input module contains 16 optical isolated binary inputs. The voltage level of the binary
input is selected at order.
For configuration of the input signals, refer to section "Signal matrix for binary inputs SMBI".
A signal discriminator detects and blocks oscillating signals. When blocked, a hysteresis function
may be set to release the input at a chosen frequency, making it possible to use the input for pulse
counting. The blocking frequency may also be set.
Well defined input high and input low voltages ensure normal operation at battery supply ground
faults, see figure 683 The figure shows the typical operating characteristics of the binary inputs of
the four voltage levels.
The standard version of binary inputs gives an improved capability to withstand disturbances and
should generally be used when pulse counting is not required. Inputs are debounced by software.
I/O events are time stamped locally on each module for minimum time deviance and stored by the
event recorder if present.
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[V]
300
176
144
88
72
38
32
19
17
24/30V 48/60V 110/125V 220/250V
xx99000517-2_ansi.vsd
Figure 683: Voltage dependence for the binary inputs
Operation
Operation uncertain
No operation
IEC99000517-ABC V1 EN-US
This binary input module communicates with the Numerical module (NUM).
The design of all binary inputs enables the burn off of the oxide of the relay contact connected to
the input, despite the low, steady-state power consumption, which is shown in figure 684 and 685.
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[mA]
50
55 [ms]
en07000104-3.vsd
Figure 684: Approximate binary input inrush current for the standard version of BIM.
[mA]
50
5.5 [ms]
en07000105-1.vsd
Figure 685: Approximate binary input inrush current for the BIM version with enhanced pulse
counting capabilities.
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Figure 686: Connection diagram
23.2.7.3 Signals
Table 1079:BIM Output signals

STATUS BOOLEAN Binary input module status
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23.2.7.4 Settings
Table BIM Non group settings (basic)

1080:
Enabled

Table 1081:BIM Monitored data

STATUS BOOLEAN 0=Ok - Binary input module status
1=Error
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M12576-1 v8.1.1
Table 1082:BIM - Binary input module

Binary inputs 16 -
DC voltage, RL 24/30 V RL ±20%
48/60 V RL ±20%
125 V RL ±20%
220/250 V RL ±20%
Power consumption
24/30 V, 50 mA max. 0.05 W/input -
48/60 V, 50 mA max. 0.1 W/input
125 V, 50 mA max. 0.2 W/input
220/250 V, 50 mA max. 0.4 W/input
220/250 V, 110 mA max. 0.5 W/input
Counter input frequency 10 pulses/s max -
Oscillating signal discriminator Blocking settable 1–40 Hz
Release settable 1–30 Hz
Debounce filter Settable 1–20 ms
Binary input operate time 3 ms -
(Debounce filter set to 0 ms)
Maximum 176 binary input channels may be activated simultaneously with

influencing factors within nominal range.
The stated operate time for functions include the operating time for the binary
inputs and outputs.
M50609-2 v9
Table 1083:BIM - Binary input module with enhanced pulse counting capabilities
Binary inputs 16 -
48/60 V RL ±20%
125 V RL ±20%
220/250 V RL ±20%
Power consumption
24/30 V max. 0.05 W/input -
48/60 V max. 0.1 W/input
125 V max. 0.2 W/input
220/250 V max. 0.4 W/input
Counter input frequency 10 pulses/s max -
Balanced counter input frequency 40 pulses/s max -
Oscillating signal discriminator Blocking settable 1–40 Hz
Release settable 1–30 Hz
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*Debounce filter Settable 1-20 ms
* Note: For compliance with surge immunity a debounce filter time setting of 5 ms is required.

inputs and outputs.
23.2.8 Binary output modules (BOM) IP14536-1 v1
The binary output module has 24 independent output relays and is used for trip output or any
signaling purpose.
23.2.8.2 Design M1819-3 v4
The binary output module (BOM) has 24 software supervised output relays. Each pair of relays
have a common power source input to the contacts, see figure 687. This should be considered
when connecting the wiring to the connection terminal on the back of the IED.
The high closing and carrying current capability allows connection directly to breaker trip and
closing coils. If breaking capability is required to manage fail of the breaker auxiliary contacts
normally breaking the trip coil current, a parallel reinforcement is required.
For configuration of the output signals, refer to section "Signal matrix for binary outputs SMBO".
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Output module
ANSI_xx00000299.vsd
Figure 687: Relay pair example
1 Output connection from relay 1

2 Output signal power source connection
3 Output connection from relay 2
Figure 688: Connection diagram
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23.2.8.3 Signals
Table BOM Input signals

1084:
BLOCK BOOLEAN 0 Block binary outputs
BO1 BOOLEAN 0 Binary output 1
Table BOM Output signals

1085:
STATUS BOOLEAN Binary output part of IOM module status
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23.2.8.4 Settings
Table BOM Non group settings (basic)

1086:
Enabled

Table 1087:BOM Monitored data

STATUS BOOLEAN 0=Ok - Binary output part of IOM module status
1=Error
BO1VALUE BOOLEAN 1=1 - Binary output 1 value
0=0
BO1FORCE BOOLEAN 0=Normal - Binary output 1 force
1=Forced
BO1 BOOLEAN 0=Normal - Binary output 1 status
1=Forced
2=Blocked
0=0
1=Forced
1=Forced
2=Blocked
0=0
1=Forced
1=Forced
2=Blocked
0=0
1=Forced
1=Forced
2=Blocked
0=0
1=Forced
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1=Forced
2=Blocked
0=0
1=Forced
1=Forced
2=Blocked
0=0
1=Forced
1=Forced
2=Blocked
0=0
1=Forced
1=Forced
2=Blocked
0=0
1=Forced
1=Forced
2=Blocked
0=0
1=Forced
1=Forced
2=Blocked
BO11VALUE BOOLEAN 1=1 - nary output 11 value
0=0
1=Forced
1=Forced
2=Blocked
0=0
1=Forced
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1=Forced
2=Blocked
0=0
1=Forced
1=Forced
2=Blocked
0=0
1=Forced
1=Forced
2=Blocked
0=0
1=Forced
1=Forced
2=Blocked
0=0
1=Forced
1=Forced
2=Blocked
0=0
B017FORCE BOOLEAN 0=Normal - Binary output 17 force
1=Forced
1=Forced
2=Blocked
0=0
1=Forced
1=Forced
2=Blocked
0=0
BO19FORCE BOOLEAN 1=Forced - Binary output 19 force
0=Normal
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1=Forced
2=Blocked
0=0
1=Forced
1=Forced
2=Blocked
0=0
1=Forced
1=Forced
2=Blocked
0=0
1=Forced
1=Forced
2=Blocked
0=0
1=Forced
1=Forced
2=Blocked
0=0
BO24FORCE BOOLEAN 0=Normal - nary output 24 force
1=Forced
1=Forced
2=Blocked
M12441-1 v10
Table BOM - Binary output module contact data (reference standard: IEC 61810-2)
1088:
Function or quantity Trip and Signal relays
Binary outputs 24
Max system voltage 250 V AC, DC
Min load voltage 24VDC
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Function or quantity Trip and Signal relays

Test voltage across open contact, 1 min 1000 V rms
Current carrying capacity
Per relay, continuous 8A
Per relay, 1 s 10 A
Per process connector pin, continuous 12 A
Max operations with load 1000
Max operations with no load 10000
Making capacity at inductive load with L/R > 10 ms
0.2 s 30 A
1.0 s 10 A
Breaking capacity for AC, cos j > 0.4 250 V/8.0 A
Breaking capacity for DC with L/R < 40 ms 48 V/1 A

110 V/0.4 A
125 V/0.35 A
220 V/0.2 A
250 V/0.15 A
Operating time < 6 ms
Maximum 72 outputs may be activated simultaneously with influencing factors

within nominal range. After 6 ms an additional 24 outputs may be activated. The
activation time for the 96 outputs must not exceed 200 ms. 48 outputs can be
activated during 1 s. Continued activation is possible with respect to current
consumption but after 5 minutes the temperature rise will adversely affect the
hardware life. Maximum two relays per BOM/IOM/SOM should be activated
continuously due to power dissipation.
inputs and outputs.
23.2.9 Static binary output module (SOM) SEMOD174197-1 v1
23.2.9.1 Introduction SEMOD174196-4 v4
The static binary output module has six fast static outputs and six change over output relays for
use in applications with high speed requirements.
23.2.9.2 Design SEMOD175385-4 v4
The Static output module (SOM) have 6 normally open (NO) static outputs and 6
electromechanical relay outputs with change over contacts.
The SOM consists mainly of:
• An MCU
• A CAN-driver
• 6 static relays outputs
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• 6 electromechanical relay outputs

• A DC/DC converter
• Connectors interfacing
• CAN-bus to backplane CBM
• IO-connectors to binary outputs (2 pcs.)
The following parts are supervised:
• Interruption in relay coil

• Short circuit of relay coil
• Driver failure
Figure 689: SOM Static output principle
1MRK002802-AB-13-670-1.2-PG-ANSI V1 EN-US
Figure 690: Connection diagram of the static output module
23.2.9.3 Signals
Table SOM Input signals

1089:
BLOCK BOOLEAN 0 Block binary outputs
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BO7 BOOLEAN 0 Static binary output 7
Table SOM Output signals

1090:
STATUS BOOLEAN Static binary output module status
23.2.9.4 Settings
Table 1091:SOM Non group settings (basic)

Enabled

Table 1092:SOM Monitored data

STATUS BOOLEAN 0=Ok - Static binary output module status
1=Error
0=0
1=Forced
1=Forced
2=Blocked
0=0
1=Forced
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1=Forced
2=Blocked
0=0
1=Forced
1=Forced
2=Blocked
0=0
1=Forced
1=Forced
2=Blocked
0=0
1=Forced
1=Forced
2=Blocked
0=0
1=Forced
1=Forced
2=Blocked
0=0
1=Forced
1=Forced
2=Blocked
0=0
1=Forced
1=Forced
2=Blocked
0=0
1=Forced
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1=Forced
2=Blocked
0=0
1=Forced
1=Forced
2=Blocked
0=0
1=Forced
1=Forced
2=Blocked
0=0
1=Forced
1=Forced
2=Blocked
SEMOD175395-2 v9
Table 1093:SOM - Static Output Module (reference standard: IEC 61810-2): Static binary outputs
Function of quantity Static binary output trip
Rated voltage 48-60 VDC 110-250 VDC
Number of outputs 6 6
Impedance open state ~300 kΩ ~810 kΩ
Test voltage across open contact, 1 No galvanic separation No galvanic separation
min
Current carrying capacity:
Continuous 5A 5A
1.0 s 10 A 10 A
Making capacity at capacitive load with
the maximum capacitance of 0.2 μF :
0.2 s 30 A 30 A
1.0 s 10 A 10 A
Breaking capacity for DC with L/R ≤ 40 48 V/1 A 110 V/0.4 A
ms
60 V/0.75 A 125 V/0.35 A
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Function of quantity Static binary output trip

220 V/0.2 A
250 V/0.15 A
Operating time < 1 ms < 1 ms
Table SOM - Static Output module data (reference standard: IEC 61810-2): Electromechanical relay outputs
1094:
Function of quantity Trip and signal relays
Max system voltage 250 V AC/DC
Min load voltage 24VDC
Number of outputs 6
Test voltage across open contact, 1 min 1000 V rms
Current carrying capacity:
Continuous 8A
1.0 s 10 A
Making capacity at capacitive load with the maximum
capacitance of 0.2 μF:
0.2 s 30 A
1.0 s 10 A
Breaking capacity for DC with L/R ≤ 40 ms 48 V/1 A
110 V/0.4 A
125 V/0.35 A
220 V/0.2 A
250 V/0.15 A
Operating time < 6 ms

inputs and outputs.
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23.2.10 Binary input/output module (IOM) IP15582-1 v1
The binary input/output module is used when only a few input and output channels are needed.
The ten standard output channels are used for trip output or any signaling purpose. The two high
speed signal output channels are used for applications where short operating time is essential.
Eight optically isolated binary inputs cater for required binary input information.
23.2.10.2 Design IP10635-1 v1
M1718-3 v3
The binary input/output module is available in two basic versions, one with unprotected contacts
and one with MOV (Metal Oxide Varistor) protected contacts.
Inputs are designed to allow oxide burn-off from connected contacts, and increase the
disturbance immunity during normal protection trip times. This is achieved with a high peak
inrush current while having a low steady-state current, see figure 684. Inputs are debounced by
software.
Well defined input high and input low voltages ensures normal operation at battery supply ground
faults, see figure 683.
The voltage level of the inputs is selected when ordering.
I/O events are time stamped locally on each module for minimum time deviance and stored by the
event recorder if present.
M1898-3 v3
The binary I/O module, IOM, has eight optically isolated inputs and ten output relays. One of the
outputs has a change-over contact. The nine remaining output contacts are connected in two
groups. One group has five contacts with a common and the other group has four contacts with a
common, to be used as single-output channels, see figure 691.
The binary I/O module also has two high speed output channels where a reed relay is connected in
parallel to the standard output relay.
For configuration of the input and output signals, refer to sections "Signal matrix for binary inputs
SMBI" and "Signal matrix for binary outputs SMBO".
The making capacity of the reed relays are limited.
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IEC1MRK002801-AA11-UTAN-RAM V2 EN-US
IEC1MRK002802-AA-13 V1 EN-US
Figure 691: Binary in/out module (IOM), input contacts named XA corresponds to rear
position X31, X41, and so on, and output contacts named XB to rear position X32,
X42, and so on
SEMOD175370-4 v1
The binary input/output module version with MOV protected contacts can for example be used in
applications where breaking high inductive load would cause excessive wear of the contacts.
The test voltage across open contact is lower for this version of the binary input/
output module.
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xx04000069.vsd
Figure 692: IOM with MOV protection, relay example
23.2.10.3 Signals
Table IOMIN Output signals

1095:
STATUS BOOLEAN Binary input part of IOM module status
Table IOMOUT Input signals

1096:
BLKOUT BOOLEAN 0 Block binary outputs
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23.2.10.4 Settings
Table 1097:IOMIN Non group settings (basic)

Operation Disabled - - Enabled Binary input/output module in operation
Enabled (On) or not (Off)

Table IOMIN Monitored data

1098:
STATUS BOOLEAN 0=Ok - Binary input part of IOM module status
1=Error
Table IOMOUT Monitored data

1099:
0=0
1=Forced
1=Forced
2=Blocked
0=0
1=Forced
1=Forced
2=Blocked
0=0
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1=Forced
1=Forced
2=Blocked
0=0
1=Forced
1=Forced
2=Blocked
0=0
1=Forced
1=Forced
2=Blocked
0=0
1=Forced
1=Forced
2=Blocked
0=0
1=Forced
1=Forced
2=Blocked
0=0
1=Forced
1=Forced
2=Blocked
0=0
1=Forced
1=Forced
2=Blocked
0=0
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1=Forced
1=Forced
2=Blocked
0=0
1=Forced
1=Forced
2=Blocked
0=0
1=Forced
1=Forced
2=Blocked
23.2.10.6 Technical data IP10636-1 v1
M12573-1 v8.1.1
Table 1100:IOM - Binary input/output module

Binary inputs 8 -
48/60 V RL ±20%
125 V RL ±20%
220/250 V RL ±20%
Power consumption -
24/30 V, 50 mA max. 0.05 W/input
48/60 V, 50 mA max. 0.1 W/input
125 V, 50 mA max. 0.2 W/input
220/250 V, 50 mA max. 0.4 W/input
220/250 V, 110 mA max. 0.5 W/input
Counter input frequency 10 pulses/s max
Oscillating signal discriminator Blocking settable 1-40 Hz
Release settable 1-30 Hz
Debounce filter Settable 1-20 ms

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inputs and outputs.
M12318-1 v10
Table 1101: IOM - Binary input/output module contact data (reference standard: IEC 61810-2)
Function or quantity Trip and signal relays Fast signal relays (parallel
reed relay)
Binary outputs 10 2
Max system voltage 250 V AC, DC 250 V DC
Min load voltage 24VDC —
Test voltage across open contact, 1 min 1000 V rms 800 V DC
Per relay, continuous 8A 8A
Per relay, 1 s 10 A 10 A
Per process connector pin, continuous 12 A 12 A
Making capacity at inductive load with L/R > 10 ms
0.2 s
1.0 s 30 A 0.4 A
10 A 0.4 A
Making capacity at resistive load
220–250 V/0.4 A
0.2 s 30 A 110–125 V/0.4 A
1.0 s 10 A 48–60 V/0.2 A
24–30 V/0.1 A
Breaking capacity for AC, cos φ > 0.4 250 V/8.0 A 250 V/8.0 A
Breaking capacity for DC with L/R < 40 ms 48 V/1 A 48 V/1 A
110 V/0.4 A 110 V/0.4 A
125 V/0.35 A 125 V/0.35 A
220 V/0.2 A 220 V/0.2 A
250 V/0.15 A 250 V/0.15 A
Maximum capacitive load - 10 nF
Operating time < 6 ms <= 1 ms

inputs and outputs.
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M12584-1 v10
Table 1102: IOM with MOV and IOM 220/250 V, 110mA - contact data (reference standard: IEC 61810-2)
Function or quantity Trip and Signal relays Fast signal relays (parallel reed relay)
Binary outputs IOM: 10 IOM: 2
Max system voltage 250 V AC, DC 250 V DC
Min load voltage 24VDC -
Test voltage across open 250 V rms 250 V rms
contact, 1 min
Per relay, continuous 8A 8A
Per relay, 1 s 10 A 10 A
Per process connector pin, 12 A 12 A
continuous
Making capacity at inductive
loadwith L/R > 10 ms
0.2 s 30 A 0.4 A
1.0 s 10 A 0.4 A
Making capacity at resistive
load 220–250 V/0.4 A
30 A 110–125 V/0.4 A
0.2 s 10 A 48–60 V/0.2 A
1.0 s 24–30 V/0.1 A
Breaking capacity for AC, cos 250 V/8.0 A 250 V/8.0 A
j > 0.4
Breaking capacity for DC with 48 V/1 A 48 V/1 A
L/R < 40 ms 110 V/0.4 A 110 V/0.4 A
220 V/0.2 A 220 V/0.2 A
250 V/0.15 A 250 V/0.15 A
Maximum capacitive load - 10 nF
Max operations with load 1000 -
Max operations with no load 10000 -
Operating time < 6 ms <= 1 ms

inputs and outputs.
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23.2.11 mA input module (MIM) IP14537-1 v1
The milli-ampere input module is used to interface transducer signals in the –20 to +20 mA range
from for example OLTC position, temperature or pressure transducers. The module has six
independent, galvanically separated channels.
23.2.11.2 Design SEMOD55434-1 v1
M6380-3 v6
The Milliampere Input Module has six independent analog channels with separated protection,
filtering, reference, A/D-conversion and optical isolation for each input making them galvanically
isolated from each other and from the rest of the module.
For configuration of the input signals, refer to section "Signal matrix for mA inputs SMMI".
The analog inputs measure DC current in the range of +/- 20 mA. The A/D converter has a digital
filter with selectable filter frequency. All inputs are calibrated separately The filter parameters and
the calibration factors are stored in a non-volatile memory on the module.
The MIM module can report measured values in two ways:
• Cyclic reporting
• Dead Band reporting
The parameter MaxReportT defines the maximum time between two reports at cyclic reporting. If
MaxReportT is set to a value higher than 0 s, all the channels follow cyclic reporting disregarding
the settings EnDeadBandChx and DeadBandChx.
Deadband reporting requires that MaxReportT is set to 0, and EnDeadBandChx is set to On. The
DeadBandChx parameter defines the dead band range for channel x.
Table 1103: Parameter dependency

Reporting MaxReportT EnDeadBandChx DeadBandChx
Cyclic >0 Off yy
Cyclic >0 On yy
Deadband 0 On yy
The calibration circuitry monitors the module temperature and starts an automatical calibration
procedure if the temperature drift is outside the allowed range.
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M6380-35 v3
Figure 693: MIM connection diagram
23.2.11.3 Signals
Table 1104:MIM Output signals

STATUS BOOLEAN Milliampere input module status
CH1 REAL Analog input 1
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23.2.11.4 Settings
Table 1105: MIM Non group settings (basic)

Enabled
MaxReportT 0 - 3600 s 1 1 Maximum time between reports
EnDeadBandCh1 Disabled - - Disabled Enable amplitude deadband reporting for
Enabled channel 1
DeadBandCh1 0.00 - 20.00 mA 0.01 1.00 Deadband amplitude for channel 1
IMinCh1 -25.00 - 25.00 mA 0.01 4.00 Min current of transducer for Channel 1
IMaxCh1 -25.00 - 25.00 mA 0.01 20.00 Max current of transducer for Channel 1
ValueMinCh1 -10000000000.00 - 0.001 4.000 Min primary value corr. to IMinCh1
0-
10000000000.00
0
ValueMaxCh1 -10000000000.00 - 0.001 20.000 Max primary value corr. to IMaxCh1
0-
10000000000.00
0
Enabled channel 2
0-
10000000000.00
0
0-
10000000000.00
0
Enabled channel 3
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0-
10000000000.00
0
0-
10000000000.00
0
Enabled channel 4
0-
10000000000.00
0
0-
10000000000.00
0
Enabled channel 5
0-
10000000000.00
0
0-
10000000000.00
0
Enabled channel 6
0-
10000000000.00
0
0-
10000000000.00
0
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Table 1106:MIM Monitored data

STATUS BOOLEAN 0=Ok - Milliampere input module status
1=Error
CH1 REAL - - Analog input 1
CH1 REAL - A Service value analog input 1
M6389-1 v4
Table 1107: MIM - mA input module

Quantity: Rated value: Nominal range:
Input resistance Rin = 194 Ohm -
Input range ±5, ±10, ±20mA -

0-5, 0-10, 0-20, 4-20mA
Power consumption -
each mA-board £2W
each mA input £ 0.1 W
23.2.12 Serial and LON communication module (SLM) IP15583-1 v2
The serial and LON communication module (SLM) is used for SPA, IEC 60870-5-103, DNP3 and LON
communication. The module has two optical communication ports for plastic/plastic, plastic/
glass or glass/glass. One port is used for serial communication (SPA, IEC 60870-5-103 and DNP3
port) and one port is dedicated for LON communication.
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23.2.12.2 Design M17126-3 v5
The SLM is a PMC card and it is factory mounted as a mezzanine card on the NUM module. Three
variants of the SLM are available with different combinations of optical fiber connectors, see
figure 694. The plastic fiber connectors are of snap-in type and the glass fiber connectors are of
ST type.
I
EC0500760=1=en=Or
igi
nal
.psd
Figure 694: The SLM variants, component side view
1 Receiver, LON
2 Transmitter, LON
3 Receiver, SPA/IEC 60870-5-103/DNP3
4 Transmitter, SPA/IEC 60870-5-103/DNP3
A Snap in connector for plastic fiber
B ST connector for glass fiber
Observe that when the SLM connectors are viewed from the rear side of the IED,
contact 4 above is in the uppermost position and contact 1 in the lowest position.
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M12589-1 v4
Table 1108:SLM – LON port

Quantity Range or value
Optical connector Glass fiber: type ST
Plastic fiber: type HFBR snap-in
Fiber, optical budget Glass fiber: 11 dB (1000m/3000 ft typically *)
Plastic fiber: 7 dB (10m/35ft typically *)
Fiber diameter Glass fiber: 62.5/125 mm
Plastic fiber: 1 mm
*) depending on optical budget calculation
SEMOD117441-2 v5
Table 1109:SLM – SPA/IEC 60870-5-103/DNP3 port

Optical connector Glass fiber: type ST
Plastic fiber: type HFBR snap-in
Fiber, optical budget Glass fiber: 11 dB (1000m/3000ft m typically *)
Plastic fiber: 7 dB (25m/80ft m typically *)
Fiber diameter Glass fiber: 62.5/125 mm
Plastic fiber: 1 mm
23.2.13 Galvanic RS485 communication module SEMOD174899-1 v1
The Galvanic RS485 communication module (RS485) is used for DNP3.0 and IEC 60870-5-103
communication. The module has one RS485 communication port. The RS485 is a balanced serial
communication that can be used either in 2-wire or 4-wire connections. A 2-wire connection uses
the same signal for RX and TX and is a multidrop communication with no dedicated Master or
slave. This variant requires however a control of the output. The 4-wire connection has separated
signals for RX and TX multidrop communication with a dedicated Master and the rest are slaves.
No special control signal is needed in this case.
23.2.13.2 Design SEMOD158668-1 v1
SEMOD158670-4 v2
The RS485 is a PMC card and it is factory mounted as a mezzanine card on the NUM module.
RS485 connector pinouts SEMOD158670-10 v1

The arrangement for the pins in the RS485 connector (figure 695) are presented in table 1110:
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Table 1110: The arrangement for the pins
Pin Name 2-wire Name 4-wire Description

1 RS485+ TX+ Receive/transmit high or transmit high
2 RS485– TX– Receive/transmit
3 Term T-Term Termination resistor for transmitter (and receiver in 2–wir case)
(connect to TX+)
4 N.A. R-Term Termination resistor for receiver (connect to RX+)
5 N.A. RX– Receive low
6 N.A. RX+ Receive high
Angle
bracket
Screw
1
terminal
X3 2
1
2 RS485
3 PWB
Screw
4
terminal
5
X1
6
Backplane
Figure 695: RS485 connector
• 2-wire: Connect pin 1 to pin 6 and pin 2 to pin 5
• Termination (2-wire): Connect pin 1 to pin 3
• Termination (4-wire): Connect pin 1 to pin 3 and pin 4 to pin 6
Soft ground connector pinouts SEMOD158670-45 v1

A second 2-pole screw connector is used for the connection of IO-ground. It can be used in two
combinations like:
• Unconnected: No ground of the IO-part · .
• Soft grounded: The IO is connected to the GND with an RC net parallel with a MOV
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SEMOD158710-2 v2
Table 1111: Galvanic RS485 communication module

Communication speed 2400–19200 bauds
External connectors RS-485 6-pole connector
Soft ground 2-pole connector
23.2.14 Optical ethernet module (OEM) IP15584-1 v1
The optical fast-ethernet module is used for fast and interference-free communication of
synchrophasor data over IEEE C37.118 and/or IEEE 1344 protocols. It is also used to connect an IED
to the communication buses (like the station bus) that use the IEC 61850-8-1 protocol (OEM rear
port A, B). The process bus use the IEC 61850-9-2LE protocol (OEM rear port C, D). The module has
one or two optical ports with ST connectors.
The Optical Ethernet module (OEM) is used when communication systems according to IEC61850–
8–1 have been implemented.
23.2.14.3 Design M14945-3 v3
The Optical Ethernet module (OEM) is a PMC card and mounted as a mezzanine card on the ADM.
The OEM is a 100BASE-FXmodule and available as a single channel or double channel unit.
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IEC05000472=1=en=Original.vsd
Figure 696: OEM layout, standard PMC format 2 channels

• 1: Transmitter
• 2: Receiver
SEMOD55310-2 v8
Table 1112: OEM - Optical ethernet module

Quantity Rated value
Number of channels 1 or 2 (port A, B for IEC 61850-8-1 / IEEE C37.118 and port C, D for
IEC 61850-9-2LE / IEEE C37.118)
Standard IEEE 802.3u 100BASE-FX
Type of fiber 62.5/125 mm multimode fiber
Wave length 1300 nm
Optical connector Type ST
Communication speed Fast Ethernet 100 Mbit/s
23.2.15 Line data communication module (LDCM) IP15588-1 v1
M16028-3 v3
The line data communication module (LDCM) is used for communication between the IEDs
situated at distances <68 miles or from the IED to optical to electrical converter with G.703
interface located on a distances <1.9 miles away. The LDCM module sends and rereceives data, to
and from another LDCM module. The IEEE/ANSI standard format is used.
The line data communication module is used for binary signal transfer. The module has one optical
port with ST connectors see figure 697.
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Line data communication module LDCM M16075-3 v4

Each module has one optical port, one for each remote end to which the IED communicates.
Alternative cards for Long range (1550 nm single mode), Medium range (1310 nm single mode) and
Short range (850 nm multi mode) are available.
Class 1 laser product. Take adequate measures to protect the eyes. Never look into
the laser beam.
23.2.15.2 Design SEMOD55466-4 v2
The LDCM is a PCMIP type II single width format module. The LDCM can be mounted on:
• the ADM
• the NUM
ST
IO-connector
ST
Figure 697: The SR-LDCM layout. PCMIP type II single width format with two PCI connectors
and one I/O ST type connector
C
Figure 698: The MR-LDCM and LR-LDCM layout. PCMIP type II single width format with two
PCI connectors and one I/O FC/PC type connector
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M12756-1 v12
Table 1113: Line data communication module

Characteristic Range or value
Type of LDCM Short range (SR) Medium range (MR) Long range (LR)
Type of fiber Multi-mode fiber Single-mode fiber Single-mode fiber
glass 62.5/125 µm glass 9/125 µm glass 9/125 µm
Multi-mode fiber
glass 50/125 µm
Peak Emission Wave length
Nominal 820 nm 1310 nm 1550 nm
Maximum 865 nm 1330 nm 1580 nm
Minimum 792 nm 1290 nm 1520 nm
Optical budget 18.8 dB (typical 26.8 dB (typical 28.7 dB (typical
Multi-mode fiber glass 62.5/125 mm distance about 2 distance 50 mile *) distance 68 mile *)
mile *)
Multi-mode fiber glass 50/125 mm 11.5 dB (typical
distance about 1
mile *)
Optical connector Type ST Type FC/PC Type FC/PC
Protocol C37.94 C37.94 C37.94
implementation **) implementation **)
Data transmission Synchronous Synchronous Synchronous
Transmission rate / Data rate 2 Mbit/s / 64 2 Mbit/s / 64 2 Mbit/s / 64
kbit/s kbit/s kbit/s
Clock source Internal or derived Internal or derived Internal or derived
from received from received from received
signal signal signal
**) C37.94 originally defined just for multi-mode; using same header, configuration and data format as C37.94
23.2.16 Galvanic X.21 line data communication (X.21-LDCM) GUID-75B89AAC-1A2D-4774-B357-88F7AB7F392A v1
23.2.16.1 Introduction GUID-D02150FC-54F5-4CE4-8D3D-9F8796B6A527 v3
The galvanic X.21 line data communication module is used for connection to telecommunication
equipment, for example leased telephone lines. The module supports 64 kbit/s data
communication between IEDs.
Examples of applications:
• Line differential protection

• Binary signal transfer
23.2.16.2 Design GUID-0570749A-516C-47D6-A818-83416759BA90 v5
The galvanic X.21 line data communication module uses a ABB specific PC*MIP Type II format.
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C
en07000196.vsd
Figure 699: Overview of the X.21 LDCM module
1 4
1 8
9 15
3 2
en07000239.wmf
Figure 700: The X.21 LDCM module external connectors
1. Ground selection connector for IO, screw terminals, 2-pole

2. Ground pin
3. Soft ground pin, see figure 701
4. X.21 Micro D-sub 15 pole male connector according to the V11 (X:27) balanced version
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I/O
100kW 100nF
Soft ground
en07000242.vsd
Figure 701: Schematic view of soft ground
Grounding
At special problems with ground loops, the soft ground connection for the IIO-ground can be
tested.
Three different kinds of grounding principles can be set (used for fault tracing):
1. Direct ground - The normal grounding is direct ground, connect terminal 2 directly to the
chassis.
2. No ground - Leave the connector without any connection.
3. Soft ground - Connect soft ground pin (3), see figure 700
X.21 connector
Table 1114: Pinout for the X.21 communication connector
Pin number Signal

1 Shield (ground)
2 TXD A
3 Control A
4 RXD A
6 Signal timing A
8 Ground
9 TXD B
10 Control B
11 RXD B
13 Signal timing B
5,7,12,14,15 Not used
23.2.16.3 Functionality GUID-4512904E-08D1-47EC-B005-E66170CEB130 v1
The data format is HDLC. The speed for the transmission of the messages used is 64 kbit/s.
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A maximum of 100 meter of cable is allowed to ensure the quality of the data (deviation from X.21
standard cable length).
Synchronization
The X.21 LDCM works like a DTE (Data Terminal Equipment) and is normally expecting
synchronization from the DCE (Data Circuit Equipment). The transmission is normally
synchronized to the Signal Element Timing signal when a device is a DTE. When the signal is high it
will read the data at the receiver and when the signal is low it will write data to the transmitter.
This behaviour can be inverted in the control register.
Normally an external multiplexer is used and it should act like the master.
When two X.21 LDCM is directly communicating with each other one must be set as a master
generating the synchronization for the other (the slave). The DTE Signal Element Timing is created
from the internal 64 kHz clock.
The Byte Timing signal is not used in ABB devices.
23.2.16.4 Technical data GUID-83EC40D0-ABCF-4292-B3DF-155C3A556B76 v3
Table 1115: Galvanic X.21 line data communication module (X.21-LDCM)

Connector, X.21 Micro D-sub, 15-pole male, 1.27 mm (0.050") pitch
Connector, ground selection 2 pole screw terminal
Standard CCITT X21
Communication speed 64 kbit/s
Insulation 1 kV
Maximum cable length 100 m
23.2.17 GPS time synchronization module (GTM) IP15586-1 v2
This module includes a GPS receiver used for time synchronization. The GTM has one SMA contact
for connection to an antenna. It also includes an optical PPS ST-connector output.
23.2.17.2 Design M14856-3 v6
The GTM is a PCMIP-format card and is placed only on one of the ADM slots. The antenna input
connector is shielded and directly attached to a grounded plate to eliminate the risk of
electromagnetic interference.
All communication between the GTM and the NUM is via the PCI-bus. PPS time data is sent from
the GTM to the rest of the time system to provide 1μs accuracy at sampling level. An optical
transmitter for PPS output is available for time synchronization of another relay with an optical
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PPS input. The PPS output connector is of ST-type for multimode fiber and could be used up to 1
km.

Table 1116: SYNCHGPS Monitored data

NoOfSatellites INTEGER - - Number of GPS signals from satellites
SEMOD55660-2 v3
Table 1117: GPS time synchronization module (GTM)

Receiver – ±1µs relative UTC
Time to reliable time reference with antenna in <30 minutes –
new position or after power loss longer than 1
month
Time to reliable time reference after a power loss <15 minutes –
longer than 48 hours
Time to reliable time reference after a power loss <5 minutes –
shorter than 48 hours
23.2.18 GPS antenna SEMOD55676-1 v1
In order to receive GPS signals from the satellites orbiting the earth a GPS antenna with applicable
cable must be used.
23.2.18.2 Design SEMOD55680-1 v1
SEMOD55682-4 v4
The antenna with a console for mounting on a horizontal or vertical flat surface or on an antenna
mast. See figure 702
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1 6
4 7
xx04000155.vsd
Figure 702: Antenna with console
where
:
1 GPS antenna
2 TNC connector
3 Console, (2'6.7"x4'11')
4 Mounting holes about 1/5"
5 Tab for securing of antenna cable
6 Vertical mounting position
7 Horizontal mounting position
Antenna cable SEMOD55682-28 v4

Use a 50 ohm coaxial cable with a male TNC connector in the antenna end and a male SMA
connector in the receiver end to connect the antenna to GTM. Choose cable type and length so
that the total attenuation is max. 26 dB at 1.6 GHz.
Make sure that the antenna cable is not charged when connected to the antenna or
to the receiver. Short-circuit the end of the antenna cable with some metal device,
when first connected to the antenna. When the antenna is connected to the cable,
connect the cable to the receiver. The IED must be switched off when the antenna
cable is connected.
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SEMOD55693-2 v5
Table 1118: GPS – Antenna and cable

Function Value
Max antenna cable attenuation 26 db @ 1.6 GHz
Antenna cable impedance 50 ohm
Lightning protection Must be provided externally
Antenna cable connector SMA in receiver end
TNC in antenna end
Accuracy +/-1μs
23.2.19 IRIG-B time synchronization module IRIG-B SEMOD141102-1 v1
The IRIG-B time synchronizing module is used for accurate time synchronizing of the IED from a
station clock.
The Pulse Per Second (PPS) input shall be used for synchronizing when IEC 61850-9-2LE is used.
Electrical (BNC) and optical connection (ST) for 0XX and 12X IRIG-B support.
23.2.19.2 Design SEMOD141098-4 v3
The IRIG-B module has two inputs. One input is for the IRIG-B that can handle both a pulse-width
modulated signal (also called unmodulated) and an amplitude modulated signal (also called sine
wave modulated). The other is an optical input type ST for optical pulse-width modulated signal
(IRIG-B 00X).
ST
Y2
A1
IEC06000304=1=en=Original.ai
Figure 703: IRIG-B PC-MIP board with top left ST connector for optical IRIG-B 00X 820 nm
multimode fiber optic signal input and lower left BNC connector for IRIG-B signal
input
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23.2.19.3 Settings
Table 1119: IRIG-B Non group settings (basic)

SynchType BNC - - Opto Type of synchronization
Opto
TimeDomain LocalTime - - LocalTime Time domain
UTC
Encoding IRIG-B - - IRIG-B Type of encoding
1344
1344TZ
TimeZoneAs1344 MinusTZ - - PlusTZ Time zone as in 1344 standard
PlusTZ
SEMOD141136-2 v8
Table 1120: IRIG-B

Quantity Rated value
Number of channels IRIG-B 1
Number of optical channels 1
Electrical connector:
Electrical connector IRIG-B BNC
Pulse-width modulated 5 Vpp
Amplitude modulated
– low level 1-3 Vpp
– high level 3 x low level, max 9 Vpp
Supported formats IRIG-B 00x, IRIG-B 12x
Accuracy +/-10μs for IRIG-B 00x and +/-100μs for IRIG-B 12x
Input impedance 100 k ohm
Optical connector:
Optical connector IRIG-B Type ST
Type of fiber 62.5/125 μm multimode fiber
Supported formats IRIG-B 00x
Accuracy +/- 1μs
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23.3 Dimensions IP11490-1 v3
23.3.1 Case without rear cover SEMOD53195-1 v1
M2152-3 v5
A
D
B C
Figure 704: Case without rear cover
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K
F
G
H J
xx08000166.vsd
Figure 705: Case without rear cover with 19” rack mounting kit
M2152-11 v3
Case size A B C D E F G H J K
(inches)
6U, 1/2 x 19” 10.47 8.81 7.92 9.96 8.10 7.50 8.02 18.31 7.39 19.00
6U, 3/4 x 19” 10.47 13.23 7.92 9.96 12.52 7.50 12.44 18.31 7.39 19.00
6U, 1/1 x 19” 10.47 17.65 7.92 9.96 16.94 7.50 16.86 18.31 7.39 19.00
The H and K dimensions are defined by the 19” rack mounting kit
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23.3.2 Case with rear cover SEMOD53199-1 v1
M11985-110 v4
A
D
B
C
Figure 706: Case with rear cover
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K
F
G
J
H
xx08000165.vsd
Figure 707: Case with rear cover and 19” rack mounting kit
Figure 708: Rear cover case with details

M11985-120 v4
Case size A B C D E F G H J K
(inches)
6U, 1/2 x 19” 10.47 8.81 9.53 10.07 8.10 7.50 8.02 18.31 9.00 19.00
6U, 3/4 x 19” 10.47 13.23 9.53 10.07 12.52 7.50 12.4 18.31 9.00 19.00
6U, 1/1 x 19” 10.47 17.65 9.53 10.07 16.86 7.50 16.86 18.31 9.00 19.00
The H and K dimensions are defined by the 19” rack mounting kit.
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23.3.3 Flush mounting dimensions M11571-3 v5
A C
B
E
D
Figure 709: Flush mounting
Cut-out dimensions (inches)

Case size
Tolerance A B C D
+/0.04 +/0.04
6U, 1/2 x 19” 8.27 10.01 0.16–0.39 0.49
6U, 3/4 x 19” 12.69 10.01 0.16–0.39 0.49
6U, 1/1 x 19” 17.11 10.01 0.16–0.39 0.49
E = 7.42” without rear protection cover, 9.03” with rear protection cover
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23.3.4 Side-by-side flush mounting dimensions M11984-3 v6
Figure 710: A 1/2 x 19” size IED side-by-side with RHGS6
G
D
B
E
F
C
xx05000505.vsd
Figure 711: Panel-cut out dimensions for side-by-side flush mounting
Case size A B C D E F G
(inches) ±0.04 ±0.04 ±0.04 ±0.04 ±0.04 ±0.04 ±0.04
Tolerance
6U, 1/2 x 19” 8.42 10.21 9.46 7.50 1.35 0.52 0.25 diam
6U, 3/4 x 19” 12.85 10.21 13.89 7.50 1.35 0.52 0.25 diam
6U, 1/1 x 19” 17.27 10.21 18.31 7.50 1.35 0.52 0.25 diam
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23.3.5 Wall mounting dimensions M11569-3 v4
Figure 712: Wall mounting
Case size (inches) A B C D E

6U, 1/2 x 19” 10.50 10.52 10.74 15.36 9.57
6U, 3/4 x 19” 15.92 14.94 10.74 15.36 9.57
6U, 1/1 x 19” 20.31 19.33 10.74 15.36 9.57
23.3.6 External resistor unit for high impedance differential protection SEMOD154026-4 v3
WARNING! - USE EXTREME CAUTION!Dangerously high voltages might be present

on this equipment, especially on the plate with resistors. Do any maintenance
ONLY if the primary object protected with this equipment is de-energized. If
required by national law/standard enclose the plate with resistors with a
protective cover or in a separate box!
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[1.48]
[6.97]
[4.02]
[0.33] [18.31] [0.79] [7.68]

[18.98]
Dimension
mm [inches] xx06000232.eps
Figure 713: Dimension drawing of a one phase impedance resistor unit

[1.50]
[10.47]
[7.50]
[0.33] [18.31] [0.79] [7.68]

[18.98]
en06000234.eps
[inches]
Figure 714: Dimension drawing of a three phase high impedance resistor unit
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23.4 Mounting alternatives IP11721-1 v1
23.4.1 Flush mounting IP10303-1 v1
23.4.1.1 Overview M11967-3 v4
The flush mounting kit can be used for case sizes:
• 1/2 x 19”
• 3/4 x 19”
• 1/1 x 19”
• 1/4 x 19” (RHGS6 6U)
Only a single case can be mounted in each cut-out on the cubicle panel, for class IP54 protection.
Flush mounting cannot be used for side-by-side mounted IEDs when IP54 class
must be fulfilled. Only IP20 class can be obtained when mounting two cases side-
by-side in one (1) cut-out.
To obtain IP54 class protection, an additional factory mounted sealing must be

ordered when ordering the IED.
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23.4.1.2 Mounting procedure for flush mounting M11942-2 v4
Figure 715: Flush mounting details.
PosNo Description Quantity Type

1 Sealing strip, used to obtain IP54 - -
class. The sealing strip is factory
mounted between the case and
front plate.
2 Fastener 4 -
3 Groove - -
4 Screw, self tapping 4 2.9x9.5 mm
5 Joining point of sealing strip - -
6 Panel - -
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23.4.2 19” panel rack mounting IP10313-1 v1
23.4.2.1 Overview SEMOD127656-5 v4
All IED sizes can be mounted in a standard 19” cubicle rack by using a suitably sized mounting kit
consisting of two mounting angles, their fastening screws and washers.
The mounting angles are reversible which enables mounting of IED size 1/2 x 19” or 3/4 x 19” either
to the left or the right side of the cubicle.
A separately ordered rack mounting kit for side-by-side mounted IEDs or IEDs
together with RHGS cases should be selected so that the total size equals 19”.
Use only the screws included in the mounting kit when mounting the plates and the
angles on the IED. Screws with wrong dimension may damage the PCBs inside the
IED.
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23.4.2.2 Mounting procedure for 19” panel rack mounting M11948-2 v7
1a
1b
Figure 716: 19” panel rack mounting details
The required torque for the screws is 3.5 Nm.

1a, 1b Mounting angles, can be mounted either 2 -
to the left or the right side of the case
2 Screw 8 M4x6
3 Washer 8 M4x6
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23.4.3 Wall mounting IP10316-1 v1
23.4.3.1 Overview M11973-3 v5
All case sizes, 1/2 x 19”, 3/4 x 19”,1/1 x 19”, can be wall mounted. It is also possible to mount the
IED on a panel or in a cubicle.
When mounting the side plates, use screws that follow the recommended
dimensions. Using screws with other dimensions may damage the PCBs inside the
IED.
If fiber cables are bent too much, the signal can be weakened. Wall mounting is
therefore not recommended for any communication modules with fiber
connection.
23.4.3.2 Mounting procedure for wall mounting M11949-2 v2
2
3
1 4
IEC130 00266-1-en.vsd
Figure 717: Wall mounting details.
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1 Bushing 4 -
2 Screw 8 M4x10
3 Screw 4 M6x12 or
corresponding
4 Mounting bar 2 -
5 Screw 6 M5x8
6 Side plate 2 -
23.4.3.3 How to reach the rear side of the IED M11941-2 v5
The IED can be equipped with a rear protection cover recommended to be used with this type of
mounting. See figure 718.
To reach the rear side of the IED, a free space of 3.2 inches is required on the unhinged side.
View from above
3
1
3.2" 2
(80 mm)
ANSI_en06000135.vsd
Figure 718: How to reach the connectors on the rear side of the IED.
PosNo Description Type

1 Screw M4x10
2 Screw M5x8
3 Rear protection cover (Ordered separately)
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23.4.4 Side-by-side 19” rack mounting IP10323-1 v1
23.4.4.1 Overview M11974-3 v2
IED case size 1/2 x 19” or 3/4 x 19” and RHGS cases can be mounted side-by-side up to a maximum
size of 19”. For side-by-side rack mounting, the side-by-side mounting kit together with the 19”
rack panel mounting kit must be used. The mounting kit has to be ordered separately.
When mounting the plates and the angles on the IED, use screws that follow the
recommended dimensions. Using screws with other dimensions may damage the
PCBs inside the IED.
23.4.4.2 Mounting procedure for side-by-side rack mounting M11955-2 v4
2
1
Figure 719: Side-by-side rack mounting details.
The required torque for the screws is 3.5 Nm.

1 Mounting plate 2 -
2, 3 Screw 16 M4x6
4 Mounting angle 2 -
5 Washer 16 M4x6
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23.4.4.3 IED mounted with a RHGS6 case M11953-3 v3
A 1/2 x 19” or 3/4 x 19” size IED can be mounted with a RHGS case (6 or 12 depending on IED size).
The RHGS case can be used for mounting a test switch of type RTXP 24. It also has enough space
for a terminal base of RX 2 type for mounting of, for example, a DC-switch or two trip IEDs.
1 2 1 2
1 1 1 1
2 2 2 2
3 3 3 3
4 4 4 4
5 5 5 5
6 6 6 6
7 7 7 7
8 8 8 8
Figure 720: IED (1/2 x 19”) mounted with a RHGS6 case containing a test switch module
equipped with only a test switch and a RX2 terminal base
23.4.5 Side-by-side flush mounting IP10329-1 v1
23.4.5.1 Overview M11975-3 v3
If IP54 is required it is not allowed to flush mount side by side mounted cases. If your application
demands side-by-side flush mounting, the side-by-side mounting details kit and the 19” panel rack
mounting kit must be used. The mounting kit has to be ordered separately. The maximum size of
the panel cut out is 19”.
With side-by-side flush mounting installation, only IP class 20 is obtained. To reach

IP class 54, it is required to mount the IEDs separately. For cut out dimensions of
separately mounted IEDs, see section "Flush mounting".
Use only the screws included in the mounting kit when mounting the plates and the
angles on the IED. Screws with wrong dimension may damage the PCBs inside the
IED.
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Please contact factory for special add on plates for mounting FT switches on the
side (for 1/2 19" case) or bottom of the relay.
23.4.5.2 Mounting procedure for side-by-side flush mounting M12730-6 v3
1 2
Figure 721: Side-by-side flush mounting details (RHGS6 side-by-side with 1/2 x 19” IED).

1 Mounting plate 2 -
2, 3 Screw 16 M4x6
4 Mounting angle 2 -
23.5 Technical data IP16276-1 v1
23.5.1 Enclosure IP16278-1 v1
M11778-1 v4
Table 1121: Case

Material Steel sheet
Front plate Steel sheet profile with cut-out for HMI
Surface treatment Aluzink preplated steel
Finish Light grey (RAL 7035)
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M12327-1 v3
Table 1122: Water and dust protection level according to IEC 60529
Front IP40 (IP54 with sealing strip)

Sides, top and bottom IP20
Rear side IP20 with screw compression type
IP10 with ring lug terminals
M11777-1 v4
Table 1123: Weight

Case size Weight
6U, 1/2 x 19” £
6U, 3/4 x 19” £ 33 lb
6U, 1/1 x 19” £ 40 lb
23.5.2 Electrical safety GUID-2825B541-DD31-4DAF-B5B3-97555F81A1C2 v1
GUID-1CF5B10A-CF8B-407D-8D87-F4B48B43C2B2 v1
Table 1124: Electrical safety according to IEC 60255-27
Equipment class I (protective earthed)

Overvoltage category III
Pollution degree 2 (normally only non-conductive pollution occurs except that occasionally a temporary
conductivity caused by condensation is to be expected)
23.5.3 Connection system SEMOD53371-1 v1
SEMOD53376-2 v6
Table 1125: CT and VT circuit connectors

Connector type Rated voltage and current Maximum conductor area
Screw compression type 250 V AC, 20 A 4 mm2 (AWG12)
2 x 2.5 mm2 (2 x AWG14)
Terminal blocks suitable for ring lug terminals 250 V AC, 20 A 4 mm2 (AWG12)
M12583-1 v5
Table 1126: Auxiliary power supply and binary I/O connectors

Connector type Rated voltage Maximum conductor area
Screw compression type 250 V AC 2.5 mm2 (AWG14)
2 × 1 mm2 (2 x AWG18)
Terminal blocks suitable for ring lug terminals 300 V AC 3 mm2 (AWG14)
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Because of limitations of space, when ring lug terminal is ordered for Binary I/O
connections, one blank slot is necessary between two adjacent IO cards. Please
refer to the ordering particulars for details.
23.5.4 Influencing factors SEMOD52785-1 v1
M16705-1 v15
Table 1127: Temperature and humidity influence

Parameter Reference value Nominal range Influence
Ambient temperature, +20°C -25°C to +55°C 0.02%/°C
operate value
Relative humidity 10-90% 10-90% -
Operative range 0-95%
Storage temperature - -40°C to +70°C -
Table 1128: Auxiliary DC supply voltage influence on functionality during operation

Dependence on Reference value Within nominal Influence
range
Ripple, in DC auxiliary voltage max. 2% 15% of EL 0.01%/%
Operative range Full wave
rectified
Auxiliary voltage dependence, ±20% of EL 0.01%/%
operate value
Interrupted auxiliary DC voltage 24-60 V DC ± 20%
100-250 V DC
Interruption
±20%
interval
0–50 ms No restart
0–∞ s Correct behaviour at power
down
Restart time < 300 s
Table 1129: Frequency influence (reference standard: IEC 60255–1)

Dependence on Within nominal range Influence
Frequency dependence, operate value fn ±2.5 Hz for 50 Hz ±1.0%/Hz
fn ±3.0 Hz for 60 Hz
Frequency dependence for distance fn ±2.5 Hz for 50 Hz ±2.0%/Hz

protection operate value fn ±3.0 Hz for 60 Hz
Harmonic frequency dependence (20% 2nd, 3rd and 5th harmonic of fn ±2.0%
content)
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Dependence on Within nominal range Influence

Harmonic frequency dependence for 2nd, 3rd and 5th harmonic of fn ±10.0%
distance protection (10% content)
Harmonic frequency dependence for high 2nd, 3rd and 5th harmonic of fn ±10.0%
impedance differential protection (10%
content)
Harmonic frequency dependence for 2nd, 3rd and 5th harmonic of fr ±3.0%
23.5.5 Type tests according to standard IP16288-1 v1
M16706-1 v13.1.1
Table 1130: Electromagnetic compatibility

Test Type test values Reference standards
1 MHz Oscillatory burst disturbance 2.5 kV IEC 60255-26
100 kHz slow damped oscillatory wave 2.5 kV IEC 61000-4-18, Class III
immunity test
Ring wave immunity test, 100 kHz 2-4 kV IEC 61000-4-12, Class IV
Surge withstand capability test 2.5 kV, oscillatory IEEE/ANSI C37.90.1
4.0 kV, fast transient
Electrostatic discharge 15 kV air discharge IEC 60255-26
Direct application 8 kV contact discharge
Indirect application 8 kV contact discharge IEC 61000-4-2, Class IV
Electrostatic discharge 15 kV air discharge IEEE/ANSI C37.90.1
Direct application 8 kV contact discharge
Indirect application 8 kV contact discharge
Fast transient disturbance 4 kV IEC 60255-26, Zone A
2 kV, MIM mA-inputs IEC 60255-26, Zone B
Surge immunity test 2-4 kV, 1.2/50ms high energy IEC 60255-26, Zone A
1-2 kV, BOM and IRF outputs IEC 60255-26, Zone B
Power frequency immunity test 150-300 V IEC 60255-26, Zone A

Conducted common mode immunity test 15 Hz-150 kHz IEC 61000-4-16, Class IV
Power frequency magnetic field test 1000 A/m, 3 s IEC 61000-4-8, Class V
100 A/m, cont.
Pulse magnetic field immunity test 1000 A/m IEC 61000–4–9, Class V
Damped oscillatory magnetic field test 100 A/m IEC 61000-4-10, Class V
Radiated electromagnetic field 20 V/m, 80-1000 MHz IEC 60255-26
disturbance
1.4-2.7 GHz
Radiated electromagnetic field 20 V/m IEEE/ANSI C37.90.2
disturbance 80-1000 MHz
10 V/m, 5.1-6.0 GHz EN 50121-5
Conducted electromagnetic field 10 V, 0.15-80 MHz IEC 60255-26
disturbance
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Radiated emission 30-5000 MHz IEC 60255-26
Radiated emission 30-5000 MHz IEEE/ANSI C63.4, FCC
Conducted emission 0.15-30 MHz IEC 60255-26
Table 1131: Insulation

Test Type test values Reference standard
Dielectric test 2.0 kV AC, 1 min. IEC 60255-27
1.0 kVrms, 1 min.) ANSI C37.90
IEEE 802.3-2015,
Impulse voltage test 5 kV, 1.2/50ms, 0.5 J Environment A
1 kV, 1.2/50 ms 0.5 J
Insulation resistance > 100 MW at 500 VDC
Table 1132: Environmental tests

Test Type test value Reference standard
Cold operation test Test Ad for 16 h at -25°C IEC 60068-2-1
Cold storage test Test Ab for 16 h at -40°C IEC 60068-2-1
Dry heat operation test Test Bd for 16 h at +70°C IEC 60068-2-2
Dry heat storage test Test Bb for 16 h at +85°C IEC 60068-2-2
Change of temperature test Test Nb for 5 cycles at -25°C to +70°C IEC 60068-2-14
Damp heat test, steady state Test Ca for 10 days at +40°C and humidity 93% IEC 60068-2-78
Damp heat test, cyclic Test Db for 6 cycles at +25 to +55°C and IEC 60068-2-30
humidity 93 to 95% (1 cycle = 24 hours)
Table 1133: CE compliance

Test According to
Immunity EN 60255–26
Emissivity EN 60255–26
Low voltage directive EN 60255–27
Table 1134: Mechanical tests

Vibration response test Class II IEC 60255-21-1
Vibration endurance test Class I IEC 60255-21-1
Shock response test Class I IEC 60255-21-2
Shock withstand test Class I IEC 60255-21-2
Bump test Class I IEC 60255-21-2
Seismic test Class II IEC 60255-21-3
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Labels
Section 24 Labels
24.1 Labels on IED SEMOD168249-4 v3.1.1
Front view of IED
10
7
2
7
6
3
11
4
=IEC15000506=2=en=Original.vsdx
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Labels
1
1 QR-code containing the complete ordering code
2 Power supply module (PSM)
10
3 mA input module (MIM)
9 4 Ordering and serial number
5 Manufacturer
8 6 Transformer designations
7 7 Transformer input module, rated currents and

2 voltages
7
8 Optional, customer specific information
6 9 Order number, dc supply voltage and rated

frequency
6 10 Product type, description and serial number
3
Figure 722: Example of IED label
Rear view of IED
4
en06000573.ep
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Technical manual
Labels
1 Warning label
2 Caution label
3 Class 1 laser product label
4 Warning label
1375
Technical manual
1376
Connection diagrams
Section 25 Connection diagrams GUID-CF4EFFA5-3081-4FC7-9A14-ED127C3C0FDE v3
The connection diagrams are delivered on the IED Connectivity package DVD as part of the
product delivery.
The latest versions of the connection diagrams can be downloaded from

http://www.abb.com/substationautomation.
Connection diagrams for Customized products
Connection diagram, 670 series 2.1 1MRK002802-AF
1377
Technical manual
1378
Inverse time characteristics
Section 26 Inverse time characteristics
26.1 Application M16686-3 v5
In order to assure time selectivity between different overcurrent protections at different points in
the network different time delays for the different protections are normally used. The simplest
way to do this is to use definite time-lag. In more sophisticated applications current dependent
time characteristics are used. Both alternatives are shown in a simple application with three
overcurrent protections operating in series.
IPickup IPickup IPickup
xx05000129_ansi.vsd
Figure 723: Three overcurrent protections operating in series
Stage 3
Time
Stage 2 Stage 2
Stage 1 Stage 1 Stage 1
Fault point
position
en05000130.vsd
Figure 724: Definite time overcurrent characteristics
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Technical manual
Time
Fault point
position
en05000131.vsd
Figure 725: Inverse time overcurrent characteristics with inst. function

The inverse time characteristic makes it possible to minimize the fault clearance time and still
assure the selectivity between protections.
To assure selectivity between protections there must be a time margin between the operation
time of the protections. This required time margin is dependent of following factors, in a simple
case with two protections in series:
• Difference between pickup time of the protections to be co-ordinated

• Opening time of the breaker closest to the studied fault
• Reset times of the protections
• Margin dependent of the time delay inaccuracy of the protections
Assume we have the following network case.
A1 B1
Feeder
51 51
Time axis
t=0 t=t1 t=t2 t=t3
en05000132_ansi.vsd
Figure 726: Selectivity steps for a fault on feeder B1
where:
t=0 is The fault occurs
t=t1 is Protection B1 trips
t=t2 is Breaker at B1 opens
t=t3 is Protection A1 resets
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Technical manual
In the case protection B1 shall trip without any intentional delay (instantaneous). When the fault
occurs the protections pickup to detect the fault current. After the time t1 the protection B1 send a
trip signal to the circuit breaker. The protection A1 starts its delay timer at the same time, with
some deviation in time due to differences between the two protections. There is a possibility that
A1 will pickup before the trip is sent to the B1 circuit breaker. At the time t2 the circuit breaker B1
has opened its primary contacts and thus the fault current is interrupted. The breaker time (t2 - t1)
can differ between different faults. The maximum opening time can be given from manuals and
test protocols. Still at t2 the timer of protection A1 is active. At time t3 the protection A1 is reset,
that is the timer is stopped.
In most applications it is required that the times shall reset as fast as possible when the current
fed to the protection drops below the set current level, the reset time shall be minimized. In some
applications it is however beneficial to have some type of delayed reset time of the overcurrent
function. This can be the case in the following applications:
• If there is a risk of intermittent faults. If the current IED, close to the faults, picks up and
resets there is a risk of unselective trip from other protections in the system.
• Delayed resetting could give accelerated fault clearance in case of automatic reclosing to a
permanent fault.
• Overcurrent protection functions are sometimes used as release criterion for other protection
functions. It can often be valuable to have a reset delay to assure the release function.
26.2 Principle of operation IP15777-1 v2
26.2.1 Mode of operation M16687-3 v6
The function can trip in a definite time-lag mode or in a current definite inverse time mode. For the
inverse time characteristic both ANSI and IEC based standard curves are available. Also
programmable curve types are supported via the component inputs: p, A, B, C pr, tr, and cr.
Different characteristics for reset delay can also be chosen.
If current in any phase exceeds the set pickup current value (here internal signal pickupValue), a
timer, according to the selected operating mode, is started. The component always uses the
maximum of the three phase current values as the current level used in timing calculations.
In case of definite time-lag mode the timer will run constantly until the time is reached or until the
current drops below the reset value (pickup value minus the hysteresis) and the reset time has
elapsed.
For definite time delay curve ANSI/IEEE Definite time or IEC Definite time are chosen.
The general expression for inverse time curves is according to equation 228.
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Technical manual
æ ö
ç ÷
t [s ] = ç + B ÷ × td
A
ç P ÷
çç æç ö
i
÷ -C ÷÷
è è Pickupn ø ø
where:
p, A, B, C are constants defined for each curve type,
Pickupn is the set pickup current for step n,
td is set time multiplier for step n and
i is the measured current.
For inverse time characteristics a time will be initiated when the current reaches the set pickup
level. From the general expression of the characteristic the following can be seen:
ææ P
ö
( t op - B × td ) × çç
i ö
÷
ç è Pickupn ø
- C ÷ = A × td
÷
è ø
where:
top is the operating time of the protection
The time elapsed to the moment of trip is reached when the integral fulfils according to
equation 230, in addition to the constant time delay:
t
ææ i ö
P
ö
òçç ÷
ç è Pickupn ø
0è
- C ÷ × dt ³ A × td
÷
ø
For the numerical protection the sum below must fulfil the equation for trip.
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Technical manual
n æ æ i ( j ) öP ö
Dt × å çç
ç Pickupn ø
j =1 è è
÷ - C ÷ ³ A × td
÷
ø
where:
j=1 is the first protection execution cycle when a fault has been detected,
that is, when
i
>1
Pickupn
Dt is the time interval between two consecutive executions of the

protection algorithm,
n is the number of the execution of the algorithm when the trip time
equation is fulfilled, that is, when a trip is given and
i (j) is the fault current at time j
For inverse time operation, the inverse time characteristic is selectable. Both the IEC and ANSI/
IEEE standardized inverse time characteristics are supported.
For the IEC curves there is also a setting of the minimum time-lag of operation, see figure 727.
Operate
time
tMin
Current
IMin
Figure 727: Minimum time-lag operation for the IEC curves

In order to fully comply with IEC curves definition setting parameter tMin shall be set to the value
which is equal to the operating time of the selected IEC inverse time curve for measured current of
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Technical manual
twenty times the set current pickup value. Note that the operating time value is dependent on the
selected setting value for time multiplier k.
In addition to the ANSI and IEC standardized characteristics, there are also two additional inverse
curves available; the RI curve and the RD curve.
The RI inverse time curve emulates the characteristic of the electromechanical ASEA relay RI. The
curve is described by equation 233:
æ ö
ç td ÷
t [s ] = ç ÷
çç 0.339 - 0.235 × Pickupn ÷÷
è i ø
where:
Pickupn is the set pickup current for step n
td is set time multiplier for step n
i is the measured current
The RD inverse curve gives a logarithmic delay, as used in the Combiflex protection RXIDG. The
curve enables a high degree of selectivity required for sensitive residual ground-fault current
protection, with ability to detect high-resistive ground faults. The curve is described by
equation 234:
æ i ö
[ ]
t s = 5.8 - 1.35 × ln ç ÷
è td × Pickupn ø
where:
Pickupn is the set pickup current for step n,
td is set time multiplier for step n and
i is the measured current
If the curve type programmable is chosen, the user can make a tailor made inverse time curve
according to the general equation 235.
æ ö
ç ÷
t [s ] = ç + B ÷ × td
A
ç P ÷
çç æç ö
i
÷ -C ÷÷
è è Pickupn ø ø
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Technical manual
Also the reset time of the delayed function can be controlled. There is the possibility to choose
between three different reset time-lags.
• Instantaneous Reset
• IEC Reset
• ANSI Reset.
If instantaneous reset is chosen the timer will be reset directly when the current drops below the
set pickup current level minus the hysteresis.
If IEC reset is chosen the timer will be reset after a set constant time when the current drops
below the set pickup current level minus the hysteresis.
If ANSI reset time is chosen the reset time will be dependent of the current after fault clearance
(when the current drops below the pickup current level minus the hysteresis). The timer will reset
æ ö
ç tr
÷
t [s] = ç ÷ × td
ç æ i ö2 ÷
çç ÷ -1 ÷
è è pickupn ø ø
where:
The set value tr is the reset time in case of zero current after fault clearance.
The possibility of choice of reset characteristics is to some extent dependent of the choice of time
delay characteristic.
For the definite time delay characteristics the possible reset time settings are instantaneous and
IEC constant time reset.
For ANSI inverse time delay characteristics all three types of reset time characteristics are
available; instantaneous, IEC constant time reset and ANSI current dependent reset time.
For IEC inverse time delay characteristics the possible delay time settings are instantaneous and
IEC set constant time reset).
For the programmable inverse time delay characteristics all three types of reset time
characteristics are available; instantaneous, IEC constant time reset and ANSI current dependent
reset time. If the current dependent type is used settings pr, tr and cr must be given, see
equation 237:
æ ö
ç tr
÷
t [s] = ç ÷ × td
ç æ i ö pr ÷
çç ÷ - cr ÷
è è pickupn ø ø
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Technical manual
For RI and RD inverse time delay characteristics the possible delay time settings are instantaneous
and IEC constant time reset.
GUID-F7AA2194-4D1C-4475-8853-C7D064912614 v4
When inverse time overcurrent characteristic is selected, the trip time of the stage
will be the sum of the inverse time delay and the set definite time delay. Thus, if
only the inverse time delay is required, it is important to set the definite time delay
for that stage to zero.
26.3 Inverse characteristics IP15797-1 v2
M12388-1 v23
Table 1135: ANSI Inverse time characteristics

Operating characteristic: 0.05 ≤ td ≤ 999.00 ANSI/IEEE C37.112 ,
1.5 x Iset ≤ I ≤ 20 x Iset ±2.0% or ±40 ms
æ A ö
t = ç P + B ÷ × td
ç ( I - 1) ÷
è ø
Reset characteristic:
tr
t = × td
(I 2
-1 )
I = Imeasured/Iset
ANSI Extremely Inverse A=28.2, B=0.1217, P=2.0 , tr=29.1

ANSI Very inverse A=19.61, B=0.491, P=2.0 , tr=21.6
ANSI Normal Inverse A=0.0086, B=0.0185, P=0.02, tr=0.46
ANSI Moderately Inverse A=0.0515, B=0.1140, P=0.02, tr=4.85
ANSI Long Time Extremely Inverse A=64.07, B=0.250, P=2.0, tr=30
ANSI Long Time Very Inverse A=28.55, B=0.712, P=2.0, tr=13.46
ANSI Long Time Inverse A=0.086, B=0.185, P=0.02, tr=4.6
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Table 1136: ANSI Inverse time characteristics for Line differential protection
Operating characteristic: 0.05 ≤ td ≤ 1.10 ANSI/IEEE C37.112 ,
±5.0% or ±40 ms
æ A ö
t = ç P + B ÷ × td
ç ( I - 1) ÷
è ø
tr
t = × td
(I 2
-1 )
I = Imeasured/Iset

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Technical manual
Table 1137: IEC Inverse time characteristics

Operating characteristic: 0.05 ≤ td ≤ 999.00 IEC 60255-151, ±2.0%
1.5 x Iset ≤ I ≤ 20 x Iset or ±40 ms whichever
is greater
æ A ö
t = ç P ÷ × td
ç ( I - 1) ÷
è ø
I = Imeasured/Iset
IEC Normal Inverse A=0.14, P=0.02

IEC Very inverse A=13.5, P=1.0
IEC Inverse A=0.14, P=0.02
IEC Extremely inverse A=80.0, P=2.0
IEC Short time inverse A=0.05, P=0.04
IEC Long time inverse A=120, P=1.0
Programmable characteristic td = (0.05-999) in steps of 0.01
Trip characteristic: A=(0.005-200.000) in steps of 0.001
B=(0.00-20.00) in steps of 0.01
æ A ö C=(0.1-10.0) in steps of 0.1
t = ç P + B ÷ × td P=(0.005-3.000) in steps of 0.001
ç (I - C ) ÷ TR=(0.005-100.000) in steps of 0.001
è ø
CR=(0.1-10.0) in steps of 0.1
PR=(0.005-3.000) in steps of 0.001
TR
t = × td
(I PR
- CR )
I = Imeasured/Iset
The parameter setting Characteristn = Reserved (where, n = 1 - 4) shall not be used,

since this parameter setting is for future use and not implemented yet.
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Technical manual
Table 1138: IEC Inverse time characteristics for Line differential protection
Operating characteristic: 0.05 ≤ td ≤ 1.10 IEC 60255-151, ±5.0%
or ±40 ms whichever
is greater
æ A ö
t = ç P ÷ × td
ç ( I - 1) ÷
è ø
I = Imeasured/Iset

Programmable characteristic td = (0.05-999) in steps of 0.01
B=(0.00-20.00) in steps of 0.01
æ A ö C=(0.1-10.0) in steps of 0.1
ç (I - C ) ÷ TR=(0.005-100.000) in steps of 0.001
è ø
CR=(0.1-10.0) in steps of 0.1
PR=(0.005-3.000) in steps of 0.001
TR
t = × td
(I PR
- CR )
I = Imeasured/Iset
Table 1139: RI and RD type inverse time characteristics

RI type inverse characteristic 0.05 ≤ td ≤ 999.00 IEC 60255-151, ±2.0%
1 is greater
t = × td
0.236
0.339 -
I
I = Imeasured/Iset
RD type logarithmic inverse

characteristic
æ
t = 5.8 - ç 1.35 × In
I ö
÷
è td ø
I = Imeasured/Iset
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Technical manual
Table 1140:RI and RD type inverse time characteristics for Line differential protection
RI type inverse characteristic 0.05 ≤ td ≤ 1.10 IEC 60255-151, ±5.0%
1 is greater
t = × td
0.236
0.339 -
I
I = Imeasured/Iset

characteristic
t = 5.8 - ç 1.35 × In
æ I ö
÷
è td ø
I = Imeasured/Iset
GUID-19F8E187-4ED0-48C3-92F6-0D9EAA2B39BB v4
Table 1141: ANSI Inverse time characteristics for Sensitive directional residual overcurrent and power protection
Operating characteristic: 0.05 ≤ k ≤ 2.00 ANSI/IEEE C37.112 ,
1.5 x Iset ≤ I ≤ 20 x Iset ±5.0% or ±160 ms
æ A ö
t = ç P + B ÷ × td
ç ( I - 1) ÷
è ø
tr
t = × td
(I 2
-1 )
I = Imeasured/Iset

1390
Technical manual
Table 1142: IEC Inverse time characteristics for Sensitive directional residual overcurrent and power protection
Operating characteristic: 0.05 ≤ k ≤ 2.00 IEC 60255-151, ±5.0%
is greater
æ A ö
t = ç P ÷ × td
ç ( I - 1) ÷
è ø
I = Imeasured/Iset

Programmable characteristic td = (0.05-2.00) in steps of 0.01
B=(0.00-20.00) in steps of 0.01
æ A ö C=(0.1-10.0) in steps of 0.1
ç (I - C ) ÷ TR=(0.005-100.000) in steps of 0.001
è ø
CR=(0.1-10.0) in steps of 0.1
PR=(0.005-3.000) in steps of 0.001
TR
t = × td
(I PR
- CR )
I = Imeasured/Iset
The parameter setting TimeChar = Reserved shall not be used, since this parameter
setting is for future use and not implemented yet.
1391
Technical manual
Table 1143: RI and RD type inverse time characteristics for Sensitive directional residual overcurrent and power
protection
RI type inverse characteristic 0.05 ≤ k ≤ 2.00 IEC 60255-151, ±5.0%
1 is greater
t = × td
0.236
0.339 -
I
I = Imeasured/Iset

characteristic
t = 5.8 - ç 1.35 × In
æ I ö
÷
è td ø
I = Imeasured/Iset
GUID-2AE8C92E-5DA8-487F-927D-8E553EE29240 v2
Table 1144:ANSI Inverse time characteristics for Voltage restrained time overcurrent protection
Operating characteristic: td = (0.05-999.00) in steps of 0.01 ANSI/IEEE C37.112 , ±
5.0% or ±40 ms
æ A ö
t = ç P + B ÷ × td
ç ( I - 1) ÷
è ø
tr
t = × td
(I 2
-1 )
I = Imeasured/Iset

1392
Technical manual
Table 1145: IEC Inverse time characteristics for Voltage restrained time overcurrent protection
Operating characteristic: td = (0.05-999.00) in steps of 0.01 IEC 60255-151, ±5.0%
is greater
æ A ö
t = ç P ÷ × td
ç ( I - 1) ÷
è ø
I = Imeasured/Iset

SEMOD116978-2 v9
Table 1146: Inverse time characteristics for overvoltage protection

Type A curve: td = (0.05-1.10) in steps of 0.01 ±5.0% or ±45 ms
td
t =
æ V - VPickup ö
ç ÷
è VPickup ø
V = Vmeasured
Type B curve: td = (0.05-1.10) in steps of 0.01
td ⋅ 480
t = + 0.035
2.0
 V − VPickup 
 32 ⋅ − 0.5 
 VPickup 
Type C curve: td = (0.05-1.10) in steps of 0.01
td ⋅ 480
t = + 0.035
3.0
 32 ⋅ − 0.5 
 VPickup 
Programmable curve: td = (0.05-1.10) in steps of 0.01

A = (0.005-200.000) in steps of 0.001
td × A B = (0.50-100.00) in steps of 0.01
t = +D C = (0.0-1.0) in steps of 0.1
P
æ V - VPickup ö D = (0.000-60.000) in steps of 0.001
çB × -C÷ P = (0.000-3.000) in steps of 0.001
è VPickup ø
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Technical manual
Table 1147: Inverse time characteristics for undervoltage protection

Type A curve: td = (0.05-1.10) in steps of 0.01 ±5.0% or ±45 ms
td
t =
æ VPickup - V ö
ç ÷
è VPickup ø
V = Vmeasured
Type B curve: td = (0.05-1.10) in steps of 0.01
td × 480
t = + 0.055
2.0
æ VPickup - V ö
ç 32 × - 0.5 ÷
è VPickup ø
V = Vmeasured
Programmable curve: td = (0.05-1.10) in steps of 0.01

A = (0.005-200.000) in steps of 0.001
B = (0.50-100.00) in steps of 0.01
é ù
C = (0.0-1.0) in steps of 0.1
ê ú
td × A D = (0.000-60.000) in steps of 0.001
t = ê ú+D
P = (0.000-3.000) in steps of 0.001
ê æ VPickup - V ö ú
P
êçB × -C÷ ú
ëè VPickup ø û
V = Vmeasured
1394
Technical manual
Table 1148: Inverse time characteristics for residual overvoltage protection

Type A curve: td = (0.05-1.10) in steps ±5.0% or ±45 ms whichever is greater
of 0.01
td
t =
æ V - VPickup ö
ç ÷
è VPickup ø
V = Vmeasured
Type B curve: td = (0.05-1.10) in steps

of 0.01
td ⋅ 480
t = + 0.035
2.0
 32 ⋅ − 0.5 
 VPickup 
Type C curve: td = (0.05-1.10) in steps

of 0.01
td ⋅ 480
t = + 0.035
3.0
 32 ⋅ − 0.5 
 VPickup 
Programmable curve: td = (0.05-1.10) in steps

of 0.01
td × A A = (0.005-200.000) in
t = +D steps of 0.001
P
æ V - VPickup ö B = (0.50-100.00) in
çB × -C÷ steps of 0.01
è VPickup ø C = (0.0-1.0) in steps of
0.1
D = (0.000-60.000) in
steps of 0.001
P = (0.000-3.000) in
steps of 0.001
1395
Technical manual
SEMOD118114-4 v4
A070750 V2 EN-US
Figure 728: ANSI Extremely inverse time characteristics
1396
Technical manual
A070751 V2 EN-US
Figure 729: ANSI Very inverse time characteristics
1397
Technical manual
A070752 V2 EN-US
Figure 730: ANSI Normal inverse time characteristics
1398
Technical manual
A070753 V2 EN-US
Figure 731: ANSI Moderately inverse time characteristics
1399
Technical manual
A070817 V2 EN-US
Figure 732: ANSI Long time extremely inverse time characteristics
1400
Technical manual
A070818 V2 EN-US
Figure 733: ANSI Long time very inverse time characteristics
1401
Technical manual
A070819 V2 EN-US
Figure 734: ANSI Long time inverse time characteristics
1402
Technical manual
A070820 V2 EN-US
Figure 735: IEC Normal inverse time characteristics
1403
Technical manual
A070821 V2 EN-US
Figure 736: IEC Very inverse time characteristics
1404
Technical manual
A070822 V2 EN-US
Figure 737: IEC Inverse time characteristics
1405
Technical manual
A070823 V2 EN-US
Figure 738: IEC Extremely inverse time characteristics
1406
Technical manual
A070824 V2 EN-US
Figure 739: IEC Short time inverse time characteristics
1407
Technical manual
A070825 V2 EN-US
Figure 740: IEC Long time inverse time characteristics
1408
Technical manual
A070826 V2 EN-US
Figure 741: RI-type inverse time characteristics
1409
Technical manual
A070827 V2 EN-US
Figure 742: RD-type inverse time characteristics
1410
Technical manual
GUID-ACF4044C-052E-4CBD-8247-C6ABE3796FA6 V1 EN-US
Figure 743: Inverse curve A characteristic of overvoltage protection
1411
Technical manual
GUID-F5E0E1C2-48C8-4DC7-A84B-174544C09142 V1 EN-US
Figure 744: Inverse curve B characteristic of overvoltage protection
1412
Technical manual
GUID-A9898DB7-90A3-47F2-AEF9-45FF148CB679 V1 EN-US
Figure 745: Inverse curve C characteristic of overvoltage protection
1413
Technical manual
GUID-35F40C3B-B483-40E6-9767-69C1536E3CBC V1 EN-US
Figure 746: Inverse curve A characteristic of undervoltage protection
1414
Technical manual
GUID-B55D0F5F-9265-4D9A-A7C0-E274AA3A6BB1 V1 EN-US
Figure 747: Inverse curve B characteristic of undervoltage protection
1415
Technical manual
1416
Glossary
Section 27 Glossary M14893-1 v18
AC Alternating current
ACC Actual channel
ACT Application configuration tool within PCM600
A/D converter Analog-to-digital converter
ADBS Amplitude deadband supervision
ADM Analog digital conversion module, with time synchronization
AI Analog input
ANSI American National Standards Institute
AR Autoreclosing
ASCT Auxiliary summation current transformer
ASD Adaptive signal detection
ASDU Application service data unit
AWG American Wire Gauge standard
BBP Busbar protection
BFOC/2,5 Bayonet fiber optic connector
BFP Breaker failure protection
BI Binary input
BIM Binary input module
BOM Binary output module
BOS Binary outputs status
BR External bistable relay
BS British Standards
BSR Binary signal transfer function, receiver blocks
BST Binary signal transfer function, transmit blocks
C37.94 IEEE/ANSI protocol used when sending binary signals between IEDs
CAN Controller Area Network. ISO standard (ISO 11898) for serial
communication
CB Circuit breaker
CBM Combined backplane module
CCITT Consultative Committee for International Telegraph and Telephony. A
United Nations-sponsored standards body within the International
Telecommunications Union.
CCM CAN carrier module
CCVT Capacitive Coupled Voltage Transformer
1417
Technical manual
Glossary
Class C Protection Current Transformer class as per IEEE/ ANSI

CMPPS Combined megapulses per second
CMT Communication Management tool in PCM600
CO cycle Close-open cycle
Codirectional Way of transmitting G.703 over a balanced line. Involves two twisted pairs
making it possible to transmit information in both directions
COM Command
COMTRADE Standard Common Format for Transient Data Exchange format for
Disturbance recorder according to IEEE/ANSI C37.111, 1999 / IEC 60255-24
Contra-directional Way of transmitting G.703 over a balanced line. Involves four twisted pairs,
two of which are used for transmitting data in both directions and two for
transmitting clock signals
COT Cause of transmission
CPU Central processing unit
CR Carrier receive
CRC Cyclic redundancy check
CROB Control relay output block
CS Carrier send
CT Current transformer
CU Communication unit
CVT or CCVT Capacitive voltage transformer
DAR Delayed autoreclosing
DARPA Defense Advanced Research Projects Agency (The US developer of the
TCP/IP protocol etc.)
DBDL Dead bus dead line
DBLL Dead bus live line
DC Direct current
DFC Data flow control
DFT Discrete Fourier transform
DHCP Dynamic Host Configuration Protocol
DIP-switch Small switch mounted on a printed circuit board
DI Digital input
DLLB Dead line live bus
DNP Distributed Network Protocol as per IEEE Std 1815-2012
DR Disturbance recorder
DRAM Dynamic random access memory
DRH Disturbance report handler
DSP Digital signal processor
DTT Direct transfer trip scheme
1418
Technical manual
Glossary
ECT Ethernet configuration tool

EHV network Extra high voltage network
EIA Electronic Industries Association
EMC Electromagnetic compatibility
EMF Electromotive force
EMI Electromagnetic interference
EnFP End fault protection
EPA Enhanced performance architecture
ESD Electrostatic discharge
F-SMA Type of optical fiber connector
FAN Fault number
FCB Flow control bit; Frame count bit
FOX 20 Modular 20 channel telecommunication system for speech, data and
protection signals
FOX 512/515 Access multiplexer
FOX 6Plus Compact time-division multiplexer for the transmission of up to seven
duplex channels of digital data over optical fibers
FPN Flexible product naming
FTP File Transfer Protocol
FUN Function type
G.703 Electrical and functional description for digital lines used by local
telephone companies. Can be transported over balanced and unbalanced
lines
GCM Communication interface module with carrier of GPS receiver module
GDE Graphical display editor within PCM600
GI General interrogation command
GIS Gas-insulated switchgear
GOOSE Generic object-oriented substation event
GPS Global positioning system
GSAL Generic security application
GSE Generic substation event
HDLC protocol High-level data link control, protocol based on the HDLC standard
HFBR connector type Plastic fiber connector
HLV circuit Hazardous Live Voltage according to IEC60255-27
HMI Human-machine interface
HSAR High speed autoreclosing
HSR High-availability Seamless Redundancy
HV High-voltage
HVDC High-voltage direct current
1419
Technical manual
Glossary
IDBS Integrating deadband supervision

IEC International Electrical Committee
IEC 60044-6 IEC Standard, Instrument transformers – Part 6: Requirements for
protective current transformers for transient performance
IEC 60870-5-103 Communication standard for protection equipment. A serial master/slave
protocol for point-to-point communication
IEC 61850 Substation automation communication standard
IEC 61850–8–1 Communication protocol standard
IEEE Institute of Electrical and Electronics Engineers
IEEE 802.12 A network technology standard that provides 100 Mbits/s on twisted-pair
or optical fiber cable
IEEE P1386.1 PCI Mezzanine Card (PMC) standard for local bus modules. References the
CMC (IEEE P1386, also known as Common Mezzanine Card) standard for
the mechanics and the PCI specifications from the PCI SIG (Special Interest
Group) for the electrical EMF (Electromotive force).
IEEE 1686 Standard for Substation Intelligent Electronic Devices (IEDs) Cyber Security
Capabilities
IED Intelligent electronic device
IET600 Integrated engineering tool
I-GIS Intelligent gas-insulated switchgear
IOM Binary input/output module
Instance When several occurrences of the same function are available in the IED,
they are referred to as instances of that function. One instance of a
function is identical to another of the same kind but has a different
number in the IED user interfaces. The word "instance" is sometimes
defined as an item of information that is representative of a type. In the
same way an instance of a function in the IED is representative of a type of
function.
IP 1. Internet protocol. The network layer for the TCP/IP protocol suite widely
used on Ethernet networks. IP is a connectionless, best-effort packet-
switching protocol. It provides packet routing, fragmentation and
reassembly through the data link layer.
2. Ingression protection, according to IEC 60529
IP 20 Ingression protection, according to IEC 60529, level
IP20- Protected against solid foreign objects of 12.5mm diameter and
greater.
IP 40 Ingression protection, according to IEC 60529, level IP40-Protected against
solid foreign objects of 1mm diameter and greater.
IP 54 Ingression protection, according to IEC 60529, level
IP54-Dust-protected, protected against splashing water.
IRF Internal failure signal
IRIG-B: InterRange Instrumentation Group Time code format B, standard 200
ITU International Telecommunications Union
LAN Local area network
1420
Technical manual
Glossary
LIB 520 High-voltage software module

LCD Liquid crystal display
LDCM Line data communication module
LDD Local detection device
LED Light-emitting diode
LNT LON network tool
LON Local operating network
MCB Miniature circuit breaker
MCM Mezzanine carrier module
MIM Milli-ampere module
MPM Main processing module
MVAL Value of measurement
MVB Multifunction vehicle bus. Standardized serial bus originally developed for
use in trains.
NCC National Control Centre
NOF Number of grid faults
NUM Numerical module
OCO cycle Open-close-open cycle
OCP Overcurrent protection
OEM Optical Ethernet module
OLTC On-load tap changer
OTEV Disturbance data recording initiated by other event than start/pick-up
OV Overvoltage
Overreach A term used to describe how the relay behaves during a fault condition. For
example, a distance relay is overreaching when the impedance presented
to it is smaller than the apparent impedance to the fault applied to the
balance point, that is, the set reach. The relay “sees” the fault but perhaps
it should not have seen it.
PCI Peripheral component interconnect, a local data bus
PCM Pulse code modulation
PCM600 Protection and control IED manager
PC-MIP Mezzanine card standard
PELV circuit Protected Extra-Low Voltage circuit type according to IEC60255-27
PMC PCI Mezzanine card
POR Permissive overreach
POTT Permissive overreach transfer trip
Process bus Bus or LAN used at the process level, that is, in near proximity to the
measured and/or controlled components
PRP Parallel redundancy protocol
1421
Technical manual
Glossary
PSM Power supply module

PST Parameter setting tool within PCM600
PTP Precision time protocol
PT ratio Potential transformer or voltage transformer ratio
PUTT Permissive underreach transfer trip
RASC Synchrocheck relay, COMBIFLEX
RCA Relay characteristic angle
RISC Reduced instruction set computer
RMS value Root mean square value
RS422 A balanced serial interface for the transmission of digital data in point-to-
point connections
RS485 Serial link according to EIA standard RS485
RTC Real-time clock
RTU Remote terminal unit
SA Substation Automation
SBO Select-before-operate
SC Switch or push button to close
SCL Short circuit location
SCS Station control system
SCADA Supervision, control and data acquisition
SCT System configuration tool according to standard IEC 61850
SDU Service data unit
SELV circuit Safety Extra-Low Voltage circuit type according to IEC60255-27
SFP Small form-factor pluggable (abbreviation)
Optical Ethernet port (explanation)
SLM Serial communication module.

SMA connector Subminiature version A, A threaded connector with constant impedance.
SMT Signal matrix tool within PCM600
SMS Station monitoring system
SNTP Simple network time protocol – is used to synchronize computer clocks on
local area networks. This reduces the requirement to have accurate
hardware clocks in every embedded system in a network. Each embedded
node can instead synchronize with a remote clock, providing the required
accuracy.
SOF Status of fault
SPA Strömberg Protection Acquisition (SPA), a serial master/slave protocol for
point-to-point and ring communication.
SRY Switch for CB ready condition
ST Switch or push button to trip
1422
Technical manual
Glossary
Starpoint Neutral/Wye point of transformer or generator

SVC Static VAr compensation
TC Trip coil
TCS Trip circuit supervision
TCP Transmission control protocol. The most common transport layer protocol
used on Ethernet and the Internet.
TCP/IP Transmission control protocol over Internet Protocol. The de facto
standard Ethernet protocols incorporated into 4.2BSD Unix. TCP/IP was
developed by DARPA for Internet working and encompasses both network
layer and transport layer protocols. While TCP and IP specify two protocols
at specific protocol layers, TCP/IP is often used to refer to the entire US
Department of Defense protocol suite based upon these, including Telnet,
FTP, UDP and RDP.
TEF Time delayed gound-fault protection function
TLS Transport Layer Security
TM Transmit (disturbance data)
TNC connector Threaded Neill-Concelman, a threaded constant impedance version of a
BNC connector
TP Trip (recorded fault)
TPZ, TPY, TPX, TPS Current transformer class according to IEC
TRM Transformer Module. This module transforms currents and voltages taken
from the process into levels suitable for further signal processing.
TYP Type identification
UMT User management tool
Underreach A term used to describe how the relay behaves during a fault condition. For
example, a distance relay is underreaching when the impedance presented
to it is greater than the apparent impedance to the fault applied to the
balance point, that is, the set reach. The relay does not “see” the fault but
perhaps it should have seen it. See also Overreach.
UTC Coordinated Universal Time. A coordinated time scale, maintained by the
Bureau International des Poids et Mesures (BIPM), which forms the basis of
a coordinated dissemination of standard frequencies and time signals.
UTC is derived from International Atomic Time (TAI) by the addition of a
whole number of "leap seconds" to synchronize it with Universal Time 1
(UT1), thus allowing for the eccentricity of the Earth's orbit, the rotational
axis tilt (23.5 degrees), but still showing the Earth's irregular rotation, on
which UT1 is based. The Coordinated Universal Time is expressed using a
24-hour clock, and uses the Gregorian calendar. It is used for aeroplane and
ship navigation, where it is also sometimes known by the military name,
"Zulu time." "Zulu" in the phonetic alphabet stands for "Z", which stands for
longitude zero.
UV Undervoltage
WEI Weak end infeed logic
VT Voltage transformer
X.21 A digital signalling interface primarily used for telecom equipment
1423
Technical manual
Glossary
3IO Three times zero-sequence current.Often referred to as the residual or the

ground-fault current
3VO Three times the zero sequence voltage. Often referred to as the residual
voltage or the neutral point voltage
1424
Technical manual
1425
ABB AB
Substation Automation Products
SE-721 59 Västerås, Sweden
Phone +46 (0) 21 32 50 00
Scan this QR code to visit our website
www.abb.com/substationautomation 1MRK 505 344-UUS
© Copyright 2016 ABB.

All rights reserved.

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1MRK505344-UUS B en Technical Manual Line Differential Protection RED670 2.1 ANSI

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Line differential protection RED670

© Copyright 2016 ABB. All rights reserved

Section 2 Available functions................................................................................................ 59

Section 3 Analog inputs..........................................................................................................71

Section 4 Binary input and output modules........................................................................ 85

Section 5 Local Human-Machine-Interface LHMI ............................................................... 87

Section 6 Differential protection........................................................................................109

Section 7 Impedance protection......................................................................................... 175

7.3.8 Technical data...................................................................................................................................233

7.7.3 Function block...................................................................................................................................277

7.11 High speed distance protection ZMFPDIS (21).............................................................................. 330

7.13.5 Settings............................................................................................................................................. 408

7.17.7.1 Lens characteristic....................................................................................................................... 437

Section 8 Current protection.............................................................................................. 453

8.3.6 Monitored data.................................................................................................................................475

8.6.5 Settings.............................................................................................................................................. 514

8.10.8 Technical data.................................................................................................................................. 549

8.14.7.4 Logic diagram................................................................................................................................572

Section 9 Voltage protection.............................................................................................. 575

9.3.8 Technical data................................................................................................................................... 611

9.7.7.3 Fast fault clearance ..................................................................................................................... 635

Section 10 Frequency protection..........................................................................................639

10.3.7.3 Blocking.......................................................................................................................................... 652

Section 11 Multipurpose protection.................................................................................... 655

Section 12 System protection and control.......................................................................... 681

Section 13 Secondary system supervision.......................................................................... 687

13.2.3 Function block.................................................................................................................................. 691

Section 14 Control.................................................................................................................. 707

14.3.9 Interlocking for double CB bay DB (3).......................................................................................... 772

14.6 Selector mini switch VSGAPC............................................................................................................ 846

Section 15 Scheme communication...................................................................................... 873

15.1.6 Operation principle..........................................................................................................................875

15.4.6.2 Weak-end infeed logic................................................................................................................. 895

15.8.2.7 Operation principle.......................................................................................................................917

15.8.7.7 Operation principle...................................................................................................................... 933

16.1.3 Function block.................................................................................................................................. 945

16.6.2 Controllable gate function block GATE....................................................................................... 965

16.7.1.1 Function block...............................................................................................................................976

16.7.11 Exclusive OR function block XORQT............................................................................................ 988

16.13.6 Operation principle....................................................................................................................... 1002

Section 17 Monitoring.......................................................................................................... 1015

17.2 Gas medium supervision SSIMG (63)............................................................................................. 1048

17.6.3 Function block................................................................................................................................ 1072

17.10.8 Technical data................................................................................................................................. 1110

Section 18 Metering.............................................................................................................. 1115

Section 19 Station communication..................................................................................... 1127

19.4.5.1 Functionality................................................................................................................................ 1130

19.8.2 Measurands for IEC 60870-5-103 I103MEAS..............................................................................1175

19.8.9.1 Functionality................................................................................................................................ 1186

19.8.16.2 Communication ports................................................................................................................1205

Section 20 Remote communication.................................................................................... 1227

Section 22 Basic IED functions............................................................................................ 1255

22.1.3.3 Synchronization alternatives....................................................................................................1268

22.9.5.1 Frequency values........................................................................................................................ 1286

Section 23 IED hardware.......................................................................................................1291

23.2.7.5 Monitored data............................................................................................................................1310

23.2.15 Line data communication module (LDCM)............................................................................... 1342

23.4.4.2 Mounting procedure for side-by-side rack mounting.........................................................1366

Section 25 Connection diagrams........................................................................................ 1377

Section 26 Inverse time characteristics............................................................................. 1379

1.1 This manual GUID-AB423A30-13C2-46AF-B7FE-A73BB425EB5F v19

1.2 Intended audience GUID-C9B8127F-5748-4BEA-9E4F-CC762FE28A3A v10

1.3 Product documentation