Total No. of Questions : 6] SEAT No.

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P-5387 [Total No. of Pages : 2

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S.E. (Electronics/Computer Engineering/E&TC) (Insem.)

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DIGITAL CIRCUITS

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(2019 Pattern) (Semester - III) (204182)

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Time : 1 Hour] 0/2 [Max. Marks : 30
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Instructions to the candidates:

1) Answer Q.1 or Q.2, Q.3 or Q.4, Q.5 or Q.6.
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2) Figures to the right indicate full marks.
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3) Neat diagrams must be drawn wherever necessary.

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4) Use of non-programmable calculator is allowed.

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5) Assume suitable data, if necessary.

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Q1) a) Explain the following characteristics of digital IC’s : [6]
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i) Fan In and Fan Out

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ii) IIL and IOH

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iii) Propagation delay

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b) Draw and explain the operation of CMOS inverter for LOW and HIGH
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inputs. [4]

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Q2) a) Draw and explain the working of 2-input CMOS NAND gate. [6]
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b) Explain the following characteristics of digital IC’s : [4]

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i) Noise Margin
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ii) Power Dissipation

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Q3) a) Implement and explain the working of full adder using basic gates.
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[5]
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b) Minimize the following expression using K-map and implement using

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logic gates : [5]

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d( ) indicates don’t care conditions

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Y = m(1, 3, 7, 11, 15) + d(0, 2, 5)

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Q4) a) Design 3-bit Gray to Binary code converter. [6]

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b) Design full subtractor using half subtractors. [4]

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Q5) a) Design and implement BCD to Excess-3 code converter using logic

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gates. [6]
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b) Draw and explain the working of 2-input TTL NAND gate. [4]
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Q6) a) Explain the difference between current sourcing and current sinking in
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TTL logic. [4]

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b) Minimize the following function using Quine Mc Clusky method.[6]
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F(A, B, C, D) = m(0, 1, 2, 3, 5, 7, 8, 9, 11, 14)

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