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40-TLE2144MDW
40-TLE2144MDW
40-TLE2144MDW
description
The TLE214x and TLE214xA devices are high-performance, internally compensated operational amplifiers
built using Texas Instruments complementary bipolar Excalibur process. The TLE214xA is a tighter offset
voltage grade of the TLE214x. Both are pin-compatible upgrades to standard industry products.
The design incorporates an input stage that simultaneously achieves low audio-band noise of 10.5 nV/√Hz with
a 10-Hz 1/f corner and symmetrical 40-V/µs slew rate typically with loads up to 800 pF. The resulting low
distortion and high power bandwidth are important in high-fidelity audio applications. A fast settling time of
340 ns to 0.1% of a 10-V step with a 2-kΩ/100-pF load is useful in fast actuator/positioning drivers. Under similar
test conditions, settling time to 0.01% is 400 ns.
The devices are stable with capacitive loads up to 10 nF, although the 6-MHz bandwidth decreases to 1.8 MHz
at this high loading level. As such, the TLE214x and TLE214xA are useful for low-droop sample-and-holds and
direct buffering of long cables, including 4-mA to 20-mA current loops.
The special design also exhibits an improved insensitivity to inherent integrated circuit component mismatches
as is evidenced by a 500-µV maximum offset voltage and 1.7-µV/°C typical drift. Minimum common-mode
rejection ratio and supply-voltage rejection ratio are 85 dB and 90 dB, respectively.
Device performance is relatively independent of supply voltage over the ± 2-V to ± 22-V range. Inputs can
operate between VCC − − 0.3 to VCC + − 1.8 V without inducing phase reversal, although excessive input current
may flow out of each input exceeding the lower common-mode input range. The all-npn output stage provides
a nearly rail-to-rail output swing of VCC − − 0.1 to VCC + − 1 V under light current-loading conditions. The device
can sustain shorts to either supply since output current is internally limited, but care must be taken to ensure
that maximum package power dissipation is not exceeded.
Both versions can also be used as comparators. Differential inputs of VCC ± can be maintained without damage
to the device. Open-loop propagation delay with TTL supply levels is typically 200 ns. This gives a good
indication as to output stage saturation recovery when the device is driven beyond the limits of recommended
output swing.
Both the TLE214x and TLE214xA are available in a wide variety of packages, including both the
industry-standard 8-pin small-outline version and chip form for high-density system applications. The C-suffix
devices are characterized for operation from 0°C to 70°C, I-suffix devices from − 40°C to 105°C, and M-suffix
devices over the full military temperature range of − 55°C to 125°C.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
!"#$ % &'!!($ #% )'*+&#$ ,#$(- Copyright 1997 − 2006, Texas Instruments Incorporated
!,'&$% &!" $ %)(&&#$% )(! $.( $(!"% (#% %$!'"($%
%$#,#!, /#!!#$0- !,'&$ )!&(%%1 ,(% $ (&(%%#!+0 &+',(
$(%$1 #++ )#!#"($(!%-
symbol
OFFSET N1
(see Note A)
IN + +
OUT
IN − −
OFFSET N2
(see Note A)
NOTES: A. OFFSET N1 AND OFFSET N2
are only availiable on the
TLE2241x devices.
VCC +
1OUT
NC
NC
NC
TLE2142
U PACKAGE
NC
NC
NC
NC
3 2 1 20 19
(TOP VIEW) NC 4 18 NC
3 2 1 20 19 1IN − 5 17 2OUT
NC 4 18 NC NC 1 10 NC NC 6 16 NC
IN − 5 17 VCC + 1OUT 2 9 VCC+ 1IN + 7 15 2IN −
NC 6 16 NC 1IN− 3 8 2OUT NC 8 14 NC
IN + 7 15 OUT 9 10 11 12 13
1IN+ 4 7 2IN−
NC 8 14 NC VCC− 5 6 2IN+
2IN +
NC
NC
NC
VCC −
9 10 11 12 13
NC
NC
NC
OFFSET N2
VCC −
4OUT
1IN −
4IN −
1OUT 1 16 4OUT 1OUT 1 14 4OUT
NC
3IN −
2OUT
NC
3OUT
NC − No internal connection
Q22 Q30
Q5 Q8 Q10 Q13 R24
Q26 Q34
D1
Q37
D2
D8 R23
Q23 Q27
R3
R2 D3
R6 R8 D4
2 23
Q36
SLOS183C − FEBURARY 1997 − REVISED JUNE 2006
Q1 OUT
Q4 Q14 Q15
IN + R13 R16
2 2
2 2
R9 Q25 Q28
Q31
Q16
C3
Q9
Q2 C4 Q35
Q19 D6
C1 Q24
R10 C2 Q32
Q18
Q20 D7
R22
Q7 Q12 Q17 Q29 Q33
OFFSET N1 Q21
VCC −
NOTE A: OFFSET N1 AND OFFSET N2 are only availiable on the TLE2241x devices.
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)†
Supply voltage, VCC + (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22 V
Supply voltage, VCC − . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −22 V
Differential input voltage, VID (see Note 2) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ± 44 V
Input voltage range, VI (any input) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . VCC + to VCC − − 0.3 V
Input current, II (each input) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ± 1 mA
Output current, IO . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ± 80 mA
Total current into VCC + . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 80 mA
Total current out of VCC − . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 80 mA
Duration of short-circuit current at (or below) 25 °C (see Note 3) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . unlimited
Package thermal impedance, θJA (see Notes 4 and 5): D package . . . . . . . . . . . . . . . . . . . . . . . . . . 97.1°C/W
DW package . . . . . . . . . . . . . . . . . . . . . . . . 57.3°C/W
N package . . . . . . . . . . . . . . . . . . . . . . . . . . 79.7°C/W
P package . . . . . . . . . . . . . . . . . . . . . . . . . . 84.6°C/W
PW package . . . . . . . . . . . . . . . . . . . . . . . 108.4°C/W
Package thermal impedance, θJC (see Notes 4 and 5): FK package . . . . . . . . . . . . . . . . . . . . . . . . . . . 5.6°C/W
J package . . . . . . . . . . . . . . . . . . . . . . . . . . 15.1°C/W
JG package . . . . . . . . . . . . . . . . . . . . . . . . . 14.5°C/W
U package . . . . . . . . . . . . . . . . . . . . . . . . . . 14.7°C/W
Operating free-air temperature range, TA: C suffix . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0°C to 70°C
I suffix . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −40°C to 105°C
M suffix . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −55°C to 125°C
Storage temperature range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −65°C to 150 °C
Case temperature for 60 seconds: FK package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 260°C
Lead temperature 1,6 mm (1/16 inch) from case for 10 seconds: D, DW, N, P, or PW package . . . . . 260°C
Lead temperature 1,6 mm (1/16 inch) from case for 60 seconds: J or JG package . . . . . . . . . . . . . . . . 300°C
† Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
NOTES: 1. All voltage values, except differential voltages, are with respect to the midpoint between VCC+ and VCC − .
2. Differential voltages are at IN+ with respect to IN −. Excessive current flows, if input, are brought below VCC − − 0.3 V.
3. The output may be shorted to either supply. Temperature and /or supply voltages must be limited to ensure that the maximum
dissipation rating is not exceeded.
4. Maximum power dissipation is a function of TJ(max), θJA, and TA. The maximum allowable power dissipation at any allowable
ambient temperature is PD = (TJ(max) − TA)/θJA. Operating at the absolute maximum TJ of 150°C can affect reliability.
5. The package thermal impedance is calculated in accordance with JESD 51-7 (plastic) or MIL-STD-883 Method 1012 (ceramic).
TYPICAL CHARACTERISTICS
Table of Graphs
FIGURE
VIO Input offset voltage Distribution 1, 2, 3
IIO Input offset current vs Free-air temperature 4
vs Common-mode input voltage 5
IIB Input bias current
vs Free-air temperature 6
vs Supply voltage 7
vs Free-air temperature 8
VOM + Maximum positive peak output voltage
vs Output current 9
vs Settling time 11
vs Supply voltage 7
vs Free-air temperature 8
VOM − Maximum negative peak output voltage
vs Output current 10
vs Settling time 11
VO(PP) Maximum peak-to-peak output voltage vs Frequency 12
VOH High-level output voltage vs Output current 13
VOL Low-level output voltage vs Output current 14
vs Frequency 15
AVD Large-signal differential voltage amplification
vs Free-air temperature 16
zo Closed-loop output impedance vs Frequency 17
IOS Short-circuit output current vs Free-air temperature 18
vs Frequency 19
CMRR Common-mode rejection ratio
vs Free-air temperature 20
vs Frequency 21
kSVR Supply-voltage rejection ratio
vs Free-air temperature 22
vs Supply voltage 23
ICC Supply current
vs Free-air temperature 24
Vn Equivalent input noise voltage vs Frequency 25
Vn Input noise voltage Over a 10-second period 26
In Noise current vs Frequency 27
THD + N Total harmonic distortion plus noise vs Frequency 28
vs Free-air temperature 29
SR Slew rate
vs Load capacitance 30
Noninverting large signal vs Time 31
Pulse response Inverting large signal vs Time 32
Small signal vs Time 33
B1 Unity-gain bandwidth vs Load capacitance 34
Gain margin vs Load capacitance 35
φm Phase margin vs Load capacitance 36
Phase shift vs Frequency 15
TYPICAL CHARACTERISTICS
TLE2141 TLE2142
DISTRIBUTION OF DISTRIBUTION OF
INPUT OFFSET VOLTAGE INPUT OFFSET VOLTAGE
24 24
236 Units Tested From 1 Wafer Lot 236 Units Tested From 1 Wafer Lot
VCC ± = ± 15 V VCC ± = ± 15 V
20 TA = 25°C 20 TA = 25°C
P Package P Package
Percentage of Units − %
Percentage of Units − %
16 16
12 12
8 8
4 4
0 0
−800 −400 0 400 800 −800 −600 −400 −200 0 200 400 600 800
VIO − Input Offset Voltage − µV VIO − Input Offset Voltage − µV
Figure 1 Figure 2
N Package
Percentage of Units − %
14
16
12
12 10
VCC ± = ± 2.5 V
8
8
6
VCC ± = ± 15 V
IIIO
4
4
2
0 0
− 2 −1.6 −1.2 −0.8 −0.4 0 0.4 0.8 1.2 1.6 2 −75 −50 −25 0 25 50 75 100 125 150
VIO − Input Offset Voltage − mV TA − Free-Air Temperature − °C
Figure 3 Figure 4
† Data at high and low temperatures are applicable only within the rated operating free-air temperature ranges of the various devices.
TYPICAL CHARACTERISTICS
−0.4
VCC ± = ± 2.5 V
−800
−0.6
TA = 125°C
IIIB
IIIB
TA = − 55°C −600
−1.2
−1.4 −500
−3 −2.5 −2 −1.5 −1 −0.5 0 0.5 1 −75 −50 −25 0 25 50 75 100 125 150
VIC − Common-Mode Input Voltage − V TA − Free-Air Temperature − °C
Figure 5 Figure 6
18
V OM − Maximum Peak Output Voltage − V
14.6
12 RL = ∞
14.2
VOM + VOM +
6
13.8 RL = 2 kΩ
0
−13.8
−6
VOM −
−12 −14.2 RL = 2 kΩ
Figure 7 Figure 8
† Data at high and low temperatures are applicable only within the rated operating free-air temperature ranges of the various devices.
TYPICAL CHARACTERISTICS
14.6 −13.4
VCC ± = ± 15 V VCC ± = ± 15 V
−13.6
14.4
−13.8
TA = 125°C
−14
14.2
TA = 125°C
−14.2
TA = − 55°C
14 −14.4 TA = 25°C
13.6 − 15
−0.1 −0.4 −1 −4 −10 − 40 −100 0.1 0.4 1 4 10 40 100
IO − Output Current − mA IO − Output Current − mA
Figure 9 Figure 10
MAXIMUM PEAK-TO-PEAK
MAXIMUM PEAK OUTPUT VOLTAGE OUTPUT VOLTAGE†
vs vs
SETTLING TIME FREQUENCY
V O(PP) − Maximum Peak-to-Peak Output Voltage − V
12.5 30
AVD = −1 VCC ± = ± 15 V
10 VCC ± = ± 15 V
OM − Maximum Peak Output Voltage − V
RL = 2 kΩ
TA = 25°C
25
7.5 0.1%
0.01%
5 TA = 25°C
20
2.5
Rising TA = 125°C
0 15
Falling
−2.5
0.01%
10
−5
TA = − 55°C
0.1%
−7.5
5
VOM
−10
V
−12.5 0
0 100 200 300 400 500 100 k 400 k 1M 4M 10 M
ts − Settling Time − ns f − Frequency − Hz
Figure 11 Figure 12
† Data at high and low temperatures are applicable only within the rated operating free-air temperature ranges of the various devices.
TYPICAL CHARACTERISTICS
HIGH-LEVEL OUTPUT VOLTAGE† LOW-LEVEL OUTPUT VOLTAGE†
vs vs
OUTPUT CURRENT OUTPUT CURRENT
4.6 1400
VCC = 5 V VCC = 5 V
4.4
TA = 125°C TA = 125°C
1000
4.2 TA = 25°C
800
4 TA = − 55°C
600
TA = 25°C
3.8
400
VOL
3.6
200
TA = − 55°C
3.4 0
−0.1 −1 −10 −100 0.1 1 10 100
IO − Output Current − mA IO − Output Current − mA
Figure 13 Figure 14
90 60°
Voltage Amplification − dB
60 120°
AVD
50 140°
40 160°
30 180°
AVD
20 VCC ± = ± 15 V 200°
A
RL = 2 kΩ
10 220°
CL = 100 pF
0 TA = 25°C 240°
− 10 260°
1 10 100 1k 10 k 100 k 1M 10 M
f − Frequency − Hz
Figure 15
† Data at high and low temperatures are applicable only within the rated operating free-air temperature ranges of the various devices.
TYPICAL CHARACTERISTICS
LARGE-SIGNAL DIFFERENTIAL
VOLTAGE AMPLIFICATION†
vs
FREE-AIR TEMPERATURE
140
VCC ± = ± 15 V
VO = ± 10 V
RL = 10 kΩ
VD − Large-Signal Differential
Voltage Amplification − dB
120
RL = 2 kΩ
100
AVD
A
80
−75 −50 −25 0 25 50 75 100 125 150
TA − Free-Air Temperature − °C
Figure 16
10
50 VID = 1
40
AVD = 100
0.1
AVD = 10
AVD = 1
30
0.01
VID = − 1
0.001 20
1k 10 k 100 k 1M 10 M −75 −50 −25 0 25 50 75 100 125 150
f − Frequency − Hz TA − Free-Air Temperature − °C
Figure 17 Figure 18
† Data at high and low temperatures are applicable only within the rated operating free-air temperature ranges of the various devices.
TYPICAL CHARACTERISTICS
TA = 25°C VCC = 5 V
120
116
100
112
80
60
108
40 VCC ± = ± 15 V
104
20
0 100
100 1k 10 k 100 k 1M −75 −50 −25 0 25 50 75 100 125 150
f − Frequency − Hz TA − Free-Air Temperature − °C
Figure 19 Figure 20
140
kSVR + 108
120
kSVR −
100 106
80
104
60
40
102
kSVR
kSVR
20 VCC ± = ± 2.5 V to ± 15 V
TA = 25°C
0 100
10 100 1k 10 k 100 k 1M 10 M −75 −50 −25 0 25 50 75 100 125 150
f − Frequency − Hz TA − Free-Air Temperature − °C
Figure 21 Figure 22
† Data at high and low temperatures are applicable only within the rated operating free-air temperature ranges of the various devices.
TYPICAL CHARACTERISTICS
CC − Supply Current − mA
3.5
I CC − Supply Current − mA
TA = 25°C 3.4
VCC ± = ± 2.5 V
3
TA = − 55°C 3.2
IIDD
IDD
2.5
3
VO = 0
No Load
2 2.8
0 4 8 12 16 20 24 −75 −50 −25 0 25 50 75 100 125 150
|VCC ±| − Supply Voltage − V TA − Free-Air Temperature − °C
Figure 23 Figure 24
RS = 20 Ω f = 0.1 to 10 Hz
500 TA = 25°C
200
Input Noise Voltage − nV
TA = − 55°C
250
150
0
TA = 125°C
100
−250
TA = 25°C
50
−500
0 −750
1 10 100 1k 10 k 0 2 4 6 8 10
f − Frequency − Hz t − Time − s
Figure 25 Figure 26
† Data at high and low temperatures are applicable only within the rated operating free-air temperature ranges of the various devices.
TYPICAL CHARACTERISTICS
6
0.1%
AV = 100
TA = − 55°C AV = 10 RL = 2 kΩ
4 RL = 600 Ω
TA = 25°C 0.01%
2 AV = 10
RL = 2 kΩ
TA = 125°C
0 0.001%
1 10 100 1k 10 k 10 100 1k 10 k 100 k
f − Frequency − Hz f − Frequency − Hz
Figure 27 Figure 28
50
SR + 40
SR − Slew Rate − V/ µ s
SR − Slew Rate − V/ µ s
40 SR+
30
SR −
30
20
20
SR −
VCC ± = ± 15 V
10 VCC ± = ± 15 V
10 AVD = − 1 AVD = − 1
RL = 2 kΩ TA = 25°C
CL = 500 pF
0 0
−75 −50 −25 0 25 50 75 100 125 150 0.01 0.1 1 10
TA − Free-Air Temperature − °C CL − Load Capacitance − nF
Figure 29 Figure 30
† Data at high and low temperatures are applicable only within the rated operating free-air temperature ranges of the various devices.
TYPICAL CHARACTERISTICS
NONINVERTING INVERTING
LARGE-SIGNAL LARGE-SIGNAL
PULSE RESPONSE† PULSE RESPONSE†
15 15
TA = 125°C TA = 25°C
10 10
TA = 25°C
VO − Output Voltage − V
VO − Output Voltage − V
TA = − 55°C
5 5 TA = 125°C
TA = − 55°C TA = − 55°C
0 0
TA = − 55°C TA = 125°C
−5 −5 TA = 25°C
VO
VO
TA = 25°C
VCC ± = ± 15 V VCC ± = ± 15 V
−10 AVD = 1 −10 AVD = −1
RL = 2 kΩ RL = 2 kΩ
CL = 300 pF TA = 125°C CL = 300 pF
−15 −15
0 1 2 3 4 5 0 1 2 3 4 5
t − Time − µs t − Time − µs
Figure 31 Figure 32
UNITY-GAIN BANDWIDTH†
SMALL-SIGNAL vs
PULSE RESPONSE LOAD CAPACITANCE
100 7
TA = − 55°C VCC ± = ± 15 V
RL = 2 kΩ
6
1 − Unity-Gain Bandwidth − MHz
TA = 25°C
VO − Output Voltage − mV
50
5
TA = 125°C
0 4
3
VO
VCC ± = ± 15 V
−50 AVD = −1
B1
RL = 2 kΩ 2
B
CL = 300 pF
TA = 25°C
−100 1
0 400 800 1200 1600 10 100 1000 10000
t − Time − ns CL − Load Capacitance − pF
Figure 33 Figure 34
† Data at high and low temperatures are applicable only within the rated operating free-air temperature ranges of the various devices.
TYPICAL CHARACTERISTICS
φ m − Phase Margin
Gain Margin − dB
TA = 125°C
8 40°
6 30°
TA = 125°C
4 20°
2 10°
VCC ± = ± 15 V
TA = 25°C RL = 2 kΩ
0 0°
10 100 1000 10000 10 100 1000 10000
CL − Load Capacitance − pF CL − Load Capacitance − pF
Figure 35 Figure 36
† Data at high and low temperatures are applicable only within the rated operating free-air temperature ranges of the various devices.
APPLICATION INFORMATION
PACKAGING INFORMATION
Orderable Device Status (1) Package Package Pins Package Eco Plan (2) Lead/Ball Finish MSL Peak Temp (3)
Type Drawing Qty
5962-9321601QPA ACTIVE CDIP JG 8 1 TBD A42 SNPB N / A for Pkg Type
5962-9321602QPA ACTIVE CDIP JG 8 1 TBD A42 SNPB N / A for Pkg Type
5962-9321603Q2A ACTIVE LCCC FK 20 1 TBD POST-PLATE N / A for Pkg Type
5962-9321603QHA ACTIVE CFP U 10 1 TBD A42 SNPB N / A for Pkg Type
5962-9321603QPA ACTIVE CDIP JG 8 1 TBD A42 SNPB N / A for Pkg Type
5962-9321604Q2A ACTIVE LCCC FK 20 1 TBD POST-PLATE N / A for Pkg Type
5962-9321604QHA ACTIVE CFP U 10 1 TBD A42 SNPB N / A for Pkg Type
5962-9321604QPA ACTIVE CDIP JG 8 1 TBD A42 SNPB N / A for Pkg Type
5962-9321605Q2A ACTIVE LCCC FK 20 1 TBD POST-PLATE N / A for Pkg Type
5962-9321605QCA ACTIVE CDIP J 14 1 TBD A42 SNPB N / A for Pkg Type
5962-9321606Q2A ACTIVE LCCC FK 20 1 TBD POST-PLATE N / A for Pkg Type
5962-9321606QCA ACTIVE CDIP J 14 1 TBD A42 SNPB N / A for Pkg Type
TLE2141ACD ACTIVE SOIC D 8 75 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
TLE2141ACDG4 ACTIVE SOIC D 8 75 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
TLE2141ACP ACTIVE PDIP P 8 50 Pb-Free CU NIPDAU N / A for Pkg Type
(RoHS)
TLE2141ACPE4 ACTIVE PDIP P 8 50 Pb-Free CU NIPDAU N / A for Pkg Type
(RoHS)
TLE2141AID ACTIVE SOIC D 8 75 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
TLE2141AIDG4 ACTIVE SOIC D 8 75 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
TLE2141AIDR ACTIVE SOIC D 8 2500 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
TLE2141AIDRG4 ACTIVE SOIC D 8 2500 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
TLE2141AIP ACTIVE PDIP P 8 50 Pb-Free CU NIPDAU N / A for Pkg Type
(RoHS)
TLE2141AIPE4 ACTIVE PDIP P 8 50 Pb-Free CU NIPDAU N / A for Pkg Type
(RoHS)
TLE2141AMFKB OBSOLETE LCCC FK 20 TBD POST-PLATE N / A for Pkg Type
TLE2141AMJGB ACTIVE CDIP JG 8 1 TBD A42 SNPB N / A for Pkg Type
TLE2141CD ACTIVE SOIC D 8 75 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
TLE2141CDG4 ACTIVE SOIC D 8 75 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
TLE2141CDR ACTIVE SOIC D 8 2500 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
TLE2141CDRG4 ACTIVE SOIC D 8 2500 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
TLE2141CP ACTIVE PDIP P 8 50 Pb-Free CU NIPDAU N / A for Pkg Type
(RoHS)
TLE2141CPE4 ACTIVE PDIP P 8 50 Pb-Free CU NIPDAU N / A for Pkg Type
(RoHS)
TLE2141ID ACTIVE SOIC D 8 75 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
Addendum-Page 1
PACKAGE OPTION ADDENDUM
www.ti.com 3-Jul-2007
Orderable Device Status (1) Package Package Pins Package Eco Plan (2) Lead/Ball Finish MSL Peak Temp (3)
Type Drawing Qty
no Sb/Br)
TLE2141IDG4 ACTIVE SOIC D 8 75 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
TLE2141IDR ACTIVE SOIC D 8 2500 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
TLE2141IDRG4 ACTIVE SOIC D 8 2500 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
TLE2141IP ACTIVE PDIP P 8 50 Pb-Free CU NIPDAU N / A for Pkg Type
(RoHS)
TLE2141IPE4 ACTIVE PDIP P 8 50 Pb-Free CU NIPDAU N / A for Pkg Type
(RoHS)
TLE2141MD ACTIVE SOIC D 8 75 TBD CU NIPDAU Level-1-220C-UNLIM
TLE2141MDR ACTIVE SOIC D 8 2500 TBD CU NIPDAU Level-1-220C-UNLIM
TLE2141MFKB OBSOLETE LCCC FK 20 TBD POST-PLATE N / A for Pkg Type
TLE2141MJGB ACTIVE CDIP JG 8 1 TBD A42 SNPB N / A for Pkg Type
TLE2142ACD ACTIVE SOIC D 8 75 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
TLE2142ACDG4 ACTIVE SOIC D 8 75 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
TLE2142ACDR ACTIVE SOIC D 8 2500 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
TLE2142ACDRG4 ACTIVE SOIC D 8 2500 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
TLE2142ACP OBSOLETE PDIP P 8 TBD Call TI Call TI
TLE2142AID ACTIVE SOIC D 8 75 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
TLE2142AIDG4 ACTIVE SOIC D 8 75 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
TLE2142AIDR ACTIVE SOIC D 8 2500 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
TLE2142AIDRG4 ACTIVE SOIC D 8 2500 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
TLE2142AIP OBSOLETE PDIP P 8 TBD Call TI Call TI
TLE2142AMD ACTIVE SOIC D 8 75 TBD CU NIPDAU Level-1-220C-UNLIM
TLE2142AMDG4 ACTIVE SOIC D 8 75 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
TLE2142AMDR ACTIVE SOIC D 8 2500 TBD CU NIPDAU Level-1-220C-UNLIM
TLE2142AMDRG4 ACTIVE SOIC D 8 2500 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
TLE2142AMFKB ACTIVE LCCC FK 20 1 TBD POST-PLATE N / A for Pkg Type
TLE2142AMJGB ACTIVE CDIP JG 8 1 TBD A42 SNPB N / A for Pkg Type
TLE2142AMUB ACTIVE CFP U 10 1 TBD A42 SNPB N / A for Pkg Type
TLE2142CD ACTIVE SOIC D 8 75 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
TLE2142CDG4 ACTIVE SOIC D 8 75 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
TLE2142CDR ACTIVE SOIC D 8 2500 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
TLE2142CDRG4 ACTIVE SOIC D 8 2500 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
Addendum-Page 2
PACKAGE OPTION ADDENDUM
www.ti.com 3-Jul-2007
Orderable Device Status (1) Package Package Pins Package Eco Plan (2) Lead/Ball Finish MSL Peak Temp (3)
Type Drawing Qty
no Sb/Br)
TLE2142CP ACTIVE PDIP P 8 50 Pb-Free CU NIPDAU N / A for Pkg Type
(RoHS)
TLE2142CPE4 ACTIVE PDIP P 8 50 Pb-Free CU NIPDAU N / A for Pkg Type
(RoHS)
TLE2142CPWG4 ACTIVE TSSOP PW 16 TBD Call TI Call TI
TLE2142CPWLE OBSOLETE TSSOP PW 16 TBD Call TI Call TI
TLE2142CPWR ACTIVE TSSOP PW 16 2000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
TLE2142CPWRG4 ACTIVE TSSOP PW 16 2000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
TLE2142ID ACTIVE SOIC D 8 75 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
TLE2142IDG4 ACTIVE SOIC D 8 75 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
TLE2142IDR ACTIVE SOIC D 8 2500 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
TLE2142IDRG4 ACTIVE SOIC D 8 2500 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
TLE2142IP ACTIVE PDIP P 8 50 Pb-Free CU NIPDAU N / A for Pkg Type
(RoHS)
TLE2142IPE4 ACTIVE PDIP P 8 50 Pb-Free CU NIPDAU N / A for Pkg Type
(RoHS)
TLE2142MD ACTIVE SOIC D 8 75 TBD CU NIPDAU Level-1-220C-UNLIM
TLE2142MDG4 ACTIVE SOIC D 8 75 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
TLE2142MDR ACTIVE SOIC D 8 2500 TBD CU NIPDAU Level-1-220C-UNLIM
TLE2142MDRG4 ACTIVE SOIC D 8 2500 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
TLE2142MFKB ACTIVE LCCC FK 20 1 TBD POST-PLATE N / A for Pkg Type
TLE2142MJGB ACTIVE CDIP JG 8 1 TBD A42 SNPB N / A for Pkg Type
TLE2142MUB ACTIVE CFP U 10 1 TBD A42 SNPB N / A for Pkg Type
TLE2144ACN ACTIVE PDIP N 14 25 Pb-Free CU NIPDAU N / A for Pkg Type
(RoHS)
TLE2144ACNE4 ACTIVE PDIP N 14 25 Pb-Free CU NIPDAU N / A for Pkg Type
(RoHS)
TLE2144AIN ACTIVE PDIP N 14 25 Pb-Free CU NIPDAU N / A for Pkg Type
(RoHS)
TLE2144AINE4 ACTIVE PDIP N 14 25 Pb-Free CU NIPDAU N / A for Pkg Type
(RoHS)
TLE2144AMFKB ACTIVE LCCC FK 20 1 TBD POST-PLATE N / A for Pkg Type
TLE2144AMJB ACTIVE CDIP J 14 1 TBD A42 SNPB N / A for Pkg Type
TLE2144CDW ACTIVE SOIC DW 16 40 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
TLE2144CDWG4 ACTIVE SOIC DW 16 40 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
TLE2144CDWR ACTIVE SOIC DW 16 2000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
TLE2144CDWRG4 ACTIVE SOIC DW 16 2000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
Addendum-Page 3
PACKAGE OPTION ADDENDUM
www.ti.com 3-Jul-2007
Orderable Device Status (1) Package Package Pins Package Eco Plan (2) Lead/Ball Finish MSL Peak Temp (3)
Type Drawing Qty
TLE2144CN ACTIVE PDIP N 14 25 Pb-Free CU NIPDAU N / A for Pkg Type
(RoHS)
TLE2144CNE4 ACTIVE PDIP N 14 25 Pb-Free CU NIPDAU N / A for Pkg Type
(RoHS)
TLE2144IDW ACTIVE SOIC DW 16 40 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
TLE2144IDWG4 ACTIVE SOIC DW 16 40 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
TLE2144IDWR ACTIVE SOIC DW 16 2000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
TLE2144IDWRG4 ACTIVE SOIC DW 16 2000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
TLE2144IN ACTIVE PDIP N 14 25 Pb-Free CU NIPDAU N / A for Pkg Type
(RoHS)
TLE2144INE4 ACTIVE PDIP N 14 25 Pb-Free CU NIPDAU N / A for Pkg Type
(RoHS)
TLE2144MDW ACTIVE SOIC DW 16 40 TBD CU NIPDAU Level-1-220C-UNLIM
TLE2144MFKB ACTIVE LCCC FK 20 1 TBD POST-PLATE N / A for Pkg Type
TLE2144MJB ACTIVE CDIP J 14 1 TBD A42 SNPB N / A for Pkg Type
TLE2144MN OBSOLETE PDIP N 14 TBD Call TI Call TI
(1)
The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in
a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check
http://www.ti.com/productcontent for the latest availability information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements
for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered
at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and
package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS
compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame
retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material)
(3)
MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder
temperature.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is
provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the
accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take
reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on
incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited
information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI
to Customer on an annual basis.
Addendum-Page 4
PACKAGE MATERIALS INFORMATION
www.ti.com 21-Jul-2007
Pack Materials-Page 1
PACKAGE MATERIALS INFORMATION
www.ti.com 21-Jul-2007
Device Package Pins Site Reel Reel A0 (mm) B0 (mm) K0 (mm) P1 W Pin1
Diameter Width (mm) (mm) Quadrant
(mm) (mm)
TLE2141AIDR D 8 TAI 330 12 6.4 5.2 2.1 8 12 Q1
TLE2141CDR D 8 TAI 330 12 6.4 5.2 2.1 8 12 Q1
TLE2141IDR D 8 TAI 330 12 6.4 5.2 2.1 8 12 Q1
TLE2142ACDR D 8 TAI 330 12 6.4 5.2 2.1 8 12 Q1
TLE2142AIDR D 8 TAI 330 12 6.4 5.2 2.1 8 12 Q1
TLE2142CDR D 8 TAI 330 12 6.4 5.2 2.1 8 12 Q1
TLE2142CDR D 8 FMX 330 0 6.4 5.2 2.1 8 12 Q1
TLE2142CPWR PW 16 MLA 330 12 7.0 5.6 1.6 8 12 Q1
TLE2142IDR D 8 TAI 330 12 6.4 5.2 2.1 8 12 Q1
TLE2142IDR D 8 FMX 330 0 6.4 5.2 2.1 8 12 Q1
TLE2144CDWR DW 16 TAI 330 16 10.75 10.7 2.7 12 16 Q1
TLE2144IDWR DW 16 TAI 330 16 10.75 10.7 2.7 12 16 Q1
Device Package Pins Site Length (mm) Width (mm) Height (mm)
TLE2141AIDR D 8 TAI 346.0 346.0 29.0
TLE2141CDR D 8 TAI 346.0 346.0 29.0
TLE2141IDR D 8 TAI 346.0 346.0 29.0
TLE2142ACDR D 8 TAI 346.0 346.0 29.0
TLE2142AIDR D 8 TAI 346.0 346.0 29.0
TLE2142CDR D 8 TAI 346.0 346.0 29.0
TLE2142CDR D 8 FMX 342.9 336.6 20.64
TLE2142CPWR PW 16 MLA 552.0 346.0 36.0
TLE2142IDR D 8 TAI 346.0 346.0 29.0
Pack Materials-Page 2
PACKAGE MATERIALS INFORMATION
www.ti.com 21-Jul-2007
Device Package Pins Site Length (mm) Width (mm) Height (mm)
TLE2142IDR D 8 FMX 342.9 336.6 20.64
TLE2144CDWR DW 16 TAI 346.0 346.0 33.0
TLE2144IDWR DW 16 TAI 346.0 346.0 33.0
Pack Materials-Page 3
MECHANICAL DATA
0.400 (10,16)
0.355 (9,00)
8 5
0.280 (7,11)
0.245 (6,22)
1 4
0.065 (1,65)
0.045 (1,14)
0.023 (0,58)
0°–15°
0.015 (0,38)
0.100 (2,54) 0.014 (0,36)
0.008 (0,20)
4040107/C 08/96
NO. OF A B
18 17 16 15 14 13 12
TERMINALS
** MIN MAX MIN MAX
0.020 (0,51)
0.010 (0,25)
0.055 (1,40)
0.045 (1,14)
0.045 (1,14)
0.035 (0,89)
4040140 / D 10/96
0.400 (10,60)
0.355 (9,02)
8 5
0.260 (6,60)
0.240 (6,10)
1 4
0.070 (1,78) MAX
0.325 (8,26)
0.020 (0,51) MIN
0.300 (7,62)
0.015 (0,38)
Gage Plane
0.200 (5,08) MAX
Seating Plane
4040082/D 05/98
0,30
0,65 0,10 M
0,19
14 8
0,15 NOM
4,50 6,60
4,30 6,20
Gage Plane
0,25
1 7
0°– 8°
A 0,75
0,50
Seating Plane
PINS **
8 14 16 20 24 28
DIM
4040064/F 01/97
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