Digital Electronics

6.1 Introduction

Answer following question after reading this toplc

1. Explain the concept ofpositive logic and negative logic. Mostlikely and
larks [4], May-2004, May-2005, May-2007
asked in previous
University Exam

We know that in analog systems the output can be continuously controlled by the
used
input and the output is linearly proportional to the input. However, the binary logic
in the digital systems assumes only two values, either HIGH or LOW. The HIGH and
LOW voltage levels are used to denote these two values. The two levels, or states, of a
signal variable, can be considered to represent the two numerals, viz. 1 and 0 of the binary
number system, or the wo logic states, viz. TRUE and FALSE in logic operations. Two
levels used to represent two logic states are also called logic levels.
voltage
We have seen that, in binary logic, two voltage levels represent the two binary digits,
1 and 0. If the higher of the two voltages represents a 1 and the lower voltage represents a
o, the system is called a positive logic system. On the other hand, if the lower voltage
represents a 1 and the higher voltage represents a 0, we havea negative logic system.
As an example, assume that we have positive 5 V and 0 V as logic-level voltages. Let
us designate +5 V as the HIGH level and the 0 V as the LOW level; then positive and
negative logic can be defined as

Positive Loglc HIGH 1 (.e. +5 V) 5V logic 1

LOW 0 (1.e. 0 V) OV -- logic 0

Negative Logic: HIGH 0 (i.e. +5 V) 5V logic 0

LOW 1(i.e. 0 V) OV lagic 1

(6 1)
Basic Electronics Engineering 6-2 Digital Electronics

but positive logic is the

Both positive and negative logic are used in digital systems,
more common.
In practice, the voltages at different nodes in the digital circuit may differ slightly due
to define a logic
to internal resistances, parasitic effects and loading effects. Therefore, This is illustrated
level, a range of voltage is assigned instead of a particular voltage level.
in Fig. 6.1.

NçC Logic 1

Undefined
logic level

Logic 0
GND

Fig. 6.1 Voltage range for positive logic system

6.2 Logic Operators

Answer following question after reading this topic

1. Explain OR, AND and NOT logic using switch-lamp analogy,

alongwith truth tables Marks (61, May-2004 Most likelyand
asked in previous
University Exam

We know that, to represent and solve arithmetic expressions we use arithmetic

operators such as +, -, x and +. Similarly, we can use logical operators to represent and
solve logical expressions. There are
three basic logical operators: NOT/INVERT, AND and
OR.

6.2.1 Logical Operator NOTINVERT

The inversion (or complementing or negation) operator is written as a bar
over its
argument. Sometimes it is written "NOT". Thus the inverse of A is A or NOT A. The logic
operator NOT can be better understood if the switching-circuit realization of NOT
function, as shown in Fig. 6.2, is considered.
Basic Electronics Engineering 6-3 Digital Electronics

R Input Output
Switch open (Low) Lamp ON (High)
Switch close (High) Lamp OFF (Low)
S

NOT function
Fig. 6.2 Switching circuit analogy of
S is close, lamp is
When the switch S is open, lamp is 'ON' and when the switch
OFF
6.2.2 Logical Operator AND
or'.'These signs may be omitted, similar to ordinary algebra. For
It is denoted by *
B' or 'A
example: A B, A x meaning. A B
B or AB has a same may be read as 'A and
times B. A B is high if A and B are both high and otherwise low. The logic operator
AND can be better understood if the switching-circuit realization of AND function as
shown in Fig. 6.3, is considered. AND gate denotes lowest value of the input variables.

Input Output
S S2
S2 Open (Low)Open (Low) Lamp OFF (Low)
v
Open (Low) Close (High)| Lamp OFF (Low)
Close (High) Open (Low)| Lamp OFF (Low)
Close (High)| Close (High) Lamp ON (High)|

Fig. 6.3 Switching circuit analogy of AND function

It is very clear that the lamnp will be ON only when both the switches S, and S, are
closed simultaneously; ie. only when S, AND S2 are ON simultaneously. When any of
two switches is OFF, the lamp is OFF.

6.2.3 Logical Operator OR

It is written +'. 'A + B' is read as A or B. A + B is high if either A is high or B is
high or both are high. The switching circuit realization of OR function is shown in Fig. 6.4.
OR gate denotes highest value of the input variable.
Basic Electronics Engineering 6-4 Digital Electronics

S
Input Output
S S
Open (Low)| Open (Low)| Lamp OFF (Low)
Open (Low) Close (High) Lamp ON (High)
Close (High) Open (Low) | Lamp ON (High)
ON (High)
Close (High) Close(High) Lamp

OR function
Fig. 6.4 Switching circuit analogy of
will be ON.
both of two separate switches S, OR S,
are closed, the lamp
t either or

and are OFF, the lamp will

be OFF.
Only when both S, S,
OFF (0) ana
be ON (1) or

E x a m p l e 6.1 : In the circuits given below, the switches may

OFF (0).
the bulb will be ON (1) or

bulb to be ON (1)/OFF
(0)
1) Determine all possible conditions of the switches for the
in each of the circuits. table.
obtained above ie. in (1) in the form of truth
2) Represent the information circuit.
[May-2007, 8 Marks]
performed by each
3) Name the operation

S S2
Bulb

2 S
V Bulb

Fig. 6.5
 Basic Electronics Engineering
6-5 Digital Electronics
Solution
1.

S S2 Bulb
(OFF) 0 (OFF) OFF
o (OFF) 1 (ON) OFF AND Gate
1 (ON) 0 (OFF) OFF
1 (ON) 1 1 (ON) . ON

2
S1 S2 Bulb
0 (OFF) 0 (OFF) OFF
EX-OR Gate
0 (OFF) 1 (ON) ON
1 (ON) o (OFF) ON
1 (ON) 1 (ON) OFF

6.3 Logic Gates

Answer following questions after reading this topic

1. Explain basic gates with the help of truth table.

2. Draw the timing diagram for OR and NAND gates. Most likely and
Marks 14], Dec.-2007 asked in preyious
Universit Exam
3. NAND, NOR and EX-OR gates with the help of Boolean
Explain
expression and truth table. Marks [6], May-2008
4. Design 2-input EX-OR gate using other basic gates.
Marks [3], May-2005

Logicgates are the basic elements that make up a digital system. The electronic gate is
a circuit that is able to operate on a number of binary inputs in order to perform a
particular logical function. The types of gates available are the NOT, AND, OR, NAND,
NOR, exclusive-OR, and the exclusive-NOR. Except for the exclusive-NOR gate, they are
available in monolithic integrated circuit form.
The gate is a digital circuit with one or more input voltages but only one output
voltage. By connecting the different gates in different ways, we can build circuits that
perform arithmetic and other functions associated with the human brain because thev
simulate mental processes.
The operation of a logic gate can be easily understood with the help of "truth table".
A truth table is a table that shows all the input-output possibilities of a logic circuit; i.e.
the truth table indicates the outputs for different possíbilities of the inputs.
 Digital Electronics
Basic Electronics Engineering 66

6.3.1 Inverter NOT Gate

(NOT circuit) performs
a basic logic
The inverter
The
function called "inversion" or "complementation".
level. In
logic level to its opposite
inverter changes one
a logic 0 and a
a logic 1 to
terms of bits, it changes for
1. The Fig. 6.6 shows the symbol
logic 0 to a logic
Fig. 6.6 Inverter symbol the inverter.
indicator.
The bubble [ o ] appearing on the output is the negation (inversion)

Inverter Operation
on its
inverter input, a LOW level will appear
When a HIGH level is applied to an

a HIGH level
will appear on its output.
LOW level is applied to its input,
output. When a which indicates the output
for each
This operation is summarized in the truth Table 6.1,
possible inputin terms of levels and bits.

Inverter Truth Table

Input Output
Input Output
0 1
LOW HIGH

LOW 1
HIGH

Table 6.1
indicate
6.7 shows the output of an inverter for pulse input. Here t, and t,
a
Fig.
The Note that when the
on the input and output pulse waveforms.
the corresponding points is HIGH, the output is LOW. Thus
the input
the output is HIGH, and when
input is LOW, for a given input pulse.
an inverted output pulse
the inverter produces

High (1)
Low (0) 1- Y
-Y=A

Fig. 6.7 Output of an inverter for pulse input

 Digital Electronics
Basic Electronics Engineering 6-7
Standard Package

Fg 6.8 shows the pin diagram of a 7404, a TTL Hex inverter. This digital integratea
Circuit (c) contains six NOT gates inside a 14 pin dual in line package
r

14 Vcc

GND
7

diagram of 7404
Fig. 6.8 Pin a

6.3.2 AND Gate

more commonly known as the AND
The AND gate performs logical multiplication,
have two or more inputs and a single output, as indicated by
function. The AND gate may
shown in the Fig. 6.9.
the standard logic symbols

-Y=AB

to AND gate (b) Four inputs to AND gate

(a) Two inputs
Fig. 6.9

Catae with two and four inputs are shown in Fig, 6.9; however, an AND gate can have
operation of the AND gate is such that the
than one. Ine
any number of inputs greater
the inputs are HGH. When any of the inputs are LOW.
t i s HIGH only when al of
a n u t is LOW. Hence,
the
AND gate determines when certain conditions are
HlGH levels on all of its inputs and
true, as indicated by
simultaneously
simultane
HIGH
gate with
t indicating this conditions. The Fig. 6.10 ilustrates a two-input AND
on all four possibilities of input combinations, and the resulting output for each.
Basic Electronics Engineering 6-8
Digital Electronics

LOW LOW
-LOW FLOW
LOW HIGH

HIGH
LOW -LOW
HIGH
HIGH
Fig. 6.10 Four possible inputs for two input AND gate and resulting outputs
D HIGH

be
This table can
The truth
for two-input AND gate is shown in Table 6.2. the number
table a
or
of
expanded for any number of inputs. For any AND gate, regardless
inputs, the output is high only when all inputs are HIGH.

Inputs Output

A B Y

0 0

AND gate
Table 6.2 Truth table for 2 input and B,
build a 2-input AND gate.
The inputs a r e labeled A
shows to
Fig. 6.11 o n e way
voltage Vcc of +5 V. Also w e will
a ssume

while the output is Y. Let us

assume a supply four
or +5 V (High).
With 2 inputs, there are
either 0 V (Low)
the input voltages a r e for all four input cases.
and w e will n o w observe the output
possible input
cases

low: When both

+Vcc Case 1 : A is low and B is
are low, the
cathode of each
input voltages Therefore, the positive
R diode is grounded.
both diodes in parallel.
supply forward-biases is ideally
Because of this, the output voltage
AK- zero
0.7 V for Si). This means Y is
(practically
o Y=AB low.
B
Case 2 A is low and B is high : When A
2-input AND gate is forward-biased (ON),
Fig. 6.11 is low, the upper diode
With the B input high, the lower
down to a low voltage, i.e. Y =
0.
and it pulls the output bias (OFF).
reverse
diode goes into Because of the symmetry of the circuit, the cireuit
B is low:
Case 3 : A
is high and diode is reverse biased (OFF), lower
But in this case, UPper
to case 2.
oneration is similar Y is low.
(ON), and
forward biased diodoe
diode is are at +5 V, both s are
and B is high
:
When both inputs
is high istor R. This pulls up the
Case 4 : A current through diodes
there is no

reverse
biased and Therefore, Y is high.
Y to the supply voltage.
output
 6-9
Digital Electronics
Basic Electronics Engineering
Pulsed Operation constant levels but are
the inputs to a gate are not
ln a majority of applications,
two logic levels
and that can be classified as pulse
with time between
voltages that change waveforms. Keep
the operation of AND gate with pulsed input
wavefornms. Let us study of whether its inputs
mind that an AND gate obeys the
truth table operation regardless
the pulsed operation of the AND gate, we
are constant levels or pulsed levels. In studying level at
with to each other in order to determine the output
consider the inputs respect
any given times.
both LOW (0) during the time interval ti,
For example, in Fig. 6.12, the inputs are
A is LOw (0) and input B is HIGH
the output LOW (0). During interval t2, input
making A is HIGH (1) and input B is LOW
(1) so the output is LOW (0). During interval t, input
interval t4, both inputs are HIGH (1),
(0),and therefore the output is LOW (0). During
shown in Fig. 6.12 of input and output
resulting in a HIGH (1) output. A diagram
waveforms showing time relationships is called a " timing diagram".

-Y = A B

Fig. 6.12 Timing diagram for 2-input AND gate

Standard Package
Fig. 6.13 shows the pin diagram of a 7408, a TTL quad 2 input AND gate. This digital
integrated circuit contains four 2-input AND gates inside a 14pin dual-line package.

GND 7
O
Fig. 6.13 Pin diagram of a 7408
 Digital Electronics
Basic Electronics Engineering 6 10

6.3.3 The OR Gate

OR function. An
known as the
n e OR gate performs logical addition, more commonly
indicated by the standard logic
ORgate has two or more inputs and one output, as
are illustrated.
An OR gate
symbol in Fig. 6.14, where OR gates with two and four inputs is LOW
is HIGH. The output
produces a HlGH on the output when any of the inputs determine
of an OR gate is to
only when all of the inputs are LOw. Hence, the purpose to
a HIGH on its output
when one or more of its inputs are HIGH and to produce
OR gate
indicate this condition. The Fig. the operation for a two-input
6.15 ilustrates logic
for all four possible input combinations:

-Y=A+B
D

(a) Two inputs to OR gate (b) Four inputs to OR gate

Fig. 6.14
The truth
The truth table 6.3 describes the logical operation of the two-input OR gate.
of the number of
table can be expanded for any number of inputs; however, regardless
is HIGH when any of the inputs is HIGH.
inputs, the output
LOW LOW HIGH
- LOW
LOW
LOW HIGH

HIGH
HIGH HIGH HIGH
HIGH
LOW

Four possible inputs for two input OR gate and resulting outputss
Fig. 6.15
Inputs Output

A B
0

1
1

Table 6.3 Truth table for 2-input OR gate

build a 2-input OR gate.
way to
Fig. 6.16
shows one

labeled A B, while the output is Y.

and
AH-
A

The inputs are 0 V (Low) o r

the
assume input voltages a r e either B -o Y=A+B
Let u s there a r e four possible input
With 2-inputs,
+5 V (High). observe the output
for all four
and we will now
cases
input cases.

Fig. 6.16 2-input OR gate

 6-11
Digital Electronics
Basic Electronics Engineering9
both input voltages are low, the anodes of
Case 1: A is low and B is low: When
diodes are reverse biased and output, Y is
Doth the diodes are grounded. Therefore, the
low.
lower diode,
Case 2:A is low and B is high: When B input is high, it forward-biases
Note that the
+5 V and practically+ 4.3 V).
Producing an output voltage high (ideally
upper diode is reverse biased.
Because of the symmetry of the circuit, the circuit
Case 3: A is high and B is low
is forward biased (ON), and
operation is similar to case 2. But in this case, upper diode
lower diode is reverse biased.
at +5 V, both diodes are
Case 4 A is high and B is high : When both inputs are
is ideally +5 V
forward biased. Since the input voltages are in parallel, the output voltage
and practically +4.3 V. Therefore, output Y is high.

Pulsed Operation
Let us see the operation of an OR gate with pulsed inputs.

0
AD Y=A+B

TTL Fig. 6.17 Timing diagram for 2-input OR gate

During time interval t both inputs A and B are LOW (0), making output LOW(0).
During time interval t2, input A is LOW but input B is HIGH, hence output is HIGH.
During time interval t, input A is HIGH ) and B is LOW (), making output HIGH (1).
During time interval t4 both inputs are HiGH (1), so the output is HIGH (1). In this
illustration, we have simply applied the truth table operation of the OR gate to each of the
intervals during which the levels are remaining constant
Standard Package

Fig. 6.18 shows the pin diagram of 7432, a TIL quad 2-input OR gate. This
a
digital
integrated circuit contains four 2-input OR gates inside a 14-pin dual-in-line package.
 Digital Electronics
Basic Electronics Engineering 6-12

14 Vcc

.
3
13

10

GND 7

7432
Fig. 6.18 Pin diagram of a

6.3.4 The NAND Gate

The term NAND is a contraction of NOT-AND and implies an AND function with a
for a two-input NAND gate and1
complemented (inverted) output. A standard logic symbol
in Fig. 6.19.
its equivalency to an AND gate followed by an inverter are shown

Y=AB

Fig. 6.19 NAND gate symbol and equivalent circuit

The NAND gate is a universal gate as it can be used to construct an AND gate, an OR
gate an inverter, or any combination of these functions. The logical operation of the
NAND gate is such that a LOW output occurs only when all inputs are HIGH. When any
of the inputs is LOW, the output will be HIGH. Note that this operation is opposite to that
of the AND as far as output is concermed. Fig. 6.20 illustrates the logical operation of a
two-input NAND gate for all four input combinations.
LOW LOW
HIGH
LOW HIGH -HIGH

HIGH HIGH
HIGH
LOW HIGH -LOW

Fia. 6.20 Four possible inputs for two input NAND Gate and resulting outputs
 Basic Electronics Engineering 6-13 Digital Electronics
he truth table 6.4 summarizes the logical operation of the two input NAND gate.

Inputs Output

A B

Table 6.4 Truth table for 2-input NAND gate

Pulsed Operation
We will now consider the pulsed operation of the NAND gate. Recall from the truth
table that any time all of the inputs are HIGH, the output will be LOW, and this is the
ONLY time a LOW output occurs.
Fig. 6.21 shows the waveforms of two input voltages A.and B applied to the NAND
gate and the corresponding output Y. Both inputs are LOW (0) during the time interval t
making output HIGH (1). During interval t2, input A is LOW (0) and input B is HIGH (1)
so the output is HIGH (1). During interval ts, input A is HIGH (1) and ínput B is LOw (0)
resulting output HIGH (1). During interval t both inputs are HIGH (1) and output is
therefore LOW (0).

Y=A-B
0 1 0

Fig. 6.21 Timing diagram for 2-input NAND gate

Standard Package
Fig. 6.22 shows the pin diagram of a 7400, a TTL, quad 2 input NAND gate. This
digital integrated circuit contains four 2 input NAND gates inside a 14-pin dual-in-line
package.
 Digital Electronics
Basic Electronics Engineering 6-14

Vcc

13
12
11

GND

Fig. 6.22 Pin diagram of a 7400

6.3.5 The NOR Gate

The term NOR is a contraction of NOT-OR and implies an OR function with an
inverted output. A standard logic symbol for a two-input NOR gate and its equivalent OR
gate followed by an inverter is shown in the Fig. 6.23.

Y=A+B - Y-A+B

Fig. 6.23 NOR gate symbol and equivalent circuit

Similar to NAND gate, the NOR gate is
universal gate, i.e. NOR gate can be used
a
to
construct an AND gate, an OR gate, an inverter, or any combination of these functions.
The logic operation of the NOR gate is that a LOW output occurs when
inpúts is HIGH. Only when all of its inputs are LOW, the output is HIGH1 any of its
The Fig. 6.24 illustrates the logical operation of a
possible input combinations. two-input NOR gate for all four

LOW -HIGH LOW

LOW LOW
HIGH

HIGH
HiGH
LOW LOW
HIGH LOW
Ein. 6.24 Four possible inputs for fwo input NOR gate and
resulting outputs
 Basic Electronics Engineering 6-15 Digital Electronics
shown in Table 6.5:
h e truth table for a two-input NOR gate is

Inputs Output

B Y
A
1
0

1 0

Table 6.5 Truth table for 2-input NOR gate

Pulsed Operation
The Fig. 6.25 shows the waveforms of two input voltages A and B to a NOR gate. The

output waveform is sketched following the truth table operation. When both inputs are

LOW (0) output is HIGH; otherwise output is LOW (0).

1
B
A - Y=
B
1

Fig. 6.25 Timing diagram for 2-input NOR gate

Standard Package
Fig. 6.26 shows the pin diagram of a 7402, a TTL quad 2-input NOR gate. This digital
integrated circuit contains four 2-input NOR gates inside a 14-pin dual-in-line package.
Basic CIecu

Vcc

13
12

1
10
9

GND 7

6.26 Pin diagram of a 7402

Fig.

6.3.6 The Exclusive-OR Gate

abbreviation for Exclusive-OR gate.
An EX-OR gate has two or
The EX-OR gate is a n 6.27 where
indicated by the standard logic symbol in Fig.
more inputs and one output, as

EX-OR gates with two and four inputs are shown.

Y=A®B Y
B
(a) Two input EX-OR (b) Four input EX-OR
Fig. 6.27

It recognizes only the words that have an odd number of ones. This means that for
odd number of ones, output of EX-OR gate is high. The Fig. 6.28 illustrates the logic
operation for a two-input EX-OR gate for all four possible input combinations.

HIGH
LOWD
LOW
LOW D LOw -HIGH

LOWD
HIGH
HIGH HIGH
HIGH LOW
Eia. 6.28 Four possible inputs for two input EX-OR gate and resulting
outputs
Basic Electronics Engineerin9 6-17 Digital Electronics
Lhe truth table 6.6 describes the logical operations of the two-input EX-OR gate.

Inputs Output

A B

Table 6.6 Truth table for 2-input EX-OR gate

The truth table can be expanded for any number of inputs, however, regardless of the
number of inputs, the output is high only when odd number of inputs are HIGH.

Let us discuss the operation of an EX-OR gate with pulsed inputs.

1
Y=AB
0

Fig. 6.29 Timing diagram for 2-input EX-OR gate

During time interval ti, both inputs A and B are LOW (0), making output LOW.
During time interval t, input A is low but input B is HIGH. Hence odd number of inputs
HIGH making output HIGH (1). During time interval t3, input A is HIGH and input B is
LOW (0), making output HIGH (1). During time interval t4, both inputs are HIGH. Hence
even number of inputs HIGH making output LOW (0). In this illustration, we have
simply
applied the truth table operation of the EXOR gate to each of the intervals during which
the levels are remaining constant.

Standard Package

Fig, 6.30 shows the pin diagram of a 7486, a TTL

quad 2-input EX-OR gate. This
digital integrated circuit contains four 2-input EX-OR gates inside a 14
pin dual-in-line
package.
Basic Electronics Engineering 6 18 Digital Electronics

13
12
V
10

GND

Fig. 6.30 Pin diagram of a 7486

6.3.7 The Exclusive-NOR Gate

The term EX-NOR is a contraction of NOT-X-OR, NOT exclusive OR gate. It is
logically equivalent to an EX-OR gate followed by an inverter. An EX-NOR gate has two
more inputs and one output, as indicated by the standard logic symbol in Fig. 6.31
where EX-NOR gates with two and four inputs are shown.

A
Y=AOB
B
=A®B

(a) Two input EX-NOR (b) Four input EX-NOR

Fig. 6.31

It recognizes only the words that have an even number of ones and inputs having all
zeroes. This means that for even number of ones at the
input, or inputs having all zetoes,
the output of EX-NOR gate is high. The Fig. 6.32 illustrates the
logic operation for a two
input EX-NOR gate for all four possible input combinations

LOW HIGH LOW

LOW
HIGH LOW

HIGH HIGH
LOW
LOW- HIGH HIGH

Ein 6.32 Four possible inputs for two input Ex-NOR gate and
resulting outputs
 Basic Electronics Engineering 6 19 Digital Electronics
The truth table 6.7 describes the logical operations of the two input EX-NOR gate. The
truth table can be expanded for any number of input; however, regardless of the number
or inputs, the output is high when even number of inputs are high or when all input are
zeroes.

Inputs Output

A B Y

1 1

Table 6.7 Truth table for 2-input EX-NORR

Let us discuss the operation of an EX-NOR gate with pulsed inputs.

-Y=A®B or AOB
1
B

Fig. 6.33 Timing diagram for 2-input EX-NOR

During time interval t, both inputs A and B are LOW (0). Hence even number of
inputs LOW, making output HIGH. During time interval t2, input A is LOW but input B
is HIGH Hence odd number of inputs HIGH, making output LOW. During time interval
, input A is HIGH and input B is LOW hence output is LOW. During time interval
t4,both inputs are HIGH. Hence even number of inputs HIGH, making output HIGH. In
this illustration, we have simply applied the truth table operation of the EX-NOR gate to
each of the intervals during which the levels are remaining constan
Basic Electronics Engineering 6-20 97 Digital Electronics

14 Voc
13 A
12 B

11
10Y

GND

of 74266
Fig. 6.34 Pin diagram a

6.3.8 Alternative Logic-Gate Representation

We have introduced the five basic logic gates (AND, OR, INVERTER,
NAND, and
Most
NOR) and the standard symbols used to represent them on logic-network diagrams.
alternative set of
of the logic networks use standard symbols. But in some networks an
The Fig. 6.35 shows the alternate set
symbols is used in addition to the standard symbols.
of symbols for the five basic gates. These alternate symbols are equivalent to the standard
symbols and their equivalence can be proved using DeMorgan's theorems. For example,
we know that the output expression from the standard NAND symbol is AB = A + B,
which is same as the output expression for the alternate symbol.

- Y=A B E Y=A+B A B=A B

AND

OR
Y-.B B=
NAND Y-AB Y= B B

NOR
= Y=A.B-A+B

INV
A Y= EA Y=

Fig. 6.35 Standard and alternate symbols for basic logic gates
Note: 1. The equivalences of standard and alternate symbols are valid for gates with
any numnber of inputs.

2, The standard and alternate symbols for each gate represent the same
physical network
 Basic Electronics Engineering 6-21 nDigital Electronics
6.36 using alternate symbols.
in Fig.
Example 6.2 Draw the circuit shown

D
Fig. 6.36

Solution

C-

D-
L- Fig. 6.36(a)
6.3.9 Properties of EX-OR Gate
Property 1: A ® A = 0: Output is logic zero when inputs are same.

Property 2: A ® =1:Outputis logic 1 when inputs are different.

Property 3: A 1 =A:EX-OR as Inverter
When one input of EX-OR gate is connected to logic one we get the complement of
the other input at the output of EX-OR gate.

Output iss
Input tied Complenment
to logic 1 form of other
input
Other
input
Property 4 A 0 = A EX-OR as Non-Inverter

When one input of EX-OR gate is connected to logic 0 we get the uncomplement of
the other input at the output of EX-OR gate.

Input is Output is
Grounded complement form
1 of other input

1 0
 Digital Electronics
Basic Electronics Engineering 6 22

Property 5 EX-OR as Modulo 2 Adder

table is
modulo 2 adder because its truth
same
The exclusive-OR be used
gate can as a

as the truth table of modulo 2 adder.

Property 6:(AB) (AC) A (B C) =

A B C AB AC A (B C)
0

0 0 0
0 0
1 0

1 1

Property 7:
If A B C, then
A C = B

B C = A andA
ABC = 0

A 3 AB C A C B BC A A B C =0
0
1 1
1 0 1

Note
1. For three input EX-OR, output is logic 1 only for odd number of logic 1 inputs.
2. No similar terms for EX-NOR gate
AOB = C then

AOC B
BOC = A and

AOBOCc