Experiment # 2 Group # 6

TOGETHER WE CAN ACHIEVE

MORE
COURSE NAME: DLC LAB
(DERIVING LOGIC EQUATIONS AND
TRUTH TABLE FROM A GIVEN
STATEMENT OR EXPRESSION AND
CONSTRUCTION OF COMBINATIONAL
CIRCUITS)
SEMESTER: SUMMER 22-23

SOLVED BY

Christopher Andrew Guda

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Experiment # 2 Group # 6

Table of Contents:

SL Contents Page no.

1. Abstract 3

2. Objective 3

3. Theory 3

4. Apparatus

5. Experimental Procedure with data

6. Simulation Data

7. Hardware Setup

8. Discussions

9. Answer to the questions

10. References

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Experiment # 2 Group # 6

Abstract:
The purpose of this experiment is to derive logic equation and truth table from a given equation or
expression and implement the derivation by constructing combinational circuits with the help of
IC and observe whether the output verifies the truth table of the given logic statement or not.

Objective:
• To build logic circuits generated from a given statement on a breadboard using gate ICs
and see if the output validates the truth table of the provided logic statement.
• To perform relevant theoretical work by deriving the logic circuit and truth table from the
given logic equation/statement, as well as being acquainted with Boolean algebra and De
Morgan's law.
• To utilize K-Map to simplify the logic statements, then use a breadboard implementation
to confirm accuracy.

Theory:
Logic gates and other components are used to create combinatorial circuits. It doesn't contain any
values that should be extrapolated from the circuit's previous state. To create such a combinational
digital system, one of the following techniques must be used:

If the problem statement is given,

1. First, find the inputs and outputs of the system and relate the inputs with the outputs.
2. Develop the truth table for the inputs and outputs and establish a relationship.
3. Generate a standard output expression from the truth table.
4. Simplify the output expression using Boolean algebra or K-Map.
5. Finally, implement the circuit.

If an expression is given,

1. Make the provided expression standard if it is not.

2. Create a truth table from the standard equation.
3. Develop a K-Map.
4. Reduce the output using proper grouping by using the K-Map.
5. Finally, implement the reduced circuit.

In Boolean algebra, a variable is a symbol that represents an event, a circumstance, or some data.
The only possible values for a single variable are 1 and 0.

A logical number that can have a value of 1 or 0 is represented by the symbol "variable," which is
typically denoted by an italic letter.

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Experiment # 2 Group # 6

The opposite or opposite of a number is its complement. The inverse function is represented in
Boolean algebra by a bar over the variable.

The Boolean addition of two or more literals, often known as the OR operation.

The Boolean operation that results from adding two or more literals together, is called AND
operation.

The expression that results when two or more product terms are added together by Boolean
addition is called a sum of product.

The expression that results from multiplying two or more sum terms is known as a sums product
(POS).

The minimal expression is the simplest SOP or POS expression that can be created using a
Karnaugh map, which is a methodical approach for deriving Boolean expressions. Because it lists
all potential input variable values along with the output of each, a Karnaugh map is comparable to
a truth table. The Karnaugh map is an array of cells with each cell presenting a binary value of the
input variables rather than being structured into columns and rows like a truth table. The cells are
set up so that simplifying a particular expression only requires correctly arranging the cells.
Expressions with two, three, four, and five variables can be represented by Karnaugh maps. The
number of rows in a truth table and the number of cells in a Karnaugh map are both equal to the
entire number of conceivable input variable combinations.

Apparatus:
1. Digital trainer board
2. IC 7432:1 pcs
3. IC 7408:1 pcs
4. IC 7404:2 pcs
5. IC 7402:1 pcs
6. IC 7400:1 pcs
7. IC 7486:1 pcs
8. Connecting wires

Experimental Procedure with Data & Simulation:

Problem1.
A Building has 4 floors which share the same water tank for water supply. In order to
start the motor, each floor has a designated switch- Ground Floor with switch A, 1st Floor with
switch B, 2nd Floor with switch C and 3rd Floor with switch D. The motor starts if someone
presses the switch from the 3rd floor or from both ground and 2nd floor or from 1st and 2nd floor.
Your job is to design the system.

Solution:
The Boolean expression is: Y=AB+BC+D
The simulated circuit for problem 1 is figure 1.

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Experiment # 2 Group # 6

Figure 1: Logic Circuit for problem 1.

Table 1: Truth Table for problem 1.

A B C D Y
0 0 0 0 0
0 0 0 1 1
0 0 1 0 0
0 0 1 1 1
0 1 0 0 0
0 1 0 1 1
0 1 1 0 1
0 1 1 1 1
1 0 0 0 0
1 0 0 1 1
1 0 1 0 0
1 0 1 1 1
1 1 0 0 1
1 1 0 1 1
1 1 1 0 1
1 1 1 1 1

The SOP expression:

Y=𝐴̅. 𝐵̅ . 𝐶̅ . 𝐷 + 𝐴̅. 𝐵̅ . 𝐶. 𝐷 + 𝐴̅. 𝐵. 𝐶̅ . 𝐷 + 𝐴̅. 𝐵. 𝐶. 𝐷
̅ + 𝐴̅. 𝐵. 𝐶. 𝐷 + 𝐴. 𝐵̅ . 𝐶̅ . 𝐷 + 𝐴. 𝐵̅ . 𝐶. 𝐷 +
𝐴. 𝐵. 𝐶̅ . 𝐷
̅ + 𝐴. 𝐵. 𝐶̅ . 𝐷 + 𝐴. 𝐵. 𝐶. 𝐷 ̅ + 𝐴. 𝐵. 𝐶. 𝐷

The POS expression:

Y=(A+B+C+D) . (A+B+𝐶̅ + 𝐷) . (𝐴 + 𝐵̅ + 𝐶 + 𝐷). (𝐴̅ + 𝐵 + 𝐶 + 𝐷). (𝐴̅ + 𝐵 + 𝐶̅ + 𝐷)

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Experiment # 2 Group # 6

Reduction using K-MAP:

Figure 2: K-MAP for problem 1

The reduced expression:
Y=D+AB+BC

Problem 2:
For the expression Y=𝐴𝐵̅ + ̅̅̅̅̅̅̅̅̅̅̅̅̅̅
𝐶(𝐴𝐵 + 𝐷), find truth table, reduced expression using K-MAP and
the logic gate diagram.
Solution:
Table 2: Truth table for problem 2.
A B C D Y
0 0 0 0 1
0 0 0 1 1
0 0 1 0 1
0 0 1 1 0
0 1 0 0 1
0 1 0 1 1
0 1 1 0 1
0 1 1 1 0
1 0 0 0 1
1 0 0 1 1
1 0 1 0 1
1 0 1 1 1
1 1 0 0 1
1 1 0 1 1
1 1 1 0 0
1 1 1 1 0

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Experiment # 2 Group # 6

The SOP expression:

Y=𝐴̅𝐵̅ 𝐶̅ 𝐷
̅ + 𝐴̅𝐵̅ 𝐶̅ 𝐷 + 𝐴̅𝐵̅ 𝐶𝐷
̅ + 𝐴̅𝐵𝐶̅ 𝐷
̅ + 𝐴̅𝐵𝐶̅ 𝐷 + 𝐴̅𝐵𝐶𝐷
̅ + 𝐴𝐵̅ 𝐶̅ 𝐷
̅ + 𝐴𝐵̅ 𝐶̅ 𝐷 + 𝐴𝐵̅ 𝐶𝐷
̅+
𝐴𝐵̅ 𝐶𝐷 + 𝐴𝐵𝐶̅ 𝐷 ̅ + 𝐴𝐵𝐶̅ 𝐷

Reducing expression using Boolean Algebra:

Y=𝐴𝐵̅ + ̅̅̅̅̅̅̅̅̅̅̅̅̅̅
𝐶(𝐴𝐵 + 𝐷)
= 𝐴𝐵̅ + 𝐶̅ + ̅̅̅̅̅̅̅̅̅̅
𝐴𝐵 + 𝐷
=𝐴𝐵̅ + 𝐶̅ + 𝐴𝐵
̅̅̅̅ . 𝐷
̅
=𝐴𝐵 + 𝐶 + (𝐴 + 𝐵̅ ). 𝐷
̅ ̅ ̅ ̅
=𝐴. 𝐵̅ + 𝐶̅ + 𝐴̅. 𝐷̅ + 𝐵̅ . 𝐷
̅

The simulated logic circuit for problem 2 is given in figure 3.

Figure 3: Logic Circuit for problem 2.

Reducing using K-MAP:

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Experiment # 2 Group # 6

Figure 4: K-MAP for problem 2.

Reduced expression:
Y=𝐶̅ + 𝐴𝐵̅ + 𝐴̅𝐷
̅

Hardware Setup:

Figure 5: Hardware implementation for circuit in problem 1.

Figure 6: Hardware implementation for circuit in problem 2.

Result:
1. As per the requirement of problem 1, figure 1 describes the logic circuit needed to
simulate the logic and figure 5 shows the hardware implementation.
2. For problem 2, figure 3 gives the logic gate simulation & figure 6 shows the hardware
simulation.

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Experiment # 2 Group # 6

Discussions:
1. Due to some difficulties faced during the lab with some equipment, the experiment was
not carried out in due time and extra time was needed.
2. It was made sure that truth tables of all simulations carried out were matched with the
truth tables found during hardware implementation.
3. The use of K-MAP serves to speed up the process of simplifying a Boolean expression by
a wide margin.

Answer to questions:
1. Construct the derived equations (i) and (ii), using Universal gates (both NAND and
NOR).

Solution:
For problem 1:
Using NAND gate:
Y=AB+BC+D
̿̿̿̿̿̿̿̿̿̿̿̿̿̿̿̿̿
=𝐴𝐵 + 𝐵𝐶 + 𝐷
̅̅̅̅̅̅̅̅̅̅̅̅
̅̅̅̅ ̅̅̅̅ . 𝐷
=𝐴𝐵 . 𝐵𝐶 ̅
The circuit diagram is given in figure 7

Figure 7: Logic circuit for problem 1 using NAND.

Using NOR gate:

Y=AB+BC+D
̿̿̿̿ + 𝐵𝐶
=𝐴𝐵 ̿̿̿̿ + 𝐷
=𝐴̅𝐵̅ + ̅̅̅̅
̅̅̅̅ 𝐵̅ 𝐶̅ + 𝐷
The circuit diagram is given in figure 8.

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Experiment # 2 Group # 6

Figure 8: Logic circuit for problem 1 using NOR

For problem 2:
Using NAND gate:
Y= 𝐴𝐵̅ + ̅̅̅̅̅̅̅̅̅̅̅̅̅̅
𝐶(𝐴𝐵 + 𝐷)
̿̿̿̿̿̿̿̿̿̿̿̿̿̿̿̿̿̿̿̿̿̿
=𝐴𝐵 ̅ + ̅̅̅̅̅̅̅̅̅̅̅̅̅̅
𝐶(𝐴𝐵 + 𝐷)
̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅
̅̅̅̅̅ . ̅̅̅̅̅̅̅̅̅̅̅̅̅̅
=𝐴𝐵 𝐶(𝐴𝐵 + 𝐷)
̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅
=𝐴𝐵̅ . ̅̅̅̅̅̅̅̅̅̅̅̅̅
𝐶 + 𝐴𝐵̅̅̅̅. 𝐷
̅
̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅
=𝐴𝐵̅ . 𝐶. ̅̅̅̅̅̅̅
̅̅̅̅ . 𝐷
𝐴𝐵 ̅
The circuit diagram for the circuit is given in figure 9.

Figure 9: Problem 2 circuit using NAND gates

Using NOR gate:

Y= 𝐴𝐵̅ + ̅̅̅̅̅̅̅̅̅̅̅̅̅̅
𝐶(𝐴𝐵 + 𝐷)
̅̅̅̅̅
=𝐴𝐵 + 𝐶̅ + ̅̅̅̅̅̅̅̅̅̅̅̅
(𝐴𝐵 + 𝐷)
̅̅̅̅̅̅̅̅
̅
=𝐴 + 𝐵 + 𝐶 + (𝐴𝐵̅ ̅̅̅̅ 𝐷
̅)
̅̅̅̅̅̅̅̅
=𝐴 ̅ + 𝐵 + 𝐶̅ + ̅̅̅̅
𝐴̅𝐷
̅+𝐵 ̅̅̅̅
̅𝐷
̅
̅̅̅̅̅̅̅̅
=𝐴 ̅ + 𝐵 + 𝐶̅ + ̅̅̅̅̅̅̅̅
𝐴 + 𝐷 + ̅̅̅̅̅̅̅̅
𝐵+𝐷

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Experiment # 2 Group # 6

The logic circuit for problem 2 using NOR is given in figure 10.

Figure 10: Problem 2 circuit using NOR gates

2. Develop the truth table for a certain three-input logic circuit with the output expression
Y=ABC+(AB)’C+A’BC+AB’C+A(B’+C).

Solution:
Simplifying the equation:
𝑌 = 𝐴𝐵𝐶 + 𝐴𝐵̅̅̅̅ 𝐶 + 𝐴̅𝐵𝐶 + 𝐴𝐵̅ 𝐶 + 𝐴(𝐵̅ + 𝐶)
= 𝐴𝐵𝐶 + 𝐴̅𝐶 + 𝐵̅ 𝐶 + 𝐴̅𝐵𝐶 + 𝐴𝐵̅ 𝐶 + 𝐴𝐵̅ + 𝐴𝐶
= 𝐶(𝐴 + 𝐴̅) + 𝐵𝐶(𝐴 + 𝐴̅) + 𝐵̅ 𝐶(1 + 𝐴) + 𝐴𝐵̅
= 𝐶 + 𝐵𝐶 + 𝐵̅ 𝐶 + 𝐴𝐵̅
= 𝐶 + 𝐶 + 𝐴𝐵̅
= 𝐶 + 𝐴𝐵̅

Table 3: Truth table for answer to question section problem 2.

A B C F
0 0 0 0
0 0 1 1
0 1 0 0
0 1 1 1
1 0 0 1
1 0 1 1
1 1 0 0
1 1 1 1

3. Implement the following logic expressions with logic gates Y=ABC+AB+AC.

Solution:
Y=ABC+AB+AC
= AB(1+C)+AC

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Experiment # 2 Group # 6

=AB+AC
=A(B+C)
The circuit diagram is given in figure 11.

Figure 11: Logic Circuit for Y=ABC+AB+AC

References:
1. Thomas L. Floyd, “Digital Fundamentals”, available Edition, Prentice Hall International Inc.

AIUB COURSE
SOLUTION-ACS

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Experiment # 2 Group # 6

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