Unit - III -Operational Amplifiers and Special Devices

Differential Amplifier:
Characteristics of a operational amplifier:

1. Open Loop gain

Open loop gain is the gain of the Op Amp without a positive or negative feedback. An
ideal OP Amp should have an infinite open loop gain but typically it range between
20,000 and 2, 00000.

2. Input impedance
It is the ratio of the input voltage to input current. It should be infinite without any
leakage of current from the supply to the inputs. But there will be a few Pico ampere
current leakages in most Op Amps.

3. Output impedance
The ideal Op Amp should have zero output impedance without any internal resistance.
So that it can supply full current to the load connected to the output.

4. Band width
The ideal Op Amp should have an infinite frequency response so that it can amplify any
frequency from DC signals to the highest AC frequencies. But most Op Amps have
limited bandwidth.

5. Offset
The output of the Op Amp should be zero when the voltage difference between the
inputs is zero. But in most Op Amps, the output will not be zero when off but there will
be a minute voltage from it.

Circuit model of ideal op-amp

Virtual Ground :
As the name indicates it is virtual, not real ground. For some purposes we can consider it as
equivalent to ground. In op-amp the term virtual ground means that the voltage at that particular
node is almost equal to ground voltage (0V). It is not physically connected to ground. This
concept is very useful in analysis of op-amp circuits and it will make a lot of calculations very
simple.

Virtual Ground – Opamp

Lets see how the virtual ground concept is employed in inverting amplier.

Virtual Ground – Inverting Amplifier using Op-amp

We can explain this concept in two different ways using two different characteristics of an ideal
op-amp.

Using Infinite Voltage Gain

We already know that an ideal op-amp will provide infinite voltage gain. For real op-amp also
the gain will be very high such that we can consider it as infinite for calculation purposes.

 Gain = Vo/Vin

As gain is infinite, Vin = 0

  Vin = V2 – V1

In the above circuit V1 is connected to ground, so V1 = 0. Thus V2 also will be at ground

potential.

 V2 = 0

Virtual Ground – Inverting Amplifier using Opamp

Why we need Virtual Ground ?

Virtual Ground concept is very useful in analysis of an opamp when negative feedback is
employed. It will simply a lot of calculations and derivations.

Equivalent Circuit – Inverting Amplifier – Virtual Ground – Opamp

Virtual Ground vs Real Ground

Virtual Ground Real Ground

Real Ground is a terminal which is physically connected

Virtual Ground is a concept that made for easy
to ground or earth which acts as the reference point for the
explantaion and calculation purposes.
entire circuit.

Voltage is approximately Zero Voltage is Zero

Not able to sink infinite current It is an infinite current sink

Not electrically connected to Ground Electrically connected to Ground

Inverting Amplifier:

The basic OP-AMP inverting amplifier is shown in diagram. The input voltage Vin is applied to
the inverting input through the input resistor Rin. The non inverting input is grounded. The
feedback resistor Rf is connected between the output and the inverting input. Since the input
impedance of an op-amp is considered very high, no current can flow into or out of the input
terminals. Therefore Iinmust flow through Rf and is indicated by If (the feedback current). Since
Rin and Rf are in series, then Iin = If . The voltage between inverting and non-inverting inputs is
essentially equal to zero volt. Therefore, the inverting input terminal is also at 0 volt. For this
reason the inverting input is said to be at virtual ground. The output voltage (V out) is taken across
Rf
Non-inverting Amplifier:

The basic OP-AMP non-inverting amplifier is shown in diagram. The input signal Vin is applied
to the non-inverting input terminal. The resistor Rin is connected from the inverting input to
ground. The feedback resistor Rf is connected between the output and the inverting input.
Resistors Rf and Rin form a resistive ratio network to produce the feedback voltage (VA) needed
at the inverting input. Feedback voltage (VA) is developed across Rin. Since the potential at the
inverting input
Op-amp as Adder:

The input signals to be added are applied to the inverting input terminal of op-amp. The
following figure shows the inverting adder using op-amp with two inputs V1 and V2.

Let us assume currents I1 and I2 are flowing through resistances R1 and R2 respectively. Since
input current to the op-amp is zero, the two currents are added to get current I, which flows
through the feedback resistance Rf.
Thus by KCL at inverting terminal, we get

Substituting for the currents,

Thus the above equation gives the weighted addition of the two input signals (in the form mX +
n Y, where m and n are the weights of inputs X and Y respectively)
If R1=R2=R

Thus the addition of the two input signals obtained with gain [-Rf/R ]
If Rf=R,

Thus the addition of two inputs obtained. The negative sign indicates that input and output are having 180̊
phase shift.
The above circuit can also be used to get the average of the two inputs, with the following substitution.
Thus the circuit can be used as an averager.
If R=2Rf

Op-amp subtractor:

A difference amplifier or op amp subtractor is a specially designed op amp based amplifier

circuit which amplifies the difference between two input signals and rejects any signals common
to both inputs.
Let us consider the above op amp circuit. Now, by applying Kirchhoff Current Law at node 1,
we get,

We have written this equation by assuming that there is no current entering in the inverting
terminal of the op amp.
Now, by simplifying the above equation, we get,

Now, by applying Kirchhoff Current Law, at node 2, we get,

We know that, in ideal op amp, voltage at inverting input is same as the voltage at non inverting
input. Hence,

So, now from equation (i) and (ii), we get,

The difference amplifier must reject any signal common to both inputs. That means, if polarity
and magnitude of both input signals are same, the output must be zero.

This condition must be satisfied only when,

In that case, equation (iii) becomes,

Again, if we make, R1 = R2, then equation (iv) becomes,

So, if R1 = R2 and also R3 = R4 then the difference amplifier becomes a perfect subtractor, which
subtracts directly the input signals.

Op-amp as integrator:

A circuit in which output voltage waveform is the time integral of the input voltage waveform is
called integrator or integrating amplifier.
The following circuit shows a basic/ideal integrator using op-amp,

The non-inverting input terminal is at ground potential and hence, the inverting terminal is
appearing to be at ground potential. The current 'I' through the resistance R is given as,

The input current to op-amp is zero so same current 'I' flows through the capacitor 'C' in
feedback path also and is given as,

Comparing the above two equations for current 'I' we get,

Integrating both the sides, we get,

Where 1/RC=≫Gain / scale factor of an integrator.

Thus output voltage is nothing but time integration of the input signal and hence acting as an
integrator.

Op-amp Differentiator:

By Exchanging the positions of 'R' and 'C' in integrator the differentiator circuit is obtained
The circuit which produces the differentiation of the input voltage at its output is called
differentiator.
The following circuit diagram shows the differentiator using op-amp.

Assume current 'I' is flowing through capacitor C. It is given as

Since input current to the op-amp is zero, same current 'I' flows through
resistance R as shown. It is given by
Equating both the above equations of 'I' we get,

Thus output voltage is nothing but time differentiation of the input signal
and hence acting as differentiator. Here 'RC' is the time constant of the
differentiator.

Unity gain buffer

A unity gain buffer (also called a unity-gain amplifier) is a op-amp circuit which has a
voltage gain of 1.
This means that the op amp does not provide any amplification to the signal. The reason
it is called a unity gain buffer (or amplifier) is because it provides a gain of 1, meaning
there is no gain; the output voltage signal is the same as the input voltage. Thus, for
example, if 10V goes into the op amp as input, 10V comes out as output. A unity gain
buffer acts as a true buffer, providing no amplification or attenuation to the signal.

What is the Purpose of a Unity Gain Buffer?

One may ask then, what is the purpose of a unity gain buffer? Since it outputs the same
signal it inputs, what is its purpose in a circuit? This will now be explained.
An op amp circuit is a circuit with a very high input impedance. This high input
impedance is the reason unity gain buffers are used. This will now be explained.
When a circuit has a very high input impedance, very little current is drawn from the
circuit. If you know ohm's law, you know that current, I=V/R. Thus, the greater the
resistance, the less current is drawn from a power source. Thus, the power of the circuit
isn't affected when current is feeding a high impedance load.
Let's look at both illustrations below:
The below circuit is a circuit in which a power source feeds a low-impedance load.

In this circuit above, the load demands and draws a huge amount of current, because the
load is low impedance. According to ohm's law, again, current, I=V/R. If a load has very
low resistance, it draws huge amounts of current. This causes huge amounts of power to
be drawn by the power source and, because of this, causes high disturbances and use of
the power source powering the load.
Now let's look at the circuit below, connected to a unity-gain bufffer:

This circuit above now draws very little current from the power source above. Because
the op amp has such high impedance, it draw very little current. And because an op amp
that has no feedback resistors gives the same output, the circuit outputs the same signal
that is fed in.
This is the reason unity gain buffers are used. They draw very little current, not
disturbing the original circuit, and give the same voltage signal as output. They act as
isolation buffers, isolating a circuit so that the power of a circuit is disturbed very little.

Field-effect transistor:
The field-effect transistor (FET) is an electronic device which uses an electric field to
control the flow of current. This is achieved by the application of a voltage to the gate
terminal, which in turn alters the conductivity between the drain and source terminals.
FETs are also known as unipolar transistors since they involve single-carrier-type
operation. Many different types of field effect transistors exist. Field effect transistors
generally display very high input impedance at low frequencies.
FETs can be majority-charge-carrier devices, in which the current is carried
predominantly by majority carriers, or minority-charge-carrier devices, in which the
current is mainly due to a flow of minority carriers.[3] The device consists of an active
channel through which charge carriers, electrons or holes, flow from the source to the
drain. Source and drain terminal conductors are connected to the semiconductor
through ohmic contacts. The conductivity of the channel is a function of the potential
applied across the gate and source terminals.
The FET's three terminals are:

1. source (S), through which the carriers enter the channel. Conventionally, current
entering the channel at S is designated by IS.
2. drain (D), through which the carriers leave the channel. Conventionally, current
entering the channel at D is designated by ID. Drain-to-source voltage is VDS.
3. gate (G), the terminal that modulates the channel conductivity. By applying
voltage to G, one can control ID.

Advantages
One advantage of the FET is its high gate to main current resistance, on the order of 100
MΩ or more, thus providing a high degree of isolation between control and flow.
Because base current noise will increase with shaping time, a FET typically produces less
noise than a bipolar junction transistor (BJT), and is thus found in noise sensitive
electronics such as tuners and low-noise amplifiers for VHF and satellite receivers. It is
relatively immune to radiation. It exhibits no offset voltage at zero drain current and
hence makes an excellent signal chopper. It typically has better thermal stability than a
BJT. Because they are controlled by gate charge, once the gate is closed or opened, there
is no additional power draw, as there would be with a bipolar junction transistor or with
non-latching relays in some states. This allows extremely low-power switching, which in
turn allows greater miniaturization of circuits because heat dissipation needs are reduced
compared to other types of switches.

Disadvantages
A field-effect transistor has a relatively low gain–bandwidth product compared to a BJT.
The MOSFET is very susceptible to overload voltages, thus requiring special handling
during installation. The fragile insulating layer of the MOSFET between the gate and
channel makes it vulnerable to electrostatic discharge or changes to threshold voltage
during handling. This is not usually a problem after the device has been installed in a
properly designed circuit.
FETs often have a very low "on" resistance and have a high "off" resistance. However,
the intermediate resistances are significant, and so FETs can dissipate large amounts of
power while switching. Thus efficiency can put a premium on switching quickly, but this
can cause transients that can excite stray inductances and generate significant voltages
that can couple to the gate and cause unintentional switching. FET circuits can therefore
require very careful layout and can involve trades between switching speed and power
dissipation. There is also a trade-off between voltage rating and "on" resistance, so high-
voltage FETs have a relatively high "on" resistance and hence conduction losses.]

I–V characteristics and output plot of a JFET n-channel transistor.

Simulation result for right side: formation of inversion channel(electron density) and left
side: current-gate voltage curve(transfer characteristics) in an n-
channel nanowire MOSFET. Note that the threshold voltage for this device lies around
0.45 V.

FET conventional symbol types

The FET controls the flow of electrons (or electron holes) from the source to drain by
affecting the size and shape of a "conductive channel" created and influenced by voltage
(or lack of voltage) applied across the gate and source terminals. (For simplicity, this
discussion assumes that the body and source are connected.) This conductive channel is
the "stream" through which electrons flow from source to drain.
n-channel[edit]
In an n-channel "depletion-mode" device, a negative gate-to-source voltage causes
a depletion region to expand in width and encroach on the channel from the sides,
narrowing the channel. If the active region expands to completely close the channel, the
resistance of the channel from source to drain becomes large, and the FET is effectively
turned off like a switch (see right figure, when there is very small current). This is called
"pinch-off", and the voltage at which it occurs is called the "pinch-off voltage".
Conversely, a positive gate-to-source voltage increases the channel size and allows
electrons to flow easily (see right figure, when there is a conduction channel and current
is large).
In an n-channel "enhancement-mode" device, a conductive channel does not exist
naturally within the transistor, and a positive gate-to-source voltage is necessary to create
one. The positive voltage attracts free-floating electrons within the body towards the gate,
forming a conductive channel. But first, enough electrons must be attracted near the gate
to counter the dopant ions added to the body of the FET; this forms a region with no
mobile carriers called a depletion region, and the voltage at which this occurs is referred
to as the threshold voltage of the FET. Further gate-to-source voltage increase will attract
even more electrons towards the gate which are able to create a conductive channel from
source to drain; this process is called inversion.
p-channel[edit]
In a p-channel "depletion-mode" device, a positive voltage from gate to body widens the
depletion layer by forcing electrons to the gate-insulator/semiconductor interface, leaving
exposed a carrier-free region of immobile, positively charged acceptor ions. Conversely,
in a p-channel "enhancement-mode" device, a conductive region does not exist and
negative voltage must be used to generate a conduction channel.
Effect of source/drain voltage on channel[edit]
For either enhancement- or depletion-mode devices, at drain-to-source voltages much
less than gate-to-source voltages, changing the gate voltage will alter the channel
resistance, and drain current will be proportional to drain voltage (referenced to source
voltage). In this mode the FET operates like a variable resistor and the FET is said to be
operating in a linear mode or ohmic mode.[5][6]
If drain-to-source voltage is increased, this creates a significant asymmetrical change in
the shape of the channel due to a gradient of voltage potential from source to drain. The
shape of the inversion region becomes "pinched-off" near the drain end of the channel. If
drain-to-source voltage is increased further, the pinch-off point of the channel begins to
move away from the drain towards the source. The FET is said to be in saturation mode;
[7]
although some authors refer to it as active mode, for a better analogy with bipolar
transistor operating regions.[8][9] The saturation mode, or the region between ohmic and
saturation, is used when amplification is needed. The in-between region is sometimes
considered to be part of the ohmic or linear region, even where drain current is not
approximately linear with drain voltage.
Even though the conductive channel formed by gate-to-source voltage no longer connects
source to drain during saturation mode, carriers are not blocked from flowing.
Considering again an n-channel enhancement-mode device, a depletion region exists in
the p-type body, surrounding the conductive channel and drain and source regions. The
electrons which comprise the channel are free to move out of the channel through the
depletion region if attracted to the drain by drain-to-source voltage. The depletion region
is free of carriers and has a resistance similar to silicon. Any increase of the drain-to-
source voltage will increase the distance from drain to the pinch-off point, increasing the
resistance of the depletion region in proportion to the drain-to-source voltage applied.
This proportional change causes the drain-to-source current to remain relatively fixed,
independent of changes to the drain-to-source voltage, quite unlike its ohmic behavior in
the linear mode of operation. Thus, in saturation mode, the FET behaves as a constant-
current source rather than as a resistor, and can effectively be used as a voltage amplifier.
In this case, the gate-to-source voltage determines the level of constant current through
the channel

Uses
The most commonly used FET is the MOSFET. The CMOS (complementary metal oxide
semiconductor) process technology is the basis for modern digital integrated circuits.
This process technology uses an arrangement where the (usually "enhancement-mode")
p-channel MOSFET and n-channel MOSFET are connected in series such that when one
is on, the other is off.
In FETs, electrons can flow in either direction through the channel when operated in the
linear mode. The naming convention of drain terminal and source terminal is somewhat
arbitrary, as the devices are typically (but not always) built symmetrically from source to
drain. This makes FETs suitable for switching analog signals between paths
(multiplexing). With this concept, one can construct a solid-state mixing board, for
example.
A common use of the FET is as an amplifier. For example, due to its large input
resistance and low output resistance, it is effective as a buffer in common-drain (source
follower) configuration.
IGBTs are used in switching internal combustion engine ignition coils, where fast
switching and voltage blocking capabilities are important.

MOS FET

The MOSFET (Metal Oxide Semiconductor Field Effect Transistor) transistor is a

semiconductor device which is widely used for switching and amplifying electronic
signals in the electronic devices. The MOSFET is a core of integrated circuit and it can
be designed and fabricated in a single chip because of these very small sizes. The
MOSFET is a four terminal device with source(S), gate (G), drain (D) and body (B)
terminals. The body of the MOSFET is frequently connected to the source terminal so
making it a three terminal device like field effect transistor. The MOSFET is very far the
most common transistor and can be used in both analog and digital circuits.
The MOSFET works by electronically varying the width of a channel along which charge
carriers flow (electrons or holes). The charge carriers enter the channel at source and exit
via the drain. The width of the channel is controlled by the voltage on an electrode is
called gate which is located between source and drain. It is insulated from the channel
near an extremely thin layer of metal oxide. The MOS capacity present in the device is
the main part

MOSFET can function in two ways:

Depletion mode

Enhancement mode

Depletion Mode:When there is no voltage on the gate, the channel shows its maximum
conductance. As the voltage on the gate is either positive or negative, the channel
conductivity decreases.

For example
Enhancement mode:

When there is no voltage on the gate the device does not conduct. More is the voltage on
the gate, the better the device can conduct.

Working Principle of MOSFET:

The aim of the MOSFET is to be able to control the voltage and current flow between the
source and drain. It works almost as a switch. The working of MOSFET depends upon
the MOS capacitor. The MOS capacitor is the main part of MOSFET. The semiconductor
surface at the below oxide layer which is located between source and drain terminal. It
can be inverted from p-type to n-type by applying a positive or negative gate voltages
respectively. When we apply the positive gate voltage the holes present under the oxide
layer with a repulsive force and holes are pushed downward with the substrate. The
depletion region populated by the bound negative charges which are associated with the
acceptor atoms. The electrons reach channel is formed. The positive voltage also attracts
electrons from the n+ source and drain regions into the channel. Now, if a voltage is
applied between the drain and source, the current flows freely between the source and
drain and the gate voltage controls the electrons in the channel. Instead of positive
voltage if we apply negative voltage , a hole channel will be formed under the oxide
layer.

P-Channel MOSFET:

The P- Channel MOSFET has a P- Channel region between source and drain. It is a four
terminal device such as gate, drain, source, body. The drain and source are heavily doped
p+ region and the body or substrate is n-type. The flow of current is positively charged
holes. When we apply the negative gate voltage, the electrons present under the oxide
layer with are pushed downward into the substrate with a repulsive force. The depletion
region populated by the bound positive charges which are associated with the donor
atoms. The negative gate voltage also attracts holes from p+ source and drain region into
the channel region.
N- Channel MOSFET:

The N-Channel MOSFET has a N- channel region between source and drain It is a four
terminal device such as gate, drain , source , body. This type of MOSFET the drain and
source are heavily doped n+ region and the substrate or body is P- type. The current
flows due to the negatively charged electrons. When we apply the positive gate voltage
the holes present under the oxide layer pushed downward into the substrate with a
repulsive force. The depletion region is populated by the bound negative charges which
are associated with the acceptor atoms. The electrons reach channel is formed. The
positive voltage also attracts electrons from the n+ source and drain regions into the
channel. Now, if a voltage is applied between the drain and source the current flows
freely between the source and drain and the gate voltage controls the electrons in the
channel. Instead of positive voltage if we apply negative voltage a hole channel will be
formed under the oxide layer.
For Example Using the MOSFET as a Switch:

In this circuit arrangement an enhanced mode and N-channel MOSFET is being used to
switch a sample lamp ON and OFF. The positive gate voltage is applied to the base of the
transistor and the lamp is ON (VGS =+v) or at zero voltage level the device turns off
(VGS=0). If the resistive load of the lamp was to be replaced by an inductive load and
connected to the relay or diode which is protect to the load. In the above circuit, it is a
very simple circuit for switching a resistive load such as lamp or LED. But when using
MOSFET to switch either inductive load or capacitive load protection is required to
contain the MOSFET device. We are not giving the protection the MOSFET device is
damage. For the MOSFET to operate as an analog switching device, it needs to be
switched between its cutoff region where VGS =0 and saturation region where VGS =+v.

Major FET datasheet specifications & parameters

Some of the main FET specifications used in datasheets are defined below. Some of the
parameters are particularly important for different types of FET, e.g. JFET while others
may be more applicable to the MOSFET, etc.

 Gate source voltage, VGS : The FET parameter VGS is the rating for the maximum
voltage that can be tolerated between the gate and source terminals. The purpose for
including this parameter in the data sheet is to prevent damage of the gate oxide. The
actual gate oxide withstand voltage is typically much higher than this but it varies as a
result of the tolerances that exist in the manufacturing processes. It is advisable to
remain well within this rating so that the reliability of the device is maintained. Often
many design rules indicate that the device should only be run to 60 or 70% of this
rating.
 Drain-Source Voltage, VDSS: This is a rating for the maximum drain-source voltage
that can be applied without causing avalanche breakdown. The parameter is normally
stated for the case where the gate is shorted to the source and for a temperature of
25°C. Depending on temperature, the avalanche breakdown voltage could actually be
less than the VDSS rating.

When designing a circuit, it is always best to leave a significant margin between the
 maximum voltage to be experienced and the VDSS specification. Often they may be run
at around 50% VDSS to ensure reliability.
 Gate reverse leakage current , Igss:

 Threshold voltage VGS(TH) : The threshold voltage VGS(TH) is the minimum gate voltage
that can form a conducting channel between the source and the drain. It is normally
quoted for a given source drain current.
 Drain current at zero gate voltage ,Idss : This FET parameter is the maximum
continuous current the device can carry with the device fully on. Normally it is
specified for a particular temperature, typically 25°C.

This FET specification is based on the junction-to-case thermal resistance rating

RθJC (junction / channel temperature) and the case temperature.

This FET parameter is of particular interest for power MOSFETs and when
determining the maximum current parameter no switching losses are accounted for.
Also holding the case at 25°C is not feasible in practice. As a result the actual
switching current should be limited to less than half of the Idss at TC = 25°C rating in a
hard switched application. Values of a third to a quarter are commonly used.
 Gate source cut-off voltage , VGS(off): The gate source cut-off voltage is really a
turn-off specification. It defines the threshold voltage for a given residual current, so
the device is basically off but on the verge of turning on. The threshold voltage has a
negative temperature coefficient, i.e. it decreases with increasing temperature. This
temperature coefficient also affects turn-on and turn-off delay times which has an
impact on some circuits.
 Forward transconductance, Gfs :
 Input capacitance, Ciss : The input capacitance parameter for a FET is the
capacitance that is measured between the gate and source terminals with the drain
shorted to the source for AC signals. In other words this is effectively the capacitance
between the gate and channel. Ciss is made up of the gate to drain capacitance Cgd in
parallel with the gate to source capacitance Cgs. This can be expressed as:
Ciss=Cgs+CgdCiss=Cgs+Cgd

 Drain-source on resistance, Rds(on) : With the FET turned hard on, this is the
resistance in ohms exhibited across the channel between the drain and source. It is
particularly important in switching applications from logic to power switching as well
as in RF switching, including applications in mixers. FETs typically are able to
provide a good performance for switching and have a relatively low Rds(on) value.

 Power dissipation, Ptot : This FET specification details the maximum continuous
power that the device can dissipate. The power dissipation is normally specified in
free standing in air, or with the base held at a given temperature, typically 25°C. The
actual conditions, whether held in a heat-sink, or in free air will depend upon the
device types and the manufacturer. Obviously power FETs are more likely to detailed
in a condition where they are held on a heatsink, whilst the free air condition is
applicable to signal FETs.
FET datasheets contain a host of different parameters and specifications to define the
performance of the FET. These are all set out in the various datasheets that will enable
the correct choice of FET to be made.

UJT
The Unijunction Transistor or UJT for short, is another solid state three terminal device
that can be used in gate pulse, timing circuits and trigger generator applications to switch
and control either thyristors and triac’s for AC power control type applications.
Like diodes, unijunction transistors are constructed from separate P-type and N-type
semiconductor materials forming a single (hence its name Uni-Junction) PN-junction
within the main conducting N-type channel of the device.
Although the Unijunction Transistor has the name of a transistor, its switching
characteristics are very different from those of a conventional bipolar or field effect
transistor as it can not be used to amplify a signal but instead is used as a ON-OFF
switching transistor. UJT’s have unidirectional conductivity and negative impedance
characteristics acting more like a variable voltage divider during breakdown.
Like N-channel FET’s, the UJT consists of a single solid piece of N-type semiconductor
material forming the main current carrying channel with its two outer connections
marked as Base 2 ( B2 ) and Base 1 ( B1 ). The third connection, confusingly marked as
the Emitter ( E ) is located along the channel. The emitter terminal is represented by an
arrow pointing from the P-type emitter to the N-type base.
The Emitter rectifying p-n junction of the unijunction transistor is formed by fusing the
P-type material into the N-type silicon channel. However, P-channel UJT’s with an N-
type Emitter terminal are also available but these are little used.
The Emitter junction is positioned along the channel so that it is closer to
terminal B2 than B1. An arrow is used in the UJT symbol which points towards the base
indicating that the Emitter terminal is positive and the silicon bar is negative material.
Below shows the symbol, construction, and equivalent circuit of the UJT.

Unijunction Transistor Symbol and Construction

Notice that the symbol for the unijunction transistor looks very similar to that of the
junction field effect transistor or JFET, except that it has a bent arrow representing the
Emitter( E ) input. While similar in respect of their ohmic channels, JFET’s and UJT’s
operate very differently and should not be confused.
So how does it work? We can see from the equivalent circuit above, that the N-type
channel basically consists of two resistors RB2 and RB1 in series with an equivalent (ideal)
diode, D representing the p-n junction connected to their center point. This Emitter p-n
junction is fixed in position along the ohmic channel during manufacture and can
therefore not be changed.
Resistance RB1 is given between the Emitter, E and terminal B1, while resistance RB2 is
given between the Emitter, E and terminal B2. As the physical position of the p-n junction
is closer to terminal B2 than B1 the resistive value of RB2 will be less than RB1.
The total resistance of the silicon bar (its Ohmic resistance) will be dependent upon the
semiconductors actual doping level as well as the physical dimensions of the N-type
silicon channel but can be represented by RBB. If measured with an ohmmeter, this static
resistance would typically measure somewhere between about 4kΩ and 10kΩ’s for most
common UJT’s such as the 2N1671, 2N2646 or the 2N2647.
These two series resistances produce a voltage divider network between the two base
terminals of the unijunction transistor and since this channel stretches from B2 to B1,
when a voltage is applied across the device, the potential at any point along the channel
will be in proportion to its position between terminals B2 and B1. The level of the voltage
gradient therefore depends upon the amount of supply voltage.
When used in a circuit, terminal B1 is connected to ground and the Emitter serves as the
input to the device. Suppose a voltage VBB is applied across the UJT
between B2 and B1 so that B2 is biased positive relative to B1. With zero Emitter input
applied, the voltage developed across RB1 (the lower resistance) of the resistive voltage
divider can be calculated as:

Unijunction Transistor RB1 Voltage

For a unijunction transistor, the resistive ratio of RB1 to RBB shown above is called
the intrinsic stand-off ratio and is given the Greek symbol: η (eta). Typical standard
values of η range from 0.5 to 0.8 for most common UJT’s.
If a small positive input voltage which is less than the voltage developed across
resistance, RB1 ( ηVBB ) is now applied to the Emitter input terminal, the diode p-n
junction is reverse biased, thus offering a very high impedance and the device does not
conduct. The UJT is switched “OFF” and zero current flows.
However, when the Emitter input voltage is increased and becomes greater
than VRB1 (or ηVBB + 0.7V, where 0.7V equals the p-n junction diode volt drop) the p-n
junction becomes forward biased and the unijunction transistor begins to conduct. The
result is that Emitter current, ηIE now flows from the Emitter into the Base region.
The effect of the additional Emitter current flowing into the Base reduces the resistive
portion of the channel between the Emitter junction and the B1 terminal. This reduction in
the value of RB1 resistance to a very low value means that the Emitter junction becomes
even more forward biased resulting in a larger current flow. The effect of this results in a
negative resistance at the Emitter terminal.
Likewise, if the input voltage applied between the Emitter and B1 terminal decreases to a
value below breakdown, the resistive value of RB1 increases to a high value. Then
the Unijunction Transistor can be thought of as a voltage breakdown device.
So we can see that the resistance presented by RB1 is variable and is dependant on the
value of Emitter current, IE. Then forward biasing the Emitter junction with respect
to B1causes more current to flow which reduces the resistance between the
Emitter, E and B1.
In other words, the flow of current into the UJT’s Emitter causes the resistive value
of RB1to decrease and the voltage drop across it, VRB1 must also decrease, allowing more
current to flow producing a negative resistance condition.

Unijunction Transistor Applications

Now that we know how a unijunction transistor works, what can they be used for. The
most common application of a unijunction transistor is as a triggering device
for SCR’s and Triacsbut other UJT applications include sawtoothed generators, simple
oscillators, phase control, and timing circuits. The simplest of all UJT circuits is the
Relaxation Oscillator producing non-sinusoidal waveforms.
In a basic and typical UJT relaxation oscillator circuit, the Emitter terminal of the
unijunction transistor is connected to the junction of a series connected resistor and
capacitor, RC circuit as shown below.

Unijunction Transistor Relaxation Oscillator

When a voltage (Vs) is firstly applied, the unijunction transistor is “OFF” and the
capacitor C1 is fully discharged but begins to charge up exponentially through
resistor R3. As the Emitter of the UJT is connected to the capacitor, when the charging
voltage Vc across the capacitor becomes greater than the diode volt drop value, the p-n
junction behaves as a normal diode and becomes forward biased triggering the UJT into
conduction. The unijunction transistor is “ON”. At this point the Emitter to B1
impedance collapses as the Emitter goes into a low impedance saturated state with the
flow of Emitter current through R1 taking place.
As the ohmic value of resistor R1 is very low, the capacitor discharges rapidly through
the UJT and a fast rising voltage pulse appears across R1. Also, because the capacitor
discharges more quickly through the UJT than it does charging up through resistor R3,
the discharging time is a lot less than the charging time as the capacitor discharges
through the low resistance UJT.
When the voltage across the capacitor decreases below the holding point of the p-n
junction ( VOFF ), the UJT turns “OFF” and no current flows into the Emitter junction so
once again the capacitor charges up through resistor R3 and this charging and discharging
process between VON and VOFF is constantly repeated while there is a supply
voltage, Vsapplied.

UJT Oscillator Waveforms

Then we can see that the unijunction oscillator continually switches “ON” and “OFF”
without any feedback. The frequency of operation of the oscillator is directly affected by
the value of the charging resistance R3, in series with the capacitor C1 and the value of η.
The output pulse shape generated from the Base1 (B1) terminal is that of a sawtooth
waveform and to regulate the time period, you only have to change the ohmic value of
resistance, R3 since it sets the RC time constant for charging the capacitor.
The time period, T of the sawtoothed waveform will be given as the charging time plus
the discharging time of the capacitor. As the discharge time, τ1 is generally very short in
comparison to the larger RC charging time, τ2 the time period of oscillation is more or
less equivalent to T ≅ τ2. The frequency of oscillation is therefore given by ƒ = 1/T.

UJT Oscillator Example No1

The data sheet for a 2N2646 Unijunction Transistor gives the intrinsic stand-off ratio η as
0.65. If a 100nF capacitor is used to generate the timing pulses, calculate the timing
resistor required to produce an oscillation frequency of 100Hz.
1. The timing period is given as:

2. The value of the timing resistor, R3 is calculated as:

Then the value of charging resistor required in this simple example is calculated
as 95.3kΩ’s to the nearest preferred value. However, there are certain conditions required
for the UJT relaxation oscillator to operate correctly as the resistive value of R3 can be
too large or too small.
For example, if the value of R3 was too large, (Megohms) the capacitor may not charge
up sufficiently to trigger the Unijunction’s Emitter into conduction but must also be large
enough to ensure that the UJT switches “OFF” once the capacitor has discharged to
below the lower trigger voltage.
Likewise if the value of R3 was too small, (a few hundred Ohms) once triggered the
current flowing into the Emitter terminal may be sufficiently large to drive the device into
its saturation region preventing it from turning “OFF” completely. Either way the
unijunction oscillator circuit would fail to oscillate.

UJT Speed Control Circuit

One typical application of the unijunction transistor circuit above is to generate a series of
pulses to fire and control a thyristor. By using the UJT as a phase control triggering
circuit in conjunction with an SCR or Triac, we can adjust the speed of a universal AC or
DC motor as shown.

Unijunction Transistor Speed Control

Using the circuit above, we can control the speed of a universal series motor (or
whichever type of load we want, heaters, lamps, etc) by regulating the current flowing
through the SCR. To control the motors speed, simply change the frequency of the
sawtooth pulse, which is achieved by varying the value of the potentiometer.

Unijunction Transistor Summary

We have seen that a Unijunction Transistor or UJT for short, is an electronic
semiconductor device that has only one p-n junction within a N-type (or P-type) lightly
doped ohmic channel. The UJT has three terminals one labelled Emitter (E) and two
Bases (B1 and B2).
Two ohmic contacts B1 and B2 are attached at each ends of the semiconductor channel
with the resistance between B1 and B2, when the emitter is open circuited being called
the interbase resistance, RBB. If measured with an ohmmeter, this static resistance would
typically measure somewhere between about 4kΩ and 10kΩ’s for most common UJT’s.
The ratio of RB1 to RBB is called the intrinsic stand-off ratio, and is given the Greek
symbol: η (eta). Typical standard values of η range from 0.5 to 0.8 for most common
UJT’s.
The unijunction transistor is a solid state triggering device that can be used in a variety of
circuits and applications, ranging from the firing of thyristors and triacs, to the use in
sawtooth generators for phase control circuits.The negative resistance characteristic of
the UJT also makes it very useful as a simple relaxation oscillator.
When connected as a relaxation oscillator, it can oscillate independently without a tank
circuit or complicated RC feedback network. When connected this way, the unijunction
transistor is capable of generating a train of pulses of varying duration simply by varying
the values of a single capacitor, (C) or resistor, (R).
Commonly available unijunction transistors include the 2N1671, 2N2646, 2N2647, etc,
with the 2N2646 being the most popular UJT for use in pulse and sawtooth generators
and time delay circuits. Other types of unijunction transistor devices available are
called Programmable UJTs, which can have their switching parameters set by external
resistors. The most common Programmable Unijunction Transistors are the 2N6027 and
the 2N6028.