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CA important questions with solution (AutoRecovered)
CA important questions with solution (AutoRecovered)
CA important questions with solution (AutoRecovered)
UNIT 1
2 marks
1. What is BCD?
BCD is a system of writing numerals that
assigns a four-digit binary code to each digit 0-
9.
RS Flip Flop
JK Flip Flop
D Flip Flop
T Flip Flop
Encoder circuit basically converts the applied information signal into a coded digital
bit stream.
Decoder performs reverse operation and recovers the original information signal
from the coded bits.
The sum of binary number and its complement is always equal to decimal 9. In other
words, the 1’s complement of an excess-3 code is the excess-3 code for the 9’s
complement of the corresponding decimal number.
For example, the excess-3 code for decimal number 5 is 1000 and 1’s complement
of 1000 is 0111, which is excess-3 code for decimal number 4, and it is 9’s
complement of number 5.
29. Find 9’s and 10’s complement for the number 56483
In electronics design, an excitation table shows the minimum inputs that are
necessary to generate a particular next state when the current state is known.
4 Marks:
1. Write the steps of 1’s and 2’s complement subtraction and demonstrate with an
example
Subtraction using 1’s complement
Unsigned numbers
The comprehend is smaller than minuend or the number of digits of comprehend are
lesser than minuend
Inserting zero‘s to left of the comprehend
Take 1‘s complement for minuend
Add both comprehend and minuend
There is no end around Carry so the result is to be again take 1‘s complement
Eg: Subtract 110100101 from 110101
4. What is Half Adder? Explain with circuit diagram and truth table.
The Half-Adder is a basic building block of adding two numbers as two inputs and
produce out two outputs. The adder is used to perform OR operation of two single bit
binary numbers. The augent and addent bits are two input states, and 'carry'
and 'sum 'are two output states of the half adder.
Block diagram
Truth Table
1. 'A' and' B' are the input states, and 'sum' and 'carry' are the output states.
2. The carry output is 0 in case where both the inputs are not 1.
3. The least significant bit of the sum is defined by the 'sum' bit.
The SOP form of the sum and carry are as follows:
Sum = x'y+xy'
Carry = xy
5. What is Full Adder? Explain with circuit diagram and truth table
The half adder is used to add only two numbers. To overcome this problem, the full
adder was developed. The full adder is used to add three 1-bit binary numbers A, B,
and carry C. The full adder has three input states and two output states i.e., sum and
carry.
Block diagram
Truth table
1. 'A' and' B' are the input variables. These variables represent the two significant bits
which are going to be added
2. 'Cin' is the third input which represents the carry. From the previous lower significant
position, the carry bit is fetched.
3. The 'Sum' and 'Carry' are the output variables that define the output values.
4. The eight rows under the input variable designate all possible combinations of 0 and 1
that can occur in these variables
Flip flops can be used to store a single bit of binary data (1or 0). However, in
order to store multiple bits of data, we need multiple flip flops. N flip flops are
to be connected in an order to store n bits of data. A Register is a device which
is used to store such information. It is a group of flip flops connected in series
used to store multiple bits of data.
The information stored within these registers can be transferred with the help
of shift registers
The registers which will shift the bits to left are called “Shift left registers”.
The registers which will shift the bits to right are called “Shift right registers”.
The logic circuit given below shows a serial-in serial-out shift register. The circuit
consists of four D flip-flops which are connected in a serial manner. All these flip-flops
are synchronous with each other since the same clock signal is applied to each flip flop.
7. 8 Marks:
2. What are Counters? Construct and explain the 4-bit counter with circuit diagram and
state table.
3. What is Multiplexer? Explain 4 X1 Multiplexer with truth table and logic diagram
here
4. What is Decoder? Explain 3 X8 decoder with truth table and logic diagram
Here, also here
5. What is Encoder? Explain 8X3 encoder with truth table and logic diagram.
8 to 3 line Encoder:
The 8 to 3 line Encoder is also known as Octal to Binary Encoder. In 8 to 3 line
encoder, there is a total of eight inputs, i.e., Y 0, Y1, Y2, Y3, Y4, Y5, Y6, and Y7 and three
outputs, i.e., A0, A1, and A2. In 8-input lines, one input-line is set to true at a time to get
the respective binary code in the output side. Below are the block diagram and the
truth table of the 8 to 3 line encoder.
Block Diagram:
Truth Table:
The logical expression of the term A0, A1, and A2 are as follows:
A2=Y4+Y5+Y6+Y7
A1=Y2+Y3+Y6+Y7
A0=Y7+Y5+Y3+Y1
Now in this circuit, if you provide input at A and B ends. You will get the output on
sum and carry ends according to truth table we have created above. So here we have
completed our four steps for creating the combinational circuit.
So, we have created a combinational circuit called Half Adder. You can apply the
same steps to create any other combinational circuit.
Skip 😊
2 Marks
1. What is instruction?
2. What are registers?
3. Define program
4. What does CLA instruction do?
The CLA instruction clears the accumulator, places zeros in the AC.
5. Define Instruction cycle.
A program residing in the memory unit of a computer consists of a sequence of
instructions. These instructions are executed by the processor by going through a
cycle for each instruction.
RISC is the reduced instruction set computer, RISC systems seek to improve
performance by reducing the number of clock cycles required to perform tasks.
BSA: The ‘Branch and Save Return Address’ (BSA) instruction transfers the
execution of a program to another portion (a subroutine) which is to be executed out
of sequence.
FGO=1 prevents the input device(s) from overwriting a prior input held in INPR
that the processor hasn't accepted yet
Example: 11001 ROR 2 = 01110; 11001 ROL 2 = 00111. ROR = rotate right; ROL =
rotate left.
4 Marks
1. List the difference between CISC and RISC.
2. What are instructions? Explain the various types of instructions Memory, Register,
IO
3. What are instruction formats? Explain various types of instruction formats
with example
answer
Memory reference instructions are those commands or instructions which are in the
custom to generate a reference to the memory and approval to a program to have an
approach to the commanded information and that states as to from where the data is
cache continually. These instructions are known as Memory Reference Instructions.
There are seven memory reference instructions which are as follows &
AND
The AND instruction implements the AND logic operation on the bit collection from
the register and the memory word that is determined by the effective address. The
result of this operation is moved back to the register.
ADD
The ADD instruction adds the content of the memory word that is denoted by the
effective address to the value of the register.
LDA
The LDA instruction shares the memory word denoted by the effective address to the
register.
STA
STA saves the content of the register into the memory word that is defined by the
effective address. The output is next used to the common bus and the data input is
linked to the bus. It needed only one micro-operation.
BUN
The Branch Unconditionally (BUN) instruction can send the instruction that is
determined by the effective address. They understand that the address of the next
instruction to be performed is held by the PC and it should be incremented by one to
receive the address of the next instruction in the sequence. If the control needs to
implement multiple instructions that are not next in the sequence, it can execute the
BUN instruction.
BSA
BSA stands for Branch and Save return Address. These instructions can branch a
part of the program (known as subroutine or procedure). When this instruction is
performed, BSA will store the address of the next instruction from the PC into a
memory location that is determined by the effective address.
ISZ
The Increment if Zero (ISZ) instruction increments the word determined by effective
address. If the incremented cost is zero, thus PC is incremented by 1. A negative
value is saved in the memory word through the programmer. It can influence the zero
value after getting incremented repeatedly. Thus, the PC is incremented and the next
instruction is skipped.
In a microprocessor, the machine needs to be told how to get the operands to perform
the operation. The effective address is a term that describes the address of an
operand that is stored in memory. There are several methods to designate the
effective address of those operands or get them directly from the register. These
methods are known as addressing modes.
Immediate addressing mode (symbol #):In this mode data is present in address
field of instruction .Designed like one address instruction format.
Note:Limitation in the immediate mode is that the range of constants are restricted
by size of address field.
Register mode: In register addressing the operand is placed in one of 8 bit or 16 bit
general purpose registers. The data is in the register that is specified by the
instruction.
Here one register reference is required to access the data.
Register Indirect mode: In this addressing the operand’s offset is placed in any one
of the registers BX,BP,SI,DI as specified in the instruction. The effective address of
the data is in the base register or an index register that is specified by the instruction.
Here two register reference is required to access the data.
Auto Indexed (increment mode): Effective address of the operand is the contents of
a register specified in the instruction. After accessing the operand, the contents of
this register are automatically incremented to point to the next consecutive memory
location.(R1)+.
Here one register reference,one memory reference and one ALU operation is
required to access the data.
Auto indexed ( decrement mode): Effective address of the operand is the contents of
a register specified in the instruction. Before accessing the operand, the contents of
this register are automatically decremented to point to the previous consecutive
memory location. –(R1)
Here one register reference,one memory reference and one ALU operation is
required to access the data.
Direct addressing/ Absolute addressing Mode (symbol [ ]): The operand’s offset
is given in the instruction as an 8 bit or 16 bit displacement element. In this
addressing mode the 16 bit effective address of the data is the part of the instruction.
Here only one memory reference operation is required to access the data.
Register Stack
The stack can be arranged as a set of memory words or registers. Consider a 64-word register
stack arranged as displayed in the figure. The stack pointer register includes a binary
number, which is the address of the element present at the top of the stack. The three-
element A, B, and C are located in the stack.
The element C is at the top of the stack and the stack pointer holds the address of C that is 3.
The top element is popped from the stack through reading memory word at address 3 and
decrementing the stack pointer by 1. Then, B is at the top of the stack and the SP holds the
address of B that is 2. It can insert a new word, the stack is pushed by incrementing the stack
pointer by 1 and inserting a word in that incremented location.
The stack pointer includes 6 bits, because 2 6 = 64, and the SP cannot exceed 63 (111111 in
binary). After all, if 63 is incremented by 1, therefore the result is 0(111111 + 1 = 1000000).
SP holds only the six least significant bits. If 000000 is decremented by 1 thus the result is
111111.
Therefore, when the stack is full, the one-bit register ‘FULL’ is set to 1. If the stack is null,
then the one-bit register ‘EMTY’ is set to 1. The data register DR holds the binary
information which is composed into or readout of the stack.
First, the SP is set to 0, EMTY is set to 1, and FULL is set to 0. Now, as the stack is not full
(FULL = 0), a new element is inserted using the push operation.
The push operation is executed as follows −
Data manipulation instructions are those instructions that manipulate or change the
content of the data/registers/memory. It performs operations on data and provides
the computational capabilities of the computer.
Data manipulation instructions can be categorized into three parts:
1) Arithmetic instruction
2) Logical and bit manipulation instructions
3) Shift instructions
Arithmetic Instruction
Arithmetic instructions include increment, decrement, add, subtract, multiply, divide, add
with Carry, subtract with Borrow, negate that is (2’s) two's complement. If there’s a negative
number, it is considered as negate (so two's complement).
Generally, most computers carry instructions for all four of these operations. If computers
have only addition(ADD) and possibly subtraction(SUB) instructions, the other two
operations, i.e. multiplication(MUL) and division(DIV) must be generated using software
subroutines. These four basic arithmetic operations are sufficient for solving scientific
problems when expressed in numerical analysis methods.
The table given below shows the Arithmetic Instructions:
Name Mnemonic
Increment INC
Decrement DEC
Add ADD
Subtract SUB
Multiply MUL
Divide DIV
Add with carry ADDC
Name Mnemonic
Clear CLR
Complement COM
AND AND
OR OR
Exclusive-OR XOR
Enable Interrupt EI
Disable Interrupt DI
Shift Instructions
Shift instructions allow the bits of a memory byte or register to be shifted one-bit place to
the right or the Left.
There are basically two types of shift instructions — arithmetic and logical. Arithmetic shifts
consider the contents of the memory byte or register to be a signed number. So, when the
shift is made, the number is arithmetically divided by two (right shift) or multiplied by two
(left shift). Logical shifts consider the contents of the register or memory byte to be just a bit
pattern when the shift is made.
OP is opcode field
RL (It tells whether to shift it right or left).
REG (It determines which register is to be shifted).
COUNT (It tells the number of places to be shifted).
TYPE( It tells the type of shifting from the list given below).
In right-shift operations, zeros are shifted into high-order vacated positions. And in the case
of the left-shift operation, shifts the zero into low-order vacated positions.
Name Mnemonic
2 Marks
1. Define Register transfer.
2. What are micro operations?
micro-operations (also known as micro-ops) are the functional or atomic operations
of a processor. These are low level instructions used in some designs to implement
complex machine instructions. They generally perform operations on data stored in
one or more registers.
3. What is RTL?
RTL, register transfer language is used to describe micro-operations transfer among
registers. It is a kind of intermediate representation that is very close to assembly
language, such as that which is used in a compiler.
4. What is subroutine?
The addressing sequence provides a mapping from the instructions bits to a control
memory address.
6. What is Control memory?
A control memory is a part of the control unit.
The control memory consists of microprograms that are fixed and cannot be
modified frequently. They contain microinstructions that specify the internal control
signals required to execute register micro-operations.
7. Differentiate between microinstruction and microprogram.
4 Marks
1. What are register? How are registers represented
2. What is BUS? Explain the uses of various lines with diagram
Alternatively known as an address bus, data bus, control bus, or local bus,
a bus is a link between components or devices connected to a computer. For
example, a bus carries data between a CPU and the system memory via
the motherboard.
The data bus is a signal line for exchanging the data between the CPU and the
memory, and between the CPU and I/O, and handles the data stored in the specified
location.
The address bus is a signal line that specifies the location of the memory and I/O.
When exchanging data, it is necessary to specify the takeoff-destination of the data
or the storage destination of the data.
The address bus specifies this location.
The control bus is a signal line that specifies whether to read or write to the location
specified by the address bus.
The memory and I/O specified on the address bus receive the data which sent on the
data bus when instructed "Write" by the control bus.
Separate instruction control read and write Same instructions can control both I/O
operation in I/O and Memory and Memory
In this I/O address are called ports. Normal memory address are for both
It is complex due to separate logic is used Simpler logic is used as I/O is also
to control both. treated as memory only.
8 Marks
1. Explain microprogrammed control organization
2. What is address sequencing? Draw and explain the flowchart of Address sequencing
3. Explain micro operations in detail.
4. Draw the block diagram of control unit.
5. Explain DMA? Draw its block diagram and also explain its working
Direct Memory Access (DMA) Controller is a hardware device that allows I/O
devices to directly access memory with less participation of the processor. DMA
controller needs the same old circuits of an interface to communicate with the CPU
and Input/Output devices.
The DMA controller has three registers as follows.
Address register – It contains the address to specify the desired location in memory.
Word count register – It contains the number of words to be transferred.
Control register – It specifies the transfer mode.
Explanation :
The CPU initializes the DMA by sending the given information through the data bus.
The starting address of the memory block where the data is available (to read) or
where data are to be stored (to write).
It also sends word count which is the number of words in the memory block to be
read or write.
Control to define the mode of transfer such as read or write.
A control to begin the DMA transfer.
The I/O bus includes data lines, address lines, and control lines. In any general-purpose
computer, the magnetic disk, printer, and keyboard, and display terminal are commonly
employed. Each peripheral unit has an interface unit associated with it.
7. Explain modes of transfer?
8. Explain Instruction level parallelism?
UNIT – IV
2 Marks
1. What is Hit ratio?
A hit ratio is a calculation of cache hits, and comparing them with how many total
content requests were received
2. What is paging?
3. List the main types of memory.
4. Differentiate between primary and secondary memory.
Parameter Primary Memory Secondary Memory
The primary memory is
The secondary memory is always a non-volatile
Nature categorized as volatile &
memory.
nonvolatile memories.
These memories are also Secondary memory is known as a Backup memory
Alias
called internal memory. or Additional memory or Auxiliary memory.
Data cannot be accessed directly by the
Data is directly accessed by processor. It is first copied from secondary
Access
the processing unit. memory to primary memory. Only then CPU can
access it.
It’s a volatile memory
It’s a non-volatile memory so that that data can
meaning data cannot be
Formation be retained even after power
retained in case of power
failure.
failure.
4 Marks
1. Difference between static RAM and Dynamic RAM
2. Explain the block diagram of RAM chip with the function table
o A 128 * 8 RAM chip has a memory capacity of 128 words of eight bits (one
byte) per word. This requires a 7-bit address and an 8-bit bidirectional data
bus.
o The 8-bit bidirectional data bus allows the transfer of data either from
memory to CPU during a read operation or from CPU to memory during
a write operation.
o The read and write inputs specify the memory operation, and the two chip
select (CS) control inputs are for enabling the chip only when the
microprocessor selects it.
o The bidirectional data bus is constructed using three-state buffers.
o The output generated by three-state buffers can be placed in one of the three
possible states which include a signal equivalent to logic 1, a signal equal to
logic 0, or a high-impedance state
3. Explain the block diagram of ROM chip with the function table
o A ROM chip has a similar organization as a RAM chip. However, a ROM can
only perform read operation; the data bus can only operate in an output
mode.
o The 9-bit address lines in the ROM chip specify any one of the 512 bytes
stored in it.
o The value for chip select 1 and chip select 2 must be 1 and 0 for the unit to
operate. Otherwise, the data bus is said to be in a high-impedance state.
4. Write a note on Memory Hierarchy
5. What is RAM? List the difference between SRAM and DRAM
6. List the characteristics of secondary storage device
7. Explain semiconductor memories
8. Explain RAID.
It is a way of storing the same data in different places on multiple hard disks or solid-
state drives to protect data in the case of a drive failure. A RAID system consists of
two or more drives working in parallel. These can be hard discs, but there is a trend
to use SSD technology (Solid State Drives).
RAID combines several independent and relatively small disks into single storage of a
large size. The disks included in the array are called array members. The disks can
combine into the array in different ways, which are known as RAID levels. Each of
RAID levels has its own characteristics of:
There are two types of multiprocessors, one is called shared memory multiprocessor and another
is distributed memory multiprocessor. In shared memory multiprocessors, all the CPUs shares
the common memory but in a distributed memory multiprocessor, every CPU has its own private
memory.
Applications of Multiprocessor –
1. As a uniprocessor, such as single instruction, single data stream (SISD).
2. As a multiprocessor, such as single instruction, multiple data stream (SIMD), which is
usually used for vector processing.
3. Multiple series of instructions in a single perspective, such as multiple instruction, single
data stream (MISD), which is used for describing hyper-threading or pipelined
processors.
4. Inside a single system for executing multiple, individual series of instructions in multiple
perspectives, such as multiple instruction, multiple data stream (MIMD).
Enhanced performance.
Multiple applications.
Multi-tasking inside an application.
High throughput and responsiveness.
Hardware sharing among CPUs.
8 Marks
1. What is ROM? Explain the various types of ROM
2. What is Cache Memory? Explain various types of cache mapping
Cache Memory is a special very high-speed memory. It is used to speed up and
synchronizing with high-speed CPU. Cache memory is costlier than main memory or
disk memory but economical than CPU registers. Cache memory is an extremely fast
memory type that acts as a buffer between RAM and the CPU
Cache Mapping:
There are three different types of mapping used for the purpose of cache memory
which are as follows: Direct mapping, Associative mapping, and Set-Associative
mapping. These are explained below.
Direct Mapping –
The simplest technique, known as direct mapping, maps each block of main memory
into only one possible cache line.
Associative Mapping –
In this type of mapping, the associative memory is used to store content and
addresses of the memory word. Any block can go into any line of the cache. This
means that the word id bits are used to identify which word in the block is needed,
but the tag becomes all of the remaining bits.
Set-associative Mapping –
This form of mapping is an enhanced form of direct mapping where the drawbacks
of direct mapping are removed. Set associative addresses the problem of possible
thrashing in the direct mapping method. It does this by saying that instead of having
exactly one line that a block can map to in the cache, we will group a few lines
together creating a set.
Demand Paging is a popular method of virtual memory management. In demand paging, the
pages of a process which are least used, get stored in the secondary memory.
A page is copied to the main memory when its demand is made or page fault occurs. There
are various page replacement algorithms which are used to determine the pages which will
be replaced. We will discuss each one of them later in detail.
Advantages of Virtual Memory