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STGF14NC60KD
STGF14NC60KD
STGF14NC60KD
STGF14NC60KD, STGP14NC60KD
TO-220FP
■ High frequency inverters
■ SMPS and PFC in both hard switch and
resonant topologies
■ Motor drivers Figure 1. Internal schematic diagram
Description
This IGBT utilizes the advanced PowerMESH™
process resulting in an excellent trade-off
between switching performance and low on-state
behavior.
Contents
1 Electrical ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
2 Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
2.1 Electrical characteristics (curves) ........................... 6
6 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
1 Electrical ratings
T j ( max ) – T C
I C ( T C ) = ---------------------------------------------------------------------------------------------------------
-
R thj – c × V CE ( sat ) ( max ) ( T j ( max ), I C ( T C ) )
2 Electrical characteristics
Table 4. Static
Symbol Parameter Test conditions Min. Typ. Max. Unit
Collector-emitter breakdown
V(BR)CES IC= 1 mA 600 V
voltage (VGE= 0)
Gate-emitter leakage
IGES VGE= ±20 V ±100 nA
current (VCE = 0)
Table 5. Dynamic
Symbol Parameter Test conditions Min. Typ. Max. Unit
IF = 7 A 1.8 2.1 V
VF Forward on-voltage
IF = 7 A, TC= 125 °C 1.3 V
trr Reverse recovery time IF = 7 A, VR = 40 V, 37 ns
Qrr Reverse recovery charge di/dt = 100 A/µs 40 nC
Irrm Reverse recovery current (see Figure 21) 2.1 A
IF = 7 A, VR = 40 V,
trr Reverse recovery time 61 ns
Tj = 125 °C,
Qrr Reverse recovery charge 98 nC
di/dt = 100 A/µs
Irrm Reverse recovery current 3.2 A
(see Figure 21)
Figure 12. Switching losses vs gate resistance Figure 13. Switching losses vs collector
current
Figure 14. Thermal impedance for TO-220 and Figure 15. Turn-off SOA
D2PAK
Figure 16. Thermal impedance for TO-220FP Figure 17. Forward voltage drop versus
forward current
FM(A)
45
40
Tj=150°C
35 (Maximum values)
30
Tj=150°C
Tj
(Typical values)
25 Tj=25°C
(Maximum values)
20
15
10
0
0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0
VFM(V
3 Test circuits
Figure 18. Test circuit for inductive load Figure 19. Gate charge test circuit
switching
Figure 20. Switching waveforms Figure 21. Diode recovery times waveform
mm in c h
Dim
Min Typ Max Min Typ Max
A 4.40 4.60 0.173 0.181
A1 0.03 0.23 0.001 0.009
b 0.70 0.93 0.027 0.037
b2 1.14 1.70 0.045 0.067
c 0.45 0.60 0.017 0.024
c2 1.23 1.36 0.048 0.053
D 8.95 9.35 0.352 0.368
D1 7.50 0.295
E 10 10.40 0.394 0.409
E1 8.50 0.334
e 2.54 0.1
e1 4.88 5.28 0.192 0.208
H 15 15.85 0.590 0.624
J1 2.49 2.69 0.099 0.106
L 2.29 2.79 0.090 0.110
L1 1.27 1.40 0.05 0.055
L2 1.30 1.75 0.051 0.069
R 0.4 0.016
V2 0° 8° 0° 8°
0079457_M
A 4.4 4.6
B 2.5 2.7
D 2.5 2.75
E 0.45 0.7
F 0.75 1
F1 1.15 1.70
F2 1.15 1.70
G 4.95 5.2
G1 2.4 2.7
H 10 10.4
L2 16
L3 28.6 30.6
L4 9.8 10.6
L5 2.9 3.6
L6 15.9 16.4
L7 9 9.3
Dia 3 3.2
L7
A
B
D
Dia
L5
L6
F1 F2
H G
G1
L2 L4
L3
7012510_Rev_K
mm
Dim
Min Typ Max
A 4.40 4.60
b 0.61 0.88
b1 1.14 1.70
c 0.48 0.70
D 15.25 15.75
D1 1.27
E 10 10.40
e 2.40 2.70
e1 4.95 5.15
F 1.23 1.32
H1 6.20 6.60
J1 2.40 2.72
L 13 14
L1 3.50 3.93
L20 16.40
L30 28.90
∅P 3.75 3.85
Q 2.65 2.95
0015988_Rev_S
D2PAK FOOTPRINT
6 Revision history
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