17R4 LA-D753P

A B C D E
MODEL NAME : BAP10(15")/BAP20(17")

PROJECT CODE : ANRBAP1000/ANRBAP2000
PCB NO :
DAC00004000 LA-D751P M/B(NV)
DAC00005000 LA-D751P M/B(NV_G3)
DA4002AV000 LS-D751P LOGO_15/B
1
DA80017I000 LS-D752P LOGO_17/B
DA4002B000S LS-D753P PWR_15/B
DA4002AW000 LS-D754P PWR_17/B
DA80017J000 LS-D755P IO_12L/B
DA4002AY000 LS-D757P TRON_LCD_15/B
DA4002AZ000 LS-D758P TRON_REAR_15/B
n l y 1
DA80017K000 LS-D759P IO_14L/B

DA4002D4000 LS-D75AP TRON_LCD_17/B
DA4002D5000 LS-D75BP TRON_REAR_17/B
DA4002D7000 LS-D75CP TRON_FRONT_15/B
r O
DA4002D8000 LS-D75DP TRON_FRONT_17/B
DA30000W300 LF-D751P Head_15/B
DA30000W400 LF-D752P Head_17/B
DA30000W401 LF-D752P Head_17/B(For LOGO_15/B)
DA30000SY00 LF-D753P TRON_15/B
b e
BAP20 NVG3 Skylake/Kabylake-Hm
DA30000WX00 LF-D754P TRON_17/B
e 45W
ZZZ PCB@ ZZZ PCBG3@
m
2 2
PCB 1JM LA-D751P REV0 M/B NV 16 PCB 1JM LA-D753P REV0 M/B NV G3 16
DAC00004000 DAC00005000
Skylake/Kabylake PCH with nVidia N17E-G3
ZZZ PCBR1@
REV : 0.2 (X01)

PCB 1FU LA-C901P REV1 M/B MLK 3
DAC00004010
I T2016.06.24
C@ : Nopop Component
ZZZ PCBR3@
PCB 1FU LA-C901P REV1 MB MLK TRIP 3 A31!

DAC00004011
ZZZ DAZR1@
o r
EMI@,ESD@,RF@ : EMI/ESD/RF part
CONN@ : Connector Component
PCB AAP01 LA-C901P LS-A302P/A303P/C904P 02
DAZ1FU00100
l F
@EMI@,@ESD@,@RF@ : Total debug Component
a
3 3
ZZZ DAZR3@
PCB AAP01 LA-C901P LS-A302P/A303P/C904P 02 TRIPOD A31 !

DAZ1FU00101
HDMI@ ROYALTY HDMI W/LOGO
n t i
e
Part Number Description
RO0000002HM HDMI W/Logo:RO0000002HM
id
Layout Dell logo
nf
4
COPYRIGHT 2015
ALL RIGHT RESERVED
REV: X00
PWB: XXXXX
DATE: 1450-06
Co 4
Security Classification Compal Secret Data Compal Electronics, Inc.

Issued Date 2016/01/06 Deciphered Date 2017/01/06 Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Cover Page
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
0.2
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. LA-D753P
Date: Tuesday, July 05, 2016 Sheet 1 of 82
A B C D E
A B C D E
Block Diagram
P
.
2
5
P
.
2
4
P
.
7
~
1
3
P.33
Fan control P.42
y
MUX eDP 1.3 FFS
eDP panel KXCNL-1010 NCT7718W
l
PS8331B
W83L771AWG-2
P
.
4
6
~
5
5
1 PEG(Gen3)x8 1
eDP 1.3
n
150W/170W port8~port15
P
.
2
6
Mini DP
connector
DP1.3 nVidia N17E-G3 GPU Intel
Skylake/Kabylake-H
O
8pcs GDDR5x 256X32
P
.
2
7
HDMI HDMI2.0 Memory Bus Dual Channel P.14 15
1.2V DDR4 1866/2133MHz
connector
BGA CPU DDR4-SODIMM x2
DP 1.2 (DDI 1)
45W 1440 Pins
r
P
.
5
8
P
.
5
6
~
5
8
CIO/USB3.1
e
USB3.1 Thunderbolt DP 1.2 (DDI 2)
TypeC
P
.
5
8
Alpine Ridge-DP PEG(Gen3)x4
connector USB PD TPS65982
b
I2C/USB2 port0~port3
PEG(Gen3)x4
port4~port7
m
P
.
4
1
P
.
4
1
e
PCIe Re-driver DMI x 4
DS80PCI402
Caldera
P
.
1
6
~
2
2
P.37
USB3.0 port3 USB2.0 port4
connector AlienFX / ELC , C8051F383
m
2 2
USB2.0 port3
P.25
USB2.0 port6
Touch screen
T
P
.
3
0
P
.
3
RJ45 0
LAN(Gigabit) PCI-E port5 USB2.0 port7
I
Digital camera(with digital MIC)
connector Killer E2400
USB3.0 port1 P.35
USB connector 1 , lef t si de
C
P.2
PCI-E port6 USB2.0 port1
NGFF (M.2) USB power share
WLAN+BT USB2.0 port5
r
USB3.0 port4 P.35
USB2.0 port2
USB connector 2 , right side
USB3.0 on D/B IO/B
o Intel
P.2 USB3.0 port2 P.36
NGFF (M.2) PCI-E port 13~14 USB3.0 port5 USB connector 3 , right side
Skylake/Kabylake
F
SSD1 (2 lanes) SATA3.0 port 1 USB2.0 port8 USB3.0 TypeC connector
P.2
BGA PCH CM236
l
NGFF (M.2) PCI-E port 17~20
3
SSD2 (4 lanes) SATA3.0 port 4
837 Pins 3
NGFF (M.2)
t ia
P.2
SSD3 (2 lanes)
PCI-E port 9~12
SATA3.0 port 0
USB2.0 port9
Tobii (17" only)
P.34
e n P.33
30 pin connector with cable

2.5” HDD x1
SATA3.0 port 3 ;
option:HDD
Audio codec
P.31 digital MIC
P.31
id
Headphone/MIC Global headset
HD Audio Realtek combo JACK
ALC3266
f
P.31
P.17 Headphone/MIC Retaskable
SPI ROM SPI combo JACK
n
DC in 1.00V dGPU
Bat t er y Core 128Mbit
P.32
o
P.32
PS2/SMBus LPC Bus AMP
3V/5V 2.5V Charger Speaker
ALC1309
4 P.3 P.43 P.43 P.4 4
C www.vinafix.com
Touch pad KC3810 Int. KBD +
System CPU dGPU ENE KB9022 AMP Subwoofer (17" Only) on D/B IO/B
P.43 Marco Key ALC1309
1.2V Vcore 1.35V KC3810

Block Diagram
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS 0.2
A B C D E
A B C D E
PCB
LS-D75CP TRON_FRONT_15/B LS-D75CP TRON_FRONT_15/B FPC

LS-D75DP TRON_FRONT_17/B Wire Wire LS-D75DP TRON_FRONT_17/B
1
Led x 1
LS-D758P TRON_REAR_15/B
LS-D75BP TRON_REAR_17/B
Led x 1
12 Pin 12 Pin Led x 1
LS-D758P TRON_REAR_15/B
LS-D75BP TRON_REAR_17/B
Led x 1
n l y Module 1
LS-D759P IO_14L/B
LS-D755P IO_12L/B Coaxial/Wire
30 Pin
30 Pin FFC
16 Pin
r O
e
USB3.0 x 1 TP module
Lid Switch
b
Led x 6
Subwoofer (17"Only)
m
Coaxial/Wire
30 Pin Wire
2
2.5" HDD
JHDD
M/B
m e 4 Pin Touch sensor
6 pin
2
T
Coaxial/Wire Coaxial
FFC
I
LS-D753P PWR_15/B 40 pin 23 Pin eDP Panel
LS-D754P PWR_17/B 6 Pin 40 Pin 30 pin
C
on / off SW
r
Led x 2
Wire
o
13 Pin IR Camera
14 pin
KSI/KSO Backlight Wire KSI/KSO Backlight
3
30 Pin
l F
20 Pin 16 Pin 10 Pin 6 Pin
t ia Keyboard
LS-D751P LOGO_15/B
LS-D752P LOGO_17/B
Marco Key
n
Led x 2
id eLS-D757P TRON_LCD_15/B
LS-D75AP TRON_LCD_17/B
Led x 1
Wire
12 Pin FFC
6 Pin
Wire
12 Pin
LS-D757P TRON_LCD_15/B
LS-D75AP TRON_LCD_17/B
Led x 1
nf LF-D753P TRON_15/B
LF-D754P TRON_17/B
Led x 1
FPC
LF-D751P Head_15/B
LF-D753P TRON_15/B
LF-D754P TRON_17/B
Led x 1
o
LF-D752P Head_17/B
Led x 2
C
4 4
FPC

Cable Routing Diagram
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number R ev
0.2
A B C D E
A
Board ID Table for AD channel PCH-H CM236

Vcc
Ra
Board ID
0
1
3.3V +/- 1%
100K +/- 1%
Rb
0
12K +/- 1%
V AD_BID min
0.000V
0.347V
V AD_BID typ
0.000V
0.354V
V AD_BID max
0.300V
0.360V
EC
0x00
0x14
AD3
- 0x13
- 0x1E
HSIO
1
2
USB3
1
2
PCIe SATA3 Function
JUSB1,type A
JUSBC2,type C
USB2
1
2
n l y
Function
JUSB1(Powershare)
JIO(IO/B)
O
2 15K +/- 1% 0.423V 0.430V 0.438V 0x1F - 0x25 3 3 Caldera 3 Caldera
3 20K +/- 1% 0.541V 0.550V 0.559V 0x26 - 0x30 4 4 JIO,IO/B 4 ELC
r
4 27K +/- 1% 0.691V 0.702V 0.713V 0x31 - 0x3A NVIDIA
5 33K +/- 1% 0.807V 0.819V 0.831V 0x3B - 0x45 Graphic 5 5 JUSBC2,type C 5 Bluetooth
6
7
8
9
10
43K +/- 1%
56K +/- 1%
75K +/- 1%
100K +/- 1%
130K +/- 1%
0.978V
1.169V
1.398V
1.634V
1.849V
0.992V
1.185V
1.414V
1.650V
1.865V
1.006V
1.200V
1.430V
1.667V
1.881V
0x46
0x55
0x65
0x77
0x88
- 0x54
- 0x64
- 0x76
- 0x87
- 0x96
6
7
8
6
7
8
1
2
b e 6
7
8
Touch screen
Camera
JUSBC2
11
12
13
14
160K +/- 1%
200K +/- 1%
240K +/- 1%
270K +/- 1%
2.015V
2.185V
2.316V
2.395V
2.031V
2.200V
2.329V
2.408V
2.046V
2.215V
2.343V
2.421V
0x97
0xA5
0xB0
0xB8
- 0xA4
- 0xAF
- 0xB7
- 0xBF AMD
10
11
9
10
9 3
4
5
e m LAN
10
11
9 Tobii
m
15 330K +/- 1% 2.521V 2.533V 2.544V 0xC0 - 0xC9 Graphic
12 6 WLAN 12
16 430K +/- 1% 2.667V 2.677V 2.687V 0xCA - 0xD4
17 560K +/- 1% 2.791V 2.800V 2.808V 0xD5 - 0xDD 13 7 13
T
18 750K +/- 1% 2.905V 2.912V 2.919V 0xDE - 0xF0 14 8 14
I
19 NC 3.000V 3.300V 3.300V 0xF1 - 0xFF
15 9 0
JSSD3
16 10 1 M.2 2280
1
Voltage Rails
Power Plane
VIN
Descript i on
Adapter power supply
S0
N/A
S3
N/A
S4 / S5
N/A
Board ID TABLE
r
ID PCB Revision
C 17
18
11
12
SATA
PCIe x4(When
SSD/B exist) Symbol Note :
1
o *
BATT+ Bat t er y po wer s uppl y N/A N/A N/A NV AMD 22 16 3 JSSD5/HDD SATA
+19VB AC or bat t er y po wer r ail f or po wer ci rc ui t N/A N/A N/A 0 10 EVT
21 15 2 JSSD4 SATA Digital Ground
F
+VCC_CORE Core voltage for CPU ON OFF OFF 1 11 DVT-1
+VCC_GT Sliced graphics power rail ON OFF OFF 2 12 DVT-1.1 20 14 1 JSSD1 Analog Ground
l
+0.6VS_VTT DDR +0.6VS power rail for DDR terminator ON OFF OFF 3 13 DVT-2
+1VALW System +1VALW power rail ON ON ON* 4 14 Pilot build 19 13 0 SATA/PCIe x2
a
+1V_PRIM System +1VALW power rail ON ON ON* 5 15 23 17 4
i
+VCCIO +1.0VS IO power rail ON OFF OFF JSSD2
t
+VGA_PCIE +1.0VS power rail for GPU ON OFF OFF 24 18 5 M.2 2280
+MEM_GFX +1.5VS power rail for GPU ON OFF OFF 25 19 SATA
+1.2V_VDDQ
+1VS_VCCST
+1VS_VCCSTG
DDR-IV +1.2V power rail
+1.0V power rail for CPU
+1.0VS power rail for CPU
e
ON
ON
ON
nON
ON
OFF
OFF
OFF
OFF
26 20
* PCIe 13~16 in "Lane Reversal Mode". (HSIO Port 19~22)

PCIe x4 CPU,C
DDR,D
GPU,DP,HDMI,EDP,V
id
+3VALW System +3VALW always on power rail ON ON ON*
LAN,L
+3VLP +19VB to +3VLP power rail for suspend power ON ON ON
AUDIO,A
f
+3VALW_DSW +3VALW power for PCH DSW rails ON ON ON* NGFF,N
+3V_LAN +3VALW power for LAN power rails ON ON ON* USB,U
n
+3VS System +3VS power rail ON OFF OFF CALDERA,M
+1.8VS +1.8VS power rail for GPU ON OFF OFF HDD,S
o
+3VGS +3VS power rail for GPU ON OFF OFF ELC,E
+5VALW System +5VALW power rail ON ON ON* FAN,F
+5VS System +5VS power rail ON OFF OFF TP,T
+3VL_RTC
+VCC_SA
RTC power
C
System Agent power rail
ON
ON
ON
OFF
ON
OFF
Note : ON* means that this power plane is ON only with AC power available, otherwise it is OFF
Security Classification
Issued Date 2016/01/06
Compal Secret Data
Deciphered Date 2017/01/06
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Title
Size
Notes List
KBC,K
DC,O
Compal Electronics, Inc.
Document Number R ev
0.2
A
5 4 3 2 1
1K
SMBUS Address [0x9A]
1K
+3VS
y
AW44 PCH_SMBCLK 253 DIMMA SMBUS Address [0xA0]
l
BB43 PCH_SMBDATA 254
D
499 D
n
253 DIMMB SMBUS Address [0xA4]
499
+3V_PCH
254
Kaby Lake
PCH-H
AY44
BB39
SML0CLK
SML0DATA
1K
51
52
PS8331B SMBUS Address [0x66/67] 15
16
r O
JTP SMBUS Address [0x2C]
e
4 Free Fall Sensor SMBUS Address [0X1D]
1K
+3V_PCH
6
AW42
AW45
SML1CLK
SML1DATA
N-MOS
N-MOS
EC_SMB_CK2
EC_SMB_DA2
10K
mb 10
9
U2407
Thermal sensor
SMBUS Address [0x9A]
e
10K
+3VS
B5 UT4 SMBUS Address [0x70]
m
C C
A5 TPS65982
2.2K 10K
+3VS +3VS
T
2.2K 10K
79
80
EC_SMB_CK2
EC_SMB_DA2
C I 1.8K
1.8K
+1V8_AON
50
49
UM8
PCIE redriver
SMBUS Address [0xB2]
2.2K
2.2K
+3VALW
o r N-MOS
N-MOS
VGA_SMB_CK2
VGA_SMB_DA2
BJ8
BH8
UG9
GPU SMBUS Address [0x9E]
B
77
78
EC_SMB_CK1
EC_SMB_DA1
l F 0 ohm
0 ohm
SCL
SDA
12
11
PU700
POWER
Charger
SMBUS Address [0x12]
B
a
KBC
i
100 ohm
KB9022QD 4 PBATT1 SMBUS Address [0x16]
t
100 ohm
5
17
18
EC_ESB_CLK
EC_ESB_DAT
e n 1
4
UE6
KB3810 SMBUS Address [0x00]
id
1K
UE10
f
1 KB3810 SMBUS Address [0x08]
1K
+3.3V_1.8V_DVDD
4
83
o
84
n I2C0_SCL_EC
I2C0_SDA_EC
0 ohm
0 ohm
I2C0_SCL_AMP_R
I2C0_SDA_AMP_R
0 ohm
UA4
ALC1309
Subwoofer
SMBUS Address [0x20]
C
A A
0 ohm ALC1309 SMBUS Address [0x22]

SMBus Block Diagram
0.2
5 4 3 2 1
5 4 3 2 1
n l y D
r O
b e
m
JPCMC CMC_DEBUG_36P
+1VALW
e
OBS DATA JTAG/RC/HOOKS
+3V_PCH 1 22
<9> CFG0 3 DATA_0 VCCOBS_AB
<9> CFG1 5 DATA_1
1 CMC@ 2 1K_0402_5% XDP_SPI_SI <9> CFG2 7 DATA_2
RC9
m
C <9> CFG3 9 DATA_3 28 C
<9> CFG4 11 DATA_4 XDP_TRST* 29 CPU_XDP_TRST# <9,22>
<9> CFG5 13 DATA_5 XDP_TDI 30 XDP_TDI <9,18>
<9> CFG6 15 DATA_6 XDP_TMS 32 PCH_JTAG_TCK XDP_TMS <9,18>
<9> CFG7 DATA_7 XDP_TCK0 31 XDP_TCK PCH_JTAG_TCK <9,18>
17 XDP_TCK1 35 XDP_TCK <18>
<9> CFG17 DATA_CLK_1P XDP_TDO XDP_TDO <9>
T
21
<9> CFG16 DATA_CLK_1N 33
+1VALW 2 XDP_PREQ* 34 XDP_PREQ# <9,22>
I
<9> CFG8 4 DATA_8 XDP_PRDY* XDP_PRDY# <9,22>
<9> CFG9 6 DATA_9 27 XDP_HOOK0 RC355 1 CMC@ 2 1K_0402_1%
1 CMC@ 2 1K_0402_5% XDP_ITP_PMODE <9> CFG10 8 DATA_10 HOOK_0 25 XDP_SPI_SI PCIRST# <28,29,30,43,56>
RC353
<9> CFG11 10 DATA_11 HOOK_3 26 XDP_ITP_PMODE XDP_SPI_SI <17>
<9> CFG12 12 DATA_12 HOOK_6 XDP_ITP_PMODE <18>
C
<9> CFG13 14 DATA_13 24 XDP_SPI_IO2 1 CMC@ 2 1K_0402_1%
RC354
<9> CFG14 16 DATA_14 XDP_PRSNT_PCH* 23 PCH_SPI_WP#_R <17>
<9> CFG15 DATA_15 XDP_PRSNT_CPU*
18 19
r
<9> CFG19 20 DATA_CLK_2P GND 36
<9> CFG18 DATA_CLK_2N <MT> GND
RC35 2 @ 1 51_0402_1% PCH_JTAG_TCK
o
RC348 2 CMC@ 1 51_0402_1% XDP_TCK
RH497 1 CMC@ 2 51_0402_5% CPU_XDP_TRST# INTEL_CMC_PRIMARY

CONN@
l F B
t ia
en
nf id
A
Co Security Classification
2016/01/06
Compal Secret Data
2017/01/06 Title
A
Issued Date Deciphered Date

CMC Conn
0.2
5 4 3 2 1
5 4 3 2 1
Si
k7
yKHH
l
a:::
ki
e7-
--
H
C200
P00
UH H
66
87
KQQ
7i
i
7i
i
H
5
5
-
6
3
0
CPU1C SKYLAKE_HALO
BGA1440
CPU1
PEG_CRX_TTX_P15 E25 B25 PEG_CTX_TRX_P15
y
<56> PEG_CRX_TTX_P15 PEG_CRX_TTX_N15 PEG_RXP[0] PEG_TXP[0] PEG_CTX_TRX_N15 PEG_CTX_TRX_P15 <56>
D25 A25
<56> PEG_CRX_TTX_N15 PEG_RXN[0] PEG_TXN[0] PEG_CTX_TRX_N15 <56>
PEG_CRX_TTX_P14 PEG_CTX_TRX_P14
l
E24 B24
<56> PEG_CRX_TTX_P14 PEG_CRX_TTX_N14 PEG_RXP[1] PEG_TXP[1] PEG_CTX_TRX_N14 PEG_CTX_TRX_P14 <56>
T<
hR
ue
nv
de
er
r
be
o>
l
t
T
X
S IC CL8066202194730 SR2FL R0 2.7G BGA F24 C24
T<
hR
ue
nv
de
er
rs
b
o>
l
t
R
X
SA000097D1L
Si7KR1@ PEG_CRX_TTX_P13 E23 B23 PEG_CTX_TRX_P13
s
D <56> PEG_CRX_TTX_P13 PEG_CRX_TTX_N13 PEG_RXP[2] PEG_TXP[2] PEG_CTX_TRX_N13 PEG_CTX_TRX_P13 <56> D
D23 A23
e
n
CPU1
PEG_CRX_TTX_P12 E22 B22 PEG_CTX_TRX_P12
<56> PEG_CRX_TTX_P12 PEG_CRX_TTX_N12 F22 PEG_RXP[3] PEG_TXP[3] C22 PEG_CTX_TRX_N12 PEG_CTX_TRX_P12 <56>
PEG_CRX_GTX_P11 E21 B21 PEG_CTX_GRX_P11 CC24 1 2 0.22U_0201_6.3V PEG_CTX_C_GRX_P11
<41> PEG_CRX_GTX_P11 PEG_CRX_GTX_N11 D21 PEG_RXP[4] PEG_TXP[4] A21 PEG_CTX_GRX_N11 PEG_CTX_C_GRX_N11 PEG_CTX_C_GRX_P11 <41>
CC12 1 2 0.22U_0201_6.3V
O
<41> PEG_CRX_GTX_N11 PEG_RXN[4] PEG_TXN[4] PEG_CTX_C_GRX_N11 <41>
S IC CL8066202194635 SR2FQ R0 2.6G FCBGA PEG_CRX_GTX_P10 PEG_CTX_GRX_P10 PEG_CTX_C_GRX_P10
SA000095Z1L E20 B20 CC23 1 2 0.22U_0201_6.3V
<41> PEG_CRX_GTX_P10 PEG_CRX_GTX_N10 PEG_RXP[5] PEG_TXP[5] PEG_CTX_GRX_N10 PEG_CTX_C_GRX_N10 PEG_CTX_C_GRX_P10 <41>
C<
aR
l
de
ev
r
ar
Te
X>
Si7HR1@ F20 C20 CC11 1 2 0.22U_0201_6.3V
C<
aR
l
de
ev
r
ar
Re
X>
CPU1 PEG_CRX_GTX_P9 E19 B19 PEG_CTX_GRX_P9 CC22 1 2 0.22U_0201_6.3V PEG_CTX_C_GRX_P9
e
s
r
D19 A19 CC10 1 2 0.22U_0201_6.3V
e
s
PEG_CRX_GTX_P8 E18 B18 PEG_CTX_GRX_P8 CC21 1 2 0.22U_0201_6.3V PEG_CTX_C_GRX_P8
F18 C18 CC9 1 2 0.22U_0201_6.3V
e
PEG_CRX_GTX_P7 D17 A17 PEG_CTX_GRX_P7 CC20 1 2 0.22U_0201_6.3V PEG_CTX_C_GRX_P7
S IC CL8066202194632 SR2FP R0 2.3G FCBGA <46> PEG_CRX_GTX_P7 PEG_CRX_GTX_N7 PEG_RXP[8] PEG_TXP[8] PEG_CTX_GRX_N7 PEG_CTX_C_GRX_N7 PEG_CTX_C_GRX_P7 <46>
SA000096Q1L E17 B17 CC8 1 2 0.22U_0201_6.3V
Si5HR1@
b
PEG_CRX_GTX_P6 F16 C16 PEG_CTX_GRX_P6 CC19 1 2 0.22U_0201_6.3V PEG_CTX_C_GRX_P6
<46> PEG_CRX_GTX_P6 PEG_CRX_GTX_N6 E16 PEG_RXP[9] PEG_TXP[9] B16 PEG_CTX_GRX_N6 PEG_CTX_C_GRX_N6 PEG_CTX_C_GRX_P6 <46>
CPU1 CC7 1 2 0.22U_0201_6.3V
E15 B15 CC6 1 2 0.22U_0201_6.3V
PEG_CRX_GTX_P4 PEG_CTX_GRX_P4 PEG_CTX_C_GRX_P4
G<
PR
Ue
Rv
Xr
G<
PR
Ue
Tv
Xe
F14 C14 CC17 1 2 0.22U_0201_6.3V
m
S IC CL8066202194730 SR2FL R0 2.7G A31! E14 B14 CC5 1 2 0.22U_0201_6.3V
SA000097D2L
e
s
e
>
r
s
e
>
Si7KR3@ PEG_CRX_GTX_P3 D13 A13 PEG_CTX_GRX_P3 CC16 1 2 0.22U_0201_6.3V PEG_CTX_C_GRX_P3
e
E13 B13 CC4 1 2 0.22U_0201_6.3V
CPU1
PEG_CRX_GTX_P2 F12 C12 PEG_CTX_GRX_P2 CC15 1 2 0.22U_0201_6.3V PEG_CTX_C_GRX_P2
CC3 1 2 0.22U_0201_6.3V
CC2 1 2 0.22U_0201_6.3V
m
C S IC CL8066202194635 SR2FQ R0 2.6G A31! PEG_CRX_GTX_P0 PEG_CTX_GRX_P0 PEG_CTX_C_GRX_P0
C
SA000095Z2L F10 C10 CC13 1 2 0.22U_0201_6.3V
Si7HR3@ E10 B10 CC1 1 2 0.22U_0201_6.3V
CPU1
1 2 PEG_RCOMP G2
+VCCIO
PEG_RCOMP PEG_RCOMP
T
RC2
24.9_0402_1%
Trace width=12 mils DMI_CRX_PTX_P0 DMI_CTX_PRX_P0
I
S IC CL8066202194632 SR2FP R0 2.3G A31! D8 B8
<19> DMI_CRX_PTX_P0 DMI_CRX_PTX_N0 DMI_RXP[0] DMI_TXP[0] DMI_CTX_PRX_N0 DMI_CTX_PRX_P0 <19>
SA000096Q2L
Si5HR3@ Spacing=15 mils <19> DMI_CRX_PTX_N0
DMI_CRX_PTX_P1
E8
E6
DMI_RXN[0] DMI_TXN[0]
A8
C6 DMI_CTX_PRX_P1
DMI_CTX_PRX_N0 <19>
<19> DMI_CRX_PTX_P1 DMI_CTX_PRX_P1 <19>

Max length= 400 mils <19> DMI_CRX_PTX_N1
DMI_CRX_PTX_N1 F6 DMI_RXP[1]
DMI_RXN[1]
DMI_TXP[1]
DMI_TXN[1]
B6 DMI_CTX_PRX_N1
DMI_CTX_PRX_N1 <19>
Ki
a7
bKHH
y:::
l
a
k
e
-
H
C
P
U
C
DMI_CRX_PTX_P2 D5 B5 DMI_CTX_PRX_P2
E5 A5
<19> DMI_CRX_PTX_N2 DMI_RXN[2] DMI_TXN[2] DMI_CTX_PRX_N2 <19>
7i
i
DMI_CRX_PTX_P3 J8 D4 DMI_CTX_PRX_P3
5

J9 B4
<19> DMI_CRX_PTX_N3 DMI_CTX_PRX_N3 <19>
r
DMI_RXN[3] DMI_TXN[3]
CPU1 3 OF 14
@ SKL-H_BGA1440
S IC A31 CL8067702869810 QL2X A0 2.7G FCBGA 1440

SA0000A130L
Ki7KES@
CPU1
Fo CPU1D SKYLAKE_HALO
l
BGA1440
CPU_DP1_P0 K36 D29 CPU_EDP_TX0P
<56> CPU_DP1_P0 CPU_DP1_N0 DDI1_TXP[0] EDP_TXP[0] CPU_EDP_TX0N CPU_EDP_TX0P <24>
K37 E29
B <56> CPU_DP1_N0 CPU_DP1_P1 DDI1_TXN[0] EDP_TXN[0] CPU_EDP_TX1P CPU_EDP_TX0N <24> B
a
J35 F28
<56> CPU_DP1_P1 CPU_DP1_N1 J34 DDI1_TXP[1] EDP_TXP[1] E28 CPU_EDP_TX1N CPU_EDP_TX1P <24>
S IC A31 CL8067702869811 QL3X A0 2.4G BGA 1440 <56> CPU_DP1_N1 CPU_DP1_P2 DDI1_TXN[1] EDP_TXN[1] CPU_EDP_TX2N CPU_EDP_TX1N <24>
SA0000A150L H37 B29
i
<56> CPU_DP1_P2 CPU_DP1_N2 H36 DDI1_TXP[2] EDP_TXN[2] A29 CPU_EDP_TX2P CPU_EDP_TX2N <24>
Ki5HES@
<56> CPU_DP1_N2 CPU_DP1_P3 DDI1_TXN[2] EDP_TXP[2] CPU_EDP_TX3N CPU_EDP_TX2P <24>
J37 B28
<56> CPU_DP1_P3 CPU_DP1_N3 DDI1_TXP[3] EDP_TXN[3] CPU_EDP_TX3P CPU_EDP_TX3N <24>
t
J38 C28
<56> CPU_DP1_N3 DDI1_TXN[3] EDP_TXP[3] CPU_EDP_TX3P <24>
CPU_DP1_AUXP D27 C26 CPU_EDP_AUX
<56> CPU_DP1_AUXP CPU_DP1_AUXN E27 DDI1_AUXP EDP_AUXP B26 CPU_EDP_AUX# CPU_EDP_AUX <24>
<56> CPU_DP1_AUXN DDI1_AUXN EDP_AUXN CPU_EDP_AUX# <24>
n
CPU_DP2_P0 H34
<56> CPU_DP2_P0 CPU_DP2_N0 H33 DDI2_TXP[0]
<56> CPU_DP2_N0 CPU_DP2_P1 DDI2_TXN[0]
F37 A33 T1 PAD~D TP@
<56> CPU_DP2_P1 CPU_DP2_N1 DDI2_TXP[1] EDP_DISP_UTIL +VCCIO
e
G38
<56> CPU_DP2_N1 CPU_DP2_P2 DDI2_TXN[1]
F34
<56>
<56>
<56>
CPU_DP2_P2
CPU_DP2_N2
CPU_DP2_P3
CPU_DP2_N2
CPU_DP2_P3
CPU_DP2_N3
F35
E37
E36
DDI2_TXP[2]
DDI2_TXN[2]
DDI2_TXP[3]
EDP_RCOMP
D37 EDP_RCOMP 1
RC30
2
EDP_RCOMP
id
<56>
<56>
CPU_DP2_N3
CPU_DP2_AUXP
CPU_DP2_AUXP
CPU_DP2_AUXN
F26
DDI2_TXN[3]
DDI2_AUXP
24.9_0402_1% Trace width=20 mils
<56> CPU_DP2_AUXN
E26
C34
DDI2_AUXN
Spacing=25 mils
f
D34
B36
B34
DDI3_TXP[0]
DDI3_TXN[0]
DDI3_TXP[1]
Max length=100 mils
F33 DDI3_TXN[1]
DDI3_TXP[2]
n
E33
C33 DDI3_TXN[2]
B33 DDI3_TXP[3]
DDI3_TXN[3] G27
PROC_AUDIO_CLK CPU_DISPA_BCLK <18>
o
A27 G25
DDI3_AUXP PROC_AUDIO_SDI CPU_DISPA_SDI_R CPU_DISPA_SDO <18>
B27 G29 1 2
DDI3_AUXN PROC_AUDIO_SDO CPU_DISPA_SDI <18>
4 OF 14 RC66
@ SKL-H_BGA1440 20_0402_5%
C
A A

CPU(1/7) DMI,PEG,DDI,EDP
5 4 3 2 1
5 4 3 2 1
n l y D
Interleave
DDR_A_D0
DDR_A_D1
BR6
BT6
CPU1A
DDR0_DQ[0]
SKYLAKE_HALO
BGA1440
DDR0_CKP[0]
AG1
AG2
M_CLK_DDR0 <14>
DDR_B_D0
DDR_B_D1
BT11
BR11
CPU1B
DDR1_DQ[0]/DDR0_DQ[16]
SKYLAKE_HALO
BGA1440
DDR1_CKP[0]
AM9
AN9
r O M_CLK_DDR2 <15>
e
DDR_A_D2 BP3 DDR0_DQ[1] DDR0_CKN[0] AK1 M_CLK_DDR#0 <14> DDR_B_D2 BT8 DDR1_DQ[1]/DDR0_DQ[17] DDR1_CKN[0] AM8 M_CLK_DDR#2 <15>
<14> DDR_A_D[0..63] DDR_A_D3 DDR0_DQ[2] DDR0_CKN[1] M_CLK_DDR#1 <14> DDR_B_D3 DDR1_DQ[2]/DDR0_DQ[18] DDR1_CKN[1] M_CLK_DDR#3 <15>
BR3 AK2 BR8 AM7
<14> DDR_A_MA[0..13] DDR_A_D4 BN5 DDR0_DQ[3] DDR0_CKP[1] AL3 M_CLK_DDR1 <14> DDR_B_D4 BP11 DDR1_DQ[3]/DDR0_DQ[19] DDR1_CKP[1] AM11 M_CLK_DDR3 <15>
<14> DDR_A_DQS#[0..7] DDR_A_D5 DDR0_DQ[4] DDR0_CLKP[2] DDR_B_D5 DDR1_DQ[4]/DDR0_DQ[20] DDR1_CLKP[2]
BP6 AK3 BN11 AM10
b
<14> DDR_A_DQS[0..7] DDR_A_D6 DDR0_DQ[5] DDR0_CLKN[2] DDR_B_D6 DDR1_DQ[5]/DDR0_DQ[21] DDR1_CLKN[2]
BP2 AL2 BP8 AJ10
DDR_A_D7 BN3 DDR0_DQ[6] DDR0_CLKP[3] AL1 DDR_B_D7 BN8 DDR1_DQ[6]/DDR0_DQ[22] DDR1_CLKP[3] AJ11
DDR_A_D8 BL4 DDR0_DQ[7] DDR0_CLKN[3] DDR_B_D8 BL12 DDR1_DQ[7]/DDR0_DQ[23] DDR1_CLKN[3]
DDR_A_D9 BL5 DDR0_DQ[8] AT1 DDR_B_D9 BL11 DDR1_DQ[8]/DDR0_DQ[24] AT8
DDR_A_D10 DDR0_DQ[9] DDR0_CKE[0] DDR_CKE0_DIMMA <14> DDR_B_D10 DDR1_DQ[9]/DDR0_DQ[25] DDR1_CKE[0] DDR_CKE2_DIMMB <15>
BL2 AT2 BL8 AT10
DDR_A_D11 DDR0_DQ[10] DDR0_CKE[1] DDR_CKE1_DIMMA <14> DDR_B_D11 DDR1_DQ[10]/DDR0_DQ[26] DDR1_CKE[1] DDR_CKE3_DIMMB <15>
BM1 AT3 BJ8 AT7
<15> DDR_B_D[0..63] DDR_A_D12 BK4 DDR0_DQ[11] DDR0_CKE[2] AT5 DDR_B_D12 BJ11 DDR1_DQ[11]/DDR0_DQ[27] DDR1_CKE[2] AT11
m
<15> DDR_B_MA[0..13] DDR_A_D13 DDR0_DQ[12] DDR0_CKE[3] DDR_B_D13 DDR1_DQ[12]/DDR0_DQ[28] DDR1_CKE[3]
BK5 BJ10
<15> DDR_B_DQS#[0..7] DDR_A_D14 BK1 DDR0_DQ[13] AD5 DDR_B_D14 BL7 DDR1_DQ[13]/DDR0_DQ[29] AF11
<15> DDR_B_DQS[0..7] DDR_A_D15 DDR0_DQ[14] DDR0_CS#[0] DDR_CS0_DIMMA# <14> DDR_B_D15 DDR1_DQ[14]/DDR0_DQ[30] DDR1_CS#[0] DDR_CS2_DIMMB# <15>
BK2 AE2 BJ7 AE7
DDR_A_D16 DDR0_DQ[15] DDR0_CS#[1] DDR_CS1_DIMMA# <14> DDR_B_D16 DDR1_DQ[15]/DDR0_DQ[31] DDR1_CS#[1] DDR_CS3_DIMMB# <15>
e
BG4 AD2 BG11 AF10
DDR_A_D17 BG5 DDR0_DQ[16]/DDR0_DQ[32] DDR0_CS#[2] AE5 DDR_B_D17 BG10 DDR1_DQ[16]/DDR0_DQ[48] DDR1_CS#[2] AE10
DDR_A_D18 BF4 DDR0_DQ[17]/DDR0_DQ[33] DDR0_CS#[3] DDR_B_D18 BG8 DDR1_DQ[17]/DDR0_DQ[49] DDR1_CS#[3]
DDR_A_D19 BF5 DDR0_DQ[18]/DDR0_DQ[34] AD3 DDR_B_D19 BF8 DDR1_DQ[18]/DDR0_DQ[50] AF7
DDR_A_D20 DDR0_DQ[19]/DDR0_DQ[35] DDR0_ODT[0] M_ODT0 <14> DDR_B_D20 DDR1_DQ[19]/DDR0_DQ[51] DDR1_ODT[0] M_ODT2 <15>
BG2 AE4 BF11 AE8
DDR_A_D21 DDR0_DQ[20]/DDR0_DQ[36] DDR0_ODT[1] M_ODT1 <14> DDR_B_D21 DDR1_DQ[20]/DDR0_DQ[52] DDR1_ODT[1] M_ODT3 <15>
BG1 AE1 BF10 AE9
DDR_A_D22 BF1 DDR0_DQ[21]/DDR0_DQ[37] DDR0_ODT[2] AD4 DDR_B_D22 BG7 DDR1_DQ[21]/DDR0_DQ[53] DDR1_ODT[2] AE11
DDR0_DQ[22]/DDR0_DQ[38] DDR0_ODT[3] DDR1_DQ[22]/DDR0_DQ[54] DDR1_ODT[3]
m
C
DDR_A_D23 BF2 DDR_B_D23 BF7 C
DDR_A_D24 BD2 DDR0_DQ[23]/DDR0_DQ[39] AH5 DDR_B_D24 BB11 DDR1_DQ[23]/DDR0_DQ[55] AH10
DDR_A_D25 DDR0_DQ[24]/DDR0_DQ[40] DDR0_BA[0]/DDR0_CAB[4]/DDR0_BA[0] DDR_A_BS0 <14> DDR_B_D25 DDR1_DQ[24]/DDR0_DQ[56] DDR1_RAS#/DDR1_CAB[3]/DDR1_MA[16] DDR_B_RAS# <15>
BD1 AH1 BC11 AH11
DDR_A_D26 DDR0_DQ[25]/DDR0_DQ[41] DDR0_BA[1]/DDR0_CAB[6]/DDR0_BA[1] DDR_A_BS1 <14> DDR_B_D26 DDR1_DQ[25]/DDR0_DQ[57] DDR1_WE#/DDR1_CAB[2]/DDR1_MA[14] DDR_B_WE# <15>
BC4 AU1 BB8 AF8
DDR_A_D27 BC5 DDR0_DQ[26]/DDR0_DQ[42] DDR0_BA[2]/DDR0_CAA[5]/DDR0_BG[0] DDR_A_BG0 <14> DDR_B_D27 BC8 DDR1_DQ[26]/DDR0_DQ[58] DDR1_CAS#/DDR1_CAB[1]/DDR1_MA[15] DDR_B_CAS# <15>
DDR_A_D28 BD5 DDR0_DQ[27]/DDR0_DQ[43] AH4 DDR_B_D28 BC10 DDR1_DQ[27]/DDR0_DQ[59] AH8
DDR_A_D29 BD4 DDR0_DQ[28]/DDR0_DQ[44] DDR0_RAS#/DDR0_CAB[3]/DDR0_MA[16] AG4 DDR_A_RAS# <14> DDR_B_D29 BB10 DDR1_DQ[28]/DDR0_DQ[60] DDR1_BA[0]/DDR1_CAB[4]/DDR1_BA[0] AH9 DDR_B_BS0 <15>
DDR_A_D30 DDR0_DQ[29]/DDR0_DQ[45] DDR0_WE#/DDR0_CAB[2]/DDR0_MA[14] DDR_A_WE# <14> DDR_B_D30 DDR1_DQ[29]/DDR0_DQ[61] DDR1_BA[1]/DDR1_CAB[6]/DDR1_BA[1] DDR_B_BS1 <15>
BC1 AD1 BC7 AR9
T
DDR_A_D31 DDR0_DQ[30]/DDR0_DQ[46] DDR0_CAS#/DDR0_CAB[1]/DDR0_MA[15] DDR_A_CAS# <14> DDR_B_D31 DDR1_DQ[30]/DDR0_DQ[62] DDR1_BA[2]/DDR1_CAA[5]/DDR1_BG[0] DDR_B_BG0 <15>
BC2 BB7
DDR_A_D32 AB1 DDR0_DQ[31]/DDR0_DQ[47] AH3 DDR_A_MA0 DDR_B_D32 AA11 DDR1_DQ[31]/DDR0_DQ[63] AJ9 DDR_B_MA0
DDR_A_D33 DDR0_DQ[32]/DDR1_DQ[0] DDR0_MA[0]/DDR0_CAB[9]/DDR0_MA[0] DDR_A_MA1 DDR_B_D33 DDR1_DQ[32]/DDR1_DQ[16] DDR1_MA[0]/DDR1_CAB[9]/DDR1_MA[0] AK6 DDR_B_MA1
I
AB2 AP4 AA10
DDR_A_D34 AA4 DDR0_DQ[33]/DDR1_DQ[1] DDR0_MA[1]/DDR0_CAB[8]/DDR0_MA[1] AN4 DDR_A_MA2 DDR_B_D34 AC11 DDR1_DQ[33]/DDR1_DQ[17] DDR1_MA[1]/DDR1_CAB[8]/DDR1_MA[1] AK5 DDR_B_MA2
DDR_A_D35 AA5 DDR0_DQ[34]/DDR1_DQ[2] DDR0_MA[2]/DDR0_CAB[5]/DDR0_MA[2] AP5 DDR_A_MA3 DDR_B_D35 AC10 DDR1_DQ[34]/DDR1_DQ[18] DDR1_MA[2]/DDR1_CAB[5]/DDR1_MA[2] AL5 DDR_B_MA3
DDR_A_D36 AB5 DDR0_DQ[35]/DDR1_DQ[3] DDR0_MA[3] AP2 DDR_A_MA4 DDR_B_D36 AA7 DDR1_DQ[35]/DDR1_DQ[19] DDR1_MA[3] AL6 DDR_B_MA4
DDR_A_D37 AB4 DDR0_DQ[36]/DDR1_DQ[4] DDR0_MA[4] AP1 DDR_A_MA5 DDR_B_D37 AA8 DDR1_DQ[36]/DDR1_DQ[20] DDR1_MA[4] AM6 DDR_B_MA5
DDR_A_D38 AA2 DDR0_DQ[37]/DDR1_DQ[5] DDR0_MA[5]/DDR0_CAA[0]/DDR0_MA[5] AP3 DDR_A_MA6 DDR_B_D38 AC8 DDR1_DQ[37]/DDR1_DQ[21] DDR1_MA[5]/DDR1_CAA[0]/DDR1_MA[5] AN7 DDR_B_MA6
C
DDR_A_D39 AA1 DDR0_DQ[38]/DDR1_DQ[6] DDR0_MA[6]/DDR0_CAA[2]/DDR0_MA[6] AN1 DDR_A_MA7 DDR_B_D39 AC7 DDR1_DQ[38]/DDR1_DQ[22] DDR1_MA[6]/DDR1_CAA[2]/DDR1_MA[6] AN10 DDR_B_MA7
DDR_A_D40 V5 DDR0_DQ[39]/DDR1_DQ[7] DDR0_MA[7]/DDR0_CAA[4]/DDR0_MA[7] AN3 DDR_A_MA8 DDR_B_D40 W8 DDR1_DQ[39]/DDR1_DQ[23] DDR1_MA[7]/DDR1_CAA[4]/DDR1_MA[7] AN8 DDR_B_MA8
DDR_A_D41 V2 DDR0_DQ[40]/DDR1_DQ[8] DDR0_MA[8]/DDR0_CAA[3]/DDR0_MA[8] AT4 DDR_A_MA9 DDR_B_D41 W7 DDR1_DQ[40]/DDR1_DQ[24] DDR1_MA[8]/DDR1_CAA[3]/DDR1_MA[8] AR11 DDR_B_MA9
DDR_A_D42 U1 DDR0_DQ[41]/DDR1_DQ[9] DDR0_MA[9]/DDR0_CAA[1]/DDR0_MA[9] AH2 DDR_A_MA10 DDR_B_D42 V10 DDR1_DQ[41]/DDR1_DQ[25] DDR1_MA[9]/DDR1_CAA[1]/DDR1_MA[9] AH7 DDR_B_MA10
DDR_A_D43 U2 DDR0_DQ[42]/DDR1_DQ[10] DDR0_MA[10]/DDR0_CAB[7]/DDR0_MA[10] AN2 DDR_A_MA11 DDR_B_D43 V11 DDR1_DQ[42]/DDR1_DQ[26] DDR1_MA[10]/DDR1_CAB[7]/DDR1_MA[10] AN11 DDR_B_MA11
r
DDR_A_D44 V1 DDR0_DQ[43]/DDR1_DQ[11] DDR0_MA[11]/DDR0_CAA[7]/DDR0_MA[11] AU4 DDR_A_MA12 DDR_B_D44 W11 DDR1_DQ[43]/DDR1_DQ[27] DDR1_MA[11]/DDR1_CAA[7]/DDR1_MA[11] AR10 DDR_B_MA12
DDR_A_D45 V4 DDR0_DQ[44]/DDR1_DQ[12] DDR0_MA[12]/DDR0_CAA[6]/DDR0_MA[12] AE3 DDR_A_MA13 DDR_B_D45 W10 DDR1_DQ[44]/DDR1_DQ[28] DDR1_MA[12]/DDR1_CAA[6]/DDR1_MA[12] AF9 DDR_B_MA13
DDR_A_D46 U5 DDR0_DQ[45]/DDR1_DQ[13] DDR0_MA[13]/DDR0_CAB[0]/DDR0_MA[13] AU2 DDR_B_D46 V7 DDR1_DQ[45]/DDR1_DQ[29] DDR1_MA[13]/DDR1_CAB[0]/DDR1_MA[13] AR7
DDR_A_D47 U4 DDR0_DQ[46]/DDR1_DQ[14] DDR0_MA[14]/DDR0_CAA[9]/DDR0_BG[1] AU3 DDR_A_BG1 <14> DDR_B_D47 V8 DDR1_DQ[46]/DDR1_DQ[30] DDR1_MA[14]/DDR1_CAA[9]/DDR1_BG[1] AT9 DDR_B_BG1 <15>
DDR_A_D48 DDR0_DQ[47]/DDR1_DQ[15] DDR0_MA[15]/DDR0_CAA[8]/DDR0_ACT# DDR_A_ACT# <14> DDR_B_D48 DDR1_DQ[47]/DDR1_DQ[31] DDR1_MA[15]/DDR1_CAA[8]/DDR1_ACT# DDR_B_ACT# <15>
o
R2 R11
DDR_A_D49 P5 DDR0_DQ[48]/DDR1_DQ[32] AG3 DDR_B_D49 P11 DDR1_DQ[48] AJ7
DDR_A_D50 DDR0_DQ[49]/DDR1_DQ[33] DDR0_PAR DDR_A_PAR <14> DDR_B_D50 DDR1_DQ[49] DDR1_PAR DDR_B_PAR <15>
R4 AU5 P7 AR8
DDR_A_D51 DDR0_DQ[50]/DDR1_DQ[34] DDR0_ALERT# DDR_A_ALERT# <14> DDR_B_D51 DDR1_DQ[50] DDR1_ALERT# DDR_B_ALERT# <15>
P4 R8
DDR_A_D52 R5 DDR0_DQ[51]/DDR1_DQ[35] DDR_B_D52 R10 DDR1_DQ[51]
DDR0_DQ[52]/DDR1_DQ[36] DDR1_DQ[52]
F
DDR_A_D53 P2 BR5 DDR_A_DQS#0 DDR_B_D53 P10 BP9 DDR_B_DQS#0
DDR_A_D54 R1 DDR0_DQ[53]/DDR1_DQ[37] DDR0_DQSN[0] BL3 DDR_A_DQS#1 DDR_B_D54 R7 DDR1_DQ[53] DDR1_DQSN[0]/DDR0_DQSN[2] BL9 DDR_B_DQS#1
DDR_A_D55 P1 DDR0_DQ[54]/DDR1_DQ[38] DDR0_DQSN[1] BG3 DDR_A_DQS#2 DDR_B_D55 P8 DDR1_DQ[54] DDR1_DQSN[1]/DDR0_DQSN[3] BG9 DDR_B_DQS#2
DDR_A_D56 M4 DDR0_DQ[55]/DDR1_DQ[39] DDR0_DQSN[2]/DDR0_DQSN[4] BD3 DDR_A_DQS#3 DDR_B_D56 L11 DDR1_DQ[55] DDR1_DQSN[2]/DDR0_DQSN[6] BC9 DDR_B_DQS#3
DDR_A_D57 M1 DDR0_DQ[56]/DDR1_DQ[40] DDR0_DQSN[3]/DDR0_DQSN[5] AB3 DDR_A_DQS4 DDR_B_D57 M11 DDR1_DQ[56] DDR1_DQSN[3]/DDR0_DQSN[7] AC9 DDR_B_DQS#4
l
DDR_A_D58 L4 DDR0_DQ[57]/DDR1_DQ[41] DDR0_DQSP[4]/DDR1_DQSP[0] V3 DDR_A_DQS5 DDR_B_D58 L7 DDR1_DQ[57] DDR1_DQSN[4]/DDR1_DQSN[2] W9 DDR_B_DQS#5
DDR_A_D59 L2 DDR0_DQ[58]/DDR1_DQ[42] DDR0_DQSP[5]/DDR1_DQSP[1] R3 DDR_A_DQS6 DDR_B_D59 M8 DDR1_DQ[58] DDR1_DQSN[5]/DDR1_DQSN[3] R9 DDR_B_DQS#6
DDR_A_D60 M5 DDR0_DQ[59]/DDR1_DQ[43] DDR0_DQSP[6]/DDR1_DQSP[4] M3 DDR_A_DQS7 DDR_B_D60 L10 DDR1_DQ[59] DDR1_DQSN[6] M9 DDR_B_DQS#7
B DDR_A_D61 DDR0_DQ[60]/DDR1_DQ[44] DDR0_DQSP[7]/DDR1_DQSP[5] DDR_B_D61 DDR1_DQ[60] DDR1_DQSN[7] B
a
M2 M10
DDR_A_D62 L5 DDR0_DQ[61]/DDR1_DQ[45] BP5 DDR_A_DQS0 DDR_B_D62 M7 DDR1_DQ[61] BR9 DDR_B_DQS0
DDR_A_D63 L1 DDR0_DQ[62]/DDR1_DQ[46] DDR0_DQSP[0] BK3 DDR_A_DQS1 DDR_B_D63 L8 DDR1_DQ[62] DDR1_DQSP[0]/DDR0_DQSP[2] BJ9 DDR_B_DQS1
i
DDR0_DQ[63]/DDR1_DQ[47] DDR0_DQSP[1] BF3 DDR_A_DQS2 DDR1_DQ[63] DDR1_DQSP[1]/DDR0_DQSP[3] BF9 DDR_B_DQS2
BA2 DDR0_DQSP[2]/DDR0_DQSP[4] BC3 DDR_A_DQS3 AW11 DDR1_DQSP[2]/DDR0_DQSP[6] BB9 DDR_B_DQS3
DDR0_ECC[0] DDR0_DQSP[3]/DDR0_DQSP[5] DDR_A_DQS#4 DDR1_ECC[0] DDR1_DQSP[3]/DDR0_DQSP[7] DDR_B_DQS4
t
BA1 AA3 AY11 AA9
AY4 DDR0_ECC[1] DDR0_DQSN[4]/DDR1_DQSN[0] U3 DDR_A_DQS#5 AY8 DDR1_ECC[1] DDR1_DQSP[4]/DDR1_DQSP[2] V9 DDR_B_DQS5
AY5 DDR0_ECC[2] DDR0_DQSN[5]/DDR1_DQSN[1] P3 DDR_A_DQS#6 AW8 DDR1_ECC[2] DDR1_DQSP[5]/DDR1_DQSP[3] P9 DDR_B_DQS6
BA5 DDR0_ECC[3] DDR0_DQSN[6]/DDR1_DQSN[4] L3 DDR_A_DQS#7 AY10 DDR1_ECC[3] DDR1_DQSP[6] L9 DDR_B_DQS7
BA4 DDR0_ECC[4] DDR0_DQSN[7]/DDR1_DQSN[5] AW10 DDR1_ECC[4] DDR1_DQSP[7]
n
AY1 DDR0_ECC[5] AY3 AY7 DDR1_ECC[5] AW9
AY2 DDR0_ECC[6] DDR0_DQSP[8] BA3 AW7 DDR1_ECC[6] DDR1_DQSP[8] AY9
DDR0_ECC[7] DDR0_DQSN[8] DDR1_ECC[7] DDR1_DQSN[8]
e
DDR CHANNEL B
DDR CHANNEL A RH148 1 2 121_0402_1% DDR_RCOMP0 G1 BN13
id
DDR_RCOMP[0] DDR_VREF_CA +V_DDR_REFA_R
RH149 1 2 75_0402_1% DDR_RCOMP1 H1 BP13
RH150 1 2 100_0402_1% DDR_RCOMP2 J2 DDR_RCOMP[1] DDR0_VREF_DQ BR13
DDR_RCOMP[2] DDR1_VREF_DQ +V_DDR_REFB_R
1 OF 14 2 OF 14
@ SKL-H_BGA1440 @ SKL-H_BGA1440
nf DDR_RCOMP0 :
DDR_RCOMP1 :
DDR_RCOMP2 :
Co Trace width=12~15 mils

Spacing=20 mils
Max length= 500 mils

A
CPU(2/7) DDR4
5 4 3 2 1
5 4 3 2 1
+VCCST
y
RH163 1 2 1K_0402_5% H_THERMTRIP# CPU1E SKYLAKE_HALO
XDP_PREQ# BGA1440
l
RH156 1 @ 2 51_0402_5% B31 BN25
<17> PCH_CPU_BCLK_P BCLKP CFG[0] CFG0 <6>
A32 BN27
1 2 H_VCCST_PWRGD <17> PCH_CPU_BCLK_N BCLKN CFG[1] BN26 CFG1 <6>
RH164 1K_0402_5% CFG2
CFG[2] CFG2 <6>
D35 BN28
D VR_SVID_DATA <17> PCH_CPU_PCIBCLK_P PCI_BCLKP CFG[3] CFG3 <6> D
RH151 1 2 100_0402_1% C36 BR20 CFG4
n
<17> PCH_CPU_PCIBCLK_N PCI_BCLKN CFG[4] BM20 CFG4 <6>
CFG5
VR_SVID_ALERT# CFG[5] CFG5 <6>
RH152 1 2 56.2_0402_1% E31 BT20 CFG6
<17> CPU_24MHZ_P D31 CLK24P CFG[6] BP20 CFG6 <6>
CFG7
<17> CPU_24MHZ_N CLK24N CFG[7] CFG7 <6>
BR23
+VCCSTG CFG[8] CFG8 <6>
BR22
CFG[9] BT23 CFG9 <6>
O
CFG[10] CFG10 <6>
BT22
CFG[11] BM19 CFG11 <6>
CFG[12] CFG12 <6>
BR19
H_PROCHOT# CFG[13] CFG13 <6>
RH165 1 2 1K_0402_5% BP19
VR_SVID_ALERT# 1 2 220_0402_5% BH31 CFG[14] BT19 CFG14 <6>
RH153
r
<75> VR_SVID_ALERT# VIDALERT# CFG[15] CFG15 <6>
BH32
<75> VR_SVID_CLK VR_SVID_DATA BH29 VIDSCK BN23
<75> VR_SVID_DATA H_PROCHOT# VIDSOUT CFG[17] CFG17 <6>
RH158 1 2 499_0402_1% BR30 BP23
<43> H_PROCHOT# PROCHOT# CFG[16] CFG16 <6>
BP22
e
DDR_VTT_PG_CTRL BT13 CFG[19] BN22 CFG19 <6>
DDR_VTT_CNTL CFG[18] CFG18 <6>
BR27 XDP_BPM#0 T112 PAD~D @
BPM#[0] BT27 XDP_BPM#1 T113 PAD~D @
b
BPM#[1] BM31
PCI EXPRESS STATIC LANE REVERSAL FOR ALL PEG PORTS H_VCCST_PWRGD BPM#[2]
RH154 1 2 60.4_0402_1% H13 BT30
<43> H_VCCST_PWRGD VCCST_PWRGD BPM#[3]
1: Normal Operation; Lane # definition matches BT31
<18> H_CPUPWRGD PROCPWRGD XDP_TDO
CFG2 BP35 BT28
socket pin map definition <16> PLTRST_CPU#
BM34 RESET# PROC_TDO BL32 XDP_TDI XDP_TDO <6,18>
<16> H_PM_SYNC_R 1 2 20_0402_5% BP31 PM_SYNC PROC_TDI BP28 XDP_TMS XDP_TDI <6,18>
RH155
m
<16> H_PM_DOWN PM_DOWN PROC_TMS PCH_JTAG_TCK XDP_TMS <6,18>
0:Lane Reversed BT34 BR28
* <16,43>
<16>
H_PECI
H_THERMTRIP#
H_THERMTRIP# J31 PECI
THERMTRIP#
PROC_TCK
PROC_TRST#
BP30 CPU_XDP_TRST#
XDP_PREQ#
PCH_JTAG_TCK
CPU_XDP_TRST#
<6,18>
<6,22>
e
RH519 1 @ 2 0_0402_5% BR33 BL30
1 2 <16> PROC_DETECT# BN1 SKTOCC# PROC_PREQ# BP27 XDP_PRDY# XDP_PREQ# <6,22>
CFG2
PROC_SELECT# PROC_PRDY# XDP_PRDY# <6,22>
RH184 1K_0402_5%
BM30
CATERR# BT25 CFG_RCOMP
CFG_RCOMP
1
C C
5 OF 14 RH59
@ SKL-H_BGA1440 49.9_0402_1%
Display Port Presence Strap
2
1 : Disabled; No Physical Display Port
T
CFG4 attached to Embedded Display Port +1.2V_DDR
I
UC1
0 : Enabled; An external Display Port device is 5 1
* connected to the Embedded Display Port
1
VCC NC
A
2 DDR_VTT_PG_CTRL
@ 4
CH197 Y 3
C
0.1U_0402_10V7K GND H_VCCST_PWRGD H_CPUPWRGD PLTRST_CPU#
CFG4 1 2 2 74AUP1G07GW_TSSOP5
RH185 1K_0402_5%
1 1 1
CH193 CH194 CH195
r
0.1U_0402_16V7K~D 0.1U_0402_16V7K~D 0.1U_0402_16V7K~D
+3VS @ESD@ @ESD@ @ESD@
1 2 2 2
PCIE Port Bifurcation Straps
o
RH525
330K_0402_5%
2
F
11: (Default) x16 - Device 1 functions 1 and 2 disabled
<64> SM_PG_CTRL
CFG[6:5] 10: x8, x8 - Device 1 function 1 enabled ; function 2
disabled
l
01: Reserved - (Device 1 function 1 disabled ; function
2 enabled) RH489 1 2 1K_0402_5% PCH_SYS_PWROK_XDP
B <17> PCH_SPI_SI_R B
a
00: x8,x4,x4 - Device 1 functions 1 and 2 enabled
* RH489,RH493 close to UH4
i
+3VS
CFG5 1 2 +3V_PCH +3VALW
t
RH186 1K_0402_5%
CFG6 1 2 RH493 1 2 2.2K_0402_5% PCH_SYS_PWROK_XDP
1
RH187 1K_0402_5%
1
n
RH2 RH5
10K_0402_5% 1K_0402_5%
2
e
2
PEG DEFER TRAINING PBTN_OUT# <18,43> SYS_RESET# <18>
id
0.1U_0402_10V
1: (Default) PEG Train immediately following xxRESETB
*
1
CFG7 de assertion CH174
CH175
0.1U_0402_10V
+VCCSTG
2
0: PEG Wait for BIOS for training
2
RH494 1 CMC@ 2 51_0402_5% XDP_TMS
CFG7 1 @ 2
n
RH188 1K_0402_5% RH495 1 CMC@ 2 51_0402_5% XDP_TDI
RH496 1 @ 2 51_0402_5% XDP_TDO
Co Security Classification Compal Secret Data Compal Electronics, Inc.

A
CPU(3/7) CFG,XDP
5 4 3 2 1
5 4 3 2 1
+VCC_CORE +VCC_CORE
n l y D
O
CPU1J SKYLAKE_HALO
BGA1440
BJ17
VCCOPC
r
CPU1G SKYLAKE_HALO BJ19
BJ20 VCCOPC
BGA1440 BK17 VCCOPC
AA13 V32 BK19 VCCOPC
e
AA31 VCC VCC V33 BK20 VCCOPC
AA32 VCC VCC V34 BL16 VCCOPC
b
AA37 VCC VCC W13 CPU1K SKYLAKE_HALO BL21 VCCOPC
AA38 VCC VCC W14 BM17 VCCOPC
AB29 VCC VCC W29 BGA1440
BN17 VCCOPC
AB30 VCC VCC W30 D1 BM33 T66 PAD~D @ VCCOPC
m
AB31 VCC VCC W31 E1 RSVD_TP RSVD_TP BL33 T67 PAD~D @ BJ23
AB32 VCC VCC W32 @ PAD~D T41 E3 RSVD_TP RSVD_TP BJ26 RSVD
AB35 VCC VCC W35 E2 RSVD_TP BJ14 T68 PAD~D @ BJ27 RSVD
VCC VCC RSVD_TP RSVD_TP RSVD
e
AB36 W36 BJ13 T69 PAD~D @ BK23
AB37 VCC VCC W37 @ PAD~D T43 BR1 RSVD_TP BK26 RSVD
AB38 VCC VCC W38 @ PAD~D T44 BT2 RSVD_TP BK28 BK27 RSVD
AC13 VCC VCC Y29 RSVD_TP RSVD BJ28 BL23 RSVD
AC14 VCC VCC Y30 BN35 RSVD BL24 RSVD
AC29 VCC VCC Y31 RSVD BJ18 BL25 RSVD
VCC VCC VSS RSVD
m
AC30 Y32 J24 BL26
C
AC31 VCC VCC Y33 H24 RSVD BJ16 T73 PAD~D @ BL27 RSVD C
AC32 VCC VCC Y34 BN33 RSVD RSVD_TP BK16 T74 PAD~D @ BL28 RSVD
AC33 VCC VCC Y35 BL34 RSVD RSVD_TP BM24 RSVD
AC34 VCC VCC Y36 RSVD RSVD
AC35 VCC VCC L14 N29 BK24 T75 PAD~D @
AC36 VCC VCC P29 R14 RSVD RSVD_TP BJ24 T76 PAD~D @ BL15
T
AD13 VCC VCC P30 AE29 RSVD RSVD_TP BM16 VCCOPC_SENSE
AD14 VCC VCC P31 AA14 RSVD BK21 VSSOPC_SENSE
AD31 VCC VCC P32 RSVD RSVD BJ21 BL22
I
AD32 VCC VCC P33 A36 RSVD BM22 RSVD
AD33 VCC VCC P34 A37 RSVD BT17 RSVD
AD34 VCC VCC P35 RSVD RSVD BR17
AD35 VCC VCC P36 RH167 1 2 30_0402_5% H23 RSVD BP15
VCC VCC <22> PCH_TRIGGER PROC_TRIGIN VCCEOPIO
AD36 R13 RH192 1 2 30_0402_5% J23 BK18 BR15
C
VCC VCC <22> CPU_TRIGGER PROC_TRIGOUT VSS VCCEOPIO
AD37 R31 BT15
AD38 VCC VCC R32 F30 BJ34 T81 PAD~D @ VCCEOPIO
AE13 VCC VCC R33 E30 RSVD RSVD_TP BJ33 T82 PAD~D @ BP16
AE14 VCC VCC R34 RSVD RSVD_TP BR16 RSVD
AE30 VCC VCC R35 B30 BT16 RSVD
r
AE31 VCC VCC R36 C30 RSVD RSVD
AE32 VCC VCC R37 RSVD G13
AE35 VCC VCC R38 G3 RSVD AJ8 BN15
VCC VCC RSVD RSVD VCCEOPIO_SENSE
o
AE36 T29 J3 BL31 BM15
AE37 VCC VCC T30 RSVD RSVD VSSEOPIO_SENSE
AE38 VCC VCC T31 B2 T85 PAD~D @ BP17
AF35 VCC VCC T32 NCTF B38 BN16 RSVD
AF36 VCC VCC T35 NCTF BP1 RSVD
F
AF37 VCC VCC T36 BR35 NCTF BR2 T88 PAD~D @
AF38 VCC VCC T37 BR31 RSVD NCTF C1 T89 PAD~D @ BM14
K13 VCC VCC T38 BH30 RSVD NCTF C38 BL14 VCC_OPC_1P8
K14 VCC VCC U29 RSVD NCTF VCC_OPC_1P8
l
L13 VCC VCC U30 11 OF 14 BJ35
N13 VCC VCC U31 @ SKL-H_BGA1440 BJ36 RSVD
N14 VCC VCC U32 RSVD
VCC VCC
a
B N30 U33 B
N31 VCC VCC U34 +VCC_CORE AT13
N32 VCC VCC U35 AW13 ZVM#
i
N35 VCC VCC U36 MSM#
N36 VCC VCC V13 AU13
t
VCC VCC ZVM2#
1
N37 V14 AY13

N38 VCC VCC V31 RH197 MSM2#
P13 VCC VCC P14 RH166 1 @ 2 49.9_0402_1% BT29
100_0402_1%
VCC VCC RH57 1 @ 2 49.9_0402_1% BR25 OPC_RCOMP
n
RH58 1 @ 2 49.9_0402_1% BP25 OPCE_RCOMP
2
OPCE_RCOMP2
AG37
VCC_SENSE VCCSENSE <75>
e
AG38 10 OF 14
VSS_SENSE VSSSENSE <75>
@ SKL-H_BGA1440
1
id
7 OF 14 RH466
@ SKL-H_BGA1440 100_0402_1%
2
nf
A
Co A

CPU(4/7) +VCC_CORE,RSVD
5 4 3 2 1
5 4 3 2 1
+VCCIO +VCCSTG +VCCST
l y
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
D D
1 1 1 1 1 1 1 1 1
CH102
CH103
CH104
CH105
CH106
CH107
CH108
CH109
CH110
+VCCSA +1.2V_DDR
2 2 2 2 2 2 2 2 2
O
SKYLAKE_HALO
CPU1I
BGA1440
J30 AA6
K29 VCCSA VDDQ AE12
r
K30 VCCSA VDDQ AF5
K31 VCCSA VDDQ AF6 +1.2V_DDR
K32 VCCSA VDDQ AG5
VCCSA VDDQ
e
K33 AG9
K34 VCCSA VDDQ AJ12
K35 VCCSA VDDQ AL11
L31 VCCSA VDDQ AP6
VCCSA VDDQ
22U_0805_6.3V6M~D
22U_0805_6.3V6M~D
22U_0805_6.3V6M~D
22U_0805_6.3V6M~D
L32 AP7 1 1 1 1
L35 VCCSA VDDQ AR12
VCCSA VDDQ
CH129
CH130
CH131
CH132
L36 AR6
L37 VCCSA VDDQ AT12
L38 VCCSA VDDQ AW6 2 2 2 2
M29 VCCSA
VCCSA
VDDQ
VDDQ
AY6
VCCPLL_OC is allowed to be turned of f
m
M30 J5
M31 VCCSA VDDQ J6
M32
M33
VCCSA
VCCSA
VDDQ
VDDQ
K12
K6
during S3 and DS3 if it is not powered directly from VDDQ
e
M34 VCCSA VDDQ L12
M35 VCCSA VDDQ L6 +1.2V_DDR
C +VCCIO M36 VCCSA VDDQ R6 C
VCCSA VDDQ T6 +1.2V_VCCPLL_OC +1.2V_DDR
VDDQ W6
AG12 VDDQ RH530 1 @ 2 0_0402_5%
VCCIO
m
G15 Y12
G17 VCCIO VDDQC
G19 VCCIO BH13 +1.2V_DDR
G21 VCCIO VCCPLL_OC G11
H15 VCCIO VCCPLL_OC +VCCST
H16 VCCIO
H17 VCCIO H30 +VCCSA
T
VCCIO VCCST +VCCSTG
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
H19
VCCIO
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
H20 H29
VCCIO VCCSTG
2
H21
I
VCCIO 1 1 1 1 1 1 1 1 1 1 1
CH118
CH121
CH124
CH120
CH119
CH122
CH123
CH125
CH126
CH127
CH128
H26 G30 RH201
H27 VCCIO VCCSTG +VCCST
VCCIO 100_0402_1%
J15 H28
J16 VCCIO VCCPLL J28 2 2 2 2 2 2 2 2 2 2 2
1
J17 VCCIO VCCPLL
C
J19 VCCIO
J20 VCCIO M38
VCCIO VCCSA_SENSE VCCSA_SENSE <75>
J21 M37
VCCIO VSSSA_SENSE VSSSA_SENSE <75>
J26
VCCIO
1
J27 H14
r
VCCIO VCCIO_SENSE VCCIO_SENSE <79>
J14 RH469
VSSIO_SENSE VSSIO_SENSE <79>
100_0402_1%
o
2
F
B 9 OF 14 B
@ SKL-H_BGA1440
ia l
n t
id e
A
nf A
Co 4 3
Compal Secret Data
Deciphered Date
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
2
2017/01/06 Title
Size
Date:
CPU(5/7) +VCCSA,+VCCIO
Document Number
LA-D753P
Tuesday, July 05, 2016
1
Sheet 11 of 82
Rev
0.2
5 4 3 2 1
y
+VCCGT
+VCCGT
+VCCGT
l
SKYLAKE_HALO
CPU1N
D SKYLAKE_HALO D
CPU1H BGA1440
AJ29
n
BG34 BGA1440
AV29 AJ30 VCCGT
BG35 VCCGT AF29
VCCGT AV30 AJ31 VCCGT
BG36 VCCGT VCCGTX AF30
BH33 VCCGT VCCGTX AF31
O
BH37 VCCGT VCCGTX AG13
VCCGT AV36 AK31 VCCGT
BH38 VCCGT VCCGTX AG14
VCCGT AW14 AK32 VCCGT
BJ37 VCCGT VCCGTX AG31
VCCGT AW31 AK33 VCCGT
BJ38 VCCGT VCCGTX AG32
VCCGT VCCGT
r
VCCGT AW32 AK34 VCCGTX
BL36 VCCGT VCCGT AG33
BL37 VCCGT VCCGT AG34
BM36 VCCGT VCCGT AG35
e
BM37 VCCGT VCCGT AG36
BN36 VCCGT VCCGT AH13
VCCGT AW37 AL13 VCCGTX
VCCGT AW38 AL29 VCCGTX
VCCGT AY29 AL30 VCCGTX
b
BP37 VCCGT VCCGT AH30
BP38 VCCGT VCCGT AH31
BR37 VCCGT VCCGT AH32
BT37 VCCGT VCCGT AJ13
BE38 VCCGT VCCGT AJ14
BF13 VCCGT VCCGT
VCCGT AY37 AL38
m
BF14 VCCGT VCCGT
VCCGT AY38 AM13
BF29 VCCGT VCCGT
VCCGT BA13 AM14
BF30 VCCGT VCCGT
VCCGT BA14 AM29
BF31 VCCGT VCCGT
BA29 AM30
e
BF32 VCCGT
VCCGT BA30 AM31 VCCGT
BF35 VCCGT
C BF36 VCCGT C
BF37 VCCGT
BF38 VCCGT
BG29 VCCGT
VCCGT
m
BG30 VCCGT VCCGT
VCCGT BA36 AN13
BG31 VCCGT VCCGT
VCCGT BB13 AN14
BG32 VCCGT VCCGT
VCCGT BB14 AN31
BG33 VCCGT VCCGT
VCCGT BB31 AN32
BC36 VCCGT VCCGT
VCCGT BB32 AN33
BC37 VCCGT VCCGT
VCCGT BB33 AN34
BC38 VCCGT VCCGT
BB34 AN35
T
BD13 VCCGT
VCCGT BB35 AN36 VCCGT
BD14 VCCGT
VCCGT BB36 AN37 VCCGT
BD29 VCCGT
VCCGT VCCGT
I
VCCGT BB37 AN38
BD30 VCCGT VCCGT
VCCGT BB38 AP13
BD31 VCCGT VCCGT
VCCGT BC29 AP14
BD32 VCCGT VCCGT +VCCGT
VCCGT BC30 AP29
BD33 VCCGT VCCGT
VCCGT BC31 AP30
BD34 VCCGT VCCGT
BC32 AP31
C
BD35 VCCGT
VCCGT BC35 AP32 VCCGT
BD36 VCCGT
VCCGT BE33 AP35 VCCGT
BE31 VCCGT
BE32 VCCGT
VCCGT
1
BE37 VCCGT VCCGT
r
VCCGT BE36 AP38
VCCGT VCCGT RH203
AR29
AR30 VCCGT 100_0402_1%
8 OF 14 VCCGT
AR31
@ SKL-H_BGA1440 VCCGT
o
AR32
2
AR33 VCCGT AH38
VCCGT VCCGT_SENSE VCCGT_SENSE <75>
AR34 AH35
AR35 VCCGT VSSGTX_SENSE AH37
VCCGT VSSGT_SENSE VSSGT_SENSE <75>
AR36 AH36
F
B VCCGT VCCGTX_SENSE B
AT14
AT31 VCCGT
AT32 VCCGT
AT33 VCCGT
1
l
AT34 VCCGT
VCCGT RH472
AT35
AT36 VCCGT 100_0402_1%
VCCGT
a
AT37
AT38 VCCGT
2
AU14 VCCGT
i
AU29 VCCGT
AU30 VCCGT
t
AU31 VCCGT
AU32 VCCGT
AU35 VCCGT
AU36 VCCGT
n
AU37 VCCGT
AU38 VCCGT
VCCGT
14 OF 14
e
@ SKL-H_BGA1440
nf id A
Co 4 3
Compal Secret Data
2
Title
Size
Date:
LA-D753P
CPU(6/7) +VCCGT
Document Number

1
Sheet 12 of 82
Rev
0.2
5 4 3 2 1
SKYLAKE_HALO SKYLAKE_HALO
CPU1F CPU1L
y
BGA1440 CPU1M SKYLAKE_HALO
BGA1440
Y38 K1 BGA1440
C17 C25
l
Y37 VSS VSS J36 BB4 AK30
C13 VSS VSS C23
Y14 VSS VSS J33 BB3 VSS VSS AK29
C9 VSS VSS C21
Y13 VSS VSS J32 BB2 VSS VSS AK4
BT32 VSS VSS C19
D Y11 VSS VSS J25 BB1 VSS VSS AJ38 D
VSS VSS
n
VSS VSS BT26 C15 VSS VSS
Y10 J22 VSS VSS BA38 AJ37
VSS VSS BT14 BM29 VSS VSS
W34 J4 VSS VSS BA10 AJ3
BT12 BM25
O
W33 VSS VSS H35 BA9 VSS VSS AJ2
BT9 VSS VSS BM18
W12 VSS VSS H32 BA8 VSS VSS AJ1
BT5 VSS VSS BM11
W5 VSS VSS H25 BA7 VSS VSS AH34
BR36 VSS VSS BM8
W4 VSS VSS H22 BA6 VSS VSS AH33
BR34 VSS VSS BM7
VSS VSS VSS VSS
r
W3 H18 VSS VSS B9 AH12
VSS VSS BR29 BM5 VSS VSS
W2 H12 VSS VSS AY34 AH6
VSS VSS BR26 BM3 VSS VSS
W1 H11 VSS VSS AY33 AG30
VSS VSS BR24 BL38 VSS VSS
V30 G28 VSS VSS AY14 AG29
e
V29 G26 VSS VSS AY12 AG11
V12 G24 VSS VSS AW30 AG10
V6 G23 VSS VSS AW29 AG8
VSS VSS BR12 BK25 VSS VSS
b
U38 G22 VSS VSS AW12 AG7
VSS VSS BR7 BK22 VSS VSS
U37 G20 VSS VSS AW5 AG6
VSS VSS BP34 BK13 VSS VSS
U6 G18 VSS VSS AW4 AF14
VSS VSS BP33 BK6 VSS VSS
T34 G16 VSS VSS AW3 AF13
VSS VSS BP29 BJ30 VSS VSS
VSS VSS BP26 BJ29 VSS VSS
BP24 BJ15
m
T13 VSS VSS G10 AV38 VSS VSS AF3
BP21 VSS VSS BJ12
T12 VSS VSS G9 AV37 VSS VSS AF2
BP18 VSS VSS BH11
T11 VSS VSS G8 AU34 VSS VSS AF1
BP14 VSS VSS BH10
VSS VSS VSS VSS
e
T10 G6 VSS VSS AU33 AE34
VSS VSS BP12 BH7 VSS VSS
VSS VSS BP7 BH6 VSS VSS
VSS VSS BN34 BH3 VSS VSS
T7 F36 VSS VSS AU10 AD30
VSS VSS BN31 BH2 VSS VSS
VSS VSS BN30 BG37 VSS VSS
BN29 BG14
m
C T3 VSS VSS F27 AU7 VSS VSS AD11 C
BN24 VSS VSS BG6
T2 VSS VSS F25 AU6 VSS VSS AD10
BN21 VSS VSS BF34
T1 VSS VSS F23 AT30 VSS VSS AD9
BN20 VSS VSS BF6
R30 VSS VSS F21 AT29 VSS VSS AD8
BN19 VSS VSS BE30
R29 VSS VSS F19 AT6 VSS VSS AD7
BN18 VSS VSS BE5
R12 VSS VSS F17 AR38 VSS VSS AD6
BN14 VSS VSS BE4
VSS VSS VSS VSS
T
P38 F15 VSS VSS AR37 AC38
VSS VSS BN12 BE3 VSS VSS
I
VSS VSS BN4 BD38 VSS VSS
N34 F8 VSS VSS AR4 AC5
VSS VSS BN2 BD37 VSS VSS
VSS VSS BM38 BD12 VSS VSS
C
N10 F2 VSS VSS AP34 AC1
N9 E38 VSS VSS AP33 AB34
BM21 BC33
r
N6 VSS VSS E9 AP10 VSS VSS AA30
BM13 VSS VSS BC14
N5 VSS VSS E4 AP9 VSS VSS AA29
BM12 VSS VSS BC13
N4 VSS VSS D33 AP8 VSS VSS AA12
BM9 VSS VSS BC6
N3 VSS VSS D30 AN30 VSS VSS A30
VSS VSS
o
VSS VSS BM6 BB30 VSS VSS
N2 D28 VSS VSS AN29 A28
VSS VSS BM2 BB29 VSS VSS
N1 D26 VSS VSS AN12 A26
VSS VSS BL29 BB6 VSS VSS
M14 D24 VSS VSS AN6 A24
VSS VSS BK29 BB5 VSS VSS
M13 D22 VSS VSS AN5 A22
F
VSS VSS BK15 VSS VSS
M12 D20 VSS AM38 A20
VSS VSS BK14 VSS VSS
M6 D18 VSS AM37 A18
VSS VSS BJ32 VSS VSS
L34 D16 VSS AM12 A16
VSS VSS BJ31 VSS VSS
L33 D14 AM5 A14
l
BJ25 VSS
L30 VSS VSS D12 AM4 VSS VSS A12
BJ22 VSS
L29 VSS VSS D10 AM3 VSS VSS A10
BH14 VSS
B K38 VSS VSS D9 C2 AM2 VSS VSS A9 B
VSS
a
VSS VSS BH12 NCTFVSS VSS VSS
K11 D6 VSS BT36 AM1 A6
VSS VSS BH9 NCTFVSS VSS VSS
K10 D3 VSS BT35 AL34
i
VSS VSS BH8 NCTFVSS VSS
K9 C37 VSS BT4 AL33
VSS VSS BH5 NCTFVSS VSS
K8 C31 VSS BT3 AL14 B37
t
VSS VSS BH4 NCTFVSS VSS NCTFVSS
K7 C29 VSS BR38 AL12 B3
VSS VSS BH1 NCTFVSS VSS NCTFVSS
K5 C27 VSS AL10 A34
VSS VSS BG38 VSS NCTFVSS
K4 VSS AL9 A4
VSS BG13 VSS NCTFVSS
K3 D38 VSS AL8 A3
n
VSS NCTFVSS BG12 VSS NCTFVSS
K2 VSS AL7
VSS BF33 VSS
VSS AL4
BF12 VSS
6 OF 14 VSS
e
BE29
@ SKL-H_BGA1440 BE6 VSS
BD9 VSS 13 OF 14
BC34 VSS @ SKL-H_BGA1440
id
BC12 VSS
BB12 VSS
VSS
12 OF 14
@ SKL-H_BGA1440
nf
A
2016/01/06
Compal Secret Data
2017/01/06 Title
A

CPU(7/7) VSS
0.2
5 4 3 2 1
5 4 3 2 1
<8>
<8>
DDR_A_D[0..63]
DDR_A_MA[0..13] +1.2V_DDR JDIMM1
4H , RVS
<8> DDR_A_DQS#[0..7] +1.2V_DDR
<8> DDR_A_DQS[0..7] 1 2
DDR_A_D1 3 VSS1 VSS2 4 DDR_A_D0
Layout Note: Layout Note: DQ5 DQ4
5 6
Place near JDIMM1.257,259 Place near JDIMM1.258 DDR_A_D5 7 VSS3 VSS4 8 DDR_A_D4
9 DQ1 DQ0 10
CFG Straps for Processor DDR_A_DQS#0
DDR_A_DQS0
11
13
VSS5
DQS0_c
VSS6
DM0_n/DBI0_n
12
14
y
15 DQS0_t VSS7 16 DDR_A_D6
DDR_A_D3 17 VSS8 DQ6 18
DQ7 VSS9 DDR_A_D2
l
+2.5V_MEM +0.6VS 19 20
DDR_A_D7 21 VSS10 DQ2 22
Layout Note: DQ3 VSS11 DDR_A_D12
23 24
Place near JDIMM1.255 DDR_A_D9 25 VSS12 DQ12 26
DQ13 VSS13 DDR_A_D13
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
D 27 28 D
n
DDR_A_D8 VSS14 DQ8
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
1U_0402_6.3V6K~D
29 30
1U_0402_6.3V6K~D DQ9 VSS15 DDR_A_DQS#1
1U_0402_6.3V6K~D
1 1 1 1 31 32
VSS16 DQS1_c DDR_A_DQS1
CD12
CD13
CD14
CD15
1 1 1 1 33 34
DM1_n/DBI_n DQS1_t
CD3
CD4
35 36
DDR_A_D15 VSS17 VSS18 DDR_A_D14
CD9
CD10
37 38
2 2 2 2 +3VS 39 DQ15 DQ14 40
2 2 2 2 DDR_A_D10 VSS19 VSS20 DDR_A_D11
O
41 42
43 DQ10 DQ11 44
47 DQ21 DQ20 48
0.1U_0402_16V7K~D
2.2U_0603_6.3V6K~D
49 50
51 DQ17 DQ16 52
r
1 1 DDR_A_DQS#2 VSS25 VSS26
CD16
CD17
53 54
DDR_A_DQS2 55 DQS2_c DM2_n/DBI2_n 56
57 DQS2_t VSS27 58 DDR_A_D23
2 2 DDR_A_D19 59 VSS28 DQ22 60
e
61 DQ23 VSS29 62 DDR_A_D22
DDR_A_D18 63 VSS30 DQ18 64
65 DQ19 VSS31 66 DDR_A_D28
DDR_A_D24 67 VSS32 DQ28 68
Layout Note: DQ29 VSS33 DDR_A_D25
b
69 70
Place near JDIMM1 DDR_A_D29 71 VSS34 DQ24 72
73 DQ25 VSS35 74 DDR_A_DQS#3
75 VSS36 DQS3_c 76 DDR_A_DQS3
77 DM3_n/DBI3_n DQS3_t 78
+1.2V_DDR 81 DQ30 DQ31 82
m
83 84
85 DQ26 DQ27 86
87 VSS41 VSS42 88
CB5/NC CB4/NC
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
89 90
VSS43 VSS44
e
1 1 1 1 1 1 1 1 91 92
CB1/NC CB0/NC
CD1
CD2
CD75
CD74
CD77
CD76
CD79
CD78
93 94
95 VSS45 VSS46 96
97 DQS8_c DM8_n/DBI_n/NC 98
2 2 2 2 2 2 2 2 99 DQS8_t VSS47 100
101 VSS48 CB6/NC 102
103 CB2/NC VSS49 104
VSS50 CB7/NC
m
105 106
C 107 CB3/NC VSS51 108 DDR4_DRAMRST# C
DDR_CKE0_DIMMA 109 VSS52 RESET_n 110 DDR_CKE1_DIMMA
<8> DDR_CKE0_DIMMA 111 CKE0 CKE1 112 DDR_CKE1_DIMMA <8>
DDR_A_BG1 113 VDD1 VDD2 114
<8> DDR_A_BG1 DDR_A_BG0 BG1 ACT_n DDR_A_ALERT# DDR_A_ACT# <8> 1
115 116 CD91
+1.2V_DDR <8> DDR_A_BG0 117 BG0 ALERT_n 118 DDR_A_ALERT# <8>
0.1U_0402_16V7K~D
DDR_A_MA12 119 VDD3 VDD4 120 DDR_A_MA11 @ESD@
DDR_A_MA9 A12 A11 DDR_A_MA7 2
T
121 122
123 A9 A7 124
DDR_A_MA8 125 VDD5 VDD6 126 DDR_A_MA5
DDR_A_MA6 A8 A5 DDR_A_MA4
All VREF traces should
I
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
127 128
129 A6 A4 130
1 DDR_A_MA3 VDD7 VDD8 DDR_A_MA2
131 132
1 1 1 1 1 1 1 1
+ CD11 DDR_A_MA1 133 A3
A1 EVENT_n/NF
A2 134 have 10 mil trace width
CD5
CD6
CD7
CD8
CD70
CD71
CD72
CD73
220U_D7_2VM_R6M 135 136

M_CLK_DDR0 137 VDD9 VDD10 138 M_CLK_DDR1
2 2 2 2 2 2 2 2 2 <8> M_CLK_DDR0 M_CLK_DDR#0 CK0_t CK1_t/NF M_CLK_DDR#1 M_CLK_DDR1 <8>
C
139 140
<8> M_CLK_DDR#0 141 CK0_c CK1_c/NF 142 M_CLK_DDR#1 <8>
DDR_A_PAR 143 VDD11 VDD12 144 DDR_A_MA0
<8> DDR_A_PAR DDR_A_BS1 145 PARITY A0 146 DDR_A_MA10
<8> DDR_A_BS1 147 BA1 A10/AP 148
DDR_CS0_DIMMA# 149 VDD13 VDD14 150 DDR_A_BS0
r
<8> DDR_CS0_DIMMA# DDR_A_WE# 151 CS0_n BA0 152 DDR_A_RAS# DDR_A_BS0 <8>
<8> DDR_A_WE# 153 WE_n/A14 RAS_n/A16 154 DDR_A_RAS# <8>
M_ODT0 155 VDD15 VDD16 156 DDR_A_CAS#
<8> M_ODT0 DDR_CS1_DIMMA# 157 ODT0 CAS_n/A15 158 DDR_A_MA13 DDR_A_CAS# <8>
<8> DDR_CS1_DIMMA# CS1_n A13
o
159 160
M_ODT1 161 VDD17 VDD18 162
<8> M_ODT1 163 ODT1 C0/CS2_n/NC 164 +V_DDR_REFA
165 VDD19 VREFCA 166 DIMM_CHA_SA2
167 C1, CS3_n,NC SA2 168
0.1U_0402_16V7K~D
169 170
171 DQ37 DQ36 172
DDR_A_D37 VSS55 VSS56 DDR_A_D32 1
CD18
173 174
175 DQ33 DQ32 176
DDR_A_DQS#4 177 VSS57 VSS58 178
+1.2V_DDR
l
DDR_A_DQS4 179 DQS4_c DM4_n/DBI4_n 180 2
+1.2V_DDR 181 DQS4_t VSS59 182 DDR_A_D35
DDR_A_D38 183 VSS60 DQ39 184
185 DQ38 VSS61 186 DDR_A_D34
a
B +3VS +3VS +3VS DDR_A_D39 187 VSS62 DQ35 188 B
189 DQ34 VSS63 190 DDR_A_D40
DDR_A_D44 191 VSS64 DQ45 192
i
193 DQ44 VSS65 194 DDR_A_D45
VSS66 DQ41
1
DDR_A_D41 195 196
t
DQ40 VSS67
1
RD35 197 198 DDR_A_DQS#5

RD1 RD2 RD3 470_0402_1% 199 VSS68 DQS5_c 200 DDR_A_DQS5
@ @ @
+1.2V_DDR 201 DM5_n/DBI5_n DQS5_t 202
0_0402_5% 0_0402_5% 0_0402_5% DDR_A_D43 VSS69 VSS70 DDR_A_D47
203 204
2
205 DQ46 DQ47 206
n
2

DIMM_CHA_SA0 DIMM_CHA_SA1 DIMM_CHA_SA2 DDR4_DRAMRST# 1 2 209 DQ42 DQ43 210
<15> DDR4_DRAMRST# H_DRAMRST# <18> DDR_A_D48 211 VSS73 VSS74 212 DDR_A_D50
RD31 0_0402_5%
DQ52 DQ53
0.1U_0402_16V7K~D
213 214
e
VSS75 VSS76
1
DDR_A_D54 215 216 DDR_A_D52

1 DQ49 DQ48
CD69
RD28 RD29 RD30 217 218

DDR_A_DQS#6 219 VSS77 VSS78 220
0_0402_5% 0_0402_5% 0_0402_5% DDR_A_DQS6 DQS6_c DM6_n/DBI6_n +1.2V_DDR
221 222
DQS6_t VSS79 DDR_A_D51
id
2 223 224
2
DDR_A_D53 225 VSS80 DQ54 226

227 DQ55 VSS81 228 DDR_A_D49
DDR_A_D55 229 VSS82 DQ50 230
231 DQ51 VSS83 232 DDR_A_D61
DDR_A_D56 233 VSS84 DQ60 234
f
235 DQ61 VSS85 236 DDR_A_D57
DDR_A_D60 237 VSS86 DQ57 238
239 DQ56 VSS87 240 DDR_A_DQS#7
241 VSS88 DQS7_c 242 DDR_A_DQS7
+1.2V_DDR +1.2V_DDR DM7_n/DBI7_n DQS7_t
n
+V_DDR_REFA_R 243 244
247 DQ62 DQ63 248
VSS91 VSS92
1
DDR_A_D62 249 250 DDR_A_D63

RH206 251 DQ58 DQ59 252
W=20mils
o
1K_0402_1%~D PCH_SMBCLK 253 VSS93 VSS94 254 PCH_SMBDATA
<15,18,33,38> PCH_SMBCLK 255 SCL SDA 256 DIMM_CHA_SA0 PCH_SMBDATA <15,18,33,38>
+3VS VDDSPD SA0
257 258
+2.5V_MEM +0.6VS
2
259 VPP1 VTT 260 DIMM_CHA_SA1

RH484 1 2 2_0402_1% +V_DDR_REFA 261 VPP2 SA1 262
GND1 GND2
C
1
1
A A
CH101 RH209
0.022U_0402_25V7K 1K_0402_1%~D
2
1
CONN@ DEREN_40-42271-26001RHF
2
RH211
24.9_0402_1%
2

DDR4 DIMMA,RVS
5 4 3 2 1
5 4 3 2 1
+1.2V_DDR JDIMM2
4H , STD
<8> DDR_B_D[0..63] +1.2V_DDR
<8> DDR_B_MA[0..13] 1 2
<8> DDR_B_DQS#[0..7] DDR_B_D0 3 VSS1 VSS2 4 DDR_B_D5
<8> DDR_B_DQS[0..7] 5 DQ5 DQ4 6
Layout Note: Layout Note: DDR_B_D4 VSS3 VSS4 DDR_B_D1
7 8
Place near JDIMM2.258 Place near JDIMM2.257,259 9 DQ1 DQ0 10
DDR_B_DQS#0 11 VSS5 VSS6 12
DDR_B_DQS0 13 DQS0_c DM0_n/DBI0_n 14
y
15 DQS0_t VSS7 16 DDR_B_D2
DDR_B_D6 17 VSS8 DQ6 18
DQ7 VSS9 DDR_B_D7
l
19 20
+0.6VS +2.5V_MEM 23 DQ3 VSS11 24 DDR_B_D8
DDR_B_D10 25 VSS12 DQ12 26
D 27 DQ13 VSS13 28 DDR_B_D9 D
n
31 DQ9 VSS15 32 DDR_B_DQS#1
VSS16 DQS1_c DDR_B_DQS1
1U_0402_6.3V6K~D
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
Layout Note: 33 34
35 DM1_n/DBI_n DQS1_t 36
1 1 1 1 1 1 1 1 Place near JDIMM2.255 DDR_B_D12 VSS17 VSS18 DDR_B_D15
CD32
CD30
CD31
37 38
DQ15 DQ14
CD90
CD89
CD88
CD27
CD28
39 40
DDR_B_D13 VSS19 VSS20 DDR_B_D11
O
41 42
2 2 2 2 2 2 2 2 43 DQ10 DQ11 44
DDR_B_D16 45 VSS21 VSS22 46 DDR_B_D22
47 DQ21 DQ20 48
+3VS 51 DQ17 DQ16 52
r
DDR_B_D19 59 VSS28 DQ22 60
e
DQ23 VSS29 DDR_B_D20
0.1U_0402_16V7K~D
2.2U_0603_6.3V6K~D
61 62
DDR_B_D23 63 VSS30 DQ18 64
1 1 DQ19 VSS31 DDR_B_D27
CD34
CD35
65 66
DDR_B_D25 67 VSS32 DQ28 68
DQ29 VSS33 DDR_B_D30
b
69 70
2 2 DDR_B_D28 71 VSS34 DQ24 72
75 VSS36 DQS3_c 76 DDR_B_DQS3
Layout Note: DM3_n/DBI3_n DQS3_t
77 78
Place near JDIMM2 DDR_B_D26 79 VSS37 VSS38 80 DDR_B_D29
81 DQ30 DQ31 82
m
83 84
85 DQ26 DQ27 86
87 VSS41 VSS42 88
89 CB5/NC CB4/NC 90
VSS43 VSS44
e
91 92
93 CB1/NC CB0/NC 94
95 VSS45 VSS46 96
+1.2V_DDR 97 DQS8_c DM8_n/DBI_n/NC 98
99 DQS8_t VSS47 100
101 VSS48 CB6/NC 102
103 CB2/NC VSS49 104
VSS50 CB7/NC
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
m
105 106
C 107 CB3/NC VSS51 108 DDR4_DRAMRST# C
1 1 1 1 1 1 1 1 DDR_CKE2_DIMMB VSS52 RESET_n DDR_CKE3_DIMMB DDR4_DRAMRST# <14>
CD19
CD20
CD21
CD22
CD83
CD81
CD80
CD82
109 110
<8> DDR_CKE2_DIMMB 111 CKE0 CKE1 112 DDR_CKE3_DIMMB <8>
DDR_B_BG1 113 VDD1 VDD2 114
2 2 2 2 2 2 2 2 <8> DDR_B_BG1 DDR_B_BG0 BG1 ACT_n DDR_B_ALERT# DDR_B_ACT# <8> 1
115 116 CD92
<8> DDR_B_BG0 117 BG0 ALERT_n 118 DDR_B_ALERT# <8>
0.1U_0402_16V7K~D
DDR_B_MA12 119 VDD3 VDD4 120 DDR_B_MA11 @ESD@
DDR_B_MA9 A12 A11 DDR_B_MA7 2
T
121 122
123 A9 A7 124
DDR_B_MA8 125 VDD5 VDD6 126 DDR_B_MA5
DDR_B_MA6 A8 A5 DDR_B_MA4
I
127 128
129 A6 A4 130
+1.2V_DDR DDR_B_MA3 131 VDD7 VDD8 132 DDR_B_MA2
DDR_B_MA1 133 A3 A2 134
135 A1 EVENT_n/NF 136
M_CLK_DDR2 137 VDD9 VDD10 138 M_CLK_DDR3
<8> M_CLK_DDR2 M_CLK_DDR#2 CK0_t CK1_t/NF M_CLK_DDR#3 M_CLK_DDR3 <8>
C
139 140
<8> M_CLK_DDR#2 CK0_c CK1_c/NF M_CLK_DDR#3 <8>
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
141 142
DDR_B_PAR 143 VDD11 VDD12 144 DDR_B_MA0
1 <8> DDR_B_PAR DDR_B_BS1 PARITY A0 DDR_B_MA10
1 1 1 1 1 1 1 1 145 146
+ <8> DDR_B_BS1 147 BA1 A10/AP 148
CD33
DDR_CS2_DIMMB# VDD13 VDD14 DDR_B_BS0
CD23
CD24
CD25
CD26
CD87
CD85
CD84
CD86
220U_D7_2VM_R6M 149 150
r
<8> DDR_CS2_DIMMB# DDR_B_WE# 151 CS0_n BA0 152 DDR_B_RAS# DDR_B_BS0 <8>
2 2 2 2 2 2 2 2 2 <8> DDR_B_WE# 153 WE_n/A14 RAS_n/A16 154 DDR_B_RAS# <8>
M_ODT2 155 VDD15 VDD16 156 DDR_B_CAS#
<8> M_ODT2 DDR_CS3_DIMMB# 157 ODT0 CAS_n/A15 158 DDR_B_MA13 DDR_B_CAS# <8>
<8> DDR_CS3_DIMMB# CS1_n A13
o
159 160
M_ODT3 161 VDD17 VDD18 162
<8> M_ODT3 163 ODT1 C0/CS2_n/NC 164 +V_DDR_REFB
165 VDD19 VREFCA 166 DIMM_CHB_SA2
167 C1, CS3_n,NC SA2 168
0.1U_0402_16V7K~D
169 170
171 DQ37 DQ36 172
DDR_B_D39 VSS55 VSS56 DDR_B_D34 1
CD29
173 174
175 DQ33 DQ32 176
+1.2V_DDR
l
DDR_B_DQS4 179 DQS4_c DM4_n/DBI4_n 180 2
DDR_B_D33 183 VSS60 DQ39 184
185 DQ38 VSS61 186 DDR_B_D37
a
B DDR_B_D32 187 VSS62 DQ35 188 B
189 DQ34 VSS63 190 DDR_B_D44
DDR_B_D40 191 VSS64 DQ45 192
i
193 DQ44 VSS65 194 DDR_B_D45
DDR_B_D41 195 VSS66 DQ41 196
t
+3VS +3VS +3VS +1.2V_DDR 201 DM5_n/DBI5_n DQS5_t 202
205 DQ46 DQ47 206
n
209 DQ42 DQ43 210
VSS73 VSS74
1
DDR_B_D52 211 212 DDR_B_D54

RD4 RD5 RD6 213 DQ52 DQ53 214
e
@ @ DDR_B_D51 215 VSS75 VSS76 216 DDR_B_D48
0_0402_5% 0_0402_5% 0_0402_5% DQ49 DQ48
217 218
+1.2V_DDR
2

DIMM_CHB_SA0 DIMM_CHB_SA1 DIMM_CHB_SA2 DQS6_t VSS79 DDR_B_D53
id
223 224
DDR_B_D50 225 VSS80 DQ54 226
227 DQ55 VSS81 228 DDR_B_D49
VSS82 DQ50
1
DDR_B_D55 229 230

RD38 RD39 RD40 231 DQ51 VSS83 232 DDR_B_D59
@ DDR_B_D61 233 VSS84 DQ60 234
f
0_0402_5% 0_0402_5% 0_0402_5% DQ61 VSS85 DDR_B_D57
235 236
DDR_B_D62 237 VSS86 DQ57 238
2

+1.2V_DDR DM7_n/DBI7_n DQS7_t
n
243 244
247 DQ62 DQ63 248
+V_DDR_REFB_R DDR_B_D60 249 VSS91 VSS92 250 DDR_B_D58
+1.2V_DDR 251 DQ58 DQ59 252
o
PCH_SMBCLK 253 VSS93 VSS94 254 PCH_SMBDATA
<14,18,33,38> PCH_SMBCLK 255 SCL SDA 256 DIMM_CHB_SA0 PCH_SMBDATA <14,18,33,38>
+3VS VDDSPD SA0
1
257 258
+2.5V_MEM VPP1 VTT DIMM_CHB_SA1 +0.6VS
RH207 259 260
W=20mils 1K_0402_1%~D 261 VPP2
GND1
SA1
GND2
262
C
2
A A
RH485 1 2 2_0402_1% +V_DDR_REFB
1
1 CONN@ DEREN_40-42261-26001RHF
RH210
CH100 1K_0402_1%~D
0.022U_0402_25V7K
2
2
1
RH212
24.9_0402_1% Security Classification Compal Secret Data Compal Electronics, Inc.
2
DDR4 DIMMB,STD
5 4 3 2 1
5 4 3 2 1
UH1
S IC GLCM236 SR2CE D1 FCBGA 837P PCH-H

SA00009601L
PCHR1@
UH1
D
S IC GLCM236 SR2CE D1 FCBGA PCH-H A31!
SA00009602L
PCHR3@
UH1
AV2
AV3
AW2
UH1C
CL_CLK
CL_DATA
CL_RST#
CLINK
SPT-H_PCH
PCIE9_RXN/SATA0A_RXN
PCIE9_RXP/SATA0A_RXP
PCIE9_TXN/SATA0A_TXN
PCIE9_TXP/SATA0A_TXP
G31
H31
C31
B31
PCIE_PRX_DTX_N9
PCIE_PRX_DTX_P9
PCIE_PTX_DRX_N9
PCIE_PTX_DRX_P9
PCIE_PRX_DTX_N9
PCIE_PRX_DTX_P9
PCIE_PTX_DRX_N9
PCIE_PTX_DRX_P9
<29>
<29>
<29>
<29>
n l y D
MP
.
2I
Se
SS
DA
ST
l
o
t
#
3
R44
O
R43 GPP_G8/FAN_PWM_0
GPP_G9/FAN_PWM_1 PCIE_PRX_DTX_N10
C
/
A
U39 G29
GPP_G10/FAN_PWM_2 PCIE10_RXN/SATA1A_RXN PCIE_PRX_DTX_P10 PCIE_PRX_DTX_N10 <29>
S IC A31 GLSSKU QJGE D1 FCBGA 837P PCH-H N42 E29
GPP_G11/FAN_PWM_3 PCIE10_RXP/SATA1A_RXP PCIE_PTX_DRX_N10 PCIE_PRX_DTX_P10 <29>
SA00008RM1L C32
U43 FAN PCIE10_TXN/SATA1A_TXN B32 PCIE_PTX_DRX_P10 PCIE_PTX_DRX_N10 <29>
PCHES@
r
GPP_G0/FAN_TACH_0 PCIE10_TXP/SATA1A_TXP PCIE_PTX_DRX_P10 <29>
U42
GPP_G1/FAN_TACH_1 SATA_PRX_DTX_N2
MS
.
2T
SA
S
D
S
l
o
t
#
4
U41 F41
GPP_G2/FAN_TACH_2 PCIE15_RXN/SATA2_RXN SATA_PRX_DTX_P2 SATA_PRX_DTX_N2 <33>
M44 E41
GPP_G3/FAN_TACH_3 PCIE15_RXP/SATA2_RXP SATA_PTX_DRX_N2 SATA_PRX_DTX_P2 <33>
A
U36 B39
e
P44 GPP_G4/FAN_TACH_4 PCIE15_TXN/SATA2_TXN A39 SATA_PTX_DRX_P2 SATA_PTX_DRX_N2 <33>
GPP_G5/FAN_TACH_5 PCIE15_TXP/SATA2_TXP SATA_PTX_DRX_P2 <33>
T45
T44 GPP_G6/FAN_TACH_6 D43 SATA_PRX_DTX_N3
SATA_PRX_DTX_N3 <33>
PCIe/SATA
GPP_G7/FAN_TACH_7 PCIE16_RXN/SATA3_RXN SATA_PRX_DTX_P3
Mo
.
2S
SA
ST
DA
SH
l
oD
#D
t
5
E42
MP
.
2I
Se
SS
DA
ST
l
o
t
#
3
b
PCIE_PTX_DRX_P11 PCIE16_RXP/SATA3_RXP SATA_PTX_DRX_N3 SATA_PRX_DTX_P3 <33>
B33 A41
<29> PCIE_PTX_DRX_P11 PCIE_PTX_DRX_N11 PCIE11_TXP PCIE16_TXN/SATA3_TXN SATA_PTX_DRX_P3 SATA_PTX_DRX_N3 <33>
r
C33 A40
C
/
<29> PCIE_PTX_DRX_N11 PCIE_PRX_DTX_P11 PCIE11_TXN PCIE16_TXP/SATA3_TXP SATA_PTX_DRX_P3 <33>

K31
<29> PCIE_PRX_DTX_P11 PCIE_PRX_DTX_N11 L31 PCIE11_RXP H42 PCIE_PRX_DTX_N17
<29> PCIE_PRX_DTX_N11 PCIE11_RXN PCIE17_RXN/SATA4_RXN PCIE_PRX_DTX_P17 PCIE_PRX_DTX_N17 <29>
H40
PCIE17_RXP/SATA4_RXP PCIE_PTX_DRX_N17 PCIE_PRX_DTX_P17 <29>
AB33 E45
GPP_F10/SCLOCK PCIE17_TXN/SATA4_TXN PCIE_PTX_DRX_P17 PCIE_PTX_DRX_N17 <29>
MP
.
2I
Se
SS
DA
ST
l
o
t
#
2
AB35 F45
m
GPP_F11/SLOAD PCIE17_TXP/SATA4_TXP PCIE_PTX_DRX_P17 <29>
AA44
GPP_F13/SDATAOUT0 PCIE_PRX_DTX_N18
C
/
A
AA45 K37
GPP_F12/SDATAOUT1 PCIE18_RXN/SATA5_RXN PCIE_PRX_DTX_P18 PCIE_PRX_DTX_N18 <29>
G37
PCIE_PTX_DRX_N14 PCIE18_RXP/SATA5_RXP PCIE_PTX_DRX_N18 PCIE_PRX_DTX_P18 <29>
e
B38 G45
<29> PCIE_PTX_DRX_N14 PCIE_PTX_DRX_P14 C38 PCIE14_TXN/SATA1B_TXN PCIE18_TXN/SATA5_TXN G44 PCIE_PTX_DRX_P18 PCIE_PTX_DRX_N18 <29>
<29> PCIE_PTX_DRX_P14 PCIE_PRX_DTX_N14 PCIE14_TXP/SATA1B_TXP PCIE18_TXP/SATA5_TXP PCIE_PTX_DRX_P18 <29>
D39
<29> PCIE_PRX_DTX_N14 PCIE_PRX_DTX_P14 PCIE14_RXN/SATA1B_RXN PCH_SATADET#
MP
.
2I
Se
SS
DA
ST
l
o
t
#
1
E37 AD44
<29> PCIE_PRX_DTX_P14 PCIE14_RXP/SATA1B_RXP GPP_E8/SATALED# SATA_GP0 PCH_SATADET# <33>
AG36
PCIE_PTX_DRX_N13 GPP_E0/SATAXPCIE0/SATAGP0 SATA_GP1 SATA_GP0 <29>
C
/
C36 AG35
<29> PCIE_PTX_DRX_N13 PCIE_PTX_DRX_P13 B36 PCIE13_TXN/SATA0B_TXN GPP_E1/SATAXPCIE1/SATAGP1 AG39 SATA_GP2 SATA_GP1 <29>
<29> PCIE_PTX_DRX_P13 PCIE13_TXP/SATA0B_TXP GPP_E2/SATAXPCIE2/SATAGP2 SATA_GP2 <33>
m
C
PCIE_PRX_DTX_N13 G35 AD35 SATA_GP3 +3VS C
<29> PCIE_PRX_DTX_N13 PCIE_PRX_DTX_P13 E35 PCIE13_RXN/SATA0B_RXN GPP_F0/SATAXPCIE3/SATAGP3 AD31 SATA_GP4 SATA_GP3 <33>
<29> PCIE_PRX_DTX_P13 PCIE13_RXP/SATA0B_RXP GPP_F1/SATAXPCIE4/SATAGP4 SATA_GP4 <29>
AD38
PCIE_PTX_DRX_P12 GPP_F2/SATAXPCIE5/SATAGP5
MP
.
2I
Se
SS
DA
ST
l
o
t
#
3
A35 AC43
<29> PCIE_PTX_DRX_P12 PCIE_PTX_DRX_N12 B35 PCIE12_TXP GPP_F3/SATAXPCIE6/SATAGP6 AB44 PCH_SATADET# 1 2
<29> PCIE_PTX_DRX_N12 PCIE_PRX_DTX_P12 PCIE12_TXN GPP_F4/SATAXPCIE7/SATAGP7
C
/
H33 RH512 10K_0402_5%

<29> PCIE_PRX_DTX_P12 PCIE_PRX_DTX_N12 G33 PCIE12_RXP W36 IGPU_INV_PWM
<29> PCIE_PRX_DTX_N12 PCIE_PTX_DRX_P20 PCIE12_RXN GPP_F21/EDP_BKLTCTL IGPU_ENBKL IGPU_INV_PWM <24>
J45 W35
T
<29> PCIE_PTX_DRX_P20 PCIE_PTX_DRX_N20 PCIE20_TXP/SATA7_TXP GPP_F20/EDP_BKLTEN IGPU_ENVDD IGPU_ENBKL <24>
K44 W42
<29> PCIE_PTX_DRX_N20 PCIE_PRX_DTX_P20 N38 PCIE20_TXN/SATA7_TXN GPP_F19/EDP_VDDEN IGPU_ENVDD <24>
MP
.
2I
Se
SS
DA
ST
l
o
t
#
2
<29> PCIE_PRX_DTX_P20 PCIE_PRX_DTX_N20 PCIE20_RXP/SATA7_RXP H_THERMTRIP#_R H_THERMTRIP#
I
N39 HOST AJ3 RH79 1 2 620_0402_5%
<29> PCIE_PRX_DTX_N20 PCIE_PTX_DRX_P19 H44 PCIE20_RXN/SATA7_RXN THERMTRIP# AL3 PCH_PECI H_THERMTRIP# <9>
RH73 1 2 12.1_0402_1%
C
/
<29> PCIE_PTX_DRX_P19 PCIE_PTX_DRX_N19 PCIE19_TXP/SATA6_TXP PECI H_PM_SYNC_R H_PECI <9,43>

H43 AJ4
<29> PCIE_PTX_DRX_N19 PCIE_PRX_DTX_P19 PCIE19_TXN/SATA6_TXN PM_SYNC PLTRST_CPU# H_PM_SYNC_R <9>
L39 AK2
<29> PCIE_PRX_DTX_P19 PCIE_PRX_DTX_N19 L37 PCIE19_RXP/SATA6_RXP PLTRST_PROC# AH2 H_PM_DOWN PLTRST_CPU# <9>
<29> PCIE_PRX_DTX_N19 PCIE19_RXN/SATA6_RXN PM_DOWN H_PM_DOWN <9>
C
SKL-H-PCH_BGA837 3 OF 12 REV = 1.3
@
UH1E
o r
SPT-H_PCH
F
AW4 BB3
<56> CPU_DDI1HPD GPP_I0/DDPB_HPD0 GPP_I7/DDPC_CTRLCLK CPU_DDC2CLK <56>
AY2 BD6
<56> CPU_DDI2HPD GPP_I1/DDPC_HPD1 GPP_I8/DDPC_CTRLDATA CPU_DDC2DATA <56>
AV4 BA5
GPP_I2/DDPD_HPD2 GPP_I5/DDPB_CTRLCLK CPU_DDC1CLK <56>
BA4 BC4
l
GPP_I3/DDPE_HPD3 GPP_I6/DDPB_CTRLDATA CPU_DDC1DATA <56>
BE5
GPP_I9/DDPD_CTRLCLK BE6
RH656 GPP_I10/DDPD_CTRLDATA
B B
a
0_0201_5% Y44
1 2 BD7 GPP_F14 V44 PROC_DETECT# <9>
<24> EDP_HPD_CPU GPP_I4/EDP_HPD GPP_F23 W39
i
1 @ 2 GPP_F22 L43
<24,25,46> EDP_HPD GPP_G23 STRAP3_PCH <51>
L44
1
GPP_G22 STRAP5_PCH <51>
t
RH657 U35
0_0201_5% RH9 GPP_G21 R35
100K_0402_5% GPP_G20 BD36
GPP_H23
n
2
+3VS
@
SKL eDP_HPD pull down 100K
id e 2
1
RH584
10K_0402_5%
DET <25>
f
2
RH585
10K_0402_5%
n
@
1

A
PCH (1/7) SATA,DDC,PCIE
5 4 3 2 1
5 4 3 2 1
PCH_RTCX1
RH70
SPT-H_PCH
UH1G 10M_0402_5%
1 2 PCH_RTCX2
AR17 L1 PCH_XDP_CLK_N T49 PAD~D TP@
GPP_A16/CLKOUT_48 CLKOUT_ITPXDP_N L2 PCH_XDP_CLK_P T50 PAD~D TP@
G1 CLKOUT_ITPXDP_P J1 YH1
y
<9> CPU_24MHZ_P CLKOUT_CPUNSSC_P CLKOUT_CPUPCIBCLK_N PCH_CPU_PCIBCLK_N <9>
F1 J2 32.768KHZ_X1A000141000300
<9> CPU_24MHZ_N CLKOUT_CPUNSSC_N CLKOUT_CPUPCIBCLK_P PCH_CPU_PCIBCLK_P <9>
l
G2 1 2
<9> PCH_CPU_BCLK_P CLKOUT_CPUBCLK_P CLK_PEG_GPU#
H2 N7
<9> PCH_CPU_BCLK_N CLKOUT_CPUBCLK_N CLKOUT_PCIE_N0 CLK_PEG_GPU CLK_PEG_GPU# <46>
P
E
G
N8
XTAL24_OUT CLKOUT_PCIE_P0 CLK_PEG_GPU <46>
A5 1 1
D +1V_PCH XTAL24_IN A6 XTAL24_OUT L7 CLK_PCIE_N1 CH45 CH46
D
n
XTAL24_IN CLKOUT_PCIE_N1 CLK_PCIE_P1 CLK_PCIE_N1 <29>
S
S
D
1
L5 8.2P_0402_50V 8.2P_0402_50V
RH71 1 XCLK_BIASREF E1 CLKOUT_PCIE_P1 CLK_PCIE_P1 <29>
2 2.7K_0402_1%
XCLK_BIASREF D3 CLK_PCIE_N2 2 2
PCH_RTCX1 CLKOUT_PCIE_N2 CLK_PCIE_P2 CLK_PCIE_N2 <29>
S
S
D
2
BC9 F2
+3VS PCH_RTCX2 BD10 RTCX1 CLKOUT_PCIE_P2 CLK_PCIE_P2 <29>
RP3 RTCX2 E5 CLK_PCIE_N3
O
CLKREQ#_GPU CLKOUT_PCIE_N3 CLK_PCIE_P3 CLK_PCIE_N3 <56>
T
B
T
4 5 BC24 G4
CLKREQ_PCIE#1 <46> CLKREQ#_GPU GPP_B5/SRCCLKREQ0# CLKOUT_PCIE_P3 CLK_PCIE_P3 <56>
0
.
P
E
G
3 6 AW24
2 7 CLKREQ_PCIE#2
CLKREQ_PCIE#4
<29>
<29>
CLKREQ_PCIE#1
CLKREQ_PCIE#2
AT24 GPP_B6/SRCCLKREQ1#
GPP_B7/SRCCLKREQ2# CLKOUT_PCIE_N4
D5 CLK_PCIE_N4
CLK_PCIE_P4 CLK_PCIE_N4 <30> RTC CRYSTAL
1
.
S
S
D
1
L
A
N
1 8 BD25 E6
<56> CLKREQ_PCIE#3 BB24 GPP_B8/SRCCLKREQ3# CLKOUT_PCIE_P4 CLK_PCIE_P4 <30>
Max Crystal ESR
r
<30> CLKREQ_PCIE#4 GPP_B9/SRCCLKREQ4# CLK_PCIE_N5
2
.
S
S
D
2
10K_0804_8P4R_5% BE25 D8
+3VS <28> CLKREQ_PCIE#5 GPP_B10/SRCCLKREQ5# CLKOUT_PCIE_N5 CLK_PCIE_P5 CLK_PCIE_N5 <28>
W
L
A
N
AT33 D7
<41,43> CLKREQ#_DGPU GPP_H0/SRCCLKREQ6# CLKOUT_PCIE_P5 CLK_PCIE_P5 <28>
3
.
T
B
T
4
RP5
5 CLKREQ#_DGPU <29> CLKREQ_PCIE#7
AR31
BD32 GPP_H1/SRCCLKREQ7# R8 CLK_PCIE_N6 = 50k Ohm.
e
CLKREQ_PCIE#5 <46> GPU_GC6_FB_EN_R GPP_H2/SRCCLKREQ8# CLKOUT_PCIE_N6 CLK_PCIE_P6 CLK_PCIE_N6 <41>
4
.
L
A
N
C
a
l
d
e
r
a
3 6 BC32 R7
FFS_INT2 GPP_H3/SRCCLKREQ9# CLKOUT_PCIE_P6 CLK_PCIE_P6 <41>
2 7 BB31
FFS_INT1 GPP_H4/SRCCLKREQ10# CLK_PCIE_N7
5
.
W
L
A
N
1 8 BC33 U5
GPP_H5/SRCCLKREQ11# CLKOUT_PCIE_N7 CLK_PCIE_P7 CLK_PCIE_N7 <29>
S
S
D
3
BA33 U7
b
GPP_H6/SRCCLKREQ12# CLKOUT_PCIE_P7 CLK_PCIE_P7 <29>
6
.
C
a
l
d
e
r
a
10K_0804_8P4R_5% AW33
BB33 GPP_H7/SRCCLKREQ13# W10
GPP_H8/SRCCLKREQ14# CLKOUT_PCIE_N8
7
.
S
S
D
3
BD33 W11 XTAL24_IN
GPP_H9/SRCCLKREQ15# CLKOUT_PCIE_P8
R13 N3
R11 CLKOUT_PCIE_N15 CLKOUT_PCIE_N9 N2 RH72
CLKOUT_PCIE_P15 CLKOUT_PCIE_P9 1M_0402_5%~D
m
P1 P3 1 2 XTAL24_OUT
R2 CLKOUT_PCIE_N14 CLKOUT_PCIE_N10 P2
CLKOUT_PCIE_P14 CLKOUT_PCIE_P10
e
W7 R3 YH2
Y5 CLKOUT_PCIE_N13 CLKOUT_PCIE_N11 R4 24MHZ_12PF_7V24000020
CLKOUT_PCIE_P13 CLKOUT_PCIE_P11
U2 1 3
U3 CLKOUT_PCIE_N12 2 4
CLKOUT_PCIE_P12 1 1
SKL-H-PCH_BGA837 7 OF 12 REV = 1.3 CH47 CH48
m
C @ 15P_0402_50V 15P_0402_50V C
2 2
BD17
UH1A
GPP_A11/PME#
SPT-H_PCH
GPP_B13/PLTRST#
I BB27 PCH_PLTRST#
T PCH_PLTRST# <41,46>
+3VS
1
CH201
C
AG15 0.1U_0201_6.3V6K
AG14 RSVD P43 TBT_FORCE_PWR
RSVD GPP_G16/GSXCLK TBT_FORCE_PWR <56> 2
AF17 R39
AE17 RSVD GPP_G12/GSXDOUT R36
RSVD GPP_G13/GSXSLOAD R42 UH3
r
GPP_G14/GSXDIN
5
AR19 R41 TC7SH08FU_SSOP5
RH1 close to UH4 AN17 TP2 GPP_G15/GSXSRESET# PCH_PLTRST# 1
P
TP1 B 4
1 2 1K_0402_1% PCH_SPI_SI_R BB29 AF41 2 Y PCIRST# <28,29,30,43,56>
RH1
<6> XDP_SPI_SI SPI0_MOSI GPP_E3/CPU_GP0 A
1
G
PCH_SPI_SO_R
o
BE30 AE44
PCH_SPI_CS# BD31 SPI0_MISO GPP_E7/CPU_GP1 BC23 RH199
3
PCH_SPI_CLK_R BC31 SPI0_CS0# GPP_B3/CPU_GP2 BD24 100K_0402_5%
AW31 SPI0_CLK GPP_B4/CPU_GP3 +RTC_CELL
+3V_PCH SPI0_CS1# BC36
2
GPP_H18/SML4ALERT#
F
PCH_SPI_WP#_R BC29 BE34
<6> PCH_SPI_WP#_R PCH_SPI_HOLD#_R BD30 SPI0_IO2 GPP_H17/SML4DATA BD39
SPI0_IO3 GPP_H16/SML4CLK
2
RH74 1 @ 2 3.3K_0402_5% PCH_SPI_CS# AT31 BB36
AN36 SPI0_CS2# GPP_H15/SML3ALERT# BA35 RH531
RH75 1 2 1K_0402_5% PCH_SPI_WP#_R AL39 GPP_D1/SPI1_CLK GPP_H14/SML3DATA BC35
l
GPP_D0/SPI1_CS# GPP_H13/SML3CLK 1M_0402_5%
FFS_INT2 AN41 BD35
<33> FFS_INT2 FFS_INT1 AN38 GPP_D3/SPI1_MOSI GPP_H12/SML2ALERT# AW35
<33> FFS_INT1
1
RH78 1 2 1K_0402_5% PCH_SPI_HOLD#_R AH43 GPP_D2/SPI1_MISO GPP_H11/SML2DATA BD34
B GPP_D22/SPI1_IO3 GPP_H10/SML2CLK B
a
AG44 BE11 INTRUDER#
RH455 1 @ 2 1K_0402_5% PCH_SPI_HOLD#_R GPP_D21/SPI1_IO2 INTRUDER#
i
SKL-H-PCH_BGA837 1 OF 12 REV = 1.3 +3V_PCH
t
@
SPI ROM FOR ME ( 16MByte ) 1
n
PCH_SPI_HOLD#
PCH_SPI_SO
4
RPH5
5 PCH_SPI_HOLD#_R
PCH_SPI_SO_R
PN: SA00005VV10 2
CH49
0.1U_0402_16V7K
3 6
PCH_SPI_SI PCH_SPI_SI_R
e
2 7 UH4
PCH_SPI_WP# PCH_SPI_WP#_R PCH_SPI_SI_R <9> PCH_SPI_CS#
1 8 1 8
PCH_SPI_SO 2 /CS VCC 7 PCH_SPI_HOLD#
15_0804_8P4R_5% PCH_SPI_WP# 3 DO(IO1) /HOLD(IO3) 6 PCH_SPI_CLK
4 /WP(IO2) CLK 5 PCH_SPI_SI
id
PCH_SPI_CLK 1 2 PCH_SPI_CLK_R GND DI(IO0)
RH104 EMI@ 15_0402_1% W25Q128FVSIQ_SO8
nf
A

A
PCH (2/7) CLK,SPI,PLTRST
5 4 3 2 1
5 4 3 2 1
+3VALW
y
WAKE# RH453 1 2 10K_0402_5%
l
PCH_BATLOW# RH515 1 2 8.2K_0402_5%
RP2 AC_PRESENT RH533 1 2 8.2K_0402_5%

D
1 8 PCH_AZ_SDOUT D
n
<31> PCH_AZ_CODEC_SDOUT 2 7 PCH_AZ_SYNC WAKE_PCH# RH545 1 2 10K_0402_5%
<31> PCH_AZ_CODEC_SYNC PCH_AZ_RST#
3 6
<31> PCH_AZ_CODEC_RST# 4 5 PCH_AZ_BITCLK
<31> PCH_AZ_CODEC_BITCLK
33_0804_8P4R_5% +3V_PCH
O
UH1D SPT-H_PCH ME_SUS_PWR_ACK RH506 1 @ 2 1M_0402_5%
SYS_RESET# RH571 1 @ 2 8.2K_0402_5%
PCH_AZ_BITCLK BA9 BB17
r
PCH_AZ_RST# BD8 HDA_BCLK GPP_A12/BMBUSY#/ISH_GP6/SX_EXIT_HOLDOFF# AW22 CLKRUN#
BE7 HDA_RST# GPP_A8/CLKRUN# +3VS
<31> PCH_AZ_CODEC_SDIN0 HDA_SDI0
BC8 AR15
HDA_SDI1 GPD11/LANPHYPC
e
RH16 1 2 1K_0402_1% PCH_AZ_SDOUT BB7 AV13 CLKRUN# RH85 1 2 8.2K_0402_5%
<43> ME_EN PCH_AZ_SYNC HDA_SDO GPD9/SLP_WLAN#
BD9
HDA_SYNC BC14
DRAM_RESET# H_DRAMRST# <14>
BD1 BD23
b
BE2 RSVD_BD1 GPP_B2/VRALERT# AL27
RSVD_BE2 GPP_B1 AR27
RH39 1 2 30_0402_5% CPU_DISPA_SDO_R AM1 AUDIO GPP_B0 N44
<7> CPU_DISPA_SDO AN2 DISPA_SDO GPP_G17/ADR_COMPLETE AN24
<7> CPU_DISPA_SDI CPU_DISPA_BCLK_R DISPA_SDI GPP_B11
RH38 1 2 30_0402_5% AM2 AY1
<7> CPU_DISPA_BCLK DISPA_BCLK SYS_PWROK SYS_PWROK <43>
AL42 BC13 WAKE# RH4 2 1 0_0402_5%
m
GPP_D8/I2S0_SCLK WAKE# @ PCIE_WAKE# <30,43>
AN42 BC15
AM43 GPP_D7/I2S0_RXD GPD6/SLP_A# AV15
AJ33 GPP_D6/I2S0_TXD SLP_LAN# BC26
GPP_D5/I2S0_SFRM GPP_B12/SLP_S0#
e
AH44 AW15
AJ35 GPP_D20/DMIC_DATA0 GPD4/SLP_S3# BD15 PM_SLP_S3# <37,43,45>
GPP_D19/DMIC_CLK0 GPD5/SLP_S4# PM_SLP_S4# <43,45>
AJ38 BA13
AJ42 GPP_D18/DMIC_DATA1 GPD10/SLP_S5# PM_SLP_S5# <37,43>
GPP_D17/DMIC_CLK1 AN15
GPD8/SUSCLK PCH_BATLOW# SUSCLK <29>
BD13
GPD0/BATLOW# BB19 PCH_BATLOW# <56>
GPP_A15/SUSACK# SUSACK# <43>
m
C
PCH_RTCRST# BC10 BD19 ME_SUS_PWR_ACK C
PCH_SRTCRST# BB10 RTCRST# GPP_A13/SUSWARN#/SUSPWRDNACK ME_SUS_PWR_ACK <43>
SRTCRST#
AW11 BD11 WAKE_PCH#
<43> PCH_PWROK EC_RSMRST# BA11 PCH_PWROK GPD2/LAN_WAKE# BB15 AC_PRESENT 2 1 DH1
<43> EC_RSMRST# RSMRST# GPD1/ACPRESENT VCIN1_AC_IN <43,62>
BB13 RB751V-40_SOD323-2
PCH_DPWROK AV11 SLP_SUS# AT13 PM_SLP_SUS# <43>
<43> PCH_DPWROK DSW_PWROK GPD3/PWRBTN# SYS_RESET# PBTN_OUT# <9,43>
BB41 AW1
T
PCH_SMBCLK GPP_C2/SMBALERT# SYS_RESET# SYS_RESET# <9>
AW44 BD26
SMBUS
PCH to DDR, XDP, FFS <14,15,33,38>
<14,15,33,38>
PCH_SMBCLK
PCH_SMBDATA
PCH_SMBDATA BB43 GPP_C0/SMBCLK
GPP_C1/SMBDATA
GPP_B14/SPKR
PROCPWRGD
AM3 HDA_SPKR
H_CPUPWRGD
<31>
<9>
I
BA40
SML0CLK AY44 GPP_C5/SML0ALERT# AT2
<24,41> SML0CLK GPP_C3/SML0CLK ITP_PMODE XDP_ITP_PMODE <6>
SML0DATA BB39 AR3
<24,41> SML0DATA GPP_C4/SML0DATA JTAGX PCH_JTAG_TCK <6,9>
AT27 JTAG AR2
AW42 GPP_B23/SML1ALERT#/PCHHOT# JTAG_TMS AP1 XDP_TMS <6,9>
SML1CLK
GPP_C6/SML1CLK JTAG_TDO XDP_TDO <9>
SML1DATA AW45 AP2
XDP_TDI <6,9>
C
+RTC_CELL GPP_C7/SML1DATA JTAG_TDI AN3
JTAG_TCK XDP_TCK <6>
RH83 1 2 20K_0402_5%~D PCH_SRTCRST#
1 @
r
CH52
1U_0603_10V6K~D
+RTC_CELL
RH84 1 2 20K_0402_5%~D PCH_RTCRST#

PCH_RTCRST# <43>
Fo
l
1
1
CH53
1U_0603_10V6K~D
CLRP1
SHORT PADS CLRP1 in DIMM door
2
B 2 B
t ia
n
+3VS
e
+3V_PCH
2
id
RH460 1 2 1K_0402_5% SML1CLK SML1CLK 6 1
EC_SMB_CK2 <41,42,43,46,58>
RH461 1 2 1K_0402_5% SML1DATA QH5A
5
DMN66D0LDW-7
+3VS
f
SML1DATA 3 4
EC_SMB_DA2 <41,42,43,46,58>
RH501 1 2 499_0402_1% SML0CLK QH5B
DMN66D0LDW-7
n
RH502 1 2 499_0402_1% SML0DATA
RH463 1 2 1K_0402_5% PCH_SMBCLK
PCH_SMBDATA
o
RH462 1 2 1K_0402_5%
RH88 1 2 10K_0402_5% EC_RSMRST#
RH90 1 2 100K_0402_5% PCH_DPWROK
C
A A

PCH (3/7) PM,HDA,SMB,JTAG
5 4 3 2 1
5 4 3 2 1
SPT-H_PCH
y
UH1B
DMI_CTX_PRX_N0 USB20_N1
l
L27 AF5
UJ
J
SOa
Br
1grFNhl
et /Bcar1
l
f
ts
s
i
de
e(
(
P/
oB
w)
e
r
S
h
a
r
e
,
D
e
b
u
g
P
o
r
t
)
<7> DMI_CTX_PRX_N0 DMI_CTX_PRX_P0 DMI_RXN0 USB2N_1 USB20_P1 USB20_N1 <35>
N27 AG7
<7> DMI_CTX_PRX_P0 DMI_CRX_PTX_N0 C27 DMI_RXP0 USB2P_1 AD5 USB20_N2 USB20_P1 <35>
ICA
i
h
d L
i
I
O
<7> DMI_CRX_PTX_N0 DMI_CRX_PTX_P0 DMI_TXN0 USB2N_2 USB20_P2 USB20_N2 <35>
B27 AD7
D <7> DMI_CRX_PTX_P0 DMI_CTX_PRX_N1 DMI_TXP0 USB2P_2 USB20_N3 USB20_P2 <35> D
E24 AG8
de
l
e
a
<7> DMI_CTX_PRX_N1 DMI_CTX_PRX_P1 G24 DMI_RXN1 USB2N_3 AG10 USB20_P3 USB20_N3 <41>
<7> DMI_CTX_PRX_P1 DMI_CRX_PTX_N1 DMI_RXP1 USB2P_3 USB20_N4 USB20_P3 <41>
B28 AE1
iLo
l
nAci
X+sc2(
E
C eeho
<7> DMI_CRX_PTX_N1 DMI_CRX_PTX_P1 A28 DMI_TXN1 USB2N_4 AE2 USB20_P4 USB20_N4 <37>
DMI
<7> DMI_CRX_PTX_P1 DMI_CTX_PRX_N2 DMI_TXP1 USB2P_4 USB20_N5 USB20_P4 <37>
G27 AC2
WTDJ
Tr
E26 AC3
<7> DMI_CTX_PRX_P2 DMI_CRX_PTX_N2 B29 DMI_RXP2 USB2P_5 AF2 USB20_N6 USB20_P5 <28>
ui
emi
nrtn
O
<7> DMI_CRX_PTX_N2 DMI_CRX_PTX_P2 DMI_TXN2 USB2N_6 USB20_P6 USB20_N6 <25>
C29 AF3
<7> DMI_CRX_PTX_P2 DMI_CTX_PRX_N3 L29 DMI_TXP2 USB2P_6 AB3 USB20_N7 USB20_P6 <25>
gSo
aCi
t
asl
K29 USB 2.0 AB2
<7> DMI_CTX_PRX_P3 DMI_CRX_PTX_N3 DMI_RXP3 USB2P_7 USB20_N8 USB20_P7 <25>
B30 AL8
UT
Bb
g"
d)
i
e
(
T
y
p
e
C
)
<7> DMI_CRX_PTX_N3 DMI_CRX_PTX_P3 A30 DMI_TXN3 USB2N_8 AL7 USB20_P8 USB20_N8 <36>
r
<7> DMI_CRX_PTX_P3 DMI_TXP3 USB2P_8 USB20_N9 USB20_P8 <36>
AA1
i
7
y
1 2 100_0402_1% B18 USB2N_9 AA2 USB20_P9 USB20_N9 <34>
RH193 PCIECOMP#
PCIE_RCOMPN USB2P_9 USB20_P9 <34>
PCIECOMP C17 AJ8
PCIE_RCOMPP USB2N_10 AJ7
e
USB2P_10 W2
H15 USB2N_11 W3
G15 PCIE1_RXN/USB3_7_RXN USB2P_11 AD3
A16 PCIE1_RXP/USB3_7_RXP USB2N_12 AD2
PCIe/USB 3
b
B16 PCIE1_TXN/USB3_7_TXN USB2P_12 V2
B19 PCIE1_TXP/USB3_7_TXP USB2N_13 V1
C19 PCIE2_TXN/USB3_8_TXN USB2P_13 AJ11
E17 PCIE2_TXP/USB3_8_TXP USB2N_14 AJ13
G17 PCIE2_RXN/USB3_8_RXN USB2P_14
L17 PCIE2_RXP/USB3_8_RXP
K17 PCIE3_RXN/USB3_9_RXN +3V_PCH
m
B20 PCIE3_RXP/USB3_9_RXP AD43 USB_OC0#
C20 PCIE3_TXN/USB3_9_TXN GPP_E9/USB2_OC0# AD42 USB_OC1# USB_OC0# <35> 10K_8P4R_5%
PCIE3_TXP/USB3_9_TXP GPP_E10/USB2_OC1# USB_OC2# USB_OC1# <35> USB_OC0#
E20 AD39 4 5
PCIE4_RXN/USB3_10_RXN GPP_E11/USB2_OC2# USB_OC3# USB_OC1#
e
G19 AC44 3 6
B21 PCIE4_RXP/USB3_10_RXP GPP_E12/USB2_OC3# Y43 USB_OC3# 2 7
A21 PCIE4_TXN/USB3_10_TXN GPP_F15/USB2_OCB_4 Y41 USB_OC2# 1 8
PCIE_PRX_DTX_N5 K19 PCIE4_TXP/USB3_10_TXP GPP_F16/USB2_OCB_5 W44
<30> PCIE_PRX_DTX_N5 PCIE_PRX_DTX_P5 PCIE5_RXN GPP_F17/USB2_OCB_6 RPH6
L L
A A
N N
L19 W43
<30> PCIE_PRX_DTX_P5 PCIE_PTX_DRX_N5 PCIE5_RXP GPP_F18/USB2_OCB_7
D22
<30> PCIE_PTX_DRX_N5 PCIE_PTX_DRX_P5 C22 PCIE5_TXN
<30> PCIE_PTX_DRX_P5 PCIE5_TXP
m
C
PCIE_PRX_DTX_N6 G22 AG3 USB2_COMP RH109 1 2 113_0402_1% C
<28> PCIE_PRX_DTX_N6 PCIE_PRX_DTX_P6 PCIE6_RXN USB2_COMP
W
E22 AD10 RH580 1 2 1K_0402_5%

<28> PCIE_PRX_DTX_P6 PCIE_PTX_DRX_N6 PCIE6_RXP USB2_VBUSSENSE
B22 AB13
<28> PCIE_PTX_DRX_N6 PCIE_PTX_DRX_P6 PCIE6_TXN RSVD_AB13
A23 AG2 RH581 1 2 1K_0402_5%
<28> PCIE_PTX_DRX_P6 L22 PCIE6_TXP USB2_ID
K22 PCIE7_RXN
C23 PCIE7_RXP
B23 PCIE7_TXN BD14
T
K24 PCIE7_TXP GPD7/RSVD
L24 PCIE8_RXN
PCIE8_RXP
I
C24
B24 PCIE8_TXN
PCIE8_TXP
USB2_COMP
@ 50ohm single-ended and as short as possible
C
Spacing=15 mils
Max length= 1000 mils
o r
<35> USB3TN1
C11
UH1F
USB3_1_TXN
SPT-H_PCH
l F
J
U
S
B
1
B11 AT22
LPC/eSPI
<35> USB3TP1 USB3_1_TXP GPP_A1/LAD0/ESPI_IO0 LPC_AD0 <43>

B7 AV22
B <35> USB3RN1 USB3_1_RXN GPP_A2/LAD1/ESPI_IO1 LPC_AD1 <43> +3VS B
a
A7 AT19
<35> USB3RP1 USB3_1_RXP GPP_A3/LAD2/ESPI_IO2 BD16 LPC_AD2 <43>
GPP_A4/LAD3/ESPI_IO3 LPC_AD3 <43>
B12 SERIRQ RH111 1 2 10K_0402_5%~D
i
<36> USB3TN2 USB3_2_TXN/SSIC_1_TXN LPC_FRAME#
J
U
S
B
C
2
A12 BE16
<36> USB3TP2 USB3_2_TXP/SSIC_1_TXP GPP_A5/LFRAME#/ESPI_CS0# LPC_FRAME# <43> KB_RST#
C8 BA17 SERIRQ RH518 1 2 10K_0402_5%~D
<36> USB3RN2 USB3_2_RXN/SSIC_1_RXN GPP_A6/SERIRQ/ESPI_CS1# SERIRQ <43>
t
B8 AW17
<36> USB3RP2 USB3_2_RXP/SSIC_1_RXP GPP_A7/PIRQA#/ESPI_ALERT0# AT17 KB_RST#
GPP_A0/RCIN#/ESPI_ALERT1# KB_RST# <43>
B15 BC18
C15 USB3_6_TXN GPP_A14/SUS_STAT#/ESPI_RESET#
K15 USB3_6_TXP
n
USB3_6_RXN
USB
K13 BC17 RH89 2 1 22_0402_5%

USB3_6_RXP GPP_A9/CLKOUT_LPC0/ESPI_CLK AV19 CLK_PCI_LPC <43>
B14 GPP_A10/CLKOUT_LPC1
<36> USB3TN5 USB3_5_TXN
e
J
U
S
B
C
2
C14 M45
<36> USB3TP5 USB3_5_TXP GPP_G19/SMI#
G13 N43
<36> USB3RN5 USB3_5_RXN GPP_G18/NMI#
H13
<36> USB3RP5 USB3_5_RXP
C
a
l
d
e
r
a
D13 AE45
id
<41> USB3TP3 C13 USB3_3_TXP/SSIC_2_TXP GPP_E6/DEVSLP2 AG43 DEVSLP2 <33>
<41> USB3TN3 USB3_3_TXN/SSIC_2_TXN GPP_E5/DEVSLP1 DEVSLP1 <29>
A9 AG42
<41> USB3RP3 USB3_3_RXP/SSIC_2_RXP GPP_E4/DEVSLP0 DEVSLP0 <29>
B10 AB39
<41> USB3RN3 USB3_3_RXN/SSIC_2_RXN GPP_F9/DEVSLP7 AB36
SATA
GPP_F8/DEVSLP6
J
I
O
B13 AB43
f
<35> USB3TP4 A14 USB3_4_TXP GPP_F7/DEVSLP5 AB42
<35> USB3TN4 USB3_4_TXN GPP_F6/DEVSLP4 DEVSLP4 <29>
G11 AB41
<35> USB3RP4 USB3_4_RXP GPP_F5/DEVSLP3 DEVSLP3 <33>
E11
<35> USB3RN4 USB3_4_RXN
n
@

A
PCH (4/7) DMI,PCIE,USB,LPC
5 4 3 2 1
5 4 3 2 1
nVidia GPU_ID N17_ID1 N17_ID0 RH25 N17EG3@ RH27 N17EG3@
N17EG3 H H
N17EG2 H L
N17EG1 L H S RES 1/20W 10K +-5% 0201 S RES 1/20W 10K +-5% 0201
SD043100280 SD043100280
N17PG1 L L
RH25 N17EG2@ RH28 N17EG2@
D BOARD_ID
CPU_ID
RH21
RH22
RH23
RH24
1 NV@
1
1
AMD@
1 SKL@
KBL@
2 10K_0201_5%
2 10K_0201_5%
2 10K_0201_5%
2 10K_0201_5%
+3V_PCH
N17_ID1
N17_ID0
RH25
RH26
RH27
RH28
1
1
1
1
@
@
@
@
2 10K_0201_5%
2 10K_0201_5%
2 10K_0201_5%
2 10K_0201_5%
+3V_PCH
S RES 1/20W 10K +-5% 0201
SD043100280
RH26 N17EG1@
n l y S RES 1/20W 10K +-5% 0201

SD043100280
RH27 N17EG1@
D
O
R16M_ID
S RES 1/20W 10K +-5% 0201 S RES 1/20W 10K +-5% 0201
RH29 1R16M80@ 2 10K_0201_5% SD043100280 SD043100280
RH30 1 2 10K_0201_5%
R16M50@ RH26 N17PG1@ RH28 N17PG1@
r
SPT-H_PCH
UH1K
BBS_BIT0 AT29 AL44 BOARD_ID
+3VS AR29 GPP_B22/GSPI1_MOSI GPP_D9 AL36 DGPU_HOLD_RST#
e
EC_SCI# AV29 GPP_B21/GSPI1_MISO GPP_D10 AL35 CPU_ID DGPU_HOLD_RST# <46>
<43> EC_SCI# VROM_SEL GPP_B20/GSPI1_CLK GPP_D11 DGPU_PWR_EN
S RES 1/20W 10K +-5% 0201 S RES 1/20W 10K +-5% 0201
BC27 AJ39 SD043100280 SD043100280
<51> VROM_SEL GPP_B19/GSPI1_CS# GPP_D12 DGPU_PWR_EN <43,49>
RH517 1 @ 2 8.2K_0402_5% BT_OFF# NRB_BIT BD28 AJ43 N17_ID1
b
BD27 GPP_B18/GSPI0_MOSI GPP_D16/ISH_UART0_CTS# AL43 N17_ID0
RH520 1 @ 2 8.2K_0402_5% WL_OFF# AW27 GPP_B17/GSPI0_MISO GPP_D15/ISH_UART0_RTS# AK44
<43,46> GC6_FB_EN GPP_B16/GSPI0_CLK GPP_D14/ISH_UART0_TXD/SML0BCLK/I2C2_SCL R16M_ID +3VS
AR24 AK45
1 2 10K_0402_5% EC_SCI# <46> GC6_EVENT# GPP_B15/GSPI0_CS# GPP_D13/ISH_UART0_RXD/SML0BDATA/I2C2_SDA
RH521
AV44
UART_2_CRXD_DTXD <24,43> EDP_SW GPP_C9/UART0_TXD
RC62 2 1 49.9K_0402_1% BA41
WL_OFF# AU44 GPP_C8/UART0_RXD
m
UART_2_CTXD_DRXD <28> WL_OFF# BT_OFF# GPP_C11/UART0_CTS# DGPU_PWR_EN
RC63 2 1 49.9K_0402_1% AV43 RH537 1 2 10K_0201_5%
<28> BT_OFF# GPP_C10/UART0_RTS# BC38
RC65 2 @ 1 49.9K_0402_1% UART_2_CCTS_DRTS AU41 GPP_H20/ISH_I2C0_SCL BB38
<27> HDMI_HPD_PCH GPP_C15/UART1_CTS#/ISH_UART1_CTS# GPP_H19/ISH_I2C0_SDA
e
AT44
1 2 10K_0402_5% DGPU_PWROK <26> DP_HPD_PCH AT43 GPP_C14/UART1_RTS#/ISH_UART1_RTS# BD38
RH516
AU43 GPP_C13/UART1_TXD/ISH_UART1_TXD GPP_H22/ISH_I2C1_SCL BE39
1 2 10K_0402_5% VROM_SEL <24> EDP_MUX_PD GPP_C12/UART1_RXD/ISH_UART1_RXD GPP_H21/ISH_I2C1_SDA
RH588 @
AN43
<56> TBT_CIO_PLUG_EVENT# UART_2_CCTS_DRTS GPP_C23/UART2_CTS#
AN44
UART_2_CTXD_DRXD AR39 GPP_C22/UART2_RTS# BC22
GPP_C21/UART2_TXD GPP_A23/ISH_GP5
m
C
UART_2_CRXD_DTXD AR45 BD18 C
GPP_C20/UART2_RXD GPP_A22/ISH_GP4 BE21
VROM_SEL GPP_A21/ISH_GP3 XMP2 <64>
RH589 1 @ 2 10K_0402_5% AR41 BD22
<56> RTD3_USB_PWR_EN GPP_C19/I2C1_SCL GPP_A20/ISH_GP2 XMP1 <64>
AR44 BD21
<56> RTD3_CIO_PWR_EN AR38 GPP_C18/I2C1_SDA GPP_A19/ISH_GP1 BB22 CLKDET#
AT42 GPP_C17/I2C0_SCL GPP_A18/ISH_GP0 BC19 DGPU_PRSNT#
AM44 GPP_C16/I2C0_SDA GPP_A17/ISH_GP7 +3V_PCH
DGPU_PWROK AJ44 GPP_D4/ISH_I2C2_SDA/ISH_I2C3_SDA
T
<43> DGPU_PWROK GPP_D23/ISH_I2C2_SCL/ISH_I2C3_SCL
2
RH135
I
SKL-H-PCH_BGA837 11 OF 12 REV = 1.3 10K_0402_5%
@
CLKDET# RH558 1 @ 2 10K_0201_5%
1
+5VALW
r C +3V_PCH
RH130 1 @ 2 4.7K_0402_5%~D
Boot BIOS Strap Bit (internal PD)

BBS_BIT0
o
JWDB
HIGH LPC
1 LOW(DEFAULT) SPI
UART_2_CTXD_DRXD 2 1
2
F
UART_2_CRXD_DTXD 3 5
4 3 G1 6
4 G2
ACES_88266-04001
CONN@
l
+3V_PCH
B NRB_BIT B
a
RH524 1 @ 2 4.7K_0402_5%~D
n t i NO REBOOT mode (internal PD)

HIGH
LOW(DEFAULT)
Enable
Disable
id e
nf
A

A
PCH (5/7) I2C,GPIO
5 4 3 2 1
5 4 3 2 1
+1VALW @ +1V_PCH_PRIM
SPT-H_PCH
UH1H
JP2
+1V_PCH
y
1 2 AA23
AA26 VCCPRIM_1P0 +3VALW
VCCPRIM_1P0
l
PAD-OPEN 43x39 AA28 AL22
VCCPRIM_1P0 VCCPRIM_1P0
CORE
AC23
+1VALW @ +1V_PCH AC26 VCCPRIM_1P0 BA24
AC28 VCCPRIM_1P0 VCCDSW_3P3
JP1 VCCPRIM_1P0
VCCGPIO
D D
+1V_PCH +1V_PCH_PRIM +1V_VCCDSW AE23 BA31
n
1 2 AE26 VCCPRIM_1P0 VCCPGPPA BC42
RH196 Y23 VCCPRIM_1P0 VCCPGPPBCH BD40
PAD-OPEN 43x39 0_0402_5% Y25 VCCPRIM_1P0 VCCPGPPBCH AJ41 +3V_PCH
+1V_MPHY 1 @ 2 BA29 VCCPRIM_1P0 VCCPGPPEF AL41
DCPDSW_1P0 VCCPGPPEF AD41
N17 VCCPGPPG AN5
O
RH12 1 2 0_0805_5% R19 VCCCLK1 VCCPRIM_3P3
U20 VCCCLK3 +1V_PCH
V17 VCCCLK4 AD15
R17 VCCCLK2 VCCPRIM_1P0 AD13
VCCCLK2 VCCATS +3VS
+1V_MPHY BA20
r
K2 VCCRTCPRIM_3P3 BA22
K3 VCCCLK5 VCCRTC BA26 1 2 +RTC_CELL
VCCCLK5 DCPRTC CH70 0.1U_0402_10V7K
U21 AJ20
e
VCCMPHY_1P0 VCCPRIM_1P0 +1V_PCH_PRIM
MPHY
U23 AJ21
U25 VCCMPHY_1P0 VCCPRIM_1P0 AJ23 +3V_PCH
+1V_MPHY U26 VCCMPHY_1P0 VCCPRIM_1P0 AJ25
V26 VCCMPHY_1P0 VCCPRIM_1P0
b
A43 VCCMPHY_1P0 BE41
+1V_PCH B43 VCCMPHYPLL_1P0 VCCSPI BE43
VCCMPHYPLL_1P0 VCCSPI +3V_PCH
RH6 C44 BE42
0_0603_5% C45 VCCPCIE3PLL_1P0 VCCSPI
RF@ VCCPCIE3PLL_1P0 BC44
+3V_PCH 1 2 V28 VCCPGPPD BA45
VCCAPLLEBB_1P0 VCCPGPPD
USB
AC17 BC45
m
+3VALW RH7 AJ5 VCCPRIM_1P0 VCCPGPPD BB45
0_0603_5% AL5 VCCUSB2PLL_1P0 VCCPGPPD +3V_PCH
RF@ AN19 VCCUSB2PLL_1P0 BD3
VCCHDAPLL_1P0 VCCPRIM_3P3
e
1 2 BA15 BE3
VCCHDA VCCPRIM_3P3 BE4
W15 VCCPRIM_3P3
VCCDSW_3P3
1 1 SKL-H-PCH_BGA837 8 OF 12 REV = 1.3
CH4 CH3 @
0.1U_0402_10V7K 0.1U_0402_10V7K
m
C @RF@ @RF@ C
2 2
Close to BA15 < 100mil Close to V28 < 100mil
+1V_VCCDSW +1V_PCH +3V_PCH +3V_PCH +3VS
I T
+3VALW +3V_PCH +3V_PCH
C
0.1U_0402_10V7K
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
CH200
0.1U_0402_10V7K
0.1U_0402_10V7K
0.1U_0402_10V7K
1 1 1 1 1 1 1 1
CH176
CH185
CH188
CH82
CH189
CH190
CH192
r
2 2 2 2 2 2 2 2
Close to BA29 Close to AC17 Close to BA15
Fo
Close to AN5 Close to AD13 Close to W15 Close to AD41 Close to BC42,BD40
+1V_PCH +1V_MPHY +1V_MPHY
ia l +3V_PCH +RTC_CELL +3V_PCH

B
t
22U_0805_6.3V6M~D
22U_0805_6.3V6M~D
1U_0402_6.3V6K~D
22U_0805_6.3V6M~D
22U_0805_6.3V6M~D
1U_0402_6.3V6K~D
22U_0805_6.3V6M~D
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
0.1U_0402_10V7K
0.1U_0402_10V7K
0.1U_0402_10V7K
n
1 1 1 1 1 1 1 1 1 1 1 1 1
CH179
CH180
CH183
CH187
CH80
CH177
CH178
CH181
CH182
CH184
CH186
CH173
CH191
2 2 2 2 2 2 2 2 2 2 2 2 2
Close to K2,K3 Close to A43,B43
id e Close to U21,U23,U25,U26,V26 Close to BA20 Close to BA22 Close to AJ41,AL41
nf
A

A
PCH (6/7) PWR
5 4 3 2 1
5 4 3 2 1
AC18
UH1I
SPT-H_PCH
AR5 C42
UH1L SPT-H_PCH
AB11
n l y D
O
AN4 VSS VSS AR7 D10 VSS VSS AB7
AN10 VSS VSS U15 D12 VSS VSS AB14 UH1J SPT-H_PCH
BE14 VSS VSS AL4 D15 VSS VSS AB31
BE18 VSS VSS AE29 D16 VSS VSS AB32
VSS VSS VSS VSS
r
BE23 AE4 D17 AB38 AR22
BE28 VSS VSS AE42 D19 VSS VSS AB4 BD2 RSVD W13
BE32 VSS VSS AF18 D21 VSS VSS AB5 BD45 VSS RSVD U13
BE37 VSS VSS AF20 D24 VSS VSS AC1 BD44 VSS RSVD
e
BE40 VSS VSS AF21 D25 VSS VSS AC20 BE44 VSS P31
BE9 VSS VSS AF23 D27 VSS VSS AC21 D45 VSS RSVD N31
C10 VSS VSS AF25 D29 VSS VSS AC25 A42 VSS RSVD
VSS VSS VSS VSS VSS
b
C2 AF26 D30 AC29 B45 P27
C28 VSS VSS AF28 D31 VSS VSS AC45 B44 VSS RSVD R27
C37 VSS VSS AF29 D33 VSS VSS AB8 A4 VSS RSVD N29
J7 VSS VSS AG11 D35 VSS VSS AD11 A3 VSS RSVD P29
K10 VSS VSS AG13 D36 VSS VSS AD14 B2 VSS RSVD AN29
K27 VSS VSS AG31 E13 VSS VSS AB15 A2 VSS RSVD R24
m
K33 VSS VSS AG32 E15 VSS VSS AD32 B1 VSS RSVD P24
K36 VSS VSS AG33 E31 VSS VSS AD33 BB1 VSS RSVD
K4 VSS VSS AG38 E33 VSS VSS AD36 BC1 VSS AT3
VSS VSS VSS VSS VSS PREQ# XDP_PREQ# <6,9>
e
K42 AG4 F44 AD4 A44 AT4
K43 VSS VSS AH1 F8 VSS VSS AD8 VSS PRDY# AY5 XDP_PRDY# <6,9>
L12 VSS VSS AH17 G42 VSS VSS AE18 C1 CPU_TRST# AL2 CPU_XDP_TRST# <6,9>
L13 VSS VSS AH18 G9 VSS VSS AE20 D1 RSVD PCH_TRIGOUT AK1 PCH_TRIGGER <10>
L15 VSS VSS AH20 H17 VSS VSS AE21 RSVD PCH_TRIGIN CPU_TRIGGER <10>
L4 VSS VSS AH21 H19 VSS VSS AE25
m
C L41 VSS VSS AH23 H22 VSS VSS AE28 C
L8 VSS VSS AH25 H24 VSS VSS AL10 SKL-H-PCH_BGA837 REV = 1.3
M35 VSS VSS AH26 H27 VSS VSS AL11 @
M42 VSS VSS AH28 H29 VSS VSS AL13
N10 VSS VSS AH29 H3 VSS VSS AL17
N15 VSS VSS AH45 H35 VSS VSS AL19
VSS VSS VSS VSS
T
N19 AJ10 J10 AL24
N22 VSS VSS AJ14 J11 VSS VSS AL29
I
N4 VSS VSS AJ26 T42 VSS VSS AM15
N41 VSS VSS AJ28 U10 VSS VSS AM17
N5 VSS VSS AJ29 U11 VSS VSS AM19
C
P17 VSS VSS AJ31 U14 VSS VSS AM22
P45 VSS VSS AK4 U28 VSS VSS AM29
r
R10 VSS VSS AK42 U29 VSS VSS AM45
R14 VSS VSS AU7 U31 VSS VSS AN11
R22 VSS VSS AV17 U32 VSS VSS AN22
o
T1 VSS VSS AV6 V18 VSS VSS AN8
F
T2 VSS VSS AW13 V20 VSS VSS AP11
T4 VSS VSS AW19 V21 VSS VSS AP4
Y18 VSS VSS AW29 V23 VSS VSS AR33
l
Y26 VSS VSS AY38 V3 VSS VSS AR9
B Y28 VSS VSS AY45 V45 VSS VSS AT10 B
a
Y29 VSS VSS B25 W14 VSS VSS AT15
A18 VSS VSS B3 W31 VSS VSS AT36
i
A25 VSS VSS B37 W32 VSS VSS AT9
A32 VSS VSS B40 W33 VSS VSS AU1
t
A37 VSS VSS B6 W38 VSS VSS AU35
AA17 VSS VSS BA1 W4 VSS VSS AU36
AA18 VSS VSS BB11 W8 VSS VSS AU39
AA20 VSS VSS BB16 Y17 VSS VSS AU45
n
AA21 VSS VSS BB21 VSS VSS C4
AA25 VSS VSS BB25 VSS
AA29 VSS VSS BB30
e
AA4 VSS VSS BB34
AA42 VSS VSS BC2
AB10 VSS VSS BD43
VSS VSS SKL-H-PCH_BGA837 REV = 1.3
id
@
SKL-H-PCH_BGA837 REV = 1.3
@
nf
A
2016/01/06
Compal Secret Data
2017/01/06 Title
A

PCH (7/7) VSS
0.2
5 4 3 2 1
5 4 3 2 1
n l y D
r O
b e
e m
m
C C
I T
r C
Fo
B
ia l B
n t
id e
nf
A
Co A

Reversed
0.2
5 4 3 2 1
5 4 3 2 1
+3VS
2
l
RV21
4.7K_0402_1%
@
D D
I2C Control Enable; Internal pull down at ~150KΩ , 3. 3V I / O.
1
I2C_CTL_EN H: I2C control is selected with default address 0x66/67
M: I2C control is selected with alternat i ve addr ess 0x D8/ D9
1
+3VS
RV22
4.7K_0402_1%
2
RV19
100K_0402_5%
2
+3VS
MUX_EDP_AUXN <25>
MUX_EDP_AUXP <25>
1
Automat i c E Q di sabl e; I nt er nal pull do wn at ~150K Ω, 3. 3V I /O. +3VS
1 1 RV20
L: Automat i c E Q enabl e ( def aul t) CV437 CV436 100K_0402_5%
2
H: Automat i c E Q di sabl e
b
0.1U_0402_16V4Z 0.1U_0402_16V4Z UV21
21 RV623
2
2 2 26 VDD33 4.7K_0402_1%
35 VDD33 @
49 VDD33 32 Auto test enable; Internal pull down at ~150KΩ , 3. 3VI / O.
1
60 VDD33 OUT_AUXp_SCL 31
VDD33 OUT_AUXn_SDA PI0 L: Auto test disable & input of fset cancell at i on enabl e ( def ault )
IN2_PEQ# H: Auto test enable & input of fset cancell at i on enabl
m
RV632 1 @ 2 0_0402_5% 51
<18,41> SML0CLK IN2_PEQ/SCL_CTL
1
1 2 IN1_PEQ# 52 53 I2C_CTL_EN
<18,41> SML0DATA
RV633 @ 0_0402_5%
IN1_PEQ/SDA_CTL I2C_CTL_EN M: Auto test disable & input of fset cancell at i on di s abl
RV634 1 2 4.7K_0402_1% 59 RV622
RV635 1 2 4.7K_0402_1% 58 IN1_AEQ# 4.7K_0402_1%
+3VS IN2_AEQ#
e
56 PI0 @
PI0 38 PC0
2
0.1U_0201_6.3V6K 2 1 CV416 GPU_TX0P_C 1 PC0 55 PC1
<47> GPU_TX0P 2 1 GPU_TX0N_C 2 IN1_D0p PC1
0.1U_0201_6.3V6K CV417
<47> GPU_TX0N 2 1 GPU_TX1P_C 4 IN1_D0n
0.1U_0201_6.3V6K CV418 RV23
<47> GPU_TX1P 2 1 GPU_TX1N_C 5 IN1_D1p
0.1U_0201_6.3V6K CV419 1M_0402_5%
<47> GPU_TX1N 2 1 GPU_TX2P_C 6 IN1_D1n 48 2 1
0.1U_0201_6.3V6K CV420
<47> GPU_TX2P GPU_TX2N_C IN1_D2p CA_DET
G
P
U
m
C 0.1U_0201_6.3V6K 2 1 CV421 7 C
<47> GPU_TX2N 2 1 GPU_TX3P_C 9 IN1_D2n
0.1U_0201_6.3V6K CV422
<47> GPU_TX3P 2 1 GPU_TX3N_C 10 IN1_D3p 46
0.1U_0201_6.3V6K CV423
<47> GPU_TX3N IN1_D3n OUT_D0p 45 MUX_EDP_A0P <25>
2 1 CV424 GPU_AUXP/DDC_C 28 OUT_D0n 43 MUX_EDP_A0N <25>
0.1U_0201_6.3V6K
<47> GPU_AUXP/DDC GPU_AUXN/DDC_C IN1_AUXp OUT_D1p MUX_EDP_A1P <25>
T
o
e
D
P
c
o
n
n
e
c
t
o
r
0.1U_0201_6.3V6K 2 1 CV425 27 42
<47> GPU_AUXN/DDC 23 IN1_AUXn OUT_D1n 40 MUX_EDP_A1N <25>
2 NV@ 1 RV669 22 IN1_SCL OUT2_D2p 39 MUX_EDP_A2P <25>
100K_0201_1%
IN1_SDA OUT2_D2n MUX_EDP_A2N <25>
T
100K_0201_1% 2 NV@ 1 RV670 37
OUT_D3p 36 MUX_EDP_A3P <25>
2 1 CPU_EDP_P0_C 11 OUT_D3n MUX_EDP_A3N <25>
0.1U_0201_6.3V6K CV426
<7> CPU_EDP_TX0P CPU_EDP_N0_C IN2_D0p
I
0.1U_0201_6.3V6K 2 1 CV427 12
<7> CPU_EDP_TX0N 2 1 CPU_EDP_P1_C 14 IN2_D0n 54 EDP_SW
0.1U_0201_6.3V6K CV428
<7> CPU_EDP_TX1P 2 1 CPU_EDP_N1_C 15 IN2_D1p SW
0.1U_0201_6.3V6K CV429
<7> CPU_EDP_TX1N 2 1 CPU_EDP_P2_C 16 IN2_D1n 44
0.1U_0201_6.3V6K CV430
<7> CPU_EDP_TX2P CPU_EDP_N2_C IN2_D2p OUT_HPD EDP_HPD <16,25,46>
C
P
U
0.1U_0201_6.3V6K 2 1 CV431 17
<7> CPU_EDP_TX2N 2 1 CPU_EDP_P3_C 19 IN2_D2n
0.1U_0201_6.3V6K CV432
<7> CPU_EDP_TX3P CPU_EDP_N3_C IN2_D3p
C
0.1U_0201_6.3V6K 2 1 CV433 20
<7> CPU_EDP_TX3N IN2_D3n 34
0.1U_0201_6.3V6K 2 1 CV434 CPU_EDP_AUX_C 30 REXT 47
<7> CPU_EDP_AUX
0.1U_0201_6.3V6K 2 1 CV435 CPU_EDP_AUX#_C 29 IN2_AUXp CEXT Port switching control conf i gur at i on; Inter nal pul l d ow
+3VS
<7> CPU_EDP_AUX# 25 IN2_AUXn at ~150KΩ , 3. 3V I / O.
IN2_SCL
1
24 8 L: Input Port1 is selected (default)
r
IN2_SDA GND 1
18 CV438 RV24 H: Input Port2 is selected
GND
2
33 2.2U_0402_6.3V6M 4.99K_0402_1%
RV629 3 GND 41
<46> EDP_HPD_GPU 13 IN1_HPD GND 57 2
4.7K_0402_1%
2
<16> EDP_HPD_CPU IN2_HPD GND
o
61
Epad 50
1
PD
IN1_PEQ# PS8331BQFN60GTR-A2 QFN
SA000060U10
Mount RV628,RV630 for vendor's recommend
F
+3VS
1
RV628 M : LLEQ @01/11 +3VS
2
4.7K_0402_1%
RV625
l 2
4.7K_0402_1%
2
RV25 @
Programmable input equalizat i on l evel s; I nt er nal pull do wn at ~150K Ω, 3. 3V I /O
.
10K_0402_5% AUX intercept i on di sabl e f or Port y ( y = 1, 2). I nt er nal pull do wn at ~150K Ω, 3. 3V I /O;
L: default, LEQ, compensate channel loss up to 11.5dB @ HBR2
1
B B
@
L: AUX intercept i on enabl e, dri ver c onf i gur at i on i s set by l i nk tr ai ni ng (defaut)l
a
H: HEQ, compensate channel loss up to 14.5dB @ HBR2 +3VS PC0
1
+3VS M: LLEQ, compensate channel loss up to 8.5dB @ HBR2 H: AUX intercept i on di sabl e, dri ver out put wit h f i xed 80 0mV and 0d
1
M: AUX intercept i on di sabl e, dri ver out put wit h f i xed 40 0mV and 0d
i 2
RV624
2
RV658 4.7K_0402_1%
t
2
RV631 10K_0402_5% @
4.7K_0402_1% RV26 @
2
499_0402_1%
1
1
D
@
1
n
1
IN2_PEQ# +5VS EDP_MUX_PD <20>

G
1 S
3
CV439 QV95
1
1U_0402_6.3V6K SSM3K7002FU_SC70-3~D
e
1
RV630 CV484 @ @
4.7K_0402_1% 0.1U_0402_16V4Z +3VS 2
UV22
2 16
2
Vcc
2
id
4 +3VS
2 1A 7 INV_PWM <25>
RV659
<46> DGPU_INV_PWM 3 1B1 2A 9 ENVDD <25>
<16> IGPU_INV_PWM 1B2 3A ENBKL <43> 10K_0402_5%
2
5 12
<46> DGPU_ENVDD 6 2B1 4A RV627
1
<16> IGPU_ENVDD 11 2B2 15 4.7K_0402_1%
f
<46> DGPU_ENBKL 10 3B1 OE# 1 EDP_SW @
<16> IGPU_ENBKL 14 3B2 S EDP_SW <20,43>
Output swing adjustment for Port y (y = 1, 2). Internal pull down at ~150KΩ , 3. 3V I / O;
1
13 4B1 8
4B2 GND PC1 L: default
H: +20%
n
SN74CBT3257CPWR_TSSOP16
1
M: -16.7%
RV626
4.7K_0402_1%
@
Co S1
L
H
X
OE
L
L
H
output
A=B1
A=B2
function
DGPU
IGPU
2
Compal Secret Data Compal Electronics, Inc.

A
eDP MUX PS8331B
5 4 3 2 1
A B C D E
LCD power control
y
F
o
r
1
7
"
S
h
a
r
p
p
a
n
e
l
l
+3VALW +LCDVDD
1 UV17 1
n
W=60 mils 5
IN OUT
1 W=60 mils
eDP connector
10P_0402_50V8J
4.7U_0805_10V4Z
0.1U_0402_10V7K
4.7U_0805_10V4Z
10P_0402_50V8J
1 2
GND
1
CV372
@RF@
CV5
1 1
1
CV9
CV10
CV373
@RF@
4 3 1 2
+3VS
O
EN OC JEDP
2
2 SY6288C20AAC_SOT23-5 RV45 0.1U_0201_6.3V6K 2 1 CV1 EDP_TX0_C 1

<24> MUX_EDP_A0P
2
10K_0402_5% 2 2 0.1U_0201_6.3V6K 2 1 CV2 EDP_TX0#_C 2 1
<24> MUX_EDP_A0N 3 2
EDP_TX1_C 3
r
0.1U_0201_6.3V6K 2 1 CV3 4
<24> MUX_EDP_A1P 2 1 CV4 EDP_TX1#_C 5 4
0.1U_0201_6.3V6K
<24> MUX_EDP_A1N 6 5
<24> ENVDD 2 1 CV8 EDP_TX2_C 7 6
0.1U_0201_6.3V6K
e
<24> MUX_EDP_A2P EDP_TX2#_C 7
F
r
o
m
e
D
P
M
U
X
0.1U_0201_6.3V6K 2 1 CV6 8
<24> MUX_EDP_A2N 8
2
9
RV600 0.1U_0201_6.3V6K 2 1 CV7 EDP_TX3_C 10 9
<24> MUX_EDP_A3P 1 CV11 EDP_TX3#_C 10
b
100K_0201_5% 0.1U_0201_6.3V6K 2 11
<24> MUX_EDP_A3N 12 11
0.1U_0201_6.3V6K 2 1 CV12 EDP_AUX_C 13 12
<24> MUX_EDP_AUXP
1
0.1U_0201_6.3V6K 2 1 CV13 EDP_AUX#_C 14 13

<24> MUX_EDP_AUXN 15 14
16 15
m
<16,24,46> EDP_HPD USB20_N6 17 16
USB20_P6 18 17
USB20_CAM_N7_R 19 18
USB20_CAM_P7_R 19
e
20
G-SYNC# 21 20
<46> G-SYNC# MIC_DATA 21
LV2 22
4 3 USB20_CAM_P7_R <31> MIC_DATA MIC_CLK 23 22
<19> USB20_P7 <31> MIC_CLK 24 23
+3VS_CAM 24
25
W=60 mils
m
2 1 2 USB20_CAM_N7_R 26 25 2
<19> USB20_N7 +LCDVDD 26
27
27
1
MCM1012B900F06BP_4P DET 28
<16> DET 29 28
EMI@ RV13
29
3
2
0_0402_5% 30
DV4 @EMI@ 31 30
3
<43> LCD_TEST 31
T
AZC199-02SPR7G_SOT23-3 32
+3VS_CAM
2
@ESD@ 33 32
+VDD_TOUCH TS_EN 33
1
34
I
<43> TS_EN DISPOFF# 35 34
1
35
1
CV374 INV_PWM 36
<24> INV_PWM 37 36
10P_0402_50V8J
@RF@ 38 37
2
38
1
39
C
<19> USB20_N6
USB20_N6 RV8
100K_0201_5% +INV_PWR_SRC W=60 mils 40 39
40
1
USB20_P6 CV375 41
<19> USB20_P6 42 GND
10P_0402_50V8J
2
@RF@ 43 GND
2
GND
2
44
GND
ACES_50473-0400M-P01
o
DV2 CONN@
PESD5V0U2BT_SOT23-3
@ESD@
2 1 DISPOFF#
F
<43> BKOFF#
1
DV1
1
RB751V-40_SOD323-2 RV1
10K_0201_5%
2
3 3
a Touch screen panel power IR camera pindef i ne :
i
LCD backlight power control IR_LED+
t
+3VS +VDD_TOUCH IR_LED+
+LCDVDD
B+
IR_LED+/NC
n
+INV_PWR_SRC
IR_LED-/DET , connect to PCH GPIO
10U_0603_6.3V6M
0.1U_0402_10V7K
1 @ 2
1 1 IR_LED-
CV17
CV18
1 RV81 1
6 W=60 mils CV21 0_0402_5% CV19 IR_LED-
5 4.7U_0805_10V4Z 0.1U_0402_10V7K
2 2 2 Diglog_loop , connect to PCH GPIO
id
W=60 mils 4 1 2 2
DGND
S
1
1000P_0402_50V7K
CV15
100K_0402_5%
RV9
CV14
D+
1
0.1U_0603_25V7K
G
1
Place close to JEDP
f
QV1
D-
Camera power
3
SI3457CDV-T1-GE3_TSOP6 2
2 USB3V3
n
2
+3VS +3VS_CAM
MIC_SIG
PWR_SRC_ON MIC_CLK
o
DGND
1
RV12 1 @ 2
100K_0402_5%
RV47
C
4 0_0402_5% 4
2
D
1
2 QV2
<43> EN_INVPWR
G 2N7002W-T/R7_SOT323-3
S
3
eDP/Camera/TS
0.2
A B C D E
A B C D E
1
+5VS +3VS
<47> GPU_mDP_P0
mDP_HPD
DP_CBL_DET
CV26 1 2 0.1U_0201_6.3V6K mDP_LANE_P0_C
1
2
3
JDP
GND
HOT_PLUG
LANE0_P
n l y 1
2.2K_0201_5%
2.2K_0201_5%
CV23 4
<46> DP_CBL_DET CONFIG1
1
0.1U_0201_6.3V6K CV27 1 2 0.1U_0201_6.3V6K mDP_LANE_N0_C 5
<47> GPU_mDP_N0 DISP_CEC LANE0_N
RV671
RV672
RV16 RV18 1 2 5.1M_0402_5% 6
2 7 CONFIG2
100K_0201_5%
O
8 GND
UV3 CV28 1 2 0.1U_0201_6.3V6K mDP_LANE_P1_C 9 GND
<47> GPU_mDP_P1
2
16 CV29 1 2 0.1U_0201_6.3V6K mDP_LANE_P3_C 10 LANE1_P
Vcc 4 DISP_CLK_AUXP_CONN <47> GPU_mDP_P3 1 2 mDP_LANE_N1_C 11 LANE3_P
CV30 0.1U_0201_6.3V6K
GPU_DPC_AUX 0.1U_0201_6.3V6K DP_AUXP_C 1A DISP_DAT_AUXN_CONN <47> GPU_mDP_N1 mDP_LANE_N3_C LANE1_N
r
2 1 CV24 2 7 CV31 1 2 0.1U_0201_6.3V6K 12
mDP_AUX_SCL 3 1B1 2A 9 <47> GPU_mDP_N3 13 LANE3_N
GPU_DPC_AUX# 0.1U_0201_6.3V6K 2 1 CV25 DP_AUXN_C 5 1B2 3A 12 14 GND
2B1 4A GND
2
mDP_AUX#_SDA 6 CV32 1 2 0.1U_0201_6.3V6K mDP_LANE_P2_C 15 21
e
11 2B2 15 <47> GPU_mDP_P2 DISP_CLK_AUXP_CONN 16 LANE2_P GND1 22
RV15
10 3B1 OE# 1 DP_CBL_DET CV33 1 2 0.1U_0201_6.3V6K mDP_LANE_N2_C 17 AUX_CH_P GND2 23
3B2 S 100K_0201_5% <47> GPU_mDP_N2 LANE2_N GND3
14 DISP_DAT_AUXN_CONN 18 24
4B1 AUX_CH_N GND4
1
b
13 8 19
1
4B2 GND RV17 20 GND
SN74CBT3257CPWR_TSSOP16 1M_0201_1% DP_PWR
+3VS +3VS_DP ACON_MAR2F-20K1800
CONN@
2
m
1 2
10U_0402_6.3V6M
0.1U_0201_6.3V6K
FV2
e
1.1A_6V_SPR-P110 1 1
CV34
CV35
2 2
m
2 2
I T
mDP_AUX_SCL
mDP_AUX#_SDA
r C +3VS
o
QX2
S TR METR3904W-G NPN SOT323-3
1
C
+1V8_AON 2 1 2 mDP_HPD
F
B
E RX2
3
150K_0402_5% 1
<20> DP_HPD_PCH
1
l
RX5 CX1
1
10K_0402_5% +1.8VS 0.1U_0402_16V7K
3 CV20 RX4 2 3
a
1 2 100K_0402_5%
2
i
<46> DP_HPD_GPU#
0.1U_0402_16V7K
2
3
5
2 1 GPU_DPC_AUX
t
<47> mDP_AUX_SCL
RV619 0_0402_5% QV97B
VCC
DMN53D0LDW-7 2N SOT363-6 1
5 4 IN B
OUT Y 2 DGPU_PEX_RST#
GND
2 1 GPU_DPC_AUX# IN A DGPU_PEX_RST# <27,46>
<47> mDP_AUX#_SDA
4
RV618 0_0402_5%
UX1
e
3
NL17SZ08DFT2G_SC70-5
1
id
RV664 RV665
100K_0402_5% 100K_0402_5%
2
nf
4
2016/01/06
Compal Secret Data
2017/01/06 Title
4

Mini DP
0.2
A B C D E
5 4 3 2 1
Reserve LV3,LV4,LV5,LV6 co-lay with EMI solut i on @01/ 12

1 EMI@ 2 TMDS_L_TXCN 1 2 TMDS_R_TXCN
RV641 5.6_0402_1%
LV3 @EMI@ 6.04 +-1% 0402
2
2 1 TMDS_C_TXCN 1 2 RV673
<47> TMDS_TXCN
CV1057 0.1U_0201_6.3V6K RV500
l
150_0402_1%
2 1 TMDS_C_TXCP 4 3 +5VS +HDMI_5V_OUT
<47> TMDS_TXCP EMI@
CV1058 0.1U_0201_6.3V6K 6.04 +-1% 0402
1
D HCM1012GH900BP_4P RV674 FV3 D
TMDS_L_TXCP TMDS_R_TXCP
n
1 EMI@ 2 1 2 1 2
RV640 5.6_0402_1%
10U_0603_6.3V6M~D
0.1U_0201_6.3V6K
1.1A_6V_SPR-P110
TMDS_L_TX0N TMDS_R_TX0N 1 1
CV1068
CV1069
1 EMI@ 2 1 2
RV643 5.6_0402_1%
O
LV4 @EMI@ 6.04 +-1% 0402
2
2 1 TMDS_C_TX0N 1 2 RV27 2 2
<47> TMDS_TX0N
CV1060 0.1U_0201_6.3V6K RV501
150_0402_1%
2 1 TMDS_C_TX0P 4 3
<47> TMDS_TX0P EMI@
r
CV1059 0.1U_0201_6.3V6K 6.04 +-1% 0402
1
HCM1012GH900BP_4P RV28
1 EMI@ 2 TMDS_L_TX0P 1 2 TMDS_R_TX0P
RV646 5.6_0402_1% +3V3_SYS
1
1 EMI@ 2 TMDS_L_TX1N 1 2 TMDS_R_TX1N W=60 mils RV655
RV642 5.6_0402_1% @ 10K_0402_5%
b
LV5 @EMI@ 6.04 +-1% 0402
2
2 1 TMDS_C_TX1N 1 2 RV29 JHDMI
<47> TMDS_TX1N
2
CV1062 0.1U_0201_6.3V6K RV502 HDMI_HPLUG 19
18 HP_DET
150_0402_1% +5V
2 1 TMDS_C_TX1P 4 3 17
<47> TMDS_TX1P EMI@ TMDS_CTRLDAT_R DDC/CEC_GND
CV1061 0.1U_0201_6.3V6K 6.04 +-1% 0402 16
1
HCM1012GH900BP_4P RV30 TMDS_CTRLCLK_R 15 SDA
m
1 EMI@ 2 TMDS_L_TX1P 1 2 TMDS_R_TX1P 14 SCL
RV639 5.6_0402_1% 13 Reserved
TMDS_R_TXCN 12 CEC 20
11 CK- GND 21
e
TMDS_R_TXCP 10 CK_shield GND 22
1 EMI@ 2 TMDS_L_TX2N 1 2 TMDS_R_TX2N TMDS_R_TX0N 9 CK+ GND 23
RV645 5.6_0402_1% 8 D0- GND
LV6 @EMI@ 6.04 +-1% 0402 TMDS_R_TX0P 7 D0_shield
D0+
2
2 1 TMDS_C_TX2N 1 2 RV33 TMDS_R_TX1N 6
<47> TMDS_TX2N 5 D1-
CV1064 0.1U_0201_6.3V6K RV503
m
TMDS_R_TX1P 4 D1_shield
C 150_0402_1% D1+ C
2 1 TMDS_C_TX2P 4 3 TMDS_R_TX2N 3
<47> TMDS_TX2P EMI@ D2-
CV1063 0.1U_0201_6.3V6K 6.04 +-1% 0402 2
1
HCM1012GH900BP_4P RV34 TMDS_R_TX2P 1 D2_shield
1 EMI@ 2 TMDS_L_TX2P 1 2 TMDS_R_TX2P D2+
RV638 5.6_0402_1% ACON_HMRA3-AK1L0C
CONN@
TMDS_C_TX0N
TMDS_C_TX0P
TMDS_C_TXCN
RX31
RX32
RX33
1
1
1
2
2
2
499_0201_1%
499_0201_1%
499_0201_1%
LX1
LX2
LX3
I 1
1
1
2
2
2
T
PBY100505T-601Y-N_2P
PBY100505T-601Y-N_2P
PBY100505T-601Y-N_2P
C
TMDS_C_TXCP RX34 1 2 499_0201_1% LX4 1 2 PBY100505T-601Y-N_2P
TMDS_C_TX1N RX35 1 2 499_0201_1% LX5 1 2 PBY100505T-601Y-N_2P
r
TMDS_C_TX1P RX36 1 2 499_0201_1% LX6 1 2 PBY100505T-601Y-N_2P
TMDS_C_TX2N RX37 1 2 499_0201_1% LX7 1 2 PBY100505T-601Y-N_2P
TMDS_C_TX2P RX38 1 2 499_0201_1% LX8 1 2 PBY100505T-601Y-N_2P
Fo +3V3_SYS HDMI_Down
1
D
2 QX1
G BSS138-G_SOT23-3
1
+HDMI_5V_OUT S
3
RX1
DGPU_PEX_RST# 100K_0402_5%
SDM10U45-7_SOD523-2
SDM10U45-7_SOD523-2
a
B B
2
i
2
+1V8_AON
DV12
DV13
t
1
n
10K_0402_5%
10K_0402_5%
1
1
RV652
2
RV648
2K_0402_5%
2K_0402_5%
+3VS
e
RV649
RV653
QX3
S TR METR3904W-G NPN SOT323-3
2
1
C
1
+1V8_AON 2 1 2 HDMI_HPLUG
id
5
B
E RX6
3
HDMI_CTRLCLK 4 3 TMDS_SCLF 2 1 TMDS_CTRLCLK_R 150K_0402_5%
<47> HDMI_CTRLCLK <20> HDMI_HPD_PCH 1
1
QV96B RV651 RX7 CX2
f
To GPU
2
1
DMN53D0LDW-7 2N SOT363-6 33_0402_1% 10K_0402_5% +1.8VS 0.1U_0402_16V7K
CV1056 RX8 2
HDMI_CTRLDAT 1 6 TMDS_SDAF 2 1 TMDS_CTRLDAT_R 1 2 100K_0402_5%
<47> HDMI_CTRLDAT
2
n
<46> HDMI_HPD_GPU#
QV96A RV650 0.1U_0402_16V7K
2
6
5
DMN53D0LDW-7 2N SOT363-6 33_0402_1%
QV97A
VCC
DMN53D0LDW-7 2N SOT363-6 1
IN B
o
2 4
OUT Y 2 DGPU_PEX_RST#
GND
IN A DGPU_PEX_RST# <26,46>
1
UX2
3
NL17SZ08DFT2G_SC70-5
C
A A

HDMI
0.2
5 4 3 2 1
5 4 3 2 1
n l y D
M.2 2230 slot(type E)

r O
USB20_P5
1
3
JWLAN
GND 3.3VAUX
2
4
+3VS
b e
m
<19> USB20_P5 USB20_N5 5 USB_D+ 3.3VAUX 6
<19> USB20_N5 7 USB_D- LED1# 8
9 GND PCM_CLK 10
11 SIDO_CLK PCM_SYNC 12
e
13 SDIO_CMD PCM_IN 14
15 SDO_DAT0 PCM_OUT 16
17 SDO_DAT1 LED2# 18
19 SDO_DAT2 GND 20
21
23
SDO_DAT3
SDIO_WAKE#
UART_WAKE#
UART_RX
22
For EC to detect
m
SDIO_RESET#
C
debug card insert. +3VS
C
24 1 2
UART_TX
1
25 26
PCIE_PTX_DRX_P6 CN23 2 1 0.1U_0402_16V7K PCIE_PTX_DRX_P6_C 27 GND UART_CTS 28 RM31 RN16
<19> PCIE_PTX_DRX_P6 PCIE_PTX_DRX_N6 CN24 2 1 0.1U_0402_16V7K PCIE_PTX_DRX_N6_C 29 PETP0 UART_RTS 30 100K_0402_5% 10K_0402_5%
<19> PCIE_PTX_DRX_N6 PETN0 RESERVED EC_TX <43>
T
31 32
PCIE_PRX_DTX_P6 33 GND RESERVED 34 EC_RX <43>
<19> PCIE_PRX_DTX_P6
2
PCIE_PRX_DTX_N6 35 PERP0 RESERVED 36 BT_OFF#_R 1 @ 2
<19> PCIE_PRX_DTX_N6 PERN0 COEX3 BT_OFF# <20>
I
37 38 RN17 0_0201_5%
39 GND COEX2 40
<17> CLK_PCIE_P5 41 REFCLKP0 COEX1 42
<17> CLK_PCIE_N5 REFCLKN0 SUSCLK SUSCLK <29> 1
43 44 CN25
45 GND PERST0# 46 BT_OFF#_R PCIRST# <6,17,29,30,43,56>
1U_0402_10V6K
<17> CLKREQ_PCIE#5 47 CLKEQ0# W_DISABLE2# 48 WL_OFF#_R
C
49 PEWAKE0# W_DISABLE1# 50 2
51 GND I2C_DATA 52
53 RSRVD/PETP1 I2C_CLK 54
55 RSRVD/PETN1 ALERT 56
57 GND RESERVED 58
r
59 RSRVD/PERP1 RESERVED 60 +3VS
61 RSRVD/PERN1 RESERVED 62
63 GND RESERVED 64
RESERVED 3.3VAUX
1
65 66
o
67 RESERVED 3.3VAUX RN5
GND 10K_0402_5%
69 68
2
MTG77 MTG76 WL_OFF#_R 1 @ 2
F
WL_OFF# <20>
RN15 0_0201_5%
CONN@ LCN_DAN05-67306-0102
1
CN9
l
1U_0402_10V6K
2
a
B B
closed to pin 2, 4
+3VS
n t i closed to pin 64, 66

+3VS
WLAN power control
Prevent backdriver from +3VS_WLAN_NGFF to +3VS
e
+3VS
22U_0603_6.3V6M~D
0.1U_0402_10V7K~D
22U_0603_6.3V6M~D
0.1U_0402_10V7K~D
1 1 1 1
id
CM12
CM13
CM14
CM15
2 2 2 2
1 1
CM11 CM10
f
4.7U_0805_10V4Z 0.1U_0402_10V7K
2 2
o n
C
A A

NGFF WLAN/BT
0.2
5 4 3 2 1
5 4 3 2 1
PCIe/SATA SSD PCIe/SATA SSD

NGFF Slot_1 Key M NGFF Slot_3 Key M
+3VS_SSD +3VS_SSD
JSSD1 JSSD3
1 2 1 2
y
3 GND 3.3VAUX 4 3 GND 3.3VAUX 4
5 GND 3.3VAUX 6 PCIE_PRX_DTX_N12 5 GND 3.3VAUX 6
<16> PCIE_PRX_DTX_N12
l
7 PERn3 NC 8 PCIE_PRX_DTX_P12 7 PERn3 NC 8
9 PERp3 NC 10 <16> PCIE_PRX_DTX_P12 9 PERp3 NC 10
11 GND DAS/DSS# 12 PCIE_PTX_DRX_N12 11 GND DAS/DSS# 12
13 PETn3 3.3VAUX 14 <16> PCIE_PTX_DRX_N12 PCIE_PTX_DRX_P12 13 PETn3 3.3VAUX 14
D PETp3 3.3VAUX <16> PCIE_PTX_DRX_P12 PETp3 3.3VAUX D
n
15 16 15 16
17 GND 3.3VAUX 18 PCIE_PRX_DTX_N11 17 GND 3.3VAUX 18
19 PERn2 3.3VAUX 20 <16> PCIE_PRX_DTX_N11 PCIE_PRX_DTX_P11 19 PERn2 3.3VAUX 20
21 PERp2 NC 22 <16> PCIE_PRX_DTX_P11 21 PERp2 NC 22
23 GND NC 24 PCIE_PTX_DRX_N11 23 GND NC 24
25 PETn2 NC 26 <16> PCIE_PTX_DRX_N11 PCIE_PTX_DRX_P11 25 PETn2 NC 26
PETp2 NC <16> PCIE_PTX_DRX_P11 PETp2 NC
O
27 28 27 28
PCIE_PRX_DTX_N13 29 GND NC 30 PCIE_PRX_DTX_N10 29 GND NC 30
<16> PCIE_PRX_DTX_N13 PCIE_PRX_DTX_P13 31 PERn1 NC 32 <16> PCIE_PRX_DTX_N10 PCIE_PRX_DTX_P10 31 PERn1 NC 32
<16> PCIE_PRX_DTX_P13 33 PERp1 NC 34 <16> PCIE_PRX_DTX_P10 33 PERp1 NC 34
PCIE_PTX_DRX_N13 35 GND NC 36 PCIE_PTX_DRX_N10 35 GND NC 36
<16> PCIE_PTX_DRX_N13 PCIE_PTX_DRX_P13 PETn1 NC <16> PCIE_PTX_DRX_N10 PCIE_PTX_DRX_P10 PETn1 NC
r
37 38 37 38
<16> PCIE_PTX_DRX_P13 39 PETp1 DEVSLP 40 DEVSLP1 <19> <16> PCIE_PTX_DRX_P10 39 PETp1 DEVSLP 40 DEVSLP0 <19>
PCIE_PRX_DTX_P14 41 GND NC 42 PCIE_PRX_DTX_P9 41 GND NC 42
<16> PCIE_PRX_DTX_P14 PCIE_PRX_DTX_N14 43 PERn0/SATA-B+ NC 44 <16> PCIE_PRX_DTX_P9 PCIE_PRX_DTX_N9 43 PERn0/SATA-B+ NC 44
e
<16> PCIE_PRX_DTX_N14 45 PERp0/SATA-B- NC 46 <16> PCIE_PRX_DTX_N9 45 PERp0/SATA-B- NC 46
PCIE_PTX_DRX_N14 47 GND NC 48 PCIE_PTX_DRX_N9 47 GND NC 48
<16> PCIE_PTX_DRX_N14 PCIE_PTX_DRX_P14 49 PETn0/SATA-A- NC 50 <16> PCIE_PTX_DRX_N9 PCIE_PTX_DRX_P9 49 PETn0/SATA-A- NC 50
PCIRST# PCIRST#
<16> PCIE_PTX_DRX_P14 51 PETp0/SATA-A+ PERST# 52 PCIRST# <6,17,28,43,56> <16> PCIE_PTX_DRX_P9 51 PETp0/SATA-A+ PERST# 52
CLK_PCIE_N1 GND CLKREQ# CLKREQ_PCIE#1 <17> CLK_PCIE_N7 GND CLKREQ# CLKREQ_PCIE#7 <17>
b
53 54 53 54
<17> CLK_PCIE_N1 CLK_PCIE_P1 55 REFCLKN PEWAKE# 56 <17> CLK_PCIE_N7 CLK_PCIE_P7 55 REFCLKN PEWAKE# 56
<17> CLK_PCIE_P1 57 REFCLKP NC 58 <17> CLK_PCIE_P7 57 REFCLKP NC 58
GND NC GND NC
+3VS_SSD +3VS_SSD
67 68 SUSCLK 67 68 SUSCLK
69 NC SUSCLK(32kHz) 70 SUSCLK <18,28> 69 NC SUSCLK(32kHz) 70
m
PEDET(NC-PCIe/GND-SATA) 3.3VAUX PEDET(NC-PCIe/GND-SATA) 3.3VAUX
2
2
71 72 71 72
R363 73 GND 3.3VAUX 74 R364 73 GND 3.3VAUX 74 +3VS
10K_0201_5% 75 GND 3.3VAUX 10K_0201_5% 75 GND 3.3VAUX
GND 76 GND 76
e
GND GND
2
77 77
1
1
GND GND R366
CONN@ LCN_DAN05-67406-0103 CONN@ LCN_DAN05-67406-0103 10K_0201_5%
<16> SATA_GP1 <16> SATA_GP0
1
m
CLKREQ_PCIE#7
C
PEDET Module Type C
0 SATA
1 PCIe
I T
PCIe/SATA SSD
NGFF Slot_2 Key M
r C JSSD1 JSSD2 JSSD3
o
+3VS_SSD
JSSD2 +3VS_SSD +3VS_SSD +3VS_SSD +3VS_SSD
1 2
3 GND 3.3VAUX 4
PCIE_PRX_DTX_N20 5 GND 3.3VAUX 6
F
<16> PCIE_PRX_DTX_N20 PCIE_PRX_DTX_P20 7 PERn3 NC 8
<16> PCIE_PRX_DTX_P20 PERp3 NC
0.047U_0402_16V4Z
0.047U_0402_16V4Z
22U_0402_6.3V6M
22U_0402_6.3V6M
22U_0402_6.3V6M
0.047U_0402_16V4Z
0.047U_0402_16V4Z
22U_0402_6.3V6M
22U_0402_6.3V6M
22U_0402_6.3V6M
0.047U_0402_16V4Z
0.047U_0402_16V4Z
22U_0402_6.3V6M
22U_0402_6.3V6M
22U_0402_6.3V6M
330U_V_6.3VM_R25
9 10
33P_0402_50V8J
33P_0402_50V8J
33P_0402_50V8J
33P_0402_50V8J
33P_0402_50V8J
33P_0402_50V8J
PCIE_PTX_DRX_N20 GND DAS/DSS# 1
11 12 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1
<16> PCIE_PTX_DRX_N20 PCIE_PTX_DRX_P20 PETn3 3.3VAUX
C623
C621
C618
C617
C622
C635
C636
C625
C627
C620
C628
C624
C637
C638
C632
C634
C629
C630
C633
C639
C640
C631
13 14 +
l
<16> PCIE_PTX_DRX_P20 15 PETp3 3.3VAUX 16
PCIE_PRX_DTX_N19 17 GND 3.3VAUX 18
<16> PCIE_PRX_DTX_N19 PCIE_PRX_DTX_P19 19 PERn2 3.3VAUX 20 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2
<16> PCIE_PRX_DTX_P19 21 PERp2 NC 22
a
B GND NC B
PCIE_PTX_DRX_N19 23 24
<16> PCIE_PTX_DRX_N19 PCIE_PTX_DRX_P19 25 PETn2 NC 26
<16> PCIE_PTX_DRX_P19
i
27 PETp2 NC 28
PCIE_PRX_DTX_N18 29 GND NC 30
<16> PCIE_PRX_DTX_N18 PCIE_PRX_DTX_P18 PERn1 NC
t
31 32
<16> PCIE_PRX_DTX_P18 33 PERp1 NC 34
PCIE_PTX_DRX_N18 35 GND NC 36
<16> PCIE_PTX_DRX_N18 PCIE_PTX_DRX_P18 37 PETn1 NC 38
<16> PCIE_PTX_DRX_P18 39 PETp1 DEVSLP 40 DEVSLP4 <19>
n
PCIE_PRX_DTX_P17 41 GND NC 42
<16>
<16>
PCIE_PRX_DTX_P17
PCIE_PRX_DTX_N17
PCIE_PRX_DTX_N17 43 PERn0/SATA-B+
PERp0/SATA-B-
NC
NC
44 Delete C619,C626 @12/29
45 46
PCIE_PTX_DRX_N17 GND NC C622,C624 from 0805 to 0402 @01/08
e
47 48
<16> PCIE_PTX_DRX_N17 PCIE_PTX_DRX_P17 49 PETn0/SATA-A- NC 50 PCIRST#
<16> PCIE_PTX_DRX_P17
CLK_PCIE_N2
51 PETp0/SATA-A+
GND
PERST#
CLKREQ#
52
CLKREQ_PCIE#2 <17>
Add 22U C635,C636,C637,C638,C639,C640 @01/08
53 54
<17> CLK_PCIE_N2 CLK_PCIE_P2 55 REFCLKN PEWAKE# 56
id
<17> CLK_PCIE_P2 57 REFCLKP NC 58 +3VALW
GND NC
+3VS_SSD
67 68 SUSCLK
69 NC SUSCLK(32kHz) 70 Add U16 for SSD @01/18
f
PEDET(NC-PCIe/GND-SATA) 3.3VAUX
2
10U_0603_6.3V6M
10U_0603_6.3V6M
71 72
R365
10K_0201_5%
73 GND
GND
3.3VAUX
3.3VAUX
74 1 1
4.4m ohm/6A
C2515
C2514
75
GND 76
n
GND 77 +3VS_SSD
1
GND 2 2
CONN@ LCN_DAN05-67406-0103
<16> SATA_GP4
U16
o
1 6
2 IN OUT
IN
10U_0603_6.3V6M
10U_0603_6.3V6M
3 7
PEDET Module Type <43,45,56,64,67,79>
+5VALW
SUSP#
4 VBIAS VCC_PAD
ON GND
5 1 1
C2513 @
C2512
AOZ1334DI-02_DFN8-7_3X3
C
A
0 SATA 2 2 A
1
C2516
0.1U_0402_10V7K
1 PCIe 2

NGFF SSD
0.2
5 4 3 2 1
5 4 3 2 1
UL1
<19> PCIE_PRX_DTX_P5
PCIE_PRX_DTX_P5 2 1 PCIE_PRX_DTX_P5_C 30
TX_P VDD33
1 W=40 mils +LAN_IO
CL1 0.1U_0402_16V7K 16
PCIE_PRX_DTX_N5 2 1 PCIE_PRX_DTX_N5_C 29 AVDD33
<19> PCIE_PRX_DTX_N5 TX_N
CL2 0.1U_0402_16V7K
PCIE_PTX_DRX_P5 2 1 PCIE_PTX_DRX_P5_C 35 13 +AVDDL
+LAN_IO <19> PCIE_PTX_DRX_P5 RX_P AVDDL
CL3 0.1U_0402_16V7K 19
<19> PCIE_PTX_DRX_N5
PCIE_PTX_DRX_N5 2 1 PCIE_PTX_DRX_N5_C 36
RX_N
AVDDL
AVDDL
31 +DVDDL W=20mils
y
CL4 0.1U_0402_16V7K 34
1U_0402_6.3V6K~D
0.1U_0402_16V7K~D
33 AVDDL 6
<17> CLK_PCIE_P4 REFCLK_P AVDDL_REG
1
l
1 1
RL1 32
<17> CLK_PCIE_N4 REFCLK_N 22 +AVDDH CL43 CL44
D 4.7K_0402_5%~D D
4 AVDDH 9
<17> CLKREQ_PCIE#4 CLKREQ# AVDDH_REG 2 2
2
n
2
<6,17,28,43,56> PCIRST# PERST# 37 +DVDDL
PCIE_WAKE# 3 DVDDL_REG
<18,43> PCIE_WAKE# WAKE#
11 LAN_MDIP0
25 TRXP0 12 LAN_MDIN0
SMCLK TRXN0 LAN_MDIP1 close to UL1 pin37
O
26 14
The pull-up resisters might not be 28
27
SMDATA
NC
TRXP1
TRXN1
TRXP2
15
17
18
LAN_MDIN1
LAN_MDIP2
LAN_MDIN2
necessory due to existence 41 TESTMODE
GND
TRXN2
TRXP3
20 LAN_MDIP3
LAN_MDIN3
r
21
TRXN3 W=20 mils
on PCH side. XTLI
XTLO
8
7 XTLI
+AVDDH
1U_0402_6.3V6K~D
0.1U_0402_16V7K~D
0.1U_0402_16V7K~D
XTLO 40
25MHZ_12PF_7V25000012
LX
e
+LAN_IO
1 2 5 1 1 1
RL2 30K_0402_5% ISOLAT# 24
PPS
4
CL5 CL6 CL7
LAN_ACTIVITY# 38 10 +RBIAS 1 2
GND
GND
LAN_LINK#_R 39 LED_0 RBIAS 2 2 2
b
LAN_LED2#_R 23 LED_1 RL3
LED_2
2
2.37K_0402_1%~D
OSC
OSC
RL4
YL1 5.1K_0402_1%~D S IC E2400-BL3A-R QFN 40P E-LAN CTRL
SKL@
1
m
2 2 UL1 close to UL1 pin9 close to UL1 pin22
CL8 CL9
18P_0402_50V8J 22P_0402_50V8J
e
+3VALW 1 1
C C
S IC E2500-RIV1-RL QFN 40P E-LAN CTRL

SA0000A6L00
1 1 KBL@
CL40 CL41
m
4.7U_0805_10V4Z 0.1U_0402_16V7K
2 2
+LAN_IO 1A
UL2 +AVDDL W=20 mils
1 W=40 mils
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
0.1U_0402_16V7K~D
0.1U_0402_16V7K~D
0.1U_0402_16V7K~D
0.1U_0402_16V7K~D
0.1U_0402_16V7K~D
4.7U_0603_6.3V6K~D
5 OUT
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
1000P_0402_50V7K~D
0.1U_0402_16V7K~D
0.1U_0402_16V7K~D
IN 2
T
1 1 1 1 1 1 1 1
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
4 GND
CL22
<43> EN_WOL# EN 3 1 2 CL18 CL19 CL20 CL21 CL23 CL24 CL25
OCB +3VS 1 1 1 1 1 1 1
RL5
I
1 2 2 2 2 2 2 2 2
CL42 10K_0402_5% CL11 CL12 CL13 CL14 CL15 CL16 CL17
SY6288D20AAC_SOT23-5
2 2 2 2 2 2 2
0.1U_0402_16V7K
close to UL1 pin1
r
close to UL1 pin16
C close to UL1 pin6 close to UL1 pin34 close to UL1 pin31 close to UL1 pin13 close to UL1 pin19
+VDDCT_L
LAN_MDIN3
LAN_MDIP3
1
3
TL1
TD1+
TD1-
TDCT1 TXCT1
TX1+
TX1-
24
23
22
RJ45_MDI3-
RJ45_MDI3+
RJ45_CT3
RJ45_CT2
1
RL9
75_0402_1%~D
2 RJ45_CT
Fo @EMI@
2
CL27
+LAN_IO
1 LAN_ACTIVITY#
470P_0402_50V7K
2
RL8
1
330_0402_5%
RJ45_MDI3-
10
8
JLAN
Yellow LED-
Yellow LED+
PR4-
B
l
4 21 1 2
TDCT2 TXCT2 RJ45_MDI3+ 7
LAN_MDIN2 5 20 RJ45_MDI2- RL10 PR4+
TD2+ TX2+ 75_0402_1%~D RJ45_MDI1- 6
LAN_MDIP2 RJ45_MDI2+ PR2-
a
6 19
TD2- TX2- RJ45_MDI2- 5
LAN_MDIN1 7 18 RJ45_MDI1- PR3-
i
TD3+ TX3+ RJ45_MDI2+ 4
LAN_MDIP1 8 17 RJ45_MDI1+ RL11 PR3+ 17
t
TD3- TX3- 75_0402_1%~D RJ45_MDI1+ 3 GND
9 16 RJ45_CT1 1 2 PR2+ 16
TDCT3 TXCT3 RJ45_MDI0- 2 GND
10 15 RJ45_CT0 1 2 PR1- 15
TDCT4 TXCT4 RJ45_MDI0+ GND
n
1
LAN_MDIN0 11 14 RJ45_MDI0- RL12 PR1+ 14
TD4+ TX4+ 2 GND
75_0402_1%~D 2 1 LAN_LINK# 11
LAN_MDIP0 12 13 RJ45_MDI0+ CL30 @EMI@ CL28 470P_0402_50V7K Green LED-
TD4- TX4- 1 LAN_LED2#
e
10P_1808_3KV7K~D 2 13
1 @EMI@ CL29 470P_0402_50V7K Orange LED-
MHPC_NS692417 +LAN_IO
1 2 12
2N7002K_SOT23-3 LL1 Green-Orange LED+
QL3 BLM15AG121SN1D_L0402_2P
id
SANTA_130456-512
D
3 1 2 1 CONN@
RL13 130_0402_1%~D
2
LAN_LED2#_R 2 1 1
1000P_0402_50V7K~D
1000P_0402_50V7K~D
1000P_0402_50V7K~D
1000P_0402_50V7K~D
0.1U_0402_16V7K~D
0.1U_0402_16V7K~D
0.1U_0402_16V7K~D
0.1U_0402_16V7K~D
RL15 130_0402_5%~D @EMI@

G
f
CL32
CL33
CL34
CL35
CL36
CL37
CL38
CL39
2 1 2 1 2 1 2 1 RL14 CL31
LAN_LINK#_R 2 1K_0402_1%~D 470P_0402_50V7K
A 2 A
1
1 2 1 2 1 2 1 2
n
+LAN_IO
Co 4 3
Compal Secret Data
2
Deciphered Date 2017/01/06 Title
Size
Date:
Document Number
LAN E2400/E2500
LA-D753P
1
Sheet 30 of 82
Rev
0.2
5 4 3 2 1
CA1,CA2 close +3.3V_1.8V_DVDD_IO

+1.8VS
PCH_AZ_CODEC_BITCLK
+3.3V_1.8V_DVDD_IO
to UA1 pin19 RA68
0_0603_5%
+5V_PVDD RA69
0_0603_5%
+5V_PVDD
LA3 @
+5V_PVDD +5VS
1 2 1 2 1 2 RA1 1 2 0_0603_5%
0.1U_0402_16V7K
1 1 1 1 1 1 1 1 1 1 BLM15AG121SN1D_L0402_2P 1 2
1
+3VS
CA2
10U_0603_6.3V6M
CA3
0.1U_0402_16V7K
CA4
10U_0603_6.3V6M
CA5
0.1U_0402_16V7K
CA6
10U_0603_6.3V6M
CA7
0.1U_0402_16V7K
CA8
10U_0603_6.3V6M
CA9
0.1U_0402_16V7K
CA10
EC Beep RA3 0_0603_5% RA4 1 2 0_0603_5%
4.7U_0402_6.3V6M
CA1
RA2
22_0402_1% @ @ @ DA1 RA5 1 2 0_0603_5% +5VA +5VS RA6 1 2 0_0603_5%
EMI@ 2 2 CA12,CA13 close 2 2 2 2 2 2 2 2
<43> BEEP# 2
RA7 1 2 0_0603_5%
to UA1 pin7
2
1 PC_BEEP 1 2
+3.3V_1.8V_DVDD RA8 0_0603_5%
y
1
CA11 3
<18> HDA_SPKR Moat
1
10P_0402_50V8J
l
EMI@ BAT54C-7-F_SOT23-3 @
2 RA9 +3.3V_1.8V_DVDD +1.8VS Moat GNDA GND
1 1 +5VA +CODEC_AVDD2
0.1U_0402_16V7K
CA12
10K_0402_5%
CA13
4.7U_0402_6.3V6M
+CODEC_AVDD2 +1.8VS
MCU Beep
2
D PCH_AZ_CODEC_SDOUT LA5 @ D
Place on the moat between GND & GNDA.
n
2 2
10U_0603_6.3V6M
0.1U_0402_16V7K
0.1U_0402_16V7K
10U_0603_6.3V6M
1 1 1 2 LA4
CA14
CA15
1 1 BLM15AG121SN1D_L0402_2P 1 2
1
+3VS
CA16
CA17
BLM15AG121SN1D_L0402_2P
RA10
22_0402_1% 2 2 RA11 1 2 0_0603_5%
@EMI@ 2 2
2
O
+3VALW
1 1 @ 2 LDO2-CAP
CA18 RA12 0_0201_5%
10P_0402_50V8J
Moat
57
19
46
51
45
24
7
@EMI@ UA1
1
2 RA15 1K_0402_1%
r
DVDD-IO
PVDD1
PVDD2
AVDD1
CPVDD/AVDD2
T-PAD
DVDD
23 CA19 2 1 0.1U_0402_16V7K 2 1 PC_BEEP
I2C0_SDA_EC 11 PCBEEP RA13
<32,35,43> I2C0_SDA_EC I2C DATA 25 CA20 1 2 2.2U_0402_6.3V6M 10K_0402_5%
I2C0_SCL_EC 12 CBN2
<32,35,43> I2C0_SCL_EC
2
e
I2C CLK 26 1 2 2 GPIO_1
PCH_AZ_CODEC_BITCLK 13 CBP2
<18> PCH_AZ_CODEC_BITCLK AUDIOLINK: BCLK/IBCLK RA16 HP_MUTE#
27 CA21 1 2 2.2U_0402_6.3V6M 1
CBP1 10K_0402_5%
<18> PCH_AZ_CODEC_SYNC
14
AUDIOLINK:SYNC/LRCK 28 3 DEPOP#_EC
b
CBN1 DEPOP#_EC <43>
<18> PCH_AZ_CODEC_RST#
1 @ 2 PCH_AZ_CODEC_RST#_R 15
RA17 0_0201_5% AUDIOLINK:RESETB/MCLK 39 LINE1_VREFO_R
1 2 16 Mic1-VrefO-R/AGPO-1 DA2
<18> PCH_AZ_CODEC_SDIN0 AUDIOLINK:SDATA-IN/DOUT MIC1-VREFO_L
RA18 22_0402_5% 38 BAT54AW_SOT323-3~D
PCH_AZ_CODEC_SDOUT 17 Mic1-VrefO-L/AGPP-0
<18> PCH_AZ_CODEC_SDOUT AUDIOLINK:SDATA-OUT/DIN 37 SLEEVE
MIC_CLK LA6 DMIC_CLK1_R Mic1-R/Sleeve
EMI@ 1 2 53
<25> MIC_CLK DMIC-CLK1
m
BLM15BB221SN1D_2P 36 RING2
MIC_DATA 1 2 DMIC_DATA1_R 54 Mic1-L/Ring2
<25> MIC_DATA DMIC-DATA1 LINE1_L
RA19 0_0201_5% 35
Line1-L
I2S_LRCK_R 1 34 LINE1_R
e
+3.3V_1.8V_DVDD GPIO_1 2 GPIO_9/I2S_LRCK Line1-R
I2S_OUT_R 3 GPIO_1/DMIC_CLK2/SPDIF_O/I2S_In JD 33 HPOUT-R
GPIO_6/I2S_Out HP_Out-R
1
RA70 4
I2S_DATA_OUT_R 5 GPIO_2/DMIC DATA2/I2S_Out JD 32 HPOUT-L
10K_0402_5% 8 GPIO_5/I2S_In HP_Out-L
AMP_I2S_MCLK_R 55 I2S_Out JD/Mic JD 40 LINE1_VREFO_L
@ AMP_I2S_BCLK_R 56 GPIO_8/I2S-MCLK/SPDIF_IN LINE1-VREFO
+3.3V_1.8V_DVDD
2
C GPIO_7/I2S-BCLK C
m
1 RA21 2 100K_0201_1% 41
EAPD# 52 MIC1-CAP
2 EAPD# EAPD+PD#/GPIO_11 44
LDO1-CAP
1
47
SPK-OUT-LP
1K_0402_1%
RA22
1
<32> CODEC_Mute#
48 21
3 EC_MUTE# SPK-OUT-LN VREF1
EC_MUTE# <43>
2015/11/11 modify for EAPD 49 22 LDO2-CAP
2
SPK-OUT-RN LDO2-cap
T
DA3
BAT54AW_SOT323-3~D 50 43
SPK-OUT-RP VREF
HP_Line1_JD 9 29
I
HP JD/Line JD CPVPP
18 30
LDO3_cap CPVREF
10U_0402_6.3V6M
0.1U_0402_16V7K
+3.3V_1.8V_DVDD 1 1 VD33STB 10 31
VD33STB CPVEE
CA85
CA23
AUDIO_IRQ @
6 42
HD-SOC SEL AVSS1
C
AUDIO_IRQ
2.2U_0402_6.3V6M
2.2U_0402_6.3V6M
0.1U_0402_16V7K
2.2U_0402_6.3V6M
0.1U_0402_16V7K
10U_0603_6.3V6M
0.1U_0402_16V7K
4.7U_0603_6.3V6M
10U_0603_6.3V6M
10U_0603_6.3V6M
RA24 1 2
2 2 20
10K_0402_5% AVSS2 1 1 1 1 1 1 1 1 1 1
CA24
CA25
CA26
CA27
CA28
CA29
CA30
CA31
CA32
CA33
2 2 2 2 2 2 2 2 2 2
r
+RTC_CELL
1 2 VD33STB ALC3266-CG_QFN56_7X7
RA25 0_0201_5%
2015/11/16 modify
AMP_I2S_MCLK_R RA27 1
AMP_I2S_BCLK_R RA29 1
I2S_LRCK_R RA30 1
2 33_0402_5%
2 33_0402_5%
2 33_0402_5%
AMP_I2S_MCLK
AMP_I2S_BCLK
I2S_LRCK
AMP_I2S_MCLK
AMP_I2S_BCLK
I2S_LRCK <35>
<35>
<35>
1
MIC_DATA
@EMI@
1
MIC_CLK
@EMI@
Fo +3.3V_1.8V_DVDD
1
MIC1-VREFO_L RA26 1
RA28 1
2 2.2K_0201_5%
2 2.2K_0201_5%
l
CA35 CA34 RA32 ESD@
I2S_OUT_R RA31 1 2 33_0402_5% I2S_OUT
I2S_OUT <35> 2
22P_0402_50V8J
2
10P_0402_50V8J 100K_0402_1% SLEEVE LA7 2 1 BLM15PX330SN1D 0402 W=40mils SLEEVE_R
ESD@
B
I2S_DATA_OUT_R RA33 1 2 33_0402_5% I2S_DATA_OUT
I2S_DATA_OUT <35>
RING2 LA8 2 1 BLM15PX330SN1D 0402 W=40mils RING2_R B
2
a
EMI@
200K_0402_1% 1 2 RA34 HPOUT_JD HPOUT-L 1 2 Line-IN-L LA9 2 1 FBMA-L11-160808-800LMT_2P AUD_HP_OUT_L_CN
Close to UA1 Pin53 RA35 2_0402_1% EMI@
1 1 1 1 1
i
HP_Line1_JD LINE1_JD AUD_HP_OUT_R_CN
CA36 @EMI@
22P_0402_50V8J
CA37 @EMI@
22P_0402_50V8J
CA38 @EMI@
22P_0402_50V8J
CA39 @EMI@
22P_0402_50V8J
100K_0402_1% 1 2 RA36 HPOUT-R 1 2 Line-IN-R LA10 2 1 FBMA-L11-160808-800LMT_2P

CA40 @EMI@
22P_0402_50V8J
RA37 2_0402_1%
t
2 2 2 2 2
0.1U_0402_10V7K
1 @ UA3
MAX9892ERT+T_UCSP6~D
CA41
1 2 A1
2 INL
n
RA38 0_0201_5%
2
1 2 A3
Near Codec HP_MUTE# INR
AZ5125-02S.R7G_SOT23-3
DA4
ESD@
AZ5123-02S SOT23
DA5
ESD@
RA39 0_0201_5% B1 +3VS
/MUTE
1 1 1 1 1 1
100P_0201_50V8J
CA42 EMI@
100P_0201_50V8J
CA43 EMI@
680P_0402_50V8J
CA45 ESD@
680P_0402_50V8J
CA46 ESD@
680P_0402_50V8J
CA91 @ESD@
680P_0402_50V8J
CA92 @ESD@
e
CA44 B2
1 2 B3 VDD
SET 2 2 2 2 2 2
GND
0.01U_0201_16V7
id
1
LINE1_VREFO_R RA40 1 2 2.2K_0201_5%
A2
LINE1_VREFO_L RA41 1 2 2.2K_0201_5%
Moat
ESD@
Set t i ng t he Turn - Of f Tim e
CA47
Ton (ms) = 0.02 x Cset (pF)
f
LA11
LINE1_R 1 2 HP2_D_R_C 1 2 HP2_D_R_R 2 1 HP2_D_R1_JK
+
RA42
BLM15PX330SN1D 0402 1
CA48
Jack1 : Global Headset
330U_D2E_6.3VM_R25M 8.2_0402_5%~D 100P_0201_50V8J
Re-tasking port OMTP/CTIA headset, Headphone, Line-Out
n
ESD@ EMI@
CA49 2
LINE1_L 1 2 HP2_D_L_C 1 2 HP2_D_L_R 2
LA12
1 HP2_D_L1_JK Headphone, Line-Out, Mic-In, Line-In JACK1
+
RING2_R 4
BLM15PX330SN1D 0402 1
1
AUD_HP_OUT_L_CN
22K_0201_5%
RA44
22K_0201_5%
RA45
RA43 CA50 JACK2 1

330U_D2E_6.3VM_R25M
o
AZ5125-02S.R7G_SOT23-3
DA6
ESD@
8.2_0402_5%~D 100P_0201_50V8J 4
EMI@ HP2_D_L1_JK 1
2 5
2
LINE1_JD 5
UA2 HPOUT_JD 6
A
MAX9892ERT+T_UCSP6~D
Moat AUD_HP_OUT_R_CN 2
A
C
6 SLEEVE_R 3
1
1 2 A1 HP2_D_R1_JK 2 7
RA46 0_0201_5% INL 3
1 2 A3 7 YUQIU_PJ741-F07J1BE-C
HP_MUTE# RA47 0_0201_5% B1 INR
/MUTE CONN@
+3VALW +3VLP YUQIU_PJ741-F07J1BE-C
CONN@
Set t i ng t he Turn - Of f Tim e CA51
1 2 B3 VDD
B2 1
RA84
2
0_0201_5%
SET
Ton (ms) = 0.02 x Cset (pF) 1 @ 2
GND
0.01U_0201_16V7 RA85 0_0201_5%

A2
Audio Codec ALC3266
5 4 3 2 1
5 4 3 2 1
SMART AMP +PVDD +PVDD

B+_BIAS
RA83 1 2 0_0805_5%
1 1 1 1 1 1
CA52 CA53 CA54 CA55 CA56 CA57
10U_0603_25V6M 0.1U_0402_25V7K 1000P_0402_50V7K 10U_0603_25V6M 0.1U_0402_25V7K 1000P_0402_50V7K
y
2 2 2 2 2 2
l
CA52, CA53 and CA54 close to PIN1,56 CA55, CA56 and CA57 close to PIN42,43
D D
+3.3V_1.8V_DVDD
CA64
10U_0402_6.3V6M
1
2
1
2
CA65
0.1U_0402_16V7K
+PVDD
2
CA79
10U_0603_25V6M
1
2
CA80
0.1U_0402_25V7K
1
2
CA81
1000P_0402_50V7K
+PVDD
2
CA82
10U_0603_25V6M
1
2
CA83
0.1U_0402_25V7K
1
2
CA84
1000P_0402_50V7K
+1.8VS
2
CA58
10U_0402_6.3V6M
1
2
CA59
0.1U_0402_16V7K
+1.8VS
2
CA60
0.1U_0402_16V7K
O
+PVDD
2
CA61
n
10U_0603_25V6M
1
2
CA62
0.1U_0402_25V7K
1
2
CA63
1000P_0402_50V7K
r
CA64, CA65 close to PIN16 CA61, CA62 and CA63 close to PIN37
CA79, CA80 and CA81 close to PIN51 CA82, CA83 and CA84 close to PIN48 CA60 close to PIN21
CA58, CA59 close to PIN17
OUT_A
OUT_B
OUT_C
+1.8VS
b e I2C0_SDA_EC_R RA53 2 1 1K_0402_5%

+3.3V_1.8V_DVDD
CA71 1U_0402_16V6K
CA66 1U_0402_16V6K
I2C0_SCL_EC_R RA50 2 1 1K_0402_5%
OUT_D +PVDD +PVDD 1 1
2
330P_0402_50V7
330P_0402_50V7
330P_0402_50V7
330P_0402_50V7
+3.3V_1.8V_DVDD
+PVDD +PVDD +PVDD
1 1 1 1 RA52
1K_0201_1%2 2 +1.8VS
CA87
CA88
CA89
CA90
e
@
1
2 2 2 2 1 2
C C
RA51
10_0402_1%
10_0402_1%
10_0402_1%
10_0402_1%
0_0402_5% +3.3V_1.8V_DVDD
1
56
51
48
43
42
37
21
40
16
17
1
3
RA73
RA74
RA75
RA76
UA4
0x22h
m
PVDD-A
PVDD-A
PVDD-B
AVDD1
AVDD2
PGVdd
GVDD-AB
DVDD-IO
PVDD-C
PVDD-D
PVDD-D
GVDD-CD
DVDD
1
7 I2C0_SDA_EC_R 0_0402_5% 2 1 RA55 I2C0_SDA_EC RA66 @
I2C0_SDA_EC <31,35,43>
2
OUT_A CA67 1 2 .033U_0603_50V7 2 SDA 10K_0402_5%

BST-A 8 I2C0_SCL_EC_R 0_0402_5% 2 1 RA56 I2C0_SCL_EC
OUT_B CA68 1 SCL I2C0_SCL_EC <31,35,43>
2 .033U_0603_50V7 50
2
BST-B 18 AMP_ASEL AMP_ASEL
OUT_C CA69 1 2 .033U_0603_50V7 49 ASEL
RA58.1 should from RA57.1 directly BST-C
1
39 SYNC_IN
T
OUT_D CA70 1 2 .033U_0603_50V7 41 SYNC-IN EMI@ CA254 1 2 1000P_0402_50V7K RA67
RA59.1 should from RA57.2 directly BST-D
SYNC-OUT
38 SYNC_OUT
TP@ TC24
10K_0402_5%
EMI@ CA255 1 2 1000P_0402_50V7K
RA61.1 should from JSPK.4 directly 0x20h
I
AMP_LDO_A1.5V 22 EMI@ LA50
2
LDO A1.5 55 OUT_A 1 2 BLM15PX121SN1D_2P ISENSEP_L_R RA57 1 2 0.2_0805_1% SPK_L-_CONN
ISENSEP_L_R 1 RA58 2 39K_0402_0.1% ISENSEP_L 25 OUT-A EMI@ LA51
LISENDE_P 52 OUT_B 1 2 BLM15PX121SN1D_2P SPK_L+_CONN
SPK_L-_CONN 1 RA59 2 39K_0402_0.1% IVSENSE_L 26 OUT-B EMI@ LA52
LISENDE_N/LVSENSE_P 47 OUT_C 1 2 BLM15PX121SN1D_2P ISENSEP_R_R RA60 1 2 0.2_0805_1% SPK_R-_CONN
C
SPK_L+_CONN 1 RA61 2 39K_0402_0.1% VSENSEN_L 27 OUT-C EMI@ LA53
LVSENSE_N 44 OUT_D 1 2 BLM15PX121SN1D_2P SPK_R+_CONN
OUT-D
1 RA62 2 5
22.1K_0402_1%
OC_ADJ 23 CA74 1 2 0.1U_0402_16V7K EMI@ CA256 1 2 1000P_0402_50V7K
ISENSEP_R_R ISENSEP_R VREF
r
1 RA63 2 39K_0402_0.1% 28
RISENSE_P EMI@ CA257 1 2 1000P_0402_50V7K
SPK_R-_CONN 1 RA64 2 39K_0402_0.1% IVSENSE_R 29 9 AMP_I2S_MCLK
RISENSE_N/RVSENSE_P MCLK AMP_I2S_MCLK <35>
SPK_R+_CONN 1 RA65 2 39K_0402_0.1% VSENSEN_R 30 10 AMP_I2S_BCLK
o
RVSENSE_N BCLK AMP_I2S_BCLK <35>
I2S_LRCK
RA79 1 10K_0402_0.1%
RA78 1 10K_0402_0.1%
RA77 1 10K_0402_0.1%
RA82 1 10K_0402_0.1%
RA81 1 10K_0402_0.1%
RA80 1 10K_0402_0.1%
11
RA63.1 should from RA60.1 directly LRCK
I2S_OUT
I2S_LRCK <35>
32 12
B
RA64.1 should from RA60.2 directly NC DACDAT I2S_OUT <35>
B
F
31 13
RA65.1 should from JSPK.2 directly NC SPDIF_IN
I2S_DATA_OUT
36 14
NC SPDIF OUT/I2S DATOUT I2S_DATA_OUT <35>
35 15 CODEC_Mute#
l
NC PDBJD CODEC_Mute# <31,35>
Thermal Pad
PGND-CD
PGND-CD
PGND-AB
PGND-AB
Int. Speaker Conn.
2
a DGND
AGND
AGND
AGND
AGND
GND
40 mils = For 4 ohm 3W Speaker
i
ALC1309-CG_QFN56_7X7
4
34
33
24
20
19
46
45
54
53
57
Close to UA1 Pin42,43,44,45
t
AMP_LDO_A1.5V
JSPK
SPK_R-_CONN 1 7
1 1
n
CA77 CA78 SPK_R+_CONN 2 1 G1
10U_0402_6.3V6M 0.1U_0402_16V7K SPK_L-_CONN 3 2
SPK_L+_CONN 4 3
2 2 5 4
e
<43> SPEAKER_SEL 6 5 8
6 G2
Trace width for SPK-L+/SPK-L-/SPK-R+/SPK-R- ACES_50278-00601-001
3
CA77, CA78 close to PIN22 Speaker 4 ohm : 40 mil CONN@
AZ5125-02S.R7G_SOT23-3
DA7
@ESD@
AZ5125-02S.R7G_SOT23-3
DA8
@ESD@
id
Speaker 8 ohm : 20 mil
1
A A
o n Security Classification
2016/01/06
Compal Secret Data
2017/01/06 Title
C
Audio Amplifier ALC1309
5 4 3 2 1
A B C D E F G H
+3VS +5V_HDD
Add 22U CS16 @01/08
n l y 1
10U_0603_25V6M
0.1U_0402_25V6K~D
1000P_0402_50V7K~D
O
22U_0402_6.3V6M
RS2
10K_0201_5% 1 1 1 1
CS1
CS6
CS5
CS16
+5VS +5V_HDD
1
r
@ JP3 2 2 2 2
SATA_GP3 1 2
<16> SATA_GP3 1 2
e
JUMP_43X118
Reserve for Legacy SATA
1
RS3
b
0_0201_5%
@
CS8~CS15(0.01U) change to RS9~RS16(0ohm) @01/11
2
JHDD
1
<16> SATA_PRX_DTX_N3 2 1
m
<16> SATA_PRX_DTX_P3 3 2
HDD/SSD5 <16> SATA_PTX_DRX_N3
4
5
3
4
Delete QS2 @01/04, QS1 @01/28 <16> SATA_PTX_DRX_P3 5
6
e
7 6
+3VS <16> SATA_PRX_DTX_N2 8 7
SSD4 <16> SATA_PRX_DTX_P2 9
10
8
9
<16> SATA_PTX_DRX_N2 11 10
<16> SATA_PTX_DRX_P2 11
2
12
m
RS5 13 12
2 HDD/SSD5 <19> DEVSLP3 13 2
10K_0201_5% SSD4 14
<19> DEVSLP2 15 14
SATA_GP3 16 15
1
SATA_GP2 17 16
18 17
SATA_GP2 RS8 1 2 0_0201_5% SATA_DET# 19 18
<16> SATA_GP2 <16> PCH_SATADET# FFS_INT2_CONN 19
T
20
21 20
+3VS 21
22
22
1
I
23
RS7 24 23
10K_0201_5% 25 24
@ 26 25
27 26
+5V_HDD
2
28 27
C
29 28
30 29
30
31
32 GND
r
33 GND
34 GND
35 GND
GND
o
STARC_111H30-000000-G4-R
CONN@
+3VS
F
Free Fall Sensor for HDD
0.1U_0402_16V4Z
10U_0603_6.3V6M
l
1 1
CS7
CS2
a
3 3
2 2
i
US1
LNG3DM
t
10
1 RES 13
14 VDD_IO RES 15
VDD RES 16
FFS_INT1 11 RES
n
<17> FFS_INT1 FFS_INT2 9 INT 1 5
<17> FFS_INT2 INT 2 GND 12
7 GND
SDO/SA0
e
6
<14,15,18,38> PCH_SMBDATA 4 SDA / SDI / SDO
<14,15,18,38> PCH_SMBCLK SCL/SPC 2
8 NC 3
CS NC
id
KXCNL-1010_LGA16_3X3
f
+5VS
1
+3VS
n
RS1
100K_0201_5%
@
2
G
o
FFS_INT2 3 1 1 2 FFS_INT2_CONN
S
QS3 DS1
DMN65D8LW-7_SOT323-3 SDM10U45-7_SOD523-2~D
C
4 4

SATA HDD/SSD Connector
0.2
A B C D E F G H
5 4 3 2 1
Tobii Conn.
D
+3.3V_F383
CE80
4.7U_0805_10V4Z
+5VALW
1 1
CE82
0.1U_0402_10V6K
+5V_TOBII
n l y D
1
17@ 17@ UE12
W=80mils
O
RE652 2 2 1
5 OUT
10K_0402_5% IN
17@ 2
4 GND
2
EN 3 1 17@ 2
OCB +5VALW
r
RE161 10K_0402_5%
TOBII_PWR_EN# SY6288D20AAC_SOT23-5
<43> TOBII_PWR_EN#
17@
1 1
e
CE79 CE81
0.1U_0402_10V6K 0.1U_0402_10V6K
17@ 17@
2 2
USB20_N9
Near JTOBII
RE647 1 17@
LE3
2 0_0402_5%
USB20_N9_L
mb
e
1 2
<19> USB20_N9
C USB20_P9 USB20_P9_L C
4 3
<19> USB20_P9
MCM1012B900F06BP_4P
@EMI@
m
1 17@ 2
RE648 0_0402_5%
3
DV14
3
AZC199-02SPR7G_SOT23-3
@ESD@
1
T
1
I
+3VALW +5V_TOBII
2
JTOBII
RE300 1
C
2 1
10K_0201_1% USB20_N9_L 2
17@ 3
USB20_P9_L 4 3
1
5 4
6 5
<37> TOBII_INT 6
r
7
8 GND
GND
ACES_50450-0067N-P01
CONN@
Fo B
ia l
n t
id e
A
nf A
Co 4 3
Compal Secret Data
2
Title
Size
Date:
LA-D753P
Tobii (17" Only)
Document Number

1
Sheet 34 of 82
Rev
0.2
5 4 3 2 1
+3VLP +3VLP +3VLP +3VLP
SDMK0340L-7-F_SOD323-2
USB charge for DC S5
1
220K_0402_5%
RU4
LU4 100K_0402_5% RU5 DU8 1
USB3TP1 2 1 USB3_CTX_C_DRX_P1 4 3 USB3_CTX_C_L_DRX_P1 CU26
<19> USB3TP1
CU12 0.1U_0402_10V7K 0.1U_0402_16V7K
2
USB3TN1 2 1 USB3_CTX_C_DRX_N1 1 2 USB3_CTX_C_L_DRX_N1 2
<19> USB3TN1
CU13 0.1U_0402_10V7K
5
HCM1012GD670A05P
CU27 1
EMI@
P
NC
l
2 1 2 4
A Y USBCHG_DET_D <63>
G
2.2U_0603_6.3V6K
1
LU5 UU5
3
D
USB3RP1 4 3 USB3_CRX_L_DTX_P1 TC7SZ14FU_SSOP5~D RU6
D
n
<19> USB3RP1
1M_0402_5%
USB3RN1 1 2 USB3_CRX_L_DTX_N1
2
<19> USB3RN1
HCM1012GD670A05P DU6
EMI@ USBCHG_DET# 2 1
USBCHG_DET_EC# <43>
O
1 SDMK0340L-7-F_SOD323-2 1
CU28 CU29
EMI@ 0.1U_0402_16V7K 0.1U_0402_16V7K
MCM1012B900F06BP_4P
SW_USB20_P1 4 3 USB20_P1_CONN 2 2
SW_USB20_N1 1
LU3
2 USB20_N1_CONN
e r
b
+5V_USB_PWR1
+5V_USB_PWR1
JUSB1
1
USB20_P1_CONN 3 VBUS
USB20_N1_CONN 2 D+
D-
m
+5V_USB_PWR1
47U_0805_6.3V6M
10U_0603_6.3V6M~D
1 4
+5VALW USB3_CRX_L_DTX_N1 5 GND
1 1 USB3_CRX_L_DTX_P1 SSRX-
CU2
CU3
CU6 + 6 11
150U_B15G_6.3VM_R70M 7 SSRX+ GND 12
Power share USB3_CTX_C_L_DRX_N1 GND GND
e
1 8 13
2 2 2 USB3_CTX_C_L_DRX_P1 9 SSTX- GND 14
CU7 USBCHG_DET# 10 SSTX+ GND
1 Plug_DET
0.1U_0402_16V7K CU47
2 UU1 0.1U_0402_10V7K SDAN_608015-010232
W=80 mils
2
1 12 CONN@
IN OUT 2
USB_OC0#
m
C 13 9 C
<19> USB_OC0# FAULT# NC DU1
USB20_N1 2 11 SW_USB20_N1 L30ESDL5V0C3-2_SOT23-3
<19> USB20_N1 USB20_P1 3 DM_OUT DM_IN 10 SW_USB20_P1 ESD@
<19> USB20_P1 DP_OUT DP_IN
RU1 1 2 10K_0402_5% 4 15 RU2 2 1 19.1K_0402_1%
+3VLP ILIM_SEL ILIM1
5 16 RU3 2 1 19.1K_0402_1%
1
<43> PWRSHARE_EN_EC# EN ILIM0
T
6
<43> CTL1 7 CTL1 14
<43> 1 CTL2 2 8 CTL2 GND 17
+3VLP CTL3 GPAD
I
RU7 10K_0402_5%
TPS2546RTER_QFN16_3X3 DU2
USB3_CRX_L_DTX_N1 1 9 USB3_CRX_L_DTX_N1
USB3_CRX_L_DTX_P1 2 8 USB3_CRX_L_DTX_P1
USB3_CTX_C_L_DRX_N1 USB3_CTX_C_L_DRX_N1
C
4 7
+5VALW +5V_USB_PWR2
USB3_CTX_C_L_DRX_P1 5 6 USB3_CTX_C_L_DRX_P1
r
1 1 1 3
CU48 CU46 CU45
10U_0402_6.3V6M 0.1U_0402_10V7K 0.1U_0402_10V7K TVWDF1004AD0_DFN9
ESD@
o
2 2 2
UU3
5
IN OUT
1 W=80 mils
2
GND
F
4 3
<43> USB_PWR_EN EN OC USB_OC1# <19>
1 SY6288C20AAC_SOT23-5 1
CU17
l
CU16 0.1U_0402_16V7K
0.1U_0402_16V7K
2 2
B +5V_USB_PWR2 Add +3VALW for Lid @01/08 B
Delete CU43 @12/29
a
+3VALW +1.8VS +3VS +5V_USB_PWR2 B+_BIAS
Design change @12/30
JIO
i
47U_0805_6.3V6M
10U_0603_6.3V6M~D
1
2 1
1 1
t
2
CU10
CU11
3
4 3
5 4
2 2 6 5
7 6
n
8 7
9 8
10 9
I2C0_SDA_EC 11 10
e
<31,32,43> I2C0_SDA_EC I2C0_SCL_EC 11
12
<31,32,43> I2C0_SCL_EC 12
13
AMP_I2S_MCLK 14 13
<31,32> AMP_I2S_MCLK AMP_I2S_BCLK 15 14
<31,32> AMP_I2S_BCLK I2S_LRCK 15
id
16
<31,32> I2S_LRCK I2S_OUT 17 16
<31,32> I2S_OUT I2S_DATA_OUT 18 17
<31,32> I2S_DATA_OUT CODEC_MUTE# 19 18
<32> CODEC_MUTE# LID_SW# 20 19
<37,43> LID_SW# WOOFER_SEL 21 20
f
<43> WOOFER_SEL 22 21
USB20_N2 23 22
<19> USB20_N2 USB20_P2 24 23
<19> USB20_P2 25 24
25
n
USB3RN4 26
<19> USB3RN4 27 26 31
USB3RP4
<19> USB3RP4 28 27 GND 32
USB3TN4 29 28 GND 33
<19> USB3TN4 30 29 GND 34
USB3TP4
o
<19> USB3TP4 30 GND
ACES_50473-0300M-P01
CONN@
A A
C Security Classification
Compal Secret Data
Title
Size
USB3.0/2.0 (TypeA+IO/B)
Document Number
LA-D753P
Rev
0.2

5 4 3 2 1
5 4 3 2 1
n l y D
<19>
<19>
USB3TP2
USB3TN2
2
CU31
2
CU30
1 USB3_CTX_C_DRX_P2
0.1U_0402_10V7K
1 USB3_CTX_C_DRX_N2 1
0.1U_0402_10V7K
4
LU7
HCM1012GD670A05P
3
2
USB3_CTX_C_L_DRX_P2
USB3_CTX_C_L_DRX_N2
<19>
<19>
USB3TP5
USB3TN5
USB3TP5
USB3TN5
2
CU39
2
CU38
1 USB3_CTX_C_DRX_P5
0.1U_0402_10V7K
1 USB3_CTX_C_DRX_N5 4
0.1U_0402_10V7K
1
LU10
2
HCM1012GD670A05P
USB3_CTX_C_L_DRX_P5
USB3_CTX_C_L_DRX_N5
H=1.4
+5V_USBC_VBUS
+5V_USBC_VBUS
r O
+5V_USBC_VBUS
e
EMI@ EMI@
150U_B15G_6.3VM_R70M
10U_0805_25V6K
2.2U_0603_25V6K
1
1 1 JUSBC2
CU40
CU37
CU32
+ A1 B12
GND GND
USB3_CTX_C_L_DRX_P2 A2 B11 USB3_CRX_L_DTX_P2
b
2 2 2 USB3_CTX_C_L_DRX_N2 A3 SSTXP1 SSRXP1 B10 USB3_CRX_L_DTX_N2
LU8 LU11
4 3 USB3_CRX_L_DTX_P2 1 2 USB3_CRX_L_DTX_P5 SSTXN1 SSRXN1
USB3RP2 USB3RP5
<19> USB3RP2 <19> USB3RP5
0.47U_0402_25V6K 2 1 CU18 A4 B9 CU20 1 2 0.47U_0402_25V6K
VBUS VBUS
1 2 USB3_CRX_L_DTX_N2 4 3 USB3_CRX_L_DTX_N5 USB3_CC1 A5 B8 USB3_RUF2
USB3RN2 USB3RN5
<19> USB3RN2 <19> USB3RN5 CC1 RFU2
HCM1012GD670A05P USB20_P8_CONN A6 B7 USB20_N8_CONN
HCM1012GD670A05P
USB20_N8_CONN A7 DP1 DN2 B6 USB20_P8_CONN
EMI@ EMI@
DN1 DP2
Bottom
USB3_RUF1 A8 B5 USB3_CC2
m
RFU1 CC2
TOP
Close to PinA4,A9,B4,B9 0.47U_0402_25V6K 2 1 CU19 A9
VBUS VBUS
B4 CU21 1 2 0.47U_0402_25V6K
LU9
1 2 USB20_P8_CONN USB3_CRX_L_DTX_N5 A10 B3 USB3_CTX_C_L_DRX_N5
<19> USB20_P8 USB3_CRX_L_DTX_P5 A11 SSRXN2 SSTXN2 B2 USB3_CTX_C_L_DRX_P5
SSRXP2 SSTXP2
e
C 4 3 USB20_N8_CONN +3VALW A12 B1 C
<19> USB20_N8 GND GND
MCM1012B900F06BP_4P
1
EMI@ 1 4
RU26 GND GND 6
10K_0201_1% +5V_USBC_VBUS 2 GND 3
USB20_P8_CONN 5 GND GND
GND
1
USB20_N8_CONN CONN@ JAE_DX07S024JJ5_24P-T
m
<43> TYPEC_DET# RU24
10K_0201_1%
2
1
D
2
2
G
ESD@
1
S
3
DU11
QU1 RU25
L30ESDL5V0C3-2_SOT23-3
2N7002W-T/R7_SOT323-3 20K_0201_1%
2
T
1
DU12
USB3_CTX_C_L_DRX_N2 1 9 USB3_CTX_C_L_DRX_N2
I
USB3_CRX_L_DTX_N2 4 7 USB3_CRX_L_DTX_N2
USB3_CRX_L_DTX_P2 5 6 USB3_CRX_L_DTX_P2
C
3
TVWDF1004AD0_DFN9
ESD@
r
+5VALW
Close to Pin2,3,4 USB3_CRX_L_DTX_N5

DU13
USB3_CRX_L_DTX_N5
1 2 1 9
o
USB3_CRX_L_DTX_P5 USB3_CRX_L_DTX_P5
47U_0603_6.3V6M
47U_0603_6.3V6M
47U_0603_6.3V6M
0.1U_0402_16V7K
RU12 2 8
0_0805_5% 1 1 1 1 USB3_CTX_C_L_DRX_N5 USB3_CTX_C_L_DRX_N5
CU44
CU42
CU33
CU34
B 4 7 B
2 2 2 2
+5V_USBC_VBUS
F
UU7
+3VALW 3
2
IN1 OUT
14 W=120 mils
3 15 TVWDF1004AD0_DFN9
4 IN1 OUT
IN2 ESD@
l
5
AUX 1 RU15 1 2 100K_0402_5%
FAULTb 20 RU16 1 2 100K_0402_5%
6 LD_DETb
<43> USBC_PWR_EN EN
0.1U_0402_16V7K
a
1 2 7 11 USB3_CC1
1 RU21 10K_0402_5%
CHG CC1 USB3_CC2
CU35
RU23 1 2 100K_0402_1% 8 13
CHG_HI CC2
i
2 16 RU17 1 2 100K_0402_5%
RU14 1 2 100K_0402_1% 10 DEBUGb 17 RU18 1 2 100K_0402_5%
REF AUDIOb 18 RU19 1 2 100K_0402_5%
POLb
t
19 RU20 1 2 100K_0402_5% DU20
9 UFPb USB3_CC1 2
12 GND1 21 2 1
GND2 powerpad USB3_CC2 3 1
3
TPS25810RVCR_QFN20_4X3 @ESD@
e n USB3_RUF1
USB3_RUF2
2
3
DU21
2
3
1
1
@ESD@
nf id A
Co 4 3 2
Compal Secret Data
Title
Size
Date:
1
LA-D753P
USB3.0/2.0 (TypeC)
Document Number
Tuesday, July 05, 2016 Sheet 36 of 82

Rev
0.2
5 4 3 2 1
D
+3.3V_F383
n l y D
0.1U_0402_16V4Z~D
22P_0402_50V8J~D
10P_0402_50V8J
1U_0402_6.3V
1 1 2
CE59
@RF@
CE1
CE3
CE4
+3.3V_F383
2
2 2 1 I2C_DAT 4.7K_0402_5% 2 1 RE1
O
I2C_CLK 4.7K_0402_5% 2 1 RE2
UE1
6 2 SPI_MOCLK
VDD P0.0 1 SPI_MOSO
4 P0.1 32 SPI_MOSI
r
+5VALW <19> USB20_P4 5 D+ P0.2 31 SPI_MOCS# I2C_CLK
<19> USB20_N4 D- P0.3 30 I2C_DAT
7 P0.4 29 I2C_CLK I2C_DAT <38,39,41> SPI_MOCLK
W=40 mils +3.3V_F383
8 REGIN P0.5 28 I2C_CLK <38,41>
10P_0402_50V8J
e
0.1U_0402_16V4Z~D VBUS P0.6 27 CALDERA_PRSNT# <41,43>
10P_0402_50V8J
P0.7 CDR_ON_ELC <41>
1
ELC_8051_C2CK_RST#
10P_0402_50V8J
1U_0402_6.3V
1 2 9
@RF@
@RF@
+3.3V_F383 ELC_8051_C2D_P3 RST#/C2CK SLP_S3
@RF@
CE57
CE58
1 1 10 26
P3.0/C2D P1.0
1
BATT_CHG_LED
CE60
CE6
CE7
@
RE7 25 10K_0402_5% 2 1 RE8 +3.3V_F383
2
P1.1
b
1K_0402_1%~D 18 24 ACIN#
<43> PCIE_GEN3#_GEN2 17 P2.0 P1.2 23 2 1
2
2 2 <43> AMD#_NV 16 P2.1 P1.3 22 BATT_LOW_LED LID_SW# <35,43>

DE1
15 P2.2 P1.4 21 SLP_S5 SDMK0340L-7-F_SOD323-2~D
14 P2.3 P1.5 20 RE651 1 2 0_0402_5%
13 P2.4 P1.6 19 CE9 @ 1 2 0.1U_0402_16V4Z~D TOBII_INT <34>
12 P2.5 P1.7
P2.6
m
11 3
P2.7 GND
+3.3V_F383 C8051F383-GQ_LQFP32_7X7
@
CE13
CE14
CE15
CE16
CE17
CE18
e
JELC
1
1 2
2 1 1 1 1 1 1
3
3 4
4 5
5 2 2 2 2 2 2
m
C 6 C
6
0.1U_0402_16V4Z~D
0.1U_0402_16V4Z~D
0.1U_0402_16V4Z~D
0.1U_0402_16V4Z~D
0.1U_0402_16V4Z~D
0.1U_0402_16V4Z~D
7
GND1 8
GND2
AMPHE_G846A06201EU
CONN@
UE2
SPI_MOSI SPI_MOSO
T
15_0402_5% 2 1 RE9 5 2 RE10 1 2 15_0402_5%
+3.3V_F383 DI SO
SPI_MOCLK 15_0402_5% 2 1 RE11 6
CLK
I
1 2 SPI_MOCS# 1
RE12 10K_0402_5%~D CS
1 2 7
RE13 10K_0402_5%~D HOLD
1 2 3
WP
C
RE14 10K_0402_5%~D
+3.3V_F383 8 4
+3.3V_F383 VCC VSS
0.1U_0402_16V4Z~D
22P_0402_50V8J~D
1 EN25Q80A-100HIP_SO8
1
CE19
CE20
1
RE15
r
100K_0402_5%
2
2
2
SLP_S3
o
3
+3.3V_F383
5
D
G QE1A
<18,43,45> PM_SLP_S3# S
DMN66D0LDW-7_SOT363-6
1
F
4
RE16
100K_0402_5%
l
2
SLP_S5
+3.3V_F383
3
B +3VALW +3.3V_F383 B
a
5
D
G QE4A
<18,43> PM_SLP_S5#
1
S
RE17
i
4
100K_0402_5% UE9
5 1
t
IN OUT
2
ACIN# 1 2 1 1
CE22 GND CE64 CE65
4.7U_0603_10V 4 3 1 2 0.1U_0402_16V7K 10U_0402_6.3V6M
EN OC +3VS
3
n
5 G
D
QE3A +3.3V_F383 2 SY6288C20AAC_SOT23-5 RE20 2 2
<43,62> VCIN1_AC_IN S
DMN66D0LDW-7_SOT363-6 10K_0402_5%
4
e
RE21
100K_0402_5%
<43> 3V_F383_ON
2
BATT_LOW_LED
id
+3.3V_F383
1
2
D
RE23 G QE3B
<43> BATT_LOW_LED#
100K_0402_5%
f
S
1
+3.3V_F383 behavior
2
BATT_CHG_LED
S0 S3 S4 S5
n
6
2 G
D
QE1B
AC IN (bat t ery l o w) ON ON ON ON
<43> BATT_CHG_LED# S
DMN66D0LDW-7_SOT363-6 AC IN (bat t ery f ull) ON ON ON OFF
o
1
BATT only ON ON OFF OFF
A A
C Security Classification
Compal Secret Data
Deciphered Date
2017/01/06 Title
Size
ELC (1) C8051F383
Document Number
LA-D753P
Rev
0.2

5 4 3 2 1
5 4 3 2 1
+5VALW To logo board

Change connector from 14pin to 16pin @12/16
1
ELC_EC#
AD0 1 <43> ELC_EC#

RE158
W=20 mils
+5VALW
5
10K_0402_5%
AD1 1
2
PWR_R_7313# PWR_R#
0.1U_0402_16V4Z
4 3
+3.3V_F383 +3.3V_F383 AD2 0 +3.3V_F383 1
1
QE22B
CE61
y
AD3 0 DMN66D0LDW-7_SOT363-6~D
1
RE157
2
l
RE25 1 1K_0402_1% JLOGO
4.7K_0402_1% CE24 1
6 2
UE3 0.1U_0402_16V4Z 2 1
2
1
1
ALIEN_LED_R_DRV# 3
2
D
RE40 RE43 24 27 2 ALIEN_LED_G_DRV# 4 3 D
n
4.7K_0402_1%~D 4.7K_0402_1%~D RESET Vcc QE22A ALIEN_LED_B_DRV# 5 4
3 ALIEN_LED_R_DRV# 2 DMN66D0LDW-7_SOT363-6~D LOGO_LED_R_DRV# 6 5
I2C_CLK 25 OUT0 4 ALIEN_LED_G_DRV# <43> PWR_R_EC LOGO_LED_G_DRV# 7 6
2
<37,39,41> I2C_CLK I2C_DAT 26 SCL OUT1 5 ALIEN_LED_B_DRV# LOGO_LED_B_DRV# 8 7
1
<37,39,41> I2C_DAT SDA OUT2 6 LOGO_LED_R_DRV# PANELL_LED_R_DRV# 9 8
AD0_0 31 OUT3 8 LOGO_LED_G_DRV# PANELL_LED_G_DRV# 10 9
AD1_0 A0 OUT4 LOGO_LED_B_DRV# PANELL_LED_B_DRV# 10
O
32 9 11
AD2_0 1 A1 OUT5 10 TP_LED_R# PANELR_LED_R_DRV# 12 11
AD3_0 2 A2 OUT6 11 TP_LED_G# +5VALW PANELR_LED_G_DRV# 13 12
A3 OUT7 14 TP_LED_B# PANELR_LED_B_DRV# 14 13
OUT8 14
1
12 15 PWR_R_7313# 15
N.C. OUT9 15
1
13 16 PWR_G_7313# ELC_EC# 16
r
RE42 RE44 28 N.C. OUT10 17 PWR_B_7313# 17 16
4.7K_0402_1%~D 4.7K_0402_1%~D 29 N.C. OUT11 19 RE156 18 GND
N.C. OUT12 GND
5
30 20 10K_0402_5%
2
N.C. OUT13 21 ACES_87212-1600L
2
OUT14
1
22 PWR_G_7313# 4 3 PWR_G#
OUT15 CONN@
RE31
10K_0402_5%~D 7 23
GND GND QE21B
1
18 33
GND GND
b
DMN66D0LDW-7_SOT363-6~D
To power board
2
RE155
TLC59116FIRHBR_VQFN32_5X5 1K_0402_1%
6 2
+5VALW_LED
m
QE21A JPWR
2 DMN66D0LDW-7_SOT363-6~D 1
AD0 0 <43> PWR_G_EC PWR_R#
PWR_G#
2
3
1
2 2
1
PWR_B# 3
e
4
AD1 0 <43> ON/OFF#
ON/OFF# 5
6
4
5
6
4
6
+3.3V_F383 +3.3V_F383 AD2 1 +3.3V_F383 +5VALW
G1
7
8
AD3 0 G2
G3
9
1
1
ELC_EC#
m
C 10 C
RE166 G4
1
4.7K_0402_1% CE168 RE154 ACES_87153-06411
5
UE8 0.1U_0402_16V4Z 10K_0402_5% CONN@
1
2
RE165 24 27 2 PWR_B_7313# 4 3 PWR_B#
4.7K_0402_1% RESET Vcc
3 TRONL_LED_R_DRV#
OUT0 QE13B
1
I2C_CLK TRONL_LED_G_DRV#
T
25 4
To Tron Light board X2
2
I2C_DAT 26 SCL OUT1 5 TRONL_LED_B_DRV# DMN66D0LDW-7_SOT363-6~D

SDA OUT2 6 TRONR_LED_R_DRV# RE160
AD0_2 OUT3 TRONR_LED_G_DRV#
I
31 8 1K_0402_1% Change connector from 6pin*4 to 12pin*2 @12/16
AD1_2 32 A0 OUT4 9 TRONR_LED_B_DRV#
6 2
AD2_2 1 A1 OUT5 10 PANELL_LED_R_DRV#
AD3_2 2 A2 OUT6 11 PANELL_LED_G_DRV#
A3 OUT7 14 PANELL_LED_B_DRV#
OUT8
1
12 15 PANELR_LED_R_DRV# QE13A
N.C. OUT9 PANELR_LED_G_DRV#
C
RE164 RE163 RE162 13 16 2 DMN66D0LDW-7_SOT363-6~D +5VS +5VS
28 N.C. OUT10 17 PANELR_LED_B_DRV# <43> PWR_B_EC
4.7K_0402_1% 4.7K_0402_1% 4.7K_0402_1%
29 N.C. OUT11 19 KB_LED_R5_DRV# W=20 mils W=20 mils
1
30 N.C. OUT12 20 KB_LED_G5_DRV# KB_LED_R5_DRV# <40>
2
N.C. OUT13 21 KB_LED_B5_DRV# KB_LED_G5_DRV# <40>

OUT14 KB_LED_B5_DRV# <40> 1 1
1
22 CE84 JTRONL CE86 JTRONR
r
RE167 OUT15 0.1U_0402_16V4Z 1 0.1U_0402_16V4Z 1
7 23 2 1 2 1
10K_0402_5%~D GND GND TRONL_LED_R_DRV# 2 TRONR_LED_R_DRV# 2
18 33 2 3 2 3
GND GND TRONL_LED_G_DRV# 4 3 TRONR_LED_G_DRV# 4 3
Power LED
2
4 4
o
TRONL_LED_B_DRV# 5 TRONR_LED_B_DRV# 5
TLC59116FIRHBR_VQFN32_5X5 6 5 6 5
7 6 7 6
+5VALW TRONL_LED_R_DRV# 8 7 TRONR_LED_R_DRV# 8 7
TRONL_LED_G_DRV# 9 8 TRONR_LED_G_DRV# 9 8
TRONL_LED_B_DRV# 9 TRONR_LED_B_DRV# 9
F
+5VALW 10 10
11 10 11 10
+5VS 11 +5VS 11
1
12 12
W=20 mils W=20 mils
TP LED re-driver RE28
100K_0402_5% CE85
1
13
12
CE87
1
13
12
l
0.1U_0402_16V4Z 14 GND 0.1U_0402_16V4Z 14 GND
GND GND
3
S
QE8
2
+5VS_TP_LED Power_LED 2
G 2 ACES_50450-0127N-001 2 ACES_50450-0127N-001
B B
CONN@ CONN@
a
+3VS
1
LP2301ALT1G 1P SOT-23-3
6
R144 TP_LED_B#_DRV# D
i
1
2
D
2.2K_0402_5% G
QE4B
<43> PWR_LED#
1
S
t
6
R146 +5VALW_LED
2
1
2.2K_0402_5% TP_LED_B#_DRV 2 G
D
S Q28B
2
1
3
n
TP_LED_B# 5 G
D
S Q28A
4
+3VS
+5VS_TP_LED
id e Touchpad LED circuit To touchpad module

1
+5VS_TP_LED
R150 TP_LED_G#_DRV# Q2409
2.2K_0402_5% SI3456DDV-T1-GE3_TSOP6~D JTP
1
B+_BIAS +5VS +5VS_TP_LED 1

1
6
R154 2
f
2
TP_LED_G#_DRV 2
D
2.2K_0402_5% 2
D
6 TP_LED_B#_DRV# 3
S
G
TP_LED_G#_DRV# 3
300K_0402_5%~D
S Q29B 5 4 4
4
2
TP_LED_R#_DRV#
0.1U_0402_16V4Z
DMN66D0LDW-7_SOT363-6 2 5
2
5
3
R179
1U_0402_6.3V
1 1 6
TP_LED_G# 6
n
C29
5 7
D
1
G
G
7
C2508
S Q29A +3VS +3VS_TOUCH 8
3
DMN66D0LDW-7_SOT363-6 9 8
4
2 10 9
2 1 2 11 10
o
EN_TPLED TP_CLK 12 11
+5VS_TP_LED <43> TP_CLK TP_DATA 13 12
R2
0.1U_0402_10V6K
1 <43> TP_DATA 13
L2N7002WT1G 1N SC-70-3
1.5M_0402_5%~D
0.1U_0402_25V6K~D
1 0_0603_5% 14
14
1
D PCH_SMBCLK
R180
C2
15
<14,15,18,33> PCH_SMBCLK 15
1
+3VS PCH_SMBDATA
C2509
2 @ 16
TP_LED_R#_DRV# <43> TP_LED_EN 2 <14,15,18,33> PCH_SMBDATA 16
A R145 G A
C
2.2K_0402_5% Q2410 S 2 17
3
GND
1
18
2
GND
6
R147
2
2.2K_0402_5% TP_LED_R#_DRV 2 G
D
ACES_51522-01601-P01
S Q34B CONN@
2
1
3
TP_LED_R# 5 G
D
S Q34A
4

ELC (2) TP/PW/LOGO/TRON
5 4 3 2 1
5 4 3 2 1
KB Backlight
D
+3.3V_F383 +3.3V_F383
AD0 0
AD1 1
AD2 0
+3.3V_F383
n l y D
O
1 RE32
4.7K_0402_1%
AD3 0
UE4
1
CE25
0.1U_0402_16V4Z
1
r
2
RE26 24 27 2
4.7K_0402_1%~D RESET Vcc
3 KB_LED_R1_DRV#
e
25 OUT0 4 KB_LED_G1_DRV#
<38,41> I2C_CLK
2
26 SCL OUT1 5 KB_LED_B1_DRV#

<37,38,41> I2C_DAT SDA OUT2 6 KB_LED_R2_DRV#
AD0_1 OUT3 KB_LED_G2_DRV#
b
31 8
AD1_1 32 A0 OUT4 9 KB_LED_B2_DRV#
AD2_1 1 A1 OUT5 10 KB_LED_R3_DRV#
AD3_1 2 A2 OUT6 11 KB_LED_G3_DRV#
A3 OUT7 14 KB_LED_B3_DRV#
OUT8
1
12 15 KB_LED_R4_DRV#
m
13 N.C. OUT9 16 KB_LED_G4_DRV#
4.7K_0402_1% RE30
4.7K_0402_1% RE27
RE29 28 N.C. OUT10 17 KB_LED_B4_DRV#

4.7K_0402_1%~D 29 N.C. OUT11 19
N.C. OUT12
e
30 20
2
N.C. OUT13 21
OUT14
1
RE37 22
OUT15
10K_0402_5%
7 23
18 GND GND 33
m
C GND GND C
2
TLC59116FIRHBR_VQFN32_5X5
KB BL LED 1
JKBBL
I T
C
2 1
KB_LED_R1_DRV# 3 2
KB_LED_G1_DRV# 4 3
KB_LED_B1_DRV# 5 4
r
KB_LED_R2_DRV# 6 5
KB_LED_G2_DRV# 7 6
KB_LED_B2_DRV# 8 7
KB_LED_R3_DRV# 9 8
o
KB_LED_G3_DRV# 10 9
KB_LED_B3_DRV# 11 10
KB_LED_R4_DRV# 12 11
KB_LED_G4_DRV# 13 12
F
KB_LED_B4_DRV# 14 13
15 14
+5VS 15
16
17 16
l
18 17
19 18 21
B 20 19 GND 22 B
a
20 GND
ACES_50552-02001-P01
i
CONN@
n t
id e
nf
A
2016/01/06
Compal Secret Data
2017/01/06 Title
A

ELC (3) KBBL
0.2
5 4 3 2 1
A B C D E
QE54,QE55,QE56 change to SB000018700

+5VALW +5VALW
1
+3VALW +3VALW +3VALW +3VALW
RE449 RE517
l
10K_0201_1% 10K_0201_1%
2
1
4
1 1
E1
E2
RE469 RE470 RE475 RE477
1M_0201_1% 1M_0201_1% 1M_0201_1% 1M_0201_1% 2B1 QE54A 5 QE54B
BC857BS_SOT363-6 B2 BC857BS_SOT363-6
C1
C2
n
3
KSI0 <43> KSI1 <43> KSI10 <43> KSI11 <43>
1
RE511 JKSO0 RE514 JKSO1
RE471 RE474 RE476 RE480
3
6
10K_0201_1% 10K_0201_1%
JKSI0 1 2 5 QE42B JKSI1 1 2 2 QE42A JKSI10 1 2 5 QE43B JKSI11 1 2 2 QE43A
2
MMDT3904-7-F_SOT363-6 MMDT3904-7-F_SOT363-6 MMDT3904-7-F_SOT363-6 MMDT3904-7-F_SOT363-6
1
6
10K_0201_1% 10K_0201_1% 10K_0201_1% 10K_0201_1%
4
1
2 2
D D
RE473 RE472 RE478 RE479 G QE49B G QE50B
O
1M_0201_1% 1M_0201_1% 1M_0201_1% 1M_0201_1% S DMN66D0LDW-7_SOT363-6 S DMN66D0LDW-7_SOT363-6
1
2
3
1 2 5 1 2 5
D D
G G
<43> KSO0 S
<43> KSO1 S
1
RE513 QE49A RE516 QE50A
4
1K_0201_1% RE512 DMN66D0LDW-7_SOT363-6 1K_0201_1% RE515 DMN66D0LDW-7_SOT363-6
r
1M_0201_1% 1M_0201_1%
2
e
1
1
RE464 RE463 RE481 RE483
1M_0201_1% 1M_0201_1% 1M_0201_1% 1M_0201_1%
b
2
2
KSI2 <43> KSI3 <43> KSI12 <43> KSI13 <43> +5VALW +5VALW
RE466 RE467 RE482 RE486

3
6
1
1
10K_0201_1% 10K_0201_1% 10K_0201_1% 10K_0201_1%
4
1
RE468 RE465 RE484 RE485
m
1M_0201_1% 1M_0201_1% 1M_0201_1% 1M_0201_1% RE521 RE525
10K_0201_1% 10K_0201_1%
2
2
1
4
E1
E2
2B1
e
QE55A 5 QE55B
2 BC857BS_SOT363-6 B2 BC857BS_SOT363-6 2
C1
C2
6
3
1
1
RE518 JKSO2 RE522 JKSO3
10K_0201_1% 10K_0201_1%
1
2
6
6
m
RE459 RE457 RE487 RE489
2 2
D D
1M_0201_1% 1M_0201_1% 1M_0201_1% 1M_0201_1% G QE51B G QE52B
S DMN66D0LDW-7_SOT363-6 S DMN66D0LDW-7_SOT363-6
2
1
KSI4 <43> KSI5 <43> KSI14 <43> KSI15 <43>
3
1 2 5 1 2 5
D D
G G
<43> KSO2 S
<43> KSO3 S
RE461 RE460 RE488 RE492
3
1
RE520 QE51A RE524 QE52A
4
JKSI4 1 2 5 QE40B JKSI5 1 2 2 QE40A JKSI14 1 2 5 QE45B JKSI15 1 2 2 QE45A 1K_0201_1% RE519 DMN66D0LDW-7_SOT363-6 1K_0201_1% RE523 DMN66D0LDW-7_SOT363-6
MMDT3904-7-F_SOT363-6 MMDT3904-7-F_SOT363-6 MMDT3904-7-F_SOT363-6 MMDT3904-7-F_SOT363-6 1M_0201_1% 1M_0201_1%
1
1
10K_0201_1% 10K_0201_1% 10K_0201_1% 10K_0201_1%
T
4
1
RE462 RE458 RE490 RE491
2
1M_0201_1% 1M_0201_1% 1M_0201_1% 1M_0201_1%
I
2
2
NUM
+5VALW
1
1
E2
QE56B RE636
5 BC857BS_SOT363-6 1.1K_0402_1%
RE452 RE451 RE493 RE494 B2
C2
1M_0201_1% 1M_0201_1% 1M_0201_1% 1M_0201_1%
2
1
2
3
r
3
RE529
KSI6 <43> KSI7 <43> KSI16 <43> KSI17 <43>
1 2 5
D
10K_0201_1% G
<43> NUM_LED S
1
RE637 QE57A
4
RE455 RE454 RE495 RE498
3
E1
1K_0201_1% RE638 DMN66D0LDW-7_SOT363-6
JKSI6 1 2 5 QE39B JKSI7 1 2 2 QE39A JKSI16 1 2 5 QE46B JKSI17 1 2 2 QE46A 2B1 QE56A 1M_0201_1%
o
MMDT3904-7-F_SOT363-6 MMDT3904-7-F_SOT363-6 MMDT3904-7-F_SOT363-6 MMDT3904-7-F_SOT363-6 BC857BS_SOT363-6
1
C1
10K_0201_1% 10K_0201_1% 10K_0201_1% 10K_0201_1%
4
2
RE456 RE453 RE497 RE496
6
1
3 1M_0201_1% 1M_0201_1% 1M_0201_1% 1M_0201_1% 3
RE526 JKSO4
2
2
10K_0201_1%
6
CAPS
2
D
G QE53B
S DMN66D0LDW-7_SOT363-6
1
1
+3VALW +3VALW +3VALW +3VALW RE639
3
l
1.1K_0402_1%
1 2 5
D
G
<43> KSO4
1
1
S
2
1
RE528 QE53A
4
RE398 RE400 RE500 RE499 1K_0201_1% RE527 DMN66D0LDW-7_SOT363-6
6
1M_0201_1% 1M_0201_1% 1M_0201_1% 1M_0201_1% 1M_0201_1%
a
1 2 2
D
G QE57B
2
2
<43> CAPS_LED S DMN66D0LDW-7_SOT363-6
1
RE640
1
KSI8 <43> KSI9 <43> KSI18 <43> KSI19 <43>
1K_0201_1% RE641
i
1M_0201_1%
RE396 RE399 RE502 RE503
3
2
t
1
1
10K_0201_1% 10K_0201_1% 10K_0201_1% 10K_0201_1%
4
1
RE397 RE401 RE504 RE501 +5VALW
1M_0201_1% 1M_0201_1% 1M_0201_1% 1M_0201_1%
JKB
1
n
2
2
NUM 2 1
CAPS 3 2
Hot Key Conn.

JKSO4 4 3
4
JKSO3
JKSO2
5
6 5
Hot Key Conn.
PWM
6
e
JKSO1 7
7
+3VALW +3VALW JKSO0
JKSI21
JKSI20
8
9
10
8
9
10
Key Pad
1
1
JKSI19 11 JKB3
JKSI18 12 11 +5VS 10
RE505 RE506 JKSI17 13 12 G4 9 JKB2
id
1M_0201_1% 1M_0201_1% JKSI16 14 13 G3 8 1 2
JKSI15 15 14 G2 7 KSO5 3 1 2 4 KSO5
2
15 G1 <43> KSO5 KSI0_R 3 4 KSI0_R

JKSI14 16 KSI0 RE630 1 2 100K_0201_1% 5 6
17 16 6 1 2 KSI5_R 7 5 6 8 KSI5_R
JKSI13 KSI5 RE631 100K_0201_1%
KSI20 <43> KSI21 <43> 17 6 6 KSI1_R 7 8 KSI1_R
JKSI12 18 5 KSI1 RE632 1 2 100K_0201_1% 9 10
19 18 KB_LED_R5_DRV# 4 5 1 2 KSI4_R 11 9 10 12 KSI4_R
JKSI11 KSI4 RE633 100K_0201_1%
20 19 <38> KB_LED_R5_DRV# KB_LED_G5_DRV# 3 4 4 1 2 KSI2_R 13 11 12 14 KSI2_R
JKSI10 KSI2 RE634 100K_0201_1%
RE507 RE510 20 <38> KB_LED_G5_DRV# KB_LED_B5_DRV# 3 KSI3_R 13 14 KSI3_R
3
4 JKSI9 21 2 KSI3 RE635 1 2 100K_0201_1% 15 16 4
f
1 2 5 1 2 2 22 21 <38> KB_LED_B5_DRV# 1 2 2 17 15 16 18
JKSI20 QE48B JKSI21 QE48A JKSI8 GND GND
MMDT3904-7-F_SOT363-6 MMDT3904-7-F_SOT363-6 JKSI7 23 22 1 GND 19 17 18 20 GND
1
10K_0201_1% 10K_0201_1% JKSI6 24 23 ACES_87153-06411 19 20

4
RE509 RE508 JKSI5 25 24 CONN@ ACES_50611-0100N-001_10P

1M_0201_1% 1M_0201_1% JKSI4 26 25 CONN@
JKSI3 27 26
n
JKSI2 28 27
2
JKSI1 29 28 32
JKSI0 30 29 GND 31
30 GND
ACES_50552-03001-P01
CONN@
Co B C D
Compal Secret Data
Title
Size
Date:
E
LA-D753P
ELC (4) NKRO KB
Document Number

Rev
0.2
5 4 3 2 1
+5VALW
1
RM91
+5VALW 549_0402_1%
2
CDRA_LED WHITE_R
1
RM92
+3VALW 100K_0402_5%~D
l
CDRA_LED WHITE 20 mils
3
S
2
0.1U_0402_10V7K
CDRA_LED WHITE_R 20 mils
G
D 2 D
CM70
QM1
6
QM2B
D
1
2@ 2 G
D
<43> CDRA_LED WHITE_MOS S

CDRA_LED WHITE
5
1
1
P
+3VALW <43> CDR_TXRX_GOOD B 4
O CDR_ON_ELC <37>
2
G
A
Caldera connector
1
+5VALW
3
O
RM41 TC7SH08FU_SSOP5~D
1
100K_0402_5% UM7 +5VALW
JCDRA RM93
2
1 100_0402_1%
CALDERA_ON <43>
1
Caldera_ON 2
Caldera_PWRGD 3 PEG_CTX_C_GRX_P8 CALDERA_ PWRGD <43> 221 ohm for white LED RM94
2
T0+ PEG_CTX_C_GRX_N8 PEG_CTX_C_GRX_P8 <7> CDRA_LED RED_R
1
T0-
4
5 PEG_CTX_C_GRX_N8 <7> 316 ohm for red LED 100K_0402_5%~D
r
GND PEG_CTX_C_GRX_P9 on dock cable side
3
S
6 RM42
CDRA_LED RED 20 mils
2
T1+ 7 PEG_CTX_C_GRX_N9 PEG_CTX_C_GRX_P9 <7> 2
G
470K_0402_5%
T1- PEG_CTX_C_GRX_N9 <7>
8 CDRA_LED RED_R 20 mils
2
GND 9 PEG_CTX_C_GRX_P10
QM3
T2+ 10 PEG_CTX_C_GRX_N10 PEG_CTX_C_GRX_P10 <7>
T2- PEG_CTX_C_GRX_N10 <7>
3
e
11 +3VALW QM2A
D
1
GND 12 PEG_CTX_C_GRX_P11 +3VALW 5 G
D
0.1U_0402_10V7K
T3+ 13 PEG_CTX_C_GRX_N11 PEG_CTX_C_GRX_P11 <7> <43> CDRA_LED RED_MOS S
T3- PEG_CTX_C_GRX_N11 <7> CDRA_LED RED
14 1 DMN66D0LDW-7_SOT363-6
4
CRX_P8
1
GND 15 2 1
CM23
R0+ 16 CRX_N8
RM5
R0- 17 RM6
10K_0402_5%
b
GND 18 CRX_P9 2
@ 10K_0402_5%
R1+ 19 CRX_N9
UM3
5
R1- 20
GND 21 CALDERA_PRSNT# 1
P
CALDERA_PRSNT# 22 CDRA_RST# CALDERA_PRSNT# <37,43> 4 B CALDERA_RST# <43>
PLTRST# 23 O 2
GND CRX_P10 A PCH_PLTRST# <17,46>
G
24
R2+ 25 CRX_N10
TC7SH08FU_SSOP5
3
R2- 26
BUTTON# 27 CDRA_LED WHITE CDR_BTN# <43>
m
LED_WHITE CDRA_LED RED
2
28
LED_RED 29 RM17
GND 30 CRX_P11
R3+ CRX_N11 100K_0402_5%
31
R3- 32
1
GND CLK_PCIE_DGPU_C
e
33
C REFCLK+
REFCLK-
GND
34
35
36
CLK_PCIE_DGPU#_C
USB3RN3_C 2 1 CI38
PCIE_CLK_BUFFER C
0.1U_0402_10V6K
SSTX+ 37 USB3RP3_C 2 1 CI39 USB3RN3 <19>
0.1U_0402_10V6K
SSTX- 38 USB3RP3 <19> +3VS
LM1
GND 39 USB20_P3_CONN 3 4
USBD+ 40 USB20_N3_CONN USB20_P3 <19> +3VS +3VS
USBD- 41 2 1
0.1U_0402_10V7K
0.1U_0402_10V7K
GND 42 2 1
CM16
CM17
SSRX+ USB3TN3 <19> USB20_N3 <19> 1 1
1
m
43 RM18 CM19
SSRX- USB3TP3 <19>
1
44 MCM1012B900F06BP_4P 2.2_0402_1% 22U_0603_6.3V6M
GND 45 EMI@ RM21 RM96 RM20
I2C_CLK <37,38,39>
2
I2C_CLK 46 1K_0402_1% 4.7K_0402_5% 1K_0402_1% 2 2
I2C_DATA 47 I2C_DAT <37,38,39>
@
GND 48
2
GND 49 UM4
GND 50 1 20
GND 2 PLL_BW_SEL VDDA 19
<17> CLK_PCIE_P6 3 SRCIN GNDA 18 RM25 2 1 475_0402_1%
<17> CLK_PCIE_N6 4 SRCIN# IRef 17
TE_2260531-1
OE_0# OE_1# CLKREQ#_DGPU <17,43>
5 16
T
CONN@ VDD VDD +3VS
+3VS 6 15
7 GND GND 14 2 1 CLK_PCIE_DGPU_C
CM98 1 2 0.01U_0402_16V7K
8 CLK0 CLK1 13 2 RM27 1 33_0402_1% CLK_PCIE_DGPU#_C
CM99 1 2 0.01U_0402_16V7K
9 CLK0# CLK1# 12 RM28 33_0402_1%
I
10 VDD VDD 11
0.1U_0402_10V7K
0.1U_0402_10V7K
1
1
SDATA SCLK
1U_0402_6.3V
49.9_0402_1%
RM29
49.9_0402_1%
RM38
CM18
CM20
1 1
1
CM21
PI6CEQ20200LIEX
2 2
2
2
2
r C <18,24>
<18,24>
SML0DATA
SML0CLK
o
+2.5VOUT
20mil
B B
0.1U_0402_10V7K
0.1U_0402_10V7K
0.1U_0402_10V7K
0.1U_0402_10V7K
0.1U_0402_10V7K
1 1 1 1 1
CM9
CM32
CM34
CM35
CM36
F
2 2 2 2 2
14
41
36
51
9
l
UM8
VDD
VDD
VDD
VDD
VDD
PEG_CRX_GTX_P11 1 2 PEG_CRX_C_GTX_P11 1 45 CRX_P11

CM64 0.22U_0201_6.3V
<7> PEG_CRX_GTX_P11 PEG_CRX_GTX_N11 PEG_CRX_C_GTX_N11 OUTB_0+ INB_0+ CRX_N11
CM65 1 2 0.22U_0201_6.3V 2 44
<7> PEG_CRX_GTX_N11 PEG_CRX_GTX_P8
CM67 1 2 0.22U_0201_6.3V
PEG_CRX_C_GTX_P8 3 OUTB_0- INB_0- 43 CRX_P8
EQ*MB DEM*EGPU
a
<7> PEG_CRX_GTX_P8 PEG_CRX_GTX_N8 PEG_CRX_C_GTX_N8 OUTB_1+ INB_1+ CRX_N8
T
o
C
P
U
F
r
o
m
C
a
l
d
e
r
a
CM69 1 2 0.22U_0201_6.3V 4 42
<7> PEG_CRX_GTX_N8 PEG_CRX_GTX_P10 1 2 PEG_CRX_C_GTX_P10 5 OUTB_1- INB_1- 40 CRX_P10
CM68 0.22U_0201_6.3V +3VS
<7> PEG_CRX_GTX_P10 PEG_CRX_GTX_N10 1 2 PEG_CRX_C_GTX_N10 6 OUTB_2+ INB_2+ 39 CRX_N10
CM62 0.22U_0201_6.3V
<7> PEG_CRX_GTX_N10 PEG_CRX_GTX_P9 PEG_CRX_C_GTX_P9 OUTB_2- INB_2- CRX_P9
CM63 1 2 0.22U_0201_6.3V 7 38 1 @ 2 1 @ 2
i
<7> PEG_CRX_GTX_P9 PEG_CRX_GTX_N9 PEG_CRX_C_GTX_N9 OUTB_3+ INB_3+ CRX_N9 +3VS +3VS
CM66 1 2 0.22U_0201_6.3V 8 37 RM76 1K_0201_1% RM26 1K_0201_1%
<7> PEG_CRX_GTX_N9 OUTB_3- INB_3-
10 35 1 2 EQA1 1 2 EQB1 1 2 DEMB1
INA_0+ OUTA_0+
t
11 34 RM70 1K_0201_1% RM23 1K_0201_1% RM86 1K_0201_1%
12 INA_0- OUTA_0- 33 1 @ 2
13 INA_1+ OUTA_1+ 32 RM62 1K_0201_1%
INA_1- OUTA_1- +3VS
15 31
16 INA_2+ OUTA_2+ 30
17 INA_2- OUTA_2- 29
18 INA_3+ OUTA_3+ 28
n
2
INA_3- OUTA_3-
+3VS
54 DEMB1 RM61 RM66
EQA1 19 DEMB1/AD0 53 DEMB0 20K_0402_5% 1K_0201_1% 1 @ 2 1 @ 2
EQA1 DEMB0/AD1 CALDERA_PRSNT# +3VS +3VS
EQA0 20 52 2 1 RM81 1K_0201_1% RM85 1K_0201_1%
21 EQA0 PRSNT 50
1
RATE DEMA1/SCL EC_SMB_CK2 <18,42,43,46,58>
e
+3VS 22 49 1 2 EQA0 1 2 EQB0 1 @ 2 DEMB0
RXDET DEMA0/SDA EC_SMB_DA2 <18,42,43,46,58>
48 RM84 1K_0201_1% RM82 1K_0201_1% RM79 1K_0201_1%
ENSMB 47 EQB1 1 2
+3VS
W=20 mils 23
LPBK
EQB1/AD2
EQB0/AD3
46 EQB0 RM75 1K_0201_1%
1
24
25 VIN RM64
VGA_EN VGA_EN VDD_SEL
10U_0603_6.3V6M
10U_0603_6.3V6M
1 2 26 1K_0201_1%
id
SD_TH/READ_EN
1U_0402_6.3V
1U_0402_6.3V
27 55 @
RM14 ALL_DONE DAP_GND
1 1 1 1
2
1
1
CM29
CM30
CM31
CM33
1K_0201_1%
RM87 RM72
10K_0201_5% 10K_0201_5% DS80PCI402SQNOPB_WQFN54_10X5P5
@ 2 2 2 2
2
A A
nf Tie 1kΩ t o VDD = Regi st er Access S MBus Sl ave mode

FLOAT = Read External EEPROM (Master SMBUS Mode)
Tie 1kΩ t o GND = Pi n Mode
Co 4 3 2
Compal Secret Data
Deciphered Date
2017/01/06 Title
Size
Date:
1
LA-D753P
Caldera Docking
Document Number

Rev
0.2
5 4 3 2 1
+3VS +5VS
22U_0603_6.3V6M
y
CF4
10K_0402_5%
10K_0402_5%
10K_0402_5%
2
2
RF1
RF2
RF3
l
D D
1
JFAN1
1
n
2 1
<43> CPU_FAN_PWM 2 1 3 2
<43> CPU_FAN_FB 3
DF1 4
SDMK0340L-7-F_SOD323-2 5 4
6 G1
G2
ACES_50278-00401-001
CPU FAN Control circuit CONN@
+3VS +5VS
r O
22U_0805_6.3VAM
1
CF5
10K_0402_5%
10K_0402_5%
10K_0402_5%
2
2
2
RF4
RF5
RF6
b
Fintek thermal sensor---> CPU core, DIMM
1
JFAN2
1
2 1
+3VS <43> GPU_FAN_PWM 2 1 3 2
+3VS <43> GPU_FAN_FB 4 3
DF2
SDMK0340L-7-F_SOD323-2 5 4
1
6 G1
R181 G2
1
C2498 U2407 10K_0402_5% ACES_50278-00401-001
m
0.1U_0402_10V6K @ CONN@
GPU FAN Control circuit
2
2 1 10 EC_SMB_CK2
VCC SCL EC_SMB_CK2 <18,41,43,46,58>
2 9 EC_SMB_DA2
REMOTE1+
DP1 SDA EC_SMB_DA2 <18,41,43,46,58>
e
C REMOTE1- 1 2 REMOTE2- 3 8 C
R184 0_0402_5% DN ALERT#
REMOTE2+ 4 7
DP2 THERM#
REMOTE3+ 5 6 1 2 REMOTE3-
DN3 DP3 GND/DN3 R185 0_0402_5%
F75305M_MSOP10
2nd source
SA000029210-->EMC1403-2-AIZL-TR
Address 1001_101xb
T m
Close U2407 REMOTE1+ TOP CPU PWR
C I
1
REMOTE1+ C
1 @ C2500 2 Q2407
2200P_0402_25V7K B S TR METR3904W-G NPN SOT323-3
2
C2502 E
3
2200P_0402_25V7K REMOTE1-
2 REMOTE1-
REMOTE1,2 (+/-) :
r
REMOTE2+ Trace width/space:10/10 mil
1
BOTTOM GPU PWR
C2504
REMOTE2+
Trace length:<8"
1
2200P_0402_25V7K C
2
o
REMOTE2- @ C2505 2 Q2408
2
E
3
B REMOTE3+ REMOTE2- B
1
C2510
F
2200P_0402_25V7K
2 REMOTE3-
REMOTE3+ Reserved
1
C
@ C2511 2 Q2411
2
l
E
3
REMOTE3-
t ia
e n
A
nf id A
Co 4 3 2
Compal Secret Data
Title
Size
Date:
1
LA-D753P
FAN/Thermal
Document Number

Rev
0.2
5 4 3 2 1
00.SD028000080 0_0402_5%
01.SD034120280 12K_0402_1%
02.SD034150280 15K_0402_1% RE66 NVSKL@ RE66 NVKBL@
+3VALW
03.SD028200280 20K_0402_1% DVT1-build
Power ON circuit 04.SD034270280 27K_0402_1%
2
05.SD034330280 33K_0402_1% RE64
+3VLP 06.SD034430280 43K_0402_1% Ra 100K_0402_1% S RES 1/16W 20K +-1% 0402 S RES 1/16W 43K +-1% 0402
EMI@
LE1 +EC_VCCA 07.SD034560280 56K_0402_1% SD028200280 SD034430280
1
+3VALW AD_BID
FBMA-L11-160808-800LMT_0603 08.SD034750280 75K_0402_1%
Board ID
2
RE66 AMDSKL@ RE66 AMDKBL@
09.SD034100380 100K_0402_1%
l
RE63 1 2 +EC_VCCA
1
2
100K_0402_5% 1
CE29
1
CE30
2
@EMI@
2
@EMI@
------------------------------------------- RE66 CE28
SW1 1 Rb
D 1 0.1U_0402_10V7K 0.1U_0402_10V7K CE31 CE32 +3VLP CE33 10.SD034130380 130K_0402_1% 0_0402_1%
2
0.1U_0402_10V7K D
n
1000P_0402_50V7K 1000P_0402_50V7K 0.1U_0402_10V7K @
1 2 ON/OFF# 2 2 1 1 11.SD034160380 160K_0402_1% S RES 1/16W 240K +-1% 0402 S RES 1/16W 430K +-1% 0402
1
ON/OFF# <38> 2
ECAGND
12.SD034200380 200K_0402_1%
SD000001B80 SD028430380
TST71A-N-220-S017 SPST H0.6 2P
ECAGND <61> 13.SD000001B80 240K_0402_1%
1 14.SD00000G280 270K_0402_1%
O
15.SD034330380 330K_0402_1%
111
125
CE27
22
33
96
67
9
0.1U_0402_16V7K UE5
2 16.SD028430380 430K_0402_1%
VCC0
VCC_LPC
VCC
VCC
VCC
VCC
AVCC
17.SD034560300 560K_0402_1%
r
18.SD00000AL80 750K_0402_1%
1 21
<20> DGPU_PWR_EN 1 2 2 GATEA20/GPIO00 EC_VCCST_PG/GPIO0F 23 CDRA_LED WHITE_MOS <41> +3VALW
e
<19> KB_RST# 3 KBRST#/GPIO01 BEEP#/GPIO10 26 BEEP# <31>
RE646 0_0201_5%
<19> SERIRQ 4 SERIRQ EC_FAN_PWM/GPIO12 27 CPU_FAN_PWM <42>
<19> LPC_FRAME# LPC_FRAME# PWM Output AC_OFF/GPIO13 GPU_FAN_PWM <42>
1
47K_0402_5%
5
<19> LPC_AD3 LPC_AD3
RE530
@EMI@ @EMI@ 7 CE35 2 1 100P_0402_50V8J ECAGND UE10
<19> LPC_AD2 LPC_AD2 EC_ESB_CLK
b
CE36 RE89 8 63 1 13
<19> LPC_AD1 10 LPC_AD1 VCIN1_BATT_TEMP/AD0/GPIO38 64 VCIN_ BATT_TEMP <61,62> ESB_CLK TEST_EN#
0.1U_0402_10V7K 0_0402_5% LPC & MISC
2 1 1 2 <19> LPC_AD0 LPC_AD0 VCIN1_BATT_DROP/AD1/GPIO39 65 PCIE_WAKE# <18,30> 2 14 EN_WOL#
ADP_I <61,62> <32> SPEAKER_SEL EN_WOL# <30>
2
12 ADP_I/AD2/GPIO3A 66 AD_BID GPIO00 GPIO08/CAS_DAT
<19> CLK_PCI_LPC CLK_PCI_EC AD Input AD_BID/AD3/GPIO3B
13 75 USBCHG_DET_EC# <35>
3 15
<6,17,28,29,30,56> PCIRST# 37 PCIRST#/GPIO05 AD4/GPIO42 76 RST# GPIO09 NVVDD1_EN <46,49,69>
1 EC_RST# AD5/GPIO43 ENBKL <24> EC_ESB_DAT
ESD@ 20 4 16
m
<20> EC_SCI# EC_SCI#/GPIO0E ESB_DAT GPIO0A FBVDD/Q_EN <46,73>
0.1U_0402_16V7K~D
CE34 38 2
<18> PM_SLP_SUS# CLKRUN#/GPIO1D 5 17
0.047U_0402_16V4Z
2 <36> USBC_PWR_EN GPIO01 GPIO0B PEX_VDD_EN <68>
CE63
68
DA0/GPIO3C 70 EN_INVPWR <25> 6 18
e
DA Output EN_DFAN1/DA1/GPIO3D TBT_PCIE_WAKE# <56> 1 <38> ELC_EC# GPIO02 GPIO0C/PWM0 TYPEC_DET# <36>
55 71
+3VALW <40> KSI0 56 KSI0/GPIO30 DA2/GPIO3E 72 ME_SUS_PWR_ACK <18> 7 19
<40> KSI1 57 KSI1/GPIO31 DA3/GPIO3F LCD_TEST <25> <35> WOOFER_SEL GPIO03 GPIO0D/PWM1 NVVDD2_EN <49,68,72>
<40> KSI2 58 KSI2/GPIO32 83 8 20
GPU_OVERT# <40> KSI3 KSI3/GPIO33 EC_MUTE#/PSCLK1/GPIO4A I2C0_SCL_EC <31,32,35> <58> PD_RESET GPIO04 GPIO0E/PWM2 3V3_SYS_EN <49>
2 AMD@ 1 KSI4 59 84 I2C0_SDA_EC <31,32,35>
<40> KSI4 60 KSI4/GPIO34 USB_EN#/PSDAT1/GPIO4B 85 9 21
RE102 100K_0402_5% KSI5
<40> KSI5 KSI20 <40> <20,46> GC6_FB_EN
m
2 1 GPU_ALERT# KSI6 61 KSI5/GPIO35 PSCLK2/GPIO4C 86 GPIO05 GPIO0F/PWM3
C <40> KSI6 KSI6/GPIO36 PS2 Interface PSDAT2/GPIO4D TP_CLK KSI21 <40> C
RE644 100K_0402_5% KSI7 62 87 10 22
1 2 EN_WOL# <40> KSI7 39 KSI7/GPIO37 TP_CLK/GPIO4E 88 TP_DATA TP_CLK <38> <46> GPU_ALERT# GPIO06 GPIO10/ESB_RUN# 1V8_AON_EN <49>
<40> KSO0 40 KSO0/GPIO20 TP_DATA/GPIO4F TP_DATA <38> 11 23
RE79 10K_0402_5%
1 2 LID_SW# <40> KSO1 41 KSO1/GPIO21 <31> EC_MUTE# GPIO07/CAS_CLK GPIO11/BaseAddOpt
<40> KSO2 42 KSO2/GPIO22 97 12 24
RE70 10K_0402_5% KSO3
GND
USB_PWR_EN <40> KSO3 KSO3/GPIO23 ENKBL/GPXIOA00 SUSACK# <18> GND VCC +3VALW
1 2 43 98
<40> KSO4 KSO4/GPIO24 WOL_EN/GPXIOA01 EDP_SW <20,24>
0.1U_0402_16V4Z
T
RE645 10K_0402_5% 44 99
USBC_PWR_EN <40> KSO5 KSO5/GPIO25 Int. K/B ME_EN/GPXIOA02 ME_EN <18> 1
CE62
1 2 45 109 KC3810_QFN24_4X4
<40> KSI16 KSO6/GPIO26 Matrix VCIN0_PH1 <61>
W=60 mils
25
RE649 10K_0402_5% 46 VCIN0_PH1/GPXIOD00
<40> KSI17 KSO7/GPIO27
I
47 SPI Device Interface
<40> KSI8 48 KSO8/GPIO28 119 2
<40> KSI9 49 KSO9/GPIO29 MISO/GPIO5B 120 PWRSHARE_EN_EC# <35>
<40> KSI10 KSO10/GPIO2A MOSI/GPIO5C CDR_BTN# <41>
50 SPI Flash ROM SPICLK/GPIO58 126
<40> KSI11 51 KSO11/GPIO2B 128 3V_F383_ON CDRA_LED RED_MOS <41>
<40> KSI12 52 KSO12/GPIO2C SPICS#/GPIO5A 3V_F383_ON <37> +3VS_TOUCH
C
<40> KSI13 53 KSO13/GPIO2D
<40> KSI14 54 KSO14/GPIO2E 73
<40> KSI15 81 KSO15/GPIO2F EC_CIR_RX/AD6/GPIO40 74 SYS_PWROK PM_SLP_S4# <18,45,65> TP_CLK 2 1
<40> KSI18 82 KSO16/GPIO48 SYS_PWROK/AD7/GPIO41 89 SYS_PWROK <18>
4.7K_0402_5% RE100
+3VALW <40> KSI19 KSO17/GPIO49 GPIO50 90 PD_IRQ# <58> TP_DATA 2 1
r
BATT_CHG_LED#/GPIO52 91 BATT_CHG_LED# <37>
4.7K_0402_5% RE101
EC_SMB_CK1 77 CAPS_LED#/GPIO53 92 CAPS_LED <40>
RE90 GPIO
+3VS 5 4 EC_SMB_CK1 <61,62> EC_SMB_CK1 EC_SMB_DA1 78 EC_SMB_CLK1/GPIO44 PWR_LED#/GPIO54 93 PWR_LED# <38>
EC_SMB_DA1 <61,62> EC_SMB_DA1 EC_SMB_CK2 EC_SMB_DAT1/GPIO45 BATT_LOW_LED#/GPIO55 BATT_LOW_LED# <37>
6 3 79 95 SYSON
o
7 2 EC_SMB_CK2 <18,41,42,46,58> EC_SMB_CK2 EC_SMB_DA2 80 EC_SMB_CLK2/GPIO46 SYSON/GPIO56 121 SYSON <45,64>
8 1 EC_SMB_DA2 <18,41,42,46,58> EC_SMB_DA2 EC_SMB_DAT2/GPIO47 VR_ON/GPIO57 127 IMVP_VR_ON <45,75>
DPWROK_EC/GPIO59 PCH_DPWROK <18> 1
SM Bus 1
2.2K_0804_8P4R_5% ESD@ CE42
PM_SLP_S3# 6 100 CE38 0.1U_0402_10V7K
F
<18,37,45> PM_SLP_S3# PM_SLP_S5# 14 PM_SLP_S3#/GPIO04 EC_RSMRST#/GPXIOA03 101 EC_RSMRST# <18> 2
0.1U_0402_10V7K
<18,37> PM_SLP_S5# 15 GPIO07 GPXIOA04 102 VR_PWRGD <75> 2
+3VALW <56> TBT_RESET_N_EC 16 GPIO08 VCIN1_ADP_PROCHOT/GPXIOA05 103 VCOUT1_PROCHOT# VCIN1_ADP_PROCHOT <61>
<61> PS_ID EC_ESB_CLK 17 GPIO0A VCOUT1_PROCHOT#/GPXIOA06 104
l
EC_ESB_DAT 18 GPIO0B VCOUT0_MAIN_PWR_ON/GPXIOA07 105 VCOUT0_MAIN_PWR_ON# <63>
ESD@
1 2 EC_ESB_CLK 19 GPIO0C BKOFF#/GPXIOA08 106 BKOFF# <25> LID_SW# 1 2
<17,41> CLKREQ#_DGPU AC_PRESENT/GPIO0D GPIO GPO GPXIOA09 PBTN_OUT# <9,18>
RE642 4.7K_0402_5% 25 107 2 1 CE43 0.1U_0402_10V7K
1 2 EC_ESB_DAT <38> TP_LED_EN 28 PWM2/GPIO11 PCH_PWR_EN/GPXIOA10 108 PCH_PWR_EN <45,66>
RE74 43_0402_1% ESD@
a
B <42> CPU_FAN_FB FAN_SPEED1/GPIO14 PWR_VCCST_PG/GPXIOA11 CALDERA_ON <41> B
RE643 4.7K_0402_5% 29 PCH_PWROK 1 2
<42> GPU_FAN_FB EC_TX 30 FANFB1/GPIO15 CE44 0.1U_0402_10V7K
<28> EC_TX
i
2 1 PCH_PWROK EC_RX 31 EC_TX/GPIO16 110 ESD@
<28> EC_RX PCH_PWROK 32 EC_RX/GPIO17 VCIN1_AC_IN/GPXIOD01 112 VCIN1_AC_IN <18,37,61,62> SYS_PWROK 1 2
RE75 10K_0402_5% 2
3V_F383_ON <18> PCH_PWROK EC_RTCRST PCH_PWROK/GPIO18 EC_ON/GPXIOD02 EC_ON <63>
t
2 1 34 114 ON/OFF# EMI@ CE46 0.1U_0402_10V7K
RE83 10K_0402_5% NUM_LED 36 SUSP_LED#/GPIO19 ON/OFF#/GPXIOD03 115 LID_SW# CE40
<40> NUM_LED NUM_LED#/GPIO1A GPI LID_SW#/GPXIOD04 LID_SW# <35,37>
116 100P_0402_50V8J
SUSP#/GPXIOD05 117 SUSP# <29,45,56,64,67,79> 1
GPXIOD06 118 PECI_KB9012 USB_PWR_EN
1 <35> 2
n
122 PECI/GPXIOD07 H_PECI <9,16>
2 1 PM_SLP_S3# <66> +1VALWP_PGOOD 123 PBTN_OUT#/GPIO5D 124 1 2
+V18R +3VALW RE76
<9,45> H_VCCST_PWRGD PM_SLP_S4#/GPIO5E V18R/VCC_IO2 43_0402_1% UE6
EC_ESB_CLK
AGND
e
CE41 ESD@ RE24 1 13
GND
GND
GND
GND
GND
0.1U_0402_10V7K 0_0603_5% ESB_CLK TEST_EN#

2 14 TS_EN
PM_SLP_S5# <18> PCH_RTCRST# <31> DEPOP#_EC GPIO00 GPIO08/CAS_DAT TS_EN <25>
2 1 KB9022QD_LQFP128_14X14
11
24
35
94
113
69
RST# 3 15
id
RST# GPIO09 CALDERA_ PWRGD <41>
CE45 ESD@
1
0.1U_0402_10V7K D ECAGND 2 1 EC_ESB_DAT 4 16

2 EC_RTCRST ESB_DAT GPIO0A CALDERA_RST# <41>
QE5
2N7002W-T/R7_SOT323-3 G LE2 +3VALW 5 17
Please close to EC W=20 mils <37,41> CALDERA_PRSNT# GPIO01 GPIO0B TOBII_PWR_EN# <34>
1
FBMA-L11-160808-800LMT_0603
f
S
3
47K_0402_5%
RE650 6 18
<38> PWR_R_EC GPIO02 GPIO0C/PWM0 CDR_TXRX_GOOD <41>
1
10K_0402_5%
7 19
RE91
<35> CTL1 GPIO03 GPIO0D/PWM1 DGPU_PWROK <20>
JEC
n
2
KSO3 1 8 20
1 <35> CTL2 GPIO04 GPIO0E/PWM2 AMD#_NV <37>
KSI6 2
2
KSI7 3 2 9 21
4 3 <46> EC_AC_BAT# GPIO05 GPIO0F/PWM3 GPU_OVERT# <46>
KSI4 RST#
4
o
KSI5 5 10 22
+3VS EC_TX 5 <38> PWR_G_EC GPIO06 GPIO10/ESB_RUN# PWR_B_EC <38>
0.1U_0402_16V7K~D
<9,61,62> H_PROCHOT# 6
EC_RX 7 6 11 23
7 2 <37> PCIE_GEN3#_GEN2 GPIO07/CAS_CLK GPIO11/BaseAddOpt
8
8 W=60 mils
CE55
1
RE78 12 24
GND
GND VCC +3VALW
1 2 RE84
C
<75> VR_HOT#
0.1U_0402_16V4Z
9 1
A 10K_0402_5% GND1 1 A
CE56
0_0402_5% 10 KC3810_QFN24_4X4
25
GND2
2
1
D
ACES_50521-0084N-P01
QE2 2 1 2 VCOUT1_PROCHOT# 2
CONN@
2N7002W-T/R7_SOT323-3 G
S 1 RE85
Reserve for abnormal shutdown
3
CE51 53.6K_0402_5%
0.033U_0402_25V @
1 2 EC_RSMRST#
2 <61,63> POK
DE2 RB751V-40_SOD323-2
@
PCH_PWROK
1 2 2016/01/06 2017/01/06 Title
DE3 RB751V-40_SOD323-2
@
PCH_DPWROK THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
EC ENE-KB9022
1 2 AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DE4 RB751V-40_SOD323-2 0.2
5 4 3 2 1
5 4 3 2 1
Fiducial Mark PCB Screw Hole
n l y D
FD1
@ FIDUCAL
FD2
@ FIDUCIAL
FD3
@ FIDUCAL
FD4
@ FIDUCIAL
H1
H_3P8
@
H2
H_3P8
@
H3
H_3P6
@
H4
H_3P8
@
H5
H_3P8
@
H6
H_3P0
@
H7
H_3P8
@
r O
1
1
1
e
H8 H9 H10 H11 H12 H13 H14
H_3P0 H_3P0 H_3P0 H_3P6 H_3P0 H_3P6X4P2 H_3P0
@ @ @ @ @ @ @
b
1
1
H15 H16 H17 H18 H19 H20 H21
H_3P0 H_3P0 H_3P0 H_3P0 H_3P0 H_3P0 H_3P0
@ @ @ @ @ @ @
m
1
1
e
H22 H23
H_3P0 H_4P1X3P6
@ @ Scew hole: H8,H9,H14,H15 do not have sloder paste
1
m
C C
I T
r C
Fo
B
ia l B
n t
id e
nf
A
Co A

Screw Hole
0.2
5 4 3 2 1
A B C D E
+5VS and +3VS switch

20mohm/6A per channel
1
+5VALW
1
2
U17
VIN1
VIN1
VOUT1
VOUT1
14
13
5VS 2
@
J4
2 1
1
+5VS
+VCCST switch
4.4mohm/6A
TR=12.5us@Vin=1.05V
n l y 1
0.1U_0402_10V7K
10U_0402_6.3V6M
10U_0603_6.3V6M
C2506 JUMP_43X79
SUSP# R182 1 2 0_0402_5% 5VS_GATE 3 12 1 2 +1VALW
<29,43,56,64,67,79> SUSP# ON1 CT1 1 1 1
C2523
C256
C257
220P_0402_50V8J
4 11 U19 +VCCST
W=10 mils VBIAS GND
O
C2507 1
R174 1 2 10K_0402_5% 3VS_GATE 5 10 1 2 2 2 2 2 VIN1
ON2 CT2 470P_0402_50V7K +5VALW VIN2
6 9 3VS +5VALW 7 6
1 VIN2 VOUT2 VIN thermal VOUT
C258 +3VALW 7 8
VIN2 VOUT2 1 1
r
0.1U_0402_16V7K 3
1U_0402_6.3V6K
1 VBIAS
15 +3VS C2521 C6
2 GPAD
C4
@ 0.1U_0402_10V7K 4 5 0.1U_0402_10V7K
AOZ1331_SON14_2X3 J5 2 ON GND 2
e
2 1 2
2 1 TPS22961DNYR_WSON8
0.1U_0402_10V7K
10U_0402_6.3V6M
10U_0603_6.3V6M
JUMP_43X79
+5VALW +3VALW +5VALW
1 1 1
C2524
C260
C261
SYSON
<43,64> SYSON
2 2 2
0.1U_0402_10V7K
10U_0603_6.3V6M
0.1U_0402_10V7K
10U_0603_6.3V6M
0.1U_0402_10V7K
1 1 1 1 1
Main source TI S A00007XR00 ( S I C TPS22961 DNMR WS ON 8P L OAD S W I TCH)
m
2nd source  AOS S A00008A800 ( S I C AOZ1334 DI- 01 DF N 8P SI NGLE L OAD S W )
C2525
C262
C263
C264
C265
3rd source  E MC S A00008R600 ( S I C E M5201V DF N3X3 8P L OAD S W I TCH)
2 2 2 2 2
4st source  APEC S A00006V300 ( S I C APE8939 GN3 DF N 8P L OAD S W I TCH)
+3VALW
m e +VCCSTG switch
4.4mohm/6A
2
T
+3VALW_PCH switch +1VALW
TR=12.5us@Vin=1.05V
I
10U_0603_6.3V6M
0.1U_0402_10V7K
1 1 20mohm/6A per channel U20 +VCCSTG

C269
C270
+3V_PCH 1
2 VIN1
@ VIN2
2 2 U18 J6 +5VALW +5VALW 7 6
C
5 1 2 1 VIN thermal VOUT
IN OUT 2 1 1
1 3
VBIAS
0.1U_0402_10V7K
10U_0402_6.3V6M
10U_0603_6.3V6M
2 JUMP_43X79 1 C10
GND
1U_0402_6.3V6K
1 1 1 C2520 4 5 0.1U_0402_10V7K
W=10 mils ON GND 2
C2522
C266
C267
C7
4 3 1 2
r
<43,66> PCH_PWR_EN EN OC +3V_PCH 0.1U_0402_10V7K
2
SY6288C20AAC_SOT23-5 R367 2 TPS22961DNYR_WSON8
10K_0402_5% 2 2 2
1
C268
o
0.01U_0402_16V
2
SUSP#
l F Main source TI S A00007XR00 ( S I C TPS22961 DNMR WS ON 8P L OAD S W
3rd source  E MC S A00008R600 ( S I C E M5201V DF N3X3 8P L OAD S W

4st source  APEC S A00006V300 ( S I C APE8939 GN3 DF N 8P L OAD S W
I TCH)
2nd source  AOS S A00008A800 ( S I C AOZ1334 DI- 01 DF N 8P SI NGLE L OAD S W
I TCH)
I TCH)
)
a
3 3
add for power down sequence For meet tPLT17 & tCPU28 power down sequence.
i
IMVP_VR_ON <43,75> tPLT17 : 1us (Max)
t
tCPU28 : 1us (Max)
6
Q7A
+1.2V_VCCPLL_OC switch
n
2 @
For meet tPLT15 power down sequence(Un-Stuf f)
tPLT15 : 1us (Max) 22mohm/4A
1
e TR=520us@Vin=0.8V
+3VALW
+3VALW
id
+1.2V_DDR +1.2V_VCCPLL_OC
1
R307 SYSON UZ21

H_VCCST_PWRGD <43>
100K_0402_1% R325
@ 100K_0402_1% 1 8
VIN VOUT
3
@ 2 7
f
2
Q7B Q9B VIN VOUT

1
2
DMN65D8LDW-7_SOT363-6 DMN65D8LDW-7_SOT363-6 SUSP# 3 6 C3 1 2

PM_SLP_S3_H 5 @ PM_SLP_S4_H 5 @ EN CT @ C11
4 5 2200P_0402_25V7K 0.1U_0402_10V7K
n
+5VALW VBIAS GND
6
9 2
4
Q9A GND
1
6
DMN65D8LDW-7_SOT363-6 APE8937GN2_DFN8_2X2
Q8A 2 @ C2518
o
DMN65D8LDW-7_SOT363-6 <18,43,65> PM_SLP_S4#
0.1U_0402_10V7K
PM_SLP_S3# 2 2
1
<18,37,43> PM_SLP_S3# +5VALW

SUSP#
1
@ 1
C
3
4 C2519 4
Q8B 0.1U_0402_10V7K
DMN65D8LDW-7_SOT363-6 2
5 @
4

DC/DC Interface
0.2
A B C D E
5 4 3 2 1
+1V8_AON
UG9 +1V8_AON
1 2 1
CG1
RG3 0.1U_0201_6.3V6K 1
10K_0201_5% CG483
5
2
S IC N17E-G1 BGA 2152 GPU 0.1U_0201_6.3V6K
SA00009PM0L
GND VCC
DGPU_HOLD_RST#
5
N17EG1@ 1 2 +1V8_AON
<20> DGPU_HOLD_RST# IN B 4 1 2 SYS_PEX_RST_MON#
@
GND VCC
PCH_PLTRST# 2 OUT Y 1
UG9 RG537 0_0201_5%
<17,41> PCH_PLTRST# <49,73> +1.35VS_VGA_PGOOD
1
IN A IN B 4 2 1 UG9A
NVVDD1_PGOOD OUT Y
2
UG10 RG562 2 RG1 0_0201_5% 1/23 PCI_EXPRESS
NL17SZ08DFT2G_SC70-5 IN A RG2 +PEX_VDD
100K_0402_5%
3
@ UG29 10K_0201_5%
NL17SZ08DFT2G_SC70-5 BB33
3
DGPU_PEX_RST# DGPU_PEX_RST#_R
2
1 2 BK26 PEX_DVDD_1 BB35
S IC N17E-G2 BGA 2152 GPU
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
10U_0603_6.3V6M
22U_0805_6.3V6M
1
4.7U_0603_6.3V6M
4.7U_0603_6.3V6M
SA00009PR0L RG4 0_0201_5% PEX_RST* PEX_DVDD_2 BB36
CG6
y
PEX_CLKREQ# PEX_DVDD_3 1 1 1 1 1 1 2 1
1
N17EG2@ +3V3_SYS 1 3 BL26 BC33
CG2
CG3
CG4
CG5
CG7
CG13
CG14
<17> CLKREQ#_GPU PEX_CLKREQ* PEX_DVDD_4 BC35
RG7
S
UG9 0_0201_5% QG510 BM26 PEX_DVDD_5 BC36
<17> CLK_PEG_GPU PEX_REFCLK PEX_DVDD_6 2 2 2 2 2 2 1 2
l
MESS138W-G_SOT323-3 BM27 BD33
<17> CLK_PEG_GPU# PEX_REFCLK* PEX_DVDD_7
1
BD36
2
D 1 2 0.22U_0201_6.3V PEG_CRX_GTX_P0_C BG26 PEX_DVDD_8 D
RG6 CG8
<7> PEG_CRX_GTX_P0 1 2 0.22U_0201_6.3V PEG_CRX_GTX_N0_C BH26 PEX_TX0
10K_0201_5% CG9
<7> PEG_CRX_GTX_N0 PEX_TX0*
@
S IC N17E-G3 BGA 2152 GPU DG1 BL27
Under GPU
2
SYS_PEX_RST_MON# 2 <7> PEG_CTX_C_GRX_P0 BK27 PEX_RX0
SA00009PS0L
n
<7> PEG_CTX_C_GRX_N0 PEX_RX0* +1V8_MAIN
N17EG3@
1 DGPU_PEX_RST# 1 2 0.22U_0201_6.3V PEG_CRX_GTX_P1_C BF26
CG10
DGPU_PEX_RST# <26,27> <7> PEG_CRX_GTX_P1 PEG_CRX_GTX_N1_C PEX_TX1
CG16 1 2 0.22U_0201_6.3V BE26 BB26
GPU_PEX_RST_HOLD# 3 <7> PEG_CRX_GTX_N1 PEX_TX1* PEX_HVDD_1 BB27
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
10U_0603_6.3V6M
10U_0603_6.3V6M
22U_0603_6.3V6M
4.7U_0603_6.3V6M
4.7U_0603_6.3V6M
BK29 PEX_HVDD_2 BB29
<7> PEG_CTX_C_GRX_P1 PEX_RX1 PEX_HVDD_3 1 1 1 1 1 1 2 2
1
BAT54A-7-F_SOT23-3 BL29 BB32
CG23
CG17
CG18
CG19
CG20
CG11
CG12
CG21
CG24
<7> PEG_CTX_C_GRX_N1 PEX_RX1* PEX_HVDD_4 BC26
@ PEG_CRX_GTX_P2_C PEX_HVDD_5
CG22 1 2 0.22U_0201_6.3V BF27 BC27
2
<7> PEG_CRX_GTX_P2 1 2 0.22U_0201_6.3V PEG_CRX_GTX_N2_C BG27 PEX_TX2 PEX_HVDD_6 BC29 2 2 2 2 2 2 1 1
CG25
<7> PEG_CRX_GTX_N2 PEX_TX2* PEX_HVDD_7
O
BC30
BM29 PEX_HVDD_8 BC32
<7> PEG_CTX_C_GRX_P2 BM30 PEX_RX2 PEX_HVDD_9 BD27
<7> PEG_CTX_C_GRX_N2 PEX_RX2* PEX_HVDD_10 BD30
<7>
<7>
PEG_CRX_GTX_P3
PEG_CRX_GTX_N3
CG26
CG27
1
1
2 0.22U_0201_6.3V
2 0.22U_0201_6.3V
PEG_CRX_GTX_P3_C
PEG_CRX_GTX_N3_C
BG29
BH29 PEX_TX3
PEX_TX3*
PEX_HVDD_11
Under GPU
BL30
r
<46,49> 1V8_MAIN_EN <7> PEG_CTX_C_GRX_P3 PEX_RX3
BK30
<7> PEG_CTX_C_GRX_N3 PEX_RX3*
+3VS 1 2 0.22U_0201_6.3V PEG_CRX_GTX_P4_C BF29
CG28
<7> PEG_CRX_GTX_P4 PEG_CRX_GTX_N4_C PEX_TX4
CG29 1 2 0.22U_0201_6.3V BE29
<43,46> GPU_OVERT# <7> PEG_CRX_GTX_N4 PEX_TX4*
e
BK32
<7> PEG_CTX_C_GRX_P4
1
+1V8_MAIN BL32 PEX_RX4
RG534
1 2 0.22U_0201_6.3V PEG_CRX_GTX_P5_C BF30
10K_0201_1% CG30
+1V8_AON <7> PEG_CRX_GTX_P5 1 2 0.22U_0201_6.3V PEG_CRX_GTX_N5_C BG30 PEX_TX5
+3VS RB751S40T1G_SOD523-2 CG31
<7> PEG_CRX_GTX_N5 PEX_TX5* +PEX_PLL_HVDD
1
DG7 BB30 1 2
+1V8_MAIN
2
RG533 BM32 PEX_PLL_HVDD
b
1V8_MAIN_EN 2 NVVDD1_EN <7> PEG_CTX_C_GRX_P5 PEX_RX5
1
100K_0201_5% 1 2 1 BM33 1 LG1

NVVDD1_EN <43,49,69> <7> PEG_CTX_C_GRX_N5 PEX_RX5*
RG561 CG34 PBY160808T-301Y-N
1 2 0.22U_0201_6.3V PEG_CRX_GTX_P6_C BG32
10K_0201_5% CG32 0.1U_0201_6.3V6K
<7> PEG_CRX_GTX_P6
2
PEG_CRX_GTX_N6_C PEX_TX6
2
6
D
G
DG3 CG33 1 2 0.22U_0201_6.3V BH32

2 <7> PEG_CRX_GTX_N6 PEX_TX6* 2
UG23A RB751S40T1G_SOD523-2
2
GPU_GC6_FB_EN 3 1 GC6_FB_EN G 1 2 BL33

BSS138DW_SC88-6
GC6_FB_EN <20,43> <7> PEG_CTX_C_GRX_P6 PEX_RX6
BK33
S
RG549 100K_0402_5%
<7> PEG_CTX_C_GRX_N6
3
D PEX_RX6*
S
1
PEG_CRX_GTX_P7_C
1
QG511 OVERT# 5 UG23B CG481 CG35 1 2 0.22U_0201_6.3V BF32
G <7> PEG_CRX_GTX_P7 1 2 0.22U_0201_6.3V PEG_CRX_GTX_N7_C BE32 PEX_TX7
MESS138W-G_SOT323-3 BSS138DW_SC88-6 2200P_0402_25V7K CG36
m
<7> PEG_CRX_GTX_N7 PEX_TX7*
2
4 S BK35
+1V8_AON <7> PEG_CTX_C_GRX_P7 BL35 PEX_RX7
+1V8_AON BF33
1V8_MAIN_NVVDD2_EN PEX_TX8
e
1 2 BG33
C 1V8_MAIN_NVVDD2_EN <49> PEX_TX8* C
1
1 BM35
RG516 CG246 DG6 BM36 PEX_RX8
10K_0201_5% RB751S40T1G_SOD523-2 PEX_RX8*
0.1U_0201_6.3V6K
+3VS BG35
PEX_TX9
5
3
2 1 2 BH35
2
QG502B RG550 39K_0402_1% +1V8_AON PEX_TX9*

GND VCC
DGPU_PEX_RST# 1 BL36
DMN53D0LDW-7_SOT363-6 1
1
IN B 4 1 2 5 CG482 BK36 PEX_RX9
OUT Y PEX_RX9*
1
m
2 RG554 0_0201_5% RG506 0.047U_0402_16V4Z
IN A 10K_0201_5% RG500 BF35
UG22
4
2 10K_0201_5% BE35 PEX_TX10 22uF 10uF 4.7uF 1uF 0.1uF
PEX_TX10*
6
NL17SZ08DFT2G_SC70-5 DG4
3
2
QG502A RB751S40T1G_SOD523-2 BK38
2
RG553 DMN53D0LDW-7_SOT363-6 BL38 PEX_RX10
GPU_GC6_FB_EN 1 2 2 2 1 EDP_HPD_GPU# PEX_RX10* PEX_DVDD 1 1 2 4
NVVDD1_PGOOD <69,72> BF36
0_0201_5% 1 @ 2 BG36 PEX_TX11
1
NVVDD2_PGOOD <68,72> EDP_HPD <16,24,25>
3
RG508 0_0201_5% PEX_TX11*
QG500A
D
G 5 1 2 BM38 PEX_HVDD 1 2 2 4
EDP_HPD_GPU <24> PEX_RX11
DMN66D0LDW-7_SOT363-6 BM39
T
S RG507 0_0201_5%
PEX_RX11*
1
BG38
RG519 BH38 PEX_TX12
DGPU_PEX_RST# PEX_TX12*
100K_0201_5%
I
+1V8_AON BL39
QG501B BK39 PEX_RX12
2
PEX_RX12*
5
DMN53D0LDW-7 2N SOT363-6
BF38
ALERT# 4 3 BE38 PEX_TX13
1 GPU_ALERT# <43> PEX_TX13*
CG476
DGPU_ENVDD
2
0.1U_0201_6.3V6K QG501A BK41
DMN53D0LDW-7 2N SOT363-6 BL41 PEX_RX13
2 PEX_RX13*
C
OVERT# 1 6
GPU_OVERT# <43,46> BF39
PEX_TX14
5
+1V8_AON +3VS BG39

1 VCC PEX_TX14*
B 4 BM41
Y FBVDD/Q_EN <43,73>
1
2 BM42 PEX_RX14
<68> +1.0VS_VGA_PGOOD A DGPU_PEX_RST# PEX_RX14*
G RG502 RG517
1
10K_0201_5% 10K_0201_5% BH41
r
3
UG27 RG557 QG6B BG41 PEX_TX15

PEX_TX15*
5
2
G
74LVC1G32GW_TSSOP5 10K_0402_1% DMN53D0LDW-7 2N SOT363-6
2
BL42 BL44 PEX_TERMP 2 1
VGA_SMB_CK2 4 3 FRAME_LOCK# 3 1 BK42 PEX_RX15 PEX_TERMP
2
EC_SMB_CK2 <18,41,42,43,58> G-SYNC# <25> PEX_RX15*
D
RG23
2
QG6A 2.49K_0402_1%
o
DMN53D0LDW-7 2N SOT363-6 QG506
VGA_SMB_DA2 1 6 MESS138W-G_SOT323-3
EC_SMB_DA2 <18,41,42,43,58>
@ N17E-G1_BGA2152~D
B B
+1V8_AON
F
DGPU_PEX_RST# +1V8_AON
UG9W
13/23 MISC 1
1
l
RG530
1.8K_0402_1%
1.8K_0402_1%
VGA_SMB_CK2
1
OVERT# BG5 BJ8 10K_0201_5%

OVERT I2CS_SCL BH8 VGA_SMB_DA2
@
RG11
RG12
I2CS_SDA
2
BF12 QG7B
I2CC_SCL_R DP_CBL_DET#
5
TS_VREF BG9 DMN53D0LDW-7 2N SOT363-6 1 @ 2
a
2
I2CC_SCL BH9 I2CC_SDA_R +1V8_AON RG540 0_0201_5%

I2CC_SDA I2CC_SCL_R 4 3
I2CC_SCL <49>
6
2
BG8 1 2 1.8K_0402_5% 2
D
RG19 QG7A QG500B
i
G
I2CB_SCL BF8 1 2 1.8K_0402_5% DP_CBL_DET <26>
RG20 DMN53D0LDW-7 2N SOT363-6 DMN66D0LDW-7_SOT363-6 S
I2CB_SDA I2CC_SDA_R 1 6
I2CC_SDA <49>
1
t
BJ1
THERMDN
BJ2 +1V8_AON
THERMDP
GC6_EVENT#_D 1 2
RG8 10K_0201_5%
BD6
n
GPIO0 BB5 GPU_GC6_FB_EN 1 2NVVDD_VID <69> 1 2
@ OVERT# RG9 10K_0201_5%
GPIO1 GC6_EVENT#_D GPU_GC6_FB_EN_R <17>
BD1 RG563 0_0201_5% 2 1
GPIO2 BE4 GC6_EVENT# <20> DGPU_HOLD_RST# 1 2 +3VS
RG13 @ 10K_0201_5%
GPIO3 BE1 NVVDDS_VID <72>
DG2
GPIO4 FRAME_LOCK# 1V8_MAIN_EN <46,49> GPU_PEX_RST_HOLD#
BG2 RB751S40T1G_SOD523-2 RG14 1 2 10K_0201_5%
GPIO5
e
BD2 RG5661 2 0_0201_5%
GPIO6 GPU_INV_PWM NVVDD_PSI <69> EC_AC_BAT#
1
BD7 RG16 1 2 100K_0201_5% +3VS
JTAG_TCLK BK24 GPIO7 BH4 MEM_VDD_CTL
@ T10 PAD~D RG536
JTAG_TMS BL23 JTAG_TCK GPIO8 BJ3 MEM_VDD_CTL <73> VGA_SMB_CK2 1 2
@ T11 PAD~D ALERT# RG17 1.8K_0402_5% 10K_0201_5%
JTAG_TDI BM23 JTAG_TMS GPIO9 BD3 MEM_VREF
@ T12 PAD~D
JTAG_TDO DGPU_ENVDD MEM_VREF <52,53,54,55> VGA_SMB_DA2
1
@ T13 PAD~D BM24 JTAG_TDI GPIO10 BH3 RG18 1 2 1.8K_0402_5%
DGPU_ENVDD <24>
2
JTAG_TRST# BL24 JTAG_TDO GPIO11 BE6 RG535
id
JTAG_TRST* GPIO12 BB1 DGPU_ENBKL EC_AC_BAT# <43> SYS_PEX_RST_MON# 1 2
RG21 10K_0201_5% 100K_0201_5%
GPIO13 BG4 DGPU_ENBKL <24> DGPU_INV_PWM <24>
GPIO14 BG1 NVVDD_PSI 1 2
RG15 10K_0201_5%
2
SYS_PEX_RST_MON#
6
BK23 GPIO15 BE2 D
NVJTAG_SEL GPIO16 BH1 EDP_HPD_GPU# 1 2 NVVDDS_PSI 1 2 2
RG503 @ 10K_0201_5% UG24A
GPIO17 BE3 RG565 0_0201_5% G BSS138DW_SC88-6
GPIO18 DP_HPD_GPU# <26>
1
BD4 ALERT# RG504 1 2 10K_0201_5%

GPIO19
3
A BE5 RG5641 2 0_0201_5% D A
RG518 RG26 @
f
S
1
GPIO20 BA5 NVVDDS_PSI <72> GPIO3_OC_WARN# 1 2 GPU_INV_PWM 5
10K_0201_5% 10K_0201_5% RG522 10K_0201_5% UG24B
GPIO21 BB6 G
GPIO22 GPU_PEX_RST_HOLD# BSS138DW_SC88-6
BG3
2
GPIO23 BD5 DP_CBL_DET# GPU_GC6_FB_EN 1 2

RG22 100K_0201_5% S
4
GPIO24 BB2
GPIO25 BE7 MEM_VREF 1 2
RG24 100K_0201_5%
n
GPIO26 BA4
GPIO27 BB4 GPIO3_OC_WARN# HDMI_HPD_GPU# <27> DGPU_PEX_RST# 1 2
RG25 1M_0201_1%
GPIO28 BA3 GPIO3_OC_WARN# <49>
GPIO29 BB3 GPU_INV_PWM 1 2
RG150 100K_0201_5%
GPIO30 BA2
GPIO31 BA1 DGPU_ENVDD 1 2
RG151 100K_0201_5%
GPIO32
o
DGPU_ENBKL 1 2
RG501 100K_0201_5%
@ N17E-G1_BGA2152~D
N17E-G1(1/6) PCIE,GPIO
C
5 4 3 2 1
5 4 3 2 1
UG9V UG9U
11/23 MIOA 12/23 MIOB
AN9 AT3
UG9N MIOA_D0 AM2 MIOB_D0 AV6
MIOA_D1 AN7 MIOB_D1 AT2
7/23 IFPAB
MIOA_D2 AN6 MIOB_D2 AT1
MIOA_D3 AR1 MIOB_D3 AW6
MIOA_D4 AR6 MIOB_D4 AV2
DL-DVI DVI/HDMI DP
MIOA_D5 AR5 MIOB_D5 AV1
y
MIOA_D6 AM8 MIOB_D6 AV3
BH11 MIOA_D7 AN3 MIOB_D7 AW3
SDA SDA IFPA_AUX_SDA* MIOA_D8 MIOB_D8
l
SCL SCL
BG11 AR8 BA8
IFPA_AUX_SCL MIOA_D9 AR3 MIOB_D9 AW7
RG36 AM5 MIOA_D10 AR2 AV7 MIOB_D10 BB8
1K_0402_1% BF21 MIOA_CAL_PD_VDDQ MIOA_D11 MIOB_CAL_PD_VDDQ MIOB_D11
D
2 1 IFPAB_RSET BD23 TX C TX C IFPA_L3* BG21 AM6 AV8 D
n
IFPAB_RSET TX C TX C IFPA_L3 MIOA_CAL_PU_GND MIOB_CAL_PU_GND
TXD0 TXD0
BG23
IFPA_L2* BH23 AM7 AW9
TXD0 TXD0 IFPA_L2 MIOA_VREF MIOB_VREF
BD21
+1V8_MAIN IFPAB_PLLVDD
O
BF23
0.1U_0402_10V7K
TXD1 TXD1 IFPA_L1* BE23
1 TXD1 TXD1 IFPA_L1
CG312
AT7 BB7
BF24 MIOA_CTL3 AM1 MIOB_CTL3 AV5
r
TXD2 TXD2 IFPA_L0* MIOA_HSYNC MIOB_HSYNC
2 BG24 AR7 BA7
TXD2 TXD2 IFPA_L0 MIOA_VSYNC MIOB_VSYNC
AN1 AW2
MIOA_DE MIOB_DE
e
GP104 GP106
AN2 AW1
Under GPU BG12
MIOA_CLKOUT
AM3 MIOB UNUSED
MIOB_CLKOUT
AT6
b
SDA IFPB_AUX_SDA* BH12 MIOA_CLKIN MIOB_CLKIN
SCL IFPB_AUX_SCL
+PEX_VDD
@ N17E-G1_BGA2152~D @ N17E-G1_BGA2152~D
BL18
BB17 TX C IFPB_L3* BK18
BB15 IFP_IOVDD_2 TX C IFPB_L3
IFP_IOVDD_1
m
1U_0402_6.3V6K
0.1U_0402_10V7K
0.1U_0402_10V7K
4.7U_0603_6.3V6M
1 1 1 1 BB18 TXD3 TXD0

BK20 UG9O
BB20 IFP_IOVDD_3 IFPB_L2* BL20
CG311
CG310
CG309
CG308
6/23 IFPF
IFP_IOVDD_4 TXD3 TXD0 IFPB_L2
e
DVI/HDMI DP
2 2 2 2 BM20
TXD4 TXD1 IFPB_L1* BM21
TXD4 TXD1 IFPB_L1 BC21 SDA
BM9
BC23 IFP_IOVDD_11 IFPF_AUX_SDA* BM8
+PEX_VDD IFP_IOVDD_12 SCL IFPF_AUX_SCL
TXD5 TXD2
BL21
0.1U_0402_10V7K
IFPB_L0* BK21
TXD5 TXD2 IFPB_L0 1
m
BK11
CG40
C TXC C
IFPAB IFPF_L3* BL11
Under GPU
TXC IFPF_L3
2 BM11
TXD0 IFPF_L2*
@ N17E-G1_BGA2152~D TXD0
BM12
IFPF_L2
TXD1
BL12
IFPF_L1* BK12
T
TXD1 IFPF_L1
Under GPU IFPF

TXD2 IFPF_L0*
BK14
I
TXD2
BL14
IFPF_L0
UG9R
RG37 8/23 IFPC
1K_0402_1% @ N17E-G1_BGA2152~D
C
2 1 IFPCD_RSET BD20
IFPCD_RSET
DVI/HDMI DP
22uF 10uF 4.7uF 1uF 0.1uF
+IFPX_PLLVDD BD18 BL9
SDA HDMI_CTRLDAT <27>
r
IFPCD_PLLVDD IFPC_AUX_SDA* BK9
SCL IFPC_AUX_SCL HDMI_CTRLCLK <27>
IFPx_IOVDD 2 4
0.1U_0402_10V7K
1
BF17
CG47
TXC IFPC_L3* TMDS_TXCN <27>
o
TXC
BE17 TMDS_TXCP <27>
IFPC_L3
2 BF18 TMDS_TX0N <27> IFPx_PLLVDD 1 2
IFPC
TXD0
TXD0
IFPC_L2*
IFPC_L2
BG18
TMDS_TX0P <27> HDMI 2.0 UG9P
F
TXD1 BG20 TMDS_TX1N <27> 10/23 IFPE
IFPC_L1* BH20
TXD1 IFPC_L1 TMDS_TX1P <27> DVI/HDMI DP
RG38
Under GPU TXD2 IFPC_L0*
BF20
BE20
TMDS_TX2N <27>
2
1K_0402_1%
1 IFPEF_RSET BD17 BL8
l
TXD2 IFPC_L0 TMDS_TX2P <27> IFPEF_RSET SDA IFPE_AUX_SDA* mDP_AUX#_SDA <26>
SCL BK8
+1V8_MAIN +IFPX_PLLVDD IFPE_AUX_SCL mDP_AUX_SCL <26>
B +PEX_VDD BB21
IFP_IOVDD_5 Under GPU B
a
BB23 BG14
IFP_IOVDD_6 TXC IFPE_L3* GPU_mDP_N3 <26>
1 2 BD15 BH14
GPU_mDP_P3 <26>
0.1U_0402_10V7K
IFPEF_PLLVDD TXC IFPE_L3

1
i
@ N17E-G1_BGA2152~D LG5 BF14
CG48
GPU_mDP_N2 <26>
22U_0603_6.3V6M
0.1U_0402_10V7K
mini DP
TXD0 IFPE_L2*
PBY160808T-300Y-N_2P 1 TXD0 BE14 GPU_mDP_P2 <26>
IFPE_L2
1
t
CG49
CG247
2 BF15
TXD1 IFPE_L1* GPU_mDP_N1 <26>
UG9Q TXD1 BG15 GPU_mDP_P1 <26>
2
9/23 IFPD 2 IFPE IFPE_L1
BG17
n
TXD2 IFPE_L0* GPU_mDP_N0 <26>
TXD2 BH17
IFPE_L0 GPU_mDP_P0 <26>
DVI/HDMI DP
Under GPU
e
BF11 BC18
SDA IFPD_AUX_SDA* GPU_AUXN/DDC <24> IFP_IOVDD_9
BE11 BC20
SCL IFPD_AUX_SCL GPU_AUXP/DDC <24> +PEX_VDD IFP_IOVDD_10
0.1U_0402_10V7K
4.7U_0402_6.3V6M
id
1 1
BM14
CG43
CG51
TXC IFPD_L3* GPU_TX3N <24>
TXC BM15 GPU_TX3P <24> @ N17E-G1_BGA2152~D
IFPD_L3
TXD0 IFPD_L2*
BL15
BK15
GPU_TX2N <24> eDP 2 2
f
TXD0 IFPD_L2 GPU_TX2P <24>
IFPD BK17
TXD1 IFPD_L1* GPU_TX1N <24>
TXD1 BL17
IFPD_L1 GPU_TX1P <24>
n
TXD2
BM17 GPU_TX0N <24>
IFPD_L0* BM18
TXD2 IFPD_L0 GPU_TX0P <24>
Under GPU
o
BC15
BC17 IFP_IOVDD_7
+PEX_VDD IFP_IOVDD_8
0.1U_0402_10V7K
4.7U_0402_6.3V6M
1 1
@ N17E-G1_BGA2152~D
CG42
CG53
C
A A
2 2
Under GPU Security Classification Compal Secret Data Compal Electronics, Inc.
N17E-G1(2/6) eDP,HDMI,mDP
5 4 3 2 1
5 4 3 2 1
n l y D
<52>
<52>
<52>
<52>
<52>
FBA_D0
FBA_D1
FBA_D2
FBA_D3
FBA_D4
U51
U48
U50
U49
R51
R50
UG9B
2/23 FBA
FBA_D0
FBA_D1
FBA_D2
FBA_D3
FBA_D4
FBA_CMD0
FBA_CMD1
FBA_CMD2
FBA_CMD3
FBA_CMD4
Y51
Y52
Y49
AA52
AA51
AA50
FBA_CMD1
FBA_CMD2
FBA_CMD0
FBA_CMD1
FBA_CMD2
FBA_CMD3
FBA_CMD4
<52>
<52>
<52>
<52>
<52>
<53>
<53>
<53>
<53>
<53>
FBB_D0
FBB_D1
FBB_D2
FBB_D3
FBB_D4
H32
D32
A33
B32
E32
G32
UG9C
3/23 FBB
FBB_D0
FBB_D1
FBB_D2
FBB_D3
FBB_D4
FBB_CMD0
FBB_CMD1
FBB_CMD2
FBB_CMD3
FBB_CMD4
B35
A35
D35
A36
B36
C36
FBB_CMD1
FBB_CMD2
FBB_CMD0
FBB_CMD1
FBB_CMD2
FBB_CMD3
FBB_CMD4
<53>
<53>
<53>
<53>
<53>
<54>
<54>
<54>
<54>
<54>
FBC_D0
FBC_D1
FBC_D2
FBC_D3
FBC_D4
C6
D6
A6
B6
B4
A4
UG9D
4/23 FBC
FBC_D0
FBC_D1
FBC_D2
FBC_D3
FBC_D4
FBC_CMD0
FBC_CMD1
FBC_CMD2
FBC_CMD3
FBC_CMD4
C11
B11
A11
D11
A12
B12
FBC_CMD1
FBC_CMD2
FBC_CMD0
FBC_CMD1
FBC_CMD2
FBC_CMD3
FBC_CMD4
<54>
<54>
<54>
<54>
<54>
<55>
<55>
<55>
<55>
<55>
FBD_D0
FBD_D1
FBD_D2
FBD_D3
FBD_D4
r O AK8
AK4
AK2
AK3
AK5
AK6
UG9E
5/23 FBD
FBD_D0
FBD_D1
FBD_D2
FBD_D3
FBD_D4
FBD_CMD0
FBD_CMD1
FBD_CMD2
FBD_CMD3
FBD_CMD4
AD2
AD1
AD4
AC1
AC2
AC3
FBD_CMD1
FBD_CMD2
FBD_CMD0
FBD_CMD1
FBD_CMD2
FBD_CMD3
FBD_CMD4
<55>
<55>
<55>
<55>
<55>
e
<52> FBA_D5 R47 FBA_D5 FBA_CMD5 AC50 FBA_CMD5 <52> <53> FBB_D5 J30 FBB_D5 FBB_CMD5 C38 FBB_CMD5 <53> <54> FBC_D5 B3 FBC_D5 FBC_CMD5 C12 FBC_CMD5 <54> <55> FBD_D5 AK9 FBD_D5 FBD_CMD5 AA3 FBD_CMD5 <55>
<52> FBA_D6 FBA_D6 FBA_CMD6 FBA_CMD6 <52> <53> FBB_D6 FBB_D6 FBB_CMD6 FBB_CMD6 <53> <54> FBC_D6 FBC_D6 FBC_CMD6 FBC_CMD6 <54> <55> FBD_D6 FBD_D6 FBD_CMD6 FBD_CMD6 <55>
U46 AC51 F32 B38 C4 C14 AK7 AA2
<52> FBA_D7 V46 FBA_D7 FBA_CMD7 AC52 FBA_CMD7 <52> <53> FBB_D7 H36 FBB_D7 FBB_CMD7 A38 FBB_CMD7 <53> <54> FBC_D7 D9 FBC_D7 FBC_CMD7 B14 FBC_CMD7 <54> <55> FBD_D7 AG4 FBD_D7 FBD_CMD7 AA1 FBD_CMD7 <55>
<52> FBA_D8 Y45 FBA_D8 FBA_CMD8 AC49 FBA_CMD8 <52> <53> FBB_D8 G36 FBB_D8 FBB_CMD8 D38 FBB_CMD8 <53> <54> FBC_D8 C9 FBC_D8 FBC_CMD8 A14 FBC_CMD8 <54> <55> FBD_D8 AF9 FBD_D8 FBD_CMD8 AA4 FBD_CMD8 <55>
<52> FBA_D9 Y47 FBA_D9 FBA_CMD9 AD52 FBA_CMD9 <52> <53> FBB_D9 J36 FBB_D9 FBB_CMD9 A39 FBB_CMD9 <53> <54> FBC_D9 E9 FBC_D9 FBC_CMD9 D14 FBC_CMD9 <54> <55> FBD_D9 AG6 FBD_D9 FBD_CMD9 Y1 FBD_CMD9 <55>
Y46 AD51 F36 B39 B9 A15 AG7 Y2
V50 AD50 F33 C39 B8 B15 AJ4 Y3
b
V47 AF50 D33 C41 A8 C15 AJ5 V3
<52> FBA_D13 U52 FBA_D13 FBA_CMD13 AF51 FBA_CMD13 <52> <53> FBB_D13 J32 FBB_D13 FBB_CMD13 B41 FBB_CMD13 <53> <54> FBC_D13 F6 FBC_D13 FBC_CMD13 C17 FBC_CMD13 <54> <55> FBD_D13 AJ6 FBD_D13 FBD_CMD13 V2 FBD_CMD13 <55>
V51 AF52 G33 A41 E6 B17 AG5 V1
AJ44 AN50 E45 B49 F18 B24 Y6 L3
<52> FBA_D16 FBA_D16 FBA_CMD16 FBA_CMD17 FBA_CMD16 <52> <53> FBB_D16 FBB_D16 FBB_CMD16 FBB_CMD17 FBB_CMD16 <53> <54> FBC_D16 FBC_D16 FBC_CMD16 FBC_CMD17 FBC_CMD16 <54> <55> FBD_D16 FBD_D16 FBD_CMD16 FBD_CMD17 FBD_CMD16 <55>
AG48 AN51 D45 A49 G18 A24 Y5 L2
<52> FBA_D17 FBA_D17 FBA_CMD17 FBA_CMD18 FBA_CMD17 <52> <53> FBB_D17 FBB_D17 FBB_CMD17 FBB_CMD18 FBB_CMD17 <53> <54> FBC_D17 FBC_D17 FBC_CMD17 FBC_CMD18 FBC_CMD17 <54> <55> FBD_D17 FBD_D17 FBD_CMD17 FBD_CMD18 FBD_CMD17 <55>
AJ45 AN52 F45 A48 E18 D23 V5 L1
<52> FBA_D18 AG49 FBA_D18 FBA_CMD18 AM49 FBA_CMD18 <52> <53> FBB_D18 G45 FBB_D18 FBB_CMD18 D47 FBB_CMD18 <53> <54> FBC_D18 H18 FBC_D18 FBC_CMD18 A23 FBC_CMD18 <54> <55> FBD_D18 Y4 FBD_D18 FBD_CMD18 M4 FBD_CMD18 <55>
AF46 AM52 D42 A47 D15 B23 AA6 M1
AF47 AM51 E42 B47 E15 C23 AA5 M2
AF48 AM50 F42 C47 G17 C21 AC5 M3
<52> FBA_D22 AD47 FBA_D22 FBA_CMD22 AK50 FBA_CMD22 <52> <53> FBB_D22 H41 FBB_D22 FBB_CMD22 C45 FBB_CMD22 <53> <54> FBC_D22 H17 FBC_D22 FBC_CMD22 B21 FBC_CMD22 <54> <55> FBD_D22 AC4 FBD_D22 FBD_CMD22 P3 FBD_CMD22 <55>
<52> FBA_D23 AD49 FBA_D23 FBA_CMD23 AK51 FBA_CMD23 <52> <53> FBB_D23 E41 FBB_D23 FBB_CMD23 B45 FBB_CMD23 <53> <54> FBC_D23 J15 FBC_D23 FBC_CMD23 A21 FBC_CMD23 <54> <55> FBD_D23 AD7 FBD_D23 FBD_CMD23 P2 FBD_CMD23 <55>
m
AD48 AK52 F39 A45 H15 D20 AC6 P1
AC46 AJ49 E39 D44 E14 A20 AF6 R4
AC47 AJ52 D39 A44 F14 B20 AD6 R1
<52> FBA_D27 AA47 FBA_D27 FBA_CMD27 AJ51 FBA_CMD27 <52> <53> FBB_D27 F38 FBB_D27 FBB_CMD27 B44 FBB_CMD27 <53> <54> FBC_D27 H11 FBC_D27 FBC_CMD27 C20 FBC_CMD27 <54> <55> FBD_D27 AF7 FBD_D27 FBD_CMD27 R2 FBD_CMD27 <55>
<52> FBA_D28 AA46 FBA_D28 FBA_CMD28 AJ50 FBA_CMD28 <52> <53> FBB_D28 E38 FBB_D28 FBB_CMD28 C44 FBB_CMD28 <53> <54> FBC_D28 G11 FBC_D28 FBC_CMD28 C18 FBC_CMD28 <54> <55> FBD_D28 AF8 FBD_D28 FBD_CMD28 R3 FBD_CMD28 <55>
AA45 AG50 D36 C42 F11 B18 AF2 U3
<52> FBA_D30 Y44 FBA_D30 FBA_CMD30 AG51 FBA_CMD30 <52> <53> FBB_D30 E36 FBB_D30 FBB_CMD30 B42 FBB_CMD30 <53> <54> FBC_D30 E11 FBC_D30 FBC_CMD30 A18 FBC_CMD30 <54> <55> FBD_D30 AF3 FBD_D30 FBD_CMD30 U2 FBD_CMD30 <55>
e
AW51 AG52 M50 A42 J29 D17 F4 U1
<52> FBA_D32 BA52 FBA_D32 FBA_CMD32 AF49 <53> FBB_D32 P48 FBB_D32 FBB_CMD32 D41 <54> FBC_D32 F30 FBC_D32 FBC_CMD32 A17 <55> FBD_D32 E1 FBD_D32 FBD_CMD32 V4
<52> FBA_D33 AW50 FBA_D33 FBA_CMD33 Y50 <53> FBB_D33 M51 FBB_D33 FBB_CMD33 C35 <54> FBC_D33 H29 FBC_D33 FBC_CMD33 A9 <55> FBD_D33 F3 FBD_D33 FBD_CMD33 AD3
<52> FBA_D34 BA51 FBA_D34 FBA_CMD34 AR50 <53> FBB_D34 M49 FBB_D34 FBB_CMD34 B50 <54> FBC_D34 G30 FBC_D34 FBC_CMD34 C24 <55> FBD_D34 F5 FBD_D34 FBD_CMD34 J3
<52> FBA_D35 FBA_D35 FBA_CMD35 <53> FBB_D35 FBB_D35 FBB_CMD35 <54> FBC_D35 FBC_D35 FBC_CMD35 <55> FBD_D35 FBD_D35 FBD_CMD35
BA50 P47 B30 D2
<52> FBA_D36 BB50 FBA_D36 <53> FBB_D36 P52 FBB_D36 <54> FBC_D36 A30 FBC_D36 <55> FBD_D36 D1 FBD_D36
<52> FBA_D37 BA49 FBA_D37 <53> FBB_D37 R46 FBB_D37 <54> FBC_D37 H30 FBC_D37 <55> FBD_D37 C3 FBD_D37
<52> FBA_D38 AW49 FBA_D38 AA44 <53> FBB_D38 P46 FBB_D38 J35 <54> FBC_D38 C30 FBC_D38 J14 <55> FBD_D38 C2 FBD_D38 AC9
<52> FBA_D39 FBA_D39 FBA_DBG_RFU1 <53> FBB_D39 FBB_D39 FBB_DBG_RFU1 <54> FBC_D39 FBC_D39 FBC_DBG_RFU1 <55> FBD_D39 FBD_D39 FBD_DBG_RFU1
AV48 AN44 L50 J41 D27 J23 J5 P9
<52> FBA_D40 FBA_D40 FBA_DBG_RFU2 <53> FBB_D40 FBB_D40 FBB_DBG_RFU2 <54> FBC_D40 FBC_D40 FBC_DBG_RFU2 <55> FBD_D40 FBD_D40 FBD_DBG_RFU2
AT49 L51 J26 J4
C <52> FBA_D41 FBA_D41 <53> FBB_D41 FBB_D41 <54> FBC_D41 FBC_D41 <55> FBD_D41 FBD_D41 C
AT47 L52 F27 L8
<52> FBA_D42 FBA_D42 <53> FBB_D42 FBB_D42 <54> FBC_D42 FBC_D42 <55> FBD_D42 FBD_D42
m
AT48 L49 G27 J2
<52> FBA_D43 AT46 FBA_D43 AG45 <53> FBB_D43 M46 FBB_D43 H42 <54> FBC_D43 C27 FBC_D43 G15 <55> FBD_D43 F1 FBD_D43 Y8
<52> FBA_D44 FBA_D44 FBA_CLK0 FBA_CLK0 <52> <53> FBB_D44 FBB_D44 FBB_CLK0 FBB_CLK0 <53> <54> FBC_D44 FBC_D44 FBC_CLK0 FBC_CLK0 <54> <55> FBD_D44 FBD_D44 FBD_CLK0 FBD_CLK0 <55>
AV51 AG46 L47 G42 B27 F15 F2 Y7
<52> FBA_D45 FBA_D45 FBA_CLK0* FBA_CLK0# <52> <53> FBB_D45 FBB_D45 FBB_CLK0* FBB_CLK0# <53> <54> FBC_D45 FBC_D45 FBC_CLK0* FBC_CLK0# <54> <55> FBD_D45 FBD_D45 FBD_CLK0* FBD_CLK0# <55>
AV52 AK46 M48 F47 A27 H21 H4 R8
<52> FBA_D46 FBA_D46 FBA_CLK1 FBA_CLK1 <52> <53> FBB_D46 FBB_D46 FBB_CLK1 FBB_CLK1 <53> <54> FBC_D46 FBC_D46 FBC_CLK1 FBC_CLK1 <54> <55> FBD_D46 FBD_D46 FBD_CLK1 FBD_CLK1 <55>
AV49 AK45 M47 E47 G29 J21 H5 R7
<52> FBA_D47 AJ48 FBA_D47 FBA_CLK1* FBA_CLK1# <52> <53> FBB_D47 D48 FBB_D47 FBB_CLK1* FBB_CLK1# <53> <54> FBC_D47 H20 FBC_D47 FBC_CLK1* FBC_CLK1# <54> <55> FBD_D47 V7 FBD_D47 FBD_CLK1* FBD_CLK1# <55>
<52> FBA_D48 AJ46 FBA_D48 <53> FBB_D48 C50 FBB_D48 <54> FBC_D48 D18 FBC_D48 <55> FBD_D48 V8 FBD_D48
AJ47 C48 G20 V6
AK49 C49 E20 V9
<52> FBA_D51 AM47 FBA_D51 <53> FBB_D51 E49 FBB_D51 <54> FBC_D51 F23 FBC_D51 <55> FBD_D51 U4 FBD_D51
<52> FBA_D52 AM46 FBA_D52 <53> FBB_D52 E50 FBB_D52 <54> FBC_D52 E21 FBC_D52 <55> FBD_D52 R5 FBD_D52
<52> FBA_D53 AN48 FBA_D53 <53> FBB_D53 F49 FBB_D53 <54> FBC_D53 D21 FBC_D53 <55> FBD_D53 R6 FBD_D53
AN49 F48 E23 U8
<52> FBA_D55 <53> FBB_D55 <54> FBC_D55 <55> FBD_D55
T
AM44 FBA_D55 U45 F50 FBB_D55 J33 G24 FBC_D55 F8 P6 FBD_D55 AJ8
<52> FBA_D56 FBA_D56 FBA_WCK01 FBA_WCK01 <52> <53> FBB_D56 FBB_D56 FBB_WCK01 FBB_WCK01 <53> <54> FBC_D56 FBC_D56 FBC_WCK01 FBC_WCK01 <54> <55> FBD_D56 FBD_D56 FBD_WCK01 FBD_WCK01 <55>
AM45 U44 D52 H33 H26 G8 R9 AJ7
<52> FBA_D57 AN45 FBA_D57 FBA_WCK01* V45 FBA_WCK01# <52> <53> FBB_D57 J50 FBB_D57 FBB_WCK01* G35 FBB_WCK01# <53> <54> FBC_D57 F24 FBC_D57 FBC_WCK01* G9 FBC_WCK01# <54> <55> FBD_D57 P4 FBD_D57 FBD_WCK01* AG8 FBD_WCK01# <55>
<52> FBA_D58 FBA_D58 FBA_WCKB01 <53> FBB_D58 FBB_D58 FBB_WCKB01 <54> FBC_D58 FBC_D58 FBC_WCKB01 <55> FBD_D58 FBD_D58 FBD_WCKB01
AN46 V44 H48 H35 G26 F9 P5 AG9
<52> FBA_D59 FBA_D59 FBA_WCKB01* <53> FBB_D59 FBB_D59 FBB_WCKB01* <54> FBC_D59 FBC_D59 FBC_WCKB01* <55> FBD_D59 FBD_D59 FBD_WCKB01*
AR48 AC45 H51 J39 F26 H12 L7 AD8
<52> FBA_D60 FBA_WCK23 <52> <53> FBB_D60 FBB_WCK23 <53> <54> FBC_D60 FBC_WCK23 <54> <55> FBD_D60 FBD_WCK23 <55>
I
AN47 FBA_D60 FBA_WCK23 AC44 J51 FBB_D60 FBB_WCK23 H39 D26 FBC_D60 FBC_WCK23 G12 L6 FBD_D60 FBD_WCK23 AD9
<52> FBA_D61 AR47 FBA_D61 FBA_WCK23* AD46 FBA_WCK23# <52> <53> FBB_D61 H49 FBB_D61 FBB_WCK23* F41 FBB_WCK23# <53> <54> FBC_D61 B26 FBC_D61 FBC_WCK23* G14 FBC_WCK23# <54> <55> FBD_D61 L4 FBD_D61 FBD_WCK23* AC7 FBD_WCK23# <55>
<52> FBA_D62 AR46 FBA_D62 FBA_WCKB23 AD45 <53> FBB_D62 H52 FBB_D62 FBB_WCKB23 G41 <54> FBC_D62 C26 FBC_D62 FBC_WCKB23 H14 <55> FBD_D62 L5 FBD_D62 FBD_WCKB23 AC8
<52> FBA_D63 FBA_D63 FBA_WCKB23* AV47 <53> FBB_D63 FBB_D63 FBB_WCKB23* L46 <54> FBC_D63 FBC_D63 FBC_WCKB23* J27 <55> FBD_D63 FBD_D63 FBD_WCKB23* J6
FBA_WCK45 AV46 FBA_WCK45 <52> FBB_WCK45 L45 FBB_WCK45 <53> FBC_WCK45 H27 FBC_WCK45 <54> FBD_WCK45 J7 FBD_WCK45 <55>
U47 FBA_WCK45* AW48 FBA_WCK45# <52> C32 FBB_WCK45* M44 FBB_WCK45# <53> A5 FBC_WCK45* E29 FBC_WCK45# <54> AJ1 FBD_WCK45* H7 FBD_WCK45# <55>
<52> FBA_DBI0 Y48 FBA_DQM0 FBA_WCKB45 AW47 <53> FBB_DBI0 E33 FBB_DQM0 FBB_WCKB45 M45 <54> FBC_DBI0 C8 FBC_DQM0 FBC_WCKB45 F29 <55> FBD_DBI0 AG1 FBD_DQM0 FBD_WCKB45 H6
<52> FBA_DBI1 AG47 FBA_DQM1 FBA_WCKB45* AR45 <53> FBB_DBI1 E44 FBB_DQM1 FBB_WCKB45* H47 <54> FBC_DBI1 J18 FBC_DQM1 FBC_WCKB45* G23 <55> FBD_DBI1 AA7 FBD_DQM1 FBD_WCKB45* P8
<52> FBA_DBI2 FBA_DQM2 FBA_WCK67 FBA_WCK67 <52> <53> FBB_DBI2 FBB_DQM2 FBB_WCK67 FBB_WCK67 <53> <54> FBC_DBI2 FBC_DQM2 FBC_WCK67 FBC_WCK67 <54> <55> FBD_DBI2 FBD_DQM2 FBD_WCK67 FBD_WCK67 <55>
AC48 AR44 G39 H46 F12 H23 AD5 P7
<52> FBA_DBI3 BB51 FBA_DQM3 FBA_WCK67* AT45 FBA_WCK67# <52> <53> FBB_DBI3 P49 FBB_DQM3 FBB_WCK67* J47 FBB_WCK67# <53> <54> FBC_DBI3 D29 FBC_DQM3 FBC_WCK67* H24 FBC_WCK67# <54> <55> FBD_DBI3 D3 FBD_DQM3 FBD_WCK67* M7 FBD_WCK67# <55>
C
<52> FBA_DBI4 AV50 FBA_DQM4 FBA_WCKB67 AT44 <53> FBB_DBI4 L48 FBB_DQM4 FBB_WCKB67 J46 <54> FBC_DBI4 E27 FBC_DQM4 FBC_WCKB67 J24 <55> FBD_DBI4 H3 FBD_DQM4 FBD_WCKB67 M8
<52> FBA_DBI5 AM48 FBA_DQM5 FBA_WCKB67* <53> FBB_DBI5 D50 FBB_DQM5 FBB_WCKB67* <54> FBC_DBI5 F20 FBC_DQM5 FBC_WCKB67* <55> FBD_DBI5 U5 FBD_DQM5 FBD_WCKB67*
<52> FBA_DBI6 AR49 FBA_DQM6 <53> FBB_DBI6 H50 FBB_DQM6 <54> FBC_DBI6 E26 FBC_DQM6 <55> FBD_DBI6 M9 FBD_DQM6
<52> FBA_DBI7 FBA_DQM7 +1V8_MAIN <53> FBB_DBI7 FBB_DQM7 <54> FBC_DBI7 FBC_DQM7 <55> FBD_DBI7 FBD_DQM7
R48 B33 D5 AJ3

<52> FBA_EDC0 V48 FBA_DQS_WP0 <53> FBB_EDC0 E35 FBB_DQS_WP0 <54> FBC_EDC0 D8 FBC_DQS_WP0 <55> FBD_EDC0 AG2 FBD_DQS_WP0
<52> FBA_EDC1 AF44 FBA_DQS_WP1 +FBX_PLLAVDD <53> FBB_EDC1 G44 FBB_DQS_WP1 +FBX_PLLAVDD <54> FBC_EDC1 E17 FBC_DQS_WP1 +FBX_PLLAVDD <55> FBD_EDC1 AA9 FBD_DQS_WP1 +FBX_PLLAVDD
<52> FBA_EDC2 AA48 FBA_DQS_WP2 1 2 <53> FBB_EDC2 H38 FBB_DQS_WP2 <54> FBC_EDC2 E12 FBC_DQS_WP2 <55> FBD_EDC2 AF4 FBD_DQS_WP2
r
<52> FBA_EDC3 BB52 FBA_DQS_WP3 <53> FBB_EDC3 P50 FBB_DQS_WP3 <54> FBC_EDC3 E30 FBC_DQS_WP3 <55> FBD_EDC3 E3 FBD_DQS_WP3
<52> FBA_EDC4 FBA_DQS_WP4 <53> FBB_EDC4 FBB_DQS_WP4 <54> FBC_EDC4 FBC_DQS_WP4 <55> FBD_EDC4 FBD_DQS_WP4
AT50 LG6 J48 B29 H2
<52> FBA_EDC5 AK48 FBA_DQS_WP5 <53> FBB_EDC5 D51 FBB_DQS_WP5 <54> FBC_EDC5 G21 FBC_DQS_WP5 <55> FBD_EDC5 U6 FBD_DQS_WP5
PBY160808T-300Y-N_2P
<52> FBA_EDC6 AR51 FBA_DQS_WP6 AN42 1 2 <53> FBB_EDC6 F51 FBB_DQS_WP6 L38 <54> FBC_EDC6 E24 FBC_DQS_WP6 L17 <55> FBD_EDC6 M5 FBD_DQS_WP6 V11
<52> FBA_EDC7 FBA_DQS_WP7 FBA_PLL_AVDD <53> FBB_EDC7 FBB_DQS_WP7 FBB_PLL_AVDD <54> FBC_EDC7 FBC_DQS_WP7 FBC_PLL_AVDD <55> FBD_EDC7 FBD_DQS_WP7 FBD_PLL_AVDD
LG2
22U_0603_6.3V6M
0.1U_0402_16V7K
0.1U_0402_16V4Z~D
0.1U_0402_16V4Z~D
0.1U_0402_16V4Z~D
W47 1 PBY160808T-300Y-N_2P Y17 Y25 Y33
GND_694 GND_702 GND_710 GND_0718
o
1
W49 Y18 Y26 Y34

CG54
CG55
GND_695 GND_703 1 GND_711 1 GND_0719 1
CG56
CG57
CG58
W51 Y19 Y27 Y35
W6 GND_696 Y20 GND_704 Y28 GND_712 Y36 GND_0720
2
W8 GND_697 2 Y21 GND_705 Y29 GND_713 Y37 GND_0721

Y14 GND_698 Y22 GND_706 2 Y30 GND_714 2 Y38 GND_0722 2
Y15 GND_699 Y23 GND_707 Y31 GND_715 Y39 GND_0723
+FBX_PLLAVDD Y16 GND_700 Y24 GND_708 Y32 GND_716 Y9 GND_0724
GND_701 GND_709 GND_717 GND_0725
F
GP10 4 GP10 6
AF42
L29 FB_REFPLL_AVDD0
0.1U_0402_10V7K
0.1U_0402_10V7K
FB_REFPLL_AVDD1
1 1 FBD UNUSED
Under GPU Under GPU Under GPU Under GPU
CG59
CG60
@ N17E-G1_BGA2152~D @ N17E-G1_BGA2152~D @ N17E-G1_BGA2152~D @ N17E-G1_BGA2152~D

2 2
l
B B
+1.35VS_VGA +1.35VS_VGA +1.35VS_VGA
+1.35VS_VGA
a
1
1
i
1
RG49 RG50 RG51 RG52 RG451 RG452

RG47 RG48 10K_0402_5% 10K_0402_5% 10K_0402_5% 10K_0402_5% 10K_0402_5% 10K_0402_5%
10K_0402_5% 10K_0402_5%
FBB_CMD13 FBC_CMD13 FBD_CMD13
2
2
t
FBA_CMD13
2

FBA_CMD29
FBA_CMD1
FBA_CMD17
n
1
1
1
RG55 RG56 RG57 RG58 RG450 RG453

RG53 RG54 10K_0402_5% 10K_0402_5% 10K_0402_5% 10K_0402_5% 10K_0402_5% 10K_0402_5%
10K_0402_5% 10K_0402_5%
2
2
2
id e
nf
A
Co A

N17E-G1(3/6) MEM Interface
5 4 3 2 1
5 4 3 2 1
+3V3_SYS
+NVVDD1 +NVVDD1 +NVVDD2 +NVVDD2 +1.35VS_VGA +1.35VS_VGA

UG9J UG9H
100P_0402_50V8J~D
UG9G 23/23 VDDS 20/23 FBVDDQ 1
19/23 VDD_2/2
CG61
AA10 AT43
FBVDDQ_01 FBVDDQ_32
1.8K_0402_1%
1.8K_0402_1%
AP21 BB45 AP27 AC14 AA11 K12
VDD_145 VDD_219 VDDS_057 VDDS_001 FBVDDQ_02 FBVDDQ_33
1
AP22 BB46 AP28 AC15 AA42 K14 2
RG60
RG61
AP23 BB47 AP29 AC16 AA43 K15 1 2
VDD_147 VDD_221 VDDS_059 VDDS_003 FBVDDQ_04 FBVDDQ_35 <70> CSSN_B+ +3V3_SYS
10U_0603_6.3V6M
AP30 BB48 AP35 AC17 AC10 K17
AP31 VDD_148 VDD_222 BC38 AP36 VDDS_060 VDDS_004 AC18 AC11 FBVDDQ_05 FBVDDQ_36 K18
CG62
RG59 2
AP32 VDD_149 VDD_223 BC39 AP37 VDDS_061 VDDS_005 AC24 AC42 FBVDDQ_06 FBVDDQ_37 K20 10_0402_1% UG11
2
AP33 VDD_150 VDD_224 BC40 AP38 VDDS_062 VDDS_006 AC25 AC43 FBVDDQ_07 FBVDDQ_38 K21 4 16
AP34 VDD_151 VDD_225 BC41 AP39 VDDS_063 VDDS_007 AC26 AD10 FBVDDQ_08 FBVDDQ_39 K23 VS VPU
AR13 VDD_152 VDD_226 BC45 AV14 VDDS_064 VDDS_008 AC27 AD11 FBVDDQ_09 FBVDDQ_40 K24 1
y
RG62
1
AR40 BC47 AV15 AC28 AD42 K26 10_0402_1% VIN1N 11 13
AT14 VDD_154 VDD_228 BC49 AV16 VDDS_066 VDDS_010 AC29 AD43 FBVDDQ_11 FBVDDQ_42 K27 1 2 VIN1P 12 IN-1 TC RG63
D VDD_155 VDD_229 VDDS_067 VDDS_011 FBVDDQ_12 FBVDDQ_43 <70> CSSP_B+ IN+1 D
AT15 BD39 AV17 AC35 AF10 K29 10
l
10K_0402_1%
AT16 VDD_156 VDD_230 BD41 AV18 VDDS_068 VDDS_012 AC36 AF43 FBVDDQ_13 FBVDDQ_44 K30 1 2 VIN2N 14 PV RG529
VDD_157 VDD_231 VDDS_069 VDDS_013 FBVDDQ_14 FBVDDQ_45 <70> CSSN_NVVDD IN-2
2
G
10U_0603_6.3V6M
AT17 BD46 AV24 AC37 AG10 K32 VIN2P 15 9 1 2
2
AT18 VDD_158 VDD_232 BD47 AV25 VDDS_070 VDDS_014 AC38 AG11 FBVDDQ_15 FBVDDQ_46 K33 IN+2 Critical
CG63
RG64 2 0_0201_5%
AT19 VDD_159 VDD_233 BD48 AV26 VDDS_071 VDDS_015 AC39 AG42 FBVDDQ_16 FBVDDQ_47 K35 10_0402_1% 1 8 3 1
VDD_160 VDD_234 VDDS_072 VDDS_016 FBVDDQ_17 FBVDDQ_48 IN-3 Warning GPIO3_OC_WARN# <46>
AT20 BD49 AV27 AF14 AG43 K36 2
D
n
AT21 VDD_161 VDD_235 BD50 AV28 VDDS_073 VDDS_017 AF15 AJ10 FBVDDQ_18 FBVDDQ_49 K38 IN+3 5 2 1
AT22 VDD_162 VDD_236 BD51 AV29 VDDS_074 VDDS_018 AF16 AJ11 FBVDDQ_19 FBVDDQ_50 K39 RG66 1 6 A0
AT23 VDD_163 VDD_237 BE41 AV35 VDDS_075 VDDS_019 AF17 AJ42 FBVDDQ_20 FBVDDQ_51 K41 <46> I2CC_SCL 7 SCL 3 QG5
10_0402_1% RG65
AT24 VDD_164 VDD_238 BE42 AV36 VDDS_076 VDDS_020 AF18 AJ43 FBVDDQ_21 FBVDDQ_52 L14 1 2 <46> I2CC_SDA SDA GND 2N7002W-T/R7_SOT323-3
10K_0402_1%
VDD_165 VDD_239 VDDS_077 VDDS_021 FBVDDQ_22 FBVDDQ_53 <70> CSSP_NVVDD
AT25 BE43 AV37 AF24 AK10 L15 INA3221AIRGVR_VQFN16_4X4
AT26 VDD_166 VDD_240 BE46 AV38 VDDS_078 VDDS_022 AF25 AK11 FBVDDQ_23 FBVDDQ_54 L18 1 2 VIN3N
VDD_167 VDD_241 VDDS_079 VDDS_023 FBVDDQ_24 FBVDDQ_55 <72> CSSN_NVVDDS
10U_0603_6.3V6M
AT27 BE47 AV39 AF26 AK42 L20
CG183
AT28 BE48 R14 AG27 AK43 L21 RG138
O
VDD_169 VDD_243 VDDS_081 VDDS_025 FBVDDQ_26 FBVDDQ_57 2
AT29 BE49 R15 AG28 AM42 L23 10_0402_1%
AT30 VDD_170 VDD_244 BE50 R16 VDDS_082 VDDS_026 AG29 AM43 FBVDDQ_27 FBVDDQ_58 L24
AT31 VDD_171 VDD_245 BE51 R17 VDDS_083 VDDS_027 AG35 AN43 FBVDDQ_28 FBVDDQ_59 L26
AT32 VDD_172 VDD_246 BE52 R18 VDDS_084 VDDS_028 AG36 AR42 FBVDDQ_29 FBVDDQ_60 L27 RG137 1
AT33 VDD_173 VDD_247 BF42 R24 VDDS_085 VDDS_029 AG37 AR43 FBVDDQ_30 FBVDDQ_61 L30 10_0402_1%
AT34 VDD_174 VDD_248 BF44 R25 VDDS_086 VDDS_030 AG38 R42 FBVDDQ_31 FBVDDQ_62 L32 1 2 VIN3P
r
VDD_175 VDD_249 VDDS_087 VDDS_031 FBVDDQ_76 FBVDDQ_63 <72> CSSP_NVVDDS
AT35 BF45 R26 AG39 R43 L33
AT36 VDD_176 VDD_250 BF47 R27 VDDS_088 VDDS_032 AK14 U10 FBVDDQ_77 FBVDDQ_64 L35
AT39 VDD_179 VDD_253 BG43 R35 VDDS_091 VDDS_035 AK17 V10 FBVDDQ_80 FBVDDQ_67 M10
e
AT42 VDD_180 VDD_254 BG44 R36 VDDS_092 VDDS_036 AK18 V42 FBVDDQ_81 FBVDDQ_68 M43
AU43
AV19
AV20
VDD_181
VDD_182
VDD_183
VDD_255
VDD_321
VDD_322
U16
U17
U18
R37
R38
R39
VDDS_093
VDDS_094
VDDS_095
VDDS_037
VDDS_038
VDDS_039
AK24
AK25
AK26
V43
Y10
Y11
FBVDDQ_82
FBVDDQ_83
FBVDDQ_84
FBVDDQ_69
FBVDDQ_70
FBVDDQ_71
P10
P11
P42
+1V8_AON
+1V8_MAIN +3VS
+3V3_SYS +3V3_SYS
AV21 VDD_184 VDD_323 U19 W14 VDDS_096 VDDS_040 AK27 Y42 FBVDDQ_85 FBVDDQ_72 P43
b
AV22 VDD_185 VDD_324 U20 W15 VDDS_097 VDDS_041 AK28 Y43 FBVDDQ_86 FBVDDQ_73 R10
VDD_186 VDD_325 VDDS_098 VDDS_042 FBVDDQ_87 FBVDDQ_74 1
AV23 U21 W16 AK29 R11 CG478 UG14
VDD_187 VDD_326 VDDS_099 VDDS_043 FBVDDQ_75
470U_X_2VY_R9M
10U_0603_6.3V6M
AV30 U22 W17 AK35 1 0.1U_0201_6.3V6K 1
VDD_188 VDD_327 VDDS_100 VDDS_044 VIN1
1
AV31 U23 W18 AK36 1 1 2
VDD_189 VDD_328 VDDS_101 VDDS_045 VIN2
5
2
CG242
CG243
AV32 U24 W24 AK37 + RG515 CG322
AV33 VDD_190 VDD_329 U25 W25 VDDS_102 VDDS_046 AK38 RG545 10K_0402_5% 1U_0402_6.3V6K 7 6
VCC
AV34 VDD_191 VDD_330 U26 W26 VDDS_103 VDDS_047 AK39 E52 GPU_PWR_EN 1 2.2K_0201_1% @ VIN thermal VOUT
VDD_192 VDD_331 VDDS_104 VDDS_048 2 2 FBVDDQ_SENSE FB_VDDQ_SENSE <73> IN B 3V3_SYS_EN 2
C AV42 U27 W27 AP14 4 1 2 +5VALW 3 1 1 C
2
AV43 VDD_193 VDD_332 U28 W28 VDDS_105 VDDS_049 AP15 1V8_MAIN_EN 2 OUT Y VBIAS
m
CG323 CG385
GND
AV44 VDD_194 VDD_333 U29 W29 VDDS_106 VDDS_050 AP16 IN A 3V3_SYS_EN 4 5 0.1U_0402_16V7K 10U_0402_6.3V6M
AW13 VDD_195 VDD_334 U30 W35 VDDS_107 VDDS_051 AP17 P45 UG26 <43> 3V3_SYS_EN ON GND
AW40 VDD_196 VDD_335 U31 W36 VDDS_108 VDDS_052 AP18 FB_VREF NL17SZ08DFT2G_SC70-5 2 2
1 1
3
AW42 VDD_197 VDD_336 U32 W37 VDDS_109 VDDS_053 AP24 +1.35VS_VGA CG240 CG384 TPS22961DNYR_WSON8
VDD_198 VDD_337 VDDS_110 VDDS_054
e
AW43 U33 W38 AP25 0.1U_0402_16V7K 0.1U_0402_10V7K
AW44 VDD_199 VDD_338 U34 W39 VDDS_111 VDDS_055 AP26
AW45 VDD_200 VDD_339 U35 VDDS_112 VDDS_056 2 2
AY14 VDD_201 VDD_340 U36 R44 FBCAL_VDDQ RG67 1 2 40.2_0402_1% +1V8_AON
AY18 VDD_202 VDD_341 U37 FB_CAL_PD_VDDQ
AY22 VDD_203 VDD_342 U38 P44 FBCAL_GND RG68 1 2 40.2_0402_1%
AY26 VDD_204 VDD_343 U39 FB_CAL_PU_GND
AY27 VDD_205 VDD_344 V13 R45 FBCAL_TERM RG69 1 2 60.4_0402_1%
VDD_206 VDD_345 FB_CAL_TERM_GND 1
AY31 V40 BM45 CG479
m
VDD_207 VDD_346 VDDS_SENSE NVVDDS_VCC_SENSE <72>
AY35 W19 BM44 0.1U_0201_6.3V6K
AY39 VDD_208 VDD_347 W20 GNDS_SENSE NVVDDS_VSS_SENSE <72>
VDD_209 VDD_348
5
AY43 W21 @ N17E-G1_BGA2152~D 2
AY45 VDD_210 VDD_349 W22 +1.8VS +1V8_AON
VCC
BA43
BA44
BA45
VDD_211
VDD_212
VDD_213
VDD_350
VDD_351
VDD_352
W23
W30
W31
@ N17E-G1_BGA2152~D GPU_PWR_EN 1
2
IN B
OUT Y
4
NVVDD2_EN <43,49,68,72>
+1V8_AON / +1V8_MAIN
GND
VDD_214 VDD_353 <46> 1V8_MAIN_NVVDD2_EN IN A
1
BA46 W32
BA47 VDD_215 VDD_354 W33 UG28 RG70 RG71
470uF 22uF 10uF 4.7uF 1uF 0.1uF
T
BB38 VDD_216 VDD_355 W34 NL17SZ08DFT2G_SC70-5 10K_0402_5% 4.7K_0402_1%
3
BB39 VDD_217 VDD_356 @ +1V8_AON
VDD_218 UG12
2
+1.8VS
470U_X_2VY_R9M
10U_0603_6.3V6M
1 14
I
1
1 FBVDDQ 1 9 13 24 2 VIN1 VOUT1 13
VIN1 VOUT1
CG244
CG245
10U_0603_6.3V6M
+ CG64
1V8_AON_EN 3 12 1 2 220P_0402_50V8J
<43,49> 1V8_AON_EN ON1 CT1 1
CG289
+3VS
2 2 +1.35VS_VGA +5VS 4 11
VBIAS GND CG65
1V8_MAIN_EN 5 10 1 2 220P_0402_50V8J 2
C
<46> 1V8_MAIN_EN ON2 CT2 Near UG12.13
1
CG480 +1V8_AON 6 9
VIN2 VOUT2 +1V8_MAIN
CG216
CG217
CG218
CG219
CG220
CG221
CG222
CG223
CG224
CG225
CG226
CG227
CG228
0.1U_0201_6.3V6K 1 7 8
B VIN2 VOUT2 B
10U_0603_6.3V6M
1 1 1 1 1 1 1 1 1 1 1 1 1 CG487
2
22U_0603_6.3V6M
10U_0402_6.3V6M
0.1U_0402_10V7K
0.1U_0402_16V7K 15 1
GPAD
CG290
BK45 @ 1 1
r
VDD_SENSE NVVDD_VCC_SENSE <69>
1
2
CG288
CG320
CG386
BL45 AOZ1331_SON14_2X3
GND_SENSE NVVDD_VSS_SENSE <69> 2 2 2 2 2 2 2 2 2 2 2 2 2 1
10U_0603_6.3V6M
10U_0603_6.3V6M
10U_0603_6.3V6M
10U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
VCC
<46,73> +1.35VS_VGA_PGOOD B 1V8_AON_EN 2
4
Y Near UG12.8
2
1 2 GPU_PWR_EN 2 2 2
@ N17E-G1_BGA2152~D
<20> DGPU_PWR_EN
RG551 0_0201_5%
A
G Near UG12.1
o
1 @ 2
<43,49> 1V8_AON_EN
3
RG552 0_0201_5% UG25
74LVC1G32GW_TSSOP5
Near UG12.6 Near UG12.4
F
+NVVDD1 +NVVDD2 +1V8_AON +1V8_MAIN +3V3_SYS
l
1
1
Place under GPU +5VALW RG544
10K_0402_5%
@
+5VALW RG542
10K_0402_5%
@
+5VALW RG510
51_0402_5%
+5VALW RG512
51_0402_5%
+5VALW RG514
51_0402_5%
a
2
2
1
1
+1.35VS_VGA
RG543 RG541 RG509 RG511 RG513
10K_0402_5% 10K_0402_5% 10K_0402_5% 10K_0402_5% 10K_0402_5%
i
3
3
2
2
QG508B
QG507B
QG503B
QG504B
QG505B
CG184
CG185
CG186
CG187
CG188
CG189
CG190
CG191
CG192
CG193
CG194
CG195
CG196
CG197
CG198
CG199
CG200
CG201
CG202
CG203
CG204
CG205
CG206
CG207
CG208
CG209
CG210
CG211
CG212
CG213
CG214
CG215
t
1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1
5 5 5 5 5
4
4
2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2
10U_0603_6.3V6M
10U_0603_6.3V6M
10U_0603_6.3V6M
10U_0603_6.3V6M
10U_0603_6.3V6M
10U_0603_6.3V6M
10U_0603_6.3V6M
10U_0603_6.3V6M
1U_0402_6.3V4Z
1U_0402_6.3V4Z
1U_0402_6.3V4Z
1U_0402_6.3V4Z
1U_0402_6.3V4Z
1U_0402_6.3V4Z
1U_0402_6.3V4Z
1U_0402_6.3V4Z
1U_0402_6.3V4Z
1U_0402_6.3V4Z
1U_0402_6.3V4Z
1U_0402_6.3V4Z
1U_0402_6.3V4Z
1U_0402_6.3V4Z
1U_0402_6.3V4Z
1U_0402_6.3V4Z
1U_0402_6.3V4Z
1U_0402_6.3V4Z
1U_0402_6.3V4Z
1U_0402_6.3V4Z
1U_0402_6.3V4Z
1U_0402_6.3V4Z
1U_0402_6.3V4Z
1U_0402_6.3V4Z
n 6
6
QG508A
QG507A
QG503A
QG504A
QG505A
A A
2 2 1V8_AON_EN 2 1V8_MAIN_EN 2 3V3_SYS_EN 2

<43,46,69> NVVDD1_EN <43,49,68,72> NVVDD2_EN
e
1
1
id
N17E-G1(4/6) Power
Size Document Number Re v
f
0.2
5 4 3 2 1
o n
C
5 4 3 2 1
UG9K UG9L UG9M

+NVVDD1 +NVVDD1 16/23 GND_1/3 17/23 GND_2/3 22/23 GND_3/3
UG9F A2 AH6 AR20 B52 BL43 N6

A26 GND_001 GND_122 AH8 AR21 GND_238 GND_361 B7 BL5 GND_482 GND_592 N8
18/21 VDD_1/2
A29 GND_002 GND_123 AJ14 AR22 GND_239 GND_362 BA48 BL7 GND_483 GND_593 P14
y
UG9I +1V8_AON AA14 AG22 A3 GND_003 GND_124 AJ15 AR23 GND_240 GND_363 BB49 BM2 GND_484 GND_594 P15
AA15 VDD_001 VDD_076 AG23 A32 GND_004 GND_125 AJ16 AR24 GND_241 GND_364 BC13 BM3 GND_485 GND_595 P16
21/23 NC/1V8
VDD_002 VDD_077 GND_005 GND_126 GND_242 GND_365 GND_486 GND_596
l
AA16 AG40 A50 AJ17 AR25 BC16 C1 P17
AT9 BA10 AA17 VDD_003 VDD_078 AH14 A51 GND_006 GND_127 AJ18 AR26 GND_243 GND_366 BC19 C29 GND_487 GND_597 P18
BA6 NC_1 1V8_AON_1 BB14 AA18 VDD_004 VDD_079 AH15 AA49 GND_007 GND_128 AJ19 AR27 GND_244 GND_367 BC2 C33 GND_488 GND_598 P19
BA9 NC_2 1V8_AON_2 BC14 AA19 VDD_005 VDD_080 AH16 AA8 GND_008 GND_129 AJ2 AR28 GND_245 GND_368 BC22 C5 GND_489 GND_599 P20
D
BD14 NC_3 1V8_AON_3 AA20 VDD_006 VDD_081 AH17 AB10 GND_009 GND_130 AJ20 AR29 GND_246 GND_369 BC25 C51 GND_490 GND_600 P21 D
n
BE12 NC_4 AA21 VDD_007 VDD_082 AH18 AB14 GND_010 GND_131 AJ21 AR30 GND_247 GND_370 BC28 C52 GND_491 GND_601 P22
BG6 NC_5 AA22 VDD_008 VDD_083 AH19 AB15 GND_011 GND_132 AJ22 AR31 GND_248 GND_371 BC31 D10 GND_492 GND_602 P23
BH6 NC_6 AA23 VDD_009 VDD_084 AH20 AB16 GND_012 GND_133 AJ23 AR32 GND_249 GND_372 BC34 D12 GND_493 GND_603 P24
BJ11 NC_7 +1V8_MAIN AA24 VDD_010 VDD_085 AH21 AB17 GND_013 GND_134 AJ24 AR33 GND_250 GND_373 BC37 D13 GND_494 GND_604 P25
BJ9 NC_8 AA25 VDD_011 VDD_086 AH22 AB18 GND_014 GND_135 AJ25 AR34 GND_251 GND_374 BC4 D16 GND_495 GND_605 P26
BK44 NC_9 AA26 VDD_012 VDD_087 AH23 AB19 GND_015 GND_136 AJ26 AR35 GND_252 GND_375 BC51 D19 GND_496 GND_606 P27
O
NC_10 AM10 AA27 VDD_013 VDD_088 AH24 AB2 GND_016 GND_137 AJ27 AR36 GND_253 GND_376 BC6 D22 GND_497 GND_607 P28
VDD18_01 AM11 AA28 VDD_014 VDD_089 AH25 AB20 GND_017 GND_138 AJ28 AR37 GND_254 GND_377 BC8 D24 GND_498 GND_608 P29
VDD18_02 AN10 AA29 VDD_015 VDD_090 AH26 AB21 GND_018 GND_139 AJ29 AR38 GND_255 GND_378 BD26 D25 GND_499 GND_609 P30
VDD18_03 AN11 AA30 VDD_016 VDD_091 AH27 AB22 GND_019 GND_140 AJ30 AR39 GND_256 GND_379 BD29 D28 GND_500 GND_610 P31
VDD18_04 AR10 AA31 VDD_017 VDD_092 AH28 AB23 GND_020 GND_141 AJ31 AR4 GND_257 GND_380 BD32 D30 GND_501 GND_611 P32
r
VDD18_05 AR11 AA32 VDD_018 VDD_093 AH29 AB24 GND_021 GND_142 AJ32 AR52 GND_258 GND_381 BD35 D31 GND_502 GND_612 P33
VDD18_06 AT10 AA33 VDD_019 VDD_094 AH30 AB25 GND_022 GND_143 AJ33 AR9 GND_259 GND_382 BD38 D34 GND_503 GND_613 P34
VDD18_07 AT11 AA34 VDD_020 VDD_095 AH31 AB26 GND_023 GND_144 AJ34 AT4 GND_260 GND_383 BD52 D37 GND_504 GND_614 P35
VDD18_08 AV10 AA35 VDD_021 VDD_096 AH32 AB27 GND_024 GND_145 AJ35 AT5 GND_261 GND_384 BE10 D4 GND_505 GND_615 P36
e
VDD18_09 AV11 AA36 VDD_022 VDD_097 AH33 AB28 GND_025 GND_146 AJ36 AT51 GND_262 GND_385 BE13 D40 GND_506 GND_616 P37
VDD18_10 AW10 AA37 VDD_023 VDD_098 AH34 AB29 GND_026 GND_147 AJ37 AT52 GND_263 GND_386 BE15 D43 GND_507 GND_617 P38
VDD18_11 AW11 AA38 VDD_024 VDD_099 AH35 AB30 GND_027 GND_148 AJ38 AT8 GND_264 GND_387 BE16 D46 GND_508 GND_618 P39
VDD18_12 AA39 VDD_025 VDD_100 AH36 AB31 GND_028 GND_149 AJ39 AU10 GND_265 GND_388 BE18 D49 GND_509 GND_619 P51
b
AB13 VDD_026 VDD_101 AH37 AB32 GND_029 GND_150 AJ9 AU14 GND_266 GND_389 BE19 D7 GND_510 GND_620 R49
AB40 VDD_027 VDD_102 AH38 AB33 GND_030 GND_151 AK1 AU15 GND_267 GND_390 BE21 E2 GND_511 GND_621 R52
@ N17E-G1_BGA2152~D AC19 VDD_028 VDD_103 AH39 AB34 GND_031 GND_152 AK44 AU16 GND_268 GND_391 BE22 E4 GND_512 GND_622 T10
AC20 VDD_029 VDD_104 AK19 AB35 GND_032 GND_153 AK47 AU17 GND_269 GND_392 BE24 E48 GND_513 GND_623 T14
AC21 VDD_030 VDD_105 AK20 AB36 GND_033 GND_154 AL10 AU18 GND_270 GND_393 BE25 E5 GND_514 GND_624 T15
m
AC30 VDD_033 VDD_108 AK23 AB39 GND_036 GND_157 AL16 AU20 GND_273 GND_396 BE30 F10 GND_517 GND_627 T18
e
AC33 AK32 AB45 AL19 AU23 BE34 F17 T20
AE14 VDD_038 VDD_113 AK34 AB49 GND_041 GND_162 AL20 AU25 GND_278 GND_401 BE37 F21 GND_522 GND_632 T22
AE15 VDD_039 VDD_114 AL13 AB51 GND_042 GND_163 AL21 AU26 GND_279 GND_402 BE39 F22 GND_523 GND_633 T23
AE16 VDD_040 VDD_115 AL40 AB6 GND_043 GND_164 AL22 AU27 GND_280 GND_403 BE40 F25 GND_524 GND_634 T24
AE17 VDD_041 VDD_116 AM14 AB8 GND_044 GND_165 AL23 AU28 GND_281 GND_404 BF2 F28 GND_525 GND_635 T25
AE18 VDD_042 VDD_117 AM15 AD14 GND_045 GND_166 AL24 AU29 GND_282 GND_405 BF4 F31 GND_526 GND_636 T26
m
C AE19 AM16 AD15 AL25 AU30 BF41 F34 T27 C
AE20 VDD_044 VDD_119 AM17 AD16 GND_047 GND_168 AL26 AU31 GND_284 GND_407 BF6 F35 GND_528 GND_638 T28
AE21 VDD_045 VDD_120 AM18 AD17 GND_048 GND_169 AL27 AU32 GND_285 GND_408 BG10 F37 GND_529 GND_639 T29
+1V8_AON AE22 VDD_046 VDD_121 AM19 AD18 GND_049 GND_170 AL28 AU33 GND_286 GND_409 BG13 F40 GND_530 GND_640 T30
T
4.7U_0402_6.3V6M
1U_0402_6.3V4Z
0.1U_0201_6.3V6K
0.1U_0201_6.3V6K
AE27 AM24 AD23 AL33 AU38 BG28 F7 T35

AE28 VDD_052 VDD_127 AM25 AD24 GND_055 GND_176 AL34 AU39 GND_292 GND_415 BG31 G2 GND_536 GND_646 T36
1 1 1 1 VDD_053 VDD_128 GND_056 GND_177 GND_293 GND_416 GND_537 GND_647
CG291
CG292
CG293
CG294
I
AE29 AM26 AD25 AL35 AU4 BG34 G38 T37
2 2 2 2 AE32 VDD_056 VDD_131 AM29 AD28 GND_059 GND_180 AL38 AU49 GND_296 GND_419 BG42 G49 GND_540 GND_650 T4
AE34 VDD_058 VDD_133 AM31 AD30 GND_061 GND_182 AL4 AU6 GND_298 GND_421 BH15 G6 GND_542 GND_652 T45
C
AE35 VDD_059 VDD_134 AM32 AD31 GND_062 GND_183 AL43 AU8 GND_299 GND_422 BH18 H1 GND_543 GND_653 T47
AE36 VDD_060 VDD_135 AM33 AD32 GND_063 GND_184 AL45 AV4 GND_300 GND_423 BH2 H10 GND_544 GND_654 T49
AE37 VDD_061 VDD_136 AM34 AD33 GND_064 GND_185 AL47 AV45 GND_301 GND_424 BH21 H13 GND_545 GND_655 T51
Under GPU AE38
AE39
VDD_062
VDD_063
VDD_137
VDD_138
AM35
AM36
AD34
AD35
GND_065
GND_066
GND_186
GND_187
AL49
AL51
AV9
AW14
GND_302
GND_303
GND_425
GND_426
BH24
BH27
H16
H19
GND_546
GND_547
GND_656
GND_657
T6
T8
r
AF13 VDD_064 VDD_139 AM37 AD36 GND_067 GND_188 AL6 AW15 GND_304 GND_427 BH30 H22 GND_548 GND_658 U7
AF30 VDD_065 VDD_140 AM38 AD37 GND_068 GND_189 AL8 AW16 GND_305 GND_428 BH33 H25 GND_549 GND_659 U9
AF31 VDD_066 VDD_141 AM39 AD38 GND_069 GND_190 AM4 AW17 GND_306 GND_429 BH36 H28 GND_550 GND_660 V14
AF32 VDD_067 VDD_142 AP19 AD39 GND_070 GND_191 AM9 AW18 GND_307 GND_430 BH39 H31 GND_551 GND_661 V15
o
AF33 AP20 AD44 AN14 AW19 BH42 H34 V16
AF34 VDD_069 VDD_144 BK52 AE10 GND_072 GND_193 AN15 AW20 GND_309 GND_432 BH5 H37 GND_553 GND_663 V17
AF40 VDD_070 VDD_286 BL46 AE2 GND_073 GND_194 AN16 AW21 GND_310 GND_433 BJ10 H40 GND_554 GND_664 V18
+1V8_MAIN AG13 VDD_071 VDD_287 BL47 AE4 GND_074 GND_195 AN17 AW22 GND_311 GND_434 BJ12 H43 GND_555 GND_665 V19
AG19 VDD_072 VDD_288 BL48 AE43 GND_075 GND_196 AN18 AW23 GND_312 GND_435 BJ13 J1 GND_556 GND_666 V20
F
AG20 BL49 AE45 AN19 AW24 BJ14 J12 V21
AG21 VDD_074 VDD_290 BL50 AE47 GND_077 GND_198 AN20 AW25 GND_314 GND_437 BJ15 J17 GND_558 GND_668 V22
BG45 VDD_075 VDD_291 BL51 AE49 GND_078 GND_199 AN21 AW26 GND_315 GND_438 BJ16 J20 GND_559 GND_669 V23
4.7U_0402_6.3V6M
4.7U_0402_6.3V6M
4.7U_0402_6.3V6M
1U_0402_6.3V4Z
1U_0402_6.3V4Z
1U_0402_6.3V4Z
BG46 BL52 AE51 AN22 AW27 BJ17 J38 V24

BG47 VDD_257 VDD_293 BM47 AE6 GND_080 GND_201 AN23 AW28 GND_317 GND_440 BJ18 J49 GND_561 GND_671 V25
l
1 1 1 1 1 1 VDD_258 VDD_294 GND_081 GND_202 GND_318 GND_441 GND_562 GND_672
CG295
CG296
CG297
CG298
CG299
CG300
BG48 BM48 AE8 AN24 AW29 BJ19 J52 V26

BG49 VDD_259 VDD_295 BM49 AF1 GND_082 GND_203 AN25 AW30 GND_319 GND_442 BJ20 K13 GND_563 GND_673 V27
BG50 VDD_260 VDD_296 BM50 AF19 GND_083 GND_204 AN26 AW31 GND_320 GND_443 BJ21 K16 GND_564 GND_674 V28
B 2 2 2 2 2 2 VDD_261 VDD_297 GND_084 GND_205 GND_321 GND_444 GND_565 GND_675 B
a
BG51 BM51 AF20 AN27 AW32 BJ22 K19 V29
BG52 VDD_262 VDD_298 N14 AF21 GND_085 GND_206 AN28 AW33 GND_322 GND_445 BJ23 K2 GND_566 GND_676 V30
BH44 VDD_263 VDD_299 N18 AF22 GND_086 GND_207 AN29 AW34 GND_323 GND_446 BJ24 K22 GND_567 GND_677 V31
i
t
BH48 N27 AF28 AN32 AW37 BJ27 K31 V34
BH52 VDD_270 VDD_306 P13 AF37 GND_093 GND_214 AN36 AW46 GND_330 GND_453 BJ31 K40 GND_574 GND_684 V38
n
BJ44 VDD_271 VDD_307 P40 AF38 GND_094 GND_215 AN37 AW5 GND_331 GND_454 BJ32 K45 GND_575 GND_685 V39
BJ45 VDD_272 VDD_308 R19 AF39 GND_095 GND_216 AN38 AW52 GND_332 GND_455 BJ33 K47 GND_576 GND_686 V49
BJ46 VDD_273 VDD_309 R20 AF45 GND_096 GND_217 AN39 AW8 GND_333 GND_456 BJ34 K49 GND_577 GND_687 V52
+1V8_MAIN VDD_274 VDD_310 GND_097 GND_218 GND_334 GND_457 GND_578 GND_688
e
BJ47 R21 AF5 AN4 AY10 BJ35 K51 W10
BJ48 VDD_275 VDD_311 R22 AG14 GND_098 GND_219 AN5 AY2 GND_335 GND_458 BJ36 K6 GND_579 GND_689 W2
BJ49 VDD_276 VDD_312 R23 AG15 GND_099 GND_220 AN8 AY4 GND_336 GND_459 BJ37 K8 GND_580 GND_690 W4
BJ50 VDD_277 VDD_313 R30 AG16 GND_100 GND_221 AP10 AY47 GND_337 GND_460 BJ38 M52 GND_581 GND_691 W43
BJ51 VDD_278 VDD_314 R31 AG17 GND_101 GND_222 AP2 AY49 GND_338 GND_461 BJ39 M6 GND_582 GND_692 W45
id
0.1U_0201_6.3V6K
0.1U_0201_6.3V6K
0.1U_0201_6.3V6K
0.1U_0201_6.3V6K
0.1U_0201_6.3V6K
0.1U_0201_6.3V6K
0.1U_0201_6.3V6K
BJ52 R32 AG18 AP4 AY51 BJ40 N10

BK47 VDD_280 VDD_316 R33 AG24 GND_103 GND_224 AP43 AY6 GND_340 GND_463 BJ41 N2 GND_584
1 1 1 1 1 1 1 VDD_281 VDD_317 GND_104 GND_225 GND_341 GND_464 GND_585
CG301
CG302
CG303
CG304
CG305
CG306
CG307
BK48 R34 AG25 AP45 AY8 BJ42 N4

BK49 VDD_282 VDD_318 U14 AG26 GND_105 GND_226 AP47 B1 GND_342 GND_465 BJ43 N43 GND_586
BK50 VDD_283 VDD_319 U15 AG3 GND_106 GND_227 AP49 B10 GND_343 GND_466 BJ7 N45 GND_587
f
2 2 2 2 2 2 2 BK51 VDD_284 VDD_320 AG30 GND_107 GND_228 AP51 B13 GND_344 GND_467 BK1 N47 GND_588
VDD_285 AG31 GND_108 GND_229 AP6 B16 GND_345 GND_468 BL1 N49 GND_589
AG32 GND_109 GND_230 AP8 B19 GND_346 GND_469 BL10 N51 GND_590
AG33 GND_110 GND_231 AR14 B2 GND_347 GND_470 BL13 BL40 GND_591
GND_111 GND_232 GND_348 GND_471 GND_481
n
@ N17E-G1_BGA2152~D AG34 AR15 B22 BL16
AG44 GND_112 GND_233 AR16 B25 GND_349 GND_472 BL19
AH10 GND_113 GND_234 AR17 B28 GND_350 GND_473 BL2 @ N17E-G1_BGA2152~D
AH2 GND_114 GND_235 AR18 B31 GND_351 GND_474 BL22
GND_115 GND_236 GND_352 GND_475
o
AH4 AR19 B34 BL25
AH43 GND_116 GND_237 BL37 B37 GND_353 GND_476 BL28
Under GPU AH45
AH47
AH49
GND_117
GND_118
GND_119
GND_480
GND_H
GND_F
BD24
BC24
B40
B43
B46
GND_354
GND_355
GND_356
GND_477
GND_478
GND_479
BL31
BL34
B5
AH51 GND_120 B48 GND_357 GND_359 B51
GND_121 GND_358 GND_360
C
A A
@ N17E-G1_BGA2152~D @ N17E-G1_BGA2152~D

N17E-G1(5/6) Power,GND
5 4 3 2 1
5 4 3 2 1
+1V8_AON
+1V8_AON
2
UG9T
47uF 22uF 10uF 4.7uF 1uF 0.1uF
y
RG78 RG79 RG80 RG81 RG82 RG83 15/23 MISC 2 RG84 RG85 RG86
100K_0402_1% 100K_0402_1% 100K_0402_1% 100K_0402_1% 100K_0402_1% 100K_0402_1% 10K_0402_1% 10K_0402_1% 10K_0402_1%
ROM_CS#
l
@ @ @ @ BJ4 @ @ @
ROM_CS*
VID_PLLVDD 1 1 1
1
BK2 ROM_SI
ROM_SI BK4 ROM_SO
D
STRAP0 BL3 ROM_SO BK3 ROM_SCLK D
n
STRAP1 BL4 STRAP0 ROM_SCLK
SP_PLLVDD 1 6 STRAP2 BM4 STRAP1
STRAP2
STRAP3 BM5
GPCPLL_AVDD STRAP3
2
STRAP4 BK5
STRAP5 BJ5 STRAP4 RG87 RG88 RG89
STRAP5 10K_0402_1% 10K_0402_1% 10K_0402_1%
O
2
2
@
1
RG90 RG91 RG92 RG93 RG94 RG95 BF9 GPU_BUFRST# T6
100K_0402_1% 100K_0402_1% 100K_0402_1% 100K_0402_1% 100K_0402_1% 100K_0402_1% BUFRST* PAD~D
@ @
r
1
1
e
@ N17E-G1_BGA2152~D
+3V_PCH +3V_PCH
1
Strap to PCH
1
RG555 RG556
10K_0201_1% 10K_0201_1%
m
2
1 2 STRAP3 1 2 STRAP5
<16> STRAP3_PCH <16> STRAP5_PCH +3VS +3VS
e
DG8 DG9
RB751S40T1G_SOD523-2 RB751S40T1G_SOD523-2
1 1
CG475 CG474
0.1U_0402_16V4Z 0.1U_0402_16V4Z
2 UG16 2
m
12 9
C
VDD VCC Funct i on VROM_SEL C
ROM_CS# 1 10
COM1 IN1 VROM_SEL <20> COM = NC L
ROM_SO 4 7
UG9S COM2 IN2 COM = NO H
14/23 XTAL/PLL IGPU_ROM_CS# 2 11 DGPU_ROM_CS#
+1V8_MAIN
Under GPU NC1 NO1
T
BD12 IGPU_ROM_SO 5 8 DGPU_ROM_SO
SP_PLLVDD NC2 NO2
I
1 2 BC12 6 3
VID_PLLVDD GND GND
47U_0805_6.3V6M~D
10U_0603_6.3V6M
0.1U_0402_10V7K
LG4 1 1 PI5A3158BZAEX_TDFN12_1X3
1
CG232
CG231
CG230
PBY160808T-301Y-N
2
C
2 2
+1V8_MAIN
U42
r
GPCPLL_AVDD0 +1V8_AON +1V8_AON
1 2 AF11
GPCPLL_AVDD1
22U_0603_6.3V6M
0.1U_0402_10V7K
0.1U_0402_10V7K
0.1U_0402_10V7K
0.1U_0402_10V7K
0.1U_0402_10V7K
0.1U_0402_10V7K
LG3 1 1 1 1 1 1 BB24
XS_PLLVDD
1
CG239
CG238
CG237
CG236
CG235
CG234
CG233
o
PBY160808T-300Y-N_2P
1
1
RG74 CG66
2
2 2 2 2 2 2 10K_0402_5% 0.1U_0402_16V4Z
F
2
2
UG13
DGPU_ROM_CS# 1 8 RG75
DGPU_ROM_SO 1 2 DGPU_ROM_SO_R 2 CS# VCC 7 33_0402_5%
BJ6 BK6 XTALOUTBUFF_R 3 DO(IO1) HOLD#(IO3) 6 DGPU_ROM_SCLK 1 2 ROM_SCLK
l
Under GPU BL6
XTAL_SSIN
XTAL_IN
XTAL_OUTBUFF
XTAL_OUT
BM6
RG76
33_0402_5%
4 WP#(IO2)
GND
CLK
DI(IO0)
5 DGPU_ROM_SI 1 2 ROM_SI
1
1
W25Q80EWSSIG_SO8 RG77
B B
a
RG101 RG98 33_0402_5%
10K_0402_5% @ N17E-G1_BGA2152~D 100K_0402_5%
i
RG99
DGPU VBIOS ROM
2
2
10M_0402_5%
t
1 2
YG1
XTALIN 1 3
n
XTALOUT
1 3
2 GND GND 2
CG75 CG76 +1V8_AON +1V8_AON
22P_0402_50V8J 22P_0402_50V8J
2 4
e
1 1
1
27MHZ 16PF +-30PPM 7M27070004F50Q5 1
RG147 CG241
id
10K_0402_5% 0.1U_0402_16V4Z~D
2
2
UG15
IGPU_ROM_CS# 1 8 RG148
GDDR5x VRAM Strap0 Strap1 Strap2 Strap3 Strap4 Strap5 RAMCFG
f
IGPU_ROM_SO 1 2 IGPU_ROM_SO_R 2 CS# VCC 7 33_0402_5%
3 DO(IO1) HOLD#(IO3) 6 IGPU_ROM_SCLK 1 2 ROM_SCLK
Micron , MT58K256M32 L L L H L L 0 WP#(IO2) CLK IGPU_ROM_SI ROM_SI
RG146 4 5 1 2
GND DI(IO0)
H L L H L L 1 33_0402_5%
n
W25Q80EWSSIG_SO8 RG149
L H L H L L 2 33_0402_5%
o
Opt i mus VBI OS R O M
C
A A

N17E-G1(6/6) Strap Pin,ROM
5 4 3 2 1
5 4 3 2 1
@ MF=1 @ MF=0
UG1 UG2
MF=0 MF=1 MF=1 MF=0 MF=0 MF=1 MF=1 MF=0

D3 B4 D3 B4
<48> FBA_EDC3 EDC0 EDC3 DQ24 DQ0 FBA_D24 <48> <48> FBA_EDC4 EDC0 EDC3 DQ24 DQ0 FBA_D32 <48>
D12 B3 D12 B3
T12 C4 T12 C4
T3 C3 T3 C3
y
F4 F4
DQ28 DQ4 FBA_D28 <48> DQ28 DQ4 FBA_D36 <48>
F3 F3
<48> FBA_CLK0 DQ29 DQ5 FBA_D29 <48> <48> FBA_CLK1 DQ29 DQ5 FBA_D37 <48>
l
E3 G4 E3 G4
<48> FBA_DBI3 DBI0# DBI3# DQ30 DQ6 FBA_D30 <48> <48> FBA_DBI4 DBI0# DBI3# DQ30 DQ6 FBA_D38 <48>
E12 G3 E12 G3
R12 B11 R12 B11
D <48> FBA_DBI1 DBI2# DBI1# DQ16 DQ8 FBA_D16 <48> <48> FBA_DBI6 DBI2# DBI1# DQ16 DQ8 FBA_D40 <48> D
R3 B12 R3 B12
C11 C11
n
C12 C12
K11 F11 K11 F11
CK DQ20 DQ12 FBA_D20 <48> CK DQ20 DQ12 FBA_D44 <48>
K10 F12 K10 F12
CK# DQ21 DQ13 FBA_D21 <48> CK# DQ21 DQ13 FBA_D45 <48>
H11 G11 H11 G11
<48> FBA_CMD15 CKE# WE# DQ22 DQ14 FBA_D22 <48> <48> FBA_CMD29 CKE# WE# DQ22 DQ14 FBA_D46 <48>
G12 G12
V11 V11
J11 V12 J11 V12
<48> FBA_CMD9 BA0/A2 BA2/A4 DQ9 DQ17 FBA_D9 <48> <48> FBA_CMD28 BA0/A2 BA2/A4 DQ9 DQ17 FBA_D49 <48>
O
L10 U11 L10 U11
L11 U12 L11 U12
J10 P11 J10 P11
<48> FBA_CLK0# <48> FBA_CMD10 BA3/A3 BA1/A5 DQ12 DQ20 FBA_D12 <48> <48> FBA_CLK1# <48> FBA_CMD27 BA3/A3 BA1/A5 DQ12 DQ20 FBA_D52 <48>
P12 P12
N11 N11
N12 N12
r
L4 V4 L4 V4
<48> FBA_CMD4 A8/A7 A10/A0 DQ0 DQ24 FBA_D0 <48> <48> FBA_CMD24 A8/A7 A10/A0 DQ0 DQ24 FBA_D56 <48>
J5 V3 J5 V3
J4 U4 J4 U4
L5 U3 L5 U3
<48> FBA_CMD3 FBA_D3 <48> <48> FBA_CMD23 FBA_D59 <48>
e
K5 A11/A6 A9/A1 DQ3 DQ27 P4 K5 A11/A6 A9/A1 DQ3 DQ27 P4
+1.35VS_VGA <48> FBA_CMD5 A12/A13 DQ4 DQ28 FBA_D4 <48> <48> FBA_CMD21 A12/A13 DQ4 DQ28 FBA_D60 <48>
K12 P3 K12 P3
<48> FBA_CMD14 A14/A15 DQ5 DQ29 FBA_D5 <48> <48> FBA_CMD30 A14/A15 DQ5 DQ29 FBA_D61 <48>
N4 N4
N3 N3
RG104 2 1 1K_0402_1% W12 RG105 2 1 1K_0402_1% W12
b
RG108 2 1 121_0402_1% H13 MF RG109 2 1 121_0402_1% H13 MF
ZQ ZQ
M2 M2
M13 TCK M13 TCK
A12 TDI +1.35VS_VGA A12 TDI +1.35VS_VGA
H2 TDO H2 TDO
TMS A13 TMS A13
VDDQ_1 VDDQ_1
m
A2 A2
K4 VDDQ_2 B10 K4 VDDQ_2 B10
<48> FBA_CMD6 ABI# VDDQ_3 <48> FBA_CMD22 ABI# VDDQ_3
H4 B5 H4 B5
<48> FBA_CMD0 RAS# CAS# VDDQ_4 <48> FBA_CMD18 RAS# CAS# VDDQ_4
M4 C1 M4 C1
<48> FBA_CMD2 CAS# RAS# VDDQ_5 <48> FBA_CMD16 CAS# RAS# VDDQ_5
M11 C13 M11 C13
e
<48> FBA_CMD13 WE# CKE# VDDQ_6 <48> FBA_CMD31 WE# CKE# VDDQ_6
C14 C14
VDDQ_7 C2 VDDQ_7 C2
D5 VDDQ_8 E1 D5 VDDQ_8 E1
<48> FBA_WCK23# WCK01# WCK23# VDDQ_9 <48> FBA_WCK45# WCK01# WCK23# VDDQ_9
C D4 E11 +1.35VS_VGA D4 E11 C
<48> FBA_WCK23 WCK01 WCK23 VDDQ_10 <48> FBA_WCK45 WCK01 WCK23 VDDQ_10
E13 E13
T5 VDDQ_11 E14 T5 VDDQ_11 E14
<48> FBA_WCK01# WCK23# WCK01# VDDQ_12 <48> FBA_WCK67# WCK23# WCK01# VDDQ_12
T4 E2 T4 E2
<48> FBA_WCK01 WCK23 WCK01 VDDQ_13 <48> FBA_WCK67 WCK23 WCK01 VDDQ_13
m
E4 E4
CG324
CG325
CG326
CG327
CG328
CG329
CG330
CG331
CG332
CG333
VDDQ_14 F10 VDDQ_14 F10
VDDQ_15 1 1 1 1 1 1 1 1 1 1 VDDQ_15
F5 F5
+FBA_VREFC K13 VDDQ_16 G13 +FBA_VREFC K13 VDDQ_16 G13
VREFC VDDQ_17 G2 VREFC VDDQ_17 G2
VDDQ_18 H12 2 2 2 2 2 2 2 2 2 2 VDDQ_18 H12
22U_0402_6.3V6M
10U_0402_6.3V4Z
10U_0402_6.3V4Z
10U_0402_6.3V4Z
1U_0402_6.3V4Z
1U_0402_6.3V4Z
1U_0402_6.3V4Z
1U_0402_6.3V4Z
1U_0402_6.3V4Z
1U_0402_6.3V4Z
VDDQ_19 H3 VDDQ_19 H3
K2 VDDQ_20 J13 K2 VDDQ_20 J13
<48> FBA_CMD1 RESET# VDDQ_21 <48> FBA_CMD17 RESET# VDDQ_21
J2 J2
T
+1.35VS_VGA
GDDR5_A A10
A5 VSS_1
VDDQ_22
VDDQ_23
VDDQ_24
L13
L2
M12
A10
A5 VSS_1
VDDQ_22
VDDQ_23
VDDQ_24
L13
L2
M12
I
B1 VSS_2 VDDQ_25 M3 B1 VSS_2 VDDQ_25 M3
B14 VSS_3 VDDQ_26 N13 B14 VSS_3 VDDQ_26 N13
D1 VSS_4 VDDQ_27 N2 D1 VSS_4 VDDQ_27 N2
CG410
CG411
CG412
CG413
CG414
CG415
CG416
CG417
CG418
CG419
CG420
CG421
CG422
CG423
CG424
CG425
D11 VSS_5 VDDQ_28 P10 D11 VSS_5 VDDQ_28 P10

1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 VSS_6 VDDQ_29 VSS_6 VDDQ_29
D14 P5 D14 P5
@ @ @ @ @ @ @ @ @ @ @ @ @ @ @ @ F1 VSS_7 VDDQ_30 R1 F1 VSS_7 VDDQ_30 R1
VSS_8 VDDQ_31
C
F14 R11 F14 VSS_8 VDDQ_31 R11
2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 H1 VSS_9 VDDQ_32 R13 H1 VSS_9 VDDQ_32 R13
22U_0402_6.3V6M
22U_0402_6.3V6M
22U_0402_6.3V6M
10U_0402_6.3V4Z
10U_0402_6.3V4Z
10U_0402_6.3V4Z
1U_0402_6.3V4Z
1U_0402_6.3V4Z
1U_0402_6.3V4Z
1U_0402_6.3V4Z
1U_0402_6.3V4Z
1U_0402_6.3V4Z
1U_0402_6.3V4Z
1U_0402_6.3V4Z
1U_0402_6.3V4Z
1U_0402_6.3V4Z
H14 VSS_10 VDDQ_33 R14 H14 VSS_10 VDDQ_33 R14

J12 VSS_11 VDDQ_34 R2 +1.35VS_VGA J12 VSS_11 VDDQ_34 R2
J3 VSS_12 VDDQ_35 R4 J3 VSS_12 VDDQ_35 R4
K1 VSS_13 VDDQ_36 U1 K1 VSS_13 VDDQ_36 U1
r
CG334
CG335
CG336
CG337
CG338
CG339
CG340
CG341
CG342
CG343
L12 VSS_16 VDDQ_39 U2 L12 VSS_16 VDDQ_39 U2
VSS_17 VDDQ_40 1 1 1 1 1 1 1 1 1 1 VSS_17 VDDQ_40
L3 V10 L3 V10
M1 VSS_18 VDDQ_41 V5 M1 VSS_18 VDDQ_41 V5
o
M14 VSS_19 VDDQ_42 W13 M14 VSS_19 VDDQ_42 W13
P1 VSS_20 VDDQ_43 W2 2 2 2 2 2 2 2 2 2 2 P1 VSS_20 VDDQ_43 W2
1U_0402_6.3V4Z
1U_0402_6.3V4Z
1U_0402_6.3V4Z
1U_0402_6.3V4Z
1U_0402_6.3V4Z
1U_0402_6.3V4Z
1U_0402_6.3V4Z
1U_0402_6.3V4Z
1U_0402_6.3V4Z
1U_0402_6.3V4Z
P14 VSS_21 VDDQ_44 P14 VSS_21 VDDQ_44
T1 VSS_22 T1 VSS_22
T11 VSS_23 T11 VSS_23
F
T14 VSS_24 B13 T14 VSS_24 B13
V1 VSS_25 VSSQ_1 B2 V1 VSS_25 VSSQ_1 B2
B +1.35VS_VGA V14 VSS_26 VSSQ_2 C10 V14 VSS_26 VSSQ_2 C10 B
W10 VSS_27 VSSQ_3 C5 W10 VSS_27 VSSQ_3 C5
W5 VSS_28 VSSQ_4 D13 W5 VSS_28 VSSQ_4 D13
l
1
+1.35VS_VGA VSS_29 VSSQ_5 D2 +1.35VS_VGA VSS_29 VSSQ_5 D2

RG110 VSSQ_6 E10 VSSQ_6 E10
549_0402_1% A1 VSSQ_7 E5 A1 VSSQ_7 E5
A11 VDD_1 VSSQ_8 F13 A11 VDD_1 VSSQ_8 F13
VDD_2 VSSQ_9 VDD_2 VSSQ_9
a
A14 F2 A14 F2
W=16mils
2
A4 VDD_3 VSSQ_10 G10 A4 VDD_3 VSSQ_10 G10

1 2 +FBA_VREFC D10 VDD_4 VSSQ_11 G5 D10 VDD_4 VSSQ_11 G5
i
G1 VDD_5 VSSQ_12 N10 G1 VDD_5 VSSQ_12 N10
1
G14 N5 G14 N5
CG78
CG79
RG111
RG112
820P_0402_25V7
820P_0402_25V7
1.33K_0402_1%
1 1 VDD_7 VSSQ_14 VDD_7 VSSQ_14

931_0402_1% H10 P13 H10 P13
t
H5 VDD_8 VSSQ_15 P2 H5 VDD_8 VSSQ_15 P2
VDD_9 VSSQ_16
Around VRAM VDD_9 VSSQ_16
1
D J1 R10 +1V8_AON J1 R10

2 QG2 2 2 J14 VDD_10 VSSQ_17 R5 J14 VDD_10 VSSQ_17 R5
<46> MEM_VREF
2
G MESS138W-G_SOT323-3 L1 VDD_11 VSSQ_18 T13 L1 VDD_11 VSSQ_18 T13

L14 VDD_12 VSSQ_19 T2 L14 VDD_12 VSSQ_19 T2
n
S
3
M10 VDD_13 VSSQ_20 U10 M10 VDD_13 VSSQ_20 U10

4.7U_0402_6.3V6M
M5 U5 M5 U5
CG485
CG486
N1 VDD_15 VSSQ_22 V13 N1 VDD_15 VSSQ_22 V13
VDD_16 VSSQ_23 1 1 1 VDD_16 VSSQ_23
CG484
N14 V2 N14 V2
e
T10 VDD_17 VSSQ_24 +1V8_AON T10 VDD_17 VSSQ_24 +1V8_AON
W1 VDD_18 W1 VDD_18
W11 VDD_19 A3 2 2 2 W11 VDD_19 A3
1U_0402_6.3V4Z
1U_0402_6.3V4Z
W14 VDD_20 190-BALL VPP_1 W3 W14 VDD_20 190-BALL VPP_1 W3
W4 VDD_21 SGRAM GDDR5X VPP_2 W4 VDD_21 SGRAM GDDR5X VPP_2
id
VDD_22 VDD_22
MT58K256M32JA-100_FBGA190P-NH MT58K256M32JA-100_FBGA190P-NH
A
+1.35VS_VGA
Under VRAM
nf +1.35VS_VGA +1V8_AON
Around VRAM 22uF 10uF 4.7uF 1uF 0.1uF
A
CG80
CG81
CG82
CG83
CG84
CG85
CG86
CG87
CG88
CG89
CG90
CG91
CG97
CG98
CG99
CG100
CG101
CG102
CG103
CG104
CG105
CG106
4.7U_0402_6.3V6M
CG496
CG497
1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1
VDD 3 3 6
o
1 1 1
CG495
2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
2 3 12
10U_0402_6.3V4Z
10U_0402_6.3V4Z
10U_0402_6.3V4Z
1U_0402_6.3V4Z
1U_0402_6.3V4Z
1U_0402_6.3V4Z
1U_0402_6.3V4Z
1U_0402_6.3V4Z
1U_0402_6.3V4Z
10U_0402_6.3V4Z
10U_0402_6.3V4Z
10U_0402_6.3V4Z
1U_0402_6.3V4Z
1U_0402_6.3V4Z
1U_0402_6.3V4Z
1U_0402_6.3V4Z
2 2 2 VDDQ
1U_0402_6.3V4Z
1U_0402_6.3V4Z
5 C 4 3
2
Compal Secret Data
Size
Date:
LA-D753P
N17E-GDDR5_A
Document Number

1
Sheet 52 of 82
Rev
0.2
5 4 3 2 1
@ MF=1 @ MF=0
UG3 UG4

D3 B4 D3 B4
<48> FBB_EDC3 EDC0 EDC3 DQ24 DQ0 FBB_D24 <48> <48> FBB_EDC4 EDC0 EDC3 DQ24 DQ0 FBB_D32 <48>
D12 B3 D12 B3
T12 C4 T12 C4
T3 C3 T3 C3
y
F4 F4
DQ28 DQ4 FBB_D28 <48> DQ28 DQ4 FBB_D36 <48>
F3 F3
<48> FBB_CLK0 DQ29 DQ5 FBB_D29 <48> <48> FBB_CLK1 DQ29 DQ5 FBB_D37 <48>
l
E3 G4 E3 G4
<48> FBB_DBI3 DBI0# DBI3# DQ30 DQ6 FBB_D30 <48> <48> FBB_DBI4 DBI0# DBI3# DQ30 DQ6 FBB_D38 <48>
E12 G3 E12 G3
R12 B11 R12 B11
D <48> FBB_DBI1 DBI2# DBI1# DQ16 DQ8 FBB_D16 <48> <48> FBB_DBI6 DBI2# DBI1# DQ16 DQ8 FBB_D40 <48> D
R3 B12 R3 B12
C11 C11
n
C12 C12
K11 F11 K11 F11
CK DQ20 DQ12 FBB_D20 <48> CK DQ20 DQ12 FBB_D44 <48>
K10 F12 K10 F12
CK# DQ21 DQ13 FBB_D21 <48> CK# DQ21 DQ13 FBB_D45 <48>
H11 G11 H11 G11
<48> FBB_CMD15 CKE# WE# DQ22 DQ14 FBB_D22 <48> <48> FBB_CMD29 CKE# WE# DQ22 DQ14 FBB_D46 <48>
G12 G12
V11 V11
J11 V12 J11 V12
<48> FBB_CMD9 BA0/A2 BA2/A4 DQ9 DQ17 FBB_D9 <48> <48> FBB_CMD28 BA0/A2 BA2/A4 DQ9 DQ17 FBB_D49 <48>
O
L10 U11 L10 U11
L11 U12 L11 U12
J10 P11 J10 P11
<48> FBB_CLK0# <48> FBB_CMD10 BA3/A3 BA1/A5 DQ12 DQ20 FBB_D12 <48> <48> FBB_CLK1# <48> FBB_CMD27 BA3/A3 BA1/A5 DQ12 DQ20 FBB_D52 <48>
P12 P12
N11 N11
N12 N12
r
L4 V4 L4 V4
<48> FBB_CMD4 A8/A7 A10/A0 DQ0 DQ24 FBB_D0 <48> <48> FBB_CMD24 A8/A7 A10/A0 DQ0 DQ24 FBB_D56 <48>
J5 V3 J5 V3
J4 U4 J4 U4
L5 U3 L5 U3
<48> FBB_CMD3 FBB_D3 <48> <48> FBB_CMD23 FBB_D59 <48>
e
K5 A11/A6 A9/A1 DQ3 DQ27 P4 K5 A11/A6 A9/A1 DQ3 DQ27 P4
+1.35VS_VGA <48> FBB_CMD5 A12/A13 DQ4 DQ28 FBB_D4 <48> <48> FBB_CMD21 A12/A13 DQ4 DQ28 FBB_D60 <48>
K12 P3 K12 P3
<48> FBB_CMD14 A14/A15 DQ5 DQ29 FBB_D5 <48> <48> FBB_CMD30 A14/A15 DQ5 DQ29 FBB_D61 <48>
N4 N4
N3 N3
RG115 2 1 1K_0402_1% W12 RG116 2 1 1K_0402_1% W12
b
RG119 2 1 121_0402_1% H13 MF RG120 2 1 121_0402_1% H13 MF
ZQ ZQ
M2 M2
M13 TCK M13 TCK
H2 TDO H2 TDO
TMS A13 TMS A13
VDDQ_1 VDDQ_1
m
A2 A2
<48> FBB_CMD6 ABI# VDDQ_3 <48> FBB_CMD22 ABI# VDDQ_3
H4 B5 H4 B5
<48> FBB_CMD0 RAS# CAS# VDDQ_4 <48> FBB_CMD18 RAS# CAS# VDDQ_4
M4 C1 M4 C1
<48> FBB_CMD2 CAS# RAS# VDDQ_5 <48> FBB_CMD16 CAS# RAS# VDDQ_5
M11 C13 M11 C13
e
<48> FBB_CMD13 WE# CKE# VDDQ_6 <48> FBB_CMD31 WE# CKE# VDDQ_6
C14 C14
VDDQ_7 C2 VDDQ_7 C2
<48> FBB_WCK23# WCK01# WCK23# VDDQ_9 <48> FBB_WCK45# WCK01# WCK23# VDDQ_9
C D4 E11 +1.35VS_VGA D4 E11 C
<48> FBB_WCK23 WCK01 WCK23 VDDQ_10 <48> FBB_WCK45 WCK01 WCK23 VDDQ_10
E13 E13
<48> FBB_WCK01# WCK23# WCK01# VDDQ_12 <48> FBB_WCK67# WCK23# WCK01# VDDQ_12
T4 E2 T4 E2
<48> FBB_WCK01 WCK23 WCK01 VDDQ_13 <48> FBB_WCK67 WCK23 WCK01 VDDQ_13
m
E4 E4
CG344
CG345
CG346
CG347
CG348
CG349
CG350
CG351
CG352
CG353
VDDQ_15 1 1 1 1 1 1 1 1 1 1 VDDQ_15
F5 F5
+FBB_VREFC K13 VDDQ_16 G13 +FBB_VREFC K13 VDDQ_16 G13
VDDQ_18 H12 2 2 2 2 2 2 2 2 2 2 VDDQ_18 H12
22U_0402_6.3V6M
10U_0402_6.3V4Z
10U_0402_6.3V4Z
10U_0402_6.3V4Z
1U_0402_6.3V4Z
1U_0402_6.3V4Z
1U_0402_6.3V4Z
1U_0402_6.3V4Z
1U_0402_6.3V4Z
1U_0402_6.3V4Z
K2 VDDQ_20 J13 K2 VDDQ_20 J13
<48> FBB_CMD1 RESET# VDDQ_21 <48> FBB_CMD17 RESET# VDDQ_21
J2 J2
T
VDDQ_22 L13 VDDQ_22 L13
A10 VDDQ_23 L2 A10 VDDQ_23 L2
+1.35VS_VGA A5 VSS_1 VDDQ_24 M12 A5 VSS_1 VDDQ_24 M12
I
CG426
CG427
CG428
CG429
CG430
CG431
CG432
CG433
CG434
CG435
CG436
CG437
CG438
CG439
CG440
CG441
F1 VSS_7 VDDQ_30 R1 F1 VSS_7 VDDQ_30 R1

1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 VSS_8 VDDQ_31
C
F14 R11 F14 VSS_8 VDDQ_31 R11
@ @ @ @ @ @ @ @ @ @ @ @ @ @ @ @ H1 VSS_9 VDDQ_32 R13 H1 VSS_9 VDDQ_32 R13
2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 J12 VSS_11 VDDQ_34 R2 +1.35VS_VGA J12 VSS_11 VDDQ_34 R2
22U_0402_6.3V6M
22U_0402_6.3V6M
22U_0402_6.3V6M
10U_0402_6.3V4Z
10U_0402_6.3V4Z
10U_0402_6.3V4Z
1U_0402_6.3V4Z
1U_0402_6.3V4Z
1U_0402_6.3V4Z
1U_0402_6.3V4Z
1U_0402_6.3V4Z
1U_0402_6.3V4Z
1U_0402_6.3V4Z
1U_0402_6.3V4Z
1U_0402_6.3V4Z
1U_0402_6.3V4Z

r
CG354
CG355
CG356
CG357
CG358
CG359
CG360
CG361
CG362
CG363
VSS_17 VDDQ_40 1 1 1 1 1 1 1 1 1 1 VSS_17 VDDQ_40
L3 V10 L3 V10
o
M14 VSS_19 VDDQ_42 W13 M14 VSS_19 VDDQ_42 W13
P1 VSS_20 VDDQ_43 W2 2 2 2 2 2 2 2 2 2 2 P1 VSS_20 VDDQ_43 W2
1U_0402_6.3V4Z
1U_0402_6.3V4Z
1U_0402_6.3V4Z
1U_0402_6.3V4Z
1U_0402_6.3V4Z
1U_0402_6.3V4Z
1U_0402_6.3V4Z
1U_0402_6.3V4Z
1U_0402_6.3V4Z
1U_0402_6.3V4Z
T1 VSS_22 T1 VSS_22
T11 VSS_23 T11 VSS_23
F
T14 VSS_24 B13 T14 VSS_24 B13
B +1.35VS_VGA V14 VSS_26 VSSQ_2 C10 V14 VSS_26 VSSQ_2 C10 B
W5 VSS_28 VSSQ_4 D13 W5 VSS_28 VSSQ_4 D13
l
1
+1.35VS_VGA VSS_29 VSSQ_5 D2 +1.35VS_VGA VSS_29 VSSQ_5 D2

RG121 VSSQ_6 E10 VSSQ_6 E10
549_0402_1% A1 VSSQ_7 E5 A1 VSSQ_7 E5
A11 VDD_1 VSSQ_8 F13 A11 VDD_1 VSSQ_8 F13
a
A14 F2 A14 F2
2

1 2 +FBB_VREFC W=16mils D10 VDD_4 VSSQ_11 G5 D10 VDD_4 VSSQ_11 G5
i
G1 VDD_5 VSSQ_12 N10 G1 VDD_5 VSSQ_12 N10
1
RG122 G14 N5 G14 N5

RG123
CG113
820P_0402_25V7
CG114
820P_0402_25V7
1.33K_0402_1%
1 1
931_0402_1% H10 VDD_7 VSSQ_14 P13 +1V8_AON
Around VRAM H10 VDD_7 VSSQ_14 P13
t
H5 VDD_8 VSSQ_15 P2 H5 VDD_8 VSSQ_15 P2
1
D J1 R10 J1 R10
2 QG3 2 2 J14 VDD_10 VSSQ_17 R5 J14 VDD_10 VSSQ_17 R5
<46> MEM_VREF
2
G MESS138W-G_SOT323-3 L1 VDD_11 VSSQ_18 T13 L1 VDD_11 VSSQ_18 T13

4.7U_0402_6.3V6M
L14 T2 L14 T2
CG507
CG508
n
S
3
M10 VDD_13 VSSQ_20 U10 M10 VDD_13 VSSQ_20 U10

CG506
M5 U5 M5 U5
e
T10 VDD_17 VSSQ_24 +1V8_AON 2 2 2 T10 VDD_17 VSSQ_24 +1V8_AON
1U_0402_6.3V4Z
1U_0402_6.3V4Z
W1 VDD_18 W1 VDD_18
W11 VDD_19 A3 W11 VDD_19 A3
id
VDD_22 VDD_22
Under VRAM
f
+1.35VS_VGA +1.35VS_VGA
+1V8_AON
n
CG115
CG116
CG117
CG118
CG119
CG120
CG121
CG122
CG123
CG124
CG125
CG126
CG132
CG133
CG134
CG135
CG136
CG137
CG138
CG139
CG140
CG141
A 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 A
VDD 3 3 6
4.7U_0402_6.3V6M
CG518
CG519
o
1 1 1
2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2
CG517
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
10U_0402_6.3V4Z
10U_0402_6.3V4Z
10U_0402_6.3V4Z
1U_0402_6.3V4Z
1U_0402_6.3V4Z
1U_0402_6.3V4Z
1U_0402_6.3V4Z
1U_0402_6.3V4Z
1U_0402_6.3V4Z
10U_0402_6.3V4Z
10U_0402_6.3V4Z
10U_0402_6.3V4Z
1U_0402_6.3V4Z
1U_0402_6.3V4Z
1U_0402_6.3V4Z
1U_0402_6.3V4Z
VDDQ 2 3 12
2 2 2
1U_0402_6.3V4Z
1U_0402_6.3V4Z
5 C 4 3
Compal Secret Data
2
Size
Date:
N17E-GDDR5_B
Document Number
LA-D751P

1
Sheet 53 of 82
Rev
0.2
5 4 3 2 1
@ MF=1 @ MF=0
UG5 UG6

D3 B4 D3 B4
<48> FBC_EDC3 EDC0 EDC3 DQ24 DQ0 FBC_D24 <48> <48> FBC_EDC4 EDC0 EDC3 DQ24 DQ0 FBC_D32 <48>
D12 B3 D12 B3
T12 C4 T12 C4
T3 C3 T3 C3
F4 F4
DQ28 DQ4 FBC_D28 <48> DQ28 DQ4 FBC_D36 <48>
F3 F3
<48> FBC_CLK0 DQ29 DQ5 FBC_D29 <48> <48> FBC_CLK1 DQ29 DQ5 FBC_D37 <48>
E3 G4 E3 G4
y
<48> FBC_DBI3 DBI0# DBI3# DQ30 DQ6 FBC_D30 <48> <48> FBC_DBI4 DBI0# DBI3# DQ30 DQ6 FBC_D38 <48>
E12 G3 E12 G3
R12 B11 R12 B11
l
R3 B12 R3 B12
C11 C11
C12 C12
D DQ19 DQ11 FBC_D19 <48> DQ19 DQ11 FBC_D43 <48> D
K11 F11 K11 F11
CK DQ20 DQ12 FBC_D20 <48> CK DQ20 DQ12 FBC_D44 <48>
K10 F12 K10 F12
CK# DQ21 DQ13 FBC_D21 <48> CK# DQ21 DQ13 FBC_D45 <48>
n
H11 G11 H11 G11
<48> FBC_CMD15 CKE# WE# DQ22 DQ14 FBC_D22 <48> <48> FBC_CMD29 CKE# WE# DQ22 DQ14 FBC_D46 <48>
G12 G12
V11 V11
J11 V12 J11 V12
<48> FBC_CMD9 BA0/A2 BA2/A4 DQ9 DQ17 FBC_D9 <48> <48> FBC_CMD28 BA0/A2 BA2/A4 DQ9 DQ17 FBC_D49 <48>
L10 U11 L10 U11
L11 U12 L11 U12
J10 P11 J10 P11
<48> FBC_CLK0# <48> FBC_CMD10 BA3/A3 BA1/A5 DQ12 DQ20 FBC_D12 <48> <48> FBC_CLK1# <48> FBC_CMD27 BA3/A3 BA1/A5 DQ12 DQ20 FBC_D52 <48>
O
P12 P12
N11 N11
N12 N12
L4 V4 L4 V4
<48> FBC_CMD4 A8/A7 A10/A0 DQ0 DQ24 FBC_D0 <48> <48> FBC_CMD24 A8/A7 A10/A0 DQ0 DQ24 FBC_D56 <48>
J5 V3 J5 V3
J4 U4 J4 U4
r
L5 U3 L5 U3
K5 P4 K5 P4
+1.35VS_VGA <48> FBC_CMD5 A12/A13 DQ4 DQ28 FBC_D4 <48> <48> FBC_CMD21 A12/A13 DQ4 DQ28 FBC_D60 <48>
K12 P3 K12 P3
<48> FBC_CMD14 A14/A15 DQ5 DQ29 FBC_D5 <48> <48> FBC_CMD30 A14/A15 DQ5 DQ29 FBC_D61 <48>
N4 N4
FBC_D6 <48> FBC_D62 <48>
e
DQ6 DQ30 N3 DQ6 DQ30 N3
RG126 2 1 1K_0402_1% W12 RG127 2 1 1K_0402_1% W12
RG130 2 1 121_0402_1% H13 MF RG131 2 1 121_0402_1% H13 MF
ZQ ZQ
M2 M2
b
M13 TCK M13 TCK
H2 TDO H2 TDO
TMS A13 TMS A13
VDDQ_1 A2 VDDQ_1 A2
<48> FBC_CMD6 ABI# VDDQ_3 <48> FBC_CMD22 ABI# VDDQ_3
H4 B5 H4 B5
<48> FBC_CMD0 RAS# CAS# VDDQ_4 <48> FBC_CMD18 RAS# CAS# VDDQ_4
m
M4 C1 M4 C1
<48> FBC_CMD2 CAS# RAS# VDDQ_5 <48> FBC_CMD16 CAS# RAS# VDDQ_5
M11 C13 M11 C13
<48> FBC_CMD13 WE# CKE# VDDQ_6 <48> FBC_CMD31 WE# CKE# VDDQ_6
C14 C14
VDDQ_7 C2 VDDQ_7 C2
e
<48> FBC_WCK23# WCK01# WCK23# VDDQ_9 <48> FBC_WCK45# WCK01# WCK23# VDDQ_9
D4 E11 D4 E11
<48> FBC_WCK23 WCK01 WCK23 VDDQ_10 <48> FBC_WCK45 WCK01 WCK23 VDDQ_10
E13 E13
T5 VDDQ_11 E14 +1.35VS_VGA T5 VDDQ_11 E14
<48> FBC_WCK01# WCK23# WCK01# VDDQ_12 <48> FBC_WCK67# WCK23# WCK01# VDDQ_12
C T4 E2 T4 E2 C
<48> FBC_WCK01 WCK23 WCK01 VDDQ_13 <48> FBC_WCK67 WCK23 WCK01 VDDQ_13
E4 E4
CG364
CG365
CG366
CG367
CG368
CG369
CG370
CG371
CG372
CG373
+FBC_VREFC VDDQ_16 +FBC_VREFC VDDQ_16
m
K13 G13 1 1 1 1 1 1 1 1 1 1 K13 G13
K2 VDDQ_20 J13 2 2 2 2 2 2 2 2 2 2 K2 VDDQ_20 J13
22U_0402_6.3V6M
10U_0402_6.3V4Z
10U_0402_6.3V4Z
10U_0402_6.3V4Z
1U_0402_6.3V4Z
1U_0402_6.3V4Z
1U_0402_6.3V4Z
1U_0402_6.3V4Z
1U_0402_6.3V4Z
1U_0402_6.3V4Z
<48> FBC_CMD1 RESET# VDDQ_21 <48> FBC_CMD17 RESET# VDDQ_21
J2 J2
VDDQ_22 L13 VDDQ_22 L13
+1.35VS_VGA
GDDR5_C A10
A5 VSS_1
VDDQ_23
VDDQ_24
L2
M12
A10
A5 VSS_1
VDDQ_23
VDDQ_24
L2
M12
T
I
CG442
CG443
CG444
CG445
CG446
CG447
CG448
CG449
CG450
CG451
CG452
CG453
CG454
CG455
CG456
CG457

1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 VSS_7 VDDQ_30 VSS_7 VDDQ_30
F1 R1 F1 R1
@ @ @ @ @ @ @ @ @ @ @ @ @ @ @ @ F14 VSS_8 VDDQ_31 R11 F14 VSS_8 VDDQ_31 R11
2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 H14 VSS_10 VDDQ_33 R14 H14 VSS_10 VDDQ_33 R14
22U_0402_6.3V6M
22U_0402_6.3V6M
22U_0402_6.3V6M
1U_0402_6.3V4Z
1U_0402_6.3V4Z
1U_0402_6.3V4Z
1U_0402_6.3V4Z
1U_0402_6.3V4Z
1U_0402_6.3V4Z
1U_0402_6.3V4Z
1U_0402_6.3V4Z
1U_0402_6.3V4Z
1U_0402_6.3V4Z
10U_0402_6.3V4Z
10U_0402_6.3V4Z
10U_0402_6.3V4Z
VSS_11 VDDQ_34
C
J12 R2 J12 VSS_11 VDDQ_34 R2
K1 VSS_13 VDDQ_36 U1 +1.35VS_VGA K1 VSS_13 VDDQ_36 U1
r
L3 VSS_17 VDDQ_40 V10 L3 VSS_17 VDDQ_40 V10
CG374
CG375
CG376
CG377
CG378
CG379
CG380
CG381
CG382
CG383
VSS_19 VDDQ_42 1 1 1 1 1 1 1 1 1 1 VSS_19 VDDQ_42
M14 W13 M14 W13
P1 VSS_20 VDDQ_43 W2 P1 VSS_20 VDDQ_43 W2
o
T1 VSS_22 2 2 2 2 2 2 2 2 2 2 T1 VSS_22
1U_0402_6.3V4Z
1U_0402_6.3V4Z
1U_0402_6.3V4Z
1U_0402_6.3V4Z
1U_0402_6.3V4Z
1U_0402_6.3V4Z
1U_0402_6.3V4Z
1U_0402_6.3V4Z
1U_0402_6.3V4Z
1U_0402_6.3V4Z
T11 VSS_23 T11 VSS_23
T14 VSS_24 B13 T14 VSS_24 B13
V14 VSS_26 VSSQ_2 C10 V14 VSS_26 VSSQ_2 C10
F
+1.35VS_VGA W5 VSS_28 VSSQ_4 D13 W5 VSS_28 VSSQ_4 D13
B +1.35VS_VGA VSS_29 VSSQ_5 D2 +1.35VS_VGA VSS_29 VSSQ_5 D2 B
VSSQ_6 E10 VSSQ_6 E10
VSSQ_7 VSSQ_7
1
A1 E5 A1 E5
l
RG132 A11 VDD_1 VSSQ_8 F13 A11 VDD_1 VSSQ_8 F13
549_0402_1% A14 VDD_2 VSSQ_9 F2 A14 VDD_2 VSSQ_9 F2
D10 VDD_4 VSSQ_11 G5 D10 VDD_4 VSSQ_11 G5
2
a
G1 N10 G1 N10
1 2 +FBC_VREFC W=16mils G14 VDD_6
VDD_7
VSSQ_13
VSSQ_14
N5 G14 VDD_6
VDD_7
VSSQ_13
VSSQ_14
N5
H10 P13 H10 P13
i
1
RG133 H5 P2 H5 P2
RG134
CG148
CG149
820P_0402_25V7
820P_0402_25V7
1.33K_0402_1%
1 1
931_0402_1% J1
J14
VDD_9
VDD_10
VSSQ_16
VSSQ_17
R10
R5
+1V8_AON
Around VRAM J1
J14
VDD_9
VDD_10
VSSQ_16
VSSQ_17
R10
R5
t
1
D L1 VDD_11 VSSQ_18 T13 L1 VDD_11 VSSQ_18 T13

2 QG4 2 2 L14 VDD_12 VSSQ_19 T2 L14 VDD_12 VSSQ_19 T2
<46> MEM_VREF
2
G MESS138W-G_SOT323-3 M10 VDD_13 VSSQ_20 U10 M10 VDD_13 VSSQ_20 U10

4.7U_0402_6.3V6M
M5 U5 M5 U5
CG529
CG530
S
3
n
CG528
N14 V2 N14 V2
T10 VDD_17 VSSQ_24 +1V8_AON T10 VDD_17 VSSQ_24 +1V8_AON
W1 VDD_18 W1 VDD_18
W11 VDD_19 A3 2 2 2 W11 VDD_19 A3
1U_0402_6.3V4Z
1U_0402_6.3V4Z
e
VDD_22 VDD_22
+1.35VS_VGA
nf id +1.35VS_VGA
+1V8_AON
CG150
CG151
CG152
CG153
CG154
CG155
CG156
CG157
CG158
CG159
CG160
CG161
CG167
CG168
CG169
CG170
CG171
CG172
CG173
CG174
CG175
CG176
A 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 A
VDD 3 3 6
4.7U_0402_6.3V6M
CG540
CG541
o
1 1 1
2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2
CG539
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
10U_0402_6.3V4Z
10U_0402_6.3V4Z
10U_0402_6.3V4Z
1U_0402_6.3V4Z
1U_0402_6.3V4Z
1U_0402_6.3V4Z
1U_0402_6.3V4Z
1U_0402_6.3V4Z
1U_0402_6.3V4Z
10U_0402_6.3V4Z
10U_0402_6.3V4Z
10U_0402_6.3V4Z
1U_0402_6.3V4Z
1U_0402_6.3V4Z
1U_0402_6.3V4Z
1U_0402_6.3V4Z
VDDQ 2 3 12
2 2 2
1U_0402_6.3V4Z
1U_0402_6.3V4Z
5 C 4 3
Compal Secret Data
Deciphered Date
2
2017/01/06 Title
Size
Date:
LA-D751P
N17E-GDDR5_C
Document Number

1
Sheet 54 of 82
Rev
0.2
5 4 3 2 1
@ MF=1 @ MF=0
UG7 UG8

D3 B4 D3 B4
<48> FBD_EDC3 EDC0 EDC3 DQ24 DQ0 FBD_D24 <48> <48> FBD_EDC4 EDC0 EDC3 DQ24 DQ0 FBD_D32 <48>
D12 B3 D12 B3
T12 C4 T12 C4
T3 C3 T3 C3
F4 F4
y
DQ28 DQ4 FBD_D28 <48> DQ28 DQ4 FBD_D36 <48>
F3 F3
<48> FBD_CLK0 DQ29 DQ5 FBD_D29 <48> <48> FBD_CLK1 DQ29 DQ5 FBD_D37 <48>
E3 G4 E3 G4
<48> FBD_DBI3 DBI0# DBI3# DQ30 DQ6 FBD_D30 <48> <48> FBD_DBI4 DBI0# DBI3# DQ30 DQ6 FBD_D38 <48>
l
E12 G3 E12 G3
R12 B11 R12 B11
R3 B12 R3 B12
D <48> FBD_DBI0 DBI3# DBI0# DQ17 DQ9 FBD_D17 <48> <48> FBD_DBI7 DBI3# DBI0# DQ17 DQ9 FBD_D41 <48> D
C11 C11
C12 C12
n
K11 F11 K11 F11
CK DQ20 DQ12 FBD_D20 <48> CK DQ20 DQ12 FBD_D44 <48>
K10 F12 K10 F12
CK# DQ21 DQ13 FBD_D21 <48> CK# DQ21 DQ13 FBD_D45 <48>
H11 G11 H11 G11
<48> FBD_CMD15 CKE# WE# DQ22 DQ14 FBD_D22 <48> <48> FBD_CMD29 CKE# WE# DQ22 DQ14 FBD_D46 <48>
G12 G12
V11 V11
J11 V12 J11 V12
<48> FBD_CMD9 BA0/A2 BA2/A4 DQ9 DQ17 FBD_D9 <48> <48> FBD_CMD28 BA0/A2 BA2/A4 DQ9 DQ17 FBD_D49 <48>
L10 U11 L10 U11
O
L11 U12 L11 U12
J10 P11 J10 P11
<48> FBD_CLK0# <48> FBD_CMD10 BA3/A3 BA1/A5 DQ12 DQ20 FBD_D12 <48> <48> FBD_CLK1# <48> FBD_CMD27 BA3/A3 BA1/A5 DQ12 DQ20 FBD_D52 <48>
P12 P12
N11 N11
N12 N12
L4 V4 L4 V4
r
<48> FBD_CMD4 A8/A7 A10/A0 DQ0 DQ24 FBD_D0 <48> <48> FBD_CMD24 A8/A7 A10/A0 DQ0 DQ24 FBD_D56 <48>
J5 V3 J5 V3
J4 U4 J4 U4
L5 U3 L5 U3
K5 P4 K5 P4
<48> FBD_CMD5 FBD_D4 <48> <48> FBD_CMD21 FBD_D60 <48>
e
+1.35VS_VGA K12 A12/A13 DQ4 DQ28 P3 K12 A12/A13 DQ4 DQ28 P3
<48> FBD_CMD14 A14/A15 DQ5 DQ29 FBD_D5 <48> <48> FBD_CMD30 A14/A15 DQ5 DQ29 FBD_D61 <48>
N4 N4
N3 N3
RG158 2 1 1K_0402_1% W12 RG161 2 1 1K_0402_1% W12
RG157 2 1 121_0402_1% H13 MF RG162 2 1 121_0402_1% H13 MF
b
ZQ ZQ
M2 M2
M13 TCK M13 TCK
H2 TDO H2 TDO
TMS A13 TMS A13
VDDQ_1 A2 VDDQ_1 A2
VDDQ_2 VDDQ_2
m
K4 B10 K4 B10
<48> FBD_CMD6 ABI# VDDQ_3 <48> FBD_CMD22 ABI# VDDQ_3
H4 B5 H4 B5
<48> FBD_CMD0 RAS# CAS# VDDQ_4 <48> FBD_CMD18 RAS# CAS# VDDQ_4
M4 C1 M4 C1
<48> FBD_CMD2 CAS# RAS# VDDQ_5 <48> FBD_CMD16 CAS# RAS# VDDQ_5
M11 C13 M11 C13
<48> FBD_CMD13 WE# CKE# VDDQ_6 <48> FBD_CMD31 WE# CKE# VDDQ_6
C14 C14
e
VDDQ_7 C2 VDDQ_7 C2
<48> FBD_WCK23# WCK01# WCK23# VDDQ_9 <48> FBD_WCK45# WCK01# WCK23# VDDQ_9
D4 E11 +1.35VS_VGA D4 E11
<48> FBD_WCK23 WCK01 WCK23 VDDQ_10 <48> FBD_WCK45 WCK01 WCK23 VDDQ_10
C E13 E13 C
<48> FBD_WCK01# WCK23# WCK01# VDDQ_12 <48> FBD_WCK67# WCK23# WCK01# VDDQ_12
T4 E2 T4 E2

17R4 LA-D753P

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17R4 LA-D753P

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A B C D E

MODEL NAME : BAP10(15")/BAP20(17")

DA80017K000 LS-D759P IO_14L/B

REV : 0.2 (X01)

PCB 1FU LA-C901P REV1 MB MLK TRIP 3 A31!

PCB AAP01 LA-C901P LS-A302P/A303P/C904P 02 TRIPOD A31 !

HDMI@ ROYALTY HDMI W/LOGO

RO0000002HM HDMI W/Logo:RO0000002HM

Security Classification Compal Secret Data Compal Electronics, Inc.

30 pin connector with cable

Security Classification Compal Secret Data Compal Electronics, Inc.

LS-D75CP TRON_FRONT_15/B LS-D75CP TRON_FRONT_15/B FPC

Security Classification Compal Secret Data Compal Electronics, Inc.

Board ID Table for AD channel PCH-H CM236

* PCIe 13~16 in "Lane Reversal Mode". (HSIO Port 19~22)

Compal Electronics, Inc.

B5 UT4 SMBUS Address [0x70]

0 ohm ALC1309 SMBUS Address [0x22]

Security Classification Compal Secret Data Compal Electronics, Inc.

RH497 1 CMC@ 2 51_0402_5% CPU_XDP_TRST# INTEL_CMC_PRIMARY

Issued Date Deciphered Date

<19> DMI_CRX_PTX_P1 DMI_CTX_PRX_P1 <19>

<19> DMI_CRX_PTX_P3 DMI_CRX_PTX_N3 DMI_RXP[3] DMI_TXP[3] DMI_CTX_PRX_N3 DMI_CTX_PRX_P3 <19>

S IC A31 CL8067702869810 QL2X A0 2.7G FCBGA 1440

Security Classification Compal Secret Data Compal Electronics, Inc.

DDR CHANNEL A RH148 1 2 121_0402_1% DDR_RCOMP0 G1 BN13

Co Trace width=12~15 mils

Security Classification Compal Secret Data Compal Electronics, Inc.

Issued Date 2016/01/06 Deciphered Date 2017/01/06 Title

Display Port Presence Strap

PCIE Port Bifurcation Straps

CFG6 1 2 RH493 1 2 2.2K_0402_5% PCH_SYS_PWROK_XDP

RH496 1 @ 2 51_0402_5% XDP_TDO

Co Security Classification Compal Secret Data Compal Electronics, Inc.

Issued Date 2016/01/06 Deciphered Date 2017/01/06 Title

N37 V14 AY13

Security Classification Compal Secret Data Compal Electronics, Inc.

+VCCIO +VCCSTG +VCCST

Tuesday, July 05, 2016

Issued Date Deciphered Date

220U_D7_2VM_R6M 135 136

DDR_A_D41 195 196

RD35 197 198 DDR_A_DQS#5

205 DQ46 DQ47 206

DDR_A_D42 207 VSS71 VSS72 208 DDR_A_D46

DDR_A_D54 215 216 DDR_A_D52

RD28 RD29 RD30 217 218

DDR_A_D53 225 VSS80 DQ54 226

DDR_A_D62 249 250 DDR_A_D63

259 VPP1 VTT 260 DIMM_CHA_SA1

Security Classification Compal Secret Data Compal Electronics, Inc.

220U_D7_2VM_R6M 149 150

DDR_B_D52 211 212 DDR_B_D54

DDR_B_DQS6 221 DQS6_c DM6_n/DBI6_n 222

DDR_B_D55 229 230

239 DQ56 VSS87 240 DDR_B_DQS#7

S IC GLCM236 SR2CE D1 FCBGA 837P PCH-H

<29> PCIE_PTX_DRX_N11 PCIE_PRX_DTX_P11 PCIE11_TXN PCIE16_TXP/SATA3_TXP SATA_PTX_DRX_P3 <33>

H33 RH512 10K_0402_5%

<29> PCIE_PRX_DTX_P20 PCIE_PRX_DTX_N20 PCIE20_RXP/SATA7_RXP H_THERMTRIP#_R H_THERMTRIP#

<29> PCIE_PTX_DRX_P19 PCIE_PTX_DRX_N19 PCIE19_TXP/SATA6_TXP PECI H_PM_SYNC_R H_PECI <9,43>

GPP_G22 STRAP5_PCH <51>

Co Security Classification Compal Secret Data Compal Electronics, Inc.

Issued Date 2016/01/06 Deciphered Date 2017/01/06 Title