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Advances in Non-volatile Memory
and Storage Technology
Woodhead Publishing Series in Electronic and
Optical Materials
Advances in Non-volatile
Memory and Storage
Technology
Second Edition
Edited by
Blanka Magyari-Köpe
Yoshio Nishi
An imprint of Elsevier
Woodhead Publishing is an imprint of Elsevier
The Officers’ Mess Business Centre, Royston Road, Duxford, CB22 4QH, United Kingdom
50 Hampshire Street, 5th Floor, Cambridge, MA 02139, United States
The Boulevard, Langford Lane, Kidlington, OX5 1GB, United Kingdom
Copyright © 2019 Elsevier Ltd. All rights reserved.
No part of this publication may be reproduced or transmitted in any form or by any means, electronic or
mechanical, including photocopying, recording, or any information storage and retrieval system, without
permission in writing from the publisher. Details on how to seek permission, further information about
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Clearance Center and the Copyright Licensing Agency, can be found at our website: www.elsevier.com/
permissions.
This book and the individual contributions contained in it are protected under copyright by the Publisher
(other than as may be noted herein).
Notices
Knowledge and best practice in this field are constantly changing. As new research and experience
broaden our understanding, changes in research methods, professional practices, or medical treatment
may become necessary.
Practitioners and researchers must always rely on their own experience and knowledge in evaluating
and using any information, methods, compounds, or experiments described herein. In using such
information or methods they should be mindful of their own safety and the safety of others, including
parties for whom they have a professional responsibility.
To the fullest extent of the law, neither the Publisher nor the authors, contributors, or editors, assume
any liability for any injury and/or damage to persons or property as a matter of products liability,
negligence or otherwise, or from any use or operation of any methods, products, instructions, or ideas
contained in the material herein.
Cheol Seong Hwang Department of Materials Science and Engineering, and Inter-
University Semiconductor Research Center, Seoul National University, Seoul, South
Korea
1.1 Introduction
1.1.1 Nonvolatile memory applications
1.1.1.1 Storage-class memory (SCM)
In today’s computational systems, memories are categorized into volatile memory and
nonvolatile memory (NVM) technologies.
Due to the ever increasing demand for more memory capacity, planar NAND Flash
has been scaled down to below 20-nm feature size. Concomitantly, three-dimensional
(3D) vertical NAND Flash has been developed as a Bit-Cost-Scalable (BiCS) solution
and allows today entering the Terabyte era. As a result, the NVM market is by far
dominated by NAND Flash technology, and the forecast is that the future of NAND
will be NAND [1].
In the volatile memory category, the main technologies are the static RAM (SRAM)
and dynamic RAM (DRAM), which are higher-speed and higher-performance tech-
nologies, however, exhibit poor scalability. Their role in a central process unit (CPU)
is to store data that require immediate access while NAND Flash or hard-disk drive
(HDD) store information that is not required immediately but for available future us-
age [2].
The problem arises when transferring data from DRAM to NAND: the overall per-
formance of the system is limited by the huge latency gap between these two tech-
nologies. This gap has been virtually fitted with architectural solutions to increase
the data access speed but at the expense of complex system design and increased
chip area. In recent years, researchers have started exploring the possibility of novel
memory concepts to improve the existing memory hierarchy. The concept of storage
class memory (SCM) has been proposed, aiming to fill the access time gap between
the “memory-memory” and the “storage-memory.”
As a “bridge” technology between DRAM and Flash, the main requirements for
SCM are intermediate between DRAM and Flash and should be cost effective.
In short, SCM should be enabled by a nonvolatile, cheap, and scalable technology
having clearly better reliability (write endurance and retention) than Flash. At the lead
in this future booming market, Intel-Micron announced the 3D X-point Memory in
2015 [3] and launched products in 2017. Although not officially confirmed by Intel-
Micron, it is generally agreed in the memory community that 3D X-point is based on
phase-change memory technology.
dielectric layer. These devices are generally referred to as filamentary RRAM devices,
whose characteristics mainly depend on the CF. In particular, due to the nanoscale
character of the switching, filamentary RRAM has been so far perceived as highly
scalable [5,9], and has thus been developed intensively.
This is, for example, the case of electrochemical metallization memory (ECM) and
valence change memory (VCM) cell concepts.
The ECM concept has led to the development of the conductive bridge RAM tech-
nology (CBRAM), whereby the filament consists of metallic species injected from an
active electrode, typically Ag or Cu, into the dielectric layer [10].
On the other hand, the VCM concept is at play in the Oxide switching RAM tech-
nology (OxRAM), whereby the dielectric layer is an insulating oxide material through
which a CF of oxygen-vacancy defects (Vo) is electrically created [11]. This technol-
ogy generally uses a transition metal oxide (TMO) material, typically HfO2, Ta2O5, or
TiO2 [11,12].
On the other hand, devices with nonfilamentary resistive switching mechanism
have also been reported [13,14]. These devices exhibit area-dependent current flow,
which is not observed in filamentary RRAM after the filament has been created. Here
the resistive switching is achieved by modulation of the effective tunneling barrier
thickness at the oxide-metal interface, as induced electrically by the uniform motion
of Vo defects. An advantage of this concept is the scalability of the operating current
with the device area.
Between these different concepts, this chapter is dedicated to the filamentary
OxRAM technology, and we specifically focus on the works achieved at imec in this
field over the last decade.
In Section 1.2, we first review how the initial developments moved from the uni-
polar to the bipolar switching concept, and we describe typical structures, fabrication
flows, testing procedures, and electrical characteristics of bipolar devices that main-
stream nowadays.
In Section 1.3, we focus on material developments allowing substantial improve-
ments in memory performances, and finally, in Section 1.4, we address key reliability
challenges to address in the future.
a diode, which in turn held the promise of dense memory integration potential. Goux
and Spiga [19] give a recent review of unipolar-switching developments.
Fig. 1.1 (A) Cross-sectional TEM images and (B) schematic structures of Ni\NiO\Ni cells;
(C) Consecutive unipolar I-V sweeps obtained on the same cell; (D) Extracted Vset and Vreset as
a function of the I-V cycles [21].
OxRAM technology development and performances7
of TEM and EELS characterization a significant increase of the O/Ni ratio after reset
operation in TiN\NiO\Ni cells [23]. Assuming now that the CF consists of a metallic
Ni-chain the thermal dissolution of Ni upon reset switching might be a more realistic
mechanism for CF rupture. In this scenario too the diffusion mechanism is expected to
occur sideways from inside the Ni-rich CF toward outside Ni-poor regions. In both sit-
uations, the physics of the reset operation is overall expected to depend on the spatial
distribution of defects, on local fields as well as on temperature profiles.
metals required in the model system Pt/NiO/Pt to avoid parasitic oxidation during the
thermal-induced reset operation.
In contrast, the drift-dominated mechanisms involved in bipolar VCM allow using
CMOS-friendly electrode materials like TiN or TaN.
Regarding the oxide layer, excellent performances have been demonstrated using
mature atomic-layer deposition (ALD) oxide layers like HfO2 [7,27] or Ta2O5 [28,29],
which are considered today as the mainstream oxide families of OxRAM.
However, the key success of bipolar OxRAM lies elsewhere, that is in the electrical
asymmetry of the structure, as required for a bipolar functionality. We evidenced by
Internal Photoelectron Emission (IPE) that some low work-function metallic layers
like Hf, Ti, Ta inserted at one interface of the MIM stack are very appropriate to induce
such required asymmetry. Fig. 1.2 shows the substantial decrease of electron barrier
of ~1 eV from TiN to Hf electrode [30]. This effect is due to the oxygen scavenging
by Hf leading to the development of an oxygen deficient hafnia interlayer between
Hf and HfO2. A resulting substochiometric oxide interlayer is formed, often referred
to as oxygen-exchange-layer (OEL) [31]. The role of this layer will be to “exchange”
oxygen species with the filament in the oxide layer during the bipolar switching op-
eration. On the other hand, the TiN opposite electrode is considered inert to oxygen
in the first approximation. Hence, the O-scavenging layer of Hf induces an oxygen
vacancy profile along the oxide thickness and will be the main knob allowing to tune
the bipolar switching functionality and characteristics of the device. Both the nature
and the thickness of this layer will be key to the device performances, as will be shown
in the following sections.
As best O-scavenging materials, in general, the use of “mother” metals in Ta2O5\
Ta [29] or HfO2\Hf [27] is preferred and shows robust stack stability after integration
thermal budget. And in practice, up to today the TiN\HfO2\Hf\TiN and TiN\Ta2O5\
Ta\TiN are considered as mainstream OxRAM devices and will be the baselines dis-
cussed in the following sections.
Fig. 1.3 (A) Schematic representation of the so-called 1T1R configuration; (B) cross section
along BE and TE of a minimum-sized (8 × 12 nm2) reference 5 nm-HfO2\10 nm-Hf RRAM
stack; the HfO2 layer is amorphous, Hf is crystalline, oxides sidewalls at TE are further
reducing effective cell size; (C) typical set and reset I-V traces obtained on the cells [27].
10 Advances in Non-volatile Memory and Storage Technology
Forming
As mentioned, before memory operation the cells need to undergo a “forming” step,
whereby the conductive filament is formed through the oxide layer.
In Ref. [27] we studied the scaling behavior of the forming voltage (Vf) down to
10-nm TiN\HfO2\Hf cell size. We observe that while amorphous HfO2 maintains a
well-behaved scaling vs area, polycrystalline HfO2 shows abrupt dispersion and me-
dian Vf increase below ~40 nm size, which is attributed to the abrupt decrease of
grain-boundary density [27]. Therefore, in order to keep Vf control with scaling to sub-
10 nm size, amorphous oxide layers are preferred, allowing uniform weak electrical
path and controllably low Vf.
We also observed that the forming operation is also highly controlled by the en-
gineered O-scavenging layer. Fig. 1.4 shows for TiN\Ta2O5\TE cells that Vf may be
drastically decreased by changing Ta to Ti TE O-scavenging layer [29]. This is due to
the larger O-affinity of Ti, resulting in a lower formation energy (Ef) of Vo in Ta2O5,
and which in turn induces a lower Vf. As can be observed in Fig. 1.4B, the breakdown
voltage (Vbd) data extracted by applying opposite voltage polarity are higher than Vf,
which is due to a larger energy required for the drift of oxygen anionic species toward
TiN as compared to the O-scavenging layer.
Interestingly, a thicker Ta layer or the use of a substochiometric TaOx TE layer also
allows to tune Ef and thus Vf. Actually, the nature and thickness of the scavenging layer
tune the oxygen chemical potential at the interface, as will be detailed in the following
sections.
Note also that the scavenging is so strong for Ta2O5\Ti cells that the top part of the
Ta2O5 layer is fully depleted after integration (Fig. 1.4C) and the switching operation
is poor. This effect confirms that the mother-metal Ta is preferred to preserve device
integrity. Using Ta (10 nm) TE, excellent Vf uniformity is observed for a Ta2O5 thick-
ness range down to 3 nm, which allows to controllably limit Vf < 1.5 V for device sizes
down to 20 nm [29].
OxRAM technology development and performances11
1.E-06
TiN\Ta
T 2 O 5 \Ti
Ta
I TE (A)
1.E-08
2.7
O
TiN
TaOx
Ti(O)8.9
1.E-10
(A) 0 1 VTE (V) 2 3
5
1
N
Counts (norm.)
Vf , V BD (V)
4
Ti
0.5
3
TiN \ Ta2O5\ TE: O
2 S=30 nm
0
t Ta2O5 =8 nm
10 20 30 40
(15dev./test)
Position (nm)
(B) (C)
Fig. 1.4 Median preforming I-V traces (A), and Vf and Vbd data of 30-nm-size Ta2O5 devices
having different TE materials, showing strong scavenging difference between Ta- and Ti-
based TE; (C) XTEM and EELS profiles on as-integrated devices, showing a huge Ti-induced
O-soaking from the Ta2O5 layer [29].
(A) 30
100 pA
y 7 nm
X (nm)
15
x y
0 pA
7nm
Section axes 0
100 0
x Current (pA)
S1
S2
16
3 nm
10
X (nm)
y
x (nm) 7nm 0
80 0
y (nm) 2 nm
Current (pA)
(B) (C)
x
This experiment also evidenced that OxRAM technology may be scaled below
10-nm cell size.
Set/reset switching
After forming, the OEL will serve as a Vo reservoir supplying Vo species during set
switching to LRS and absorbing them back during reset to HRS. The actual set/reset
operations will translate geometrically by the modulation of the constriction width
close to the TiN BE, which will, in turn, modulate the electrical resistance level.
Electrically, this translates, similarly to the unipolar switching, into an HRS resistance
level intermediate between LRS and pristine resistance levels.
Note that only the constriction will impact the device resistance, so it should be
understood that the OEL element extends from over the rest of the filament. This OEL
element created during forming contains all Vo species required for set/reset operation,
meaning no additional Vo defects are created.
OxRAM technology development and performances13
Fig. 1.6 DC cycling on 2R structure (RA = 5.68 kΩ) showing the “extrinsic” I-V trace (blue)
and “intrinsic” (red), both lines are mean over 50 cycles. The abrupt current drop in “extrinsic”
RESET (not observed in 1R and 1T1R structures) can be linked to voltage accelerated RESET
consequence of the large overvoltage (|V-Vtrans|) already present at RESET onset [35].
14 Advances in Non-volatile Memory and Storage Technology
1.5
1M S = 30 nm
Vset (V)
t ox = 6 nm 1.0
Resistance (Ω)
Vreset (V)
10k –1.0
–1.5
Hf Ta Ta TaO Hf Ta Ta TaO
–2.0
1k HfO2 HfO 2 Ta 2 O5 Ta 2 O5 HfO2 HfO2 Ta 2 O5 Ta 2 O5
(A) (B)
mo [Vo ]
~ ωx - 1 TaO
Vo mobility
Ta
TE
BE
Oo Oo V o Oo V o Hf
(C)
Fig. 1.7 (A) DC HRS and LRS resistance, and (B) switching-voltage distributions for Ta2O5
and HfO2 devices, showing the tuning of switching parameters by the TE material, irrespective
of the dielectric material; (C) Schematic representation of the oxygen chemical-potential
profile along the CF, tunable by the electrodes and thus allowing modulation of the Vo mobility
for fixed CF geometry (ωx) [29].
— Ei siitä mitään puhetta ollut, väitti nyt seppä, enkä minä sieluani
anna.
— Tartu kiinni!
*****
VII
— Kuinka voit luulla, että luoja korjaa sielusi, kun kerran sanot
aina petkutuksella eläneesi? Piru kai sinut korjaa eikä luoja?
Ja isäntä lisäsi:
— Ei, hyvä veli, tämä tällainen käy päinsä, puheli nyt Lusti
opettavaisesti Santtepekille. Kun olet kerran tuollainen taitoniekka,
että kädellä pyyhkäisemällä teet sokean näkeväksi, niin siitä
taidostahan vasta killinkejä heltiää. Parempaa elämisen keinoa ei voi
olla. Mitäpä siis muuta kuin sinä toimitat sairaiden parantamisen, ja
minä otan osalleni maksun kantamisen. Voit olla varma siitä, että
yhtä tunnollisesti ja perinpohjin kuin sinä tehtäväsi suoritat, minäkin
pidän huolen omastani. Näin me molemmat levitämme onnea ja
siunausta, emme ainoastaan koko maakuntaan, vaan vieläpä omaan
vatsaamme, joka muuten olisi aina tyhjä paitsi suu auki vastatuuleen
kuljettaessa.
Santtepekki ei sanonut mitään, vaan huokasi hiljaa itsekseen..
Mitä oli hänen tehtävä tälle omituiselle ihmislapselle, joka ei
näyttänyt horjahtavan erikoisluonteensa tasapainosta silloinkaan,
kun jumalallinen ihmetyö tapahtui hänen silmäinsä edessä?
Päinvastoin hän oli heti valmis käyttämään sitä tavalla, joka ei ollut
Jumalan tarkoitus, saadakseen itselleen rahaa ja lihallisia nautintoja.
Olisiko mitään keinoa, jolla saisi hänen sielunsa järkytetyksi ja
silmänsä avatuksi? Santtepekki tunsi, kuinka Jumalan aivoitukset
sotamies Lustin suhteen olivat hänelle tuntemattomat, ja huoaten
hän kaipasi Jeesuksen kaikkiviisasta läsnäoloa ja johtoa. Hän päätti
kääntyä rukouksella mestarinsa puoleen ja halusi siksi poistua
syrjemmäksi. Hän pyysi Lustia hetkisen odottamaan ja tämä
selittikin:
— Mikäpä siinä. Laihaa olikin tuon talon ruoka, niin että mielinpä
vähän maistaa näitä lampaanlihoja. Mene sinä vain, minne haluat;
minä teen tulen ja paistan rasvaiset paistit, etteivät lihat pääse
pilautumaan.
VIII
— Riitaako haastat?
- No, vanha toveri! Mitä siellä nurkassa yksin istuskelet ja olet niin
surullisen näköinen? Tule ja ota sinäkin, vanha mies, lämmin ryyppy,
niin rupeavat veresi hiukan vilkkaammin kiertelemään!
— Kas niin! Sehän oli oikein tukeva ryyppy! Jatka vain, niin kyllä
sinusta vielä mies tulee vanhanakin. Ja hän kaasi Santtepekin lasin
uudelleen täyteen. Kuta useammin lasin Santtepekki kallisti, sitä
ihmeellisemmäksi hän tunsi olonsa. Hänestä tuntui kuin olisi hän
aste asteelta laskeutunut yhä lähemmäksi inhimillisyyden vuolasta ja
haaleata virtaa, kunnes vihdoin painui siihen kokonaan ja lähti
uimaan rinnakkain miljoonien sielujen kanssa, rakkaassa
veljeydessä. Ja hänen sielussaan heräsi se suloisen kipeä, katkeran
tuskallinen, mutta samalla kaukaisesti hyvää tekevä ja sielua
avartava polte, jonka Jumala on ihmiselle kalliina aarteena
lahjoittanut ja jonka nimi on elävä, maahan asti nöyrtyvä, uskolla ja
avunhuudolla ylös pyrkivä synnintunto, sielujen ankara kevätmyrsky,
joka raivoaa katkoen puita ja oksia, sortaen maahan kaikki lahot
rakennukset, hälventäen valheen ja teeskentelyn sumut, mukanansa
lupaus ihanasta kevään ajasta, jolloin kyynelöivä maailma välkkyy
armon auringon loisteessa ja autuuden soitto täyttää sielun.
Santtepekki katsahti ympärilleen pimeään krouvin tupaan, jossa
savuavat kynttilät siellä täällä tuikuttivat, uneliaaseen, pöytänsä