Experiment 02: Implementation and Observation of Half Adder

Objective:
(i) To study the operating principles of a Half Adder.
(ii) To implement a Half Adder circuit using digital logic gates.
(iii) To analyze the output of the Half Adder using a truth table to determine the
sum and carry values for different input combinations.
(iv) To understand the concept of binary addition and its application in digital
circuits.
(v) To observe the working mechanism of the Half Adder circuit to understand its
functionality and behavior.

Description:
In this lab, we will work with basic digital logic gates such as AND, OR, NOT,
and XOR gates to design and implement a Half Adder circuit. The Half Adder is
a fundamental digital logic circuit that performs the logical addition of two binary
digits. We will learn how to use these gates to design and implement a Half
Adder circuit using a breadboard and various electronic components such as
resistors, capacitors, and LEDs.

A Half Adder is a digital logic circuit that adds two binary digits (bits) and
produces two outputs: the sum (S) and the carry (C). It is a fundamental building
block in digital logic design and is used in the construction of more complex
circuits, such as full adders and multi-bit adders.

The Half Adder can be represented by a simple diagram with two inputs (A and
B) and two outputs (S and C). The inputs A and B represent the two binary digits
to be added, while the outputs S and C represent the sum and carry,
respectively. It is illustrated below:

Circuit Diagram of Half Adder

Equations: The Half Adder can be described mathematically using the following
equations:

S = A XOR B
C = A AND B

where XOR represents the exclusive OR operation, AND represents the logical
AND operation, and A and B represent the two binary digits being added.

The Half Adder can also be described using a truth table, which shows all
possible input combinations and their corresponding output values. The truth
table for the Half Adder is as follows:

Truth Table for Half Adder

Discussion:
To implement a Half Adder, we can use digital logic gates such as XOR and
AND gates. The XOR gate is used to calculate the sum (S) by performing the
exclusive OR operation on the two inputs (A and B). The AND gate is used to
calculate the carry (C) by performing the logical AND operation on the two inputs
(A and B).
By observing the Half Adder, we can see that it produces two outputs: the sum
(S) and the carry (C). The sum (S) represents the result of the addition, while the
carry (C) indicates whether there is a carry-out from the addition. The Half
Adder's truth table shows all possible input combinations and their
corresponding output values, allowing us to understand the circuit's behavior
under various conditions. We encountered zero errors as all the lab components
were in excellent condition. We have performed the experiment successfully and
learned about the Half Adder.