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System Software: 06CS52 Unit 1

SYSTEM SOFTWARE

UNIT 1:MACHINE ARCHITECTURE

Software: It is a set of programs which are used to perform a particular task.

Types of Software

1. System Software
2. Application Software

System Software: It consists of a variety of programs that support the operation of a computer.

The major components of System Software available are or Examples of system software

1. Compilers: This system software accepts programming languages written by people and translates
them into machine language.
2. Assemblers: This system software accepts assembly level language programs written by people and
translates them into machine language.
3. Interpreter: This system software accepts high level language programs and translates them into
machine language line by line.
4. Macro Processor: This system software allow programmers to use abbreviations in their assembly
or programming language.
5. Loader or Linker: Loader is a system software that places programs into memory and prepares
them for execution.
6. Debugger: It helps to detect the error in the program.
7. Operating Systems: It controls the operation of a computer.
8. Text editor:- It is used to create and modify the program.

Application Software: It consists of a variety of programs that support the operation of a user.

The different Application Software available are:

1. MS Office
2. Library Software
3. Note Pad
4. Word Pad

Differences between System Software and Application Software:-

System Software Application Software

1. It consists of variety of programs that 1. It is mainly concerned with solution of


support for the operation and use of the some problem using the computer as a
computer itself. tool.

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System Software: 06CS52 Unit 1

2. It is machine dependent 2. It is machine independent.


3. It is related to the architecture of the machine 3. It is not related to the architecture of the
machine.
4. User will gain a deeper understanding of how 4. User will not gain any understanding of
computer actually works how computer works
5. User can’t directly interact with system software 5. User can directly interact with application
software
6. Ex:- Compilers, Assemblers, Macros, etc 6. Ex:- Word pad, MS office, Note pad, etc

SIMPLIFIED INSTRUCTIONAL COMPUTER ( SIC):

SIC is a hypothetical computer that has been carefully designed to include the hardware features most often
found on real machines, while avoiding unusual or irrelevant complexities.

SIC machines comes in 2 versions:-


a) SIC (Standard Model)
b) SIC/XE (XE=Extra equipment)

Both the versions are upward compatible, i.e an object program written for standard SIC machine also
execute properly on the other versions of the SIC/XE machine.

SIC MACHINE ARCHITECTURE:-

1. Memory:
 It has 15 Address lines so memory=215 (32,768) bytes.
 All address on SIC are bytes address
 8bits = byte
 3byte(24bits) = word
 It can access a word of 24 bits by addressing the lowest numbered bytes.

2. Registers:

There are 5 registers, all of which have special uses. Each register is 24 bits in length.

Register Number Special use


A 0 Accumulator: Used for Arithmetic Operations.
X 1 Index: Used for Addressing.
L 2 Linkage register: Used to Jump to Subroutine(JSUB) instruction and stores the
return address in this register.sss
PC 8 Program Counter: Contains the address of the next instruction to be fetched for
execution.
SW 9 Status Word: Contains a variety of information, including a condition code (cc).

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System Software: 06CS52 Unit 1

3. Data Formats:

 Integers stored in 24 bits binary numbers. Negative number is represented by using 2’s
complement format.
 Characters stored in 8-bit ASCII code format.
 Standard version of SIC does not support floating point hardware.

4. Instruction Formats:

All machine instructions on standard version of SIC have 24-bit format.

The flag bit X is used to indicate Indexed Addressing mode.

5. Addressing Modes:

SIC machine supports 2 addressing modes. They are:-

1. Direct Addressing mode: The address of the operand is directly given in the instruction
itself.
Ex: ADD ALPHA; (A) = (A) + ( ALPHA )

2. Indexed Addressing mode: The address of the operand is calculated by adding the given
direct address with the contents of the index register.
Ex: LDA ALPHA,X; (A) = ( ALPHA + X )

Mode Indication Target Address Calculation


Direct X=0 TA=address
Indexed X=1 TA=address+(X)

Note: Parentheses are used to indicate the contents of a register or a memory location.

6. Instruction Set:

SIC provides a basic set of instructions that are sufficient for most simple task.

The instructions can be classified into 5 groups.

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1. Data Transfer Group


2. Arithmetic Group
3. Logical Group
4. Branch Group
5. Machine Group

Data Transfer Group: Transfer of data between the memory and a register.

There are 2 types

1. Load Instructions
2. Store Instructions

Load Instructions: Load the data which is present in specified memory location to the specified
register.

LDA:(00); Load into Accumulator the data from the operand mentioned in the instruction.

Ex: LDA ALPHA; The contents of ALPHA is read and loaded into A register.
LDA BUFF,X; The contents of (BUFF+X) is read and loaded into A register.

LDX:(04); Load into Index register the data from the operand mentioned in the instruction.

Ex: LDX ALPHA; The contents of ALPHA is read and loaded into X register.
LDX BUFF,X; The contents of (BUFF+X) is read and loaded into X register.

LDCH:(50); Load Character into Accumulators. Here only the lower order 8 bits of A register is
loaded with the character data.

Ex: LDCH ALPHA; The contents of ALPHA is read and loaded into A register.
LDCH BUFF,X; The contents of (BUFF+X) is read and loaded into A register.

LDL:(08); Load into Linkage register the data from the operand mentioned in the instruction.

Ex: LDL ALPHA; The contents of ALPHA is read and loaded into L register.
LDL BUFF,X; The contents of (BUFF+X) is read and loaded into L register.

Store Instructions: Store the data which is present in specified register to the specified memory
location.

STA:(0C); Store the contents of A into the memory.

Ex: STA MEM; Store the contents of A register into memory MEM.
STA MEM,X; Store the contents of A register into memory whose address is (MEM+X).

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STCH:(54); Store the Character present in Accumulator into the memory.

Ex: STCH MEM; Store the contents of lower order 8bits of A register into memory MEM.
STCH MEM,X; Store the contents of lower order 8bits of A register into memory whose
address is (MEM+X).

STL:(14); Store the contents of L into the memory.

Ex: STL MEM; Store the contents of L register into memory MEM.
STL MEM,X; Store the contents of L register into memory whose address is (MEM+X).

STX:(10); Store the contents of X register into the memory.

Ex: STX MEM; Store the contents of X register into memory MEM.
STX MEM,X; Store the contents of X register into memory whose address is (MEM+X).

Arithmetic Group: All Arithmetic operation involve register A and a word in memory with the
result being left in the A register.

ADD:(18); Add the contents of A register with the memory whose address is mentioned in the
instruction.

Ex:ADD m; A = (A) + (m); (Direct Addressing mode)


ADD m,X; A = (A) + (m+X ); (Indexed Addressing mode)

SUB:(1C); Subtract the contents of memory whose address is mentioned directly in the

instruction with the contents of A register.

Ex:SUB m; A = (A) - (m); (Direct Addressing mode)


SUB m,X; A = (A) - (m+X ); (Indexed Addressing mode)

MUL:(20); Multiply the contents of A register with the memory whose address is mentioned in the
instruction.

Ex:MUL m; A = (A) * (m); (Direct Addressing mode)


MUL m,X; A = (A) * (m+X ); (Indexed Addressing mode)

DIV:(24); Divide the contents of A register with the memory whose address is mentioned in the
instruction. Only integer Quotient is stored in A- register.

Ex:DIV m; A = (A) / (m); (Direct Addressing mode)


DIV m,X; A = (A) / (m+X ); (Indexed Addressing mode)

Logical Group: In this Group also involves A register as one of the operand.

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AND:(40); This instruction is used to AND the contents of ‘A’ register with the contents of memory

and the result is stored back into ‘A’ register.

Ex: AND m; A = ( A ) ∩ (m)


AND m,X; A = ( A ) ∩ (m+X)

OR:(44); This instruction is used to OR the contents of ‘A’ register with the contents of memory
and the result is stored back into ‘A’ register.

Ex: OR m; A = ( A ) U (m)
OR m,X; A = ( A ) U (m+X)

COMP:(28); This instruction subtract the contents of memory with the contents of ‘A’ register but
the result are not stored in memory or the register only condition flag will be affected

depending upon the contents of ‘A’ register.

Ex: COMP m; If A<(m) then CC set to ‘<’


If A>(m) then CC set to ‘>’
If A=(m) then CC set to ‘=’

COMP m,X If A<(m+X) then CC set to ‘<’


If A>(m+X) then CC set to ‘>’
If A=(m+X) then CC set to ‘=’

Branch Group: These are used to divert from sequential operations.

There are 3 main groups

1. Unconditional Branch
2. Conditional Branch
3. Subroutine Branch

Unconditional Branch: This performs branch operation to the destination mentioned in the
instruction. The previous operation has no effect on these instructions.

J:( 3C ); This instruction is used when the instruction to be executed is not sequential the
process jumps to the address mentioned in the instruction.

Ex: J m; PC = (m)
J m,X; PC= (m,X)

Conditional Branch: There are 3 instructions in this group. The CC flag indicates the conditions.

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1. JEQ:(30); This instruction loads the contents of PC with the address of m if CC set to ‘=’
2. JGT:(34); This instruction loads the contents of PC with the address of m if CC set to ‘>’
3. JLT:(34); This instruction loads the contents of PC with the address of m if CC set to ‘<’

Subroutine Branch: This is an instruction used to execute a subprogram and return back to
main program after execution of subroutine.

JSUB:(48); This instruction is used to branch the program in memory labelled with program before
jumping the L register is loaded with program counter value ( L=PC) and the address of

the subprograms is loaded into the PC. (PC=Subroutine Adress).

RSUB:(4C); This is the instruction to return from the subroutine back to the main program. The
contents of L register is loaded into the PC to return to the Called program (PC=L).

Machine Group: There are 2 instructions used to halt and start the input, output channels.

They are as follows:-

HIO:(F4); This instruction is used to halt the I/O channel. The Channel address is provided in the
‘A’ Register.

SIO:(F0); This instruction is used to start the I/O channel. The channel address is provided in the
‘A’ register and the channel program is provided in memory whose address is provided
in ‘S’ register.

Input and Output Group of Instruction: Input and output operations are performed by
transferring one byte at a time to or from the rightmost 8 bits of register A. Each device is assigned a
unique 8-bit code.

TD:(E0); The test device instruction tests whether the addressed device is ready to send or receive
a byte of data. The condition code flag set to indicate the result of this test.

‘<’ means device is ready to send or receive


‘=’ means device is not ready.

RD:(D8); Data specified by the address is read into ‘A’ register lower order byte. The port address is

mentioned in memory by prefixing X and providing port address in single quote.

Ex: RD Port; Read byte data from the I/O device number port.
port BYTE X ’25’; s

WR:(DC); Data is sent to O/P device which is specified by memory in the instruction

Ex: WR port; Write the data from A register to I/O device number port.
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port BYTE X ‘22’;

TIX:(2C); This is an instruction which increments the contents of X and compares the contents of X

with the contents of memory location specified in the instruction.


Depending upon the result CC flag is set.
If (X) < (m); CC = ’<’
If (X) > (m); CC = ’>’
If (X) = (m); CC = ’=’

SIC Programming Examples

1. Write a program to read a constant from memory location FIVE and store the same into
memory location ALPHA. Read a character from memory location CHARZ and store it in
location C1 for SIC machine.

START
LDA FIVE
STA ALPHA
LDCH CHARZ
STCH C1
ALPHA RESW 1
FIVE WORD 5
CHARZ BYTE C ‘Z’
C1 RESW 1
END

2. Write a Program to read the status of a input device and output device and if the devices are
ready to read 10 bytes of data and O/P to another device.

START 0400
LDX ZERO
INLOOP TD INDEV
JEQ INLOOP
RD INDEV
OUTLOOP TD OUTDEV
JEQ OUTLOOP
WD OUTDEV
TIX TEN
JLT INLOOP
INDEV BYTE X ‘F1’
OUTDEV BYTE X ‘05’
TEN BYTE 10

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ZERO BYTE 0
END

3. Write a sequence of instructions for SIC to initialize 26 locations with ASCII code ‘A’ to ‘Z’

START
LDX ZERO
LDA FORTYONE
LOOP STCH MEM,X
ADD ONE
TIX TWENTYSIX
JLT LOOP
MEM RESB 26
TWENTYSIX BYTE 26
ZERO BYTE 0
FORTYONE BYTE 41
ONE BYTE 1
END

4. Write a program for SIC/XE to perform divide operation NUM1 and NUM2 and save the
integer result in NUM

START
LDA NUM1
DIV NUM2
STA NUM
NUM1 BYTE 85
NUM2 BYTE 05
NUM RESB 01
END

5. Write a program to read data from the 8 key switch connected to the port ‘F1’ and store the
read character data in memory ALPHA.

START
LOOP TD OUTDEV
JEQ LOOP
RD INDEV
STCH DATA
INDEV BYTE X ‘F1’
DATA RESB 1
END

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SIMPLIFIED INSTRUCTIONAL COMPUTER WITH EXTRA EQUIPMENT


(SIC/XE):

SIC/XE machine is the extension of SIC m/c. The memory, registers and instructions are further extend to
improve over SIC m/c.

1. Memory:

 It has 20Address lines so memory=220 (1MB) bytes.


 All address on SIC/XE are bytes address
 8bits = byte
 3byte(24bits) = word
 It can access a word of 24 bits by addressing the lowest numbered bytes.

2. Registers:

There are 9 registers, all of which have special uses. Each register is 24 bits in length.

Register Number Special use


A 0 Accumulator: Used for Arithmetic Operations.
X 1 Index: Used for Addressing.
L 2 Linkage: Store the Return address.
B 3 Base: Used for Addressing
S 4 General purpose register no special Function
T 5 General purpose register no special Function
F 6 Floating Point Accumulator (48-bits)
PC 8 Program Counter: Contains the address of next instruction to be fetched for
execution.
SW 9 Status Word: It contains a variety of information, including a condition code
(cc).

3. Data Formats:

 Integers stored in 24 bits binary numbers. Negative number is represented by using 2’s
complement format.

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 Characters stored in 8-bit ASCII code format.


 Floating point numbers are represented by floating point register
It has 48-bits in length.

The following fig shows the 48-bit floating point data type format.
S
S Exponent Fraction

1 11 36

If exponent has value e and fraction has value f, the absolute value of number represented by f*2 (e-1024)
The sign of the floating point number is indicated by the value of ‘S’ (0 = positive, 1= negative).

4. Instruction formats:

The instruction format of SIC/ XE is modified to suit the changes made in the hardware such as:-

1. Enhancing the number of address lines.


2. Increasing the no of registers.
3. Providing floating point accumulator.

SIC/XE machine support four instruction formats:-s

One byte format: This instruction is usually implied addressing mode. It does not indicate the
operand.

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Ex: FLOAT: Convert to floating point


NORM : Normalized
RSUB : Move the contents of L to PC

Two byte format: This is usually Register-Register addressing mode.

Ex: ADDR r1,r2 ; r2(r2)+(r1)


DIVR r1,r2 ; r2(r2)/ (r1)

Three byte format: In this displacement is 12 bits.

Ex:- STL RETADR

Four byte format: The target address is taken from the address field of the instruction which is 20
bits wide. These are usually direct addressing modes. Prefix + is used to identify four byte
instructions.

Ex: +JSUB RDREC

The three byte and four byte instructions have six flags. The function of the flags are:-

n  Indirect addressing mode (represented by @ symbol)


i  Immediate addressing mode (represented by # symbol )
x  Indexed addressing mode
p  Program counter relative addressing mode
b  Base relative addressing mode.
e  This bit is used to indicate or identify 3 byte or 4 byte instruction.
If e=0; format 3-byte
If e=1; format 4-byte
By going through the flag one can decide the type of addressing mode

b=0 and p=0  Direct addressing mode


b=1 and p=0  Base relative addressing mode
b=0 and p=1  Program counter relative addressing mode

Any of these direct, base relative, program counter relative addressing mode can combine with
indexed addressing  if bit X is set to 1.

i=1 and n=0  Immediate addressing mode


i=0 and n=1  Indirect addressing mode
i=1 and n=1  instruction is neither immediate nor indirect.

5. Addressing Modes: SIC/XE m/c is more powerful than SIC. It supports relatively larger number of
addressing modes.

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1. Register to Register Addressing mode


2. Direct Addressing mode
3. Indirect Addressing mode
4. Immediate Addressing mode
5. Indexed Addressing mode
6. Implied Addressing mode
7. relative Addressing mode

Register to Register Addressing mode: This is a simple addressing mode which has the operands as
registers.

Ex: ADDR r1, r2;


SUBR r1,r2;
MULR r1,r2;

Direct Addressing mode: The address of the operand is directly specified in the instruction itself.

Ex: LDA ALPHA;

Indirect Addressing mode: (represented by @symbol) The address of the memory location is
indicated in the instruction which has the address from where operands can be accessed. In other
words it is the address of the address from where the data can be accessed.

Ex: ADD @020 ;

Note: The contents of memory location 020 contains the address. This address points to the data
which is accessed and added to the contents of ‘A’ register and the result is stored back into
A register.

Immediate addressing mode: (reprsented The data for the instruction is immediately available in the
instruction
itself.

Ex: ADD #30 ; A (A) + 30

Indexed addressing mode: The contents of X register are used to access the data.

Ex: LDA NUM, X; A(NUM + X)

Implied addressing mode: There are some instructions which as no operand.

Ex: TIO, HIO, SIO

Relative addressing mode: In these mainly 2 types of addressing mode

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1. Base Relative
2. Program counter Relative

Base Relative: The address of the operand is calculated by considering the contents of B- register
relative to the program counter.

Ex: LDA B,X;

Program Counter Relative: The address of the destination is calculated using the present address in
PC register. This addressing mode is usually used for jump subroutine call instruction.

Ex: J next

6. Instruction Set: SIC/XE supports large no of instructions.

The instruction can be grouped into five groups.

1. Data Transfer Group


2. Arithmetic Group
3. Logical Group
4. Branch Group
5. Machine Group

1. Data Transfer Group: This group used only the data transfer from register to register or from
register to memory and from memory to register.

There are 2 types

2. Load Instructions
3. Store Instructions

Load Instructions: Load the data which is present in specified memory location to the specified
register.
LDA:(00); Load into Accumulator the data from the operand mentioned in the instruction.

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Ex: LDA ALPHA; The contents of ALPHA is read and loaded into A register.

LDB:(08); Load into base register.


Ex: LDB number; The contents of number is read and loaded into B register.

LDCH:(50); Load character into accumulator. Here only the lower order 8 bits of A register
is loaded with the character data.
Ex: LDCH first;

LDF:(70); Load into floating point register.


Ex: LDF floatnum; load 48 bits floating point number into F register.

LDL:(08); Load into linkage register L.


Ex: LDL number; The contents of number is read and loaded into linkage register.

LDS:(6E); Load into S register.


Ex: LDS number;

LDT:(74); Load into T register.


Ex: LDT number;

LDX:(04); Load into X register.


Ex: LDX Alpha;

Store Instructions: Store the data which is present in specified register to the specified memory
location.

STA:(0C); Store the contents of A register into the memory.

Ex: STA MEM; Store the contents of A register into memory MEM.

STB:(78); Ex: STB @200;


STCH:(54); Ex: STCH bob;
STF:(80); Ex: STF 11144;
STL:(14); Ex: STL abcd;
STS:(7C); Ex: STS first;
STSW:(68); Ex: STSW Status
STT:(84); Ex: STT second
STX:(10); Ex: STX third

Register Transfer Instruction: The transfer of data from one register to another register by using

the instruction. This instruction is not available in SIC computer.

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RMO r1,r2:(AC); Move the data from register r1 to register r2. The registers may be
A,X,L,B,S and T.

Ex: RMO A T; Contents of A is transferred into T register.

2. Arithmetic Group: SIC/XE has arithmetic instructions which performs addition, subtraction,
multiplication and division on fixed point and floating point numbers.
In this mainly two types of operation

1. Fixed point operation


2. Floating point operation.

Fixed Point operation: In this operation we use normal instructions such as ADD for addition,
SUB for subtraction, MUL for Multiplication, DIV for division. Here we

can also perform register to register operation for that we have following
instructions.

ADDR:(90); It will perform addition operation between two registers.

ADDR r1,r2; Add the contents of register r1 with the register r2 and the result is
stored back in r2.
Ex: ADDR S,T ; Add the contents of S and T and result is stored back in T.

SUBR:(94); It will perform Subtraction operation between two registers.

SUBR r1,r2; Subtract the contents of register r1 with the register r2 and the result is
stored back in r2.
Ex: SUBR S,T ; Subtract the contents of S with T and result is stored back in T.

MULR:(98); It will perform Multiplication operation between two registers.

MULR r1,r2; Multiply the contents of register r1 with the register r2 and the result is
stored back in r2.
Ex: MULR S,T ; Multiply the contents of S and T and result is stored back in T.

DIVR:(9C); It will perform division operation between two registers.

DIVR r1,r2; Divide the contents of register r1 with the register r2 and the result is
stored back in r2.
Ex: DIVR S,T ; Divide the contents of S and T and result is stored back in T.

Floating Point Operation: In this we can perform floating point Addition, Subtraction,
Multiplication, Division etc.

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ADDF:(58); Add the contents of ‘A’ register with the contents of memory having floating point
number.

Ex: ADDF ALPHA; ADD the floating point no in memory ALPHA with ‘A’ register and
the result stored back in ‘A’ register.
A  (A) + (ALPHA)

SUBF:(5C); Subtract the contents of ‘A’ register with the contents of memory having floating point
number.

Ex: SUBF ALPHA; Subtract the floating point no in memory ALPHA with ‘A’ register
and the result stored back in ‘A’ register.
A  (A) - (ALPHA)

MULF:(60); Multiply the contents of ‘A’ register with the contents of memory having floating point

number.

Ex: MULF ALPHA; Multiply the floating point no in memory ALPHA with ‘A’ register
and the result stored back in ‘A’ register.
A  (A) * (ALPHA)

DIVF:(64); Divide the contents of ‘A’ register with the contents of memory having floating point
number.

Ex: DIVF ALPHA; Divide the floating point no in memory ALPHA with ‘A’ register and
the result stored back in ‘A’ register.
A  (A) / (ALPHA)

3. Logical Group Instructions: This group consist of normal Logical instructions such as AND,
OR, compare and shift operations.

COMPR:(A0); It will perform comparison operation between two registers.

COMPR r1,r2; Subtract the contents of r1 with r2 and the results are not stored anywhere.
Depending upon the result CC flag will be updated.
Ex: COMPR S,T ; if S<T CC = ‘<’
if S>T CC = ‘>’
if S=T CC = ‘=’

CLEAR:(84); This instruction is used to initialize the register to zero. It takes less clock
cycle period than moving immediate zero into register.

Ex: CLEAR T ; T=0;

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SHIFTL:( A4); This instruction is used to shift the contents of the register to left by the number
specified in the instruction. Each left shift is equivalent to multiply by 2.

Ex: SHIFTL S,4 ; S=2 (before execution)


S=4 (after Execution)

SHIFTR:( A8); This instruction is used to shift the contents of the register to the right by the
number specified in the instruction. Each right shift is equivalent to divide by 2.

Ex: SHIFTR S,4 ; S=8 (before execution)


S=2 (after Execution)

Branch Group and M/C Group Instructions

Same as SIC m/c.

5.Input and Output Group: Normal I/O instructions are TD, RD, WR and TIX . SIC/XE also
supports special instructions for register to register operations.

TIXR:(88); This instruction is almost same as TIX instruction. Here register is used instead of
memory. The X register is incremented by one and compares the contents of X with
the contents of register r1.Depending upon the result CC flag is set.

If (X) < (m); CC = ’<’


If (X) > (m); CC = ’>’
If (X) = (m); CC = ’=’

SIC/XE Programming Examples

1. Write a SIC/XE program to add two 10 bytes of arrays and store the result in third array.

START 0500
LDT #10
LDX #0
LOOP LDA ARRAY1,X
ADD ARRAY2,X
STA ARRAY3,X
TIXR T
JLT LOOP
ARRAY1 BYTE 1,2………….10
ARRAY2 BYTE 1,2,…………10

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ARRAY3 RBYTE 10
END.

2. Write a SIC/XE program to read 100 bytes of character data from the input device port
‘f1’ and stored in memory RECORD.

START 1000
LDT #100
LDX #0
LOOP TD INDEV
JEQ LOOP
RD INDEV
STCH RECORD,X
TIXR T
JLT LOOP
INDEV BYTE X’f1’
RECORD RBYTE 100
END

3. Write a SIC/XE program to divide NUM1 and NUM2 setting QUA to quotient and REM to
remainder.

START 0200
LDA NUM1
RMO A,T
DIV NUM2
STA QUA
MUL NUM2
SUB T
STA REM
NUM1 BYTE 10
NUM2 BYTE 20
QUA RBYTE 1
REM RBYTE 1
END

4. Write a SIC/XE program to clear 20 byte string to all zeros. Use immediate addressing
mode and register to register instructions to make the processor as efficient as possible for
SIC/XE.

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START 0000
LDT #20
LDX #0
RMO X,A
LOOP STA MEM,X
TIXR T
JLT LOOP

MEM RESB 20
END
5. Write a program to read the values of ‘A’ and ‘B’ from the memory and evaluate expression
A*2.0+B*6 and store the result in Z

START
LDA A
MULF #2.0
STF ALPHA
LDA B
MUL #6
ADDF ALPHA
STF Z
A BYTE 10
B BYTE 20
Z RBYTE 10
END

QUESTIONS:-

1. Differentiate between System software and Application software. (5 M)


2. List out registers used in SIC m/c architecture along with their use. (5 M)
3. Explain the following with reference to SIC m/c architecture: (10 M)
i. Memory
ii. Data formats and Instruction formats
iii. Addressing modes
iv. Input and Output group of instructions.
4. With reference to SIC standard version explain instruction set. (10 M)
5. Explain the following with reference to SIC/XE machine architecture. (10 M)
i. Memory
ii. Data formats
iii. Instruction formats
iv. Input and Output group of instructions.
6. List out registers used in SIC/XE machine architecture along with their use. (6 M)
7. Explain addressing modes of SIC/XE with examples. (7 M)
8. With reference to SIC/XE standard version, explain Instruction set. (10 M)

20
PU , Dept of CSE
System Software: 06CS52 Unit 1

21
PU , Dept of CSE

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